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xesscorp / VhdlSnippets.ftd
Created July 17, 2012 05:28
Notepad++ FingerText snippets for speedy VHDL code entry.
div
Ext:vhd
--**********************************************************************[>END<] !$[FingerTextData FingerTextData]@#
comblk
Ext:vhd
$[![(cha)div]!]
--
$[![(cha)div]!]
[>END<] !$[FingerTextData FingerTextData]@#
rng
@xesscorp
xesscorp / ParallelResistors.py
Created September 25, 2011 15:33
Program for computing the best resistors to parallel in order to synthesize the 168 standard resistor values.
MAX_FLOAT = 10E99
NUM_RESISTORS = 3
resistorRoots = [ 1.0, 1.1, 1.2, 1.3, 1.5, 1.6, 1.8, 2.0, 2.2, 2.4, 2.7, 3.0,
3.3, 3.6, 3.9, 4.3, 4.7, 5.1, 5.6, 6.2, 6.8, 7.5, 8.2, 9.1 ]
resistorDecades = range(0, 7)
standardResistors = [r * 10 ** d for r in resistorRoots for d in resistorDecades]
def CalcParallelResistance(r0, r1=MAX_FLOAT, r2=MAX_FLOAT):
@xesscorp
xesscorp / jsissom.vhd
Created September 16, 2011 03:02
SDRAM interface test code
library IEEE;
use IEEE.STD_LOGIC_1164.all;
use IEEE.STD_LOGIC_ARITH.all;
use IEEE.STD_LOGIC_UNSIGNED.all;
use WORK.CommonPckg.all;
use work.ClkgenPckg.all;
use WORK.SdramCntlPckg.all;
library UNISIM;
use UNISIM.VComponents.all;