Toggle GPIO11 (JTAG TDO) on BL602

main.S

# memory mapped register for gpio0/1 cfg. used as base for other registers
.set GPIO_CFGCTL0, 0x40000100
# memory mapped register for gpio10/11 cfg
.set GPIO_CFGCTL5_OFS, 0x14
# memory mapped register for GPIO output (whether GPIO is high or low)
.set GPIO_CFGCTL32_OFS, 0x88
# memory mapped register for GPIO output-enable (whether GPIO gets driven)
.set GPIO_CFGCTL34_OFS, 0x90
# config for two GPIO is stored in each CFG register, choose the appropriate one
# based on your GPIO number (ie GPIO11 is ODD, GPIO2 is EVEN)
.set GPIO_CFG_GPIO_ODD, 0b00001011001000000000000000000000
.set GPIO_CFG_GPIO_EVEN, 0b00000000000000000000101100100000
# mask for gpio out and gpio output-enable registers
# this is 0b1 shifted left by GPIO number + 1 (since GPIO0 = bit 1)
.set GPIO_BITSET_GPIO11, 0b00000000000000000000100000000000
# Counter reload value for our busy-wait loop
.set DELAY, 0x2000000
.section .text

main:
    # Load the address of GPIO_CFGCTL0 into temp_1 so we can use
    # it as the base address for our GPIO register accesses
    li t1, GPIO_CFGCTL0
    # Load the GPIO configuration for GPIO into temp_2, then store
    # it into the CFGCTL register associated with our GPIO
    li t2, GPIO_CFG_GPIO_ODD
    sw t2, GPIO_CFGCTL5_OFS(t1)
    # Load the bitset mask into temp_2
    # for use in the output and output enable registers
    li t2, GPIO_BITSET_GPIO11
    # initialise output enable register with the bitset mask
    sw t2, GPIO_CFGCTL34_OFS(t1)
loop:
    # load the current value of the output register
    lw t4, GPIO_CFGCTL32_OFS(t1)
    # toggle the output bit for the GPIO we're using
    xor t4, t4, t2
    # load the updated gpio value into the output register
    sw t4, GPIO_CFGCTL32_OFS(t1)
    # Set delay counter in temp_3
    li t3, DELAY
delay:    
    # Decrement counter until it hits zero
    addi t3, t3, -1
    bne t3, zero, delay
    # now start again!
    j loop