Pack peel ukernel | bf16 bf16 matmul | CONSTANT VALUE ONLY

ukernel_bf16_bf16_matmul.mlir

// -----// IR Dump Before AssignTargetDevicesPass (iree-hal-assign-target-devices) //----- //
module {
  func.func @matmul_large(%arg0: tensor<2048x2048xbf16>, %arg1: tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16> {
    %0 = tensor.empty() : tensor<2048x2048xbf16>
    %cst = arith.constant 0.000000e+00 : bf16
    %1 = linalg.fill ins(%cst : bf16) outs(%0 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %2 = linalg.matmul ins(%arg0, %arg1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%1 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    return %2 : tensor<2048x2048xbf16>
  }
}


// -----// IR Dump Before AutoInputConversionPipeline (iree-auto-input-conversion) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  func.func @matmul_large(%arg0: tensor<2048x2048xbf16>, %arg1: tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16> {
    %0 = tensor.empty() : tensor<2048x2048xbf16>
    %cst = arith.constant 0.000000e+00 : bf16
    %1 = linalg.fill ins(%cst : bf16) outs(%0 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %2 = linalg.matmul ins(%arg0, %arg1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%1 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    return %2 : tensor<2048x2048xbf16>
  }
}


// -----// IR Dump Before IREEImportPublic (iree-import-public) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  func.func @matmul_large(%arg0: tensor<2048x2048xbf16>, %arg1: tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16> {
    %0 = tensor.empty() : tensor<2048x2048xbf16>
    %cst = arith.constant 0.000000e+00 : bf16
    %1 = linalg.fill ins(%cst : bf16) outs(%0 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %2 = linalg.matmul ins(%arg0, %arg1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%1 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    return %2 : tensor<2048x2048xbf16>
  }
}


// -----// IR Dump Before ImportMLProgram (iree-import-ml-program) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_large(%arg0: tensor<2048x2048xbf16>, %arg1: tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16> {
    %0 = tensor.empty() : tensor<2048x2048xbf16>
    %cst = arith.constant 0.000000e+00 : bf16
    %1 = linalg.fill ins(%cst : bf16) outs(%0 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %2 = linalg.matmul ins(%arg0, %arg1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%1 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    util.return %2 : tensor<2048x2048xbf16>
  }
}


// -----// IR Dump Before SanitizeModuleNames (iree-sanitize-module-names) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_large(%arg0: tensor<2048x2048xbf16>, %arg1: tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16> {
    %0 = tensor.empty() : tensor<2048x2048xbf16>
    %cst = arith.constant 0.000000e+00 : bf16
    %1 = linalg.fill ins(%cst : bf16) outs(%0 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %2 = linalg.matmul ins(%arg0, %arg1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%1 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    util.return %2 : tensor<2048x2048xbf16>
  }
}


// -----// IR Dump Before ConvertMeshToFlowPass (iree-convert-mesh-to-flow) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_large(%arg0: tensor<2048x2048xbf16>, %arg1: tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16> {
    %0 = tensor.empty() : tensor<2048x2048xbf16>
    %cst = arith.constant 0.000000e+00 : bf16
    %1 = linalg.fill ins(%cst : bf16) outs(%0 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %2 = linalg.matmul ins(%arg0, %arg1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%1 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    util.return %2 : tensor<2048x2048xbf16>
  }
}


// -----// IR Dump Before mlir::iree_compiler::IREE::ABI::ConvertStreamableOpsPass (iree-abi-convert-streamable-ops) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_large(%arg0: tensor<2048x2048xbf16>, %arg1: tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16> {
    %cst = arith.constant 0.000000e+00 : bf16
    %0 = tensor.empty() : tensor<2048x2048xbf16>
    %1 = linalg.fill ins(%cst : bf16) outs(%0 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %2 = linalg.matmul ins(%arg0, %arg1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%1 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    util.return %2 : tensor<2048x2048xbf16>
  }
}


// -----// IR Dump Before mlir::iree_compiler::IREE::ABI::WrapEntryPointsPass (iree-abi-wrap-entry-points) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_large(%arg0: tensor<2048x2048xbf16>, %arg1: tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16> {
    %cst = arith.constant 0.000000e+00 : bf16
    %0 = tensor.empty() : tensor<2048x2048xbf16>
    %1 = linalg.fill ins(%cst : bf16) outs(%0 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %2 = linalg.matmul ins(%arg0, %arg1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%1 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    util.return %2 : tensor<2048x2048xbf16>
  }
}


// -----// IR Dump Before Inliner (inline) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %2 = util.call @_matmul_large(%0, %1) : (tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %3 = hal.tensor.export %2 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
  util.func private @_matmul_large(%arg0: tensor<2048x2048xbf16>, %arg1: tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16> {
    %cst = arith.constant 0.000000e+00 : bf16
    %0 = tensor.empty() : tensor<2048x2048xbf16>
    %1 = linalg.fill ins(%cst : bf16) outs(%0 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %2 = linalg.matmul ins(%arg0, %arg1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%1 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    util.return %2 : tensor<2048x2048xbf16>
  }
}


// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func private @_matmul_large(%arg0: tensor<2048x2048xbf16>, %arg1: tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16> {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = tensor.empty() : tensor<2048x2048xbf16>
  %1 = linalg.fill ins(%cst : bf16) outs(%0 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %2 = linalg.matmul ins(%arg0, %arg1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%1 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  util.return %2 : tensor<2048x2048xbf16>
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = util.call @_matmul_large(%0, %1) : (tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %3 = hal.tensor.export %2 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %3 : !hal.buffer_view
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %cst = arith.constant 0.000000e+00 : bf16
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before SymbolDCE (symbol-dce) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %cst = arith.constant 0.000000e+00 : bf16
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %2 = tensor.empty() : tensor<2048x2048xbf16>
    %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
    util.return %5 : !hal.buffer_view
  }
}


// -----// IR Dump Before DemoteF64ToF32 (iree-util-demote-f64-to-f32) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %cst = arith.constant 0.000000e+00 : bf16
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %2 = tensor.empty() : tensor<2048x2048xbf16>
    %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
    util.return %5 : !hal.buffer_view
  }
}


// -----// IR Dump Before RemoveZeroExtentTensors (iree-global-opt-remove-zero-extent-tensors) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before DetachElementwiseFromNamedOps (iree-global-opt-detach-elementwise-from-named-ops) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before LinalgNamedOpConversionPass (linalg-named-op-conversion) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before Convert1X1FilterConv2DToMatmul (iree-global-opt-convert-1x1-filter-conv2d-to-matmul) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before EraseUnusedLinalgOperands (iree-global-opt-erase-unused-linalg-operands) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %cst = arith.constant 0.000000e+00 : bf16
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %2 = tensor.empty() : tensor<2048x2048xbf16>
    %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
    util.return %5 : !hal.buffer_view
  }
}


// -----// IR Dump Before ExpandTensorShapes (iree-global-opt-expand-tensor-shapes) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %cst = arith.constant 0.000000e+00 : bf16
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %2 = tensor.empty() : tensor<2048x2048xbf16>
    %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
    util.return %5 : !hal.buffer_view
  }
}


// -----// IR Dump Before ConvertElementwiseToLinalgPass (convert-elementwise-to-linalg) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before RaiseSpecialOps (iree-global-opt-raise-special-ops) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before DecomposeConcat (iree-global-opt-decompose-concat) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before GeneralizeLinalgNamedOps (iree-global-opt-generalize-linalg-named-ops) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before FoldUnitExtentDimsPass (iree-flow-fold-unit-extent-dims) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before FuseDequantizationMatmul (iree-global-opt-fuse-dequantization-matmul) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before SetEncoding (iree-global-opt-set-encoding) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %cst = arith.constant 0.000000e+00 : bf16
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %2 = tensor.empty() : tensor<2048x2048xbf16>
    %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
    util.return %5 : !hal.buffer_view
  }
}


// -----// IR Dump Before MaterializeHomogeneousEncodings (iree-global-opt-materialize-homogeneous-encodings) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#map = affine_map<(d0, d1, d2) -> (d0, d2)>
#map1 = affine_map<(d0, d1, d2) -> (d2, d1)>
#map2 = affine_map<(d0, d1, d2) -> (d0, d1)>
#map3 = affine_map<()[s0, s1] -> (-s1 + (s1 ceildiv s0) * s0)>
#map4 = affine_map<()[s0] -> ((2048 ceildiv s0) * s0)>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c2048 = arith.constant 2048 : index
    %cst = arith.constant 0.000000e+00 : bf16
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %2:2 = iree_linalg_ext.upper_bound_tile_size tensor<2048x2048xbf16, #iree_linalg_ext.encoding<role =  LHS, element_types = [bf16, bf16, bf16], user_indexing_maps = [#map, #map1, #map2]>> -> index, index
    %3 = affine.apply #map3()[%2#0, %c2048]
    %4 = affine.apply #map3()[%2#1, %c2048]
    %padded = tensor.pad %0 low[0, 0] high[%3, %4] {
    ^bb0(%arg2: index, %arg3: index):
      tensor.yield %cst : bf16
    } : tensor<2048x2048xbf16> to tensor<?x?xbf16>
    %5 = iree_linalg_ext.set_encoding %padded : tensor<?x?xbf16> -> tensor<?x?xbf16, #iree_linalg_ext.encoding<role =  LHS, element_types = [bf16, bf16, bf16], original_type = tensor<2048x2048xbf16>, user_indexing_maps = [#map, #map1, #map2]>>
    %6:2 = iree_linalg_ext.upper_bound_tile_size tensor<2048x2048xbf16, #iree_linalg_ext.encoding<role =  RHS, element_types = [bf16, bf16, bf16], user_indexing_maps = [#map, #map1, #map2]>> -> index, index
    %7 = affine.apply #map3()[%6#0, %c2048]
    %8 = affine.apply #map3()[%6#1, %c2048]
    %padded_0 = tensor.pad %1 low[0, 0] high[%7, %8] {
    ^bb0(%arg2: index, %arg3: index):
      tensor.yield %cst : bf16
    } : tensor<2048x2048xbf16> to tensor<?x?xbf16>
    %9 = iree_linalg_ext.set_encoding %padded_0 : tensor<?x?xbf16> -> tensor<?x?xbf16, #iree_linalg_ext.encoding<role =  RHS, element_types = [bf16, bf16, bf16], original_type = tensor<2048x2048xbf16>, user_indexing_maps = [#map, #map1, #map2]>>
    %10:2 = iree_linalg_ext.upper_bound_tile_size tensor<2048x2048xbf16, #iree_linalg_ext.encoding<role =  RESULT, element_types = [bf16, bf16, bf16], user_indexing_maps = [#map, #map1, #map2]>> -> index, index
    %11 = affine.apply #map4()[%10#0]
    %12 = affine.apply #map4()[%10#1]
    %13 = tensor.empty(%11, %12) : tensor<?x?xbf16, #iree_linalg_ext.encoding<role =  RESULT, element_types = [bf16, bf16, bf16], original_type = tensor<2048x2048xbf16>, user_indexing_maps = [#map, #map1, #map2]>>
    %14 = linalg.fill ins(%cst : bf16) outs(%13 : tensor<?x?xbf16, #iree_linalg_ext.encoding<role =  RESULT, element_types = [bf16, bf16, bf16], original_type = tensor<2048x2048xbf16>, user_indexing_maps = [#map, #map1, #map2]>>) -> tensor<?x?xbf16, #iree_linalg_ext.encoding<role =  RESULT, element_types = [bf16, bf16, bf16], original_type = tensor<2048x2048xbf16>, user_indexing_maps = [#map, #map1, #map2]>>
    %15 = linalg.matmul ins(%5, %9 : tensor<?x?xbf16, #iree_linalg_ext.encoding<role =  LHS, element_types = [bf16, bf16, bf16], original_type = tensor<2048x2048xbf16>, user_indexing_maps = [#map, #map1, #map2]>>, tensor<?x?xbf16, #iree_linalg_ext.encoding<role =  RHS, element_types = [bf16, bf16, bf16], original_type = tensor<2048x2048xbf16>, user_indexing_maps = [#map, #map1, #map2]>>) outs(%14 : tensor<?x?xbf16, #iree_linalg_ext.encoding<role =  RESULT, element_types = [bf16, bf16, bf16], original_type = tensor<2048x2048xbf16>, user_indexing_maps = [#map, #map1, #map2]>>) -> tensor<?x?xbf16, #iree_linalg_ext.encoding<role =  RESULT, element_types = [bf16, bf16, bf16], original_type = tensor<2048x2048xbf16>, user_indexing_maps = [#map, #map1, #map2]>>
    %16 = iree_linalg_ext.unset_encoding %15 : tensor<?x?xbf16, #iree_linalg_ext.encoding<role =  RESULT, element_types = [bf16, bf16, bf16], original_type = tensor<2048x2048xbf16>, user_indexing_maps = [#map, #map1, #map2]>> -> tensor<?x?xbf16>
    %extracted_slice = tensor.extract_slice %16[0, 0] [2048, 2048] [1, 1] : tensor<?x?xbf16> to tensor<2048x2048xbf16>
    %17 = hal.tensor.export %extracted_slice "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
    util.return %17 : !hal.buffer_view
  }
}


// -----// IR Dump Before MaterializeEncodingIntoNop (iree-codegen-materialize-encoding-into-nop) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %c2048 = arith.constant 2048 : index
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2:2 = iree_linalg_ext.upper_bound_tile_size tensor<2048x2048xbf16, #iree_linalg_ext.encoding<role =  LHS, element_types = [bf16, bf16, bf16], user_indexing_maps = [affine_map<(d0, d1, d2) -> (d0, d2)>, affine_map<(d0, d1, d2) -> (d2, d1)>, affine_map<(d0, d1, d2) -> (d0, d1)>]>> -> index, index
  %3 = affine.apply affine_map<()[s0, s1] -> (-s1 + (s1 ceildiv s0) * s0)>()[%2#0, %c2048]
  %4 = affine.apply affine_map<()[s0, s1] -> (-s1 + (s1 ceildiv s0) * s0)>()[%2#1, %c2048]
  %padded = tensor.pad %0 low[0, 0] high[%3, %4] {
  ^bb0(%arg2: index, %arg3: index):
    tensor.yield %cst : bf16
  } : tensor<2048x2048xbf16> to tensor<?x?xbf16>
  %5 = iree_linalg_ext.set_encoding %padded : tensor<?x?xbf16> -> tensor<?x?xbf16, #iree_linalg_ext.encoding<role =  LHS, element_types = [bf16, bf16, bf16], original_type = tensor<2048x2048xbf16>, user_indexing_maps = [affine_map<(d0, d1, d2) -> (d0, d2)>, affine_map<(d0, d1, d2) -> (d2, d1)>, affine_map<(d0, d1, d2) -> (d0, d1)>]>>
  %6:2 = iree_linalg_ext.upper_bound_tile_size tensor<2048x2048xbf16, #iree_linalg_ext.encoding<role =  RHS, element_types = [bf16, bf16, bf16], user_indexing_maps = [affine_map<(d0, d1, d2) -> (d0, d2)>, affine_map<(d0, d1, d2) -> (d2, d1)>, affine_map<(d0, d1, d2) -> (d0, d1)>]>> -> index, index
  %7 = affine.apply affine_map<()[s0, s1] -> (-s1 + (s1 ceildiv s0) * s0)>()[%6#0, %c2048]
  %8 = affine.apply affine_map<()[s0, s1] -> (-s1 + (s1 ceildiv s0) * s0)>()[%6#1, %c2048]
  %padded_0 = tensor.pad %1 low[0, 0] high[%7, %8] {
  ^bb0(%arg2: index, %arg3: index):
    tensor.yield %cst : bf16
  } : tensor<2048x2048xbf16> to tensor<?x?xbf16>
  %9 = iree_linalg_ext.set_encoding %padded_0 : tensor<?x?xbf16> -> tensor<?x?xbf16, #iree_linalg_ext.encoding<role =  RHS, element_types = [bf16, bf16, bf16], original_type = tensor<2048x2048xbf16>, user_indexing_maps = [affine_map<(d0, d1, d2) -> (d0, d2)>, affine_map<(d0, d1, d2) -> (d2, d1)>, affine_map<(d0, d1, d2) -> (d0, d1)>]>>
  %10:2 = iree_linalg_ext.upper_bound_tile_size tensor<2048x2048xbf16, #iree_linalg_ext.encoding<role =  RESULT, element_types = [bf16, bf16, bf16], user_indexing_maps = [affine_map<(d0, d1, d2) -> (d0, d2)>, affine_map<(d0, d1, d2) -> (d2, d1)>, affine_map<(d0, d1, d2) -> (d0, d1)>]>> -> index, index
  %11 = affine.apply affine_map<()[s0] -> ((2048 ceildiv s0) * s0)>()[%10#0]
  %12 = affine.apply affine_map<()[s0] -> ((2048 ceildiv s0) * s0)>()[%10#1]
  %13 = tensor.empty(%11, %12) : tensor<?x?xbf16, #iree_linalg_ext.encoding<role =  RESULT, element_types = [bf16, bf16, bf16], original_type = tensor<2048x2048xbf16>, user_indexing_maps = [affine_map<(d0, d1, d2) -> (d0, d2)>, affine_map<(d0, d1, d2) -> (d2, d1)>, affine_map<(d0, d1, d2) -> (d0, d1)>]>>
  %14 = linalg.fill ins(%cst : bf16) outs(%13 : tensor<?x?xbf16, #iree_linalg_ext.encoding<role =  RESULT, element_types = [bf16, bf16, bf16], original_type = tensor<2048x2048xbf16>, user_indexing_maps = [affine_map<(d0, d1, d2) -> (d0, d2)>, affine_map<(d0, d1, d2) -> (d2, d1)>, affine_map<(d0, d1, d2) -> (d0, d1)>]>>) -> tensor<?x?xbf16, #iree_linalg_ext.encoding<role =  RESULT, element_types = [bf16, bf16, bf16], original_type = tensor<2048x2048xbf16>, user_indexing_maps = [affine_map<(d0, d1, d2) -> (d0, d2)>, affine_map<(d0, d1, d2) -> (d2, d1)>, affine_map<(d0, d1, d2) -> (d0, d1)>]>>
  %15 = linalg.matmul ins(%5, %9 : tensor<?x?xbf16, #iree_linalg_ext.encoding<role =  LHS, element_types = [bf16, bf16, bf16], original_type = tensor<2048x2048xbf16>, user_indexing_maps = [affine_map<(d0, d1, d2) -> (d0, d2)>, affine_map<(d0, d1, d2) -> (d2, d1)>, affine_map<(d0, d1, d2) -> (d0, d1)>]>>, tensor<?x?xbf16, #iree_linalg_ext.encoding<role =  RHS, element_types = [bf16, bf16, bf16], original_type = tensor<2048x2048xbf16>, user_indexing_maps = [affine_map<(d0, d1, d2) -> (d0, d2)>, affine_map<(d0, d1, d2) -> (d2, d1)>, affine_map<(d0, d1, d2) -> (d0, d1)>]>>) outs(%14 : tensor<?x?xbf16, #iree_linalg_ext.encoding<role =  RESULT, element_types = [bf16, bf16, bf16], original_type = tensor<2048x2048xbf16>, user_indexing_maps = [affine_map<(d0, d1, d2) -> (d0, d2)>, affine_map<(d0, d1, d2) -> (d2, d1)>, affine_map<(d0, d1, d2) -> (d0, d1)>]>>) -> tensor<?x?xbf16, #iree_linalg_ext.encoding<role =  RESULT, element_types = [bf16, bf16, bf16], original_type = tensor<2048x2048xbf16>, user_indexing_maps = [affine_map<(d0, d1, d2) -> (d0, d2)>, affine_map<(d0, d1, d2) -> (d2, d1)>, affine_map<(d0, d1, d2) -> (d0, d1)>]>>
  %16 = iree_linalg_ext.unset_encoding %15 : tensor<?x?xbf16, #iree_linalg_ext.encoding<role =  RESULT, element_types = [bf16, bf16, bf16], original_type = tensor<2048x2048xbf16>, user_indexing_maps = [affine_map<(d0, d1, d2) -> (d0, d2)>, affine_map<(d0, d1, d2) -> (d2, d1)>, affine_map<(d0, d1, d2) -> (d0, d1)>]>> -> tensor<?x?xbf16>
  %extracted_slice = tensor.extract_slice %16[0, 0] [2048, 2048] [1, 1] : tensor<?x?xbf16> to tensor<2048x2048xbf16>
  %17 = hal.tensor.export %extracted_slice "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %17 : !hal.buffer_view
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %c2048 = arith.constant 2048 : index
  %c0 = arith.constant 0 : index
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %padded = tensor.pad %0 low[0, 0] high[%c0, %c0] {
  ^bb0(%arg2: index, %arg3: index):
    tensor.yield %cst : bf16
  } : tensor<2048x2048xbf16> to tensor<?x?xbf16>
  %padded_0 = tensor.pad %1 low[0, 0] high[%c0, %c0] {
  ^bb0(%arg2: index, %arg3: index):
    tensor.yield %cst : bf16
  } : tensor<2048x2048xbf16> to tensor<?x?xbf16>
  %2 = tensor.empty(%c2048, %c2048) : tensor<?x?xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<?x?xbf16>) -> tensor<?x?xbf16>
  %4 = linalg.matmul ins(%padded, %padded_0 : tensor<?x?xbf16>, tensor<?x?xbf16>) outs(%3 : tensor<?x?xbf16>) -> tensor<?x?xbf16>
  %extracted_slice = tensor.extract_slice %4[0, 0] [2048, 2048] [1, 1] : tensor<?x?xbf16> to tensor<2048x2048xbf16>
  %5 = hal.tensor.export %extracted_slice "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %cst = arith.constant 0.000000e+00 : bf16
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %2 = tensor.empty() : tensor<2048x2048xbf16>
    %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
    util.return %5 : !hal.buffer_view
  }
}


// -----// IR Dump Before CSE (cse) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %cst = arith.constant 0.000000e+00 : bf16
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %2 = tensor.empty() : tensor<2048x2048xbf16>
    %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
    util.return %5 : !hal.buffer_view
  }
}


// -----// IR Dump Before SimplifyPackUnpack (iree-global-opt-simplify-pack-unpack) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %cst = arith.constant 0.000000e+00 : bf16
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %2 = tensor.empty() : tensor<2048x2048xbf16>
    %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
    util.return %5 : !hal.buffer_view
  }
}


// -----// IR Dump Before DataLayoutPropagation (iree-global-opt-data-layout-propagation) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before GeneralizeLinalgNamedOps (iree-global-opt-generalize-linalg-named-ops) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before GlobalLoopInvariantCodeMotion (iree-global-opt-loop-invariant-code-motion) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before SimplifyGlobalAccesses (iree-util-simplify-global-accesses) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before ApplyPatterns (iree-util-apply-patterns) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %cst = arith.constant 0.000000e+00 : bf16
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %2 = tensor.empty() : tensor<2048x2048xbf16>
    %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
    util.return %5 : !hal.buffer_view
  }
}


// -----// IR Dump Before FoldGlobals (iree-util-fold-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %cst = arith.constant 0.000000e+00 : bf16
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %2 = tensor.empty() : tensor<2048x2048xbf16>
    %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
    util.return %5 : !hal.buffer_view
  }
}


// -----// IR Dump Before IPO (iree-util-ipo) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %cst = arith.constant 0.000000e+00 : bf16
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %2 = tensor.empty() : tensor<2048x2048xbf16>
    %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
    util.return %5 : !hal.buffer_view
  }
}


// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %cst = arith.constant 0.000000e+00 : bf16
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %2 = tensor.empty() : tensor<2048x2048xbf16>
    %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
    util.return %5 : !hal.buffer_view
  }
}


// -----// IR Dump Before CSE (cse) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %cst = arith.constant 0.000000e+00 : bf16
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %2 = tensor.empty() : tensor<2048x2048xbf16>
    %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
    util.return %5 : !hal.buffer_view
  }
}


// -----// IR Dump Before HoistIntoGlobals (iree-util-hoist-into-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %cst = arith.constant 0.000000e+00 : bf16
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %2 = tensor.empty() : tensor<2048x2048xbf16>
    %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
    util.return %5 : !hal.buffer_view
  }
}


// -----// IR Dump Before JitGlobals (iree-consteval-jit-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %cst = arith.constant 0.000000e+00 : bf16
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %2 = tensor.empty() : tensor<2048x2048xbf16>
    %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
    util.return %5 : !hal.buffer_view
  }
}


// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before RaiseSpecialOps (iree-global-opt-raise-special-ops) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before VerifyInputLegalityPass (iree-verify-input-legality) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %cst = arith.constant 0.000000e+00 : bf16
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %2 = tensor.empty() : tensor<2048x2048xbf16>
    %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
    util.return %5 : !hal.buffer_view
  }
}


// -----// IR Dump Before InjectTensorTracingPass (iree-flow-inject-tensor-tracing) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before TensorPadToTensorInsertSlicePass (iree-flow-tensor-pad-to-tensor-insert-slice) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %cst = arith.constant 0.000000e+00 : bf16
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %2 = tensor.empty() : tensor<2048x2048xbf16>
    %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
    util.return %5 : !hal.buffer_view
  }
}


// -----// IR Dump Before FusionPreprocessingPass (iree-flow-fusion-preprocessing) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before ElementwiseOpFusionPass (iree-flow-elementwise-op-fusion) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before BubbleUpExpandShapesPass (iree-flow-bubble-up-expand-shapes) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before ElementwiseOpFusionPass (iree-flow-elementwise-op-fusion) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before SinkReshapesPass (iree-flow-sink-reshapes) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before FusionOfTensorOpsPass (iree-flow-fusion-of-tensor-ops) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before SplitReductionPass (iree-flow-split-reduction-ops) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before FusionPreprocessingPass (iree-flow-fusion-preprocessing) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before InterchangeTransposeGenericOpsPass (iree-flow-interchange-transpose-generic-ops) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before FormScalarDispatchesPass (iree-flow-form-scalar-dispatches) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before FormDispatchRegionsPass (iree-flow-form-dispatch-regions) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before CloneProducersIntoDispatchRegionsPass (iree-flow-clone-producers-into-dispatch-regions) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.region -> (tensor<2048x2048xbf16>) {
    %6 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    flow.return %6 : tensor<2048x2048xbf16>
  }
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before CollapseDimensionsPass (iree-flow-collapse-dimensions) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.region -> (tensor<2048x2048xbf16>) {
    %6 = tensor.empty() : tensor<2048x2048xbf16>
    %cst_0 = arith.constant 0.000000e+00 : bf16
    %7 = linalg.fill ins(%cst_0 : bf16) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %8 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%7 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    flow.return %8 : tensor<2048x2048xbf16>
  }
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before FormDispatchWorkgroupsPass (iree-flow-form-dispatch-workgroups) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = tensor.empty() : tensor<2048x2048xbf16>
  %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.region -> (tensor<2048x2048xbf16>) {
    %6 = tensor.empty() : tensor<2048x2048xbf16>
    %cst_0 = arith.constant 0.000000e+00 : bf16
    %7 = linalg.fill ins(%cst_0 : bf16) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %8 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%7 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    flow.return %8 : tensor<2048x2048xbf16>
  }
  %5 = hal.tensor.export %4 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before CaptureDynamicDimsPass (iree-flow-capture-dynamic-dims) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = flow.dispatch.workgroups(%0, %1) : (tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16> =
      (%arg2: !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>, %arg3: !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>, %arg4: !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>) {
    %cst = arith.constant 0.000000e+00 : bf16
    %4 = flow.dispatch.tensor.load %arg2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
    %5 = flow.dispatch.tensor.load %arg3, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
    %6 = tensor.empty() : tensor<2048x2048xbf16>
    %7 = linalg.fill ins(%cst : bf16) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %8 = linalg.matmul ins(%4, %5 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%7 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    flow.dispatch.tensor.store %8, %arg4, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
    flow.return
  } count() -> (index, index, index) {
    %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
    flow.return %x, %y, %z : index, index, index
  }
  %3 = hal.tensor.export %2 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %3 : !hal.buffer_view
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = flow.dispatch.workgroups(%0, %1) : (tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16> =
      (%arg2: !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>, %arg3: !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>, %arg4: !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>) {
    %cst = arith.constant 0.000000e+00 : bf16
    %4 = flow.dispatch.tensor.load %arg2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
    %5 = flow.dispatch.tensor.load %arg3, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
    %6 = tensor.empty() : tensor<2048x2048xbf16>
    %7 = linalg.fill ins(%cst : bf16) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %8 = linalg.matmul ins(%4, %5 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%7 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    flow.dispatch.tensor.store %8, %arg4, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
    flow.return
  } count() -> (index, index, index) {
    %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
    flow.return %x, %y, %z : index, index, index
  }
  %3 = hal.tensor.export %2 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %3 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = flow.dispatch.workgroups(%0, %1) : (tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16> =
      (%arg2: !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>, %arg3: !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>, %arg4: !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>) {
    %cst = arith.constant 0.000000e+00 : bf16
    %4 = flow.dispatch.tensor.load %arg2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
    %5 = flow.dispatch.tensor.load %arg3, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
    %6 = tensor.empty() : tensor<2048x2048xbf16>
    %7 = linalg.fill ins(%cst : bf16) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %8 = linalg.matmul ins(%4, %5 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%7 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    flow.dispatch.tensor.store %8, %arg4, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
    flow.return
  } count() -> (index, index, index) {
    %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
    flow.return %x, %y, %z : index, index, index
  }
  %3 = hal.tensor.export %2 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %3 : !hal.buffer_view
}

// -----// IR Dump Before InitializeEmptyTensorsPass (iree-flow-initialize-empty-tensors) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = flow.dispatch.workgroups(%0, %1) : (tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16> =
      (%arg2: !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>, %arg3: !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>, %arg4: !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>) {
    %cst = arith.constant 0.000000e+00 : bf16
    %4 = flow.dispatch.tensor.load %arg2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
    %5 = flow.dispatch.tensor.load %arg3, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
    %6 = tensor.empty() : tensor<2048x2048xbf16>
    %7 = linalg.fill ins(%cst : bf16) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %8 = linalg.matmul ins(%4, %5 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%7 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    flow.dispatch.tensor.store %8, %arg4, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
    flow.return
  } count() -> (index, index, index) {
    %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
    flow.return %x, %y, %z : index, index, index
  }
  %3 = hal.tensor.export %2 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %3 : !hal.buffer_view
}

// -----// IR Dump Before OutlineDispatchExternsPass (iree-flow-outline-dispatch-externs) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %2 = flow.dispatch.workgroups(%0, %1) : (tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16> =
        (%arg2: !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>, %arg3: !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>, %arg4: !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>) {
      %cst = arith.constant 0.000000e+00 : bf16
      %4 = flow.dispatch.tensor.load %arg2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
      %5 = flow.dispatch.tensor.load %arg3, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
      %6 = tensor.empty() : tensor<2048x2048xbf16>
      %7 = linalg.fill ins(%cst : bf16) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
      %8 = linalg.matmul ins(%4, %5 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%7 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
      flow.dispatch.tensor.store %8, %arg4, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
      flow.return
    } count() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      flow.return %x, %y, %z : index, index, index
    }
    %3 = hal.tensor.export %2 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before OutlineDispatchRegionsPass (iree-flow-outline-dispatch-regions) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %2 = flow.dispatch.workgroups(%0, %1) : (tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16> =
        (%arg2: !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>, %arg3: !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>, %arg4: !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>) {
      %cst = arith.constant 0.000000e+00 : bf16
      %4 = flow.dispatch.tensor.load %arg2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
      %5 = flow.dispatch.tensor.load %arg3, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
      %6 = tensor.empty() : tensor<2048x2048xbf16>
      %7 = linalg.fill ins(%cst : bf16) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
      %8 = linalg.matmul ins(%4, %5 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%7 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
      flow.dispatch.tensor.store %8, %arg4, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
      flow.return
    } count() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      flow.return %x, %y, %z : index, index, index
    }
    %3 = hal.tensor.export %2 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before AnnotateDispatchesPass (iree-flow-annotate-dispatches) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  flow.executable private @matmul_large_dispatch_0 {
    flow.executable.export public @matmul_large_dispatch_0 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      flow.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0(%arg0: !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>, %arg1: !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>, %arg2: !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>) {
        %cst = arith.constant 0.000000e+00 : bf16
        %0 = flow.dispatch.tensor.load %arg0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %1 = flow.dispatch.tensor.load %arg1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %2 = tensor.empty() : tensor<2048x2048xbf16>
        %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %4, %arg2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %2 = flow.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0(%0, %1) : (tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %3 = hal.tensor.export %2 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before StripDebugOps (iree-util-strip-debug-ops) //----- //
flow.executable private @matmul_large_dispatch_0 {
  flow.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
    %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
    flow.return %x, %y, %z : index, index, index
  }
  builtin.module {
    func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>, %arg1: !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>, %arg2: !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>) {
      %cst = arith.constant 0.000000e+00 : bf16
      %0 = flow.dispatch.tensor.load %arg0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
      %1 = flow.dispatch.tensor.load %arg1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
      %2 = tensor.empty() : tensor<2048x2048xbf16>
      %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
      %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
      flow.dispatch.tensor.store %4, %arg2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
      return
    }
  }
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = flow.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%0, %1) : (tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %3 = hal.tensor.export %2 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %3 : !hal.buffer_view
}

// -----// IR Dump Before DeduplicateExecutablesPass (iree-flow-deduplicate-executables) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  flow.executable private @matmul_large_dispatch_0 {
    flow.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      flow.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>, %arg1: !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>, %arg2: !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>) {
        %cst = arith.constant 0.000000e+00 : bf16
        %0 = flow.dispatch.tensor.load %arg0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %1 = flow.dispatch.tensor.load %arg1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %2 = tensor.empty() : tensor<2048x2048xbf16>
        %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %4, %arg2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %2 = flow.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%0, %1) : (tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %3 = hal.tensor.export %2 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before InjectTensorTracingPass (iree-flow-inject-tensor-tracing) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = flow.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%0, %1) : (tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %3 = hal.tensor.export %2 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %3 : !hal.buffer_view
}

// -----// IR Dump Before CleanupTensorShapesPass (iree-flow-cleanup-tensor-shapes) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = flow.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%0, %1) : (tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %3 = hal.tensor.export %2 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %3 : !hal.buffer_view
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = flow.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%0, %1) : (tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %3 = hal.tensor.export %2 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %3 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = flow.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%0, %1) : (tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %3 = hal.tensor.export %2 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %3 : !hal.buffer_view
}

// -----// IR Dump Before SymbolDCE (symbol-dce) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  flow.executable private @matmul_large_dispatch_0 {
    flow.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      flow.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>, %arg1: !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>, %arg2: !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>) {
        %cst = arith.constant 0.000000e+00 : bf16
        %0 = flow.dispatch.tensor.load %arg0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %1 = flow.dispatch.tensor.load %arg1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %2 = tensor.empty() : tensor<2048x2048xbf16>
        %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %4, %arg2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %2 = flow.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%0, %1) : (tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %3 = hal.tensor.export %2 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before VerifyInputPass (iree-stream-verify-input) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  flow.executable private @matmul_large_dispatch_0 {
    flow.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      flow.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>, %arg1: !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>, %arg2: !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>) {
        %cst = arith.constant 0.000000e+00 : bf16
        %0 = flow.dispatch.tensor.load %arg0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %1 = flow.dispatch.tensor.load %arg1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %2 = tensor.empty() : tensor<2048x2048xbf16>
        %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %4, %arg2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %2 = flow.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%0, %1) : (tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %3 = hal.tensor.export %2 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = flow.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%0, %1) : (tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %3 = hal.tensor.export %2 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %3 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = flow.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%0, %1) : (tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %3 = hal.tensor.export %2 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %3 : !hal.buffer_view
}

// -----// IR Dump Before SimplifyGlobalAccesses (iree-util-simplify-global-accesses) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = flow.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%0, %1) : (tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %3 = hal.tensor.export %2 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %3 : !hal.buffer_view
}

// -----// IR Dump Before ApplyPatterns (iree-util-apply-patterns) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  flow.executable private @matmul_large_dispatch_0 {
    flow.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      flow.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>, %arg1: !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>, %arg2: !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>) {
        %cst = arith.constant 0.000000e+00 : bf16
        %0 = flow.dispatch.tensor.load %arg0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %1 = flow.dispatch.tensor.load %arg1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %2 = tensor.empty() : tensor<2048x2048xbf16>
        %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %4, %arg2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %2 = flow.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%0, %1) : (tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %3 = hal.tensor.export %2 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before FoldGlobals (iree-util-fold-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  flow.executable private @matmul_large_dispatch_0 {
    flow.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      flow.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>, %arg1: !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>, %arg2: !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>) {
        %cst = arith.constant 0.000000e+00 : bf16
        %0 = flow.dispatch.tensor.load %arg0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %1 = flow.dispatch.tensor.load %arg1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %2 = tensor.empty() : tensor<2048x2048xbf16>
        %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %4, %arg2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %2 = flow.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%0, %1) : (tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %3 = hal.tensor.export %2 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before FuseGlobals (iree-util-fuse-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  flow.executable private @matmul_large_dispatch_0 {
    flow.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      flow.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>, %arg1: !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>, %arg2: !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>) {
        %cst = arith.constant 0.000000e+00 : bf16
        %0 = flow.dispatch.tensor.load %arg0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %1 = flow.dispatch.tensor.load %arg1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %2 = tensor.empty() : tensor<2048x2048xbf16>
        %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %4, %arg2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %2 = flow.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%0, %1) : (tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %3 = hal.tensor.export %2 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before IPO (iree-util-ipo) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  flow.executable private @matmul_large_dispatch_0 {
    flow.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      flow.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>, %arg1: !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>, %arg2: !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>) {
        %cst = arith.constant 0.000000e+00 : bf16
        %0 = flow.dispatch.tensor.load %arg0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %1 = flow.dispatch.tensor.load %arg1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %2 = tensor.empty() : tensor<2048x2048xbf16>
        %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %4, %arg2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %2 = flow.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%0, %1) : (tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %3 = hal.tensor.export %2 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before OutlineConstants (iree-util-outline-constants) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  flow.executable private @matmul_large_dispatch_0 {
    flow.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      flow.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>, %arg1: !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>, %arg2: !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>) {
        %cst = arith.constant 0.000000e+00 : bf16
        %0 = flow.dispatch.tensor.load %arg0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %1 = flow.dispatch.tensor.load %arg1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %2 = tensor.empty() : tensor<2048x2048xbf16>
        %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %4, %arg2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %2 = flow.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%0, %1) : (tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %3 = hal.tensor.export %2 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = flow.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%0, %1) : (tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %3 = hal.tensor.export %2 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %3 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = flow.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%0, %1) : (tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %3 = hal.tensor.export %2 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %3 : !hal.buffer_view
}

// -----// IR Dump Before SimplifyGlobalAccesses (iree-util-simplify-global-accesses) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
  %2 = flow.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%0, %1) : (tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %3 = hal.tensor.export %2 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
  util.return %3 : !hal.buffer_view
}

// -----// IR Dump Before ApplyPatterns (iree-util-apply-patterns) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  flow.executable private @matmul_large_dispatch_0 {
    flow.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      flow.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>, %arg1: !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>, %arg2: !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>) {
        %cst = arith.constant 0.000000e+00 : bf16
        %0 = flow.dispatch.tensor.load %arg0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %1 = flow.dispatch.tensor.load %arg1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %2 = tensor.empty() : tensor<2048x2048xbf16>
        %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %4, %arg2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %2 = flow.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%0, %1) : (tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %3 = hal.tensor.export %2 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before FoldGlobals (iree-util-fold-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  flow.executable private @matmul_large_dispatch_0 {
    flow.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      flow.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>, %arg1: !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>, %arg2: !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>) {
        %cst = arith.constant 0.000000e+00 : bf16
        %0 = flow.dispatch.tensor.load %arg0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %1 = flow.dispatch.tensor.load %arg1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %2 = tensor.empty() : tensor<2048x2048xbf16>
        %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %4, %arg2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %2 = flow.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%0, %1) : (tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %3 = hal.tensor.export %2 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before FuseGlobals (iree-util-fuse-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  flow.executable private @matmul_large_dispatch_0 {
    flow.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      flow.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>, %arg1: !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>, %arg2: !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>) {
        %cst = arith.constant 0.000000e+00 : bf16
        %0 = flow.dispatch.tensor.load %arg0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %1 = flow.dispatch.tensor.load %arg1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %2 = tensor.empty() : tensor<2048x2048xbf16>
        %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %4, %arg2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %2 = flow.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%0, %1) : (tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %3 = hal.tensor.export %2 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before IPO (iree-util-ipo) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  flow.executable private @matmul_large_dispatch_0 {
    flow.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      flow.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>, %arg1: !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>, %arg2: !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>) {
        %cst = arith.constant 0.000000e+00 : bf16
        %0 = flow.dispatch.tensor.load %arg0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %1 = flow.dispatch.tensor.load %arg1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %2 = tensor.empty() : tensor<2048x2048xbf16>
        %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %4, %arg2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %2 = flow.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%0, %1) : (tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %3 = hal.tensor.export %2 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before ConvertToStreamPass (iree-stream-conversion) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  flow.executable private @matmul_large_dispatch_0 {
    flow.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      flow.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>, %arg1: !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>, %arg2: !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>) {
        %cst = arith.constant 0.000000e+00 : bf16
        %0 = flow.dispatch.tensor.load %arg0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %1 = flow.dispatch.tensor.load %arg1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %2 = tensor.empty() : tensor<2048x2048xbf16>
        %3 = linalg.fill ins(%cst : bf16) outs(%2 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %4 = linalg.matmul ins(%0, %1 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%3 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %4, %arg2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<2048x2048xbf16>
    %2 = flow.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%0, %1) : (tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %3 = hal.tensor.export %2 "output0" : tensor<2048x2048xbf16> -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before VerifyLoweringToTensorsPass (iree-stream-verify-lowering-to-tensors) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %cst = arith.constant 0.000000e+00 : bf16
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    %c2048 = arith.constant 2048 : index
    %c2048_0 = arith.constant 2048 : index
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048_0]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.sizeof tensor<2048x2048xbf16> : index
    %1 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%0}
    %2 = stream.async.transfer %1 : !stream.resource<external>{%0} -> !stream.resource<*>{%0}
    %element_type_bf16_1 = hal.element_type<bf16> : i32
    %dense_row_major_2 = hal.encoding_type<dense_row_major> : i32
    %c2048_3 = arith.constant 2048 : index
    %c2048_4 = arith.constant 2048 : index
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048_3, %c2048_4]) type(%element_type_bf16_1) encoding(%dense_row_major_2)
    %3 = stream.tensor.sizeof tensor<2048x2048xbf16> : index
    %4 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%3}
    %5 = stream.async.transfer %4 : !stream.resource<external>{%3} -> !stream.resource<*>{%3}
    %c0 = arith.constant 0 : index
    %6 = stream.tensor.sizeof tensor<2048x2048xbf16> : index
    %7 = stream.async.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%2[%c0 to %0 for %0], %5[%c0 to %3 for %3]) : (!stream.resource<*>{%0}, !stream.resource<*>{%3}) -> !stream.resource<*>{%6}
    %8 = stream.async.transfer %7 : !stream.resource<*>{%6} -> !stream.resource<external>{%6}
    %9 = stream.tensor.export %8 : tensor<2048x2048xbf16> in !stream.resource<external>{%6} -> !hal.buffer_view
    util.return %9 : !hal.buffer_view
  }
}


// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  %c2048 = arith.constant 2048 : index
  %c2048_0 = arith.constant 2048 : index
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048_0]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.sizeof tensor<2048x2048xbf16> : index
  %1 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%0}
  %2 = stream.async.transfer %1 : !stream.resource<external>{%0} -> !stream.resource<*>{%0}
  %element_type_bf16_1 = hal.element_type<bf16> : i32
  %dense_row_major_2 = hal.encoding_type<dense_row_major> : i32
  %c2048_3 = arith.constant 2048 : index
  %c2048_4 = arith.constant 2048 : index
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048_3, %c2048_4]) type(%element_type_bf16_1) encoding(%dense_row_major_2)
  %3 = stream.tensor.sizeof tensor<2048x2048xbf16> : index
  %4 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%3}
  %5 = stream.async.transfer %4 : !stream.resource<external>{%3} -> !stream.resource<*>{%3}
  %c0 = arith.constant 0 : index
  %6 = stream.tensor.sizeof tensor<2048x2048xbf16> : index
  %7 = stream.async.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%2[%c0 to %0 for %0], %5[%c0 to %3 for %3]) : (!stream.resource<*>{%0}, !stream.resource<*>{%3}) -> !stream.resource<*>{%6}
  %8 = stream.async.transfer %7 : !stream.resource<*>{%6} -> !stream.resource<external>{%6}
  %9 = stream.tensor.export %8 : tensor<2048x2048xbf16> in !stream.resource<external>{%6} -> !hal.buffer_view
  util.return %9 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %c0 = arith.constant 0 : index
  %c2048 = arith.constant 2048 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.sizeof tensor<2048x2048xbf16> : index
  %1 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%0}
  %2 = stream.async.transfer %1 : !stream.resource<external>{%0} -> !stream.resource<*>{%0}
  %element_type_bf16_0 = hal.element_type<bf16> : i32
  %dense_row_major_1 = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16_0) encoding(%dense_row_major_1)
  %3 = stream.tensor.sizeof tensor<2048x2048xbf16> : index
  %4 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%3}
  %5 = stream.async.transfer %4 : !stream.resource<external>{%3} -> !stream.resource<*>{%3}
  %6 = stream.tensor.sizeof tensor<2048x2048xbf16> : index
  %7 = stream.async.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%2[%c0 to %0 for %0], %5[%c0 to %3 for %3]) : (!stream.resource<*>{%0}, !stream.resource<*>{%3}) -> !stream.resource<*>{%6}
  %8 = stream.async.transfer %7 : !stream.resource<*>{%6} -> !stream.resource<external>{%6}
  %9 = stream.tensor.export %8 : tensor<2048x2048xbf16> in !stream.resource<external>{%6} -> !hal.buffer_view
  util.return %9 : !hal.buffer_view
}

// -----// IR Dump Before SimplifyGlobalAccesses (iree-util-simplify-global-accesses) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %c0 = arith.constant 0 : index
  %c2048 = arith.constant 2048 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.sizeof tensor<2048x2048xbf16> : index
  %1 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%0}
  %2 = stream.async.transfer %1 : !stream.resource<external>{%0} -> !stream.resource<*>{%0}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %3 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%0}
  %4 = stream.async.transfer %3 : !stream.resource<external>{%0} -> !stream.resource<*>{%0}
  %5 = stream.async.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%2[%c0 to %0 for %0], %4[%c0 to %0 for %0]) : (!stream.resource<*>{%0}, !stream.resource<*>{%0}) -> !stream.resource<*>{%0}
  %6 = stream.async.transfer %5 : !stream.resource<*>{%0} -> !stream.resource<external>{%0}
  %7 = stream.tensor.export %6 : tensor<2048x2048xbf16> in !stream.resource<external>{%0} -> !hal.buffer_view
  util.return %7 : !hal.buffer_view
}

// -----// IR Dump Before ApplyPatterns (iree-util-apply-patterns) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %cst = arith.constant 0.000000e+00 : bf16
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.sizeof tensor<2048x2048xbf16> : index
    %1 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%0}
    %2 = stream.async.transfer %1 : !stream.resource<external>{%0} -> !stream.resource<*>{%0}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %3 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%0}
    %4 = stream.async.transfer %3 : !stream.resource<external>{%0} -> !stream.resource<*>{%0}
    %5 = stream.async.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%2[%c0 to %0 for %0], %4[%c0 to %0 for %0]) : (!stream.resource<*>{%0}, !stream.resource<*>{%0}) -> !stream.resource<*>{%0}
    %6 = stream.async.transfer %5 : !stream.resource<*>{%0} -> !stream.resource<external>{%0}
    %7 = stream.tensor.export %6 : tensor<2048x2048xbf16> in !stream.resource<external>{%0} -> !hal.buffer_view
    util.return %7 : !hal.buffer_view
  }
}


// -----// IR Dump Before FoldGlobals (iree-util-fold-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.sizeof tensor<2048x2048xbf16> : index
    %1 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%0}
    %2 = stream.async.transfer %1 : !stream.resource<external>{%0} -> !stream.resource<*>{%0}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %3 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%0}
    %4 = stream.async.transfer %3 : !stream.resource<external>{%0} -> !stream.resource<*>{%0}
    %5 = stream.async.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%2[%c0 to %0 for %0], %4[%c0 to %0 for %0]) : (!stream.resource<*>{%0}, !stream.resource<*>{%0}) -> !stream.resource<*>{%0}
    %6 = stream.async.transfer %5 : !stream.resource<*>{%0} -> !stream.resource<external>{%0}
    %7 = stream.tensor.export %6 : tensor<2048x2048xbf16> in !stream.resource<external>{%0} -> !hal.buffer_view
    util.return %7 : !hal.buffer_view
  }
}


// -----// IR Dump Before FuseGlobals (iree-util-fuse-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.sizeof tensor<2048x2048xbf16> : index
    %1 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%0}
    %2 = stream.async.transfer %1 : !stream.resource<external>{%0} -> !stream.resource<*>{%0}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %3 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%0}
    %4 = stream.async.transfer %3 : !stream.resource<external>{%0} -> !stream.resource<*>{%0}
    %5 = stream.async.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%2[%c0 to %0 for %0], %4[%c0 to %0 for %0]) : (!stream.resource<*>{%0}, !stream.resource<*>{%0}) -> !stream.resource<*>{%0}
    %6 = stream.async.transfer %5 : !stream.resource<*>{%0} -> !stream.resource<external>{%0}
    %7 = stream.tensor.export %6 : tensor<2048x2048xbf16> in !stream.resource<external>{%0} -> !hal.buffer_view
    util.return %7 : !hal.buffer_view
  }
}


// -----// IR Dump Before IPO (iree-util-ipo) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.sizeof tensor<2048x2048xbf16> : index
    %1 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%0}
    %2 = stream.async.transfer %1 : !stream.resource<external>{%0} -> !stream.resource<*>{%0}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %3 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%0}
    %4 = stream.async.transfer %3 : !stream.resource<external>{%0} -> !stream.resource<*>{%0}
    %5 = stream.async.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%2[%c0 to %0 for %0], %4[%c0 to %0 for %0]) : (!stream.resource<*>{%0}, !stream.resource<*>{%0}) -> !stream.resource<*>{%0}
    %6 = stream.async.transfer %5 : !stream.resource<*>{%0} -> !stream.resource<external>{%0}
    %7 = stream.tensor.export %6 : tensor<2048x2048xbf16> in !stream.resource<external>{%0} -> !hal.buffer_view
    util.return %7 : !hal.buffer_view
  }
}


// -----// IR Dump Before CombineInitializers (iree-util-combine-initializers) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.sizeof tensor<2048x2048xbf16> : index
    %1 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%0}
    %2 = stream.async.transfer %1 : !stream.resource<external>{%0} -> !stream.resource<*>{%0}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %3 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%0}
    %4 = stream.async.transfer %3 : !stream.resource<external>{%0} -> !stream.resource<*>{%0}
    %5 = stream.async.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%2[%c0 to %0 for %0], %4[%c0 to %0 for %0]) : (!stream.resource<*>{%0}, !stream.resource<*>{%0}) -> !stream.resource<*>{%0}
    %6 = stream.async.transfer %5 : !stream.resource<*>{%0} -> !stream.resource<external>{%0}
    %7 = stream.tensor.export %6 : tensor<2048x2048xbf16> in !stream.resource<external>{%0} -> !hal.buffer_view
    util.return %7 : !hal.buffer_view
  }
}


// -----// IR Dump Before EncodeDeviceTensorsPass (iree-stream-encode-device-tensors) //----- //
stream.executable private @matmul_large_dispatch_0 {
  stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
    %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
    stream.return %x, %y, %z : index, index, index
  }
  builtin.module {
    func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
      %cst = arith.constant 0.000000e+00 : bf16
      %c0 = arith.constant 0 : index
      %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
      %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
      %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
      %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
      %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
      %5 = tensor.empty() : tensor<2048x2048xbf16>
      %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
      %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
      flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
      return
    }
  }
}

// -----// IR Dump Before EncodeHostTensorsPass (iree-stream-encode-host-tensors) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %c0 = arith.constant 0 : index
  %c2048 = arith.constant 2048 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.sizeof tensor<2048x2048xbf16> : index
  %1 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%0}
  %2 = stream.async.transfer %1 : !stream.resource<external>{%0} -> !stream.resource<*>{%0}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %3 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%0}
  %4 = stream.async.transfer %3 : !stream.resource<external>{%0} -> !stream.resource<*>{%0}
  %5 = stream.async.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%2[%c0 to %0 for %0], %4[%c0 to %0 for %0]) : (!stream.resource<*>{%0}, !stream.resource<*>{%0}) -> !stream.resource<*>{%0}
  %6 = stream.async.transfer %5 : !stream.resource<*>{%0} -> !stream.resource<external>{%0}
  %7 = stream.tensor.export %6 : tensor<2048x2048xbf16> in !stream.resource<external>{%0} -> !hal.buffer_view
  util.return %7 : !hal.buffer_view
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %c8388608 = arith.constant 8388608 : index
  %c0 = arith.constant 0 : index
  %c2048 = arith.constant 2048 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  %1 = stream.async.transfer %0 : !stream.resource<external>{%c8388608} -> !stream.resource<*>{%c8388608}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %2 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  %3 = stream.async.transfer %2 : !stream.resource<external>{%c8388608} -> !stream.resource<*>{%c8388608}
  %4 = stream.async.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%1[%c0 to %c8388608 for %c8388608], %3[%c0 to %c8388608 for %c8388608]) : (!stream.resource<*>{%c8388608}, !stream.resource<*>{%c8388608}) -> !stream.resource<*>{%c8388608}
  %5 = stream.async.transfer %4 : !stream.resource<*>{%c8388608} -> !stream.resource<external>{%c8388608}
  %6 = stream.tensor.export %5 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
  util.return %6 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %c8388608 = arith.constant 8388608 : index
  %c0 = arith.constant 0 : index
  %c2048 = arith.constant 2048 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  %1 = stream.async.transfer %0 : !stream.resource<external>{%c8388608} -> !stream.resource<*>{%c8388608}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %2 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  %3 = stream.async.transfer %2 : !stream.resource<external>{%c8388608} -> !stream.resource<*>{%c8388608}
  %4 = stream.async.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%1[%c0 to %c8388608 for %c8388608], %3[%c0 to %c8388608 for %c8388608]) : (!stream.resource<*>{%c8388608}, !stream.resource<*>{%c8388608}) -> !stream.resource<*>{%c8388608}
  %5 = stream.async.transfer %4 : !stream.resource<*>{%c8388608} -> !stream.resource<external>{%c8388608}
  %6 = stream.tensor.export %5 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
  util.return %6 : !hal.buffer_view
}

// -----// IR Dump Before SimplifyGlobalAccesses (iree-util-simplify-global-accesses) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %c8388608 = arith.constant 8388608 : index
  %c0 = arith.constant 0 : index
  %c2048 = arith.constant 2048 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  %1 = stream.async.transfer %0 : !stream.resource<external>{%c8388608} -> !stream.resource<*>{%c8388608}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %2 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  %3 = stream.async.transfer %2 : !stream.resource<external>{%c8388608} -> !stream.resource<*>{%c8388608}
  %4 = stream.async.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%1[%c0 to %c8388608 for %c8388608], %3[%c0 to %c8388608 for %c8388608]) : (!stream.resource<*>{%c8388608}, !stream.resource<*>{%c8388608}) -> !stream.resource<*>{%c8388608}
  %5 = stream.async.transfer %4 : !stream.resource<*>{%c8388608} -> !stream.resource<external>{%c8388608}
  %6 = stream.tensor.export %5 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
  util.return %6 : !hal.buffer_view
}

// -----// IR Dump Before ApplyPatterns (iree-util-apply-patterns) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %1 = stream.async.transfer %0 : !stream.resource<external>{%c8388608} -> !stream.resource<*>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %2 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %3 = stream.async.transfer %2 : !stream.resource<external>{%c8388608} -> !stream.resource<*>{%c8388608}
    %4 = stream.async.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%1[%c0 to %c8388608 for %c8388608], %3[%c0 to %c8388608 for %c8388608]) : (!stream.resource<*>{%c8388608}, !stream.resource<*>{%c8388608}) -> !stream.resource<*>{%c8388608}
    %5 = stream.async.transfer %4 : !stream.resource<*>{%c8388608} -> !stream.resource<external>{%c8388608}
    %6 = stream.tensor.export %5 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %6 : !hal.buffer_view
  }
}


// -----// IR Dump Before FoldGlobals (iree-util-fold-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %1 = stream.async.transfer %0 : !stream.resource<external>{%c8388608} -> !stream.resource<*>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %2 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %3 = stream.async.transfer %2 : !stream.resource<external>{%c8388608} -> !stream.resource<*>{%c8388608}
    %4 = stream.async.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%1[%c0 to %c8388608 for %c8388608], %3[%c0 to %c8388608 for %c8388608]) : (!stream.resource<*>{%c8388608}, !stream.resource<*>{%c8388608}) -> !stream.resource<*>{%c8388608}
    %5 = stream.async.transfer %4 : !stream.resource<*>{%c8388608} -> !stream.resource<external>{%c8388608}
    %6 = stream.tensor.export %5 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %6 : !hal.buffer_view
  }
}


// -----// IR Dump Before FuseGlobals (iree-util-fuse-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %1 = stream.async.transfer %0 : !stream.resource<external>{%c8388608} -> !stream.resource<*>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %2 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %3 = stream.async.transfer %2 : !stream.resource<external>{%c8388608} -> !stream.resource<*>{%c8388608}
    %4 = stream.async.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%1[%c0 to %c8388608 for %c8388608], %3[%c0 to %c8388608 for %c8388608]) : (!stream.resource<*>{%c8388608}, !stream.resource<*>{%c8388608}) -> !stream.resource<*>{%c8388608}
    %5 = stream.async.transfer %4 : !stream.resource<*>{%c8388608} -> !stream.resource<external>{%c8388608}
    %6 = stream.tensor.export %5 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %6 : !hal.buffer_view
  }
}


// -----// IR Dump Before IPO (iree-util-ipo) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %1 = stream.async.transfer %0 : !stream.resource<external>{%c8388608} -> !stream.resource<*>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %2 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %3 = stream.async.transfer %2 : !stream.resource<external>{%c8388608} -> !stream.resource<*>{%c8388608}
    %4 = stream.async.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%1[%c0 to %c8388608 for %c8388608], %3[%c0 to %c8388608 for %c8388608]) : (!stream.resource<*>{%c8388608}, !stream.resource<*>{%c8388608}) -> !stream.resource<*>{%c8388608}
    %5 = stream.async.transfer %4 : !stream.resource<*>{%c8388608} -> !stream.resource<external>{%c8388608}
    %6 = stream.tensor.export %5 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %6 : !hal.buffer_view
  }
}


// -----// IR Dump Before VerifyLoweringToAsyncResourcesPass (iree-stream-verify-lowering-to-async-resources) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %1 = stream.async.transfer %0 : !stream.resource<external>{%c8388608} -> !stream.resource<*>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %2 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %3 = stream.async.transfer %2 : !stream.resource<external>{%c8388608} -> !stream.resource<*>{%c8388608}
    %4 = stream.async.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%1[%c0 to %c8388608 for %c8388608], %3[%c0 to %c8388608 for %c8388608]) : (!stream.resource<*>{%c8388608}, !stream.resource<*>{%c8388608}) -> !stream.resource<*>{%c8388608}
    %5 = stream.async.transfer %4 : !stream.resource<*>{%c8388608} -> !stream.resource<external>{%c8388608}
    %6 = stream.tensor.export %5 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %6 : !hal.buffer_view
  }
}


// -----// IR Dump Before MaterializeCopyOnWritePass (iree-stream-materialize-copy-on-write) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %c8388608 = arith.constant 8388608 : index
  %c0 = arith.constant 0 : index
  %c2048 = arith.constant 2048 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  %1 = stream.async.transfer %0 : !stream.resource<external>{%c8388608} -> !stream.resource<*>{%c8388608}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %2 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  %3 = stream.async.transfer %2 : !stream.resource<external>{%c8388608} -> !stream.resource<*>{%c8388608}
  %4 = stream.async.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%1[%c0 to %c8388608 for %c8388608], %3[%c0 to %c8388608 for %c8388608]) : (!stream.resource<*>{%c8388608}, !stream.resource<*>{%c8388608}) -> !stream.resource<*>{%c8388608}
  %5 = stream.async.transfer %4 : !stream.resource<*>{%c8388608} -> !stream.resource<external>{%c8388608}
  %6 = stream.tensor.export %5 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
  util.return %6 : !hal.buffer_view
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %c8388608 = arith.constant 8388608 : index
  %c0 = arith.constant 0 : index
  %c2048 = arith.constant 2048 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  %1 = stream.async.transfer %0 : !stream.resource<external>{%c8388608} -> !stream.resource<*>{%c8388608}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %2 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  %3 = stream.async.transfer %2 : !stream.resource<external>{%c8388608} -> !stream.resource<*>{%c8388608}
  %4 = stream.async.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%1[%c0 to %c8388608 for %c8388608], %3[%c0 to %c8388608 for %c8388608]) : (!stream.resource<*>{%c8388608}, !stream.resource<*>{%c8388608}) -> !stream.resource<*>{%c8388608}
  %5 = stream.async.transfer %4 : !stream.resource<*>{%c8388608} -> !stream.resource<external>{%c8388608}
  %6 = stream.tensor.export %5 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
  util.return %6 : !hal.buffer_view
}

// -----// IR Dump Before ElideAsyncCopiesPass (iree-stream-elide-async-copies) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %1 = stream.async.transfer %0 : !stream.resource<external>{%c8388608} -> !stream.resource<*>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %2 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %3 = stream.async.transfer %2 : !stream.resource<external>{%c8388608} -> !stream.resource<*>{%c8388608}
    %4 = stream.async.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%1[%c0 to %c8388608 for %c8388608], %3[%c0 to %c8388608 for %c8388608]) : (!stream.resource<*>{%c8388608}, !stream.resource<*>{%c8388608}) -> !stream.resource<*>{%c8388608}
    %5 = stream.async.transfer %4 : !stream.resource<*>{%c8388608} -> !stream.resource<external>{%c8388608}
    %6 = stream.tensor.export %5 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %6 : !hal.buffer_view
  }
}


// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %c8388608 = arith.constant 8388608 : index
  %c0 = arith.constant 0 : index
  %c2048 = arith.constant 2048 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  %1 = stream.async.transfer %0 : !stream.resource<external>{%c8388608} -> !stream.resource<*>{%c8388608}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %2 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  %3 = stream.async.transfer %2 : !stream.resource<external>{%c8388608} -> !stream.resource<*>{%c8388608}
  %4 = stream.async.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%1[%c0 to %c8388608 for %c8388608], %3[%c0 to %c8388608 for %c8388608]) : (!stream.resource<*>{%c8388608}, !stream.resource<*>{%c8388608}) -> !stream.resource<*>{%c8388608}
  %5 = stream.async.transfer %4 : !stream.resource<*>{%c8388608} -> !stream.resource<external>{%c8388608}
  %6 = stream.tensor.export %5 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
  util.return %6 : !hal.buffer_view
}

// -----// IR Dump Before EmplaceAllocationsPass (iree-stream-emplace-allocations) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %c8388608 = arith.constant 8388608 : index
  %c0 = arith.constant 0 : index
  %c2048 = arith.constant 2048 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  %1 = stream.async.transfer %0 : !stream.resource<external>{%c8388608} -> !stream.resource<*>{%c8388608}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %2 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  %3 = stream.async.transfer %2 : !stream.resource<external>{%c8388608} -> !stream.resource<*>{%c8388608}
  %4 = stream.async.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%1[%c0 to %c8388608 for %c8388608], %3[%c0 to %c8388608 for %c8388608]) : (!stream.resource<*>{%c8388608}, !stream.resource<*>{%c8388608}) -> !stream.resource<*>{%c8388608}
  %5 = stream.async.transfer %4 : !stream.resource<*>{%c8388608} -> !stream.resource<external>{%c8388608}
  %6 = stream.tensor.export %5 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
  util.return %6 : !hal.buffer_view
}

// -----// IR Dump Before RefineUsagePass (iree-stream-refine-usage) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %1 = stream.async.transfer %0 : !stream.resource<external>{%c8388608} -> !stream.resource<*>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %2 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %3 = stream.async.transfer %2 : !stream.resource<external>{%c8388608} -> !stream.resource<*>{%c8388608}
    %4 = stream.async.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%1[%c0 to %c8388608 for %c8388608], %3[%c0 to %c8388608 for %c8388608]) : (!stream.resource<*>{%c8388608}, !stream.resource<*>{%c8388608}) -> !stream.resource<*>{%c8388608}
    %5 = stream.async.transfer %4 : !stream.resource<*>{%c8388608} -> !stream.resource<external>{%c8388608}
    %6 = stream.tensor.export %5 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %6 : !hal.buffer_view
  }
}


// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %c8388608 = arith.constant 8388608 : index
  %c0 = arith.constant 0 : index
  %c2048 = arith.constant 2048 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  %2 = stream.async.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%0[%c0 to %c8388608 for %c8388608], %1[%c0 to %c8388608 for %c8388608]) : (!stream.resource<external>{%c8388608}, !stream.resource<external>{%c8388608}) -> !stream.resource<external>{%c8388608}
  %3 = stream.tensor.export %2 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
  util.return %3 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %c8388608 = arith.constant 8388608 : index
  %c0 = arith.constant 0 : index
  %c2048 = arith.constant 2048 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  %2 = stream.async.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%0[%c0 to %c8388608 for %c8388608], %1[%c0 to %c8388608 for %c8388608]) : (!stream.resource<external>{%c8388608}, !stream.resource<external>{%c8388608}) -> !stream.resource<external>{%c8388608}
  %3 = stream.tensor.export %2 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
  util.return %3 : !hal.buffer_view
}

// -----// IR Dump Before SimplifyGlobalAccesses (iree-util-simplify-global-accesses) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %c8388608 = arith.constant 8388608 : index
  %c0 = arith.constant 0 : index
  %c2048 = arith.constant 2048 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  %2 = stream.async.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%0[%c0 to %c8388608 for %c8388608], %1[%c0 to %c8388608 for %c8388608]) : (!stream.resource<external>{%c8388608}, !stream.resource<external>{%c8388608}) -> !stream.resource<external>{%c8388608}
  %3 = stream.tensor.export %2 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
  util.return %3 : !hal.buffer_view
}

// -----// IR Dump Before ApplyPatterns (iree-util-apply-patterns) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %2 = stream.async.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%0[%c0 to %c8388608 for %c8388608], %1[%c0 to %c8388608 for %c8388608]) : (!stream.resource<external>{%c8388608}, !stream.resource<external>{%c8388608}) -> !stream.resource<external>{%c8388608}
    %3 = stream.tensor.export %2 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before FoldGlobals (iree-util-fold-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %2 = stream.async.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%0[%c0 to %c8388608 for %c8388608], %1[%c0 to %c8388608 for %c8388608]) : (!stream.resource<external>{%c8388608}, !stream.resource<external>{%c8388608}) -> !stream.resource<external>{%c8388608}
    %3 = stream.tensor.export %2 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before FuseGlobals (iree-util-fuse-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %2 = stream.async.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%0[%c0 to %c8388608 for %c8388608], %1[%c0 to %c8388608 for %c8388608]) : (!stream.resource<external>{%c8388608}, !stream.resource<external>{%c8388608}) -> !stream.resource<external>{%c8388608}
    %3 = stream.tensor.export %2 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before IPO (iree-util-ipo) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %2 = stream.async.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%0[%c0 to %c8388608 for %c8388608], %1[%c0 to %c8388608 for %c8388608]) : (!stream.resource<external>{%c8388608}, !stream.resource<external>{%c8388608}) -> !stream.resource<external>{%c8388608}
    %3 = stream.tensor.export %2 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before VerifyAsyncAccessRangesPass (iree-stream-verify-async-access-ranges) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %2 = stream.async.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%0[%c0 to %c8388608 for %c8388608], %1[%c0 to %c8388608 for %c8388608]) : (!stream.resource<external>{%c8388608}, !stream.resource<external>{%c8388608}) -> !stream.resource<external>{%c8388608}
    %3 = stream.tensor.export %2 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before ScheduleExecutionPass (iree-stream-schedule-execution) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %c8388608 = arith.constant 8388608 : index
  %c0 = arith.constant 0 : index
  %c2048 = arith.constant 2048 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  %2 = stream.async.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%0[%c0 to %c8388608 for %c8388608], %1[%c0 to %c8388608 for %c8388608]) : (!stream.resource<external>{%c8388608}, !stream.resource<external>{%c8388608}) -> !stream.resource<external>{%c8388608}
  %3 = stream.tensor.export %2 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
  util.return %3 : !hal.buffer_view
}

// -----// IR Dump Before ScheduleConcurrencyPass (iree-stream-schedule-concurrency) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %c8388608 = arith.constant 8388608 : index
  %c0 = arith.constant 0 : index
  %c2048 = arith.constant 2048 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  %results, %result_timepoint = stream.async.execute with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}) -> !stream.resource<external>{%c8388608} {
    %4 = stream.async.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg2[%c0 to %c8388608 for %c8388608], %arg3[%c0 to %c8388608 for %c8388608]) : (!stream.resource<external>{%c8388608}, !stream.resource<external>{%c8388608}) -> !stream.resource<external>{%c8388608}
    stream.yield %4 : !stream.resource<external>{%c8388608}
  } => !stream.timepoint
  %2 = stream.timepoint.await %result_timepoint => %results : !stream.resource<external>{%c8388608}
  %3 = stream.tensor.export %2 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
  util.return %3 : !hal.buffer_view
}

// -----// IR Dump Before PropagateTimepointsPass (iree-stream-propagate-timepoints) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %results, %result_timepoint = stream.async.execute with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}) -> !stream.resource<external>{%c8388608} {
      %4 = stream.async.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg2[%c0 to %c8388608 for %c8388608], %arg3[%c0 to %c8388608 for %c8388608]) : (!stream.resource<external>{%c8388608}, !stream.resource<external>{%c8388608}) -> !stream.resource<external>{%c8388608}
      stream.yield %4 : !stream.resource<external>{%c8388608}
    } => !stream.timepoint
    %2 = stream.timepoint.await %result_timepoint => %results : !stream.resource<external>{%c8388608}
    %3 = stream.tensor.export %2 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before MaterializeBuiltinsPass (iree-stream-materialize-builtins) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %2 = stream.timepoint.immediate => !stream.timepoint
    %3 = stream.timepoint.immediate => !stream.timepoint
    %4 = stream.timepoint.join max(%2, %3) => !stream.timepoint
    %results, %result_timepoint = stream.async.execute await(%4) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}) -> !stream.resource<external>{%c8388608} {
      %7 = stream.async.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg2[%c0 to %c8388608 for %c8388608], %arg3[%c0 to %c8388608 for %c8388608]) : (!stream.resource<external>{%c8388608}, !stream.resource<external>{%c8388608}) -> !stream.resource<external>{%c8388608}
      stream.yield %7 : !stream.resource<external>{%c8388608}
    } => !stream.timepoint
    %5 = stream.timepoint.await %result_timepoint => %results : !stream.resource<external>{%c8388608}
    %6 = stream.tensor.export %5 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %6 : !hal.buffer_view
  }
}


// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %c8388608 = arith.constant 8388608 : index
  %c0 = arith.constant 0 : index
  %c2048 = arith.constant 2048 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  %2 = stream.timepoint.immediate => !stream.timepoint
  %3 = stream.timepoint.immediate => !stream.timepoint
  %4 = stream.timepoint.join max(%2, %3) => !stream.timepoint
  %results, %result_timepoint = stream.async.execute await(%4) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}) -> !stream.resource<external>{%c8388608} {
    %7 = stream.async.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg2[%c0 to %c8388608 for %c8388608], %arg3[%c0 to %c8388608 for %c8388608]) : (!stream.resource<external>{%c8388608}, !stream.resource<external>{%c8388608}) -> !stream.resource<external>{%c8388608}
    stream.yield %7 : !stream.resource<external>{%c8388608}
  } => !stream.timepoint
  %5 = stream.timepoint.await %result_timepoint => %results : !stream.resource<external>{%c8388608}
  %6 = stream.tensor.export %5 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
  util.return %6 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %c8388608 = arith.constant 8388608 : index
  %c0 = arith.constant 0 : index
  %c2048 = arith.constant 2048 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  %results, %result_timepoint = stream.async.execute with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}) -> !stream.resource<external>{%c8388608} {
    %4 = stream.async.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg2[%c0 to %c8388608 for %c8388608], %arg3[%c0 to %c8388608 for %c8388608]) : (!stream.resource<external>{%c8388608}, !stream.resource<external>{%c8388608}) -> !stream.resource<external>{%c8388608}
    stream.yield %4 : !stream.resource<external>{%c8388608}
  } => !stream.timepoint
  %2 = stream.timepoint.await %result_timepoint => %results : !stream.resource<external>{%c8388608}
  %3 = stream.tensor.export %2 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
  util.return %3 : !hal.buffer_view
}

// -----// IR Dump Before SimplifyGlobalAccesses (iree-util-simplify-global-accesses) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %c8388608 = arith.constant 8388608 : index
  %c0 = arith.constant 0 : index
  %c2048 = arith.constant 2048 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  %results, %result_timepoint = stream.async.execute with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}) -> !stream.resource<external>{%c8388608} {
    %4 = stream.async.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg2[%c0 to %c8388608 for %c8388608], %arg3[%c0 to %c8388608 for %c8388608]) : (!stream.resource<external>{%c8388608}, !stream.resource<external>{%c8388608}) -> !stream.resource<external>{%c8388608}
    stream.yield %4 : !stream.resource<external>{%c8388608}
  } => !stream.timepoint
  %2 = stream.timepoint.await %result_timepoint => %results : !stream.resource<external>{%c8388608}
  %3 = stream.tensor.export %2 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
  util.return %3 : !hal.buffer_view
}

// -----// IR Dump Before ApplyPatterns (iree-util-apply-patterns) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %results, %result_timepoint = stream.async.execute with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}) -> !stream.resource<external>{%c8388608} {
      %4 = stream.async.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg2[%c0 to %c8388608 for %c8388608], %arg3[%c0 to %c8388608 for %c8388608]) : (!stream.resource<external>{%c8388608}, !stream.resource<external>{%c8388608}) -> !stream.resource<external>{%c8388608}
      stream.yield %4 : !stream.resource<external>{%c8388608}
    } => !stream.timepoint
    %2 = stream.timepoint.await %result_timepoint => %results : !stream.resource<external>{%c8388608}
    %3 = stream.tensor.export %2 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before FoldGlobals (iree-util-fold-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %results, %result_timepoint = stream.async.execute with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}) -> !stream.resource<external>{%c8388608} {
      %4 = stream.async.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg2[%c0 to %c8388608 for %c8388608], %arg3[%c0 to %c8388608 for %c8388608]) : (!stream.resource<external>{%c8388608}, !stream.resource<external>{%c8388608}) -> !stream.resource<external>{%c8388608}
      stream.yield %4 : !stream.resource<external>{%c8388608}
    } => !stream.timepoint
    %2 = stream.timepoint.await %result_timepoint => %results : !stream.resource<external>{%c8388608}
    %3 = stream.tensor.export %2 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before FuseGlobals (iree-util-fuse-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %results, %result_timepoint = stream.async.execute with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}) -> !stream.resource<external>{%c8388608} {
      %4 = stream.async.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg2[%c0 to %c8388608 for %c8388608], %arg3[%c0 to %c8388608 for %c8388608]) : (!stream.resource<external>{%c8388608}, !stream.resource<external>{%c8388608}) -> !stream.resource<external>{%c8388608}
      stream.yield %4 : !stream.resource<external>{%c8388608}
    } => !stream.timepoint
    %2 = stream.timepoint.await %result_timepoint => %results : !stream.resource<external>{%c8388608}
    %3 = stream.tensor.export %2 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before IPO (iree-util-ipo) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %results, %result_timepoint = stream.async.execute with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}) -> !stream.resource<external>{%c8388608} {
      %4 = stream.async.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg2[%c0 to %c8388608 for %c8388608], %arg3[%c0 to %c8388608 for %c8388608]) : (!stream.resource<external>{%c8388608}, !stream.resource<external>{%c8388608}) -> !stream.resource<external>{%c8388608}
      stream.yield %4 : !stream.resource<external>{%c8388608}
    } => !stream.timepoint
    %2 = stream.timepoint.await %result_timepoint => %results : !stream.resource<external>{%c8388608}
    %3 = stream.tensor.export %2 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before VerifyLoweringToAsyncPass (iree-stream-verify-lowering-to-async) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %results, %result_timepoint = stream.async.execute with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}) -> !stream.resource<external>{%c8388608} {
      %4 = stream.async.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg2[%c0 to %c8388608 for %c8388608], %arg3[%c0 to %c8388608 for %c8388608]) : (!stream.resource<external>{%c8388608}, !stream.resource<external>{%c8388608}) -> !stream.resource<external>{%c8388608}
      stream.yield %4 : !stream.resource<external>{%c8388608}
    } => !stream.timepoint
    %2 = stream.timepoint.await %result_timepoint => %results : !stream.resource<external>{%c8388608}
    %3 = stream.tensor.export %2 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before ScheduleAllocationPass (iree-stream-schedule-allocation) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %results, %result_timepoint = stream.async.execute with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}) -> !stream.resource<external>{%c8388608} {
      %4 = stream.async.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg2[%c0 to %c8388608 for %c8388608], %arg3[%c0 to %c8388608 for %c8388608]) : (!stream.resource<external>{%c8388608}, !stream.resource<external>{%c8388608}) -> !stream.resource<external>{%c8388608}
      stream.yield %4 : !stream.resource<external>{%c8388608}
    } => !stream.timepoint
    %2 = stream.timepoint.await %result_timepoint => %results : !stream.resource<external>{%c8388608}
    %3 = stream.tensor.export %2 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before PackConstantsPass (iree-stream-pack-constants) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %c8388608 = arith.constant 8388608 : index
  %c0 = arith.constant 0 : index
  %c2048 = arith.constant 2048 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  %c0_0 = arith.constant 0 : index
  %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
  %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
    stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
      ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
      ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
      wo %arg4[%c0_0 for %c8388608] : !stream.resource<external>{%c8388608}
    }
  } => !stream.timepoint
  %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
  %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
  util.return %4 : !hal.buffer_view
}

// -----// IR Dump Before LayoutSlicesPass (iree-stream-layout-slices) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %c8388608 = arith.constant 8388608 : index
  %c0 = arith.constant 0 : index
  %c2048 = arith.constant 2048 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  %c0_0 = arith.constant 0 : index
  %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
  %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
    stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
      ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
      ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
      wo %arg4[%c0_0 for %c8388608] : !stream.resource<external>{%c8388608}
    }
  } => !stream.timepoint
  %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
  %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
  util.return %4 : !hal.buffer_view
}

// -----// IR Dump Before PropagateSubranges (iree-util-propagate-subranges) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %c0_0 = arith.constant 0 : index
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
      stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
        ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        wo %arg4[%c0_0 for %c8388608] : !stream.resource<external>{%c8388608}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
    %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %c8388608 = arith.constant 8388608 : index
  %c0 = arith.constant 0 : index
  %c2048 = arith.constant 2048 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  %c0_0 = arith.constant 0 : index
  %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
  %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
    stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
      ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
      ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
      wo %arg4[%c0_0 for %c8388608] : !stream.resource<external>{%c8388608}
    }
  } => !stream.timepoint
  %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
  %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
  util.return %4 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %c8388608 = arith.constant 8388608 : index
  %c0 = arith.constant 0 : index
  %c2048 = arith.constant 2048 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
  %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
    stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
      ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
      ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
      wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
    }
  } => !stream.timepoint
  %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
  %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
  util.return %4 : !hal.buffer_view
}

// -----// IR Dump Before SimplifyGlobalAccesses (iree-util-simplify-global-accesses) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %c8388608 = arith.constant 8388608 : index
  %c0 = arith.constant 0 : index
  %c2048 = arith.constant 2048 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
  %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
    stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
      ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
      ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
      wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
    }
  } => !stream.timepoint
  %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
  %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
  util.return %4 : !hal.buffer_view
}

// -----// IR Dump Before ApplyPatterns (iree-util-apply-patterns) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
      stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
        ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
    %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before FoldGlobals (iree-util-fold-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
      stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
        ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
    %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before FuseGlobals (iree-util-fuse-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
      stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
        ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
    %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before IPO (iree-util-ipo) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
      stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
        ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
    %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before VerifyLoweringToCmdPass (iree-stream-verify-lowering-to-cmd) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
      stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
        ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
    %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %c8388608 = arith.constant 8388608 : index
  %c0 = arith.constant 0 : index
  %c2048 = arith.constant 2048 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
  %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
    stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
      ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
      ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
      wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
    }
  } => !stream.timepoint
  %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
  %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
  util.return %4 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %c8388608 = arith.constant 8388608 : index
  %c0 = arith.constant 0 : index
  %c2048 = arith.constant 2048 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
  %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
    stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
      ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
      ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
      wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
    }
  } => !stream.timepoint
  %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
  %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
  util.return %4 : !hal.buffer_view
}

// -----// IR Dump Before SimplifyGlobalAccesses (iree-util-simplify-global-accesses) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %c8388608 = arith.constant 8388608 : index
  %c0 = arith.constant 0 : index
  %c2048 = arith.constant 2048 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
  %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
    stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
      ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
      ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
      wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
    }
  } => !stream.timepoint
  %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
  %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
  util.return %4 : !hal.buffer_view
}

// -----// IR Dump Before ApplyPatterns (iree-util-apply-patterns) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
      stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
        ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
    %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before FoldGlobals (iree-util-fold-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
      stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
        ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
    %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before FuseGlobals (iree-util-fuse-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
      stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
        ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
    %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before IPO (iree-util-ipo) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
      stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
        ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
    %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before SCFToControlFlow (convert-scf-to-cf) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %c8388608 = arith.constant 8388608 : index
  %c0 = arith.constant 0 : index
  %c2048 = arith.constant 2048 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
  %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
    stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
      ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
      ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
      wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
    }
  } => !stream.timepoint
  %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
  %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
  util.return %4 : !hal.buffer_view
}

// -----// IR Dump Before FixedPointIterator (iree-util-fixed-point-iterator) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
      stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
        ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
    %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %c8388608 = arith.constant 8388608 : index
  %c0 = arith.constant 0 : index
  %c2048 = arith.constant 2048 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
  %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
    stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
      ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
      ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
      wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
    }
  } => !stream.timepoint
  %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
  %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
  util.return %4 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %c8388608 = arith.constant 8388608 : index
  %c0 = arith.constant 0 : index
  %c2048 = arith.constant 2048 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
  %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
    stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
      ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
      ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
      wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
    }
  } => !stream.timepoint
  %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
  %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
  util.return %4 : !hal.buffer_view
}

// -----// IR Dump Before SimplifyGlobalAccesses (iree-util-simplify-global-accesses) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %c8388608 = arith.constant 8388608 : index
  %c0 = arith.constant 0 : index
  %c2048 = arith.constant 2048 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
  %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
    stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
      ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
      ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
      wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
    }
  } => !stream.timepoint
  %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
  %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
  util.return %4 : !hal.buffer_view
}

// -----// IR Dump Before ApplyPatterns (iree-util-apply-patterns) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie], iree.fixedpoint.iteration = 0 : index} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
      stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
        ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
    %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before FoldGlobals (iree-util-fold-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie], iree.fixedpoint.iteration = 0 : index} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
      stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
        ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
    %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before FuseGlobals (iree-util-fuse-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie], iree.fixedpoint.iteration = 0 : index} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
      stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
        ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
    %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before IPO (iree-util-ipo) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie], iree.fixedpoint.iteration = 0 : index} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
      stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
        ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
    %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before ElideTimepointsPass (iree-stream-elide-timepoints) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie], iree.fixedpoint.iteration = 0 : index} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
      stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
        ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
    %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before FuseDispatchBindingsPass (iree-stream-fuse-dispatch-bindings) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
      stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
        ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
    %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before AnnotateDispatchArgumentsPass (iree-stream-annotate-dispatch-arguments) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding, %arg3: index, %arg4: index, %arg5: index) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%arg3] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%arg4] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%arg5] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
    %c0_0 = arith.constant 0 : index
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
      stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%c0, %c0, %c0 : index, index, index) {
        ro %arg2[%c0_0 for %c8388608] : !stream.resource<external>{%c8388608},
        ro %arg3[%c0_0 for %c8388608] : !stream.resource<external>{%c8388608},
        wo %arg4[%c0_0 for %c8388608] : !stream.resource<external>{%c8388608}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
    %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before PackDispatchOperandsPass (iree-stream-pack-dispatch-operands) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding {stream.alignment = 64 : index}, %arg1: !stream.binding {stream.alignment = 64 : index}, %arg2: !stream.binding {stream.alignment = 64 : index}, %arg3: index {stream.values = [0 : index]}, %arg4: index {stream.values = [0 : index]}, %arg5: index {stream.values = [0 : index]}) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%arg3] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%arg4] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%arg5] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
    %c0_0 = arith.constant 0 : index
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
      stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%c0, %c0, %c0 : index, index, index) {
        ro %arg2[%c0_0 for %c8388608] : !stream.resource<external>{%c8388608},
        ro %arg3[%c0_0 for %c8388608] : !stream.resource<external>{%c8388608},
        wo %arg4[%c0_0 for %c8388608] : !stream.resource<external>{%c8388608}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
    %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %c8388608 = arith.constant 8388608 : index
  %c0 = arith.constant 0 : index
  %c2048 = arith.constant 2048 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
  %c0_0 = arith.constant 0 : index
  %c0_i64 = arith.constant 0 : i64
  %c0_i32 = arith.constant 0 : i32
  %c32_i64 = arith.constant 32 : i64
  %c0_i64_1 = arith.constant 0 : i64
  %c0_i32_2 = arith.constant 0 : i32
  %c0_i64_3 = arith.constant 0 : i64
  %c0_i32_4 = arith.constant 0 : i32
  %c32_i64_5 = arith.constant 32 : i64
  %c0_i64_6 = arith.constant 0 : i64
  %c0_i32_7 = arith.constant 0 : i32
  %c0_i64_8 = arith.constant 0 : i64
  %c0_i32_9 = arith.constant 0 : i32
  %c32_i64_10 = arith.constant 32 : i64
  %c0_i64_11 = arith.constant 0 : i64
  %c0_i32_12 = arith.constant 0 : i32
  %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
    stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%c0_i32, %c0_i32_2, %c0_i32_4, %c0_i32_7, %c0_i32_9, %c0_i32_12 : i32, i32, i32, i32, i32, i32) {
      ro %arg2[%c0_0 for %c8388608] : !stream.resource<external>{%c8388608},
      ro %arg3[%c0_0 for %c8388608] : !stream.resource<external>{%c8388608},
      wo %arg4[%c0_0 for %c8388608] : !stream.resource<external>{%c8388608}
    }
  } => !stream.timepoint
  %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
  %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
  util.return %4 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %c0_i32 = arith.constant 0 : i32
  %c8388608 = arith.constant 8388608 : index
  %c0 = arith.constant 0 : index
  %c2048 = arith.constant 2048 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
  %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
    stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%c0_i32, %c0_i32, %c0_i32, %c0_i32, %c0_i32, %c0_i32 : i32, i32, i32, i32, i32, i32) {
      ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
      ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
      wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
    }
  } => !stream.timepoint
  %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
  %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
  util.return %4 : !hal.buffer_view
}

// -----// IR Dump Before SimplifyGlobalAccesses (iree-util-simplify-global-accesses) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %c0_i32 = arith.constant 0 : i32
  %c8388608 = arith.constant 8388608 : index
  %c0 = arith.constant 0 : index
  %c2048 = arith.constant 2048 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
  %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
    stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%c0_i32, %c0_i32, %c0_i32, %c0_i32, %c0_i32, %c0_i32 : i32, i32, i32, i32, i32, i32) {
      ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
      ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
      wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
    }
  } => !stream.timepoint
  %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
  %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
  util.return %4 : !hal.buffer_view
}

// -----// IR Dump Before ApplyPatterns (iree-util-apply-patterns) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding {stream.alignment = 64 : index}, %arg1: !stream.binding {stream.alignment = 64 : index}, %arg2: !stream.binding {stream.alignment = 64 : index}, %arg3: i32, %arg4: i32, %arg5: i32, %arg6: i32, %arg7: i32, %arg8: i32) {
        %0 = arith.extui %arg3 : i32 to i64
        %1 = arith.extui %arg4 : i32 to i64
        %c32_i64 = arith.constant 32 : i64
        %2 = arith.shli %1, %c32_i64 : i64
        %3 = arith.ori %0, %2 : i64
        %4 = arith.index_castui %3 {stream.values = [0 : index]} : i64 to index
        %5 = arith.extui %arg5 : i32 to i64
        %6 = arith.extui %arg6 : i32 to i64
        %c32_i64_0 = arith.constant 32 : i64
        %7 = arith.shli %6, %c32_i64_0 : i64
        %8 = arith.ori %5, %7 : i64
        %9 = arith.index_castui %8 {stream.values = [0 : index]} : i64 to index
        %10 = arith.extui %arg7 : i32 to i64
        %11 = arith.extui %arg8 : i32 to i64
        %c32_i64_1 = arith.constant 32 : i64
        %12 = arith.shli %11, %c32_i64_1 : i64
        %13 = arith.ori %10, %12 : i64
        %14 = arith.index_castui %13 {stream.values = [0 : index]} : i64 to index
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %15 = stream.binding.subspan %arg0[%4] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %16 = stream.binding.subspan %arg1[%9] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %17 = stream.binding.subspan %arg2[%14] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %18 = flow.dispatch.tensor.load %15, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %19 = flow.dispatch.tensor.load %16, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %20 = tensor.empty() : tensor<2048x2048xbf16>
        %21 = linalg.fill ins(%cst : bf16) outs(%20 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %22 = linalg.matmul ins(%18, %19 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%21 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %22, %17, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c0_i32 = arith.constant 0 : i32
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
      stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%c0_i32, %c0_i32, %c0_i32, %c0_i32, %c0_i32, %c0_i32 : i32, i32, i32, i32, i32, i32) {
        ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
    %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before FoldGlobals (iree-util-fold-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding {stream.alignment = 64 : index}, %arg1: !stream.binding {stream.alignment = 64 : index}, %arg2: !stream.binding {stream.alignment = 64 : index}, %arg3: i32, %arg4: i32, %arg5: i32, %arg6: i32, %arg7: i32, %arg8: i32) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c32_i64 = arith.constant 32 : i64
        %0 = arith.extui %arg3 : i32 to i64
        %1 = arith.extui %arg4 : i32 to i64
        %2 = arith.shli %1, %c32_i64 : i64
        %3 = arith.ori %0, %2 : i64
        %4 = arith.index_castui %3 {stream.values = [0 : index]} : i64 to index
        %5 = arith.extui %arg5 : i32 to i64
        %6 = arith.extui %arg6 : i32 to i64
        %7 = arith.shli %6, %c32_i64 : i64
        %8 = arith.ori %5, %7 : i64
        %9 = arith.index_castui %8 {stream.values = [0 : index]} : i64 to index
        %10 = arith.extui %arg7 : i32 to i64
        %11 = arith.extui %arg8 : i32 to i64
        %12 = arith.shli %11, %c32_i64 : i64
        %13 = arith.ori %10, %12 : i64
        %14 = arith.index_castui %13 {stream.values = [0 : index]} : i64 to index
        %15 = stream.binding.subspan %arg0[%4] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %16 = stream.binding.subspan %arg1[%9] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %17 = stream.binding.subspan %arg2[%14] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %18 = flow.dispatch.tensor.load %15, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %19 = flow.dispatch.tensor.load %16, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %20 = tensor.empty() : tensor<2048x2048xbf16>
        %21 = linalg.fill ins(%cst : bf16) outs(%20 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %22 = linalg.matmul ins(%18, %19 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%21 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %22, %17, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c0_i32 = arith.constant 0 : i32
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
      stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%c0_i32, %c0_i32, %c0_i32, %c0_i32, %c0_i32, %c0_i32 : i32, i32, i32, i32, i32, i32) {
        ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
    %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before FuseGlobals (iree-util-fuse-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding {stream.alignment = 64 : index}, %arg1: !stream.binding {stream.alignment = 64 : index}, %arg2: !stream.binding {stream.alignment = 64 : index}, %arg3: i32, %arg4: i32, %arg5: i32, %arg6: i32, %arg7: i32, %arg8: i32) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c32_i64 = arith.constant 32 : i64
        %0 = arith.extui %arg3 : i32 to i64
        %1 = arith.extui %arg4 : i32 to i64
        %2 = arith.shli %1, %c32_i64 : i64
        %3 = arith.ori %0, %2 : i64
        %4 = arith.index_castui %3 {stream.values = [0 : index]} : i64 to index
        %5 = arith.extui %arg5 : i32 to i64
        %6 = arith.extui %arg6 : i32 to i64
        %7 = arith.shli %6, %c32_i64 : i64
        %8 = arith.ori %5, %7 : i64
        %9 = arith.index_castui %8 {stream.values = [0 : index]} : i64 to index
        %10 = arith.extui %arg7 : i32 to i64
        %11 = arith.extui %arg8 : i32 to i64
        %12 = arith.shli %11, %c32_i64 : i64
        %13 = arith.ori %10, %12 : i64
        %14 = arith.index_castui %13 {stream.values = [0 : index]} : i64 to index
        %15 = stream.binding.subspan %arg0[%4] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %16 = stream.binding.subspan %arg1[%9] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %17 = stream.binding.subspan %arg2[%14] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %18 = flow.dispatch.tensor.load %15, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %19 = flow.dispatch.tensor.load %16, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %20 = tensor.empty() : tensor<2048x2048xbf16>
        %21 = linalg.fill ins(%cst : bf16) outs(%20 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %22 = linalg.matmul ins(%18, %19 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%21 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %22, %17, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c0_i32 = arith.constant 0 : i32
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
      stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%c0_i32, %c0_i32, %c0_i32, %c0_i32, %c0_i32, %c0_i32 : i32, i32, i32, i32, i32, i32) {
        ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
    %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before IPO (iree-util-ipo) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding {stream.alignment = 64 : index}, %arg1: !stream.binding {stream.alignment = 64 : index}, %arg2: !stream.binding {stream.alignment = 64 : index}, %arg3: i32, %arg4: i32, %arg5: i32, %arg6: i32, %arg7: i32, %arg8: i32) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c32_i64 = arith.constant 32 : i64
        %0 = arith.extui %arg3 : i32 to i64
        %1 = arith.extui %arg4 : i32 to i64
        %2 = arith.shli %1, %c32_i64 : i64
        %3 = arith.ori %0, %2 : i64
        %4 = arith.index_castui %3 {stream.values = [0 : index]} : i64 to index
        %5 = arith.extui %arg5 : i32 to i64
        %6 = arith.extui %arg6 : i32 to i64
        %7 = arith.shli %6, %c32_i64 : i64
        %8 = arith.ori %5, %7 : i64
        %9 = arith.index_castui %8 {stream.values = [0 : index]} : i64 to index
        %10 = arith.extui %arg7 : i32 to i64
        %11 = arith.extui %arg8 : i32 to i64
        %12 = arith.shli %11, %c32_i64 : i64
        %13 = arith.ori %10, %12 : i64
        %14 = arith.index_castui %13 {stream.values = [0 : index]} : i64 to index
        %15 = stream.binding.subspan %arg0[%4] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %16 = stream.binding.subspan %arg1[%9] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %17 = stream.binding.subspan %arg2[%14] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %18 = flow.dispatch.tensor.load %15, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %19 = flow.dispatch.tensor.load %16, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %20 = tensor.empty() : tensor<2048x2048xbf16>
        %21 = linalg.fill ins(%cst : bf16) outs(%20 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %22 = linalg.matmul ins(%18, %19 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%21 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %22, %17, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c0_i32 = arith.constant 0 : i32
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
      stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%c0_i32, %c0_i32, %c0_i32, %c0_i32, %c0_i32, %c0_i32 : i32, i32, i32, i32, i32, i32) {
        ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
    %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before FoldUniformOperandsPass (iree-stream-fold-uniform-operands) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding {stream.alignment = 64 : index}, %arg1: !stream.binding {stream.alignment = 64 : index}, %arg2: !stream.binding {stream.alignment = 64 : index}, %arg3: i32, %arg4: i32, %arg5: i32, %arg6: i32, %arg7: i32, %arg8: i32) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c32_i64 = arith.constant 32 : i64
        %0 = arith.extui %arg3 : i32 to i64
        %1 = arith.extui %arg4 : i32 to i64
        %2 = arith.shli %1, %c32_i64 : i64
        %3 = arith.ori %0, %2 : i64
        %4 = arith.index_castui %3 {stream.values = [0 : index]} : i64 to index
        %5 = arith.extui %arg5 : i32 to i64
        %6 = arith.extui %arg6 : i32 to i64
        %7 = arith.shli %6, %c32_i64 : i64
        %8 = arith.ori %5, %7 : i64
        %9 = arith.index_castui %8 {stream.values = [0 : index]} : i64 to index
        %10 = arith.extui %arg7 : i32 to i64
        %11 = arith.extui %arg8 : i32 to i64
        %12 = arith.shli %11, %c32_i64 : i64
        %13 = arith.ori %10, %12 : i64
        %14 = arith.index_castui %13 {stream.values = [0 : index]} : i64 to index
        %15 = stream.binding.subspan %arg0[%4] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %16 = stream.binding.subspan %arg1[%9] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %17 = stream.binding.subspan %arg2[%14] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %18 = flow.dispatch.tensor.load %15, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %19 = flow.dispatch.tensor.load %16, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %20 = tensor.empty() : tensor<2048x2048xbf16>
        %21 = linalg.fill ins(%cst : bf16) outs(%20 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %22 = linalg.matmul ins(%18, %19 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%21 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %22, %17, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c0_i32 = arith.constant 0 : i32
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
      stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%c0_i32, %c0_i32, %c0_i32, %c0_i32, %c0_i32, %c0_i32 : i32, i32, i32, i32, i32, i32) {
        ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
    %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %c0_i32 = arith.constant 0 : i32
  %c8388608 = arith.constant 8388608 : index
  %c0 = arith.constant 0 : index
  %c2048 = arith.constant 2048 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
  %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
    stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
      ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
      ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
      wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
    }
  } => !stream.timepoint
  %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
  %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
  util.return %4 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %c8388608 = arith.constant 8388608 : index
  %c0 = arith.constant 0 : index
  %c2048 = arith.constant 2048 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
  %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
    stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
      ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
      ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
      wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
    }
  } => !stream.timepoint
  %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
  %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
  util.return %4 : !hal.buffer_view
}

// -----// IR Dump Before SimplifyGlobalAccesses (iree-util-simplify-global-accesses) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %c8388608 = arith.constant 8388608 : index
  %c0 = arith.constant 0 : index
  %c2048 = arith.constant 2048 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
  %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
    stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
      ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
      ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
      wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
    }
  } => !stream.timepoint
  %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
  %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
  util.return %4 : !hal.buffer_view
}

// -----// IR Dump Before ApplyPatterns (iree-util-apply-patterns) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding {stream.alignment = 64 : index}, %arg1: !stream.binding {stream.alignment = 64 : index}, %arg2: !stream.binding {stream.alignment = 64 : index}) {
        %c0_i32 = arith.constant 0 : i32
        %cst = arith.constant 0.000000e+00 : bf16
        %c32_i64 = arith.constant 32 : i64
        %0 = arith.extui %c0_i32 : i32 to i64
        %1 = arith.extui %c0_i32 : i32 to i64
        %2 = arith.shli %1, %c32_i64 : i64
        %3 = arith.ori %0, %2 : i64
        %4 = arith.index_castui %3 {stream.values = [0 : index]} : i64 to index
        %5 = arith.extui %c0_i32 : i32 to i64
        %6 = arith.extui %c0_i32 : i32 to i64
        %7 = arith.shli %6, %c32_i64 : i64
        %8 = arith.ori %5, %7 : i64
        %9 = arith.index_castui %8 {stream.values = [0 : index]} : i64 to index
        %10 = arith.extui %c0_i32 : i32 to i64
        %11 = arith.extui %c0_i32 : i32 to i64
        %12 = arith.shli %11, %c32_i64 : i64
        %13 = arith.ori %10, %12 : i64
        %14 = arith.index_castui %13 {stream.values = [0 : index]} : i64 to index
        %15 = stream.binding.subspan %arg0[%4] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %16 = stream.binding.subspan %arg1[%9] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %17 = stream.binding.subspan %arg2[%14] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %18 = flow.dispatch.tensor.load %15, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %19 = flow.dispatch.tensor.load %16, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %20 = tensor.empty() : tensor<2048x2048xbf16>
        %21 = linalg.fill ins(%cst : bf16) outs(%20 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %22 = linalg.matmul ins(%18, %19 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%21 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %22, %17, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
      stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
        ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
    %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before FoldGlobals (iree-util-fold-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding {stream.alignment = 64 : index}, %arg1: !stream.binding {stream.alignment = 64 : index}, %arg2: !stream.binding {stream.alignment = 64 : index}) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
      stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
        ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
    %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before FuseGlobals (iree-util-fuse-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding {stream.alignment = 64 : index}, %arg1: !stream.binding {stream.alignment = 64 : index}, %arg2: !stream.binding {stream.alignment = 64 : index}) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
      stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
        ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
    %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before IPO (iree-util-ipo) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding {stream.alignment = 64 : index}, %arg1: !stream.binding {stream.alignment = 64 : index}, %arg2: !stream.binding {stream.alignment = 64 : index}) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
      stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
        ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
    %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before SymbolDCE (symbol-dce) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding {stream.alignment = 64 : index}, %arg1: !stream.binding {stream.alignment = 64 : index}, %arg2: !stream.binding {stream.alignment = 64 : index}) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
      stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
        ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
    %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before CSE (cse) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding {stream.alignment = 64 : index}, %arg1: !stream.binding {stream.alignment = 64 : index}, %arg2: !stream.binding {stream.alignment = 64 : index}) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
      stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
        ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
    %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding {stream.alignment = 64 : index}, %arg1: !stream.binding {stream.alignment = 64 : index}, %arg2: !stream.binding {stream.alignment = 64 : index}) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
      stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
        ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
    %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before CSE (cse) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding {stream.alignment = 64 : index}, %arg1: !stream.binding {stream.alignment = 64 : index}, %arg2: !stream.binding {stream.alignment = 64 : index}) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
      stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
        ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
    %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before SimplifyGlobalAccesses (iree-util-simplify-global-accesses) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %c8388608 = arith.constant 8388608 : index
  %c0 = arith.constant 0 : index
  %c2048 = arith.constant 2048 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
  %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
    stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
      ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
      ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
      wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
    }
  } => !stream.timepoint
  %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
  %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
  util.return %4 : !hal.buffer_view
}

// -----// IR Dump Before ApplyPatterns (iree-util-apply-patterns) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding {stream.alignment = 64 : index}, %arg1: !stream.binding {stream.alignment = 64 : index}, %arg2: !stream.binding {stream.alignment = 64 : index}) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
      stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
        ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
    %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before FoldGlobals (iree-util-fold-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding {stream.alignment = 64 : index}, %arg1: !stream.binding {stream.alignment = 64 : index}, %arg2: !stream.binding {stream.alignment = 64 : index}) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
      stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
        ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
    %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before FuseGlobals (iree-util-fuse-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding {stream.alignment = 64 : index}, %arg1: !stream.binding {stream.alignment = 64 : index}, %arg2: !stream.binding {stream.alignment = 64 : index}) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
      stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
        ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
    %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before AssignTargetDevicesPass (iree-hal-assign-target-devices) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding {stream.alignment = 64 : index}, %arg1: !stream.binding {stream.alignment = 64 : index}, %arg2: !stream.binding {stream.alignment = 64 : index}) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
      stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
        ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
    %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before VerifyTargetEnvironmentPass (iree-hal-verify-target-environment) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding {stream.alignment = 64 : index}, %arg1: !stream.binding {stream.alignment = 64 : index}, %arg2: !stream.binding {stream.alignment = 64 : index}) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
      stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
        ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
    %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before MaterializeInterfacesPass (iree-hal-materialize-interfaces) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_large_dispatch_0 {
    stream.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16(%arg0: !stream.binding {stream.alignment = 64 : index}, %arg1: !stream.binding {stream.alignment = 64 : index}, %arg2: !stream.binding {stream.alignment = 64 : index}) {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
      stream.cmd.dispatch @matmul_large_dispatch_0::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
        ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
    %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before PruneExecutablesPass (iree-hal-prune-executables) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#pipeline_layout = #hal.pipeline.layout<push_constants = 0, sets = [<0, bindings = [<0, storage_buffer, ReadOnly>, <1, storage_buffer, ReadOnly>, <2, storage_buffer>]>]>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  hal.executable private @matmul_large_dispatch_0 {
    hal.executable.variant public @amdaie_xclbin_fb target(#executable_target_amdaie_xclbin_fb) {
      hal.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 ordinal(0) layout(#pipeline_layout) attributes {hal.interface.bindings = [#hal.interface.binding<0, 0>, #hal.interface.binding<0, 1>, #hal.interface.binding<0, 2>]} {
      ^bb0(%arg0: !hal.device):
        %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
        hal.return %x, %y, %z : index, index, index
      }
      builtin.module {
        func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() {
          %cst = arith.constant 0.000000e+00 : bf16
          %c0 = arith.constant 0 : index
          %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
          %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
          %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
          %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
          %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
          %5 = tensor.empty() : tensor<2048x2048xbf16>
          %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
          %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
          flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
          return
        }
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
      stream.cmd.dispatch @matmul_large_dispatch_0::@amdaie_xclbin_fb::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
        ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
    %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before DumpExecutableSourcesPass (iree-hal-dump-executable-sources) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#pipeline_layout = #hal.pipeline.layout<push_constants = 0, sets = [<0, bindings = [<0, storage_buffer, ReadOnly>, <1, storage_buffer, ReadOnly>, <2, storage_buffer>]>]>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  hal.executable private @matmul_large_dispatch_0 {
    hal.executable.variant public @amdaie_xclbin_fb target(#executable_target_amdaie_xclbin_fb) {
      hal.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 ordinal(0) layout(#pipeline_layout) attributes {hal.interface.bindings = [#hal.interface.binding<0, 0>, #hal.interface.binding<0, 1>, #hal.interface.binding<0, 2>]} {
      ^bb0(%arg0: !hal.device):
        %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
        hal.return %x, %y, %z : index, index, index
      }
      builtin.module {
        func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() {
          %cst = arith.constant 0.000000e+00 : bf16
          %c0 = arith.constant 0 : index
          %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
          %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
          %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
          %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
          %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
          %5 = tensor.empty() : tensor<2048x2048xbf16>
          %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
          %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
          flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
          return
        }
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
      stream.cmd.dispatch @matmul_large_dispatch_0::@amdaie_xclbin_fb::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
        ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
    %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before ConfigureExecutablesPass (iree-hal-configure-executables) //----- //
hal.executable private @matmul_large_dispatch_0 {
  hal.executable.variant public @amdaie_xclbin_fb target(<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>) {
    hal.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 ordinal(0) layout(#hal.pipeline.layout<push_constants = 0, sets = [<0, bindings = [<0, storage_buffer, ReadOnly>, <1, storage_buffer, ReadOnly>, <2, storage_buffer>]>]>) attributes {hal.interface.bindings = [#hal.interface.binding<0, 0>, #hal.interface.binding<0, 1>, #hal.interface.binding<0, 2>]} {
    ^bb0(%arg0: !hal.device):
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      hal.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
}

// -----// IR Dump Before ConfigureTargetExecutableVariantsPass (iree-hal-configure-target-executable-variants) //----- //
hal.executable.variant public @amdaie_xclbin_fb target(<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>) {
  hal.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 ordinal(0) layout(#hal.pipeline.layout<push_constants = 0, sets = [<0, bindings = [<0, storage_buffer, ReadOnly>, <1, storage_buffer, ReadOnly>, <2, storage_buffer>]>]>) attributes {hal.interface.bindings = [#hal.interface.binding<0, 0>, #hal.interface.binding<0, 1>, #hal.interface.binding<0, 2>]} {
  ^bb0(%arg0: !hal.device):
    %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
    hal.return %x, %y, %z : index, index, index
  }
  builtin.module {
    func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() {
      %cst = arith.constant 0.000000e+00 : bf16
      %c0 = arith.constant 0 : index
      %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
      %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
      %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
      %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
      %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
      %5 = tensor.empty() : tensor<2048x2048xbf16>
      %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
      %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
      flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
      return
    }
  }
}

// -----// IR Dump Before CPUMaterializeUpperBoundTileSize (iree-codegen-cpu-materialize-upper-bound-tile-size) //----- //
util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
  %c8388608 = arith.constant 8388608 : index
  %c0 = arith.constant 0 : index
  %c2048 = arith.constant 2048 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
  %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
  %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
    stream.cmd.dispatch @matmul_large_dispatch_0::@amdaie_xclbin_fb::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
      ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
      ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
      wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
    }
  } => !stream.timepoint
  %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
  %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
  util.return %4 : !hal.buffer_view
}

// -----// IR Dump Before DumpExecutableSourcesPass (iree-hal-dump-executable-sources) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#pipeline_layout = #hal.pipeline.layout<push_constants = 0, sets = [<0, bindings = [<0, storage_buffer, ReadOnly>, <1, storage_buffer, ReadOnly>, <2, storage_buffer>]>]>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  hal.executable private @matmul_large_dispatch_0 {
    hal.executable.variant public @amdaie_xclbin_fb target(#executable_target_amdaie_xclbin_fb) {
      hal.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 ordinal(0) layout(#pipeline_layout) attributes {hal.interface.bindings = [#hal.interface.binding<0, 0>, #hal.interface.binding<0, 1>, #hal.interface.binding<0, 2>]} {
      ^bb0(%arg0: !hal.device):
        %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
        hal.return %x, %y, %z : index, index, index
      }
      builtin.module {
        func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() {
          %cst = arith.constant 0.000000e+00 : bf16
          %c0 = arith.constant 0 : index
          %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
          %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
          %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
          %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
          %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
          %5 = tensor.empty() : tensor<2048x2048xbf16>
          %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
          %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
          flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
          return
        }
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
      stream.cmd.dispatch @matmul_large_dispatch_0::@amdaie_xclbin_fb::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
        ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
    %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before DumpExecutableBenchmarksPass (iree-hal-dump-executable-benchmarks) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>
#pipeline_layout = #hal.pipeline.layout<push_constants = 0, sets = [<0, bindings = [<0, storage_buffer, ReadOnly>, <1, storage_buffer, ReadOnly>, <2, storage_buffer>]>]>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  hal.executable private @matmul_large_dispatch_0 {
    hal.executable.variant public @amdaie_xclbin_fb target(#executable_target_amdaie_xclbin_fb) {
      hal.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 ordinal(0) layout(#pipeline_layout) attributes {hal.interface.bindings = [#hal.interface.binding<0, 0>, #hal.interface.binding<0, 1>, #hal.interface.binding<0, 2>]} {
      ^bb0(%arg0: !hal.device):
        %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
        hal.return %x, %y, %z : index, index, index
      }
      builtin.module {
        func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() {
          %cst = arith.constant 0.000000e+00 : bf16
          %c0 = arith.constant 0 : index
          %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
          %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
          %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
          %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
          %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
          %5 = tensor.empty() : tensor<2048x2048xbf16>
          %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
          %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
          flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
          return
        }
      }
    }
  }
  util.func public @matmul_large(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_large(%input0: tensor<2048x2048xbf16>, %input1: tensor<2048x2048xbf16>) -> (%output0: tensor<2048x2048xbf16>)"}} {
    %c8388608 = arith.constant 8388608 : index
    %c0 = arith.constant 0 : index
    %c2048 = arith.constant 2048 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c2048, %c2048]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c8388608} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c8388608}, %1 as %arg3: !stream.resource<external>{%c8388608}, %result as %arg4: !stream.resource<external>{%c8388608}) {
      stream.cmd.dispatch @matmul_large_dispatch_0::@amdaie_xclbin_fb::@matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 {
        ro %arg2[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        ro %arg3[%c0 for %c8388608] : !stream.resource<external>{%c8388608},
        wo %arg4[%c0 for %c8388608] : !stream.resource<external>{%c8388608}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c8388608}
    %4 = stream.tensor.export %3 : tensor<2048x2048xbf16> in !stream.resource<external>{%c8388608} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before TranslateExecutablesPass (iree-hal-translate-executables) //----- //
hal.executable private @matmul_large_dispatch_0 {
  hal.executable.variant public @amdaie_xclbin_fb target(<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>) {
    hal.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 ordinal(0) layout(#hal.pipeline.layout<push_constants = 0, sets = [<0, bindings = [<0, storage_buffer, ReadOnly>, <1, storage_buffer, ReadOnly>, <2, storage_buffer>]>]>) attributes {hal.interface.bindings = [#hal.interface.binding<0, 0>, #hal.interface.binding<0, 1>, #hal.interface.binding<0, 2>]} {
    ^bb0(%arg0: !hal.device):
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      hal.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() {
        %cst = arith.constant 0.000000e+00 : bf16
        %c0 = arith.constant 0 : index
        %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
        %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
        %5 = tensor.empty() : tensor<2048x2048xbf16>
        %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
        return
      }
    }
  }
}

// -----// IR Dump Before TranslateTargetExecutableVariantsPass (iree-hal-translate-target-executable-variants) //----- //
hal.executable.variant public @amdaie_xclbin_fb target(<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "all"}>) {
  hal.executable.export public @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16 ordinal(0) layout(#hal.pipeline.layout<push_constants = 0, sets = [<0, bindings = [<0, storage_buffer, ReadOnly>, <1, storage_buffer, ReadOnly>, <2, storage_buffer>]>]>) attributes {hal.interface.bindings = [#hal.interface.binding<0, 0>, #hal.interface.binding<0, 1>, #hal.interface.binding<0, 2>]} {
  ^bb0(%arg0: !hal.device):
    %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
    hal.return %x, %y, %z : index, index, index
  }
  builtin.module {
    func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() {
      %cst = arith.constant 0.000000e+00 : bf16
      %c0 = arith.constant 0 : index
      %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
      %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
      %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
      %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
      %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
      %5 = tensor.empty() : tensor<2048x2048xbf16>
      %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
      %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
      flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
      return
    }
  }
}

// -----// IR Dump Before TypePropagation (iree-codegen-type-propagation) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() {
  %cst = arith.constant 0.000000e+00 : bf16
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  return
}

// -----// IR Dump Before BubbleUpOrdinalOps (iree-codegen-bubble-up-ordinal-ops) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() {
  %cst = arith.constant 0.000000e+00 : bf16
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  return
}

// -----// IR Dump Before BufferizeCopyOnlyDispatches (iree-codegen-bufferize-copy-only-dispatches) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() {
  %cst = arith.constant 0.000000e+00 : bf16
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  return
}

// -----// IR Dump Before DecomposeSoftmax (iree-codegen-decompose-softmax) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() {
  %cst = arith.constant 0.000000e+00 : bf16
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  return
}

// -----// IR Dump Before MaterializeUserConfigs (iree-codegen-materialize-user-configs) //----- //
module {
  func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() {
    %cst = arith.constant 0.000000e+00 : bf16
    %c0 = arith.constant 0 : index
    %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
    %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
    %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
    %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
    %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
    %5 = tensor.empty() : tensor<2048x2048xbf16>
    %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
    return
  }
}

// -----// IR Dump Before AMDAIELoweringStrategy (iree-amdaie-lowering-strategy) //----- //
module {
  func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() {
    %cst = arith.constant 0.000000e+00 : bf16
    %c0 = arith.constant 0 : index
    %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
    %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
    %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
    %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
    %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
    %5 = tensor.empty() : tensor<2048x2048xbf16>
    %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %7 = linalg.matmul ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
    return
  }
}

// -----// IR Dump Before LowerExecutableUsingTransformDialect (iree-codegen-lower-executable-using-transform-dialect) //----- //
module {
  func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
    %cst = arith.constant 0.000000e+00 : bf16
    %c0 = arith.constant 0 : index
    %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
    %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
    %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
    %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
    %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
    %5 = tensor.empty() : tensor<2048x2048xbf16>
    %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    %7 = linalg.matmul {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
    flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
    return
  }
}

// -----// IR Dump Before AMDAIELowerExecutableTarget (iree-amdaie-lower-executable-target) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %cst = arith.constant 0.000000e+00 : bf16
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %7 = linalg.matmul {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  return
}

// -----// IR Dump Before AMDAIETileAndFuse (iree-amdaie-tile-and-fuse) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %cst = arith.constant 0.000000e+00 : bf16
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %7 = linalg.matmul {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  return
}

// -----// IR Dump Before AMDAIECleanup (iree-amdaie-cleanup) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %cst = arith.constant 0.000000e+00 : bf16
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = linalg.fill ins(%cst : bf16) outs(%5 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %7 = linalg.matmul {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} ins(%3, %4 : tensor<2048x2048xbf16>, tensor<2048x2048xbf16>) outs(%6 : tensor<2048x2048xbf16>) -> tensor<2048x2048xbf16>
  %8 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %9 = linalg.fill ins(%cst : bf16) outs(%extracted_slice_1 : tensor<128x128xbf16>) -> tensor<128x128xbf16>
    %extracted_slice_2 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %10 = linalg.matmul {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} ins(%extracted_slice, %extracted_slice_0 : tensor<128x2048xbf16>, tensor<2048x128xbf16>) outs(%9 : tensor<128x128xbf16>) -> tensor<128x128xbf16>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %10 into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %8, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  return
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %cst = arith.constant 0.000000e+00 : bf16
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %7 = linalg.fill ins(%cst : bf16) outs(%extracted_slice_1 : tensor<128x128xbf16>) -> tensor<128x128xbf16>
    %8 = linalg.matmul {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} ins(%extracted_slice, %extracted_slice_0 : tensor<128x2048xbf16>, tensor<2048x128xbf16>) outs(%7 : tensor<128x128xbf16>) -> tensor<128x128xbf16>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %8 into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  return
}

// -----// IR Dump Before CSE (cse) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %cst = arith.constant 0.000000e+00 : bf16
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %7 = linalg.fill ins(%cst : bf16) outs(%extracted_slice_1 : tensor<128x128xbf16>) -> tensor<128x128xbf16>
    %8 = linalg.matmul {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} ins(%extracted_slice, %extracted_slice_0 : tensor<128x2048xbf16>, tensor<2048x128xbf16>) outs(%7 : tensor<128x128xbf16>) -> tensor<128x128xbf16>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %8 into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  return
}

// -----// IR Dump Before AMDAIEPackAndTranspose (iree-amdaie-pack-and-transpose) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %cst = arith.constant 0.000000e+00 : bf16
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %7 = linalg.fill ins(%cst : bf16) outs(%extracted_slice_1 : tensor<128x128xbf16>) -> tensor<128x128xbf16>
    %8 = linalg.matmul {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} ins(%extracted_slice, %extracted_slice_0 : tensor<128x2048xbf16>, tensor<2048x128xbf16>) outs(%7 : tensor<128x128xbf16>) -> tensor<128x128xbf16>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %8 into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  return
}

// -----// IR Dump Before AMDAIEPropagateDataLayout (iree-amdaie-propagate-data-layout) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %cst = arith.constant 0.000000e+00 : bf16
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %7 = linalg.fill ins(%cst : bf16) outs(%extracted_slice_1 : tensor<128x128xbf16>) -> tensor<128x128xbf16>
    %8 = tensor.empty() : tensor<1x32x128x64xbf16>
    %pack = tensor.pack %extracted_slice inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %8 : tensor<128x2048xbf16> -> tensor<1x32x128x64xbf16>
    %9 = tensor.empty() : tensor<32x1x128x64xbf16>
    %10 = tensor.empty() : tensor<32x1x64x128xbf16>
    %pack_2 = tensor.pack %extracted_slice_0 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %10 : tensor<2048x128xbf16> -> tensor<32x1x64x128xbf16>
    %11 = tensor.empty() : tensor<1x1x128x128xbf16>
    %pack_3 = tensor.pack %7 inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %11 : tensor<128x128xbf16> -> tensor<1x1x128x128xbf16>
    %12 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5) -> (d0, d2, d3, d5)>, affine_map<(d0, d1, d2, d3, d4, d5) -> (d2, d1, d5, d4)>, affine_map<(d0, d1, d2, d3, d4, d5) -> (d0, d1, d3, d4)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack, %pack_2 : tensor<1x32x128x64xbf16>, tensor<32x1x64x128xbf16>) outs(%pack_3 : tensor<1x1x128x128xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
    ^bb0(%in: bf16, %in_4: bf16, %out: bf16):
      %13 = arith.mulf %in, %in_4 : bf16
      %14 = arith.addf %out, %13 : bf16
      linalg.yield %14 : bf16
    } -> tensor<1x1x128x128xbf16>
    %unpack = tensor.unpack %12 inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %7 : tensor<1x1x128x128xbf16> -> tensor<128x128xbf16>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  return
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %cst = arith.constant 0.000000e+00 : bf16
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %7 = linalg.fill ins(%cst : bf16) outs(%extracted_slice_1 : tensor<128x128xbf16>) -> tensor<128x128xbf16>
    %8 = tensor.empty() : tensor<1x32x128x64xbf16>
    %pack = tensor.pack %extracted_slice inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %8 : tensor<128x2048xbf16> -> tensor<1x32x128x64xbf16>
    %9 = tensor.empty() : tensor<32x1x64x128xbf16>
    %pack_2 = tensor.pack %extracted_slice_0 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %9 : tensor<2048x128xbf16> -> tensor<32x1x64x128xbf16>
    %10 = tensor.empty() : tensor<1x1x128x128xbf16>
    %pack_3 = tensor.pack %7 inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %10 : tensor<128x128xbf16> -> tensor<1x1x128x128xbf16>
    %11 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5) -> (d0, d2, d3, d5)>, affine_map<(d0, d1, d2, d3, d4, d5) -> (d2, d1, d5, d4)>, affine_map<(d0, d1, d2, d3, d4, d5) -> (d0, d1, d3, d4)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack, %pack_2 : tensor<1x32x128x64xbf16>, tensor<32x1x64x128xbf16>) outs(%pack_3 : tensor<1x1x128x128xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
    ^bb0(%in: bf16, %in_4: bf16, %out: bf16):
      %12 = arith.mulf %in, %in_4 : bf16
      %13 = arith.addf %out, %12 : bf16
      linalg.yield %13 : bf16
    } -> tensor<1x1x128x128xbf16>
    %unpack = tensor.unpack %11 inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %7 : tensor<1x1x128x128xbf16> -> tensor<128x128xbf16>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  return
}

// -----// IR Dump Before CSE (cse) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %cst = arith.constant 0.000000e+00 : bf16
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %7 = tensor.empty() : tensor<1x32x128x64xbf16>
    %pack = tensor.pack %extracted_slice inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %7 : tensor<128x2048xbf16> -> tensor<1x32x128x64xbf16>
    %8 = tensor.empty() : tensor<32x1x64x128xbf16>
    %pack_2 = tensor.pack %extracted_slice_0 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %8 : tensor<2048x128xbf16> -> tensor<32x1x64x128xbf16>
    %9 = tensor.empty() : tensor<1x1x128x128xbf16>
    %10 = linalg.fill ins(%cst : bf16) outs(%9 : tensor<1x1x128x128xbf16>) -> tensor<1x1x128x128xbf16>
    %11 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5) -> (d0, d2, d3, d5)>, affine_map<(d0, d1, d2, d3, d4, d5) -> (d2, d1, d5, d4)>, affine_map<(d0, d1, d2, d3, d4, d5) -> (d0, d1, d3, d4)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack, %pack_2 : tensor<1x32x128x64xbf16>, tensor<32x1x64x128xbf16>) outs(%10 : tensor<1x1x128x128xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
    ^bb0(%in: bf16, %in_3: bf16, %out: bf16):
      %12 = arith.mulf %in, %in_3 : bf16
      %13 = arith.addf %out, %12 : bf16
      linalg.yield %13 : bf16
    } -> tensor<1x1x128x128xbf16>
    %unpack = tensor.unpack %11 inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %extracted_slice_1 : tensor<1x1x128x128xbf16> -> tensor<128x128xbf16>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  return
}

// -----// IR Dump Before AMDAIEBufferizeToAllocation (iree-amdaie-bufferize-to-allocation) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %cst = arith.constant 0.000000e+00 : bf16
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %7 = tensor.empty() : tensor<1x32x128x64xbf16>
    %pack = tensor.pack %extracted_slice inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %7 : tensor<128x2048xbf16> -> tensor<1x32x128x64xbf16>
    %8 = tensor.empty() : tensor<32x1x64x128xbf16>
    %pack_2 = tensor.pack %extracted_slice_0 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %8 : tensor<2048x128xbf16> -> tensor<32x1x64x128xbf16>
    %9 = tensor.empty() : tensor<1x1x128x128xbf16>
    %10 = linalg.fill ins(%cst : bf16) outs(%9 : tensor<1x1x128x128xbf16>) -> tensor<1x1x128x128xbf16>
    %11 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5) -> (d0, d2, d3, d5)>, affine_map<(d0, d1, d2, d3, d4, d5) -> (d2, d1, d5, d4)>, affine_map<(d0, d1, d2, d3, d4, d5) -> (d0, d1, d3, d4)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack, %pack_2 : tensor<1x32x128x64xbf16>, tensor<32x1x64x128xbf16>) outs(%10 : tensor<1x1x128x128xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
    ^bb0(%in: bf16, %in_3: bf16, %out: bf16):
      %12 = arith.mulf %in, %in_3 : bf16
      %13 = arith.addf %out, %12 : bf16
      linalg.yield %13 : bf16
    } -> tensor<1x1x128x128xbf16>
    %unpack = tensor.unpack %11 inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %extracted_slice_1 : tensor<1x1x128x128xbf16> -> tensor<128x128xbf16>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  return
}

// -----// IR Dump Before AMDAIEBufferizeToAllocation (iree-amdaie-bufferize-to-allocation) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %cst = arith.constant 0.000000e+00 : bf16
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %7 = tensor.empty() : tensor<1x32x128x64xbf16>
    %pack = tensor.pack %extracted_slice inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %7 : tensor<128x2048xbf16> -> tensor<1x32x128x64xbf16>
    %8 = tensor.empty() : tensor<32x1x64x128xbf16>
    %pack_2 = tensor.pack %extracted_slice_0 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %8 : tensor<2048x128xbf16> -> tensor<32x1x64x128xbf16>
    %9 = tensor.empty() : tensor<1x1x128x128xbf16>
    %alloc = memref.alloc() : memref<1x1x128x128xbf16, 1 : i32>
    %10 = bufferization.to_tensor %alloc restrict writable : memref<1x1x128x128xbf16, 1 : i32>
    %11 = linalg.fill ins(%cst : bf16) outs(%10 : tensor<1x1x128x128xbf16>) -> tensor<1x1x128x128xbf16>
    %12 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5) -> (d0, d2, d3, d5)>, affine_map<(d0, d1, d2, d3, d4, d5) -> (d2, d1, d5, d4)>, affine_map<(d0, d1, d2, d3, d4, d5) -> (d0, d1, d3, d4)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack, %pack_2 : tensor<1x32x128x64xbf16>, tensor<32x1x64x128xbf16>) outs(%11 : tensor<1x1x128x128xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
    ^bb0(%in: bf16, %in_3: bf16, %out: bf16):
      %13 = arith.mulf %in, %in_3 : bf16
      %14 = arith.addf %out, %13 : bf16
      linalg.yield %14 : bf16
    } -> tensor<1x1x128x128xbf16>
    %unpack = tensor.unpack %12 inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %extracted_slice_1 : tensor<1x1x128x128xbf16> -> tensor<128x128xbf16>
    memref.dealloc %alloc : memref<1x1x128x128xbf16, 1 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  return
}

// -----// IR Dump Before AMDAIEPackAndTranspose (iree-amdaie-pack-and-transpose) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %cst = arith.constant 0.000000e+00 : bf16
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %7 = tensor.empty() : tensor<1x32x128x64xbf16>
    %pack = tensor.pack %extracted_slice inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %7 : tensor<128x2048xbf16> -> tensor<1x32x128x64xbf16>
    %8 = tensor.empty() : tensor<32x1x64x128xbf16>
    %pack_2 = tensor.pack %extracted_slice_0 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %8 : tensor<2048x128xbf16> -> tensor<32x1x64x128xbf16>
    %9 = tensor.empty() : tensor<1x1x128x128xbf16>
    %alloc = memref.alloc() : memref<1x1x128x128xbf16, 1 : i32>
    %10 = bufferization.to_tensor %alloc restrict writable : memref<1x1x128x128xbf16, 1 : i32>
    %11 = linalg.fill ins(%cst : bf16) outs(%10 : tensor<1x1x128x128xbf16>) -> tensor<1x1x128x128xbf16>
    %12 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5) -> (d0, d2, d3, d5)>, affine_map<(d0, d1, d2, d3, d4, d5) -> (d2, d1, d5, d4)>, affine_map<(d0, d1, d2, d3, d4, d5) -> (d0, d1, d3, d4)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack, %pack_2 : tensor<1x32x128x64xbf16>, tensor<32x1x64x128xbf16>) outs(%11 : tensor<1x1x128x128xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
    ^bb0(%in: bf16, %in_3: bf16, %out: bf16):
      %13 = arith.mulf %in, %in_3 : bf16
      %14 = arith.addf %out, %13 : bf16
      linalg.yield %14 : bf16
    } -> tensor<1x1x128x128xbf16>
    %unpack = tensor.unpack %12 inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %extracted_slice_1 : tensor<1x1x128x128xbf16> -> tensor<128x128xbf16>
    memref.dealloc %alloc : memref<1x1x128x128xbf16, 1 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  return
}

// -----// IR Dump Before AMDAIEPropagateDataLayout (iree-amdaie-propagate-data-layout) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %cst = arith.constant 0.000000e+00 : bf16
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %7 = tensor.empty() : tensor<1x32x128x64xbf16>
    %pack = tensor.pack %extracted_slice inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %7 : tensor<128x2048xbf16> -> tensor<1x32x128x64xbf16>
    %8 = tensor.empty() : tensor<32x1x64x128xbf16>
    %pack_2 = tensor.pack %extracted_slice_0 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %8 : tensor<2048x128xbf16> -> tensor<32x1x64x128xbf16>
    %9 = tensor.empty() : tensor<1x1x128x128xbf16>
    %alloc = memref.alloc() : memref<1x1x128x128xbf16, 1 : i32>
    %10 = bufferization.to_tensor %alloc restrict writable : memref<1x1x128x128xbf16, 1 : i32>
    %11 = linalg.fill ins(%cst : bf16) outs(%10 : tensor<1x1x128x128xbf16>) -> tensor<1x1x128x128xbf16>
    %12 = tensor.empty() : tensor<1x32x32x8x4x8xbf16>
    %13 = tensor.empty() : tensor<1x32x8x32x4x8xbf16>
    %pack_3 = tensor.pack %pack outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %13 : tensor<1x32x128x64xbf16> -> tensor<1x32x8x32x4x8xbf16>
    %14 = tensor.empty() : tensor<32x1x8x32x4x8xbf16>
    %15 = tensor.empty() : tensor<32x1x32x8x8x4xbf16>
    %pack_4 = tensor.pack %pack_2 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %15 : tensor<32x1x64x128xbf16> -> tensor<32x1x32x8x8x4xbf16>
    %16 = tensor.empty() : tensor<1x1x32x32x4x4xbf16>
    %17 = tensor.empty() : tensor<1x1x32x32x4x4xbf16>
    %pack_5 = tensor.pack %11 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %17 : tensor<1x1x128x128xbf16> -> tensor<1x1x32x32x4x4xbf16>
    %18 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_3, %pack_4 : tensor<1x32x8x32x4x8xbf16>, tensor<32x1x32x8x8x4xbf16>) outs(%pack_5 : tensor<1x1x32x32x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
    ^bb0(%in: bf16, %in_7: bf16, %out: bf16):
      %19 = arith.mulf %in, %in_7 : bf16
      %20 = arith.addf %out, %19 : bf16
      linalg.yield %20 : bf16
    } -> tensor<1x1x32x32x4x4xbf16>
    %unpack = tensor.unpack %18 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %11 : tensor<1x1x32x32x4x4xbf16> -> tensor<1x1x128x128xbf16>
    %unpack_6 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %extracted_slice_1 : tensor<1x1x128x128xbf16> -> tensor<128x128xbf16>
    memref.dealloc %alloc : memref<1x1x128x128xbf16, 1 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_6 into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  return
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %cst = arith.constant 0.000000e+00 : bf16
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %7 = tensor.empty() : tensor<1x32x128x64xbf16>
    %pack = tensor.pack %extracted_slice inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %7 : tensor<128x2048xbf16> -> tensor<1x32x128x64xbf16>
    %8 = tensor.empty() : tensor<32x1x64x128xbf16>
    %pack_2 = tensor.pack %extracted_slice_0 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %8 : tensor<2048x128xbf16> -> tensor<32x1x64x128xbf16>
    %alloc = memref.alloc() : memref<1x1x128x128xbf16, 1 : i32>
    %9 = bufferization.to_tensor %alloc restrict writable : memref<1x1x128x128xbf16, 1 : i32>
    %10 = linalg.fill ins(%cst : bf16) outs(%9 : tensor<1x1x128x128xbf16>) -> tensor<1x1x128x128xbf16>
    %11 = tensor.empty() : tensor<1x32x8x32x4x8xbf16>
    %pack_3 = tensor.pack %pack outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %11 : tensor<1x32x128x64xbf16> -> tensor<1x32x8x32x4x8xbf16>
    %12 = tensor.empty() : tensor<32x1x32x8x8x4xbf16>
    %pack_4 = tensor.pack %pack_2 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %12 : tensor<32x1x64x128xbf16> -> tensor<32x1x32x8x8x4xbf16>
    %13 = tensor.empty() : tensor<1x1x32x32x4x4xbf16>
    %pack_5 = tensor.pack %10 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %13 : tensor<1x1x128x128xbf16> -> tensor<1x1x32x32x4x4xbf16>
    %14 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_3, %pack_4 : tensor<1x32x8x32x4x8xbf16>, tensor<32x1x32x8x8x4xbf16>) outs(%pack_5 : tensor<1x1x32x32x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
    ^bb0(%in: bf16, %in_7: bf16, %out: bf16):
      %15 = arith.mulf %in, %in_7 : bf16
      %16 = arith.addf %out, %15 : bf16
      linalg.yield %16 : bf16
    } -> tensor<1x1x32x32x4x4xbf16>
    %unpack = tensor.unpack %14 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %10 : tensor<1x1x32x32x4x4xbf16> -> tensor<1x1x128x128xbf16>
    %unpack_6 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %extracted_slice_1 : tensor<1x1x128x128xbf16> -> tensor<128x128xbf16>
    memref.dealloc %alloc : memref<1x1x128x128xbf16, 1 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_6 into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  return
}

// -----// IR Dump Before CSE (cse) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %cst = arith.constant 0.000000e+00 : bf16
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %7 = tensor.empty() : tensor<1x32x128x64xbf16>
    %pack = tensor.pack %extracted_slice inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %7 : tensor<128x2048xbf16> -> tensor<1x32x128x64xbf16>
    %8 = tensor.empty() : tensor<32x1x64x128xbf16>
    %pack_2 = tensor.pack %extracted_slice_0 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %8 : tensor<2048x128xbf16> -> tensor<32x1x64x128xbf16>
    %alloc = memref.alloc() : memref<1x1x128x128xbf16, 1 : i32>
    %9 = bufferization.to_tensor %alloc restrict writable : memref<1x1x128x128xbf16, 1 : i32>
    %10 = tensor.empty() : tensor<1x32x8x32x4x8xbf16>
    %pack_3 = tensor.pack %pack outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %10 : tensor<1x32x128x64xbf16> -> tensor<1x32x8x32x4x8xbf16>
    %11 = tensor.empty() : tensor<32x1x32x8x8x4xbf16>
    %pack_4 = tensor.pack %pack_2 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %11 : tensor<32x1x64x128xbf16> -> tensor<32x1x32x8x8x4xbf16>
    %12 = tensor.empty() : tensor<1x1x32x32x4x4xbf16>
    %13 = linalg.fill ins(%cst : bf16) outs(%12 : tensor<1x1x32x32x4x4xbf16>) -> tensor<1x1x32x32x4x4xbf16>
    %14 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_3, %pack_4 : tensor<1x32x8x32x4x8xbf16>, tensor<32x1x32x8x8x4xbf16>) outs(%13 : tensor<1x1x32x32x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
    ^bb0(%in: bf16, %in_6: bf16, %out: bf16):
      %15 = arith.mulf %in, %in_6 : bf16
      %16 = arith.addf %out, %15 : bf16
      linalg.yield %16 : bf16
    } -> tensor<1x1x32x32x4x4xbf16>
    %unpack = tensor.unpack %14 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %9 : tensor<1x1x32x32x4x4xbf16> -> tensor<1x1x128x128xbf16>
    %unpack_5 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %extracted_slice_1 : tensor<1x1x128x128xbf16> -> tensor<128x128xbf16>
    memref.dealloc %alloc : memref<1x1x128x128xbf16, 1 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_5 into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  return
}

// -----// IR Dump Before AMDAIEBufferizeToAllocation (iree-amdaie-bufferize-to-allocation) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %cst = arith.constant 0.000000e+00 : bf16
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %7 = tensor.empty() : tensor<1x32x128x64xbf16>
    %pack = tensor.pack %extracted_slice inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %7 : tensor<128x2048xbf16> -> tensor<1x32x128x64xbf16>
    %8 = tensor.empty() : tensor<32x1x64x128xbf16>
    %pack_2 = tensor.pack %extracted_slice_0 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %8 : tensor<2048x128xbf16> -> tensor<32x1x64x128xbf16>
    %alloc = memref.alloc() : memref<1x1x128x128xbf16, 1 : i32>
    %9 = bufferization.to_tensor %alloc restrict writable : memref<1x1x128x128xbf16, 1 : i32>
    %10 = tensor.empty() : tensor<1x32x8x32x4x8xbf16>
    %pack_3 = tensor.pack %pack outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %10 : tensor<1x32x128x64xbf16> -> tensor<1x32x8x32x4x8xbf16>
    %11 = tensor.empty() : tensor<32x1x32x8x8x4xbf16>
    %pack_4 = tensor.pack %pack_2 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %11 : tensor<32x1x64x128xbf16> -> tensor<32x1x32x8x8x4xbf16>
    %12 = tensor.empty() : tensor<1x1x32x32x4x4xbf16>
    %13 = linalg.fill ins(%cst : bf16) outs(%12 : tensor<1x1x32x32x4x4xbf16>) -> tensor<1x1x32x32x4x4xbf16>
    %14 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_3, %pack_4 : tensor<1x32x8x32x4x8xbf16>, tensor<32x1x32x8x8x4xbf16>) outs(%13 : tensor<1x1x32x32x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
    ^bb0(%in: bf16, %in_6: bf16, %out: bf16):
      %15 = arith.mulf %in, %in_6 : bf16
      %16 = arith.addf %out, %15 : bf16
      linalg.yield %16 : bf16
    } -> tensor<1x1x32x32x4x4xbf16>
    %unpack = tensor.unpack %14 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %9 : tensor<1x1x32x32x4x4xbf16> -> tensor<1x1x128x128xbf16>
    %unpack_5 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %extracted_slice_1 : tensor<1x1x128x128xbf16> -> tensor<128x128xbf16>
    memref.dealloc %alloc : memref<1x1x128x128xbf16, 1 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_5 into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  return
}

// -----// IR Dump Before AMDAIEBufferizeToAllocation (iree-amdaie-bufferize-to-allocation) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %cst = arith.constant 0.000000e+00 : bf16
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %7 = tensor.empty() : tensor<1x32x128x64xbf16>
    %pack = tensor.pack %extracted_slice inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %7 : tensor<128x2048xbf16> -> tensor<1x32x128x64xbf16>
    %8 = tensor.empty() : tensor<32x1x64x128xbf16>
    %pack_2 = tensor.pack %extracted_slice_0 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %8 : tensor<2048x128xbf16> -> tensor<32x1x64x128xbf16>
    %alloc = memref.alloc() : memref<1x1x128x128xbf16, 1 : i32>
    %9 = bufferization.to_tensor %alloc restrict writable : memref<1x1x128x128xbf16, 1 : i32>
    %10 = tensor.empty() : tensor<1x32x8x32x4x8xbf16>
    %pack_3 = tensor.pack %pack outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %10 : tensor<1x32x128x64xbf16> -> tensor<1x32x8x32x4x8xbf16>
    %11 = tensor.empty() : tensor<32x1x32x8x8x4xbf16>
    %pack_4 = tensor.pack %pack_2 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %11 : tensor<32x1x64x128xbf16> -> tensor<32x1x32x8x8x4xbf16>
    %12 = tensor.empty() : tensor<1x1x32x32x4x4xbf16>
    %alloc_5 = memref.alloc() : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %13 = bufferization.to_tensor %alloc_5 restrict writable : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %14 = linalg.fill ins(%cst : bf16) outs(%13 : tensor<1x1x32x32x4x4xbf16>) -> tensor<1x1x32x32x4x4xbf16>
    %15 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_3, %pack_4 : tensor<1x32x8x32x4x8xbf16>, tensor<32x1x32x8x8x4xbf16>) outs(%14 : tensor<1x1x32x32x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
    ^bb0(%in: bf16, %in_7: bf16, %out: bf16):
      %16 = arith.mulf %in, %in_7 : bf16
      %17 = arith.addf %out, %16 : bf16
      linalg.yield %17 : bf16
    } -> tensor<1x1x32x32x4x4xbf16>
    %unpack = tensor.unpack %15 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %9 : tensor<1x1x32x32x4x4xbf16> -> tensor<1x1x128x128xbf16>
    %unpack_6 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %extracted_slice_1 : tensor<1x1x128x128xbf16> -> tensor<128x128xbf16>
    memref.dealloc %alloc : memref<1x1x128x128xbf16, 1 : i32>
    memref.dealloc %alloc_5 : memref<1x1x32x32x4x4xbf16, 2 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_6 into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  return
}

// -----// IR Dump Before AMDAIETileAndFuse (iree-amdaie-tile-and-fuse) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %cst = arith.constant 0.000000e+00 : bf16
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %7 = tensor.empty() : tensor<1x32x128x64xbf16>
    %pack = tensor.pack %extracted_slice inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %7 : tensor<128x2048xbf16> -> tensor<1x32x128x64xbf16>
    %8 = tensor.empty() : tensor<32x1x64x128xbf16>
    %pack_2 = tensor.pack %extracted_slice_0 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %8 : tensor<2048x128xbf16> -> tensor<32x1x64x128xbf16>
    %alloc = memref.alloc() : memref<1x1x128x128xbf16, 1 : i32>
    %9 = bufferization.to_tensor %alloc restrict writable : memref<1x1x128x128xbf16, 1 : i32>
    %10 = tensor.empty() : tensor<1x32x8x32x4x8xbf16>
    %pack_3 = tensor.pack %pack outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %10 : tensor<1x32x128x64xbf16> -> tensor<1x32x8x32x4x8xbf16>
    %11 = tensor.empty() : tensor<32x1x32x8x8x4xbf16>
    %pack_4 = tensor.pack %pack_2 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %11 : tensor<32x1x64x128xbf16> -> tensor<32x1x32x8x8x4xbf16>
    %12 = tensor.empty() : tensor<1x1x32x32x4x4xbf16>
    %alloc_5 = memref.alloc() : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %13 = bufferization.to_tensor %alloc_5 restrict writable : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %14 = linalg.fill ins(%cst : bf16) outs(%13 : tensor<1x1x32x32x4x4xbf16>) -> tensor<1x1x32x32x4x4xbf16>
    %15 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_3, %pack_4 : tensor<1x32x8x32x4x8xbf16>, tensor<32x1x32x8x8x4xbf16>) outs(%14 : tensor<1x1x32x32x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
    ^bb0(%in: bf16, %in_7: bf16, %out: bf16):
      %16 = arith.mulf %in, %in_7 : bf16
      %17 = arith.addf %out, %16 : bf16
      linalg.yield %17 : bf16
    } -> tensor<1x1x32x32x4x4xbf16>
    %unpack = tensor.unpack %15 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %9 : tensor<1x1x32x32x4x4xbf16> -> tensor<1x1x128x128xbf16>
    %unpack_6 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %extracted_slice_1 : tensor<1x1x128x128xbf16> -> tensor<128x128xbf16>
    memref.dealloc %alloc : memref<1x1x128x128xbf16, 1 : i32>
    memref.dealloc %alloc_5 : memref<1x1x32x32x4x4xbf16, 2 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_6 into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  return
}

// -----// IR Dump Before AMDAIECleanup (iree-amdaie-cleanup) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %cst = arith.constant 0.000000e+00 : bf16
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %7 = tensor.empty() : tensor<1x32x128x64xbf16>
    %pack = tensor.pack %extracted_slice inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %7 : tensor<128x2048xbf16> -> tensor<1x32x128x64xbf16>
    %8 = tensor.empty() : tensor<32x1x64x128xbf16>
    %pack_2 = tensor.pack %extracted_slice_0 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %8 : tensor<2048x128xbf16> -> tensor<32x1x64x128xbf16>
    %alloc = memref.alloc() : memref<1x1x128x128xbf16, 1 : i32>
    %9 = bufferization.to_tensor %alloc restrict writable : memref<1x1x128x128xbf16, 1 : i32>
    %10 = tensor.empty() : tensor<1x32x8x32x4x8xbf16>
    %pack_3 = tensor.pack %pack outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %10 : tensor<1x32x128x64xbf16> -> tensor<1x32x8x32x4x8xbf16>
    %11 = tensor.empty() : tensor<32x1x32x8x8x4xbf16>
    %pack_4 = tensor.pack %pack_2 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %11 : tensor<32x1x64x128xbf16> -> tensor<32x1x32x8x8x4xbf16>
    %12 = tensor.empty() : tensor<1x1x32x32x4x4xbf16>
    %alloc_5 = memref.alloc() : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %13 = bufferization.to_tensor %alloc_5 restrict writable : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %14 = linalg.fill ins(%cst : bf16) outs(%13 : tensor<1x1x32x32x4x4xbf16>) -> tensor<1x1x32x32x4x4xbf16>
    %15 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_3, %pack_4 : tensor<1x32x8x32x4x8xbf16>, tensor<32x1x32x8x8x4xbf16>) outs(%14 : tensor<1x1x32x32x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
    ^bb0(%in: bf16, %in_8: bf16, %out: bf16):
      %17 = arith.mulf %in, %in_8 : bf16
      %18 = arith.addf %out, %17 : bf16
      linalg.yield %18 : bf16
    } -> tensor<1x1x32x32x4x4xbf16>
    %c0_6 = arith.constant 0 : index
    %c32 = arith.constant 32 : index
    %c1 = arith.constant 1 : index
    %16 = scf.for %arg3 = %c0_6 to %c32 step %c1 iter_args(%arg4 = %14) -> (tensor<1x1x32x32x4x4xbf16>) {
      %extracted_slice_8 = tensor.extract_slice %pack_3[0, %arg3, 0, 0, 0, 0] [1, 1, 8, 32, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<1x32x8x32x4x8xbf16> to tensor<1x1x8x32x4x8xbf16>
      %extracted_slice_9 = tensor.extract_slice %pack_4[%arg3, 0, 0, 0, 0, 0] [1, 1, 32, 8, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<32x1x32x8x8x4xbf16> to tensor<1x1x32x8x8x4xbf16>
      %extracted_slice_10 = tensor.extract_slice %arg4[0, 0, 0, 0, 0, 0] [1, 1, 32, 32, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x32x4x4xbf16> to tensor<1x1x32x32x4x4xbf16>
      %17 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%extracted_slice_8, %extracted_slice_9 : tensor<1x1x8x32x4x8xbf16>, tensor<1x1x32x8x8x4xbf16>) outs(%extracted_slice_10 : tensor<1x1x32x32x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
      ^bb0(%in: bf16, %in_11: bf16, %out: bf16):
        %18 = arith.mulf %in, %in_11 : bf16
        %19 = arith.addf %out, %18 : bf16
        linalg.yield %19 : bf16
      } -> tensor<1x1x32x32x4x4xbf16>
      %inserted_slice = tensor.insert_slice %17 into %arg4[0, 0, 0, 0, 0, 0] [1, 1, 32, 32, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x32x4x4xbf16> into tensor<1x1x32x32x4x4xbf16>
      scf.yield %inserted_slice : tensor<1x1x32x32x4x4xbf16>
    }
    %unpack = tensor.unpack %16 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %9 : tensor<1x1x32x32x4x4xbf16> -> tensor<1x1x128x128xbf16>
    %unpack_7 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %extracted_slice_1 : tensor<1x1x128x128xbf16> -> tensor<128x128xbf16>
    memref.dealloc %alloc : memref<1x1x128x128xbf16, 1 : i32>
    memref.dealloc %alloc_5 : memref<1x1x32x32x4x4xbf16, 2 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_7 into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  return
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c1 = arith.constant 1 : index
  %c32 = arith.constant 32 : index
  %cst = arith.constant 0.000000e+00 : bf16
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %7 = tensor.empty() : tensor<1x32x128x64xbf16>
    %pack = tensor.pack %extracted_slice inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %7 : tensor<128x2048xbf16> -> tensor<1x32x128x64xbf16>
    %8 = tensor.empty() : tensor<32x1x64x128xbf16>
    %pack_2 = tensor.pack %extracted_slice_0 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %8 : tensor<2048x128xbf16> -> tensor<32x1x64x128xbf16>
    %alloc = memref.alloc() : memref<1x1x128x128xbf16, 1 : i32>
    %9 = bufferization.to_tensor %alloc restrict writable : memref<1x1x128x128xbf16, 1 : i32>
    %10 = tensor.empty() : tensor<1x32x8x32x4x8xbf16>
    %pack_3 = tensor.pack %pack outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %10 : tensor<1x32x128x64xbf16> -> tensor<1x32x8x32x4x8xbf16>
    %11 = tensor.empty() : tensor<32x1x32x8x8x4xbf16>
    %pack_4 = tensor.pack %pack_2 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %11 : tensor<32x1x64x128xbf16> -> tensor<32x1x32x8x8x4xbf16>
    %alloc_5 = memref.alloc() : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %12 = bufferization.to_tensor %alloc_5 restrict writable : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %13 = linalg.fill ins(%cst : bf16) outs(%12 : tensor<1x1x32x32x4x4xbf16>) -> tensor<1x1x32x32x4x4xbf16>
    %14 = scf.for %arg3 = %c0 to %c32 step %c1 iter_args(%arg4 = %13) -> (tensor<1x1x32x32x4x4xbf16>) {
      %extracted_slice_7 = tensor.extract_slice %pack_3[0, %arg3, 0, 0, 0, 0] [1, 1, 8, 32, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<1x32x8x32x4x8xbf16> to tensor<1x1x8x32x4x8xbf16>
      %extracted_slice_8 = tensor.extract_slice %pack_4[%arg3, 0, 0, 0, 0, 0] [1, 1, 32, 8, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<32x1x32x8x8x4xbf16> to tensor<1x1x32x8x8x4xbf16>
      %15 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%extracted_slice_7, %extracted_slice_8 : tensor<1x1x8x32x4x8xbf16>, tensor<1x1x32x8x8x4xbf16>) outs(%arg4 : tensor<1x1x32x32x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
      ^bb0(%in: bf16, %in_9: bf16, %out: bf16):
        %16 = arith.mulf %in, %in_9 : bf16
        %17 = arith.addf %out, %16 : bf16
        linalg.yield %17 : bf16
      } -> tensor<1x1x32x32x4x4xbf16>
      scf.yield %15 : tensor<1x1x32x32x4x4xbf16>
    }
    %unpack = tensor.unpack %14 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %9 : tensor<1x1x32x32x4x4xbf16> -> tensor<1x1x128x128xbf16>
    %unpack_6 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %extracted_slice_1 : tensor<1x1x128x128xbf16> -> tensor<128x128xbf16>
    memref.dealloc %alloc : memref<1x1x128x128xbf16, 1 : i32>
    memref.dealloc %alloc_5 : memref<1x1x32x32x4x4xbf16, 2 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_6 into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  return
}

// -----// IR Dump Before CSE (cse) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c1 = arith.constant 1 : index
  %c32 = arith.constant 32 : index
  %cst = arith.constant 0.000000e+00 : bf16
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %7 = tensor.empty() : tensor<1x32x128x64xbf16>
    %pack = tensor.pack %extracted_slice inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %7 : tensor<128x2048xbf16> -> tensor<1x32x128x64xbf16>
    %8 = tensor.empty() : tensor<32x1x64x128xbf16>
    %pack_2 = tensor.pack %extracted_slice_0 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %8 : tensor<2048x128xbf16> -> tensor<32x1x64x128xbf16>
    %alloc = memref.alloc() : memref<1x1x128x128xbf16, 1 : i32>
    %9 = bufferization.to_tensor %alloc restrict writable : memref<1x1x128x128xbf16, 1 : i32>
    %10 = tensor.empty() : tensor<1x32x8x32x4x8xbf16>
    %pack_3 = tensor.pack %pack outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %10 : tensor<1x32x128x64xbf16> -> tensor<1x32x8x32x4x8xbf16>
    %11 = tensor.empty() : tensor<32x1x32x8x8x4xbf16>
    %pack_4 = tensor.pack %pack_2 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %11 : tensor<32x1x64x128xbf16> -> tensor<32x1x32x8x8x4xbf16>
    %alloc_5 = memref.alloc() : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %12 = bufferization.to_tensor %alloc_5 restrict writable : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %13 = linalg.fill ins(%cst : bf16) outs(%12 : tensor<1x1x32x32x4x4xbf16>) -> tensor<1x1x32x32x4x4xbf16>
    %14 = scf.for %arg3 = %c0 to %c32 step %c1 iter_args(%arg4 = %13) -> (tensor<1x1x32x32x4x4xbf16>) {
      %extracted_slice_7 = tensor.extract_slice %pack_3[0, %arg3, 0, 0, 0, 0] [1, 1, 8, 32, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<1x32x8x32x4x8xbf16> to tensor<1x1x8x32x4x8xbf16>
      %extracted_slice_8 = tensor.extract_slice %pack_4[%arg3, 0, 0, 0, 0, 0] [1, 1, 32, 8, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<32x1x32x8x8x4xbf16> to tensor<1x1x32x8x8x4xbf16>
      %15 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%extracted_slice_7, %extracted_slice_8 : tensor<1x1x8x32x4x8xbf16>, tensor<1x1x32x8x8x4xbf16>) outs(%arg4 : tensor<1x1x32x32x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
      ^bb0(%in: bf16, %in_9: bf16, %out: bf16):
        %16 = arith.mulf %in, %in_9 : bf16
        %17 = arith.addf %out, %16 : bf16
        linalg.yield %17 : bf16
      } -> tensor<1x1x32x32x4x4xbf16>
      scf.yield %15 : tensor<1x1x32x32x4x4xbf16>
    }
    %unpack = tensor.unpack %14 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %9 : tensor<1x1x32x32x4x4xbf16> -> tensor<1x1x128x128xbf16>
    %unpack_6 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %extracted_slice_1 : tensor<1x1x128x128xbf16> -> tensor<128x128xbf16>
    memref.dealloc %alloc : memref<1x1x128x128xbf16, 1 : i32>
    memref.dealloc %alloc_5 : memref<1x1x32x32x4x4xbf16, 2 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_6 into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  return
}

// -----// IR Dump Before AMDAIEFusePackIntoLoop (iree-amdaie-fuse-pack-into-loop) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c1 = arith.constant 1 : index
  %c32 = arith.constant 32 : index
  %cst = arith.constant 0.000000e+00 : bf16
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %7 = tensor.empty() : tensor<1x32x128x64xbf16>
    %pack = tensor.pack %extracted_slice inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %7 : tensor<128x2048xbf16> -> tensor<1x32x128x64xbf16>
    %8 = tensor.empty() : tensor<32x1x64x128xbf16>
    %pack_2 = tensor.pack %extracted_slice_0 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %8 : tensor<2048x128xbf16> -> tensor<32x1x64x128xbf16>
    %alloc = memref.alloc() : memref<1x1x128x128xbf16, 1 : i32>
    %9 = bufferization.to_tensor %alloc restrict writable : memref<1x1x128x128xbf16, 1 : i32>
    %10 = tensor.empty() : tensor<1x32x8x32x4x8xbf16>
    %pack_3 = tensor.pack %pack outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %10 : tensor<1x32x128x64xbf16> -> tensor<1x32x8x32x4x8xbf16>
    %11 = tensor.empty() : tensor<32x1x32x8x8x4xbf16>
    %pack_4 = tensor.pack %pack_2 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %11 : tensor<32x1x64x128xbf16> -> tensor<32x1x32x8x8x4xbf16>
    %alloc_5 = memref.alloc() : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %12 = bufferization.to_tensor %alloc_5 restrict writable : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %13 = linalg.fill ins(%cst : bf16) outs(%12 : tensor<1x1x32x32x4x4xbf16>) -> tensor<1x1x32x32x4x4xbf16>
    %14 = scf.for %arg3 = %c0 to %c32 step %c1 iter_args(%arg4 = %13) -> (tensor<1x1x32x32x4x4xbf16>) {
      %extracted_slice_7 = tensor.extract_slice %pack_3[0, %arg3, 0, 0, 0, 0] [1, 1, 8, 32, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<1x32x8x32x4x8xbf16> to tensor<1x1x8x32x4x8xbf16>
      %extracted_slice_8 = tensor.extract_slice %pack_4[%arg3, 0, 0, 0, 0, 0] [1, 1, 32, 8, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<32x1x32x8x8x4xbf16> to tensor<1x1x32x8x8x4xbf16>
      %15 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%extracted_slice_7, %extracted_slice_8 : tensor<1x1x8x32x4x8xbf16>, tensor<1x1x32x8x8x4xbf16>) outs(%arg4 : tensor<1x1x32x32x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
      ^bb0(%in: bf16, %in_9: bf16, %out: bf16):
        %16 = arith.mulf %in, %in_9 : bf16
        %17 = arith.addf %out, %16 : bf16
        linalg.yield %17 : bf16
      } -> tensor<1x1x32x32x4x4xbf16>
      scf.yield %15 : tensor<1x1x32x32x4x4xbf16>
    }
    %unpack = tensor.unpack %14 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %9 : tensor<1x1x32x32x4x4xbf16> -> tensor<1x1x128x128xbf16>
    %unpack_6 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %extracted_slice_1 : tensor<1x1x128x128xbf16> -> tensor<128x128xbf16>
    memref.dealloc %alloc : memref<1x1x128x128xbf16, 1 : i32>
    memref.dealloc %alloc_5 : memref<1x1x32x32x4x4xbf16, 2 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_6 into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  return
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c1 = arith.constant 1 : index
  %c32 = arith.constant 32 : index
  %cst = arith.constant 0.000000e+00 : bf16
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %7 = tensor.empty() : tensor<1x32x128x64xbf16>
    %pack = tensor.pack %extracted_slice inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %7 : tensor<128x2048xbf16> -> tensor<1x32x128x64xbf16>
    %8 = tensor.empty() : tensor<32x1x64x128xbf16>
    %pack_2 = tensor.pack %extracted_slice_0 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %8 : tensor<2048x128xbf16> -> tensor<32x1x64x128xbf16>
    %alloc = memref.alloc() : memref<1x1x128x128xbf16, 1 : i32>
    %9 = bufferization.to_tensor %alloc restrict writable : memref<1x1x128x128xbf16, 1 : i32>
    %10 = tensor.empty() : tensor<1x32x8x32x4x8xbf16>
    %pack_3 = tensor.pack %pack outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %10 : tensor<1x32x128x64xbf16> -> tensor<1x32x8x32x4x8xbf16>
    %11 = tensor.empty() : tensor<32x1x32x8x8x4xbf16>
    %pack_4 = tensor.pack %pack_2 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %11 : tensor<32x1x64x128xbf16> -> tensor<32x1x32x8x8x4xbf16>
    %alloc_5 = memref.alloc() : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %12 = bufferization.to_tensor %alloc_5 restrict writable : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %13 = linalg.fill ins(%cst : bf16) outs(%12 : tensor<1x1x32x32x4x4xbf16>) -> tensor<1x1x32x32x4x4xbf16>
    %14 = scf.for %arg3 = %c0 to %c32 step %c1 iter_args(%arg4 = %13) -> (tensor<1x1x32x32x4x4xbf16>) {
      %15 = affine.apply affine_map<(d0) -> (d0 * 64)>(%arg3)
      %extracted_slice_7 = tensor.extract_slice %extracted_slice[0, %15] [128, 64] [1, 1] : tensor<128x2048xbf16> to tensor<128x64xbf16>
      %extracted_slice_8 = tensor.extract_slice %7[0, %arg3, 0, 0] [1, 1, 128, 64] [1, 1, 1, 1] : tensor<1x32x128x64xbf16> to tensor<1x1x128x64xbf16>
      %pack_9 = tensor.pack %extracted_slice_7 inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %extracted_slice_8 : tensor<128x64xbf16> -> tensor<1x1x128x64xbf16>
      %extracted_slice_10 = tensor.extract_slice %pack[0, %arg3, 0, 0] [1, 1, 128, 64] [1, 1, 1, 1] : tensor<1x32x128x64xbf16> to tensor<1x1x128x64xbf16>
      %extracted_slice_11 = tensor.extract_slice %10[0, %arg3, 0, 0, 0, 0] [1, 1, 8, 32, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<1x32x8x32x4x8xbf16> to tensor<1x1x8x32x4x8xbf16>
      %pack_12 = tensor.pack %pack_9 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %extracted_slice_11 : tensor<1x1x128x64xbf16> -> tensor<1x1x8x32x4x8xbf16>
      %extracted_slice_13 = tensor.extract_slice %pack_3[0, %arg3, 0, 0, 0, 0] [1, 1, 8, 32, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<1x32x8x32x4x8xbf16> to tensor<1x1x8x32x4x8xbf16>
      %16 = affine.apply affine_map<(d0) -> (d0 * 64)>(%arg3)
      %extracted_slice_14 = tensor.extract_slice %extracted_slice_0[%16, 0] [64, 128] [1, 1] : tensor<2048x128xbf16> to tensor<64x128xbf16>
      %extracted_slice_15 = tensor.extract_slice %8[%arg3, 0, 0, 0] [1, 1, 64, 128] [1, 1, 1, 1] : tensor<32x1x64x128xbf16> to tensor<1x1x64x128xbf16>
      %pack_16 = tensor.pack %extracted_slice_14 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %extracted_slice_15 : tensor<64x128xbf16> -> tensor<1x1x64x128xbf16>
      %extracted_slice_17 = tensor.extract_slice %pack_2[%arg3, 0, 0, 0] [1, 1, 64, 128] [1, 1, 1, 1] : tensor<32x1x64x128xbf16> to tensor<1x1x64x128xbf16>
      %extracted_slice_18 = tensor.extract_slice %11[%arg3, 0, 0, 0, 0, 0] [1, 1, 32, 8, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<32x1x32x8x8x4xbf16> to tensor<1x1x32x8x8x4xbf16>
      %pack_19 = tensor.pack %pack_16 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %extracted_slice_18 : tensor<1x1x64x128xbf16> -> tensor<1x1x32x8x8x4xbf16>
      %extracted_slice_20 = tensor.extract_slice %pack_4[%arg3, 0, 0, 0, 0, 0] [1, 1, 32, 8, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<32x1x32x8x8x4xbf16> to tensor<1x1x32x8x8x4xbf16>
      %17 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_12, %pack_19 : tensor<1x1x8x32x4x8xbf16>, tensor<1x1x32x8x8x4xbf16>) outs(%arg4 : tensor<1x1x32x32x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
      ^bb0(%in: bf16, %in_21: bf16, %out: bf16):
        %18 = arith.mulf %in, %in_21 : bf16
        %19 = arith.addf %out, %18 : bf16
        linalg.yield %19 : bf16
      } -> tensor<1x1x32x32x4x4xbf16>
      scf.yield %17 : tensor<1x1x32x32x4x4xbf16>
    }
    %unpack = tensor.unpack %14 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %9 : tensor<1x1x32x32x4x4xbf16> -> tensor<1x1x128x128xbf16>
    %unpack_6 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %extracted_slice_1 : tensor<1x1x128x128xbf16> -> tensor<128x128xbf16>
    memref.dealloc %alloc : memref<1x1x128x128xbf16, 1 : i32>
    memref.dealloc %alloc_5 : memref<1x1x32x32x4x4xbf16, 2 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_6 into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  return
}

// -----// IR Dump Before CSE (cse) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c1 = arith.constant 1 : index
  %c32 = arith.constant 32 : index
  %cst = arith.constant 0.000000e+00 : bf16
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %7 = tensor.empty() : tensor<1x32x128x64xbf16>
    %8 = tensor.empty() : tensor<32x1x64x128xbf16>
    %alloc = memref.alloc() : memref<1x1x128x128xbf16, 1 : i32>
    %9 = bufferization.to_tensor %alloc restrict writable : memref<1x1x128x128xbf16, 1 : i32>
    %10 = tensor.empty() : tensor<1x32x8x32x4x8xbf16>
    %11 = tensor.empty() : tensor<32x1x32x8x8x4xbf16>
    %alloc_2 = memref.alloc() : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %12 = bufferization.to_tensor %alloc_2 restrict writable : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %13 = linalg.fill ins(%cst : bf16) outs(%12 : tensor<1x1x32x32x4x4xbf16>) -> tensor<1x1x32x32x4x4xbf16>
    %14 = scf.for %arg3 = %c0 to %c32 step %c1 iter_args(%arg4 = %13) -> (tensor<1x1x32x32x4x4xbf16>) {
      %15 = affine.apply affine_map<(d0) -> (d0 * 64)>(%arg3)
      %extracted_slice_4 = tensor.extract_slice %extracted_slice[0, %15] [128, 64] [1, 1] : tensor<128x2048xbf16> to tensor<128x64xbf16>
      %extracted_slice_5 = tensor.extract_slice %7[0, %arg3, 0, 0] [1, 1, 128, 64] [1, 1, 1, 1] : tensor<1x32x128x64xbf16> to tensor<1x1x128x64xbf16>
      %pack = tensor.pack %extracted_slice_4 inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %extracted_slice_5 : tensor<128x64xbf16> -> tensor<1x1x128x64xbf16>
      %extracted_slice_6 = tensor.extract_slice %10[0, %arg3, 0, 0, 0, 0] [1, 1, 8, 32, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<1x32x8x32x4x8xbf16> to tensor<1x1x8x32x4x8xbf16>
      %pack_7 = tensor.pack %pack outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %extracted_slice_6 : tensor<1x1x128x64xbf16> -> tensor<1x1x8x32x4x8xbf16>
      %16 = affine.apply affine_map<(d0) -> (d0 * 64)>(%arg3)
      %extracted_slice_8 = tensor.extract_slice %extracted_slice_0[%16, 0] [64, 128] [1, 1] : tensor<2048x128xbf16> to tensor<64x128xbf16>
      %extracted_slice_9 = tensor.extract_slice %8[%arg3, 0, 0, 0] [1, 1, 64, 128] [1, 1, 1, 1] : tensor<32x1x64x128xbf16> to tensor<1x1x64x128xbf16>
      %pack_10 = tensor.pack %extracted_slice_8 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %extracted_slice_9 : tensor<64x128xbf16> -> tensor<1x1x64x128xbf16>
      %extracted_slice_11 = tensor.extract_slice %11[%arg3, 0, 0, 0, 0, 0] [1, 1, 32, 8, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<32x1x32x8x8x4xbf16> to tensor<1x1x32x8x8x4xbf16>
      %pack_12 = tensor.pack %pack_10 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %extracted_slice_11 : tensor<1x1x64x128xbf16> -> tensor<1x1x32x8x8x4xbf16>
      %17 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_7, %pack_12 : tensor<1x1x8x32x4x8xbf16>, tensor<1x1x32x8x8x4xbf16>) outs(%arg4 : tensor<1x1x32x32x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
      ^bb0(%in: bf16, %in_13: bf16, %out: bf16):
        %18 = arith.mulf %in, %in_13 : bf16
        %19 = arith.addf %out, %18 : bf16
        linalg.yield %19 : bf16
      } -> tensor<1x1x32x32x4x4xbf16>
      scf.yield %17 : tensor<1x1x32x32x4x4xbf16>
    }
    %unpack = tensor.unpack %14 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %9 : tensor<1x1x32x32x4x4xbf16> -> tensor<1x1x128x128xbf16>
    %unpack_3 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %extracted_slice_1 : tensor<1x1x128x128xbf16> -> tensor<128x128xbf16>
    memref.dealloc %alloc : memref<1x1x128x128xbf16, 1 : i32>
    memref.dealloc %alloc_2 : memref<1x1x32x32x4x4xbf16, 2 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_3 into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  return
}

// -----// IR Dump Before AMDAIEBufferizeToAllocation (iree-amdaie-bufferize-to-allocation) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c1 = arith.constant 1 : index
  %c32 = arith.constant 32 : index
  %cst = arith.constant 0.000000e+00 : bf16
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %7 = tensor.empty() : tensor<1x32x128x64xbf16>
    %8 = tensor.empty() : tensor<32x1x64x128xbf16>
    %alloc = memref.alloc() : memref<1x1x128x128xbf16, 1 : i32>
    %9 = bufferization.to_tensor %alloc restrict writable : memref<1x1x128x128xbf16, 1 : i32>
    %10 = tensor.empty() : tensor<1x32x8x32x4x8xbf16>
    %11 = tensor.empty() : tensor<32x1x32x8x8x4xbf16>
    %alloc_2 = memref.alloc() : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %12 = bufferization.to_tensor %alloc_2 restrict writable : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %13 = linalg.fill ins(%cst : bf16) outs(%12 : tensor<1x1x32x32x4x4xbf16>) -> tensor<1x1x32x32x4x4xbf16>
    %14 = scf.for %arg3 = %c0 to %c32 step %c1 iter_args(%arg4 = %13) -> (tensor<1x1x32x32x4x4xbf16>) {
      %15 = affine.apply affine_map<(d0) -> (d0 * 64)>(%arg3)
      %extracted_slice_4 = tensor.extract_slice %extracted_slice[0, %15] [128, 64] [1, 1] : tensor<128x2048xbf16> to tensor<128x64xbf16>
      %extracted_slice_5 = tensor.extract_slice %7[0, %arg3, 0, 0] [1, 1, 128, 64] [1, 1, 1, 1] : tensor<1x32x128x64xbf16> to tensor<1x1x128x64xbf16>
      %pack = tensor.pack %extracted_slice_4 inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %extracted_slice_5 : tensor<128x64xbf16> -> tensor<1x1x128x64xbf16>
      %extracted_slice_6 = tensor.extract_slice %10[0, %arg3, 0, 0, 0, 0] [1, 1, 8, 32, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<1x32x8x32x4x8xbf16> to tensor<1x1x8x32x4x8xbf16>
      %pack_7 = tensor.pack %pack outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %extracted_slice_6 : tensor<1x1x128x64xbf16> -> tensor<1x1x8x32x4x8xbf16>
      %extracted_slice_8 = tensor.extract_slice %extracted_slice_0[%15, 0] [64, 128] [1, 1] : tensor<2048x128xbf16> to tensor<64x128xbf16>
      %extracted_slice_9 = tensor.extract_slice %8[%arg3, 0, 0, 0] [1, 1, 64, 128] [1, 1, 1, 1] : tensor<32x1x64x128xbf16> to tensor<1x1x64x128xbf16>
      %pack_10 = tensor.pack %extracted_slice_8 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %extracted_slice_9 : tensor<64x128xbf16> -> tensor<1x1x64x128xbf16>
      %extracted_slice_11 = tensor.extract_slice %11[%arg3, 0, 0, 0, 0, 0] [1, 1, 32, 8, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<32x1x32x8x8x4xbf16> to tensor<1x1x32x8x8x4xbf16>
      %pack_12 = tensor.pack %pack_10 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %extracted_slice_11 : tensor<1x1x64x128xbf16> -> tensor<1x1x32x8x8x4xbf16>
      %16 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_7, %pack_12 : tensor<1x1x8x32x4x8xbf16>, tensor<1x1x32x8x8x4xbf16>) outs(%arg4 : tensor<1x1x32x32x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
      ^bb0(%in: bf16, %in_13: bf16, %out: bf16):
        %17 = arith.mulf %in, %in_13 : bf16
        %18 = arith.addf %out, %17 : bf16
        linalg.yield %18 : bf16
      } -> tensor<1x1x32x32x4x4xbf16>
      scf.yield %16 : tensor<1x1x32x32x4x4xbf16>
    }
    %unpack = tensor.unpack %14 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %9 : tensor<1x1x32x32x4x4xbf16> -> tensor<1x1x128x128xbf16>
    %unpack_3 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %extracted_slice_1 : tensor<1x1x128x128xbf16> -> tensor<128x128xbf16>
    memref.dealloc %alloc : memref<1x1x128x128xbf16, 1 : i32>
    memref.dealloc %alloc_2 : memref<1x1x32x32x4x4xbf16, 2 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_3 into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  return
}

// -----// IR Dump Before AMDAIETileAndFuse (iree-amdaie-tile-and-fuse) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c1 = arith.constant 1 : index
  %c32 = arith.constant 32 : index
  %cst = arith.constant 0.000000e+00 : bf16
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %7 = tensor.empty() : tensor<1x32x128x64xbf16>
    %8 = tensor.empty() : tensor<32x1x64x128xbf16>
    %alloc = memref.alloc() : memref<1x1x128x128xbf16, 1 : i32>
    %9 = bufferization.to_tensor %alloc restrict writable : memref<1x1x128x128xbf16, 1 : i32>
    %10 = tensor.empty() : tensor<1x32x8x32x4x8xbf16>
    %11 = tensor.empty() : tensor<32x1x32x8x8x4xbf16>
    %alloc_2 = memref.alloc() : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %12 = bufferization.to_tensor %alloc_2 restrict writable : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %13 = linalg.fill ins(%cst : bf16) outs(%12 : tensor<1x1x32x32x4x4xbf16>) -> tensor<1x1x32x32x4x4xbf16>
    %14 = scf.for %arg3 = %c0 to %c32 step %c1 iter_args(%arg4 = %13) -> (tensor<1x1x32x32x4x4xbf16>) {
      %15 = affine.apply affine_map<(d0) -> (d0 * 64)>(%arg3)
      %extracted_slice_4 = tensor.extract_slice %extracted_slice[0, %15] [128, 64] [1, 1] : tensor<128x2048xbf16> to tensor<128x64xbf16>
      %extracted_slice_5 = tensor.extract_slice %7[0, %arg3, 0, 0] [1, 1, 128, 64] [1, 1, 1, 1] : tensor<1x32x128x64xbf16> to tensor<1x1x128x64xbf16>
      %alloc_6 = memref.alloc() : memref<1x1x128x64xbf16, 1 : i32>
      %16 = bufferization.to_tensor %alloc_6 restrict writable : memref<1x1x128x64xbf16, 1 : i32>
      %pack = tensor.pack %extracted_slice_4 inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %16 : tensor<128x64xbf16> -> tensor<1x1x128x64xbf16>
      %extracted_slice_7 = tensor.extract_slice %10[0, %arg3, 0, 0, 0, 0] [1, 1, 8, 32, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<1x32x8x32x4x8xbf16> to tensor<1x1x8x32x4x8xbf16>
      %pack_8 = tensor.pack %pack outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %extracted_slice_7 : tensor<1x1x128x64xbf16> -> tensor<1x1x8x32x4x8xbf16>
      %extracted_slice_9 = tensor.extract_slice %extracted_slice_0[%15, 0] [64, 128] [1, 1] : tensor<2048x128xbf16> to tensor<64x128xbf16>
      %extracted_slice_10 = tensor.extract_slice %8[%arg3, 0, 0, 0] [1, 1, 64, 128] [1, 1, 1, 1] : tensor<32x1x64x128xbf16> to tensor<1x1x64x128xbf16>
      %alloc_11 = memref.alloc() : memref<1x1x64x128xbf16, 1 : i32>
      %17 = bufferization.to_tensor %alloc_11 restrict writable : memref<1x1x64x128xbf16, 1 : i32>
      %pack_12 = tensor.pack %extracted_slice_9 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %17 : tensor<64x128xbf16> -> tensor<1x1x64x128xbf16>
      %extracted_slice_13 = tensor.extract_slice %11[%arg3, 0, 0, 0, 0, 0] [1, 1, 32, 8, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<32x1x32x8x8x4xbf16> to tensor<1x1x32x8x8x4xbf16>
      %pack_14 = tensor.pack %pack_12 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %extracted_slice_13 : tensor<1x1x64x128xbf16> -> tensor<1x1x32x8x8x4xbf16>
      %18 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_8, %pack_14 : tensor<1x1x8x32x4x8xbf16>, tensor<1x1x32x8x8x4xbf16>) outs(%arg4 : tensor<1x1x32x32x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
      ^bb0(%in: bf16, %in_15: bf16, %out: bf16):
        %19 = arith.mulf %in, %in_15 : bf16
        %20 = arith.addf %out, %19 : bf16
        linalg.yield %20 : bf16
      } -> tensor<1x1x32x32x4x4xbf16>
      memref.dealloc %alloc_6 : memref<1x1x128x64xbf16, 1 : i32>
      memref.dealloc %alloc_11 : memref<1x1x64x128xbf16, 1 : i32>
      scf.yield %18 : tensor<1x1x32x32x4x4xbf16>
    }
    %unpack = tensor.unpack %14 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %9 : tensor<1x1x32x32x4x4xbf16> -> tensor<1x1x128x128xbf16>
    %unpack_3 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %extracted_slice_1 : tensor<1x1x128x128xbf16> -> tensor<128x128xbf16>
    memref.dealloc %alloc : memref<1x1x128x128xbf16, 1 : i32>
    memref.dealloc %alloc_2 : memref<1x1x32x32x4x4xbf16, 2 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_3 into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  return
}

// -----// IR Dump Before AMDAIECleanup (iree-amdaie-cleanup) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c1 = arith.constant 1 : index
  %c32 = arith.constant 32 : index
  %cst = arith.constant 0.000000e+00 : bf16
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %7 = tensor.empty() : tensor<1x32x128x64xbf16>
    %8 = tensor.empty() : tensor<32x1x64x128xbf16>
    %alloc = memref.alloc() : memref<1x1x128x128xbf16, 1 : i32>
    %9 = bufferization.to_tensor %alloc restrict writable : memref<1x1x128x128xbf16, 1 : i32>
    %10 = tensor.empty() : tensor<1x32x8x32x4x8xbf16>
    %11 = tensor.empty() : tensor<32x1x32x8x8x4xbf16>
    %alloc_2 = memref.alloc() : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %12 = bufferization.to_tensor %alloc_2 restrict writable : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %13 = linalg.fill ins(%cst : bf16) outs(%12 : tensor<1x1x32x32x4x4xbf16>) -> tensor<1x1x32x32x4x4xbf16>
    %14 = scf.for %arg3 = %c0 to %c32 step %c1 iter_args(%arg4 = %13) -> (tensor<1x1x32x32x4x4xbf16>) {
      %15 = affine.apply affine_map<(d0) -> (d0 * 64)>(%arg3)
      %extracted_slice_4 = tensor.extract_slice %extracted_slice[0, %15] [128, 64] [1, 1] : tensor<128x2048xbf16> to tensor<128x64xbf16>
      %extracted_slice_5 = tensor.extract_slice %7[0, %arg3, 0, 0] [1, 1, 128, 64] [1, 1, 1, 1] : tensor<1x32x128x64xbf16> to tensor<1x1x128x64xbf16>
      %alloc_6 = memref.alloc() : memref<1x1x128x64xbf16, 1 : i32>
      %16 = bufferization.to_tensor %alloc_6 restrict writable : memref<1x1x128x64xbf16, 1 : i32>
      %pack = tensor.pack %extracted_slice_4 inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %16 : tensor<128x64xbf16> -> tensor<1x1x128x64xbf16>
      %extracted_slice_7 = tensor.extract_slice %10[0, %arg3, 0, 0, 0, 0] [1, 1, 8, 32, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<1x32x8x32x4x8xbf16> to tensor<1x1x8x32x4x8xbf16>
      %pack_8 = tensor.pack %pack outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %extracted_slice_7 : tensor<1x1x128x64xbf16> -> tensor<1x1x8x32x4x8xbf16>
      %extracted_slice_9 = tensor.extract_slice %extracted_slice_0[%15, 0] [64, 128] [1, 1] : tensor<2048x128xbf16> to tensor<64x128xbf16>
      %extracted_slice_10 = tensor.extract_slice %8[%arg3, 0, 0, 0] [1, 1, 64, 128] [1, 1, 1, 1] : tensor<32x1x64x128xbf16> to tensor<1x1x64x128xbf16>
      %alloc_11 = memref.alloc() : memref<1x1x64x128xbf16, 1 : i32>
      %17 = bufferization.to_tensor %alloc_11 restrict writable : memref<1x1x64x128xbf16, 1 : i32>
      %pack_12 = tensor.pack %extracted_slice_9 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %17 : tensor<64x128xbf16> -> tensor<1x1x64x128xbf16>
      %extracted_slice_13 = tensor.extract_slice %11[%arg3, 0, 0, 0, 0, 0] [1, 1, 32, 8, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<32x1x32x8x8x4xbf16> to tensor<1x1x32x8x8x4xbf16>
      %pack_14 = tensor.pack %pack_12 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %extracted_slice_13 : tensor<1x1x64x128xbf16> -> tensor<1x1x32x8x8x4xbf16>
      %18 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_8, %pack_14 : tensor<1x1x8x32x4x8xbf16>, tensor<1x1x32x8x8x4xbf16>) outs(%arg4 : tensor<1x1x32x32x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
      ^bb0(%in: bf16, %in_15: bf16, %out: bf16):
        %20 = arith.mulf %in, %in_15 : bf16
        %21 = arith.addf %out, %20 : bf16
        linalg.yield %21 : bf16
      } -> tensor<1x1x32x32x4x4xbf16>
      %19 = scf.forall (%arg5, %arg6) = (0, 0) to (32, 32) step (16, 16) shared_outs(%arg7 = %arg4) -> (tensor<1x1x32x32x4x4xbf16>) {
        %extracted_slice_15 = tensor.extract_slice %pack_8[0, 0, 0, %arg5, 0, 0] [1, 1, 8, 16, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x32x4x8xbf16> to tensor<1x1x8x16x4x8xbf16>
        %extracted_slice_16 = tensor.extract_slice %pack_14[0, 0, %arg6, 0, 0, 0] [1, 1, 16, 8, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x8x8x4xbf16> to tensor<1x1x16x8x8x4xbf16>
        %extracted_slice_17 = tensor.extract_slice %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x32x4x4xbf16> to tensor<1x1x16x16x4x4xbf16>
        %20 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%extracted_slice_15, %extracted_slice_16 : tensor<1x1x8x16x4x8xbf16>, tensor<1x1x16x8x8x4xbf16>) outs(%extracted_slice_17 : tensor<1x1x16x16x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
        ^bb0(%in: bf16, %in_18: bf16, %out: bf16):
          %21 = arith.mulf %in, %in_18 : bf16
          %22 = arith.addf %out, %21 : bf16
          linalg.yield %22 : bf16
        } -> tensor<1x1x16x16x4x4xbf16>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %20 into %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x16x16x4x4xbf16> into tensor<1x1x32x32x4x4xbf16>
        }
      } {mapping = [#gpu.block<y>, #gpu.block<x>]}
      memref.dealloc %alloc_6 : memref<1x1x128x64xbf16, 1 : i32>
      memref.dealloc %alloc_11 : memref<1x1x64x128xbf16, 1 : i32>
      scf.yield %19 : tensor<1x1x32x32x4x4xbf16>
    }
    %unpack = tensor.unpack %14 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %9 : tensor<1x1x32x32x4x4xbf16> -> tensor<1x1x128x128xbf16>
    %unpack_3 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %extracted_slice_1 : tensor<1x1x128x128xbf16> -> tensor<128x128xbf16>
    memref.dealloc %alloc : memref<1x1x128x128xbf16, 1 : i32>
    memref.dealloc %alloc_2 : memref<1x1x32x32x4x4xbf16, 2 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_3 into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  return
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c1 = arith.constant 1 : index
  %c32 = arith.constant 32 : index
  %cst = arith.constant 0.000000e+00 : bf16
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %alloc = memref.alloc() : memref<1x1x128x128xbf16, 1 : i32>
    %7 = bufferization.to_tensor %alloc restrict writable : memref<1x1x128x128xbf16, 1 : i32>
    %alloc_2 = memref.alloc() : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %8 = bufferization.to_tensor %alloc_2 restrict writable : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %9 = linalg.fill ins(%cst : bf16) outs(%8 : tensor<1x1x32x32x4x4xbf16>) -> tensor<1x1x32x32x4x4xbf16>
    %10 = tensor.empty() : tensor<1x1x8x32x4x8xbf16>
    %11 = tensor.empty() : tensor<1x1x32x8x8x4xbf16>
    %12 = scf.for %arg3 = %c0 to %c32 step %c1 iter_args(%arg4 = %9) -> (tensor<1x1x32x32x4x4xbf16>) {
      %13 = affine.apply affine_map<(d0) -> (d0 * 64)>(%arg3)
      %extracted_slice_4 = tensor.extract_slice %extracted_slice[0, %13] [128, 64] [1, 1] : tensor<128x2048xbf16> to tensor<128x64xbf16>
      %alloc_5 = memref.alloc() : memref<1x1x128x64xbf16, 1 : i32>
      %14 = bufferization.to_tensor %alloc_5 restrict writable : memref<1x1x128x64xbf16, 1 : i32>
      %pack = tensor.pack %extracted_slice_4 inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %14 : tensor<128x64xbf16> -> tensor<1x1x128x64xbf16>
      %pack_6 = tensor.pack %pack outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %10 : tensor<1x1x128x64xbf16> -> tensor<1x1x8x32x4x8xbf16>
      %extracted_slice_7 = tensor.extract_slice %extracted_slice_0[%13, 0] [64, 128] [1, 1] : tensor<2048x128xbf16> to tensor<64x128xbf16>
      %alloc_8 = memref.alloc() : memref<1x1x64x128xbf16, 1 : i32>
      %15 = bufferization.to_tensor %alloc_8 restrict writable : memref<1x1x64x128xbf16, 1 : i32>
      %pack_9 = tensor.pack %extracted_slice_7 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %15 : tensor<64x128xbf16> -> tensor<1x1x64x128xbf16>
      %pack_10 = tensor.pack %pack_9 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %11 : tensor<1x1x64x128xbf16> -> tensor<1x1x32x8x8x4xbf16>
      %16 = scf.forall (%arg5, %arg6) = (0, 0) to (32, 32) step (16, 16) shared_outs(%arg7 = %arg4) -> (tensor<1x1x32x32x4x4xbf16>) {
        %extracted_slice_11 = tensor.extract_slice %pack_6[0, 0, 0, %arg5, 0, 0] [1, 1, 8, 16, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x32x4x8xbf16> to tensor<1x1x8x16x4x8xbf16>
        %extracted_slice_12 = tensor.extract_slice %pack_10[0, 0, %arg6, 0, 0, 0] [1, 1, 16, 8, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x8x8x4xbf16> to tensor<1x1x16x8x8x4xbf16>
        %extracted_slice_13 = tensor.extract_slice %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x32x4x4xbf16> to tensor<1x1x16x16x4x4xbf16>
        %17 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%extracted_slice_11, %extracted_slice_12 : tensor<1x1x8x16x4x8xbf16>, tensor<1x1x16x8x8x4xbf16>) outs(%extracted_slice_13 : tensor<1x1x16x16x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
        ^bb0(%in: bf16, %in_14: bf16, %out: bf16):
          %18 = arith.mulf %in, %in_14 : bf16
          %19 = arith.addf %out, %18 : bf16
          linalg.yield %19 : bf16
        } -> tensor<1x1x16x16x4x4xbf16>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %17 into %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x16x16x4x4xbf16> into tensor<1x1x32x32x4x4xbf16>
        }
      } {mapping = [#gpu.block<y>, #gpu.block<x>]}
      memref.dealloc %alloc_5 : memref<1x1x128x64xbf16, 1 : i32>
      memref.dealloc %alloc_8 : memref<1x1x64x128xbf16, 1 : i32>
      scf.yield %16 : tensor<1x1x32x32x4x4xbf16>
    }
    %unpack = tensor.unpack %12 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %7 : tensor<1x1x32x32x4x4xbf16> -> tensor<1x1x128x128xbf16>
    %unpack_3 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %extracted_slice_1 : tensor<1x1x128x128xbf16> -> tensor<128x128xbf16>
    memref.dealloc %alloc : memref<1x1x128x128xbf16, 1 : i32>
    memref.dealloc %alloc_2 : memref<1x1x32x32x4x4xbf16, 2 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_3 into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  return
}

// -----// IR Dump Before CSE (cse) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c1 = arith.constant 1 : index
  %c32 = arith.constant 32 : index
  %cst = arith.constant 0.000000e+00 : bf16
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %alloc = memref.alloc() : memref<1x1x128x128xbf16, 1 : i32>
    %7 = bufferization.to_tensor %alloc restrict writable : memref<1x1x128x128xbf16, 1 : i32>
    %alloc_2 = memref.alloc() : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %8 = bufferization.to_tensor %alloc_2 restrict writable : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %9 = linalg.fill ins(%cst : bf16) outs(%8 : tensor<1x1x32x32x4x4xbf16>) -> tensor<1x1x32x32x4x4xbf16>
    %10 = tensor.empty() : tensor<1x1x8x32x4x8xbf16>
    %11 = tensor.empty() : tensor<1x1x32x8x8x4xbf16>
    %12 = scf.for %arg3 = %c0 to %c32 step %c1 iter_args(%arg4 = %9) -> (tensor<1x1x32x32x4x4xbf16>) {
      %13 = affine.apply affine_map<(d0) -> (d0 * 64)>(%arg3)
      %extracted_slice_4 = tensor.extract_slice %extracted_slice[0, %13] [128, 64] [1, 1] : tensor<128x2048xbf16> to tensor<128x64xbf16>
      %alloc_5 = memref.alloc() : memref<1x1x128x64xbf16, 1 : i32>
      %14 = bufferization.to_tensor %alloc_5 restrict writable : memref<1x1x128x64xbf16, 1 : i32>
      %pack = tensor.pack %extracted_slice_4 inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %14 : tensor<128x64xbf16> -> tensor<1x1x128x64xbf16>
      %pack_6 = tensor.pack %pack outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %10 : tensor<1x1x128x64xbf16> -> tensor<1x1x8x32x4x8xbf16>
      %extracted_slice_7 = tensor.extract_slice %extracted_slice_0[%13, 0] [64, 128] [1, 1] : tensor<2048x128xbf16> to tensor<64x128xbf16>
      %alloc_8 = memref.alloc() : memref<1x1x64x128xbf16, 1 : i32>
      %15 = bufferization.to_tensor %alloc_8 restrict writable : memref<1x1x64x128xbf16, 1 : i32>
      %pack_9 = tensor.pack %extracted_slice_7 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %15 : tensor<64x128xbf16> -> tensor<1x1x64x128xbf16>
      %pack_10 = tensor.pack %pack_9 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %11 : tensor<1x1x64x128xbf16> -> tensor<1x1x32x8x8x4xbf16>
      %16 = scf.forall (%arg5, %arg6) = (0, 0) to (32, 32) step (16, 16) shared_outs(%arg7 = %arg4) -> (tensor<1x1x32x32x4x4xbf16>) {
        %extracted_slice_11 = tensor.extract_slice %pack_6[0, 0, 0, %arg5, 0, 0] [1, 1, 8, 16, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x32x4x8xbf16> to tensor<1x1x8x16x4x8xbf16>
        %extracted_slice_12 = tensor.extract_slice %pack_10[0, 0, %arg6, 0, 0, 0] [1, 1, 16, 8, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x8x8x4xbf16> to tensor<1x1x16x8x8x4xbf16>
        %extracted_slice_13 = tensor.extract_slice %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x32x4x4xbf16> to tensor<1x1x16x16x4x4xbf16>
        %17 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%extracted_slice_11, %extracted_slice_12 : tensor<1x1x8x16x4x8xbf16>, tensor<1x1x16x8x8x4xbf16>) outs(%extracted_slice_13 : tensor<1x1x16x16x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
        ^bb0(%in: bf16, %in_14: bf16, %out: bf16):
          %18 = arith.mulf %in, %in_14 : bf16
          %19 = arith.addf %out, %18 : bf16
          linalg.yield %19 : bf16
        } -> tensor<1x1x16x16x4x4xbf16>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %17 into %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x16x16x4x4xbf16> into tensor<1x1x32x32x4x4xbf16>
        }
      } {mapping = [#gpu.block<y>, #gpu.block<x>]}
      memref.dealloc %alloc_5 : memref<1x1x128x64xbf16, 1 : i32>
      memref.dealloc %alloc_8 : memref<1x1x64x128xbf16, 1 : i32>
      scf.yield %16 : tensor<1x1x32x32x4x4xbf16>
    }
    %unpack = tensor.unpack %12 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %7 : tensor<1x1x32x32x4x4xbf16> -> tensor<1x1x128x128xbf16>
    %unpack_3 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %extracted_slice_1 : tensor<1x1x128x128xbf16> -> tensor<128x128xbf16>
    memref.dealloc %alloc : memref<1x1x128x128xbf16, 1 : i32>
    memref.dealloc %alloc_2 : memref<1x1x32x32x4x4xbf16, 2 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_3 into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  return
}

// -----// IR Dump Before AMDAIEFusePackIntoLoop (iree-amdaie-fuse-pack-into-loop) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c1 = arith.constant 1 : index
  %c32 = arith.constant 32 : index
  %cst = arith.constant 0.000000e+00 : bf16
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %alloc = memref.alloc() : memref<1x1x128x128xbf16, 1 : i32>
    %7 = bufferization.to_tensor %alloc restrict writable : memref<1x1x128x128xbf16, 1 : i32>
    %alloc_2 = memref.alloc() : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %8 = bufferization.to_tensor %alloc_2 restrict writable : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %9 = linalg.fill ins(%cst : bf16) outs(%8 : tensor<1x1x32x32x4x4xbf16>) -> tensor<1x1x32x32x4x4xbf16>
    %10 = tensor.empty() : tensor<1x1x8x32x4x8xbf16>
    %11 = tensor.empty() : tensor<1x1x32x8x8x4xbf16>
    %12 = scf.for %arg3 = %c0 to %c32 step %c1 iter_args(%arg4 = %9) -> (tensor<1x1x32x32x4x4xbf16>) {
      %13 = affine.apply affine_map<(d0) -> (d0 * 64)>(%arg3)
      %extracted_slice_4 = tensor.extract_slice %extracted_slice[0, %13] [128, 64] [1, 1] : tensor<128x2048xbf16> to tensor<128x64xbf16>
      %alloc_5 = memref.alloc() : memref<1x1x128x64xbf16, 1 : i32>
      %14 = bufferization.to_tensor %alloc_5 restrict writable : memref<1x1x128x64xbf16, 1 : i32>
      %pack = tensor.pack %extracted_slice_4 inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %14 : tensor<128x64xbf16> -> tensor<1x1x128x64xbf16>
      %pack_6 = tensor.pack %pack outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %10 : tensor<1x1x128x64xbf16> -> tensor<1x1x8x32x4x8xbf16>
      %extracted_slice_7 = tensor.extract_slice %extracted_slice_0[%13, 0] [64, 128] [1, 1] : tensor<2048x128xbf16> to tensor<64x128xbf16>
      %alloc_8 = memref.alloc() : memref<1x1x64x128xbf16, 1 : i32>
      %15 = bufferization.to_tensor %alloc_8 restrict writable : memref<1x1x64x128xbf16, 1 : i32>
      %pack_9 = tensor.pack %extracted_slice_7 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %15 : tensor<64x128xbf16> -> tensor<1x1x64x128xbf16>
      %pack_10 = tensor.pack %pack_9 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %11 : tensor<1x1x64x128xbf16> -> tensor<1x1x32x8x8x4xbf16>
      %16 = scf.forall (%arg5, %arg6) = (0, 0) to (32, 32) step (16, 16) shared_outs(%arg7 = %arg4) -> (tensor<1x1x32x32x4x4xbf16>) {
        %extracted_slice_11 = tensor.extract_slice %pack_6[0, 0, 0, %arg5, 0, 0] [1, 1, 8, 16, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x32x4x8xbf16> to tensor<1x1x8x16x4x8xbf16>
        %extracted_slice_12 = tensor.extract_slice %pack_10[0, 0, %arg6, 0, 0, 0] [1, 1, 16, 8, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x8x8x4xbf16> to tensor<1x1x16x8x8x4xbf16>
        %extracted_slice_13 = tensor.extract_slice %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x32x4x4xbf16> to tensor<1x1x16x16x4x4xbf16>
        %17 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%extracted_slice_11, %extracted_slice_12 : tensor<1x1x8x16x4x8xbf16>, tensor<1x1x16x8x8x4xbf16>) outs(%extracted_slice_13 : tensor<1x1x16x16x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
        ^bb0(%in: bf16, %in_14: bf16, %out: bf16):
          %18 = arith.mulf %in, %in_14 : bf16
          %19 = arith.addf %out, %18 : bf16
          linalg.yield %19 : bf16
        } -> tensor<1x1x16x16x4x4xbf16>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %17 into %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x16x16x4x4xbf16> into tensor<1x1x32x32x4x4xbf16>
        }
      } {mapping = [#gpu.block<y>, #gpu.block<x>]}
      memref.dealloc %alloc_5 : memref<1x1x128x64xbf16, 1 : i32>
      memref.dealloc %alloc_8 : memref<1x1x64x128xbf16, 1 : i32>
      scf.yield %16 : tensor<1x1x32x32x4x4xbf16>
    }
    %unpack = tensor.unpack %12 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %7 : tensor<1x1x32x32x4x4xbf16> -> tensor<1x1x128x128xbf16>
    %unpack_3 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %extracted_slice_1 : tensor<1x1x128x128xbf16> -> tensor<128x128xbf16>
    memref.dealloc %alloc : memref<1x1x128x128xbf16, 1 : i32>
    memref.dealloc %alloc_2 : memref<1x1x32x32x4x4xbf16, 2 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_3 into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  return
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c1 = arith.constant 1 : index
  %c32 = arith.constant 32 : index
  %cst = arith.constant 0.000000e+00 : bf16
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %alloc = memref.alloc() : memref<1x1x128x128xbf16, 1 : i32>
    %7 = bufferization.to_tensor %alloc restrict writable : memref<1x1x128x128xbf16, 1 : i32>
    %alloc_2 = memref.alloc() : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %8 = bufferization.to_tensor %alloc_2 restrict writable : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %9 = linalg.fill ins(%cst : bf16) outs(%8 : tensor<1x1x32x32x4x4xbf16>) -> tensor<1x1x32x32x4x4xbf16>
    %10 = tensor.empty() : tensor<1x1x8x32x4x8xbf16>
    %11 = tensor.empty() : tensor<1x1x32x8x8x4xbf16>
    %12 = scf.for %arg3 = %c0 to %c32 step %c1 iter_args(%arg4 = %9) -> (tensor<1x1x32x32x4x4xbf16>) {
      %13 = affine.apply affine_map<(d0) -> (d0 * 64)>(%arg3)
      %extracted_slice_4 = tensor.extract_slice %extracted_slice[0, %13] [128, 64] [1, 1] : tensor<128x2048xbf16> to tensor<128x64xbf16>
      %alloc_5 = memref.alloc() : memref<1x1x128x64xbf16, 1 : i32>
      %14 = bufferization.to_tensor %alloc_5 restrict writable : memref<1x1x128x64xbf16, 1 : i32>
      %pack = tensor.pack %extracted_slice_4 inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %14 : tensor<128x64xbf16> -> tensor<1x1x128x64xbf16>
      %pack_6 = tensor.pack %pack outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %10 : tensor<1x1x128x64xbf16> -> tensor<1x1x8x32x4x8xbf16>
      %extracted_slice_7 = tensor.extract_slice %extracted_slice_0[%13, 0] [64, 128] [1, 1] : tensor<2048x128xbf16> to tensor<64x128xbf16>
      %alloc_8 = memref.alloc() : memref<1x1x64x128xbf16, 1 : i32>
      %15 = bufferization.to_tensor %alloc_8 restrict writable : memref<1x1x64x128xbf16, 1 : i32>
      %pack_9 = tensor.pack %extracted_slice_7 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %15 : tensor<64x128xbf16> -> tensor<1x1x64x128xbf16>
      %pack_10 = tensor.pack %pack_9 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %11 : tensor<1x1x64x128xbf16> -> tensor<1x1x32x8x8x4xbf16>
      %16 = scf.forall (%arg5, %arg6) = (0, 0) to (32, 32) step (16, 16) shared_outs(%arg7 = %arg4) -> (tensor<1x1x32x32x4x4xbf16>) {
        %17 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg5)
        %extracted_slice_11 = tensor.extract_slice %pack[0, 0, %17, 0] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x128x64xbf16> to tensor<1x1x64x64xbf16>
        %extracted_slice_12 = tensor.extract_slice %10[0, 0, 0, %arg5, 0, 0] [1, 1, 8, 16, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x32x4x8xbf16> to tensor<1x1x8x16x4x8xbf16>
        %pack_13 = tensor.pack %extracted_slice_11 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %extracted_slice_12 : tensor<1x1x64x64xbf16> -> tensor<1x1x8x16x4x8xbf16>
        %extracted_slice_14 = tensor.extract_slice %pack_6[0, 0, 0, %arg5, 0, 0] [1, 1, 8, 16, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x32x4x8xbf16> to tensor<1x1x8x16x4x8xbf16>
        %18 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg6)
        %extracted_slice_15 = tensor.extract_slice %pack_9[0, 0, 0, %18] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x64x128xbf16> to tensor<1x1x64x64xbf16>
        %extracted_slice_16 = tensor.extract_slice %11[0, 0, %arg6, 0, 0, 0] [1, 1, 16, 8, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x8x8x4xbf16> to tensor<1x1x16x8x8x4xbf16>
        %pack_17 = tensor.pack %extracted_slice_15 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %extracted_slice_16 : tensor<1x1x64x64xbf16> -> tensor<1x1x16x8x8x4xbf16>
        %extracted_slice_18 = tensor.extract_slice %pack_10[0, 0, %arg6, 0, 0, 0] [1, 1, 16, 8, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x8x8x4xbf16> to tensor<1x1x16x8x8x4xbf16>
        %extracted_slice_19 = tensor.extract_slice %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x32x4x4xbf16> to tensor<1x1x16x16x4x4xbf16>
        %19 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_13, %pack_17 : tensor<1x1x8x16x4x8xbf16>, tensor<1x1x16x8x8x4xbf16>) outs(%extracted_slice_19 : tensor<1x1x16x16x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
        ^bb0(%in: bf16, %in_20: bf16, %out: bf16):
          %20 = arith.mulf %in, %in_20 : bf16
          %21 = arith.addf %out, %20 : bf16
          linalg.yield %21 : bf16
        } -> tensor<1x1x16x16x4x4xbf16>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %19 into %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x16x16x4x4xbf16> into tensor<1x1x32x32x4x4xbf16>
        }
      } {mapping = [#gpu.block<y>, #gpu.block<x>]}
      memref.dealloc %alloc_5 : memref<1x1x128x64xbf16, 1 : i32>
      memref.dealloc %alloc_8 : memref<1x1x64x128xbf16, 1 : i32>
      scf.yield %16 : tensor<1x1x32x32x4x4xbf16>
    }
    %unpack = tensor.unpack %12 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %7 : tensor<1x1x32x32x4x4xbf16> -> tensor<1x1x128x128xbf16>
    %unpack_3 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %extracted_slice_1 : tensor<1x1x128x128xbf16> -> tensor<128x128xbf16>
    memref.dealloc %alloc : memref<1x1x128x128xbf16, 1 : i32>
    memref.dealloc %alloc_2 : memref<1x1x32x32x4x4xbf16, 2 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_3 into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  return
}

// -----// IR Dump Before CSE (cse) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c1 = arith.constant 1 : index
  %c32 = arith.constant 32 : index
  %cst = arith.constant 0.000000e+00 : bf16
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %alloc = memref.alloc() : memref<1x1x128x128xbf16, 1 : i32>
    %7 = bufferization.to_tensor %alloc restrict writable : memref<1x1x128x128xbf16, 1 : i32>
    %alloc_2 = memref.alloc() : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %8 = bufferization.to_tensor %alloc_2 restrict writable : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %9 = linalg.fill ins(%cst : bf16) outs(%8 : tensor<1x1x32x32x4x4xbf16>) -> tensor<1x1x32x32x4x4xbf16>
    %10 = tensor.empty() : tensor<1x1x8x32x4x8xbf16>
    %11 = tensor.empty() : tensor<1x1x32x8x8x4xbf16>
    %12 = scf.for %arg3 = %c0 to %c32 step %c1 iter_args(%arg4 = %9) -> (tensor<1x1x32x32x4x4xbf16>) {
      %13 = affine.apply affine_map<(d0) -> (d0 * 64)>(%arg3)
      %extracted_slice_4 = tensor.extract_slice %extracted_slice[0, %13] [128, 64] [1, 1] : tensor<128x2048xbf16> to tensor<128x64xbf16>
      %alloc_5 = memref.alloc() : memref<1x1x128x64xbf16, 1 : i32>
      %14 = bufferization.to_tensor %alloc_5 restrict writable : memref<1x1x128x64xbf16, 1 : i32>
      %pack = tensor.pack %extracted_slice_4 inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %14 : tensor<128x64xbf16> -> tensor<1x1x128x64xbf16>
      %extracted_slice_6 = tensor.extract_slice %extracted_slice_0[%13, 0] [64, 128] [1, 1] : tensor<2048x128xbf16> to tensor<64x128xbf16>
      %alloc_7 = memref.alloc() : memref<1x1x64x128xbf16, 1 : i32>
      %15 = bufferization.to_tensor %alloc_7 restrict writable : memref<1x1x64x128xbf16, 1 : i32>
      %pack_8 = tensor.pack %extracted_slice_6 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %15 : tensor<64x128xbf16> -> tensor<1x1x64x128xbf16>
      %16 = scf.forall (%arg5, %arg6) = (0, 0) to (32, 32) step (16, 16) shared_outs(%arg7 = %arg4) -> (tensor<1x1x32x32x4x4xbf16>) {
        %17 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg5)
        %extracted_slice_9 = tensor.extract_slice %pack[0, 0, %17, 0] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x128x64xbf16> to tensor<1x1x64x64xbf16>
        %extracted_slice_10 = tensor.extract_slice %10[0, 0, 0, %arg5, 0, 0] [1, 1, 8, 16, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x32x4x8xbf16> to tensor<1x1x8x16x4x8xbf16>
        %pack_11 = tensor.pack %extracted_slice_9 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %extracted_slice_10 : tensor<1x1x64x64xbf16> -> tensor<1x1x8x16x4x8xbf16>
        %18 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg6)
        %extracted_slice_12 = tensor.extract_slice %pack_8[0, 0, 0, %18] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x64x128xbf16> to tensor<1x1x64x64xbf16>
        %extracted_slice_13 = tensor.extract_slice %11[0, 0, %arg6, 0, 0, 0] [1, 1, 16, 8, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x8x8x4xbf16> to tensor<1x1x16x8x8x4xbf16>
        %pack_14 = tensor.pack %extracted_slice_12 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %extracted_slice_13 : tensor<1x1x64x64xbf16> -> tensor<1x1x16x8x8x4xbf16>
        %extracted_slice_15 = tensor.extract_slice %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x32x4x4xbf16> to tensor<1x1x16x16x4x4xbf16>
        %19 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_11, %pack_14 : tensor<1x1x8x16x4x8xbf16>, tensor<1x1x16x8x8x4xbf16>) outs(%extracted_slice_15 : tensor<1x1x16x16x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
        ^bb0(%in: bf16, %in_16: bf16, %out: bf16):
          %20 = arith.mulf %in, %in_16 : bf16
          %21 = arith.addf %out, %20 : bf16
          linalg.yield %21 : bf16
        } -> tensor<1x1x16x16x4x4xbf16>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %19 into %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x16x16x4x4xbf16> into tensor<1x1x32x32x4x4xbf16>
        }
      } {mapping = [#gpu.block<y>, #gpu.block<x>]}
      memref.dealloc %alloc_5 : memref<1x1x128x64xbf16, 1 : i32>
      memref.dealloc %alloc_7 : memref<1x1x64x128xbf16, 1 : i32>
      scf.yield %16 : tensor<1x1x32x32x4x4xbf16>
    }
    %unpack = tensor.unpack %12 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %7 : tensor<1x1x32x32x4x4xbf16> -> tensor<1x1x128x128xbf16>
    %unpack_3 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %extracted_slice_1 : tensor<1x1x128x128xbf16> -> tensor<128x128xbf16>
    memref.dealloc %alloc : memref<1x1x128x128xbf16, 1 : i32>
    memref.dealloc %alloc_2 : memref<1x1x32x32x4x4xbf16, 2 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_3 into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  return
}

// -----// IR Dump Before AMDAIEBufferizeToAllocation (iree-amdaie-bufferize-to-allocation) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c1 = arith.constant 1 : index
  %c32 = arith.constant 32 : index
  %cst = arith.constant 0.000000e+00 : bf16
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %alloc = memref.alloc() : memref<1x1x128x128xbf16, 1 : i32>
    %7 = bufferization.to_tensor %alloc restrict writable : memref<1x1x128x128xbf16, 1 : i32>
    %alloc_2 = memref.alloc() : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %8 = bufferization.to_tensor %alloc_2 restrict writable : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %9 = linalg.fill ins(%cst : bf16) outs(%8 : tensor<1x1x32x32x4x4xbf16>) -> tensor<1x1x32x32x4x4xbf16>
    %10 = tensor.empty() : tensor<1x1x8x32x4x8xbf16>
    %11 = tensor.empty() : tensor<1x1x32x8x8x4xbf16>
    %12 = scf.for %arg3 = %c0 to %c32 step %c1 iter_args(%arg4 = %9) -> (tensor<1x1x32x32x4x4xbf16>) {
      %13 = affine.apply affine_map<(d0) -> (d0 * 64)>(%arg3)
      %extracted_slice_4 = tensor.extract_slice %extracted_slice[0, %13] [128, 64] [1, 1] : tensor<128x2048xbf16> to tensor<128x64xbf16>
      %alloc_5 = memref.alloc() : memref<1x1x128x64xbf16, 1 : i32>
      %14 = bufferization.to_tensor %alloc_5 restrict writable : memref<1x1x128x64xbf16, 1 : i32>
      %pack = tensor.pack %extracted_slice_4 inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %14 : tensor<128x64xbf16> -> tensor<1x1x128x64xbf16>
      %extracted_slice_6 = tensor.extract_slice %extracted_slice_0[%13, 0] [64, 128] [1, 1] : tensor<2048x128xbf16> to tensor<64x128xbf16>
      %alloc_7 = memref.alloc() : memref<1x1x64x128xbf16, 1 : i32>
      %15 = bufferization.to_tensor %alloc_7 restrict writable : memref<1x1x64x128xbf16, 1 : i32>
      %pack_8 = tensor.pack %extracted_slice_6 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %15 : tensor<64x128xbf16> -> tensor<1x1x64x128xbf16>
      %16 = scf.forall (%arg5, %arg6) = (0, 0) to (32, 32) step (16, 16) shared_outs(%arg7 = %arg4) -> (tensor<1x1x32x32x4x4xbf16>) {
        %17 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg5)
        %extracted_slice_9 = tensor.extract_slice %pack[0, 0, %17, 0] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x128x64xbf16> to tensor<1x1x64x64xbf16>
        %extracted_slice_10 = tensor.extract_slice %10[0, 0, 0, %arg5, 0, 0] [1, 1, 8, 16, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x32x4x8xbf16> to tensor<1x1x8x16x4x8xbf16>
        %pack_11 = tensor.pack %extracted_slice_9 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %extracted_slice_10 : tensor<1x1x64x64xbf16> -> tensor<1x1x8x16x4x8xbf16>
        %18 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg6)
        %extracted_slice_12 = tensor.extract_slice %pack_8[0, 0, 0, %18] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x64x128xbf16> to tensor<1x1x64x64xbf16>
        %extracted_slice_13 = tensor.extract_slice %11[0, 0, %arg6, 0, 0, 0] [1, 1, 16, 8, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x8x8x4xbf16> to tensor<1x1x16x8x8x4xbf16>
        %pack_14 = tensor.pack %extracted_slice_12 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %extracted_slice_13 : tensor<1x1x64x64xbf16> -> tensor<1x1x16x8x8x4xbf16>
        %extracted_slice_15 = tensor.extract_slice %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x32x4x4xbf16> to tensor<1x1x16x16x4x4xbf16>
        %19 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_11, %pack_14 : tensor<1x1x8x16x4x8xbf16>, tensor<1x1x16x8x8x4xbf16>) outs(%extracted_slice_15 : tensor<1x1x16x16x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
        ^bb0(%in: bf16, %in_16: bf16, %out: bf16):
          %20 = arith.mulf %in, %in_16 : bf16
          %21 = arith.addf %out, %20 : bf16
          linalg.yield %21 : bf16
        } -> tensor<1x1x16x16x4x4xbf16>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %19 into %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x16x16x4x4xbf16> into tensor<1x1x32x32x4x4xbf16>
        }
      } {mapping = [#gpu.block<y>, #gpu.block<x>]}
      memref.dealloc %alloc_5 : memref<1x1x128x64xbf16, 1 : i32>
      memref.dealloc %alloc_7 : memref<1x1x64x128xbf16, 1 : i32>
      scf.yield %16 : tensor<1x1x32x32x4x4xbf16>
    }
    %unpack = tensor.unpack %12 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %7 : tensor<1x1x32x32x4x4xbf16> -> tensor<1x1x128x128xbf16>
    %unpack_3 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %extracted_slice_1 : tensor<1x1x128x128xbf16> -> tensor<128x128xbf16>
    memref.dealloc %alloc : memref<1x1x128x128xbf16, 1 : i32>
    memref.dealloc %alloc_2 : memref<1x1x32x32x4x4xbf16, 2 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_3 into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  return
}

// -----// IR Dump Before HoistStaticallyBoundAllocations (iree-hoist-statically-bound-allocations) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c1 = arith.constant 1 : index
  %c32 = arith.constant 32 : index
  %cst = arith.constant 0.000000e+00 : bf16
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %alloc = memref.alloc() : memref<1x1x128x128xbf16, 1 : i32>
    %7 = bufferization.to_tensor %alloc restrict writable : memref<1x1x128x128xbf16, 1 : i32>
    %alloc_2 = memref.alloc() : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %8 = bufferization.to_tensor %alloc_2 restrict writable : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %9 = linalg.fill ins(%cst : bf16) outs(%8 : tensor<1x1x32x32x4x4xbf16>) -> tensor<1x1x32x32x4x4xbf16>
    %10 = tensor.empty() : tensor<1x1x8x32x4x8xbf16>
    %11 = tensor.empty() : tensor<1x1x32x8x8x4xbf16>
    %12 = scf.for %arg3 = %c0 to %c32 step %c1 iter_args(%arg4 = %9) -> (tensor<1x1x32x32x4x4xbf16>) {
      %13 = affine.apply affine_map<(d0) -> (d0 * 64)>(%arg3)
      %extracted_slice_4 = tensor.extract_slice %extracted_slice[0, %13] [128, 64] [1, 1] : tensor<128x2048xbf16> to tensor<128x64xbf16>
      %alloc_5 = memref.alloc() : memref<1x1x128x64xbf16, 1 : i32>
      %14 = bufferization.to_tensor %alloc_5 restrict writable : memref<1x1x128x64xbf16, 1 : i32>
      %pack = tensor.pack %extracted_slice_4 inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %14 : tensor<128x64xbf16> -> tensor<1x1x128x64xbf16>
      %extracted_slice_6 = tensor.extract_slice %extracted_slice_0[%13, 0] [64, 128] [1, 1] : tensor<2048x128xbf16> to tensor<64x128xbf16>
      %alloc_7 = memref.alloc() : memref<1x1x64x128xbf16, 1 : i32>
      %15 = bufferization.to_tensor %alloc_7 restrict writable : memref<1x1x64x128xbf16, 1 : i32>
      %pack_8 = tensor.pack %extracted_slice_6 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %15 : tensor<64x128xbf16> -> tensor<1x1x64x128xbf16>
      %16 = scf.forall (%arg5, %arg6) = (0, 0) to (32, 32) step (16, 16) shared_outs(%arg7 = %arg4) -> (tensor<1x1x32x32x4x4xbf16>) {
        %17 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg5)
        %extracted_slice_9 = tensor.extract_slice %pack[0, 0, %17, 0] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x128x64xbf16> to tensor<1x1x64x64xbf16>
        %extracted_slice_10 = tensor.extract_slice %10[0, 0, 0, %arg5, 0, 0] [1, 1, 8, 16, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x32x4x8xbf16> to tensor<1x1x8x16x4x8xbf16>
        %alloc_11 = memref.alloc() : memref<1x1x8x16x4x8xbf16, 2 : i32>
        %18 = bufferization.to_tensor %alloc_11 restrict writable : memref<1x1x8x16x4x8xbf16, 2 : i32>
        %pack_12 = tensor.pack %extracted_slice_9 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %18 : tensor<1x1x64x64xbf16> -> tensor<1x1x8x16x4x8xbf16>
        %19 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg6)
        %extracted_slice_13 = tensor.extract_slice %pack_8[0, 0, 0, %19] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x64x128xbf16> to tensor<1x1x64x64xbf16>
        %extracted_slice_14 = tensor.extract_slice %11[0, 0, %arg6, 0, 0, 0] [1, 1, 16, 8, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x8x8x4xbf16> to tensor<1x1x16x8x8x4xbf16>
        %alloc_15 = memref.alloc() : memref<1x1x16x8x8x4xbf16, 2 : i32>
        %20 = bufferization.to_tensor %alloc_15 restrict writable : memref<1x1x16x8x8x4xbf16, 2 : i32>
        %pack_16 = tensor.pack %extracted_slice_13 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %20 : tensor<1x1x64x64xbf16> -> tensor<1x1x16x8x8x4xbf16>
        %extracted_slice_17 = tensor.extract_slice %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x32x4x4xbf16> to tensor<1x1x16x16x4x4xbf16>
        %21 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_12, %pack_16 : tensor<1x1x8x16x4x8xbf16>, tensor<1x1x16x8x8x4xbf16>) outs(%extracted_slice_17 : tensor<1x1x16x16x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
        ^bb0(%in: bf16, %in_18: bf16, %out: bf16):
          %22 = arith.mulf %in, %in_18 : bf16
          %23 = arith.addf %out, %22 : bf16
          linalg.yield %23 : bf16
        } -> tensor<1x1x16x16x4x4xbf16>
        memref.dealloc %alloc_11 : memref<1x1x8x16x4x8xbf16, 2 : i32>
        memref.dealloc %alloc_15 : memref<1x1x16x8x8x4xbf16, 2 : i32>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %21 into %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x16x16x4x4xbf16> into tensor<1x1x32x32x4x4xbf16>
        }
      } {mapping = [#gpu.block<y>, #gpu.block<x>]}
      memref.dealloc %alloc_5 : memref<1x1x128x64xbf16, 1 : i32>
      memref.dealloc %alloc_7 : memref<1x1x64x128xbf16, 1 : i32>
      scf.yield %16 : tensor<1x1x32x32x4x4xbf16>
    }
    %unpack = tensor.unpack %12 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %7 : tensor<1x1x32x32x4x4xbf16> -> tensor<1x1x128x128xbf16>
    %unpack_3 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %extracted_slice_1 : tensor<1x1x128x128xbf16> -> tensor<128x128xbf16>
    memref.dealloc %alloc : memref<1x1x128x128xbf16, 1 : i32>
    memref.dealloc %alloc_2 : memref<1x1x32x32x4x4xbf16, 2 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_3 into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  return
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %alloc = memref.alloc() : memref<1x1x16x8x8x4xbf16, 2 : i32>
  %alloc_0 = memref.alloc() : memref<1x1x8x16x4x8xbf16, 2 : i32>
  %alloc_1 = memref.alloc() : memref<1x1x64x128xbf16, 1 : i32>
  %alloc_2 = memref.alloc() : memref<1x1x128x64xbf16, 1 : i32>
  %alloc_3 = memref.alloc() : memref<1x1x32x32x4x4xbf16, 2 : i32>
  %alloc_4 = memref.alloc() : memref<1x1x128x128xbf16, 1 : i32>
  %c1 = arith.constant 1 : index
  %c32 = arith.constant 32 : index
  %cst = arith.constant 0.000000e+00 : bf16
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_5 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_6 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %7 = bufferization.to_tensor %alloc_4 restrict writable : memref<1x1x128x128xbf16, 1 : i32>
    %8 = bufferization.to_tensor %alloc_3 restrict writable : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %9 = linalg.fill ins(%cst : bf16) outs(%8 : tensor<1x1x32x32x4x4xbf16>) -> tensor<1x1x32x32x4x4xbf16>
    %10 = tensor.empty() : tensor<1x1x8x32x4x8xbf16>
    %11 = tensor.empty() : tensor<1x1x32x8x8x4xbf16>
    %12 = scf.for %arg3 = %c0 to %c32 step %c1 iter_args(%arg4 = %9) -> (tensor<1x1x32x32x4x4xbf16>) {
      %13 = affine.apply affine_map<(d0) -> (d0 * 64)>(%arg3)
      %extracted_slice_8 = tensor.extract_slice %extracted_slice[0, %13] [128, 64] [1, 1] : tensor<128x2048xbf16> to tensor<128x64xbf16>
      %14 = bufferization.to_tensor %alloc_2 restrict writable : memref<1x1x128x64xbf16, 1 : i32>
      %pack = tensor.pack %extracted_slice_8 inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %14 : tensor<128x64xbf16> -> tensor<1x1x128x64xbf16>
      %extracted_slice_9 = tensor.extract_slice %extracted_slice_5[%13, 0] [64, 128] [1, 1] : tensor<2048x128xbf16> to tensor<64x128xbf16>
      %15 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x1x64x128xbf16, 1 : i32>
      %pack_10 = tensor.pack %extracted_slice_9 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %15 : tensor<64x128xbf16> -> tensor<1x1x64x128xbf16>
      %16 = scf.forall (%arg5, %arg6) = (0, 0) to (32, 32) step (16, 16) shared_outs(%arg7 = %arg4) -> (tensor<1x1x32x32x4x4xbf16>) {
        %17 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg5)
        %extracted_slice_11 = tensor.extract_slice %pack[0, 0, %17, 0] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x128x64xbf16> to tensor<1x1x64x64xbf16>
        %extracted_slice_12 = tensor.extract_slice %10[0, 0, 0, %arg5, 0, 0] [1, 1, 8, 16, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x32x4x8xbf16> to tensor<1x1x8x16x4x8xbf16>
        %18 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x8x16x4x8xbf16, 2 : i32>
        %pack_13 = tensor.pack %extracted_slice_11 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %18 : tensor<1x1x64x64xbf16> -> tensor<1x1x8x16x4x8xbf16>
        %19 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg6)
        %extracted_slice_14 = tensor.extract_slice %pack_10[0, 0, 0, %19] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x64x128xbf16> to tensor<1x1x64x64xbf16>
        %extracted_slice_15 = tensor.extract_slice %11[0, 0, %arg6, 0, 0, 0] [1, 1, 16, 8, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x8x8x4xbf16> to tensor<1x1x16x8x8x4xbf16>
        %20 = bufferization.to_tensor %alloc restrict writable : memref<1x1x16x8x8x4xbf16, 2 : i32>
        %pack_16 = tensor.pack %extracted_slice_14 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %20 : tensor<1x1x64x64xbf16> -> tensor<1x1x16x8x8x4xbf16>
        %extracted_slice_17 = tensor.extract_slice %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x32x4x4xbf16> to tensor<1x1x16x16x4x4xbf16>
        %21 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_13, %pack_16 : tensor<1x1x8x16x4x8xbf16>, tensor<1x1x16x8x8x4xbf16>) outs(%extracted_slice_17 : tensor<1x1x16x16x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
        ^bb0(%in: bf16, %in_18: bf16, %out: bf16):
          %22 = arith.mulf %in, %in_18 : bf16
          %23 = arith.addf %out, %22 : bf16
          linalg.yield %23 : bf16
        } -> tensor<1x1x16x16x4x4xbf16>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %21 into %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x16x16x4x4xbf16> into tensor<1x1x32x32x4x4xbf16>
        }
      } {mapping = [#gpu.block<y>, #gpu.block<x>]}
      scf.yield %16 : tensor<1x1x32x32x4x4xbf16>
    }
    %unpack = tensor.unpack %12 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %7 : tensor<1x1x32x32x4x4xbf16> -> tensor<1x1x128x128xbf16>
    %unpack_7 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %extracted_slice_6 : tensor<1x1x128x128xbf16> -> tensor<128x128xbf16>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_7 into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  memref.dealloc %alloc_4 : memref<1x1x128x128xbf16, 1 : i32>
  memref.dealloc %alloc_3 : memref<1x1x32x32x4x4xbf16, 2 : i32>
  memref.dealloc %alloc_2 : memref<1x1x128x64xbf16, 1 : i32>
  memref.dealloc %alloc_1 : memref<1x1x64x128xbf16, 1 : i32>
  memref.dealloc %alloc_0 : memref<1x1x8x16x4x8xbf16, 2 : i32>
  memref.dealloc %alloc : memref<1x1x16x8x8x4xbf16, 2 : i32>
  return
}

// -----// IR Dump Before CSE (cse) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c0 = arith.constant 0 : index
  %cst = arith.constant 0.000000e+00 : bf16
  %c32 = arith.constant 32 : index
  %c1 = arith.constant 1 : index
  %alloc = memref.alloc() : memref<1x1x16x8x8x4xbf16, 2 : i32>
  %alloc_0 = memref.alloc() : memref<1x1x8x16x4x8xbf16, 2 : i32>
  %alloc_1 = memref.alloc() : memref<1x1x64x128xbf16, 1 : i32>
  %alloc_2 = memref.alloc() : memref<1x1x128x64xbf16, 1 : i32>
  %alloc_3 = memref.alloc() : memref<1x1x32x32x4x4xbf16, 2 : i32>
  %alloc_4 = memref.alloc() : memref<1x1x128x128xbf16, 1 : i32>
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_5 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_6 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %7 = bufferization.to_tensor %alloc_4 restrict writable : memref<1x1x128x128xbf16, 1 : i32>
    %8 = bufferization.to_tensor %alloc_3 restrict writable : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %9 = linalg.fill ins(%cst : bf16) outs(%8 : tensor<1x1x32x32x4x4xbf16>) -> tensor<1x1x32x32x4x4xbf16>
    %10 = scf.for %arg3 = %c0 to %c32 step %c1 iter_args(%arg4 = %9) -> (tensor<1x1x32x32x4x4xbf16>) {
      %11 = affine.apply affine_map<(d0) -> (d0 * 64)>(%arg3)
      %extracted_slice_8 = tensor.extract_slice %extracted_slice[0, %11] [128, 64] [1, 1] : tensor<128x2048xbf16> to tensor<128x64xbf16>
      %12 = bufferization.to_tensor %alloc_2 restrict writable : memref<1x1x128x64xbf16, 1 : i32>
      %pack = tensor.pack %extracted_slice_8 inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %12 : tensor<128x64xbf16> -> tensor<1x1x128x64xbf16>
      %extracted_slice_9 = tensor.extract_slice %extracted_slice_5[%11, 0] [64, 128] [1, 1] : tensor<2048x128xbf16> to tensor<64x128xbf16>
      %13 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x1x64x128xbf16, 1 : i32>
      %pack_10 = tensor.pack %extracted_slice_9 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %13 : tensor<64x128xbf16> -> tensor<1x1x64x128xbf16>
      %14 = scf.forall (%arg5, %arg6) = (0, 0) to (32, 32) step (16, 16) shared_outs(%arg7 = %arg4) -> (tensor<1x1x32x32x4x4xbf16>) {
        %15 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg5)
        %extracted_slice_11 = tensor.extract_slice %pack[0, 0, %15, 0] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x128x64xbf16> to tensor<1x1x64x64xbf16>
        %16 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x8x16x4x8xbf16, 2 : i32>
        %pack_12 = tensor.pack %extracted_slice_11 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %16 : tensor<1x1x64x64xbf16> -> tensor<1x1x8x16x4x8xbf16>
        %17 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg6)
        %extracted_slice_13 = tensor.extract_slice %pack_10[0, 0, 0, %17] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x64x128xbf16> to tensor<1x1x64x64xbf16>
        %18 = bufferization.to_tensor %alloc restrict writable : memref<1x1x16x8x8x4xbf16, 2 : i32>
        %pack_14 = tensor.pack %extracted_slice_13 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %18 : tensor<1x1x64x64xbf16> -> tensor<1x1x16x8x8x4xbf16>
        %extracted_slice_15 = tensor.extract_slice %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x32x4x4xbf16> to tensor<1x1x16x16x4x4xbf16>
        %19 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_12, %pack_14 : tensor<1x1x8x16x4x8xbf16>, tensor<1x1x16x8x8x4xbf16>) outs(%extracted_slice_15 : tensor<1x1x16x16x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
        ^bb0(%in: bf16, %in_16: bf16, %out: bf16):
          %20 = arith.mulf %in, %in_16 : bf16
          %21 = arith.addf %out, %20 : bf16
          linalg.yield %21 : bf16
        } -> tensor<1x1x16x16x4x4xbf16>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %19 into %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x16x16x4x4xbf16> into tensor<1x1x32x32x4x4xbf16>
        }
      } {mapping = [#gpu.block<y>, #gpu.block<x>]}
      scf.yield %14 : tensor<1x1x32x32x4x4xbf16>
    }
    %unpack = tensor.unpack %10 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %7 : tensor<1x1x32x32x4x4xbf16> -> tensor<1x1x128x128xbf16>
    %unpack_7 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %extracted_slice_6 : tensor<1x1x128x128xbf16> -> tensor<128x128xbf16>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_7 into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  memref.dealloc %alloc_4 : memref<1x1x128x128xbf16, 1 : i32>
  memref.dealloc %alloc_3 : memref<1x1x32x32x4x4xbf16, 2 : i32>
  memref.dealloc %alloc_2 : memref<1x1x128x64xbf16, 1 : i32>
  memref.dealloc %alloc_1 : memref<1x1x64x128xbf16, 1 : i32>
  memref.dealloc %alloc_0 : memref<1x1x8x16x4x8xbf16, 2 : i32>
  memref.dealloc %alloc : memref<1x1x16x8x8x4xbf16, 2 : i32>
  return
}

// -----// IR Dump Before AMDAIEPeelForLoop (iree-amdaie-peel-for-loop) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c0 = arith.constant 0 : index
  %cst = arith.constant 0.000000e+00 : bf16
  %c32 = arith.constant 32 : index
  %c1 = arith.constant 1 : index
  %alloc = memref.alloc() : memref<1x1x16x8x8x4xbf16, 2 : i32>
  %alloc_0 = memref.alloc() : memref<1x1x8x16x4x8xbf16, 2 : i32>
  %alloc_1 = memref.alloc() : memref<1x1x64x128xbf16, 1 : i32>
  %alloc_2 = memref.alloc() : memref<1x1x128x64xbf16, 1 : i32>
  %alloc_3 = memref.alloc() : memref<1x1x32x32x4x4xbf16, 2 : i32>
  %alloc_4 = memref.alloc() : memref<1x1x128x128xbf16, 1 : i32>
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_5 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_6 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %7 = bufferization.to_tensor %alloc_4 restrict writable : memref<1x1x128x128xbf16, 1 : i32>
    %8 = bufferization.to_tensor %alloc_3 restrict writable : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %9 = linalg.fill ins(%cst : bf16) outs(%8 : tensor<1x1x32x32x4x4xbf16>) -> tensor<1x1x32x32x4x4xbf16>
    %10 = scf.for %arg3 = %c0 to %c32 step %c1 iter_args(%arg4 = %9) -> (tensor<1x1x32x32x4x4xbf16>) {
      %11 = affine.apply affine_map<(d0) -> (d0 * 64)>(%arg3)
      %extracted_slice_8 = tensor.extract_slice %extracted_slice[0, %11] [128, 64] [1, 1] : tensor<128x2048xbf16> to tensor<128x64xbf16>
      %12 = bufferization.to_tensor %alloc_2 restrict writable : memref<1x1x128x64xbf16, 1 : i32>
      %pack = tensor.pack %extracted_slice_8 inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %12 : tensor<128x64xbf16> -> tensor<1x1x128x64xbf16>
      %extracted_slice_9 = tensor.extract_slice %extracted_slice_5[%11, 0] [64, 128] [1, 1] : tensor<2048x128xbf16> to tensor<64x128xbf16>
      %13 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x1x64x128xbf16, 1 : i32>
      %pack_10 = tensor.pack %extracted_slice_9 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %13 : tensor<64x128xbf16> -> tensor<1x1x64x128xbf16>
      %14 = scf.forall (%arg5, %arg6) = (0, 0) to (32, 32) step (16, 16) shared_outs(%arg7 = %arg4) -> (tensor<1x1x32x32x4x4xbf16>) {
        %15 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg5)
        %extracted_slice_11 = tensor.extract_slice %pack[0, 0, %15, 0] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x128x64xbf16> to tensor<1x1x64x64xbf16>
        %16 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x8x16x4x8xbf16, 2 : i32>
        %pack_12 = tensor.pack %extracted_slice_11 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %16 : tensor<1x1x64x64xbf16> -> tensor<1x1x8x16x4x8xbf16>
        %17 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg6)
        %extracted_slice_13 = tensor.extract_slice %pack_10[0, 0, 0, %17] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x64x128xbf16> to tensor<1x1x64x64xbf16>
        %18 = bufferization.to_tensor %alloc restrict writable : memref<1x1x16x8x8x4xbf16, 2 : i32>
        %pack_14 = tensor.pack %extracted_slice_13 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %18 : tensor<1x1x64x64xbf16> -> tensor<1x1x16x8x8x4xbf16>
        %extracted_slice_15 = tensor.extract_slice %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x32x4x4xbf16> to tensor<1x1x16x16x4x4xbf16>
        %19 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_12, %pack_14 : tensor<1x1x8x16x4x8xbf16>, tensor<1x1x16x8x8x4xbf16>) outs(%extracted_slice_15 : tensor<1x1x16x16x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
        ^bb0(%in: bf16, %in_16: bf16, %out: bf16):
          %20 = arith.mulf %in, %in_16 : bf16
          %21 = arith.addf %out, %20 : bf16
          linalg.yield %21 : bf16
        } -> tensor<1x1x16x16x4x4xbf16>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %19 into %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x16x16x4x4xbf16> into tensor<1x1x32x32x4x4xbf16>
        }
      } {mapping = [#gpu.block<y>, #gpu.block<x>]}
      scf.yield %14 : tensor<1x1x32x32x4x4xbf16>
    }
    %unpack = tensor.unpack %10 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %7 : tensor<1x1x32x32x4x4xbf16> -> tensor<1x1x128x128xbf16>
    %unpack_7 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %extracted_slice_6 : tensor<1x1x128x128xbf16> -> tensor<128x128xbf16>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_7 into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  memref.dealloc %alloc_4 : memref<1x1x128x128xbf16, 1 : i32>
  memref.dealloc %alloc_3 : memref<1x1x32x32x4x4xbf16, 2 : i32>
  memref.dealloc %alloc_2 : memref<1x1x128x64xbf16, 1 : i32>
  memref.dealloc %alloc_1 : memref<1x1x64x128xbf16, 1 : i32>
  memref.dealloc %alloc_0 : memref<1x1x8x16x4x8xbf16, 2 : i32>
  memref.dealloc %alloc : memref<1x1x16x8x8x4xbf16, 2 : i32>
  return
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c0 = arith.constant 0 : index
  %cst = arith.constant 0.000000e+00 : bf16
  %c32 = arith.constant 32 : index
  %c1 = arith.constant 1 : index
  %alloc = memref.alloc() : memref<1x1x16x8x8x4xbf16, 2 : i32>
  %alloc_0 = memref.alloc() : memref<1x1x8x16x4x8xbf16, 2 : i32>
  %alloc_1 = memref.alloc() : memref<1x1x64x128xbf16, 1 : i32>
  %alloc_2 = memref.alloc() : memref<1x1x128x64xbf16, 1 : i32>
  %alloc_3 = memref.alloc() : memref<1x1x32x32x4x4xbf16, 2 : i32>
  %alloc_4 = memref.alloc() : memref<1x1x128x128xbf16, 1 : i32>
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_5 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_6 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %7 = bufferization.to_tensor %alloc_4 restrict writable : memref<1x1x128x128xbf16, 1 : i32>
    %8 = bufferization.to_tensor %alloc_3 restrict writable : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %9 = linalg.fill ins(%cst : bf16) outs(%8 : tensor<1x1x32x32x4x4xbf16>) -> tensor<1x1x32x32x4x4xbf16>
    %c1_7 = arith.constant 1 : index
    %10 = scf.for %arg3 = %c0 to %c1_7 step %c1 iter_args(%arg4 = %9) -> (tensor<1x1x32x32x4x4xbf16>) {
      %12 = affine.apply affine_map<(d0) -> (d0 * 64)>(%arg3)
      %extracted_slice_9 = tensor.extract_slice %extracted_slice[0, %12] [128, 64] [1, 1] : tensor<128x2048xbf16> to tensor<128x64xbf16>
      %13 = bufferization.to_tensor %alloc_2 restrict writable : memref<1x1x128x64xbf16, 1 : i32>
      %pack = tensor.pack %extracted_slice_9 inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %13 : tensor<128x64xbf16> -> tensor<1x1x128x64xbf16>
      %extracted_slice_10 = tensor.extract_slice %extracted_slice_5[%12, 0] [64, 128] [1, 1] : tensor<2048x128xbf16> to tensor<64x128xbf16>
      %14 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x1x64x128xbf16, 1 : i32>
      %pack_11 = tensor.pack %extracted_slice_10 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %14 : tensor<64x128xbf16> -> tensor<1x1x64x128xbf16>
      %15 = scf.forall (%arg5, %arg6) = (0, 0) to (32, 32) step (16, 16) shared_outs(%arg7 = %arg4) -> (tensor<1x1x32x32x4x4xbf16>) {
        %16 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg5)
        %extracted_slice_12 = tensor.extract_slice %pack[0, 0, %16, 0] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x128x64xbf16> to tensor<1x1x64x64xbf16>
        %17 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x8x16x4x8xbf16, 2 : i32>
        %pack_13 = tensor.pack %extracted_slice_12 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %17 : tensor<1x1x64x64xbf16> -> tensor<1x1x8x16x4x8xbf16>
        %18 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg6)
        %extracted_slice_14 = tensor.extract_slice %pack_11[0, 0, 0, %18] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x64x128xbf16> to tensor<1x1x64x64xbf16>
        %19 = bufferization.to_tensor %alloc restrict writable : memref<1x1x16x8x8x4xbf16, 2 : i32>
        %pack_15 = tensor.pack %extracted_slice_14 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %19 : tensor<1x1x64x64xbf16> -> tensor<1x1x16x8x8x4xbf16>
        %extracted_slice_16 = tensor.extract_slice %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x32x4x4xbf16> to tensor<1x1x16x16x4x4xbf16>
        %20 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_13, %pack_15 : tensor<1x1x8x16x4x8xbf16>, tensor<1x1x16x8x8x4xbf16>) outs(%extracted_slice_16 : tensor<1x1x16x16x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
        ^bb0(%in: bf16, %in_17: bf16, %out: bf16):
          %21 = arith.mulf %in, %in_17 : bf16
          %22 = arith.addf %out, %21 : bf16
          linalg.yield %22 : bf16
        } -> tensor<1x1x16x16x4x4xbf16>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %20 into %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x16x16x4x4xbf16> into tensor<1x1x32x32x4x4xbf16>
        }
      } {mapping = [#gpu.block<y>, #gpu.block<x>]}
      scf.yield %15 : tensor<1x1x32x32x4x4xbf16>
    }
    %11 = scf.for %arg3 = %c1_7 to %c32 step %c1 iter_args(%arg4 = %10) -> (tensor<1x1x32x32x4x4xbf16>) {
      %12 = affine.apply affine_map<(d0) -> (d0 * 64)>(%arg3)
      %extracted_slice_9 = tensor.extract_slice %extracted_slice[0, %12] [128, 64] [1, 1] : tensor<128x2048xbf16> to tensor<128x64xbf16>
      %13 = bufferization.to_tensor %alloc_2 restrict writable : memref<1x1x128x64xbf16, 1 : i32>
      %pack = tensor.pack %extracted_slice_9 inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %13 : tensor<128x64xbf16> -> tensor<1x1x128x64xbf16>
      %extracted_slice_10 = tensor.extract_slice %extracted_slice_5[%12, 0] [64, 128] [1, 1] : tensor<2048x128xbf16> to tensor<64x128xbf16>
      %14 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x1x64x128xbf16, 1 : i32>
      %pack_11 = tensor.pack %extracted_slice_10 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %14 : tensor<64x128xbf16> -> tensor<1x1x64x128xbf16>
      %15 = scf.forall (%arg5, %arg6) = (0, 0) to (32, 32) step (16, 16) shared_outs(%arg7 = %arg4) -> (tensor<1x1x32x32x4x4xbf16>) {
        %16 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg5)
        %extracted_slice_12 = tensor.extract_slice %pack[0, 0, %16, 0] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x128x64xbf16> to tensor<1x1x64x64xbf16>
        %17 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x8x16x4x8xbf16, 2 : i32>
        %pack_13 = tensor.pack %extracted_slice_12 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %17 : tensor<1x1x64x64xbf16> -> tensor<1x1x8x16x4x8xbf16>
        %18 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg6)
        %extracted_slice_14 = tensor.extract_slice %pack_11[0, 0, 0, %18] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x64x128xbf16> to tensor<1x1x64x64xbf16>
        %19 = bufferization.to_tensor %alloc restrict writable : memref<1x1x16x8x8x4xbf16, 2 : i32>
        %pack_15 = tensor.pack %extracted_slice_14 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %19 : tensor<1x1x64x64xbf16> -> tensor<1x1x16x8x8x4xbf16>
        %extracted_slice_16 = tensor.extract_slice %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x32x4x4xbf16> to tensor<1x1x16x16x4x4xbf16>
        %20 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_13, %pack_15 : tensor<1x1x8x16x4x8xbf16>, tensor<1x1x16x8x8x4xbf16>) outs(%extracted_slice_16 : tensor<1x1x16x16x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
        ^bb0(%in: bf16, %in_17: bf16, %out: bf16):
          %21 = arith.mulf %in, %in_17 : bf16
          %22 = arith.addf %out, %21 : bf16
          linalg.yield %22 : bf16
        } -> tensor<1x1x16x16x4x4xbf16>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %20 into %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x16x16x4x4xbf16> into tensor<1x1x32x32x4x4xbf16>
        }
      } {mapping = [#gpu.block<y>, #gpu.block<x>]}
      scf.yield %15 : tensor<1x1x32x32x4x4xbf16>
    }
    %unpack = tensor.unpack %11 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %7 : tensor<1x1x32x32x4x4xbf16> -> tensor<1x1x128x128xbf16>
    %unpack_8 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %extracted_slice_6 : tensor<1x1x128x128xbf16> -> tensor<128x128xbf16>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_8 into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  memref.dealloc %alloc_4 : memref<1x1x128x128xbf16, 1 : i32>
  memref.dealloc %alloc_3 : memref<1x1x32x32x4x4xbf16, 2 : i32>
  memref.dealloc %alloc_2 : memref<1x1x128x64xbf16, 1 : i32>
  memref.dealloc %alloc_1 : memref<1x1x64x128xbf16, 1 : i32>
  memref.dealloc %alloc_0 : memref<1x1x8x16x4x8xbf16, 2 : i32>
  memref.dealloc %alloc : memref<1x1x16x8x8x4xbf16, 2 : i32>
  return
}

// -----// IR Dump Before AMDAIEFuseFillIntoForall (iree-amdaie-fuse-fill-into-forall) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c0 = arith.constant 0 : index
  %cst = arith.constant 0.000000e+00 : bf16
  %c32 = arith.constant 32 : index
  %c1 = arith.constant 1 : index
  %alloc = memref.alloc() : memref<1x1x16x8x8x4xbf16, 2 : i32>
  %alloc_0 = memref.alloc() : memref<1x1x8x16x4x8xbf16, 2 : i32>
  %alloc_1 = memref.alloc() : memref<1x1x64x128xbf16, 1 : i32>
  %alloc_2 = memref.alloc() : memref<1x1x128x64xbf16, 1 : i32>
  %alloc_3 = memref.alloc() : memref<1x1x32x32x4x4xbf16, 2 : i32>
  %alloc_4 = memref.alloc() : memref<1x1x128x128xbf16, 1 : i32>
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_5 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_6 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %7 = bufferization.to_tensor %alloc_4 restrict writable : memref<1x1x128x128xbf16, 1 : i32>
    %8 = bufferization.to_tensor %alloc_3 restrict writable : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %9 = linalg.fill ins(%cst : bf16) outs(%8 : tensor<1x1x32x32x4x4xbf16>) -> tensor<1x1x32x32x4x4xbf16>
    %extracted_slice_7 = tensor.extract_slice %extracted_slice[0, 0] [128, 64] [1, 1] : tensor<128x2048xbf16> to tensor<128x64xbf16>
    %10 = bufferization.to_tensor %alloc_2 restrict writable : memref<1x1x128x64xbf16, 1 : i32>
    %pack = tensor.pack %extracted_slice_7 inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %10 : tensor<128x64xbf16> -> tensor<1x1x128x64xbf16>
    %extracted_slice_8 = tensor.extract_slice %extracted_slice_5[0, 0] [64, 128] [1, 1] : tensor<2048x128xbf16> to tensor<64x128xbf16>
    %11 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x1x64x128xbf16, 1 : i32>
    %pack_9 = tensor.pack %extracted_slice_8 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %11 : tensor<64x128xbf16> -> tensor<1x1x64x128xbf16>
    %12 = scf.forall (%arg3, %arg4) = (0, 0) to (32, 32) step (16, 16) shared_outs(%arg5 = %9) -> (tensor<1x1x32x32x4x4xbf16>) {
      %14 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg3)
      %extracted_slice_11 = tensor.extract_slice %pack[0, 0, %14, 0] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x128x64xbf16> to tensor<1x1x64x64xbf16>
      %15 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x8x16x4x8xbf16, 2 : i32>
      %pack_12 = tensor.pack %extracted_slice_11 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %15 : tensor<1x1x64x64xbf16> -> tensor<1x1x8x16x4x8xbf16>
      %16 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg4)
      %extracted_slice_13 = tensor.extract_slice %pack_9[0, 0, 0, %16] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x64x128xbf16> to tensor<1x1x64x64xbf16>
      %17 = bufferization.to_tensor %alloc restrict writable : memref<1x1x16x8x8x4xbf16, 2 : i32>
      %pack_14 = tensor.pack %extracted_slice_13 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %17 : tensor<1x1x64x64xbf16> -> tensor<1x1x16x8x8x4xbf16>
      %extracted_slice_15 = tensor.extract_slice %arg5[0, 0, %arg4, %arg3, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x32x4x4xbf16> to tensor<1x1x16x16x4x4xbf16>
      %18 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_12, %pack_14 : tensor<1x1x8x16x4x8xbf16>, tensor<1x1x16x8x8x4xbf16>) outs(%extracted_slice_15 : tensor<1x1x16x16x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
      ^bb0(%in: bf16, %in_16: bf16, %out: bf16):
        %19 = arith.mulf %in, %in_16 : bf16
        %20 = arith.addf %out, %19 : bf16
        linalg.yield %20 : bf16
      } -> tensor<1x1x16x16x4x4xbf16>
      scf.forall.in_parallel {
        tensor.parallel_insert_slice %18 into %arg5[0, 0, %arg4, %arg3, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x16x16x4x4xbf16> into tensor<1x1x32x32x4x4xbf16>
      }
    } {mapping = [#gpu.block<y>, #gpu.block<x>]}
    %13 = scf.for %arg3 = %c1 to %c32 step %c1 iter_args(%arg4 = %12) -> (tensor<1x1x32x32x4x4xbf16>) {
      %14 = affine.apply affine_map<(d0) -> (d0 * 64)>(%arg3)
      %extracted_slice_11 = tensor.extract_slice %extracted_slice[0, %14] [128, 64] [1, 1] : tensor<128x2048xbf16> to tensor<128x64xbf16>
      %15 = bufferization.to_tensor %alloc_2 restrict writable : memref<1x1x128x64xbf16, 1 : i32>
      %pack_12 = tensor.pack %extracted_slice_11 inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %15 : tensor<128x64xbf16> -> tensor<1x1x128x64xbf16>
      %extracted_slice_13 = tensor.extract_slice %extracted_slice_5[%14, 0] [64, 128] [1, 1] : tensor<2048x128xbf16> to tensor<64x128xbf16>
      %16 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x1x64x128xbf16, 1 : i32>
      %pack_14 = tensor.pack %extracted_slice_13 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %16 : tensor<64x128xbf16> -> tensor<1x1x64x128xbf16>
      %17 = scf.forall (%arg5, %arg6) = (0, 0) to (32, 32) step (16, 16) shared_outs(%arg7 = %arg4) -> (tensor<1x1x32x32x4x4xbf16>) {
        %18 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg5)
        %extracted_slice_15 = tensor.extract_slice %pack_12[0, 0, %18, 0] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x128x64xbf16> to tensor<1x1x64x64xbf16>
        %19 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x8x16x4x8xbf16, 2 : i32>
        %pack_16 = tensor.pack %extracted_slice_15 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %19 : tensor<1x1x64x64xbf16> -> tensor<1x1x8x16x4x8xbf16>
        %20 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg6)
        %extracted_slice_17 = tensor.extract_slice %pack_14[0, 0, 0, %20] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x64x128xbf16> to tensor<1x1x64x64xbf16>
        %21 = bufferization.to_tensor %alloc restrict writable : memref<1x1x16x8x8x4xbf16, 2 : i32>
        %pack_18 = tensor.pack %extracted_slice_17 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %21 : tensor<1x1x64x64xbf16> -> tensor<1x1x16x8x8x4xbf16>
        %extracted_slice_19 = tensor.extract_slice %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x32x4x4xbf16> to tensor<1x1x16x16x4x4xbf16>
        %22 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_16, %pack_18 : tensor<1x1x8x16x4x8xbf16>, tensor<1x1x16x8x8x4xbf16>) outs(%extracted_slice_19 : tensor<1x1x16x16x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
        ^bb0(%in: bf16, %in_20: bf16, %out: bf16):
          %23 = arith.mulf %in, %in_20 : bf16
          %24 = arith.addf %out, %23 : bf16
          linalg.yield %24 : bf16
        } -> tensor<1x1x16x16x4x4xbf16>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %22 into %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x16x16x4x4xbf16> into tensor<1x1x32x32x4x4xbf16>
        }
      } {mapping = [#gpu.block<y>, #gpu.block<x>]}
      scf.yield %17 : tensor<1x1x32x32x4x4xbf16>
    }
    %unpack = tensor.unpack %13 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %7 : tensor<1x1x32x32x4x4xbf16> -> tensor<1x1x128x128xbf16>
    %unpack_10 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %extracted_slice_6 : tensor<1x1x128x128xbf16> -> tensor<128x128xbf16>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_10 into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  memref.dealloc %alloc_4 : memref<1x1x128x128xbf16, 1 : i32>
  memref.dealloc %alloc_3 : memref<1x1x32x32x4x4xbf16, 2 : i32>
  memref.dealloc %alloc_2 : memref<1x1x128x64xbf16, 1 : i32>
  memref.dealloc %alloc_1 : memref<1x1x64x128xbf16, 1 : i32>
  memref.dealloc %alloc_0 : memref<1x1x8x16x4x8xbf16, 2 : i32>
  memref.dealloc %alloc : memref<1x1x16x8x8x4xbf16, 2 : i32>
  return
}

// -----// IR Dump Before AMDAIEFuseConsumerIntoLoop (iree-amdaie-fuse-consumer-into-loop) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c0 = arith.constant 0 : index
  %cst = arith.constant 0.000000e+00 : bf16
  %c32 = arith.constant 32 : index
  %c1 = arith.constant 1 : index
  %alloc = memref.alloc() : memref<1x1x16x8x8x4xbf16, 2 : i32>
  %alloc_0 = memref.alloc() : memref<1x1x8x16x4x8xbf16, 2 : i32>
  %alloc_1 = memref.alloc() : memref<1x1x64x128xbf16, 1 : i32>
  %alloc_2 = memref.alloc() : memref<1x1x128x64xbf16, 1 : i32>
  %alloc_3 = memref.alloc() : memref<1x1x32x32x4x4xbf16, 2 : i32>
  %alloc_4 = memref.alloc() : memref<1x1x128x128xbf16, 1 : i32>
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_5 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_6 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %7 = bufferization.to_tensor %alloc_4 restrict writable : memref<1x1x128x128xbf16, 1 : i32>
    %8 = bufferization.to_tensor %alloc_3 restrict writable : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %9 = linalg.fill ins(%cst : bf16) outs(%8 : tensor<1x1x32x32x4x4xbf16>) -> tensor<1x1x32x32x4x4xbf16>
    %extracted_slice_7 = tensor.extract_slice %extracted_slice[0, 0] [128, 64] [1, 1] : tensor<128x2048xbf16> to tensor<128x64xbf16>
    %10 = bufferization.to_tensor %alloc_2 restrict writable : memref<1x1x128x64xbf16, 1 : i32>
    %pack = tensor.pack %extracted_slice_7 inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %10 : tensor<128x64xbf16> -> tensor<1x1x128x64xbf16>
    %extracted_slice_8 = tensor.extract_slice %extracted_slice_5[0, 0] [64, 128] [1, 1] : tensor<2048x128xbf16> to tensor<64x128xbf16>
    %11 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x1x64x128xbf16, 1 : i32>
    %pack_9 = tensor.pack %extracted_slice_8 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %11 : tensor<64x128xbf16> -> tensor<1x1x64x128xbf16>
    %12 = scf.forall (%arg3, %arg4) = (0, 0) to (32, 32) step (16, 16) shared_outs(%arg5 = %8) -> (tensor<1x1x32x32x4x4xbf16>) {
      %14 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg3)
      %extracted_slice_11 = tensor.extract_slice %pack[0, 0, %14, 0] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x128x64xbf16> to tensor<1x1x64x64xbf16>
      %15 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x8x16x4x8xbf16, 2 : i32>
      %pack_12 = tensor.pack %extracted_slice_11 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %15 : tensor<1x1x64x64xbf16> -> tensor<1x1x8x16x4x8xbf16>
      %16 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg4)
      %extracted_slice_13 = tensor.extract_slice %pack_9[0, 0, 0, %16] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x64x128xbf16> to tensor<1x1x64x64xbf16>
      %17 = bufferization.to_tensor %alloc restrict writable : memref<1x1x16x8x8x4xbf16, 2 : i32>
      %pack_14 = tensor.pack %extracted_slice_13 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %17 : tensor<1x1x64x64xbf16> -> tensor<1x1x16x8x8x4xbf16>
      %extracted_slice_15 = tensor.extract_slice %arg5[0, 0, %arg4, %arg3, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x32x4x4xbf16> to tensor<1x1x16x16x4x4xbf16>
      %18 = linalg.fill ins(%cst : bf16) outs(%extracted_slice_15 : tensor<1x1x16x16x4x4xbf16>) -> tensor<1x1x16x16x4x4xbf16>
      %extracted_slice_16 = tensor.extract_slice %arg5[0, 0, %arg4, %arg3, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x32x4x4xbf16> to tensor<1x1x16x16x4x4xbf16>
      %19 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_12, %pack_14 : tensor<1x1x8x16x4x8xbf16>, tensor<1x1x16x8x8x4xbf16>) outs(%18 : tensor<1x1x16x16x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
      ^bb0(%in: bf16, %in_17: bf16, %out: bf16):
        %20 = arith.mulf %in, %in_17 : bf16
        %21 = arith.addf %out, %20 : bf16
        linalg.yield %21 : bf16
      } -> tensor<1x1x16x16x4x4xbf16>
      scf.forall.in_parallel {
        tensor.parallel_insert_slice %19 into %arg5[0, 0, %arg4, %arg3, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x16x16x4x4xbf16> into tensor<1x1x32x32x4x4xbf16>
      }
    } {mapping = [#gpu.block<y>, #gpu.block<x>]}
    %13 = scf.for %arg3 = %c1 to %c32 step %c1 iter_args(%arg4 = %12) -> (tensor<1x1x32x32x4x4xbf16>) {
      %14 = affine.apply affine_map<(d0) -> (d0 * 64)>(%arg3)
      %extracted_slice_11 = tensor.extract_slice %extracted_slice[0, %14] [128, 64] [1, 1] : tensor<128x2048xbf16> to tensor<128x64xbf16>
      %15 = bufferization.to_tensor %alloc_2 restrict writable : memref<1x1x128x64xbf16, 1 : i32>
      %pack_12 = tensor.pack %extracted_slice_11 inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %15 : tensor<128x64xbf16> -> tensor<1x1x128x64xbf16>
      %extracted_slice_13 = tensor.extract_slice %extracted_slice_5[%14, 0] [64, 128] [1, 1] : tensor<2048x128xbf16> to tensor<64x128xbf16>
      %16 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x1x64x128xbf16, 1 : i32>
      %pack_14 = tensor.pack %extracted_slice_13 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %16 : tensor<64x128xbf16> -> tensor<1x1x64x128xbf16>
      %17 = scf.forall (%arg5, %arg6) = (0, 0) to (32, 32) step (16, 16) shared_outs(%arg7 = %arg4) -> (tensor<1x1x32x32x4x4xbf16>) {
        %18 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg5)
        %extracted_slice_15 = tensor.extract_slice %pack_12[0, 0, %18, 0] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x128x64xbf16> to tensor<1x1x64x64xbf16>
        %19 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x8x16x4x8xbf16, 2 : i32>
        %pack_16 = tensor.pack %extracted_slice_15 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %19 : tensor<1x1x64x64xbf16> -> tensor<1x1x8x16x4x8xbf16>
        %20 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg6)
        %extracted_slice_17 = tensor.extract_slice %pack_14[0, 0, 0, %20] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x64x128xbf16> to tensor<1x1x64x64xbf16>
        %21 = bufferization.to_tensor %alloc restrict writable : memref<1x1x16x8x8x4xbf16, 2 : i32>
        %pack_18 = tensor.pack %extracted_slice_17 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %21 : tensor<1x1x64x64xbf16> -> tensor<1x1x16x8x8x4xbf16>
        %extracted_slice_19 = tensor.extract_slice %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x32x4x4xbf16> to tensor<1x1x16x16x4x4xbf16>
        %22 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_16, %pack_18 : tensor<1x1x8x16x4x8xbf16>, tensor<1x1x16x8x8x4xbf16>) outs(%extracted_slice_19 : tensor<1x1x16x16x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
        ^bb0(%in: bf16, %in_20: bf16, %out: bf16):
          %23 = arith.mulf %in, %in_20 : bf16
          %24 = arith.addf %out, %23 : bf16
          linalg.yield %24 : bf16
        } -> tensor<1x1x16x16x4x4xbf16>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %22 into %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x16x16x4x4xbf16> into tensor<1x1x32x32x4x4xbf16>
        }
      } {mapping = [#gpu.block<y>, #gpu.block<x>]}
      scf.yield %17 : tensor<1x1x32x32x4x4xbf16>
    }
    %unpack = tensor.unpack %13 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %7 : tensor<1x1x32x32x4x4xbf16> -> tensor<1x1x128x128xbf16>
    %unpack_10 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %extracted_slice_6 : tensor<1x1x128x128xbf16> -> tensor<128x128xbf16>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_10 into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  memref.dealloc %alloc_4 : memref<1x1x128x128xbf16, 1 : i32>
  memref.dealloc %alloc_3 : memref<1x1x32x32x4x4xbf16, 2 : i32>
  memref.dealloc %alloc_2 : memref<1x1x128x64xbf16, 1 : i32>
  memref.dealloc %alloc_1 : memref<1x1x64x128xbf16, 1 : i32>
  memref.dealloc %alloc_0 : memref<1x1x8x16x4x8xbf16, 2 : i32>
  memref.dealloc %alloc : memref<1x1x16x8x8x4xbf16, 2 : i32>
  return
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c0 = arith.constant 0 : index
  %cst = arith.constant 0.000000e+00 : bf16
  %c32 = arith.constant 32 : index
  %c1 = arith.constant 1 : index
  %alloc = memref.alloc() : memref<1x1x16x8x8x4xbf16, 2 : i32>
  %alloc_0 = memref.alloc() : memref<1x1x8x16x4x8xbf16, 2 : i32>
  %alloc_1 = memref.alloc() : memref<1x1x64x128xbf16, 1 : i32>
  %alloc_2 = memref.alloc() : memref<1x1x128x64xbf16, 1 : i32>
  %alloc_3 = memref.alloc() : memref<1x1x32x32x4x4xbf16, 2 : i32>
  %alloc_4 = memref.alloc() : memref<1x1x128x128xbf16, 1 : i32>
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_5 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_6 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %7 = bufferization.to_tensor %alloc_4 restrict writable : memref<1x1x128x128xbf16, 1 : i32>
    %8 = bufferization.to_tensor %alloc_3 restrict writable : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %9 = linalg.fill ins(%cst : bf16) outs(%8 : tensor<1x1x32x32x4x4xbf16>) -> tensor<1x1x32x32x4x4xbf16>
    %extracted_slice_7 = tensor.extract_slice %extracted_slice[0, 0] [128, 64] [1, 1] : tensor<128x2048xbf16> to tensor<128x64xbf16>
    %10 = bufferization.to_tensor %alloc_2 restrict writable : memref<1x1x128x64xbf16, 1 : i32>
    %pack = tensor.pack %extracted_slice_7 inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %10 : tensor<128x64xbf16> -> tensor<1x1x128x64xbf16>
    %extracted_slice_8 = tensor.extract_slice %extracted_slice_5[0, 0] [64, 128] [1, 1] : tensor<2048x128xbf16> to tensor<64x128xbf16>
    %11 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x1x64x128xbf16, 1 : i32>
    %pack_9 = tensor.pack %extracted_slice_8 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %11 : tensor<64x128xbf16> -> tensor<1x1x64x128xbf16>
    %12 = scf.forall (%arg3, %arg4) = (0, 0) to (32, 32) step (16, 16) shared_outs(%arg5 = %8) -> (tensor<1x1x32x32x4x4xbf16>) {
      %14 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg3)
      %extracted_slice_11 = tensor.extract_slice %pack[0, 0, %14, 0] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x128x64xbf16> to tensor<1x1x64x64xbf16>
      %15 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x8x16x4x8xbf16, 2 : i32>
      %pack_12 = tensor.pack %extracted_slice_11 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %15 : tensor<1x1x64x64xbf16> -> tensor<1x1x8x16x4x8xbf16>
      %16 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg4)
      %extracted_slice_13 = tensor.extract_slice %pack_9[0, 0, 0, %16] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x64x128xbf16> to tensor<1x1x64x64xbf16>
      %17 = bufferization.to_tensor %alloc restrict writable : memref<1x1x16x8x8x4xbf16, 2 : i32>
      %pack_14 = tensor.pack %extracted_slice_13 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %17 : tensor<1x1x64x64xbf16> -> tensor<1x1x16x8x8x4xbf16>
      %extracted_slice_15 = tensor.extract_slice %arg5[0, 0, %arg4, %arg3, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x32x4x4xbf16> to tensor<1x1x16x16x4x4xbf16>
      %18 = linalg.fill ins(%cst : bf16) outs(%extracted_slice_15 : tensor<1x1x16x16x4x4xbf16>) -> tensor<1x1x16x16x4x4xbf16>
      %extracted_slice_16 = tensor.extract_slice %arg5[0, 0, %arg4, %arg3, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x32x4x4xbf16> to tensor<1x1x16x16x4x4xbf16>
      %19 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_12, %pack_14 : tensor<1x1x8x16x4x8xbf16>, tensor<1x1x16x8x8x4xbf16>) outs(%18 : tensor<1x1x16x16x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
      ^bb0(%in: bf16, %in_17: bf16, %out: bf16):
        %20 = arith.mulf %in, %in_17 : bf16
        %21 = arith.addf %out, %20 : bf16
        linalg.yield %21 : bf16
      } -> tensor<1x1x16x16x4x4xbf16>
      scf.forall.in_parallel {
        tensor.parallel_insert_slice %19 into %arg5[0, 0, %arg4, %arg3, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x16x16x4x4xbf16> into tensor<1x1x32x32x4x4xbf16>
      }
    } {mapping = [#gpu.block<y>, #gpu.block<x>]}
    %13 = scf.for %arg3 = %c1 to %c32 step %c1 iter_args(%arg4 = %12) -> (tensor<1x1x32x32x4x4xbf16>) {
      %14 = affine.apply affine_map<(d0) -> (d0 * 64)>(%arg3)
      %extracted_slice_11 = tensor.extract_slice %extracted_slice[0, %14] [128, 64] [1, 1] : tensor<128x2048xbf16> to tensor<128x64xbf16>
      %15 = bufferization.to_tensor %alloc_2 restrict writable : memref<1x1x128x64xbf16, 1 : i32>
      %pack_12 = tensor.pack %extracted_slice_11 inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %15 : tensor<128x64xbf16> -> tensor<1x1x128x64xbf16>
      %extracted_slice_13 = tensor.extract_slice %extracted_slice_5[%14, 0] [64, 128] [1, 1] : tensor<2048x128xbf16> to tensor<64x128xbf16>
      %16 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x1x64x128xbf16, 1 : i32>
      %pack_14 = tensor.pack %extracted_slice_13 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %16 : tensor<64x128xbf16> -> tensor<1x1x64x128xbf16>
      %17 = scf.forall (%arg5, %arg6) = (0, 0) to (32, 32) step (16, 16) shared_outs(%arg7 = %arg4) -> (tensor<1x1x32x32x4x4xbf16>) {
        %18 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg5)
        %extracted_slice_15 = tensor.extract_slice %pack_12[0, 0, %18, 0] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x128x64xbf16> to tensor<1x1x64x64xbf16>
        %19 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x8x16x4x8xbf16, 2 : i32>
        %pack_16 = tensor.pack %extracted_slice_15 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %19 : tensor<1x1x64x64xbf16> -> tensor<1x1x8x16x4x8xbf16>
        %20 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg6)
        %extracted_slice_17 = tensor.extract_slice %pack_14[0, 0, 0, %20] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x64x128xbf16> to tensor<1x1x64x64xbf16>
        %21 = bufferization.to_tensor %alloc restrict writable : memref<1x1x16x8x8x4xbf16, 2 : i32>
        %pack_18 = tensor.pack %extracted_slice_17 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %21 : tensor<1x1x64x64xbf16> -> tensor<1x1x16x8x8x4xbf16>
        %extracted_slice_19 = tensor.extract_slice %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x32x4x4xbf16> to tensor<1x1x16x16x4x4xbf16>
        %22 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_16, %pack_18 : tensor<1x1x8x16x4x8xbf16>, tensor<1x1x16x8x8x4xbf16>) outs(%extracted_slice_19 : tensor<1x1x16x16x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
        ^bb0(%in: bf16, %in_20: bf16, %out: bf16):
          %23 = arith.mulf %in, %in_20 : bf16
          %24 = arith.addf %out, %23 : bf16
          linalg.yield %24 : bf16
        } -> tensor<1x1x16x16x4x4xbf16>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %22 into %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x16x16x4x4xbf16> into tensor<1x1x32x32x4x4xbf16>
        }
      } {mapping = [#gpu.block<y>, #gpu.block<x>]}
      scf.yield %17 : tensor<1x1x32x32x4x4xbf16>
    }
    %unpack = tensor.unpack %13 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %7 : tensor<1x1x32x32x4x4xbf16> -> tensor<1x1x128x128xbf16>
    %unpack_10 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %extracted_slice_6 : tensor<1x1x128x128xbf16> -> tensor<128x128xbf16>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_10 into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  memref.dealloc %alloc_4 : memref<1x1x128x128xbf16, 1 : i32>
  memref.dealloc %alloc_3 : memref<1x1x32x32x4x4xbf16, 2 : i32>
  memref.dealloc %alloc_2 : memref<1x1x128x64xbf16, 1 : i32>
  memref.dealloc %alloc_1 : memref<1x1x64x128xbf16, 1 : i32>
  memref.dealloc %alloc_0 : memref<1x1x8x16x4x8xbf16, 2 : i32>
  memref.dealloc %alloc : memref<1x1x16x8x8x4xbf16, 2 : i32>
  return
}

// -----// IR Dump Before AMDAIEFusePackIntoLoop (iree-amdaie-fuse-pack-into-loop) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c0 = arith.constant 0 : index
  %cst = arith.constant 0.000000e+00 : bf16
  %c32 = arith.constant 32 : index
  %c1 = arith.constant 1 : index
  %alloc = memref.alloc() : memref<1x1x16x8x8x4xbf16, 2 : i32>
  %alloc_0 = memref.alloc() : memref<1x1x8x16x4x8xbf16, 2 : i32>
  %alloc_1 = memref.alloc() : memref<1x1x64x128xbf16, 1 : i32>
  %alloc_2 = memref.alloc() : memref<1x1x128x64xbf16, 1 : i32>
  %alloc_3 = memref.alloc() : memref<1x1x32x32x4x4xbf16, 2 : i32>
  %alloc_4 = memref.alloc() : memref<1x1x128x128xbf16, 1 : i32>
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_5 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_6 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %7 = bufferization.to_tensor %alloc_4 restrict writable : memref<1x1x128x128xbf16, 1 : i32>
    %8 = bufferization.to_tensor %alloc_3 restrict writable : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %extracted_slice_7 = tensor.extract_slice %extracted_slice[0, 0] [128, 64] [1, 1] : tensor<128x2048xbf16> to tensor<128x64xbf16>
    %9 = bufferization.to_tensor %alloc_2 restrict writable : memref<1x1x128x64xbf16, 1 : i32>
    %pack = tensor.pack %extracted_slice_7 inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %9 : tensor<128x64xbf16> -> tensor<1x1x128x64xbf16>
    %extracted_slice_8 = tensor.extract_slice %extracted_slice_5[0, 0] [64, 128] [1, 1] : tensor<2048x128xbf16> to tensor<64x128xbf16>
    %10 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x1x64x128xbf16, 1 : i32>
    %pack_9 = tensor.pack %extracted_slice_8 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %10 : tensor<64x128xbf16> -> tensor<1x1x64x128xbf16>
    %11 = scf.forall (%arg3, %arg4) = (0, 0) to (32, 32) step (16, 16) shared_outs(%arg5 = %8) -> (tensor<1x1x32x32x4x4xbf16>) {
      %13 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg3)
      %extracted_slice_11 = tensor.extract_slice %pack[0, 0, %13, 0] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x128x64xbf16> to tensor<1x1x64x64xbf16>
      %14 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x8x16x4x8xbf16, 2 : i32>
      %pack_12 = tensor.pack %extracted_slice_11 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %14 : tensor<1x1x64x64xbf16> -> tensor<1x1x8x16x4x8xbf16>
      %15 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg4)
      %extracted_slice_13 = tensor.extract_slice %pack_9[0, 0, 0, %15] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x64x128xbf16> to tensor<1x1x64x64xbf16>
      %16 = bufferization.to_tensor %alloc restrict writable : memref<1x1x16x8x8x4xbf16, 2 : i32>
      %pack_14 = tensor.pack %extracted_slice_13 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %16 : tensor<1x1x64x64xbf16> -> tensor<1x1x16x8x8x4xbf16>
      %extracted_slice_15 = tensor.extract_slice %arg5[0, 0, %arg4, %arg3, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x32x4x4xbf16> to tensor<1x1x16x16x4x4xbf16>
      %17 = linalg.fill ins(%cst : bf16) outs(%extracted_slice_15 : tensor<1x1x16x16x4x4xbf16>) -> tensor<1x1x16x16x4x4xbf16>
      %18 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_12, %pack_14 : tensor<1x1x8x16x4x8xbf16>, tensor<1x1x16x8x8x4xbf16>) outs(%17 : tensor<1x1x16x16x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
      ^bb0(%in: bf16, %in_16: bf16, %out: bf16):
        %19 = arith.mulf %in, %in_16 : bf16
        %20 = arith.addf %out, %19 : bf16
        linalg.yield %20 : bf16
      } -> tensor<1x1x16x16x4x4xbf16>
      scf.forall.in_parallel {
        tensor.parallel_insert_slice %18 into %arg5[0, 0, %arg4, %arg3, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x16x16x4x4xbf16> into tensor<1x1x32x32x4x4xbf16>
      }
    } {mapping = [#gpu.block<y>, #gpu.block<x>]}
    %12 = scf.for %arg3 = %c1 to %c32 step %c1 iter_args(%arg4 = %11) -> (tensor<1x1x32x32x4x4xbf16>) {
      %13 = affine.apply affine_map<(d0) -> (d0 * 64)>(%arg3)
      %extracted_slice_11 = tensor.extract_slice %extracted_slice[0, %13] [128, 64] [1, 1] : tensor<128x2048xbf16> to tensor<128x64xbf16>
      %14 = bufferization.to_tensor %alloc_2 restrict writable : memref<1x1x128x64xbf16, 1 : i32>
      %pack_12 = tensor.pack %extracted_slice_11 inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %14 : tensor<128x64xbf16> -> tensor<1x1x128x64xbf16>
      %extracted_slice_13 = tensor.extract_slice %extracted_slice_5[%13, 0] [64, 128] [1, 1] : tensor<2048x128xbf16> to tensor<64x128xbf16>
      %15 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x1x64x128xbf16, 1 : i32>
      %pack_14 = tensor.pack %extracted_slice_13 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %15 : tensor<64x128xbf16> -> tensor<1x1x64x128xbf16>
      %16 = scf.forall (%arg5, %arg6) = (0, 0) to (32, 32) step (16, 16) shared_outs(%arg7 = %arg4) -> (tensor<1x1x32x32x4x4xbf16>) {
        %17 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg5)
        %extracted_slice_15 = tensor.extract_slice %pack_12[0, 0, %17, 0] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x128x64xbf16> to tensor<1x1x64x64xbf16>
        %18 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x8x16x4x8xbf16, 2 : i32>
        %pack_16 = tensor.pack %extracted_slice_15 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %18 : tensor<1x1x64x64xbf16> -> tensor<1x1x8x16x4x8xbf16>
        %19 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg6)
        %extracted_slice_17 = tensor.extract_slice %pack_14[0, 0, 0, %19] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x64x128xbf16> to tensor<1x1x64x64xbf16>
        %20 = bufferization.to_tensor %alloc restrict writable : memref<1x1x16x8x8x4xbf16, 2 : i32>
        %pack_18 = tensor.pack %extracted_slice_17 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %20 : tensor<1x1x64x64xbf16> -> tensor<1x1x16x8x8x4xbf16>
        %extracted_slice_19 = tensor.extract_slice %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x32x4x4xbf16> to tensor<1x1x16x16x4x4xbf16>
        %21 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_16, %pack_18 : tensor<1x1x8x16x4x8xbf16>, tensor<1x1x16x8x8x4xbf16>) outs(%extracted_slice_19 : tensor<1x1x16x16x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
        ^bb0(%in: bf16, %in_20: bf16, %out: bf16):
          %22 = arith.mulf %in, %in_20 : bf16
          %23 = arith.addf %out, %22 : bf16
          linalg.yield %23 : bf16
        } -> tensor<1x1x16x16x4x4xbf16>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %21 into %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x16x16x4x4xbf16> into tensor<1x1x32x32x4x4xbf16>
        }
      } {mapping = [#gpu.block<y>, #gpu.block<x>]}
      scf.yield %16 : tensor<1x1x32x32x4x4xbf16>
    }
    %unpack = tensor.unpack %12 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %7 : tensor<1x1x32x32x4x4xbf16> -> tensor<1x1x128x128xbf16>
    %unpack_10 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %extracted_slice_6 : tensor<1x1x128x128xbf16> -> tensor<128x128xbf16>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_10 into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  memref.dealloc %alloc_4 : memref<1x1x128x128xbf16, 1 : i32>
  memref.dealloc %alloc_3 : memref<1x1x32x32x4x4xbf16, 2 : i32>
  memref.dealloc %alloc_2 : memref<1x1x128x64xbf16, 1 : i32>
  memref.dealloc %alloc_1 : memref<1x1x64x128xbf16, 1 : i32>
  memref.dealloc %alloc_0 : memref<1x1x8x16x4x8xbf16, 2 : i32>
  memref.dealloc %alloc : memref<1x1x16x8x8x4xbf16, 2 : i32>
  return
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c0 = arith.constant 0 : index
  %cst = arith.constant 0.000000e+00 : bf16
  %c32 = arith.constant 32 : index
  %c1 = arith.constant 1 : index
  %alloc = memref.alloc() : memref<1x1x16x8x8x4xbf16, 2 : i32>
  %alloc_0 = memref.alloc() : memref<1x1x8x16x4x8xbf16, 2 : i32>
  %alloc_1 = memref.alloc() : memref<1x1x64x128xbf16, 1 : i32>
  %alloc_2 = memref.alloc() : memref<1x1x128x64xbf16, 1 : i32>
  %alloc_3 = memref.alloc() : memref<1x1x32x32x4x4xbf16, 2 : i32>
  %alloc_4 = memref.alloc() : memref<1x1x128x128xbf16, 1 : i32>
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_5 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_6 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %7 = bufferization.to_tensor %alloc_4 restrict writable : memref<1x1x128x128xbf16, 1 : i32>
    %8 = bufferization.to_tensor %alloc_3 restrict writable : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %extracted_slice_7 = tensor.extract_slice %extracted_slice[0, 0] [128, 64] [1, 1] : tensor<128x2048xbf16> to tensor<128x64xbf16>
    %9 = bufferization.to_tensor %alloc_2 restrict writable : memref<1x1x128x64xbf16, 1 : i32>
    %pack = tensor.pack %extracted_slice_7 inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %9 : tensor<128x64xbf16> -> tensor<1x1x128x64xbf16>
    %extracted_slice_8 = tensor.extract_slice %extracted_slice_5[0, 0] [64, 128] [1, 1] : tensor<2048x128xbf16> to tensor<64x128xbf16>
    %10 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x1x64x128xbf16, 1 : i32>
    %pack_9 = tensor.pack %extracted_slice_8 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %10 : tensor<64x128xbf16> -> tensor<1x1x64x128xbf16>
    %11 = scf.forall (%arg3, %arg4) = (0, 0) to (32, 32) step (16, 16) shared_outs(%arg5 = %8) -> (tensor<1x1x32x32x4x4xbf16>) {
      %13 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg3)
      %extracted_slice_11 = tensor.extract_slice %pack[0, 0, %13, 0] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x128x64xbf16> to tensor<1x1x64x64xbf16>
      %14 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x8x16x4x8xbf16, 2 : i32>
      %pack_12 = tensor.pack %extracted_slice_11 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %14 : tensor<1x1x64x64xbf16> -> tensor<1x1x8x16x4x8xbf16>
      %15 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg4)
      %extracted_slice_13 = tensor.extract_slice %pack_9[0, 0, 0, %15] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x64x128xbf16> to tensor<1x1x64x64xbf16>
      %16 = bufferization.to_tensor %alloc restrict writable : memref<1x1x16x8x8x4xbf16, 2 : i32>
      %pack_14 = tensor.pack %extracted_slice_13 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %16 : tensor<1x1x64x64xbf16> -> tensor<1x1x16x8x8x4xbf16>
      %extracted_slice_15 = tensor.extract_slice %arg5[0, 0, %arg4, %arg3, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x32x4x4xbf16> to tensor<1x1x16x16x4x4xbf16>
      %17 = linalg.fill ins(%cst : bf16) outs(%extracted_slice_15 : tensor<1x1x16x16x4x4xbf16>) -> tensor<1x1x16x16x4x4xbf16>
      %18 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_12, %pack_14 : tensor<1x1x8x16x4x8xbf16>, tensor<1x1x16x8x8x4xbf16>) outs(%17 : tensor<1x1x16x16x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
      ^bb0(%in: bf16, %in_16: bf16, %out: bf16):
        %19 = arith.mulf %in, %in_16 : bf16
        %20 = arith.addf %out, %19 : bf16
        linalg.yield %20 : bf16
      } -> tensor<1x1x16x16x4x4xbf16>
      scf.forall.in_parallel {
        tensor.parallel_insert_slice %18 into %arg5[0, 0, %arg4, %arg3, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x16x16x4x4xbf16> into tensor<1x1x32x32x4x4xbf16>
      }
    } {mapping = [#gpu.block<y>, #gpu.block<x>]}
    %12 = scf.for %arg3 = %c1 to %c32 step %c1 iter_args(%arg4 = %11) -> (tensor<1x1x32x32x4x4xbf16>) {
      %13 = affine.apply affine_map<(d0) -> (d0 * 64)>(%arg3)
      %extracted_slice_11 = tensor.extract_slice %extracted_slice[0, %13] [128, 64] [1, 1] : tensor<128x2048xbf16> to tensor<128x64xbf16>
      %14 = bufferization.to_tensor %alloc_2 restrict writable : memref<1x1x128x64xbf16, 1 : i32>
      %pack_12 = tensor.pack %extracted_slice_11 inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %14 : tensor<128x64xbf16> -> tensor<1x1x128x64xbf16>
      %extracted_slice_13 = tensor.extract_slice %extracted_slice_5[%13, 0] [64, 128] [1, 1] : tensor<2048x128xbf16> to tensor<64x128xbf16>
      %15 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x1x64x128xbf16, 1 : i32>
      %pack_14 = tensor.pack %extracted_slice_13 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %15 : tensor<64x128xbf16> -> tensor<1x1x64x128xbf16>
      %16 = scf.forall (%arg5, %arg6) = (0, 0) to (32, 32) step (16, 16) shared_outs(%arg7 = %arg4) -> (tensor<1x1x32x32x4x4xbf16>) {
        %17 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg5)
        %extracted_slice_15 = tensor.extract_slice %pack_12[0, 0, %17, 0] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x128x64xbf16> to tensor<1x1x64x64xbf16>
        %18 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x8x16x4x8xbf16, 2 : i32>
        %pack_16 = tensor.pack %extracted_slice_15 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %18 : tensor<1x1x64x64xbf16> -> tensor<1x1x8x16x4x8xbf16>
        %19 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg6)
        %extracted_slice_17 = tensor.extract_slice %pack_14[0, 0, 0, %19] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x64x128xbf16> to tensor<1x1x64x64xbf16>
        %20 = bufferization.to_tensor %alloc restrict writable : memref<1x1x16x8x8x4xbf16, 2 : i32>
        %pack_18 = tensor.pack %extracted_slice_17 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %20 : tensor<1x1x64x64xbf16> -> tensor<1x1x16x8x8x4xbf16>
        %extracted_slice_19 = tensor.extract_slice %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x32x4x4xbf16> to tensor<1x1x16x16x4x4xbf16>
        %21 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_16, %pack_18 : tensor<1x1x8x16x4x8xbf16>, tensor<1x1x16x8x8x4xbf16>) outs(%extracted_slice_19 : tensor<1x1x16x16x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
        ^bb0(%in: bf16, %in_20: bf16, %out: bf16):
          %22 = arith.mulf %in, %in_20 : bf16
          %23 = arith.addf %out, %22 : bf16
          linalg.yield %23 : bf16
        } -> tensor<1x1x16x16x4x4xbf16>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %21 into %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x16x16x4x4xbf16> into tensor<1x1x32x32x4x4xbf16>
        }
      } {mapping = [#gpu.block<y>, #gpu.block<x>]}
      scf.yield %16 : tensor<1x1x32x32x4x4xbf16>
    }
    %unpack = tensor.unpack %12 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %7 : tensor<1x1x32x32x4x4xbf16> -> tensor<1x1x128x128xbf16>
    %unpack_10 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %extracted_slice_6 : tensor<1x1x128x128xbf16> -> tensor<128x128xbf16>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_10 into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  memref.dealloc %alloc_4 : memref<1x1x128x128xbf16, 1 : i32>
  memref.dealloc %alloc_3 : memref<1x1x32x32x4x4xbf16, 2 : i32>
  memref.dealloc %alloc_2 : memref<1x1x128x64xbf16, 1 : i32>
  memref.dealloc %alloc_1 : memref<1x1x64x128xbf16, 1 : i32>
  memref.dealloc %alloc_0 : memref<1x1x8x16x4x8xbf16, 2 : i32>
  memref.dealloc %alloc : memref<1x1x16x8x8x4xbf16, 2 : i32>
  return
}

// -----// IR Dump Before AMDAIEBufferizeToAllocation (iree-amdaie-bufferize-to-allocation) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c0 = arith.constant 0 : index
  %cst = arith.constant 0.000000e+00 : bf16
  %c32 = arith.constant 32 : index
  %c1 = arith.constant 1 : index
  %alloc = memref.alloc() : memref<1x1x16x8x8x4xbf16, 2 : i32>
  %alloc_0 = memref.alloc() : memref<1x1x8x16x4x8xbf16, 2 : i32>
  %alloc_1 = memref.alloc() : memref<1x1x64x128xbf16, 1 : i32>
  %alloc_2 = memref.alloc() : memref<1x1x128x64xbf16, 1 : i32>
  %alloc_3 = memref.alloc() : memref<1x1x32x32x4x4xbf16, 2 : i32>
  %alloc_4 = memref.alloc() : memref<1x1x128x128xbf16, 1 : i32>
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_5 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_6 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %7 = bufferization.to_tensor %alloc_4 restrict writable : memref<1x1x128x128xbf16, 1 : i32>
    %8 = bufferization.to_tensor %alloc_3 restrict writable : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %extracted_slice_7 = tensor.extract_slice %extracted_slice[0, 0] [128, 64] [1, 1] : tensor<128x2048xbf16> to tensor<128x64xbf16>
    %9 = bufferization.to_tensor %alloc_2 restrict writable : memref<1x1x128x64xbf16, 1 : i32>
    %pack = tensor.pack %extracted_slice_7 inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %9 : tensor<128x64xbf16> -> tensor<1x1x128x64xbf16>
    %extracted_slice_8 = tensor.extract_slice %extracted_slice_5[0, 0] [64, 128] [1, 1] : tensor<2048x128xbf16> to tensor<64x128xbf16>
    %10 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x1x64x128xbf16, 1 : i32>
    %pack_9 = tensor.pack %extracted_slice_8 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %10 : tensor<64x128xbf16> -> tensor<1x1x64x128xbf16>
    %11 = scf.forall (%arg3, %arg4) = (0, 0) to (32, 32) step (16, 16) shared_outs(%arg5 = %8) -> (tensor<1x1x32x32x4x4xbf16>) {
      %13 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg3)
      %extracted_slice_11 = tensor.extract_slice %pack[0, 0, %13, 0] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x128x64xbf16> to tensor<1x1x64x64xbf16>
      %14 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x8x16x4x8xbf16, 2 : i32>
      %pack_12 = tensor.pack %extracted_slice_11 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %14 : tensor<1x1x64x64xbf16> -> tensor<1x1x8x16x4x8xbf16>
      %15 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg4)
      %extracted_slice_13 = tensor.extract_slice %pack_9[0, 0, 0, %15] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x64x128xbf16> to tensor<1x1x64x64xbf16>
      %16 = bufferization.to_tensor %alloc restrict writable : memref<1x1x16x8x8x4xbf16, 2 : i32>
      %pack_14 = tensor.pack %extracted_slice_13 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %16 : tensor<1x1x64x64xbf16> -> tensor<1x1x16x8x8x4xbf16>
      %extracted_slice_15 = tensor.extract_slice %arg5[0, 0, %arg4, %arg3, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x32x4x4xbf16> to tensor<1x1x16x16x4x4xbf16>
      %17 = linalg.fill ins(%cst : bf16) outs(%extracted_slice_15 : tensor<1x1x16x16x4x4xbf16>) -> tensor<1x1x16x16x4x4xbf16>
      %18 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_12, %pack_14 : tensor<1x1x8x16x4x8xbf16>, tensor<1x1x16x8x8x4xbf16>) outs(%17 : tensor<1x1x16x16x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
      ^bb0(%in: bf16, %in_16: bf16, %out: bf16):
        %19 = arith.mulf %in, %in_16 : bf16
        %20 = arith.addf %out, %19 : bf16
        linalg.yield %20 : bf16
      } -> tensor<1x1x16x16x4x4xbf16>
      scf.forall.in_parallel {
        tensor.parallel_insert_slice %18 into %arg5[0, 0, %arg4, %arg3, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x16x16x4x4xbf16> into tensor<1x1x32x32x4x4xbf16>
      }
    } {mapping = [#gpu.block<y>, #gpu.block<x>]}
    %12 = scf.for %arg3 = %c1 to %c32 step %c1 iter_args(%arg4 = %11) -> (tensor<1x1x32x32x4x4xbf16>) {
      %13 = affine.apply affine_map<(d0) -> (d0 * 64)>(%arg3)
      %extracted_slice_11 = tensor.extract_slice %extracted_slice[0, %13] [128, 64] [1, 1] : tensor<128x2048xbf16> to tensor<128x64xbf16>
      %14 = bufferization.to_tensor %alloc_2 restrict writable : memref<1x1x128x64xbf16, 1 : i32>
      %pack_12 = tensor.pack %extracted_slice_11 inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %14 : tensor<128x64xbf16> -> tensor<1x1x128x64xbf16>
      %extracted_slice_13 = tensor.extract_slice %extracted_slice_5[%13, 0] [64, 128] [1, 1] : tensor<2048x128xbf16> to tensor<64x128xbf16>
      %15 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x1x64x128xbf16, 1 : i32>
      %pack_14 = tensor.pack %extracted_slice_13 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %15 : tensor<64x128xbf16> -> tensor<1x1x64x128xbf16>
      %16 = scf.forall (%arg5, %arg6) = (0, 0) to (32, 32) step (16, 16) shared_outs(%arg7 = %arg4) -> (tensor<1x1x32x32x4x4xbf16>) {
        %17 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg5)
        %extracted_slice_15 = tensor.extract_slice %pack_12[0, 0, %17, 0] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x128x64xbf16> to tensor<1x1x64x64xbf16>
        %18 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x8x16x4x8xbf16, 2 : i32>
        %pack_16 = tensor.pack %extracted_slice_15 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %18 : tensor<1x1x64x64xbf16> -> tensor<1x1x8x16x4x8xbf16>
        %19 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg6)
        %extracted_slice_17 = tensor.extract_slice %pack_14[0, 0, 0, %19] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x64x128xbf16> to tensor<1x1x64x64xbf16>
        %20 = bufferization.to_tensor %alloc restrict writable : memref<1x1x16x8x8x4xbf16, 2 : i32>
        %pack_18 = tensor.pack %extracted_slice_17 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %20 : tensor<1x1x64x64xbf16> -> tensor<1x1x16x8x8x4xbf16>
        %extracted_slice_19 = tensor.extract_slice %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x32x4x4xbf16> to tensor<1x1x16x16x4x4xbf16>
        %21 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_16, %pack_18 : tensor<1x1x8x16x4x8xbf16>, tensor<1x1x16x8x8x4xbf16>) outs(%extracted_slice_19 : tensor<1x1x16x16x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
        ^bb0(%in: bf16, %in_20: bf16, %out: bf16):
          %22 = arith.mulf %in, %in_20 : bf16
          %23 = arith.addf %out, %22 : bf16
          linalg.yield %23 : bf16
        } -> tensor<1x1x16x16x4x4xbf16>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %21 into %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x16x16x4x4xbf16> into tensor<1x1x32x32x4x4xbf16>
        }
      } {mapping = [#gpu.block<y>, #gpu.block<x>]}
      scf.yield %16 : tensor<1x1x32x32x4x4xbf16>
    }
    %unpack = tensor.unpack %12 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %7 : tensor<1x1x32x32x4x4xbf16> -> tensor<1x1x128x128xbf16>
    %unpack_10 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %extracted_slice_6 : tensor<1x1x128x128xbf16> -> tensor<128x128xbf16>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_10 into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  memref.dealloc %alloc_4 : memref<1x1x128x128xbf16, 1 : i32>
  memref.dealloc %alloc_3 : memref<1x1x32x32x4x4xbf16, 2 : i32>
  memref.dealloc %alloc_2 : memref<1x1x128x64xbf16, 1 : i32>
  memref.dealloc %alloc_1 : memref<1x1x64x128xbf16, 1 : i32>
  memref.dealloc %alloc_0 : memref<1x1x8x16x4x8xbf16, 2 : i32>
  memref.dealloc %alloc : memref<1x1x16x8x8x4xbf16, 2 : i32>
  return
}

// -----// IR Dump Before HoistStaticallyBoundAllocations (iree-hoist-statically-bound-allocations) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c0 = arith.constant 0 : index
  %cst = arith.constant 0.000000e+00 : bf16
  %c32 = arith.constant 32 : index
  %c1 = arith.constant 1 : index
  %alloc = memref.alloc() : memref<1x1x16x8x8x4xbf16, 2 : i32>
  %alloc_0 = memref.alloc() : memref<1x1x8x16x4x8xbf16, 2 : i32>
  %alloc_1 = memref.alloc() : memref<1x1x64x128xbf16, 1 : i32>
  %alloc_2 = memref.alloc() : memref<1x1x128x64xbf16, 1 : i32>
  %alloc_3 = memref.alloc() : memref<1x1x32x32x4x4xbf16, 2 : i32>
  %alloc_4 = memref.alloc() : memref<1x1x128x128xbf16, 1 : i32>
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_5 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_6 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %7 = bufferization.to_tensor %alloc_4 restrict writable : memref<1x1x128x128xbf16, 1 : i32>
    %8 = bufferization.to_tensor %alloc_3 restrict writable : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %extracted_slice_7 = tensor.extract_slice %extracted_slice[0, 0] [128, 64] [1, 1] : tensor<128x2048xbf16> to tensor<128x64xbf16>
    %9 = bufferization.to_tensor %alloc_2 restrict writable : memref<1x1x128x64xbf16, 1 : i32>
    %pack = tensor.pack %extracted_slice_7 inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %9 : tensor<128x64xbf16> -> tensor<1x1x128x64xbf16>
    %extracted_slice_8 = tensor.extract_slice %extracted_slice_5[0, 0] [64, 128] [1, 1] : tensor<2048x128xbf16> to tensor<64x128xbf16>
    %10 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x1x64x128xbf16, 1 : i32>
    %pack_9 = tensor.pack %extracted_slice_8 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %10 : tensor<64x128xbf16> -> tensor<1x1x64x128xbf16>
    %11 = scf.forall (%arg3, %arg4) = (0, 0) to (32, 32) step (16, 16) shared_outs(%arg5 = %8) -> (tensor<1x1x32x32x4x4xbf16>) {
      %13 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg3)
      %extracted_slice_11 = tensor.extract_slice %pack[0, 0, %13, 0] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x128x64xbf16> to tensor<1x1x64x64xbf16>
      %14 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x8x16x4x8xbf16, 2 : i32>
      %pack_12 = tensor.pack %extracted_slice_11 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %14 : tensor<1x1x64x64xbf16> -> tensor<1x1x8x16x4x8xbf16>
      %15 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg4)
      %extracted_slice_13 = tensor.extract_slice %pack_9[0, 0, 0, %15] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x64x128xbf16> to tensor<1x1x64x64xbf16>
      %16 = bufferization.to_tensor %alloc restrict writable : memref<1x1x16x8x8x4xbf16, 2 : i32>
      %pack_14 = tensor.pack %extracted_slice_13 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %16 : tensor<1x1x64x64xbf16> -> tensor<1x1x16x8x8x4xbf16>
      %extracted_slice_15 = tensor.extract_slice %arg5[0, 0, %arg4, %arg3, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x32x4x4xbf16> to tensor<1x1x16x16x4x4xbf16>
      %17 = linalg.fill ins(%cst : bf16) outs(%extracted_slice_15 : tensor<1x1x16x16x4x4xbf16>) -> tensor<1x1x16x16x4x4xbf16>
      %18 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_12, %pack_14 : tensor<1x1x8x16x4x8xbf16>, tensor<1x1x16x8x8x4xbf16>) outs(%17 : tensor<1x1x16x16x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
      ^bb0(%in: bf16, %in_16: bf16, %out: bf16):
        %19 = arith.mulf %in, %in_16 : bf16
        %20 = arith.addf %out, %19 : bf16
        linalg.yield %20 : bf16
      } -> tensor<1x1x16x16x4x4xbf16>
      scf.forall.in_parallel {
        tensor.parallel_insert_slice %18 into %arg5[0, 0, %arg4, %arg3, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x16x16x4x4xbf16> into tensor<1x1x32x32x4x4xbf16>
      }
    } {mapping = [#gpu.block<y>, #gpu.block<x>]}
    %12 = scf.for %arg3 = %c1 to %c32 step %c1 iter_args(%arg4 = %11) -> (tensor<1x1x32x32x4x4xbf16>) {
      %13 = affine.apply affine_map<(d0) -> (d0 * 64)>(%arg3)
      %extracted_slice_11 = tensor.extract_slice %extracted_slice[0, %13] [128, 64] [1, 1] : tensor<128x2048xbf16> to tensor<128x64xbf16>
      %14 = bufferization.to_tensor %alloc_2 restrict writable : memref<1x1x128x64xbf16, 1 : i32>
      %pack_12 = tensor.pack %extracted_slice_11 inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %14 : tensor<128x64xbf16> -> tensor<1x1x128x64xbf16>
      %extracted_slice_13 = tensor.extract_slice %extracted_slice_5[%13, 0] [64, 128] [1, 1] : tensor<2048x128xbf16> to tensor<64x128xbf16>
      %15 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x1x64x128xbf16, 1 : i32>
      %pack_14 = tensor.pack %extracted_slice_13 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %15 : tensor<64x128xbf16> -> tensor<1x1x64x128xbf16>
      %16 = scf.forall (%arg5, %arg6) = (0, 0) to (32, 32) step (16, 16) shared_outs(%arg7 = %arg4) -> (tensor<1x1x32x32x4x4xbf16>) {
        %17 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg5)
        %extracted_slice_15 = tensor.extract_slice %pack_12[0, 0, %17, 0] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x128x64xbf16> to tensor<1x1x64x64xbf16>
        %18 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x8x16x4x8xbf16, 2 : i32>
        %pack_16 = tensor.pack %extracted_slice_15 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %18 : tensor<1x1x64x64xbf16> -> tensor<1x1x8x16x4x8xbf16>
        %19 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg6)
        %extracted_slice_17 = tensor.extract_slice %pack_14[0, 0, 0, %19] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x64x128xbf16> to tensor<1x1x64x64xbf16>
        %20 = bufferization.to_tensor %alloc restrict writable : memref<1x1x16x8x8x4xbf16, 2 : i32>
        %pack_18 = tensor.pack %extracted_slice_17 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %20 : tensor<1x1x64x64xbf16> -> tensor<1x1x16x8x8x4xbf16>
        %extracted_slice_19 = tensor.extract_slice %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x32x4x4xbf16> to tensor<1x1x16x16x4x4xbf16>
        %21 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_16, %pack_18 : tensor<1x1x8x16x4x8xbf16>, tensor<1x1x16x8x8x4xbf16>) outs(%extracted_slice_19 : tensor<1x1x16x16x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
        ^bb0(%in: bf16, %in_20: bf16, %out: bf16):
          %22 = arith.mulf %in, %in_20 : bf16
          %23 = arith.addf %out, %22 : bf16
          linalg.yield %23 : bf16
        } -> tensor<1x1x16x16x4x4xbf16>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %21 into %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x16x16x4x4xbf16> into tensor<1x1x32x32x4x4xbf16>
        }
      } {mapping = [#gpu.block<y>, #gpu.block<x>]}
      scf.yield %16 : tensor<1x1x32x32x4x4xbf16>
    }
    %unpack = tensor.unpack %12 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %7 : tensor<1x1x32x32x4x4xbf16> -> tensor<1x1x128x128xbf16>
    %unpack_10 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %extracted_slice_6 : tensor<1x1x128x128xbf16> -> tensor<128x128xbf16>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_10 into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  memref.dealloc %alloc_4 : memref<1x1x128x128xbf16, 1 : i32>
  memref.dealloc %alloc_3 : memref<1x1x32x32x4x4xbf16, 2 : i32>
  memref.dealloc %alloc_2 : memref<1x1x128x64xbf16, 1 : i32>
  memref.dealloc %alloc_1 : memref<1x1x64x128xbf16, 1 : i32>
  memref.dealloc %alloc_0 : memref<1x1x8x16x4x8xbf16, 2 : i32>
  memref.dealloc %alloc : memref<1x1x16x8x8x4xbf16, 2 : i32>
  return
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c0 = arith.constant 0 : index
  %cst = arith.constant 0.000000e+00 : bf16
  %c32 = arith.constant 32 : index
  %c1 = arith.constant 1 : index
  %alloc = memref.alloc() : memref<1x1x16x8x8x4xbf16, 2 : i32>
  %alloc_0 = memref.alloc() : memref<1x1x8x16x4x8xbf16, 2 : i32>
  %alloc_1 = memref.alloc() : memref<1x1x64x128xbf16, 1 : i32>
  %alloc_2 = memref.alloc() : memref<1x1x128x64xbf16, 1 : i32>
  %alloc_3 = memref.alloc() : memref<1x1x32x32x4x4xbf16, 2 : i32>
  %alloc_4 = memref.alloc() : memref<1x1x128x128xbf16, 1 : i32>
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_5 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_6 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %7 = bufferization.to_tensor %alloc_4 restrict writable : memref<1x1x128x128xbf16, 1 : i32>
    %8 = bufferization.to_tensor %alloc_3 restrict writable : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %extracted_slice_7 = tensor.extract_slice %extracted_slice[0, 0] [128, 64] [1, 1] : tensor<128x2048xbf16> to tensor<128x64xbf16>
    %9 = bufferization.to_tensor %alloc_2 restrict writable : memref<1x1x128x64xbf16, 1 : i32>
    %pack = tensor.pack %extracted_slice_7 inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %9 : tensor<128x64xbf16> -> tensor<1x1x128x64xbf16>
    %extracted_slice_8 = tensor.extract_slice %extracted_slice_5[0, 0] [64, 128] [1, 1] : tensor<2048x128xbf16> to tensor<64x128xbf16>
    %10 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x1x64x128xbf16, 1 : i32>
    %pack_9 = tensor.pack %extracted_slice_8 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %10 : tensor<64x128xbf16> -> tensor<1x1x64x128xbf16>
    %11 = scf.forall (%arg3, %arg4) = (0, 0) to (32, 32) step (16, 16) shared_outs(%arg5 = %8) -> (tensor<1x1x32x32x4x4xbf16>) {
      %13 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg3)
      %extracted_slice_11 = tensor.extract_slice %pack[0, 0, %13, 0] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x128x64xbf16> to tensor<1x1x64x64xbf16>
      %14 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x8x16x4x8xbf16, 2 : i32>
      %pack_12 = tensor.pack %extracted_slice_11 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %14 : tensor<1x1x64x64xbf16> -> tensor<1x1x8x16x4x8xbf16>
      %15 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg4)
      %extracted_slice_13 = tensor.extract_slice %pack_9[0, 0, 0, %15] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x64x128xbf16> to tensor<1x1x64x64xbf16>
      %16 = bufferization.to_tensor %alloc restrict writable : memref<1x1x16x8x8x4xbf16, 2 : i32>
      %pack_14 = tensor.pack %extracted_slice_13 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %16 : tensor<1x1x64x64xbf16> -> tensor<1x1x16x8x8x4xbf16>
      %extracted_slice_15 = tensor.extract_slice %arg5[0, 0, %arg4, %arg3, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x32x4x4xbf16> to tensor<1x1x16x16x4x4xbf16>
      %17 = linalg.fill ins(%cst : bf16) outs(%extracted_slice_15 : tensor<1x1x16x16x4x4xbf16>) -> tensor<1x1x16x16x4x4xbf16>
      %18 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_12, %pack_14 : tensor<1x1x8x16x4x8xbf16>, tensor<1x1x16x8x8x4xbf16>) outs(%17 : tensor<1x1x16x16x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
      ^bb0(%in: bf16, %in_16: bf16, %out: bf16):
        %19 = arith.mulf %in, %in_16 : bf16
        %20 = arith.addf %out, %19 : bf16
        linalg.yield %20 : bf16
      } -> tensor<1x1x16x16x4x4xbf16>
      scf.forall.in_parallel {
        tensor.parallel_insert_slice %18 into %arg5[0, 0, %arg4, %arg3, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x16x16x4x4xbf16> into tensor<1x1x32x32x4x4xbf16>
      }
    } {mapping = [#gpu.block<y>, #gpu.block<x>]}
    %12 = scf.for %arg3 = %c1 to %c32 step %c1 iter_args(%arg4 = %11) -> (tensor<1x1x32x32x4x4xbf16>) {
      %13 = affine.apply affine_map<(d0) -> (d0 * 64)>(%arg3)
      %extracted_slice_11 = tensor.extract_slice %extracted_slice[0, %13] [128, 64] [1, 1] : tensor<128x2048xbf16> to tensor<128x64xbf16>
      %14 = bufferization.to_tensor %alloc_2 restrict writable : memref<1x1x128x64xbf16, 1 : i32>
      %pack_12 = tensor.pack %extracted_slice_11 inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %14 : tensor<128x64xbf16> -> tensor<1x1x128x64xbf16>
      %extracted_slice_13 = tensor.extract_slice %extracted_slice_5[%13, 0] [64, 128] [1, 1] : tensor<2048x128xbf16> to tensor<64x128xbf16>
      %15 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x1x64x128xbf16, 1 : i32>
      %pack_14 = tensor.pack %extracted_slice_13 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %15 : tensor<64x128xbf16> -> tensor<1x1x64x128xbf16>
      %16 = scf.forall (%arg5, %arg6) = (0, 0) to (32, 32) step (16, 16) shared_outs(%arg7 = %arg4) -> (tensor<1x1x32x32x4x4xbf16>) {
        %17 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg5)
        %extracted_slice_15 = tensor.extract_slice %pack_12[0, 0, %17, 0] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x128x64xbf16> to tensor<1x1x64x64xbf16>
        %18 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x8x16x4x8xbf16, 2 : i32>
        %pack_16 = tensor.pack %extracted_slice_15 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %18 : tensor<1x1x64x64xbf16> -> tensor<1x1x8x16x4x8xbf16>
        %19 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg6)
        %extracted_slice_17 = tensor.extract_slice %pack_14[0, 0, 0, %19] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x64x128xbf16> to tensor<1x1x64x64xbf16>
        %20 = bufferization.to_tensor %alloc restrict writable : memref<1x1x16x8x8x4xbf16, 2 : i32>
        %pack_18 = tensor.pack %extracted_slice_17 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %20 : tensor<1x1x64x64xbf16> -> tensor<1x1x16x8x8x4xbf16>
        %extracted_slice_19 = tensor.extract_slice %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x32x4x4xbf16> to tensor<1x1x16x16x4x4xbf16>
        %21 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_16, %pack_18 : tensor<1x1x8x16x4x8xbf16>, tensor<1x1x16x8x8x4xbf16>) outs(%extracted_slice_19 : tensor<1x1x16x16x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
        ^bb0(%in: bf16, %in_20: bf16, %out: bf16):
          %22 = arith.mulf %in, %in_20 : bf16
          %23 = arith.addf %out, %22 : bf16
          linalg.yield %23 : bf16
        } -> tensor<1x1x16x16x4x4xbf16>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %21 into %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x16x16x4x4xbf16> into tensor<1x1x32x32x4x4xbf16>
        }
      } {mapping = [#gpu.block<y>, #gpu.block<x>]}
      scf.yield %16 : tensor<1x1x32x32x4x4xbf16>
    }
    %unpack = tensor.unpack %12 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %7 : tensor<1x1x32x32x4x4xbf16> -> tensor<1x1x128x128xbf16>
    %unpack_10 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %extracted_slice_6 : tensor<1x1x128x128xbf16> -> tensor<128x128xbf16>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_10 into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  memref.dealloc %alloc_4 : memref<1x1x128x128xbf16, 1 : i32>
  memref.dealloc %alloc_3 : memref<1x1x32x32x4x4xbf16, 2 : i32>
  memref.dealloc %alloc_2 : memref<1x1x128x64xbf16, 1 : i32>
  memref.dealloc %alloc_1 : memref<1x1x64x128xbf16, 1 : i32>
  memref.dealloc %alloc_0 : memref<1x1x8x16x4x8xbf16, 2 : i32>
  memref.dealloc %alloc : memref<1x1x16x8x8x4xbf16, 2 : i32>
  return
}

// -----// IR Dump Before AMDAIELowerToUKernels (iree-amdaie-lower-to-ukernels) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c0 = arith.constant 0 : index
  %cst = arith.constant 0.000000e+00 : bf16
  %c32 = arith.constant 32 : index
  %c1 = arith.constant 1 : index
  %alloc = memref.alloc() : memref<1x1x16x8x8x4xbf16, 2 : i32>
  %alloc_0 = memref.alloc() : memref<1x1x8x16x4x8xbf16, 2 : i32>
  %alloc_1 = memref.alloc() : memref<1x1x64x128xbf16, 1 : i32>
  %alloc_2 = memref.alloc() : memref<1x1x128x64xbf16, 1 : i32>
  %alloc_3 = memref.alloc() : memref<1x1x32x32x4x4xbf16, 2 : i32>
  %alloc_4 = memref.alloc() : memref<1x1x128x128xbf16, 1 : i32>
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_5 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_6 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %7 = bufferization.to_tensor %alloc_4 restrict writable : memref<1x1x128x128xbf16, 1 : i32>
    %8 = bufferization.to_tensor %alloc_3 restrict writable : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %extracted_slice_7 = tensor.extract_slice %extracted_slice[0, 0] [128, 64] [1, 1] : tensor<128x2048xbf16> to tensor<128x64xbf16>
    %9 = bufferization.to_tensor %alloc_2 restrict writable : memref<1x1x128x64xbf16, 1 : i32>
    %pack = tensor.pack %extracted_slice_7 inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %9 : tensor<128x64xbf16> -> tensor<1x1x128x64xbf16>
    %extracted_slice_8 = tensor.extract_slice %extracted_slice_5[0, 0] [64, 128] [1, 1] : tensor<2048x128xbf16> to tensor<64x128xbf16>
    %10 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x1x64x128xbf16, 1 : i32>
    %pack_9 = tensor.pack %extracted_slice_8 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %10 : tensor<64x128xbf16> -> tensor<1x1x64x128xbf16>
    %11 = scf.forall (%arg3, %arg4) = (0, 0) to (32, 32) step (16, 16) shared_outs(%arg5 = %8) -> (tensor<1x1x32x32x4x4xbf16>) {
      %13 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg3)
      %extracted_slice_11 = tensor.extract_slice %pack[0, 0, %13, 0] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x128x64xbf16> to tensor<1x1x64x64xbf16>
      %14 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x8x16x4x8xbf16, 2 : i32>
      %pack_12 = tensor.pack %extracted_slice_11 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %14 : tensor<1x1x64x64xbf16> -> tensor<1x1x8x16x4x8xbf16>
      %15 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg4)
      %extracted_slice_13 = tensor.extract_slice %pack_9[0, 0, 0, %15] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x64x128xbf16> to tensor<1x1x64x64xbf16>
      %16 = bufferization.to_tensor %alloc restrict writable : memref<1x1x16x8x8x4xbf16, 2 : i32>
      %pack_14 = tensor.pack %extracted_slice_13 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %16 : tensor<1x1x64x64xbf16> -> tensor<1x1x16x8x8x4xbf16>
      %extracted_slice_15 = tensor.extract_slice %arg5[0, 0, %arg4, %arg3, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x32x4x4xbf16> to tensor<1x1x16x16x4x4xbf16>
      %17 = linalg.fill ins(%cst : bf16) outs(%extracted_slice_15 : tensor<1x1x16x16x4x4xbf16>) -> tensor<1x1x16x16x4x4xbf16>
      %18 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_12, %pack_14 : tensor<1x1x8x16x4x8xbf16>, tensor<1x1x16x8x8x4xbf16>) outs(%17 : tensor<1x1x16x16x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
      ^bb0(%in: bf16, %in_16: bf16, %out: bf16):
        %19 = arith.mulf %in, %in_16 : bf16
        %20 = arith.addf %out, %19 : bf16
        linalg.yield %20 : bf16
      } -> tensor<1x1x16x16x4x4xbf16>
      scf.forall.in_parallel {
        tensor.parallel_insert_slice %18 into %arg5[0, 0, %arg4, %arg3, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x16x16x4x4xbf16> into tensor<1x1x32x32x4x4xbf16>
      }
    } {mapping = [#gpu.block<y>, #gpu.block<x>]}
    %12 = scf.for %arg3 = %c1 to %c32 step %c1 iter_args(%arg4 = %11) -> (tensor<1x1x32x32x4x4xbf16>) {
      %13 = affine.apply affine_map<(d0) -> (d0 * 64)>(%arg3)
      %extracted_slice_11 = tensor.extract_slice %extracted_slice[0, %13] [128, 64] [1, 1] : tensor<128x2048xbf16> to tensor<128x64xbf16>
      %14 = bufferization.to_tensor %alloc_2 restrict writable : memref<1x1x128x64xbf16, 1 : i32>
      %pack_12 = tensor.pack %extracted_slice_11 inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %14 : tensor<128x64xbf16> -> tensor<1x1x128x64xbf16>
      %extracted_slice_13 = tensor.extract_slice %extracted_slice_5[%13, 0] [64, 128] [1, 1] : tensor<2048x128xbf16> to tensor<64x128xbf16>
      %15 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x1x64x128xbf16, 1 : i32>
      %pack_14 = tensor.pack %extracted_slice_13 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %15 : tensor<64x128xbf16> -> tensor<1x1x64x128xbf16>
      %16 = scf.forall (%arg5, %arg6) = (0, 0) to (32, 32) step (16, 16) shared_outs(%arg7 = %arg4) -> (tensor<1x1x32x32x4x4xbf16>) {
        %17 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg5)
        %extracted_slice_15 = tensor.extract_slice %pack_12[0, 0, %17, 0] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x128x64xbf16> to tensor<1x1x64x64xbf16>
        %18 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x8x16x4x8xbf16, 2 : i32>
        %pack_16 = tensor.pack %extracted_slice_15 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %18 : tensor<1x1x64x64xbf16> -> tensor<1x1x8x16x4x8xbf16>
        %19 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg6)
        %extracted_slice_17 = tensor.extract_slice %pack_14[0, 0, 0, %19] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x64x128xbf16> to tensor<1x1x64x64xbf16>
        %20 = bufferization.to_tensor %alloc restrict writable : memref<1x1x16x8x8x4xbf16, 2 : i32>
        %pack_18 = tensor.pack %extracted_slice_17 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %20 : tensor<1x1x64x64xbf16> -> tensor<1x1x16x8x8x4xbf16>
        %extracted_slice_19 = tensor.extract_slice %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x32x4x4xbf16> to tensor<1x1x16x16x4x4xbf16>
        %21 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_16, %pack_18 : tensor<1x1x8x16x4x8xbf16>, tensor<1x1x16x8x8x4xbf16>) outs(%extracted_slice_19 : tensor<1x1x16x16x4x4xbf16>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[128, 128], [0, 0, 1], [0, 0, 0, 16, 16, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [128, 128, 64], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
        ^bb0(%in: bf16, %in_20: bf16, %out: bf16):
          %22 = arith.mulf %in, %in_20 : bf16
          %23 = arith.addf %out, %22 : bf16
          linalg.yield %23 : bf16
        } -> tensor<1x1x16x16x4x4xbf16>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %21 into %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x16x16x4x4xbf16> into tensor<1x1x32x32x4x4xbf16>
        }
      } {mapping = [#gpu.block<y>, #gpu.block<x>]}
      scf.yield %16 : tensor<1x1x32x32x4x4xbf16>
    }
    %unpack = tensor.unpack %12 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %7 : tensor<1x1x32x32x4x4xbf16> -> tensor<1x1x128x128xbf16>
    %unpack_10 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %extracted_slice_6 : tensor<1x1x128x128xbf16> -> tensor<128x128xbf16>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_10 into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  memref.dealloc %alloc_4 : memref<1x1x128x128xbf16, 1 : i32>
  memref.dealloc %alloc_3 : memref<1x1x32x32x4x4xbf16, 2 : i32>
  memref.dealloc %alloc_2 : memref<1x1x128x64xbf16, 1 : i32>
  memref.dealloc %alloc_1 : memref<1x1x64x128xbf16, 1 : i32>
  memref.dealloc %alloc_0 : memref<1x1x8x16x4x8xbf16, 2 : i32>
  memref.dealloc %alloc : memref<1x1x16x8x8x4xbf16, 2 : i32>
  return
}

// -----// IR Dump Before EliminateEmptyTensors (iree-eliminate-empty-tensors) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c0 = arith.constant 0 : index
  %c32 = arith.constant 32 : index
  %c1 = arith.constant 1 : index
  %alloc = memref.alloc() : memref<1x1x16x8x8x4xbf16, 2 : i32>
  %alloc_0 = memref.alloc() : memref<1x1x8x16x4x8xbf16, 2 : i32>
  %alloc_1 = memref.alloc() : memref<1x1x64x128xbf16, 1 : i32>
  %alloc_2 = memref.alloc() : memref<1x1x128x64xbf16, 1 : i32>
  %alloc_3 = memref.alloc() : memref<1x1x32x32x4x4xbf16, 2 : i32>
  %alloc_4 = memref.alloc() : memref<1x1x128x128xbf16, 1 : i32>
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = tensor.empty() : tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_5 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_6 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %7 = bufferization.to_tensor %alloc_4 restrict writable : memref<1x1x128x128xbf16, 1 : i32>
    %8 = bufferization.to_tensor %alloc_3 restrict writable : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %extracted_slice_7 = tensor.extract_slice %extracted_slice[0, 0] [128, 64] [1, 1] : tensor<128x2048xbf16> to tensor<128x64xbf16>
    %9 = bufferization.to_tensor %alloc_2 restrict writable : memref<1x1x128x64xbf16, 1 : i32>
    %pack = tensor.pack %extracted_slice_7 inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %9 : tensor<128x64xbf16> -> tensor<1x1x128x64xbf16>
    %extracted_slice_8 = tensor.extract_slice %extracted_slice_5[0, 0] [64, 128] [1, 1] : tensor<2048x128xbf16> to tensor<64x128xbf16>
    %10 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x1x64x128xbf16, 1 : i32>
    %pack_9 = tensor.pack %extracted_slice_8 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %10 : tensor<64x128xbf16> -> tensor<1x1x64x128xbf16>
    %11 = scf.forall (%arg3, %arg4) = (0, 0) to (32, 32) step (16, 16) shared_outs(%arg5 = %8) -> (tensor<1x1x32x32x4x4xbf16>) {
      %13 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg3)
      %extracted_slice_11 = tensor.extract_slice %pack[0, 0, %13, 0] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x128x64xbf16> to tensor<1x1x64x64xbf16>
      %14 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x8x16x4x8xbf16, 2 : i32>
      %pack_12 = tensor.pack %extracted_slice_11 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %14 : tensor<1x1x64x64xbf16> -> tensor<1x1x8x16x4x8xbf16>
      %15 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg4)
      %extracted_slice_13 = tensor.extract_slice %pack_9[0, 0, 0, %15] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x64x128xbf16> to tensor<1x1x64x64xbf16>
      %16 = bufferization.to_tensor %alloc restrict writable : memref<1x1x16x8x8x4xbf16, 2 : i32>
      %pack_14 = tensor.pack %extracted_slice_13 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %16 : tensor<1x1x64x64xbf16> -> tensor<1x1x16x8x8x4xbf16>
      %extracted_slice_15 = tensor.extract_slice %arg5[0, 0, %arg4, %arg3, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x32x4x4xbf16> to tensor<1x1x16x16x4x4xbf16>
      %17 = iree_codegen.ukernel.generic "zero_bf16" outs(%extracted_slice_15 : tensor<1x1x16x16x4x4xbf16>) fn_def_attrs {link_with = "mm.o"} strided_outer_dims(2) -> tensor<1x1x16x16x4x4xbf16>
      %18 = iree_codegen.ukernel.generic "matmul_bf16_bf16" ins(%pack_12, %pack_14 : tensor<1x1x8x16x4x8xbf16>, tensor<1x1x16x8x8x4xbf16>) outs(%17 : tensor<1x1x16x16x4x4xbf16>) fn_def_attrs {link_with = "mm.o"} strided_outer_dims(2) -> tensor<1x1x16x16x4x4xbf16>
      scf.forall.in_parallel {
        tensor.parallel_insert_slice %18 into %arg5[0, 0, %arg4, %arg3, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x16x16x4x4xbf16> into tensor<1x1x32x32x4x4xbf16>
      }
    } {mapping = [#gpu.block<y>, #gpu.block<x>]}
    %12 = scf.for %arg3 = %c1 to %c32 step %c1 iter_args(%arg4 = %11) -> (tensor<1x1x32x32x4x4xbf16>) {
      %13 = affine.apply affine_map<(d0) -> (d0 * 64)>(%arg3)
      %extracted_slice_11 = tensor.extract_slice %extracted_slice[0, %13] [128, 64] [1, 1] : tensor<128x2048xbf16> to tensor<128x64xbf16>
      %14 = bufferization.to_tensor %alloc_2 restrict writable : memref<1x1x128x64xbf16, 1 : i32>
      %pack_12 = tensor.pack %extracted_slice_11 inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %14 : tensor<128x64xbf16> -> tensor<1x1x128x64xbf16>
      %extracted_slice_13 = tensor.extract_slice %extracted_slice_5[%13, 0] [64, 128] [1, 1] : tensor<2048x128xbf16> to tensor<64x128xbf16>
      %15 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x1x64x128xbf16, 1 : i32>
      %pack_14 = tensor.pack %extracted_slice_13 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %15 : tensor<64x128xbf16> -> tensor<1x1x64x128xbf16>
      %16 = scf.forall (%arg5, %arg6) = (0, 0) to (32, 32) step (16, 16) shared_outs(%arg7 = %arg4) -> (tensor<1x1x32x32x4x4xbf16>) {
        %17 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg5)
        %extracted_slice_15 = tensor.extract_slice %pack_12[0, 0, %17, 0] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x128x64xbf16> to tensor<1x1x64x64xbf16>
        %18 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x8x16x4x8xbf16, 2 : i32>
        %pack_16 = tensor.pack %extracted_slice_15 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %18 : tensor<1x1x64x64xbf16> -> tensor<1x1x8x16x4x8xbf16>
        %19 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg6)
        %extracted_slice_17 = tensor.extract_slice %pack_14[0, 0, 0, %19] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x64x128xbf16> to tensor<1x1x64x64xbf16>
        %20 = bufferization.to_tensor %alloc restrict writable : memref<1x1x16x8x8x4xbf16, 2 : i32>
        %pack_18 = tensor.pack %extracted_slice_17 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %20 : tensor<1x1x64x64xbf16> -> tensor<1x1x16x8x8x4xbf16>
        %extracted_slice_19 = tensor.extract_slice %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x32x4x4xbf16> to tensor<1x1x16x16x4x4xbf16>
        %21 = iree_codegen.ukernel.generic "matmul_bf16_bf16" ins(%pack_16, %pack_18 : tensor<1x1x8x16x4x8xbf16>, tensor<1x1x16x8x8x4xbf16>) outs(%extracted_slice_19 : tensor<1x1x16x16x4x4xbf16>) fn_def_attrs {link_with = "mm.o"} strided_outer_dims(2) -> tensor<1x1x16x16x4x4xbf16>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %21 into %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x16x16x4x4xbf16> into tensor<1x1x32x32x4x4xbf16>
        }
      } {mapping = [#gpu.block<y>, #gpu.block<x>]}
      scf.yield %16 : tensor<1x1x32x32x4x4xbf16>
    }
    %unpack = tensor.unpack %12 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %7 : tensor<1x1x32x32x4x4xbf16> -> tensor<1x1x128x128xbf16>
    %unpack_10 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %extracted_slice_6 : tensor<1x1x128x128xbf16> -> tensor<128x128xbf16>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_10 into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  memref.dealloc %alloc_4 : memref<1x1x128x128xbf16, 1 : i32>
  memref.dealloc %alloc_3 : memref<1x1x32x32x4x4xbf16, 2 : i32>
  memref.dealloc %alloc_2 : memref<1x1x128x64xbf16, 1 : i32>
  memref.dealloc %alloc_1 : memref<1x1x64x128xbf16, 1 : i32>
  memref.dealloc %alloc_0 : memref<1x1x8x16x4x8xbf16, 2 : i32>
  memref.dealloc %alloc : memref<1x1x16x8x8x4xbf16, 2 : i32>
  return
}

// -----// IR Dump Before EmptyTensorToAllocTensor (empty-tensor-to-alloc-tensor) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c0 = arith.constant 0 : index
  %c32 = arith.constant 32 : index
  %c1 = arith.constant 1 : index
  %alloc = memref.alloc() : memref<1x1x16x8x8x4xbf16, 2 : i32>
  %alloc_0 = memref.alloc() : memref<1x1x8x16x4x8xbf16, 2 : i32>
  %alloc_1 = memref.alloc() : memref<1x1x64x128xbf16, 1 : i32>
  %alloc_2 = memref.alloc() : memref<1x1x128x64xbf16, 1 : i32>
  %alloc_3 = memref.alloc() : memref<1x1x32x32x4x4xbf16, 2 : i32>
  %alloc_4 = memref.alloc() : memref<1x1x128x128xbf16, 1 : i32>
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = flow.dispatch.tensor.load %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_5 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_6 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %7 = bufferization.to_tensor %alloc_4 restrict writable : memref<1x1x128x128xbf16, 1 : i32>
    %8 = bufferization.to_tensor %alloc_3 restrict writable : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %extracted_slice_7 = tensor.extract_slice %extracted_slice[0, 0] [128, 64] [1, 1] : tensor<128x2048xbf16> to tensor<128x64xbf16>
    %9 = bufferization.to_tensor %alloc_2 restrict writable : memref<1x1x128x64xbf16, 1 : i32>
    %pack = tensor.pack %extracted_slice_7 inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %9 : tensor<128x64xbf16> -> tensor<1x1x128x64xbf16>
    %extracted_slice_8 = tensor.extract_slice %extracted_slice_5[0, 0] [64, 128] [1, 1] : tensor<2048x128xbf16> to tensor<64x128xbf16>
    %10 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x1x64x128xbf16, 1 : i32>
    %pack_9 = tensor.pack %extracted_slice_8 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %10 : tensor<64x128xbf16> -> tensor<1x1x64x128xbf16>
    %11 = scf.forall (%arg3, %arg4) = (0, 0) to (32, 32) step (16, 16) shared_outs(%arg5 = %8) -> (tensor<1x1x32x32x4x4xbf16>) {
      %13 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg3)
      %extracted_slice_11 = tensor.extract_slice %pack[0, 0, %13, 0] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x128x64xbf16> to tensor<1x1x64x64xbf16>
      %14 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x8x16x4x8xbf16, 2 : i32>
      %pack_12 = tensor.pack %extracted_slice_11 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %14 : tensor<1x1x64x64xbf16> -> tensor<1x1x8x16x4x8xbf16>
      %15 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg4)
      %extracted_slice_13 = tensor.extract_slice %pack_9[0, 0, 0, %15] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x64x128xbf16> to tensor<1x1x64x64xbf16>
      %16 = bufferization.to_tensor %alloc restrict writable : memref<1x1x16x8x8x4xbf16, 2 : i32>
      %pack_14 = tensor.pack %extracted_slice_13 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %16 : tensor<1x1x64x64xbf16> -> tensor<1x1x16x8x8x4xbf16>
      %extracted_slice_15 = tensor.extract_slice %arg5[0, 0, %arg4, %arg3, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x32x4x4xbf16> to tensor<1x1x16x16x4x4xbf16>
      %17 = iree_codegen.ukernel.generic "zero_bf16" outs(%extracted_slice_15 : tensor<1x1x16x16x4x4xbf16>) fn_def_attrs {link_with = "mm.o"} strided_outer_dims(2) -> tensor<1x1x16x16x4x4xbf16>
      %18 = iree_codegen.ukernel.generic "matmul_bf16_bf16" ins(%pack_12, %pack_14 : tensor<1x1x8x16x4x8xbf16>, tensor<1x1x16x8x8x4xbf16>) outs(%17 : tensor<1x1x16x16x4x4xbf16>) fn_def_attrs {link_with = "mm.o"} strided_outer_dims(2) -> tensor<1x1x16x16x4x4xbf16>
      scf.forall.in_parallel {
        tensor.parallel_insert_slice %18 into %arg5[0, 0, %arg4, %arg3, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x16x16x4x4xbf16> into tensor<1x1x32x32x4x4xbf16>
      }
    } {mapping = [#gpu.block<y>, #gpu.block<x>]}
    %12 = scf.for %arg3 = %c1 to %c32 step %c1 iter_args(%arg4 = %11) -> (tensor<1x1x32x32x4x4xbf16>) {
      %13 = affine.apply affine_map<(d0) -> (d0 * 64)>(%arg3)
      %extracted_slice_11 = tensor.extract_slice %extracted_slice[0, %13] [128, 64] [1, 1] : tensor<128x2048xbf16> to tensor<128x64xbf16>
      %14 = bufferization.to_tensor %alloc_2 restrict writable : memref<1x1x128x64xbf16, 1 : i32>
      %pack_12 = tensor.pack %extracted_slice_11 inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %14 : tensor<128x64xbf16> -> tensor<1x1x128x64xbf16>
      %extracted_slice_13 = tensor.extract_slice %extracted_slice_5[%13, 0] [64, 128] [1, 1] : tensor<2048x128xbf16> to tensor<64x128xbf16>
      %15 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x1x64x128xbf16, 1 : i32>
      %pack_14 = tensor.pack %extracted_slice_13 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %15 : tensor<64x128xbf16> -> tensor<1x1x64x128xbf16>
      %16 = scf.forall (%arg5, %arg6) = (0, 0) to (32, 32) step (16, 16) shared_outs(%arg7 = %arg4) -> (tensor<1x1x32x32x4x4xbf16>) {
        %17 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg5)
        %extracted_slice_15 = tensor.extract_slice %pack_12[0, 0, %17, 0] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x128x64xbf16> to tensor<1x1x64x64xbf16>
        %18 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x8x16x4x8xbf16, 2 : i32>
        %pack_16 = tensor.pack %extracted_slice_15 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %18 : tensor<1x1x64x64xbf16> -> tensor<1x1x8x16x4x8xbf16>
        %19 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg6)
        %extracted_slice_17 = tensor.extract_slice %pack_14[0, 0, 0, %19] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x64x128xbf16> to tensor<1x1x64x64xbf16>
        %20 = bufferization.to_tensor %alloc restrict writable : memref<1x1x16x8x8x4xbf16, 2 : i32>
        %pack_18 = tensor.pack %extracted_slice_17 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %20 : tensor<1x1x64x64xbf16> -> tensor<1x1x16x8x8x4xbf16>
        %extracted_slice_19 = tensor.extract_slice %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x32x4x4xbf16> to tensor<1x1x16x16x4x4xbf16>
        %21 = iree_codegen.ukernel.generic "matmul_bf16_bf16" ins(%pack_16, %pack_18 : tensor<1x1x8x16x4x8xbf16>, tensor<1x1x16x8x8x4xbf16>) outs(%extracted_slice_19 : tensor<1x1x16x16x4x4xbf16>) fn_def_attrs {link_with = "mm.o"} strided_outer_dims(2) -> tensor<1x1x16x16x4x4xbf16>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %21 into %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x16x16x4x4xbf16> into tensor<1x1x32x32x4x4xbf16>
        }
      } {mapping = [#gpu.block<y>, #gpu.block<x>]}
      scf.yield %16 : tensor<1x1x32x32x4x4xbf16>
    }
    %unpack = tensor.unpack %12 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %7 : tensor<1x1x32x32x4x4xbf16> -> tensor<1x1x128x128xbf16>
    %unpack_10 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %extracted_slice_6 : tensor<1x1x128x128xbf16> -> tensor<128x128xbf16>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_10 into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  memref.dealloc %alloc_4 : memref<1x1x128x128xbf16, 1 : i32>
  memref.dealloc %alloc_3 : memref<1x1x32x32x4x4xbf16, 2 : i32>
  memref.dealloc %alloc_2 : memref<1x1x128x64xbf16, 1 : i32>
  memref.dealloc %alloc_1 : memref<1x1x64x128xbf16, 1 : i32>
  memref.dealloc %alloc_0 : memref<1x1x8x16x4x8xbf16, 2 : i32>
  memref.dealloc %alloc : memref<1x1x16x8x8x4xbf16, 2 : i32>
  return
}

// -----// IR Dump Before IREEComprehensiveBufferize (iree-codegen-iree-comprehensive-bufferize) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c0 = arith.constant 0 : index
  %c32 = arith.constant 32 : index
  %c1 = arith.constant 1 : index
  %alloc = memref.alloc() : memref<1x1x16x8x8x4xbf16, 2 : i32>
  %alloc_0 = memref.alloc() : memref<1x1x8x16x4x8xbf16, 2 : i32>
  %alloc_1 = memref.alloc() : memref<1x1x64x128xbf16, 1 : i32>
  %alloc_2 = memref.alloc() : memref<1x1x128x64xbf16, 1 : i32>
  %alloc_3 = memref.alloc() : memref<1x1x32x32x4x4xbf16, 2 : i32>
  %alloc_4 = memref.alloc() : memref<1x1x128x128xbf16, 1 : i32>
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %5 = flow.dispatch.tensor.load %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>> -> tensor<2048x2048xbf16>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) shared_outs(%arg2 = %5) -> (tensor<2048x2048xbf16>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [128, 2048] [1, 1] : tensor<2048x2048xbf16> to tensor<128x2048xbf16>
    %extracted_slice_5 = tensor.extract_slice %4[0, %arg1] [2048, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<2048x128xbf16>
    %extracted_slice_6 = tensor.extract_slice %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<2048x2048xbf16> to tensor<128x128xbf16>
    %7 = bufferization.to_tensor %alloc_4 restrict writable : memref<1x1x128x128xbf16, 1 : i32>
    %8 = bufferization.to_tensor %alloc_3 restrict writable : memref<1x1x32x32x4x4xbf16, 2 : i32>
    %extracted_slice_7 = tensor.extract_slice %extracted_slice[0, 0] [128, 64] [1, 1] : tensor<128x2048xbf16> to tensor<128x64xbf16>
    %9 = bufferization.to_tensor %alloc_2 restrict writable : memref<1x1x128x64xbf16, 1 : i32>
    %pack = tensor.pack %extracted_slice_7 inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %9 : tensor<128x64xbf16> -> tensor<1x1x128x64xbf16>
    %extracted_slice_8 = tensor.extract_slice %extracted_slice_5[0, 0] [64, 128] [1, 1] : tensor<2048x128xbf16> to tensor<64x128xbf16>
    %10 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x1x64x128xbf16, 1 : i32>
    %pack_9 = tensor.pack %extracted_slice_8 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %10 : tensor<64x128xbf16> -> tensor<1x1x64x128xbf16>
    %11 = scf.forall (%arg3, %arg4) = (0, 0) to (32, 32) step (16, 16) shared_outs(%arg5 = %8) -> (tensor<1x1x32x32x4x4xbf16>) {
      %13 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg3)
      %extracted_slice_11 = tensor.extract_slice %pack[0, 0, %13, 0] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x128x64xbf16> to tensor<1x1x64x64xbf16>
      %14 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x8x16x4x8xbf16, 2 : i32>
      %pack_12 = tensor.pack %extracted_slice_11 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %14 : tensor<1x1x64x64xbf16> -> tensor<1x1x8x16x4x8xbf16>
      %15 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg4)
      %extracted_slice_13 = tensor.extract_slice %pack_9[0, 0, 0, %15] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x64x128xbf16> to tensor<1x1x64x64xbf16>
      %16 = bufferization.to_tensor %alloc restrict writable : memref<1x1x16x8x8x4xbf16, 2 : i32>
      %pack_14 = tensor.pack %extracted_slice_13 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %16 : tensor<1x1x64x64xbf16> -> tensor<1x1x16x8x8x4xbf16>
      %extracted_slice_15 = tensor.extract_slice %arg5[0, 0, %arg4, %arg3, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x32x4x4xbf16> to tensor<1x1x16x16x4x4xbf16>
      %17 = iree_codegen.ukernel.generic "zero_bf16" outs(%extracted_slice_15 : tensor<1x1x16x16x4x4xbf16>) fn_def_attrs {link_with = "mm.o"} strided_outer_dims(2) -> tensor<1x1x16x16x4x4xbf16>
      %18 = iree_codegen.ukernel.generic "matmul_bf16_bf16" ins(%pack_12, %pack_14 : tensor<1x1x8x16x4x8xbf16>, tensor<1x1x16x8x8x4xbf16>) outs(%17 : tensor<1x1x16x16x4x4xbf16>) fn_def_attrs {link_with = "mm.o"} strided_outer_dims(2) -> tensor<1x1x16x16x4x4xbf16>
      scf.forall.in_parallel {
        tensor.parallel_insert_slice %18 into %arg5[0, 0, %arg4, %arg3, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x16x16x4x4xbf16> into tensor<1x1x32x32x4x4xbf16>
      }
    } {mapping = [#gpu.block<y>, #gpu.block<x>]}
    %12 = scf.for %arg3 = %c1 to %c32 step %c1 iter_args(%arg4 = %11) -> (tensor<1x1x32x32x4x4xbf16>) {
      %13 = affine.apply affine_map<(d0) -> (d0 * 64)>(%arg3)
      %extracted_slice_11 = tensor.extract_slice %extracted_slice[0, %13] [128, 64] [1, 1] : tensor<128x2048xbf16> to tensor<128x64xbf16>
      %14 = bufferization.to_tensor %alloc_2 restrict writable : memref<1x1x128x64xbf16, 1 : i32>
      %pack_12 = tensor.pack %extracted_slice_11 inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %14 : tensor<128x64xbf16> -> tensor<1x1x128x64xbf16>
      %extracted_slice_13 = tensor.extract_slice %extracted_slice_5[%13, 0] [64, 128] [1, 1] : tensor<2048x128xbf16> to tensor<64x128xbf16>
      %15 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x1x64x128xbf16, 1 : i32>
      %pack_14 = tensor.pack %extracted_slice_13 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %15 : tensor<64x128xbf16> -> tensor<1x1x64x128xbf16>
      %16 = scf.forall (%arg5, %arg6) = (0, 0) to (32, 32) step (16, 16) shared_outs(%arg7 = %arg4) -> (tensor<1x1x32x32x4x4xbf16>) {
        %17 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg5)
        %extracted_slice_15 = tensor.extract_slice %pack_12[0, 0, %17, 0] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x128x64xbf16> to tensor<1x1x64x64xbf16>
        %18 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x8x16x4x8xbf16, 2 : i32>
        %pack_16 = tensor.pack %extracted_slice_15 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %18 : tensor<1x1x64x64xbf16> -> tensor<1x1x8x16x4x8xbf16>
        %19 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg6)
        %extracted_slice_17 = tensor.extract_slice %pack_14[0, 0, 0, %19] [1, 1, 64, 64] [1, 1, 1, 1] : tensor<1x1x64x128xbf16> to tensor<1x1x64x64xbf16>
        %20 = bufferization.to_tensor %alloc restrict writable : memref<1x1x16x8x8x4xbf16, 2 : i32>
        %pack_18 = tensor.pack %extracted_slice_17 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %20 : tensor<1x1x64x64xbf16> -> tensor<1x1x16x8x8x4xbf16>
        %extracted_slice_19 = tensor.extract_slice %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x32x32x4x4xbf16> to tensor<1x1x16x16x4x4xbf16>
        %21 = iree_codegen.ukernel.generic "matmul_bf16_bf16" ins(%pack_16, %pack_18 : tensor<1x1x8x16x4x8xbf16>, tensor<1x1x16x8x8x4xbf16>) outs(%extracted_slice_19 : tensor<1x1x16x16x4x4xbf16>) fn_def_attrs {link_with = "mm.o"} strided_outer_dims(2) -> tensor<1x1x16x16x4x4xbf16>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %21 into %arg7[0, 0, %arg6, %arg5, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x16x16x4x4xbf16> into tensor<1x1x32x32x4x4xbf16>
        }
      } {mapping = [#gpu.block<y>, #gpu.block<x>]}
      scf.yield %16 : tensor<1x1x32x32x4x4xbf16>
    }
    %unpack = tensor.unpack %12 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %7 : tensor<1x1x32x32x4x4xbf16> -> tensor<1x1x128x128xbf16>
    %unpack_10 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %extracted_slice_6 : tensor<1x1x128x128xbf16> -> tensor<128x128xbf16>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_10 into %arg2[%arg0, %arg1] [128, 128] [1, 1] : tensor<128x128xbf16> into tensor<2048x2048xbf16>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [2048, 2048], strides = [1, 1] : tensor<2048x2048xbf16> -> !flow.dispatch.tensor<writeonly:tensor<2048x2048xbf16>>
  memref.dealloc %alloc_4 : memref<1x1x128x128xbf16, 1 : i32>
  memref.dealloc %alloc_3 : memref<1x1x32x32x4x4xbf16, 2 : i32>
  memref.dealloc %alloc_2 : memref<1x1x128x64xbf16, 1 : i32>
  memref.dealloc %alloc_1 : memref<1x1x64x128xbf16, 1 : i32>
  memref.dealloc %alloc_0 : memref<1x1x8x16x4x8xbf16, 2 : i32>
  memref.dealloc %alloc : memref<1x1x16x8x8x4xbf16, 2 : i32>
  return
}

// -----// IR Dump Before ResolveShapedTypeResultDims (resolve-shaped-type-result-dims) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c0 = arith.constant 0 : index
  %c32 = arith.constant 32 : index
  %c1 = arith.constant 1 : index
  %alloc = memref.alloc() : memref<1x1x16x8x8x4xbf16, 2 : i32>
  %alloc_0 = memref.alloc() : memref<1x1x8x16x4x8xbf16, 2 : i32>
  %alloc_1 = memref.alloc() : memref<1x1x64x128xbf16, 1 : i32>
  %alloc_2 = memref.alloc() : memref<1x1x128x64xbf16, 1 : i32>
  %alloc_3 = memref.alloc() : memref<1x1x32x32x4x4xbf16, 2 : i32>
  %alloc_4 = memref.alloc() : memref<1x1x128x128xbf16, 1 : i32>
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : memref<2048x2048xbf16, #hal.descriptor_type<storage_buffer>>
  memref.assume_alignment %0, 64 : memref<2048x2048xbf16, #hal.descriptor_type<storage_buffer>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : memref<2048x2048xbf16, #hal.descriptor_type<storage_buffer>>
  memref.assume_alignment %1, 64 : memref<2048x2048xbf16, #hal.descriptor_type<storage_buffer>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : memref<2048x2048xbf16, #hal.descriptor_type<storage_buffer>>
  memref.assume_alignment %2, 64 : memref<2048x2048xbf16, #hal.descriptor_type<storage_buffer>>
  scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) {
    %subview = memref.subview %0[%arg0, 0] [128, 2048] [1, 1] : memref<2048x2048xbf16, #hal.descriptor_type<storage_buffer>> to memref<128x2048xbf16, strided<[2048, 1], offset: ?>, #hal.descriptor_type<storage_buffer>>
    %subview_5 = memref.subview %1[0, %arg1] [2048, 128] [1, 1] : memref<2048x2048xbf16, #hal.descriptor_type<storage_buffer>> to memref<2048x128xbf16, strided<[2048, 1], offset: ?>, #hal.descriptor_type<storage_buffer>>
    %subview_6 = memref.subview %2[%arg0, %arg1] [128, 128] [1, 1] : memref<2048x2048xbf16, #hal.descriptor_type<storage_buffer>> to memref<128x128xbf16, strided<[2048, 1], offset: ?>, #hal.descriptor_type<storage_buffer>>
    %subview_7 = memref.subview %subview[0, 0] [128, 64] [1, 1] : memref<128x2048xbf16, strided<[2048, 1], offset: ?>, #hal.descriptor_type<storage_buffer>> to memref<128x64xbf16, strided<[2048, 1], offset: ?>, #hal.descriptor_type<storage_buffer>>
    iree_linalg_ext.pack %subview_7 inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %alloc_2 : (memref<128x64xbf16, strided<[2048, 1], offset: ?>, #hal.descriptor_type<storage_buffer>> memref<1x1x128x64xbf16, 1 : i32>)
    %subview_8 = memref.subview %subview_5[0, 0] [64, 128] [1, 1] : memref<2048x128xbf16, strided<[2048, 1], offset: ?>, #hal.descriptor_type<storage_buffer>> to memref<64x128xbf16, strided<[2048, 1], offset: ?>, #hal.descriptor_type<storage_buffer>>
    iree_linalg_ext.pack %subview_8 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %alloc_1 : (memref<64x128xbf16, strided<[2048, 1], offset: ?>, #hal.descriptor_type<storage_buffer>> memref<1x1x64x128xbf16, 1 : i32>)
    scf.forall (%arg2, %arg3) = (0, 0) to (32, 32) step (16, 16) {
      %4 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg2)
      %subview_10 = memref.subview %alloc_2[0, 0, %4, 0] [1, 1, 64, 64] [1, 1, 1, 1] : memref<1x1x128x64xbf16, 1 : i32> to memref<1x1x64x64xbf16, strided<[8192, 8192, 64, 1], offset: ?>, 1 : i32>
      iree_linalg_ext.pack %subview_10 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %alloc_0 : (memref<1x1x64x64xbf16, strided<[8192, 8192, 64, 1], offset: ?>, 1 : i32> memref<1x1x8x16x4x8xbf16, 2 : i32>)
      %5 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg3)
      %subview_11 = memref.subview %alloc_1[0, 0, 0, %5] [1, 1, 64, 64] [1, 1, 1, 1] : memref<1x1x64x128xbf16, 1 : i32> to memref<1x1x64x64xbf16, strided<[8192, 8192, 128, 1], offset: ?>, 1 : i32>
      iree_linalg_ext.pack %subview_11 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %alloc : (memref<1x1x64x64xbf16, strided<[8192, 8192, 128, 1], offset: ?>, 1 : i32> memref<1x1x16x8x8x4xbf16, 2 : i32>)
      %subview_12 = memref.subview %alloc_3[0, 0, %arg3, %arg2, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : memref<1x1x32x32x4x4xbf16, 2 : i32> to memref<1x1x16x16x4x4xbf16, strided<[16384, 16384, 512, 16, 4, 1], offset: ?>, 2 : i32>
      iree_codegen.ukernel.generic "zero_bf16" outs(%subview_12 : memref<1x1x16x16x4x4xbf16, strided<[16384, 16384, 512, 16, 4, 1], offset: ?>, 2 : i32>) fn_def_attrs {link_with = "mm.o"} strided_outer_dims(2)
      iree_codegen.ukernel.generic "matmul_bf16_bf16" ins(%alloc_0, %alloc : memref<1x1x8x16x4x8xbf16, 2 : i32>, memref<1x1x16x8x8x4xbf16, 2 : i32>) outs(%subview_12 : memref<1x1x16x16x4x4xbf16, strided<[16384, 16384, 512, 16, 4, 1], offset: ?>, 2 : i32>) fn_def_attrs {link_with = "mm.o"} strided_outer_dims(2)
      %subview_13 = memref.subview %alloc_3[0, 0, %arg3, %arg2, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : memref<1x1x32x32x4x4xbf16, 2 : i32> to memref<1x1x16x16x4x4xbf16, strided<[16384, 16384, 512, 16, 4, 1], offset: ?>, 2 : i32>
      linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5) -> (d0, d1, d2, d3, d4, d5)>, affine_map<(d0, d1, d2, d3, d4, d5) -> (d0, d1, d2, d3, d4, d5)>], iterator_types = ["parallel", "parallel", "parallel", "parallel", "parallel", "parallel"]} ins(%subview_12 : memref<1x1x16x16x4x4xbf16, strided<[16384, 16384, 512, 16, 4, 1], offset: ?>, 2 : i32>) outs(%subview_13 : memref<1x1x16x16x4x4xbf16, strided<[16384, 16384, 512, 16, 4, 1], offset: ?>, 2 : i32>) {
      ^bb0(%in: bf16, %out: bf16):
        linalg.yield %in : bf16
      }
    } {mapping = [#gpu.block<y>, #gpu.block<x>]}
    %3 = scf.for %arg2 = %c1 to %c32 step %c1 iter_args(%arg3 = %alloc_3) -> (memref<1x1x32x32x4x4xbf16, 2 : i32>) {
      %4 = affine.apply affine_map<(d0) -> (d0 * 64)>(%arg2)
      %subview_10 = memref.subview %subview[0, %4] [128, 64] [1, 1] : memref<128x2048xbf16, strided<[2048, 1], offset: ?>, #hal.descriptor_type<storage_buffer>> to memref<128x64xbf16, strided<[2048, 1], offset: ?>, #hal.descriptor_type<storage_buffer>>
      iree_linalg_ext.pack %subview_10 inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %alloc_2 : (memref<128x64xbf16, strided<[2048, 1], offset: ?>, #hal.descriptor_type<storage_buffer>> memref<1x1x128x64xbf16, 1 : i32>)
      %subview_11 = memref.subview %subview_5[%4, 0] [64, 128] [1, 1] : memref<2048x128xbf16, strided<[2048, 1], offset: ?>, #hal.descriptor_type<storage_buffer>> to memref<64x128xbf16, strided<[2048, 1], offset: ?>, #hal.descriptor_type<storage_buffer>>
      iree_linalg_ext.pack %subview_11 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %alloc_1 : (memref<64x128xbf16, strided<[2048, 1], offset: ?>, #hal.descriptor_type<storage_buffer>> memref<1x1x64x128xbf16, 1 : i32>)
      scf.forall (%arg4, %arg5) = (0, 0) to (32, 32) step (16, 16) {
        %5 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg4)
        %subview_12 = memref.subview %alloc_2[0, 0, %5, 0] [1, 1, 64, 64] [1, 1, 1, 1] : memref<1x1x128x64xbf16, 1 : i32> to memref<1x1x64x64xbf16, strided<[8192, 8192, 64, 1], offset: ?>, 1 : i32>
        iree_linalg_ext.pack %subview_12 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %alloc_0 : (memref<1x1x64x64xbf16, strided<[8192, 8192, 64, 1], offset: ?>, 1 : i32> memref<1x1x8x16x4x8xbf16, 2 : i32>)
        %6 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg5)
        %subview_13 = memref.subview %alloc_1[0, 0, 0, %6] [1, 1, 64, 64] [1, 1, 1, 1] : memref<1x1x64x128xbf16, 1 : i32> to memref<1x1x64x64xbf16, strided<[8192, 8192, 128, 1], offset: ?>, 1 : i32>
        iree_linalg_ext.pack %subview_13 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %alloc : (memref<1x1x64x64xbf16, strided<[8192, 8192, 128, 1], offset: ?>, 1 : i32> memref<1x1x16x8x8x4xbf16, 2 : i32>)
        %subview_14 = memref.subview %arg3[0, 0, %arg5, %arg4, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : memref<1x1x32x32x4x4xbf16, 2 : i32> to memref<1x1x16x16x4x4xbf16, strided<[16384, 16384, 512, 16, 4, 1], offset: ?>, 2 : i32>
        iree_codegen.ukernel.generic "matmul_bf16_bf16" ins(%alloc_0, %alloc : memref<1x1x8x16x4x8xbf16, 2 : i32>, memref<1x1x16x8x8x4xbf16, 2 : i32>) outs(%subview_14 : memref<1x1x16x16x4x4xbf16, strided<[16384, 16384, 512, 16, 4, 1], offset: ?>, 2 : i32>) fn_def_attrs {link_with = "mm.o"} strided_outer_dims(2)
        %subview_15 = memref.subview %arg3[0, 0, %arg5, %arg4, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : memref<1x1x32x32x4x4xbf16, 2 : i32> to memref<1x1x16x16x4x4xbf16, strided<[16384, 16384, 512, 16, 4, 1], offset: ?>, 2 : i32>
        linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5) -> (d0, d1, d2, d3, d4, d5)>, affine_map<(d0, d1, d2, d3, d4, d5) -> (d0, d1, d2, d3, d4, d5)>], iterator_types = ["parallel", "parallel", "parallel", "parallel", "parallel", "parallel"]} ins(%subview_14 : memref<1x1x16x16x4x4xbf16, strided<[16384, 16384, 512, 16, 4, 1], offset: ?>, 2 : i32>) outs(%subview_15 : memref<1x1x16x16x4x4xbf16, strided<[16384, 16384, 512, 16, 4, 1], offset: ?>, 2 : i32>) {
        ^bb0(%in: bf16, %out: bf16):
          linalg.yield %in : bf16
        }
      } {mapping = [#gpu.block<y>, #gpu.block<x>]}
      scf.yield %arg3 : memref<1x1x32x32x4x4xbf16, 2 : i32>
    }
    iree_linalg_ext.unpack %3 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %alloc_4 : (memref<1x1x32x32x4x4xbf16, 2 : i32> memref<1x1x128x128xbf16, 1 : i32>)
    iree_linalg_ext.unpack %alloc_4 inner_dims_pos = [0, 1] inner_tiles = [128, 128] into %subview_6 : (memref<1x1x128x128xbf16, 1 : i32> memref<128x128xbf16, strided<[2048, 1], offset: ?>, #hal.descriptor_type<storage_buffer>>)
    %subview_9 = memref.subview %2[%arg0, %arg1] [128, 128] [1, 1] : memref<2048x2048xbf16, #hal.descriptor_type<storage_buffer>> to memref<128x128xbf16, strided<[2048, 1], offset: ?>, #hal.descriptor_type<storage_buffer>>
    linalg.generic {indexing_maps = [affine_map<(d0, d1) -> (d0, d1)>, affine_map<(d0, d1) -> (d0, d1)>], iterator_types = ["parallel", "parallel"]} ins(%subview_6 : memref<128x128xbf16, strided<[2048, 1], offset: ?>, #hal.descriptor_type<storage_buffer>>) outs(%subview_9 : memref<128x128xbf16, strided<[2048, 1], offset: ?>, #hal.descriptor_type<storage_buffer>>) {
    ^bb0(%in: bf16, %out: bf16):
      linalg.yield %in : bf16
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  linalg.generic {indexing_maps = [affine_map<(d0, d1) -> (d0, d1)>, affine_map<(d0, d1) -> (d0, d1)>], iterator_types = ["parallel", "parallel"]} ins(%2 : memref<2048x2048xbf16, #hal.descriptor_type<storage_buffer>>) outs(%2 : memref<2048x2048xbf16, #hal.descriptor_type<storage_buffer>>) {
  ^bb0(%in: bf16, %out: bf16):
    linalg.yield %in : bf16
  }
  memref.dealloc %alloc_4 : memref<1x1x128x128xbf16, 1 : i32>
  memref.dealloc %alloc_3 : memref<1x1x32x32x4x4xbf16, 2 : i32>
  memref.dealloc %alloc_2 : memref<1x1x128x64xbf16, 1 : i32>
  memref.dealloc %alloc_1 : memref<1x1x64x128xbf16, 1 : i32>
  memref.dealloc %alloc_0 : memref<1x1x8x16x4x8xbf16, 2 : i32>
  memref.dealloc %alloc : memref<1x1x16x8x8x4xbf16, 2 : i32>
  return
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
func.func @matmul_large_dispatch_0_matmul_2048x2048x2048_bf16() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c0 = arith.constant 0 : index
  %c32 = arith.constant 32 : index
  %c1 = arith.constant 1 : index
  %alloc = memref.alloc() : memref<1x1x16x8x8x4xbf16, 2 : i32>
  %alloc_0 = memref.alloc() : memref<1x1x8x16x4x8xbf16, 2 : i32>
  %alloc_1 = memref.alloc() : memref<1x1x64x128xbf16, 1 : i32>
  %alloc_2 = memref.alloc() : memref<1x1x128x64xbf16, 1 : i32>
  %alloc_3 = memref.alloc() : memref<1x1x32x32x4x4xbf16, 2 : i32>
  %alloc_4 = memref.alloc() : memref<1x1x128x128xbf16, 1 : i32>
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : memref<2048x2048xbf16, #hal.descriptor_type<storage_buffer>>
  memref.assume_alignment %0, 64 : memref<2048x2048xbf16, #hal.descriptor_type<storage_buffer>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : memref<2048x2048xbf16, #hal.descriptor_type<storage_buffer>>
  memref.assume_alignment %1, 64 : memref<2048x2048xbf16, #hal.descriptor_type<storage_buffer>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : memref<2048x2048xbf16, #hal.descriptor_type<storage_buffer>>
  memref.assume_alignment %2, 64 : memref<2048x2048xbf16, #hal.descriptor_type<storage_buffer>>
  scf.forall (%arg0, %arg1) = (0, 0) to (2048, 2048) step (128, 128) {
    %subview = memref.subview %0[%arg0, 0] [128, 2048] [1, 1] : memref<2048x2048xbf16, #hal.descriptor_type<storage_buffer>> to memref<128x2048xbf16, strided<[2048, 1], offset: ?>, #hal.descriptor_type<storage_buffer>>
    %subview_5 = memref.subview %1[0, %arg1] [2048, 128] [1, 1] : memref<2048x2048xbf16, #hal.descriptor_type<storage_buffer>> to memref<2048x128xbf16, strided<[2048, 1], offset: ?>, #hal.descriptor_type<storage_buffer>>
    %subview_6 = memref.subview %2[%arg0, %arg1] [128, 128] [1, 1] : memref<2048x2048xbf16, #hal.descriptor_type<storage_buffer>> to memref<128x128xbf16, strided<[2048, 1], offset: ?>, #hal.descriptor_type<storage_buffer>>
    %subview_7 = memref.subview %subview[0, 0] [128, 64] [1, 1] : memref<128x2048xbf16, strided<[2048, 1], offset: ?>, #hal.descriptor_type<storage_buffer>> to memref<128x64xbf16, strided<[2048, 1], offset: ?>, #hal.descriptor_type<storage_buffer>>
    iree_linalg_ext.pack %subview_7 inner_dims_pos = [0, 1] inner_tiles = [128, 64] into %alloc_2 : (memref<128x64xbf16, strided<[2048, 1], offset: ?>, #hal.descriptor_type<storage_buffer>> memref<1x1x128x64xbf16, 1 : i32>)
    %subview_8 = memref.subview %subview_5[0, 0] [64, 128] [1, 1] : memref<2048x128xbf16, strided<[2048, 1], offset: ?>, #hal.descriptor_type<storage_buffer>> to memref<64x128xbf16, strided<[2048, 1], offset: ?>, #hal.descriptor_type<storage_buffer>>
    iree_linalg_ext.pack %subview_8 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [64, 128] into %alloc_1 : (memref<64x128xbf16, strided<[2048, 1], offset: ?>, #hal.descriptor_type<storage_buffer>> memref<1x1x64x128xbf16, 1 : i32>)
    scf.forall (%arg2, %arg3) = (0, 0) to (32, 32) step (16, 16) {
      %4 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg2)
      %subview_10 = memref.subview %alloc_2[0, 0, %4, 0] [1, 1, 64, 64] [1, 1, 1, 1] : memref<1x1x128x64xbf16, 1 : i32> to memref<1x1x64x64xbf16, strided<[8192, 8192, 64, 1], offset: ?>, 1 : i32>
      iree_linalg_ext.pack %subview_10 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %alloc_0 : (memref<1x1x64x64xbf16, strided<[8192, 8192, 64, 1], offset: ?>, 1 : i32> memref<1x1x8x16x4x8xbf16, 2 : i32>)
      %5 = affine.apply affine_map<(d0) -> (d0 * 4)>(%arg3)
      %subview_11 = memref.subview %alloc_1[0, 0, 0, %5] [1, 1, 64, 64] [1, 1, 1, 1] : memref<1x1x64x128xbf16, 1 : i32> to memref<1x1x64x64xbf16, strided<[8192, 8192, 128, 1], offset: ?>, 1 : i32>
      iree_linalg_ext.pack %subview_11 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %alloc : (memref<1x1x64x64xbf16, strided<[8192, 8192, 128, 1], offset: ?>, 1 : i32> memref<1x1x16x8x8x4xbf16, 2 : i32>)
      %subview_12 = memref.subview %alloc_3[0, 0, %arg3, %arg2, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : memref<1x1x32x32x4x4xbf16, 2 : i32> to memref<1x1x16x16x4x4xbf16, strided<[16384, 16384, 512, 16, 4, 1], offset: ?>, 2 : i32>
      iree_codegen.ukernel.generic "zero_bf16" outs(%subview_12 : memref<1x1x16x16x4x4xbf16, strided<[16384, 16384, 512, 16, 4, 1], offset: ?>, 2 : i32>) fn_def_attrs {link_with = "mm.o"} strided_outer_dims(2)
      iree_codegen.ukernel.generic "matmul_bf16_bf16" ins(%alloc_0, %alloc : memref<1x1x8x16x4x8xbf16, 2 : i32>, memref<1x1x16x8x8x4xbf16, 2 : i32>) outs(%subview_12 : memref<1x1x16x16x4x4xbf16, strided<[16384, 16384, 512, 16, 4, 1], offset: ?>, 2 : i32>) fn_def_attrs {link_with = "mm.o"} strided_outer_dims(2)
      %subview_13 = memref.subview %alloc_3[0, 0, %arg3, %arg2, 0, 0] [1, 1, 16, 16, 4, 4] [1, 1, 1, 1, 1, 1] : memref<1x1x32x32x4x4xbf16, 2 : i32> to memref<1x1x16x16x4x4xbf16, strided<[16384, 16384, 512, 16, 4, 1], offset: ?>, 2 : i32>
      linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5) -> (d0, d1, d2, d3, d4, d5)>, affine_map<(d0, d1, d2, d3, d4, d5) -> (d0, d1, d2, d3, d4, d5)>], iterator_types = ["parallel", "parallel", "parallel", "parallel", "parallel", "parallel"]} ins(%subview_12 : memref<1x1x16x16x4x4xbf16, strided<[16384, 16384, 512, 16, 4, 1], offset: ?>, 2 : i32>) outs(%subview_13 : memref<1x1x16x16x4x4xbf16, strided<[16