New tiling/packing

input.mlir

// -----// IR Dump Before AssignTargetDevicesPass (iree-hal-assign-target-devices) //----- //
module {
  func.func @matmul_i8_i32(%arg0: tensor<128x256xbf16>, %arg1: tensor<256x128xbf16>) -> tensor<128x128xf32> {
    %cst = arith.constant 0.000000e+00 : f32
    %0 = tensor.empty() : tensor<128x128xf32>
    %1 = linalg.fill ins(%cst : f32) outs(%0 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %2 = linalg.matmul ins(%arg0, %arg1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%1 : tensor<128x128xf32>) -> tensor<128x128xf32>
    return %2 : tensor<128x128xf32>
  }
}


// -----// IR Dump Before AutoInputConversionPipeline (iree-auto-input-conversion) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  func.func @matmul_i8_i32(%arg0: tensor<128x256xbf16>, %arg1: tensor<256x128xbf16>) -> tensor<128x128xf32> {
    %cst = arith.constant 0.000000e+00 : f32
    %0 = tensor.empty() : tensor<128x128xf32>
    %1 = linalg.fill ins(%cst : f32) outs(%0 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %2 = linalg.matmul ins(%arg0, %arg1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%1 : tensor<128x128xf32>) -> tensor<128x128xf32>
    return %2 : tensor<128x128xf32>
  }
}


// -----// IR Dump Before IREEImportPublic (iree-import-public) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  func.func @matmul_i8_i32(%arg0: tensor<128x256xbf16>, %arg1: tensor<256x128xbf16>) -> tensor<128x128xf32> {
    %cst = arith.constant 0.000000e+00 : f32
    %0 = tensor.empty() : tensor<128x128xf32>
    %1 = linalg.fill ins(%cst : f32) outs(%0 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %2 = linalg.matmul ins(%arg0, %arg1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%1 : tensor<128x128xf32>) -> tensor<128x128xf32>
    return %2 : tensor<128x128xf32>
  }
}


// -----// IR Dump Before ImportMLProgram (iree-import-ml-program) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_i8_i32(%arg0: tensor<128x256xbf16>, %arg1: tensor<256x128xbf16>) -> tensor<128x128xf32> {
    %cst = arith.constant 0.000000e+00 : f32
    %0 = tensor.empty() : tensor<128x128xf32>
    %1 = linalg.fill ins(%cst : f32) outs(%0 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %2 = linalg.matmul ins(%arg0, %arg1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%1 : tensor<128x128xf32>) -> tensor<128x128xf32>
    util.return %2 : tensor<128x128xf32>
  }
}


// -----// IR Dump Before SanitizeModuleNames (iree-sanitize-module-names) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_i8_i32(%arg0: tensor<128x256xbf16>, %arg1: tensor<256x128xbf16>) -> tensor<128x128xf32> {
    %cst = arith.constant 0.000000e+00 : f32
    %0 = tensor.empty() : tensor<128x128xf32>
    %1 = linalg.fill ins(%cst : f32) outs(%0 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %2 = linalg.matmul ins(%arg0, %arg1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%1 : tensor<128x128xf32>) -> tensor<128x128xf32>
    util.return %2 : tensor<128x128xf32>
  }
}


// -----// IR Dump Before ConvertMeshToFlowPass (iree-convert-mesh-to-flow) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_i8_i32(%arg0: tensor<128x256xbf16>, %arg1: tensor<256x128xbf16>) -> tensor<128x128xf32> {
    %cst = arith.constant 0.000000e+00 : f32
    %0 = tensor.empty() : tensor<128x128xf32>
    %1 = linalg.fill ins(%cst : f32) outs(%0 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %2 = linalg.matmul ins(%arg0, %arg1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%1 : tensor<128x128xf32>) -> tensor<128x128xf32>
    util.return %2 : tensor<128x128xf32>
  }
}


// -----// IR Dump Before DemoteF64ToF32 (iree-input-conversion-demote-f64-to-f32) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_i8_i32(%arg0: tensor<128x256xbf16>, %arg1: tensor<256x128xbf16>) -> tensor<128x128xf32> {
    %cst = arith.constant 0.000000e+00 : f32
    %0 = tensor.empty() : tensor<128x128xf32>
    %1 = linalg.fill ins(%cst : f32) outs(%0 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %2 = linalg.matmul ins(%arg0, %arg1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%1 : tensor<128x128xf32>) -> tensor<128x128xf32>
    util.return %2 : tensor<128x128xf32>
  }
}


// -----// IR Dump Before mlir::iree_compiler::IREE::ABI::ConvertStreamableOpsPass (iree-abi-convert-streamable-ops) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_i8_i32(%arg0: tensor<128x256xbf16>, %arg1: tensor<256x128xbf16>) -> tensor<128x128xf32> {
    %cst = arith.constant 0.000000e+00 : f32
    %0 = tensor.empty() : tensor<128x128xf32>
    %1 = linalg.fill ins(%cst : f32) outs(%0 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %2 = linalg.matmul ins(%arg0, %arg1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%1 : tensor<128x128xf32>) -> tensor<128x128xf32>
    util.return %2 : tensor<128x128xf32>
  }
}


// -----// IR Dump Before mlir::iree_compiler::IREE::ABI::WrapEntryPointsPass (iree-abi-wrap-entry-points) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_i8_i32(%arg0: tensor<128x256xbf16>, %arg1: tensor<256x128xbf16>) -> tensor<128x128xf32> {
    %cst = arith.constant 0.000000e+00 : f32
    %0 = tensor.empty() : tensor<128x128xf32>
    %1 = linalg.fill ins(%cst : f32) outs(%0 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %2 = linalg.matmul ins(%arg0, %arg1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%1 : tensor<128x128xf32>) -> tensor<128x128xf32>
    util.return %2 : tensor<128x128xf32>
  }
}


// -----// IR Dump Before Inliner (inline) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
    %2 = util.call @_matmul_i8_i32(%0, %1) : (tensor<128x256xbf16>, tensor<256x128xbf16>) -> tensor<128x128xf32>
    %3 = hal.tensor.export %2 "output0" : tensor<128x128xf32> -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
  util.func private @_matmul_i8_i32(%arg0: tensor<128x256xbf16>, %arg1: tensor<256x128xbf16>) -> tensor<128x128xf32> {
    %cst = arith.constant 0.000000e+00 : f32
    %0 = tensor.empty() : tensor<128x128xf32>
    %1 = linalg.fill ins(%cst : f32) outs(%0 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %2 = linalg.matmul ins(%arg0, %arg1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%1 : tensor<128x128xf32>) -> tensor<128x128xf32>
    util.return %2 : tensor<128x128xf32>
  }
}


// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func private @_matmul_i8_i32(%arg0: tensor<128x256xbf16>, %arg1: tensor<256x128xbf16>) -> tensor<128x128xf32> {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = tensor.empty() : tensor<128x128xf32>
  %1 = linalg.fill ins(%cst : f32) outs(%0 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %2 = linalg.matmul ins(%arg0, %arg1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%1 : tensor<128x128xf32>) -> tensor<128x128xf32>
  util.return %2 : tensor<128x128xf32>
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = util.call @_matmul_i8_i32(%0, %1) : (tensor<128x256xbf16>, tensor<256x128xbf16>) -> tensor<128x128xf32>
  %3 = hal.tensor.export %2 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %3 : !hal.buffer_view
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %cst = arith.constant 0.000000e+00 : f32
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before SymbolDCE (symbol-dce) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %cst = arith.constant 0.000000e+00 : f32
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
    %2 = tensor.empty() : tensor<128x128xf32>
    %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
    util.return %5 : !hal.buffer_view
  }
}


// -----// IR Dump Before RemoveZeroExtentTensors (iree-global-opt-remove-zero-extent-tensors) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before DetachElementwiseFromNamedOps (iree-global-opt-detach-elementwise-from-named-ops) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before LinalgNamedOpConversionPass (linalg-named-op-conversion) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before Convert1X1FilterConv2DToMatmul (iree-global-opt-convert-1x1-filter-conv2d-to-matmul) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before EraseUnusedLinalgOperands (iree-global-opt-erase-unused-linalg-operands) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %cst = arith.constant 0.000000e+00 : f32
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
    %2 = tensor.empty() : tensor<128x128xf32>
    %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
    util.return %5 : !hal.buffer_view
  }
}


// -----// IR Dump Before ExpandTensorShapes (iree-global-opt-expand-tensor-shapes) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %cst = arith.constant 0.000000e+00 : f32
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
    %2 = tensor.empty() : tensor<128x128xf32>
    %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
    util.return %5 : !hal.buffer_view
  }
}


// -----// IR Dump Before ConvertElementwiseToLinalgPass (convert-elementwise-to-linalg) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before RaiseSpecialOps (iree-global-opt-raise-special-ops) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before DecomposeConcat (iree-global-opt-decompose-concat) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before GeneralizeLinalgNamedOps (iree-global-opt-generalize-linalg-named-ops) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before FoldUnitExtentDimsPass (iree-flow-fold-unit-extent-dims) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before FuseDequantizationMatmul (iree-global-opt-fuse-dequantization-matmul) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before SetEncoding (iree-global-opt-set-encoding) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %cst = arith.constant 0.000000e+00 : f32
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
    %2 = tensor.empty() : tensor<128x128xf32>
    %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
    util.return %5 : !hal.buffer_view
  }
}


// -----// IR Dump Before MaterializeHomogeneousEncodings (iree-global-opt-materialize-homogeneous-encodings) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#map = affine_map<(d0, d1, d2) -> (d0, d2)>
#map1 = affine_map<(d0, d1, d2) -> (d2, d1)>
#map2 = affine_map<(d0, d1, d2) -> (d0, d1)>
#map3 = affine_map<()[s0, s1] -> (-s1 + (s1 ceildiv s0) * s0)>
#map4 = affine_map<()[s0] -> ((128 ceildiv s0) * s0)>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %cst = arith.constant 0.000000e+00 : bf16
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %cst_0 = arith.constant 0.000000e+00 : f32
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
    %2:2 = iree_encoding.upper_bound_tile_size tensor<128x256xbf16, #iree_encoding.encoding<role =  LHS, element_types = [bf16, bf16, f32], user_indexing_maps = [#map, #map1, #map2]>> -> index, index
    %3 = affine.apply #map3()[%2#0, %c128]
    %4 = affine.apply #map3()[%2#1, %c256]
    %padded = tensor.pad %0 low[0, 0] high[%3, %4] {
    ^bb0(%arg2: index, %arg3: index):
      tensor.yield %cst : bf16
    } : tensor<128x256xbf16> to tensor<?x?xbf16>
    %5 = iree_encoding.set_encoding %padded : tensor<?x?xbf16> -> tensor<?x?xbf16, #iree_encoding.encoding<role =  LHS, element_types = [bf16, bf16, f32], original_type = tensor<128x256xbf16>, user_indexing_maps = [#map, #map1, #map2]>>
    %6:2 = iree_encoding.upper_bound_tile_size tensor<256x128xbf16, #iree_encoding.encoding<role =  RHS, element_types = [bf16, bf16, f32], user_indexing_maps = [#map, #map1, #map2]>> -> index, index
    %7 = affine.apply #map3()[%6#0, %c256]
    %8 = affine.apply #map3()[%6#1, %c128]
    %padded_1 = tensor.pad %1 low[0, 0] high[%7, %8] {
    ^bb0(%arg2: index, %arg3: index):
      tensor.yield %cst : bf16
    } : tensor<256x128xbf16> to tensor<?x?xbf16>
    %9 = iree_encoding.set_encoding %padded_1 : tensor<?x?xbf16> -> tensor<?x?xbf16, #iree_encoding.encoding<role =  RHS, element_types = [bf16, bf16, f32], original_type = tensor<256x128xbf16>, user_indexing_maps = [#map, #map1, #map2]>>
    %10:2 = iree_encoding.upper_bound_tile_size tensor<128x128xf32, #iree_encoding.encoding<role =  RESULT, element_types = [bf16, bf16, f32], user_indexing_maps = [#map, #map1, #map2]>> -> index, index
    %11 = affine.apply #map4()[%10#0]
    %12 = affine.apply #map4()[%10#1]
    %13 = tensor.empty(%11, %12) : tensor<?x?xf32, #iree_encoding.encoding<role =  RESULT, element_types = [bf16, bf16, f32], original_type = tensor<128x128xf32>, user_indexing_maps = [#map, #map1, #map2]>>
    %14 = linalg.fill ins(%cst_0 : f32) outs(%13 : tensor<?x?xf32, #iree_encoding.encoding<role =  RESULT, element_types = [bf16, bf16, f32], original_type = tensor<128x128xf32>, user_indexing_maps = [#map, #map1, #map2]>>) -> tensor<?x?xf32, #iree_encoding.encoding<role =  RESULT, element_types = [bf16, bf16, f32], original_type = tensor<128x128xf32>, user_indexing_maps = [#map, #map1, #map2]>>
    %15 = linalg.matmul ins(%5, %9 : tensor<?x?xbf16, #iree_encoding.encoding<role =  LHS, element_types = [bf16, bf16, f32], original_type = tensor<128x256xbf16>, user_indexing_maps = [#map, #map1, #map2]>>, tensor<?x?xbf16, #iree_encoding.encoding<role =  RHS, element_types = [bf16, bf16, f32], original_type = tensor<256x128xbf16>, user_indexing_maps = [#map, #map1, #map2]>>) outs(%14 : tensor<?x?xf32, #iree_encoding.encoding<role =  RESULT, element_types = [bf16, bf16, f32], original_type = tensor<128x128xf32>, user_indexing_maps = [#map, #map1, #map2]>>) -> tensor<?x?xf32, #iree_encoding.encoding<role =  RESULT, element_types = [bf16, bf16, f32], original_type = tensor<128x128xf32>, user_indexing_maps = [#map, #map1, #map2]>>
    %16 = iree_encoding.unset_encoding %15 : tensor<?x?xf32, #iree_encoding.encoding<role =  RESULT, element_types = [bf16, bf16, f32], original_type = tensor<128x128xf32>, user_indexing_maps = [#map, #map1, #map2]>> -> tensor<?x?xf32>
    %extracted_slice = tensor.extract_slice %16[0, 0] [128, 128] [1, 1] : tensor<?x?xf32> to tensor<128x128xf32>
    %17 = hal.tensor.export %extracted_slice "output0" : tensor<128x128xf32> -> !hal.buffer_view
    util.return %17 : !hal.buffer_view
  }
}


// -----// IR Dump Before MaterializeEncodingIntoNop (iree-codegen-materialize-encoding-into-nop) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : bf16
  %c256 = arith.constant 256 : index
  %c128 = arith.constant 128 : index
  %cst_0 = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2:2 = iree_encoding.upper_bound_tile_size tensor<128x256xbf16, #iree_encoding.encoding<role =  LHS, element_types = [bf16, bf16, f32], user_indexing_maps = [affine_map<(d0, d1, d2) -> (d0, d2)>, affine_map<(d0, d1, d2) -> (d2, d1)>, affine_map<(d0, d1, d2) -> (d0, d1)>]>> -> index, index
  %3 = affine.apply affine_map<()[s0, s1] -> (-s1 + (s1 ceildiv s0) * s0)>()[%2#0, %c128]
  %4 = affine.apply affine_map<()[s0, s1] -> (-s1 + (s1 ceildiv s0) * s0)>()[%2#1, %c256]
  %padded = tensor.pad %0 low[0, 0] high[%3, %4] {
  ^bb0(%arg2: index, %arg3: index):
    tensor.yield %cst : bf16
  } : tensor<128x256xbf16> to tensor<?x?xbf16>
  %5 = iree_encoding.set_encoding %padded : tensor<?x?xbf16> -> tensor<?x?xbf16, #iree_encoding.encoding<role =  LHS, element_types = [bf16, bf16, f32], original_type = tensor<128x256xbf16>, user_indexing_maps = [affine_map<(d0, d1, d2) -> (d0, d2)>, affine_map<(d0, d1, d2) -> (d2, d1)>, affine_map<(d0, d1, d2) -> (d0, d1)>]>>
  %6:2 = iree_encoding.upper_bound_tile_size tensor<256x128xbf16, #iree_encoding.encoding<role =  RHS, element_types = [bf16, bf16, f32], user_indexing_maps = [affine_map<(d0, d1, d2) -> (d0, d2)>, affine_map<(d0, d1, d2) -> (d2, d1)>, affine_map<(d0, d1, d2) -> (d0, d1)>]>> -> index, index
  %7 = affine.apply affine_map<()[s0, s1] -> (-s1 + (s1 ceildiv s0) * s0)>()[%6#0, %c256]
  %8 = affine.apply affine_map<()[s0, s1] -> (-s1 + (s1 ceildiv s0) * s0)>()[%6#1, %c128]
  %padded_1 = tensor.pad %1 low[0, 0] high[%7, %8] {
  ^bb0(%arg2: index, %arg3: index):
    tensor.yield %cst : bf16
  } : tensor<256x128xbf16> to tensor<?x?xbf16>
  %9 = iree_encoding.set_encoding %padded_1 : tensor<?x?xbf16> -> tensor<?x?xbf16, #iree_encoding.encoding<role =  RHS, element_types = [bf16, bf16, f32], original_type = tensor<256x128xbf16>, user_indexing_maps = [affine_map<(d0, d1, d2) -> (d0, d2)>, affine_map<(d0, d1, d2) -> (d2, d1)>, affine_map<(d0, d1, d2) -> (d0, d1)>]>>
  %10:2 = iree_encoding.upper_bound_tile_size tensor<128x128xf32, #iree_encoding.encoding<role =  RESULT, element_types = [bf16, bf16, f32], user_indexing_maps = [affine_map<(d0, d1, d2) -> (d0, d2)>, affine_map<(d0, d1, d2) -> (d2, d1)>, affine_map<(d0, d1, d2) -> (d0, d1)>]>> -> index, index
  %11 = affine.apply affine_map<()[s0] -> ((128 ceildiv s0) * s0)>()[%10#0]
  %12 = affine.apply affine_map<()[s0] -> ((128 ceildiv s0) * s0)>()[%10#1]
  %13 = tensor.empty(%11, %12) : tensor<?x?xf32, #iree_encoding.encoding<role =  RESULT, element_types = [bf16, bf16, f32], original_type = tensor<128x128xf32>, user_indexing_maps = [affine_map<(d0, d1, d2) -> (d0, d2)>, affine_map<(d0, d1, d2) -> (d2, d1)>, affine_map<(d0, d1, d2) -> (d0, d1)>]>>
  %14 = linalg.fill ins(%cst_0 : f32) outs(%13 : tensor<?x?xf32, #iree_encoding.encoding<role =  RESULT, element_types = [bf16, bf16, f32], original_type = tensor<128x128xf32>, user_indexing_maps = [affine_map<(d0, d1, d2) -> (d0, d2)>, affine_map<(d0, d1, d2) -> (d2, d1)>, affine_map<(d0, d1, d2) -> (d0, d1)>]>>) -> tensor<?x?xf32, #iree_encoding.encoding<role =  RESULT, element_types = [bf16, bf16, f32], original_type = tensor<128x128xf32>, user_indexing_maps = [affine_map<(d0, d1, d2) -> (d0, d2)>, affine_map<(d0, d1, d2) -> (d2, d1)>, affine_map<(d0, d1, d2) -> (d0, d1)>]>>
  %15 = linalg.matmul ins(%5, %9 : tensor<?x?xbf16, #iree_encoding.encoding<role =  LHS, element_types = [bf16, bf16, f32], original_type = tensor<128x256xbf16>, user_indexing_maps = [affine_map<(d0, d1, d2) -> (d0, d2)>, affine_map<(d0, d1, d2) -> (d2, d1)>, affine_map<(d0, d1, d2) -> (d0, d1)>]>>, tensor<?x?xbf16, #iree_encoding.encoding<role =  RHS, element_types = [bf16, bf16, f32], original_type = tensor<256x128xbf16>, user_indexing_maps = [affine_map<(d0, d1, d2) -> (d0, d2)>, affine_map<(d0, d1, d2) -> (d2, d1)>, affine_map<(d0, d1, d2) -> (d0, d1)>]>>) outs(%14 : tensor<?x?xf32, #iree_encoding.encoding<role =  RESULT, element_types = [bf16, bf16, f32], original_type = tensor<128x128xf32>, user_indexing_maps = [affine_map<(d0, d1, d2) -> (d0, d2)>, affine_map<(d0, d1, d2) -> (d2, d1)>, affine_map<(d0, d1, d2) -> (d0, d1)>]>>) -> tensor<?x?xf32, #iree_encoding.encoding<role =  RESULT, element_types = [bf16, bf16, f32], original_type = tensor<128x128xf32>, user_indexing_maps = [affine_map<(d0, d1, d2) -> (d0, d2)>, affine_map<(d0, d1, d2) -> (d2, d1)>, affine_map<(d0, d1, d2) -> (d0, d1)>]>>
  %16 = iree_encoding.unset_encoding %15 : tensor<?x?xf32, #iree_encoding.encoding<role =  RESULT, element_types = [bf16, bf16, f32], original_type = tensor<128x128xf32>, user_indexing_maps = [affine_map<(d0, d1, d2) -> (d0, d2)>, affine_map<(d0, d1, d2) -> (d2, d1)>, affine_map<(d0, d1, d2) -> (d0, d1)>]>> -> tensor<?x?xf32>
  %extracted_slice = tensor.extract_slice %16[0, 0] [128, 128] [1, 1] : tensor<?x?xf32> to tensor<128x128xf32>
  %17 = hal.tensor.export %extracted_slice "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %17 : !hal.buffer_view
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %c128 = arith.constant 128 : index
  %c0 = arith.constant 0 : index
  %cst = arith.constant 0.000000e+00 : bf16
  %cst_0 = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %padded = tensor.pad %0 low[0, 0] high[%c0, %c0] {
  ^bb0(%arg2: index, %arg3: index):
    tensor.yield %cst : bf16
  } : tensor<128x256xbf16> to tensor<?x?xbf16>
  %padded_1 = tensor.pad %1 low[0, 0] high[%c0, %c0] {
  ^bb0(%arg2: index, %arg3: index):
    tensor.yield %cst : bf16
  } : tensor<256x128xbf16> to tensor<?x?xbf16>
  %2 = tensor.empty(%c128, %c128) : tensor<?x?xf32>
  %3 = linalg.fill ins(%cst_0 : f32) outs(%2 : tensor<?x?xf32>) -> tensor<?x?xf32>
  %4 = linalg.matmul ins(%padded, %padded_1 : tensor<?x?xbf16>, tensor<?x?xbf16>) outs(%3 : tensor<?x?xf32>) -> tensor<?x?xf32>
  %extracted_slice = tensor.extract_slice %4[0, 0] [128, 128] [1, 1] : tensor<?x?xf32> to tensor<128x128xf32>
  %5 = hal.tensor.export %extracted_slice "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %cst = arith.constant 0.000000e+00 : f32
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
    %2 = tensor.empty() : tensor<128x128xf32>
    %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
    util.return %5 : !hal.buffer_view
  }
}


// -----// IR Dump Before CSE (cse) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %cst = arith.constant 0.000000e+00 : f32
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
    %2 = tensor.empty() : tensor<128x128xf32>
    %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
    util.return %5 : !hal.buffer_view
  }
}


// -----// IR Dump Before SimplifyPackUnpack (iree-global-opt-simplify-pack-unpack) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %cst = arith.constant 0.000000e+00 : f32
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
    %2 = tensor.empty() : tensor<128x128xf32>
    %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
    util.return %5 : !hal.buffer_view
  }
}


// -----// IR Dump Before DataLayoutPropagation (iree-global-opt-data-layout-propagation) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before GeneralizeLinalgNamedOps (iree-global-opt-generalize-linalg-named-ops) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before GlobalLoopInvariantCodeMotion (iree-global-opt-loop-invariant-code-motion) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before SimplifyGlobalAccesses (iree-util-simplify-global-accesses) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before ApplyPatterns (iree-util-apply-patterns) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %cst = arith.constant 0.000000e+00 : f32
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
    %2 = tensor.empty() : tensor<128x128xf32>
    %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
    util.return %5 : !hal.buffer_view
  }
}


// -----// IR Dump Before FoldGlobals (iree-util-fold-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %cst = arith.constant 0.000000e+00 : f32
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
    %2 = tensor.empty() : tensor<128x128xf32>
    %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
    util.return %5 : !hal.buffer_view
  }
}


// -----// IR Dump Before IPO (iree-util-ipo) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %cst = arith.constant 0.000000e+00 : f32
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
    %2 = tensor.empty() : tensor<128x128xf32>
    %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
    util.return %5 : !hal.buffer_view
  }
}


// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %cst = arith.constant 0.000000e+00 : f32
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
    %2 = tensor.empty() : tensor<128x128xf32>
    %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
    util.return %5 : !hal.buffer_view
  }
}


// -----// IR Dump Before CSE (cse) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %cst = arith.constant 0.000000e+00 : f32
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
    %2 = tensor.empty() : tensor<128x128xf32>
    %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
    util.return %5 : !hal.buffer_view
  }
}


// -----// IR Dump Before HoistIntoGlobals (iree-util-hoist-into-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %cst = arith.constant 0.000000e+00 : f32
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
    %2 = tensor.empty() : tensor<128x128xf32>
    %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
    util.return %5 : !hal.buffer_view
  }
}


// -----// IR Dump Before JitGlobals (iree-consteval-jit-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %cst = arith.constant 0.000000e+00 : f32
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
    %2 = tensor.empty() : tensor<128x128xf32>
    %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
    util.return %5 : !hal.buffer_view
  }
}


// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before RaiseSpecialOps (iree-global-opt-raise-special-ops) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before VerifyInputLegalityPass (iree-verify-input-legality) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %cst = arith.constant 0.000000e+00 : f32
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
    %2 = tensor.empty() : tensor<128x128xf32>
    %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
    util.return %5 : !hal.buffer_view
  }
}


// -----// IR Dump Before InjectTensorTracingPass (iree-flow-inject-tensor-tracing) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before TensorPadToTensorInsertSlicePass (iree-flow-tensor-pad-to-tensor-insert-slice) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %cst = arith.constant 0.000000e+00 : f32
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
    %2 = tensor.empty() : tensor<128x128xf32>
    %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
    util.return %5 : !hal.buffer_view
  }
}


// -----// IR Dump Before FixedPointIterator (iree-util-fixed-point-iterator) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %cst = arith.constant 0.000000e+00 : f32
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
    %2 = tensor.empty() : tensor<128x128xf32>
    %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
    util.return %5 : !hal.buffer_view
  }
}


// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before SimplifyGlobalAccesses (iree-util-simplify-global-accesses) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before ApplyPatterns (iree-util-apply-patterns) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie], iree.fixedpoint.iteration = 0 : index} {
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %cst = arith.constant 0.000000e+00 : f32
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
    %2 = tensor.empty() : tensor<128x128xf32>
    %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
    util.return %5 : !hal.buffer_view
  }
}


// -----// IR Dump Before FoldGlobals (iree-util-fold-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie], iree.fixedpoint.iteration = 0 : index} {
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %cst = arith.constant 0.000000e+00 : f32
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
    %2 = tensor.empty() : tensor<128x128xf32>
    %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
    util.return %5 : !hal.buffer_view
  }
}


// -----// IR Dump Before FuseGlobals (iree-util-fuse-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie], iree.fixedpoint.iteration = 0 : index} {
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %cst = arith.constant 0.000000e+00 : f32
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
    %2 = tensor.empty() : tensor<128x128xf32>
    %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
    util.return %5 : !hal.buffer_view
  }
}


// -----// IR Dump Before IPO (iree-util-ipo) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie], iree.fixedpoint.iteration = 0 : index} {
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %cst = arith.constant 0.000000e+00 : f32
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
    %2 = tensor.empty() : tensor<128x128xf32>
    %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
    util.return %5 : !hal.buffer_view
  }
}


// -----// IR Dump Before FusionPreprocessingPass (iree-flow-fusion-preprocessing) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before ElementwiseOpFusionPass (iree-flow-elementwise-op-fusion) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before BubbleUpExpandShapesPass (iree-flow-bubble-up-expand-shapes) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before ElementwiseOpFusionPass (iree-flow-elementwise-op-fusion) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before SinkReshapesPass (iree-flow-sink-reshapes) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before FusionOfTensorOpsPass (iree-flow-fusion-of-tensor-ops) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before SplitReductionPass (iree-flow-split-reduction-ops) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before FusionPreprocessingPass (iree-flow-fusion-preprocessing) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before InterchangeTransposeGenericOpsPass (iree-flow-interchange-transpose-generic-ops) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before FormScalarDispatchesPass (iree-flow-form-scalar-dispatches) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before FormDispatchRegionsPass (iree-flow-form-dispatch-regions) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before CloneProducersIntoDispatchRegionsPass (iree-flow-clone-producers-into-dispatch-regions) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = flow.dispatch.region -> (tensor<128x128xf32>) {
    %6 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
    flow.return %6 : tensor<128x128xf32>
  }
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before CollapseDimensionsPass (iree-flow-collapse-dimensions) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = flow.dispatch.region -> (tensor<128x128xf32>) {
    %6 = tensor.empty() : tensor<128x128xf32>
    %cst_0 = arith.constant 0.000000e+00 : f32
    %7 = linalg.fill ins(%cst_0 : f32) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %8 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%7 : tensor<128x128xf32>) -> tensor<128x128xf32>
    flow.return %8 : tensor<128x128xf32>
  }
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before FormDispatchWorkgroupsPass (iree-flow-form-dispatch-workgroups) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %cst = arith.constant 0.000000e+00 : f32
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = tensor.empty() : tensor<128x128xf32>
  %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %4 = flow.dispatch.region -> (tensor<128x128xf32>) {
    %6 = tensor.empty() : tensor<128x128xf32>
    %cst_0 = arith.constant 0.000000e+00 : f32
    %7 = linalg.fill ins(%cst_0 : f32) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %8 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%7 : tensor<128x128xf32>) -> tensor<128x128xf32>
    flow.return %8 : tensor<128x128xf32>
  }
  %5 = hal.tensor.export %4 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %5 : !hal.buffer_view
}

// -----// IR Dump Before CaptureDynamicDimsPass (iree-flow-capture-dynamic-dims) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = flow.dispatch.workgroups(%0, %1) : (tensor<128x256xbf16>, tensor<256x128xbf16>) -> tensor<128x128xf32> =
      (%arg2: !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>, %arg3: !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>, %arg4: !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>) {
    %cst = arith.constant 0.000000e+00 : f32
    %4 = flow.dispatch.tensor.load %arg2, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
    %5 = flow.dispatch.tensor.load %arg3, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
    %6 = tensor.empty() : tensor<128x128xf32>
    %7 = linalg.fill ins(%cst : f32) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %8 = linalg.matmul ins(%4, %5 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%7 : tensor<128x128xf32>) -> tensor<128x128xf32>
    flow.dispatch.tensor.store %8, %arg4, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
    flow.return
  } count() -> (index, index, index) {
    %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
    flow.return %x, %y, %z : index, index, index
  }
  %3 = hal.tensor.export %2 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %3 : !hal.buffer_view
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = flow.dispatch.workgroups(%0, %1) : (tensor<128x256xbf16>, tensor<256x128xbf16>) -> tensor<128x128xf32> =
      (%arg2: !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>, %arg3: !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>, %arg4: !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>) {
    %cst = arith.constant 0.000000e+00 : f32
    %4 = flow.dispatch.tensor.load %arg2, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
    %5 = flow.dispatch.tensor.load %arg3, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
    %6 = tensor.empty() : tensor<128x128xf32>
    %7 = linalg.fill ins(%cst : f32) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %8 = linalg.matmul ins(%4, %5 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%7 : tensor<128x128xf32>) -> tensor<128x128xf32>
    flow.dispatch.tensor.store %8, %arg4, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
    flow.return
  } count() -> (index, index, index) {
    %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
    flow.return %x, %y, %z : index, index, index
  }
  %3 = hal.tensor.export %2 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %3 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = flow.dispatch.workgroups(%0, %1) : (tensor<128x256xbf16>, tensor<256x128xbf16>) -> tensor<128x128xf32> =
      (%arg2: !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>, %arg3: !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>, %arg4: !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>) {
    %cst = arith.constant 0.000000e+00 : f32
    %4 = flow.dispatch.tensor.load %arg2, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
    %5 = flow.dispatch.tensor.load %arg3, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
    %6 = tensor.empty() : tensor<128x128xf32>
    %7 = linalg.fill ins(%cst : f32) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %8 = linalg.matmul ins(%4, %5 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%7 : tensor<128x128xf32>) -> tensor<128x128xf32>
    flow.dispatch.tensor.store %8, %arg4, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
    flow.return
  } count() -> (index, index, index) {
    %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
    flow.return %x, %y, %z : index, index, index
  }
  %3 = hal.tensor.export %2 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %3 : !hal.buffer_view
}

// -----// IR Dump Before InitializeEmptyTensorsPass (iree-flow-initialize-empty-tensors) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = flow.dispatch.workgroups(%0, %1) : (tensor<128x256xbf16>, tensor<256x128xbf16>) -> tensor<128x128xf32> =
      (%arg2: !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>, %arg3: !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>, %arg4: !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>) {
    %cst = arith.constant 0.000000e+00 : f32
    %4 = flow.dispatch.tensor.load %arg2, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
    %5 = flow.dispatch.tensor.load %arg3, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
    %6 = tensor.empty() : tensor<128x128xf32>
    %7 = linalg.fill ins(%cst : f32) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %8 = linalg.matmul ins(%4, %5 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%7 : tensor<128x128xf32>) -> tensor<128x128xf32>
    flow.dispatch.tensor.store %8, %arg4, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
    flow.return
  } count() -> (index, index, index) {
    %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
    flow.return %x, %y, %z : index, index, index
  }
  %3 = hal.tensor.export %2 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %3 : !hal.buffer_view
}

// -----// IR Dump Before OutlineDispatchExternsPass (iree-flow-outline-dispatch-externs) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
    %2 = flow.dispatch.workgroups(%0, %1) : (tensor<128x256xbf16>, tensor<256x128xbf16>) -> tensor<128x128xf32> =
        (%arg2: !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>, %arg3: !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>, %arg4: !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>) {
      %cst = arith.constant 0.000000e+00 : f32
      %4 = flow.dispatch.tensor.load %arg2, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
      %5 = flow.dispatch.tensor.load %arg3, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
      %6 = tensor.empty() : tensor<128x128xf32>
      %7 = linalg.fill ins(%cst : f32) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
      %8 = linalg.matmul ins(%4, %5 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%7 : tensor<128x128xf32>) -> tensor<128x128xf32>
      flow.dispatch.tensor.store %8, %arg4, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
      flow.return
    } count() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      flow.return %x, %y, %z : index, index, index
    }
    %3 = hal.tensor.export %2 "output0" : tensor<128x128xf32> -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before OutlineDispatchRegionsPass (iree-flow-outline-dispatch-regions) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
    %2 = flow.dispatch.workgroups(%0, %1) : (tensor<128x256xbf16>, tensor<256x128xbf16>) -> tensor<128x128xf32> =
        (%arg2: !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>, %arg3: !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>, %arg4: !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>) {
      %cst = arith.constant 0.000000e+00 : f32
      %4 = flow.dispatch.tensor.load %arg2, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
      %5 = flow.dispatch.tensor.load %arg3, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
      %6 = tensor.empty() : tensor<128x128xf32>
      %7 = linalg.fill ins(%cst : f32) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
      %8 = linalg.matmul ins(%4, %5 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%7 : tensor<128x128xf32>) -> tensor<128x128xf32>
      flow.dispatch.tensor.store %8, %arg4, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
      flow.return
    } count() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      flow.return %x, %y, %z : index, index, index
    }
    %3 = hal.tensor.export %2 "output0" : tensor<128x128xf32> -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before AnnotateDispatchesPass (iree-flow-annotate-dispatches) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  flow.executable private @matmul_i8_i32_dispatch_0 {
    flow.executable.export public @matmul_i8_i32_dispatch_0 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      flow.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0(%arg0: !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>, %arg1: !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>, %arg2: !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>) {
        %cst = arith.constant 0.000000e+00 : f32
        %0 = flow.dispatch.tensor.load %arg0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %1 = flow.dispatch.tensor.load %arg1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %2 = tensor.empty() : tensor<128x128xf32>
        %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %4, %arg2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
    %2 = flow.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0(%0, %1) : (tensor<128x256xbf16>, tensor<256x128xbf16>) -> tensor<128x128xf32>
    %3 = hal.tensor.export %2 "output0" : tensor<128x128xf32> -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before StripDebugOps (iree-util-strip-debug-ops) //----- //
flow.executable private @matmul_i8_i32_dispatch_0 {
  flow.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
    %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
    flow.return %x, %y, %z : index, index, index
  }
  builtin.module {
    func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>, %arg1: !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>, %arg2: !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>) {
      %cst = arith.constant 0.000000e+00 : f32
      %0 = flow.dispatch.tensor.load %arg0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
      %1 = flow.dispatch.tensor.load %arg1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
      %2 = tensor.empty() : tensor<128x128xf32>
      %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
      %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
      flow.dispatch.tensor.store %4, %arg2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
      return
    }
  }
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = flow.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%0, %1) : (tensor<128x256xbf16>, tensor<256x128xbf16>) -> tensor<128x128xf32>
  %3 = hal.tensor.export %2 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %3 : !hal.buffer_view
}

// -----// IR Dump Before DeduplicateExecutablesPass (iree-flow-deduplicate-executables) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  flow.executable private @matmul_i8_i32_dispatch_0 {
    flow.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      flow.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>, %arg1: !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>, %arg2: !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>) {
        %cst = arith.constant 0.000000e+00 : f32
        %0 = flow.dispatch.tensor.load %arg0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %1 = flow.dispatch.tensor.load %arg1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %2 = tensor.empty() : tensor<128x128xf32>
        %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %4, %arg2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
    %2 = flow.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%0, %1) : (tensor<128x256xbf16>, tensor<256x128xbf16>) -> tensor<128x128xf32>
    %3 = hal.tensor.export %2 "output0" : tensor<128x128xf32> -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before InjectTensorTracingPass (iree-flow-inject-tensor-tracing) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = flow.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%0, %1) : (tensor<128x256xbf16>, tensor<256x128xbf16>) -> tensor<128x128xf32>
  %3 = hal.tensor.export %2 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %3 : !hal.buffer_view
}

// -----// IR Dump Before CleanupTensorShapesPass (iree-flow-cleanup-tensor-shapes) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = flow.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%0, %1) : (tensor<128x256xbf16>, tensor<256x128xbf16>) -> tensor<128x128xf32>
  %3 = hal.tensor.export %2 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %3 : !hal.buffer_view
}

// -----// IR Dump Before FixedPointIterator (iree-util-fixed-point-iterator) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  flow.executable private @matmul_i8_i32_dispatch_0 {
    flow.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      flow.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>, %arg1: !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>, %arg2: !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>) {
        %cst = arith.constant 0.000000e+00 : f32
        %0 = flow.dispatch.tensor.load %arg0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %1 = flow.dispatch.tensor.load %arg1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %2 = tensor.empty() : tensor<128x128xf32>
        %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %4, %arg2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
    %2 = flow.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%0, %1) : (tensor<128x256xbf16>, tensor<256x128xbf16>) -> tensor<128x128xf32>
    %3 = hal.tensor.export %2 "output0" : tensor<128x128xf32> -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before OutlineConstantsPass (iree-flow-outline-constants) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie], iree.fixedpoint.iteration = 0 : index} {
  flow.executable private @matmul_i8_i32_dispatch_0 {
    flow.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      flow.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>, %arg1: !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>, %arg2: !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>) {
        %cst = arith.constant 0.000000e+00 : f32
        %0 = flow.dispatch.tensor.load %arg0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %1 = flow.dispatch.tensor.load %arg1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %2 = tensor.empty() : tensor<128x128xf32>
        %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %4, %arg2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
    %2 = flow.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%0, %1) : (tensor<128x256xbf16>, tensor<256x128xbf16>) -> tensor<128x128xf32>
    %3 = hal.tensor.export %2 "output0" : tensor<128x128xf32> -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = flow.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%0, %1) : (tensor<128x256xbf16>, tensor<256x128xbf16>) -> tensor<128x128xf32>
  %3 = hal.tensor.export %2 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %3 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = flow.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%0, %1) : (tensor<128x256xbf16>, tensor<256x128xbf16>) -> tensor<128x128xf32>
  %3 = hal.tensor.export %2 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %3 : !hal.buffer_view
}

// -----// IR Dump Before SimplifyGlobalAccesses (iree-util-simplify-global-accesses) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = flow.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%0, %1) : (tensor<128x256xbf16>, tensor<256x128xbf16>) -> tensor<128x128xf32>
  %3 = hal.tensor.export %2 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %3 : !hal.buffer_view
}

// -----// IR Dump Before ApplyPatterns (iree-util-apply-patterns) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie], iree.fixedpoint.iteration = 0 : index} {
  flow.executable private @matmul_i8_i32_dispatch_0 {
    flow.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      flow.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>, %arg1: !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>, %arg2: !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>) {
        %cst = arith.constant 0.000000e+00 : f32
        %0 = flow.dispatch.tensor.load %arg0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %1 = flow.dispatch.tensor.load %arg1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %2 = tensor.empty() : tensor<128x128xf32>
        %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %4, %arg2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
    %2 = flow.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%0, %1) : (tensor<128x256xbf16>, tensor<256x128xbf16>) -> tensor<128x128xf32>
    %3 = hal.tensor.export %2 "output0" : tensor<128x128xf32> -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before FoldGlobals (iree-util-fold-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie], iree.fixedpoint.iteration = 0 : index} {
  flow.executable private @matmul_i8_i32_dispatch_0 {
    flow.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      flow.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>, %arg1: !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>, %arg2: !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>) {
        %cst = arith.constant 0.000000e+00 : f32
        %0 = flow.dispatch.tensor.load %arg0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %1 = flow.dispatch.tensor.load %arg1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %2 = tensor.empty() : tensor<128x128xf32>
        %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %4, %arg2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
    %2 = flow.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%0, %1) : (tensor<128x256xbf16>, tensor<256x128xbf16>) -> tensor<128x128xf32>
    %3 = hal.tensor.export %2 "output0" : tensor<128x128xf32> -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before FuseGlobals (iree-util-fuse-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie], iree.fixedpoint.iteration = 0 : index} {
  flow.executable private @matmul_i8_i32_dispatch_0 {
    flow.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      flow.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>, %arg1: !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>, %arg2: !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>) {
        %cst = arith.constant 0.000000e+00 : f32
        %0 = flow.dispatch.tensor.load %arg0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %1 = flow.dispatch.tensor.load %arg1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %2 = tensor.empty() : tensor<128x128xf32>
        %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %4, %arg2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
    %2 = flow.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%0, %1) : (tensor<128x256xbf16>, tensor<256x128xbf16>) -> tensor<128x128xf32>
    %3 = hal.tensor.export %2 "output0" : tensor<128x128xf32> -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before IPO (iree-util-ipo) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie], iree.fixedpoint.iteration = 0 : index} {
  flow.executable private @matmul_i8_i32_dispatch_0 {
    flow.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      flow.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>, %arg1: !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>, %arg2: !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>) {
        %cst = arith.constant 0.000000e+00 : f32
        %0 = flow.dispatch.tensor.load %arg0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %1 = flow.dispatch.tensor.load %arg1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %2 = tensor.empty() : tensor<128x128xf32>
        %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %4, %arg2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
    %2 = flow.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%0, %1) : (tensor<128x256xbf16>, tensor<256x128xbf16>) -> tensor<128x128xf32>
    %3 = hal.tensor.export %2 "output0" : tensor<128x128xf32> -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before SymbolDCE (symbol-dce) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  flow.executable private @matmul_i8_i32_dispatch_0 {
    flow.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      flow.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>, %arg1: !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>, %arg2: !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>) {
        %cst = arith.constant 0.000000e+00 : f32
        %0 = flow.dispatch.tensor.load %arg0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %1 = flow.dispatch.tensor.load %arg1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %2 = tensor.empty() : tensor<128x128xf32>
        %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %4, %arg2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
    %2 = flow.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%0, %1) : (tensor<128x256xbf16>, tensor<256x128xbf16>) -> tensor<128x128xf32>
    %3 = hal.tensor.export %2 "output0" : tensor<128x128xf32> -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before VerifyInputPass (iree-stream-verify-input) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  flow.executable private @matmul_i8_i32_dispatch_0 {
    flow.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      flow.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>, %arg1: !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>, %arg2: !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>) {
        %cst = arith.constant 0.000000e+00 : f32
        %0 = flow.dispatch.tensor.load %arg0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %1 = flow.dispatch.tensor.load %arg1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %2 = tensor.empty() : tensor<128x128xf32>
        %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %4, %arg2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
    %2 = flow.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%0, %1) : (tensor<128x256xbf16>, tensor<256x128xbf16>) -> tensor<128x128xf32>
    %3 = hal.tensor.export %2 "output0" : tensor<128x128xf32> -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = flow.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%0, %1) : (tensor<128x256xbf16>, tensor<256x128xbf16>) -> tensor<128x128xf32>
  %3 = hal.tensor.export %2 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %3 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = flow.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%0, %1) : (tensor<128x256xbf16>, tensor<256x128xbf16>) -> tensor<128x128xf32>
  %3 = hal.tensor.export %2 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %3 : !hal.buffer_view
}

// -----// IR Dump Before SimplifyGlobalAccesses (iree-util-simplify-global-accesses) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
  %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
  %2 = flow.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%0, %1) : (tensor<128x256xbf16>, tensor<256x128xbf16>) -> tensor<128x128xf32>
  %3 = hal.tensor.export %2 "output0" : tensor<128x128xf32> -> !hal.buffer_view
  util.return %3 : !hal.buffer_view
}

// -----// IR Dump Before ApplyPatterns (iree-util-apply-patterns) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  flow.executable private @matmul_i8_i32_dispatch_0 {
    flow.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      flow.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>, %arg1: !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>, %arg2: !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>) {
        %cst = arith.constant 0.000000e+00 : f32
        %0 = flow.dispatch.tensor.load %arg0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %1 = flow.dispatch.tensor.load %arg1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %2 = tensor.empty() : tensor<128x128xf32>
        %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %4, %arg2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
    %2 = flow.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%0, %1) : (tensor<128x256xbf16>, tensor<256x128xbf16>) -> tensor<128x128xf32>
    %3 = hal.tensor.export %2 "output0" : tensor<128x128xf32> -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before FoldGlobals (iree-util-fold-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  flow.executable private @matmul_i8_i32_dispatch_0 {
    flow.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      flow.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>, %arg1: !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>, %arg2: !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>) {
        %cst = arith.constant 0.000000e+00 : f32
        %0 = flow.dispatch.tensor.load %arg0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %1 = flow.dispatch.tensor.load %arg1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %2 = tensor.empty() : tensor<128x128xf32>
        %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %4, %arg2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
    %2 = flow.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%0, %1) : (tensor<128x256xbf16>, tensor<256x128xbf16>) -> tensor<128x128xf32>
    %3 = hal.tensor.export %2 "output0" : tensor<128x128xf32> -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before FuseGlobals (iree-util-fuse-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  flow.executable private @matmul_i8_i32_dispatch_0 {
    flow.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      flow.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>, %arg1: !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>, %arg2: !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>) {
        %cst = arith.constant 0.000000e+00 : f32
        %0 = flow.dispatch.tensor.load %arg0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %1 = flow.dispatch.tensor.load %arg1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %2 = tensor.empty() : tensor<128x128xf32>
        %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %4, %arg2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
    %2 = flow.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%0, %1) : (tensor<128x256xbf16>, tensor<256x128xbf16>) -> tensor<128x128xf32>
    %3 = hal.tensor.export %2 "output0" : tensor<128x128xf32> -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before IPO (iree-util-ipo) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  flow.executable private @matmul_i8_i32_dispatch_0 {
    flow.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      flow.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>, %arg1: !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>, %arg2: !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>) {
        %cst = arith.constant 0.000000e+00 : f32
        %0 = flow.dispatch.tensor.load %arg0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %1 = flow.dispatch.tensor.load %arg1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %2 = tensor.empty() : tensor<128x128xf32>
        %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %4, %arg2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
    %2 = flow.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%0, %1) : (tensor<128x256xbf16>, tensor<256x128xbf16>) -> tensor<128x128xf32>
    %3 = hal.tensor.export %2 "output0" : tensor<128x128xf32> -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before ConvertToStreamPass (iree-stream-conversion) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  flow.executable private @matmul_i8_i32_dispatch_0 {
    flow.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      flow.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>, %arg1: !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>, %arg2: !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>) {
        %cst = arith.constant 0.000000e+00 : f32
        %0 = flow.dispatch.tensor.load %arg0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %1 = flow.dispatch.tensor.load %arg1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %2 = tensor.empty() : tensor<128x128xf32>
        %3 = linalg.fill ins(%cst : f32) outs(%2 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %4 = linalg.matmul ins(%0, %1 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%3 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %4, %arg2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %0 = hal.tensor.import %arg0 "input0" : !hal.buffer_view -> tensor<128x256xbf16>
    %1 = hal.tensor.import %arg1 "input1" : !hal.buffer_view -> tensor<256x128xbf16>
    %2 = flow.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%0, %1) : (tensor<128x256xbf16>, tensor<256x128xbf16>) -> tensor<128x128xf32>
    %3 = hal.tensor.export %2 "output0" : tensor<128x128xf32> -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before VerifyLoweringToTensorsPass (iree-stream-verify-lowering-to-tensors) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %cst = arith.constant 0.000000e+00 : f32
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    %c128 = arith.constant 128 : index
    %c256 = arith.constant 256 : index
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.sizeof tensor<128x256xbf16> : index
    %1 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%0}
    %2 = stream.async.transfer %1 : !stream.resource<external>{%0} -> !stream.resource<*>{%0}
    %element_type_bf16_0 = hal.element_type<bf16> : i32
    %dense_row_major_1 = hal.encoding_type<dense_row_major> : i32
    %c256_2 = arith.constant 256 : index
    %c128_3 = arith.constant 128 : index
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256_2, %c128_3]) type(%element_type_bf16_0) encoding(%dense_row_major_1)
    %3 = stream.tensor.sizeof tensor<256x128xbf16> : index
    %4 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%3}
    %5 = stream.async.transfer %4 : !stream.resource<external>{%3} -> !stream.resource<*>{%3}
    %c0 = arith.constant 0 : index
    %6 = stream.tensor.sizeof tensor<128x128xf32> : index
    %7 = stream.async.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%2[%c0 to %0 for %0], %5[%c0 to %3 for %3]) : (!stream.resource<*>{%0}, !stream.resource<*>{%3}) -> !stream.resource<*>{%6}
    %8 = stream.async.transfer %7 : !stream.resource<*>{%6} -> !stream.resource<external>{%6}
    %9 = stream.tensor.export %8 : tensor<128x128xf32> in !stream.resource<external>{%6} -> !hal.buffer_view
    util.return %9 : !hal.buffer_view
  }
}


// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  %c128 = arith.constant 128 : index
  %c256 = arith.constant 256 : index
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.sizeof tensor<128x256xbf16> : index
  %1 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%0}
  %2 = stream.async.transfer %1 : !stream.resource<external>{%0} -> !stream.resource<*>{%0}
  %element_type_bf16_0 = hal.element_type<bf16> : i32
  %dense_row_major_1 = hal.encoding_type<dense_row_major> : i32
  %c256_2 = arith.constant 256 : index
  %c128_3 = arith.constant 128 : index
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256_2, %c128_3]) type(%element_type_bf16_0) encoding(%dense_row_major_1)
  %3 = stream.tensor.sizeof tensor<256x128xbf16> : index
  %4 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%3}
  %5 = stream.async.transfer %4 : !stream.resource<external>{%3} -> !stream.resource<*>{%3}
  %c0 = arith.constant 0 : index
  %6 = stream.tensor.sizeof tensor<128x128xf32> : index
  %7 = stream.async.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%2[%c0 to %0 for %0], %5[%c0 to %3 for %3]) : (!stream.resource<*>{%0}, !stream.resource<*>{%3}) -> !stream.resource<*>{%6}
  %8 = stream.async.transfer %7 : !stream.resource<*>{%6} -> !stream.resource<external>{%6}
  %9 = stream.tensor.export %8 : tensor<128x128xf32> in !stream.resource<external>{%6} -> !hal.buffer_view
  util.return %9 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %c0 = arith.constant 0 : index
  %c256 = arith.constant 256 : index
  %c128 = arith.constant 128 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.sizeof tensor<128x256xbf16> : index
  %1 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%0}
  %2 = stream.async.transfer %1 : !stream.resource<external>{%0} -> !stream.resource<*>{%0}
  %element_type_bf16_0 = hal.element_type<bf16> : i32
  %dense_row_major_1 = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16_0) encoding(%dense_row_major_1)
  %3 = stream.tensor.sizeof tensor<256x128xbf16> : index
  %4 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%3}
  %5 = stream.async.transfer %4 : !stream.resource<external>{%3} -> !stream.resource<*>{%3}
  %6 = stream.tensor.sizeof tensor<128x128xf32> : index
  %7 = stream.async.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%2[%c0 to %0 for %0], %5[%c0 to %3 for %3]) : (!stream.resource<*>{%0}, !stream.resource<*>{%3}) -> !stream.resource<*>{%6}
  %8 = stream.async.transfer %7 : !stream.resource<*>{%6} -> !stream.resource<external>{%6}
  %9 = stream.tensor.export %8 : tensor<128x128xf32> in !stream.resource<external>{%6} -> !hal.buffer_view
  util.return %9 : !hal.buffer_view
}

// -----// IR Dump Before SimplifyGlobalAccesses (iree-util-simplify-global-accesses) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %c0 = arith.constant 0 : index
  %c256 = arith.constant 256 : index
  %c128 = arith.constant 128 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.sizeof tensor<128x256xbf16> : index
  %1 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%0}
  %2 = stream.async.transfer %1 : !stream.resource<external>{%0} -> !stream.resource<*>{%0}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
  %3 = stream.tensor.sizeof tensor<256x128xbf16> : index
  %4 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%3}
  %5 = stream.async.transfer %4 : !stream.resource<external>{%3} -> !stream.resource<*>{%3}
  %6 = stream.tensor.sizeof tensor<128x128xf32> : index
  %7 = stream.async.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%2[%c0 to %0 for %0], %5[%c0 to %3 for %3]) : (!stream.resource<*>{%0}, !stream.resource<*>{%3}) -> !stream.resource<*>{%6}
  %8 = stream.async.transfer %7 : !stream.resource<*>{%6} -> !stream.resource<external>{%6}
  %9 = stream.tensor.export %8 : tensor<128x128xf32> in !stream.resource<external>{%6} -> !hal.buffer_view
  util.return %9 : !hal.buffer_view
}

// -----// IR Dump Before ApplyPatterns (iree-util-apply-patterns) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %cst = arith.constant 0.000000e+00 : f32
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.sizeof tensor<128x256xbf16> : index
    %1 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%0}
    %2 = stream.async.transfer %1 : !stream.resource<external>{%0} -> !stream.resource<*>{%0}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %3 = stream.tensor.sizeof tensor<256x128xbf16> : index
    %4 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%3}
    %5 = stream.async.transfer %4 : !stream.resource<external>{%3} -> !stream.resource<*>{%3}
    %6 = stream.tensor.sizeof tensor<128x128xf32> : index
    %7 = stream.async.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%2[%c0 to %0 for %0], %5[%c0 to %3 for %3]) : (!stream.resource<*>{%0}, !stream.resource<*>{%3}) -> !stream.resource<*>{%6}
    %8 = stream.async.transfer %7 : !stream.resource<*>{%6} -> !stream.resource<external>{%6}
    %9 = stream.tensor.export %8 : tensor<128x128xf32> in !stream.resource<external>{%6} -> !hal.buffer_view
    util.return %9 : !hal.buffer_view
  }
}


// -----// IR Dump Before FoldGlobals (iree-util-fold-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.sizeof tensor<128x256xbf16> : index
    %1 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%0}
    %2 = stream.async.transfer %1 : !stream.resource<external>{%0} -> !stream.resource<*>{%0}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %3 = stream.tensor.sizeof tensor<256x128xbf16> : index
    %4 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%3}
    %5 = stream.async.transfer %4 : !stream.resource<external>{%3} -> !stream.resource<*>{%3}
    %6 = stream.tensor.sizeof tensor<128x128xf32> : index
    %7 = stream.async.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%2[%c0 to %0 for %0], %5[%c0 to %3 for %3]) : (!stream.resource<*>{%0}, !stream.resource<*>{%3}) -> !stream.resource<*>{%6}
    %8 = stream.async.transfer %7 : !stream.resource<*>{%6} -> !stream.resource<external>{%6}
    %9 = stream.tensor.export %8 : tensor<128x128xf32> in !stream.resource<external>{%6} -> !hal.buffer_view
    util.return %9 : !hal.buffer_view
  }
}


// -----// IR Dump Before FuseGlobals (iree-util-fuse-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.sizeof tensor<128x256xbf16> : index
    %1 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%0}
    %2 = stream.async.transfer %1 : !stream.resource<external>{%0} -> !stream.resource<*>{%0}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %3 = stream.tensor.sizeof tensor<256x128xbf16> : index
    %4 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%3}
    %5 = stream.async.transfer %4 : !stream.resource<external>{%3} -> !stream.resource<*>{%3}
    %6 = stream.tensor.sizeof tensor<128x128xf32> : index
    %7 = stream.async.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%2[%c0 to %0 for %0], %5[%c0 to %3 for %3]) : (!stream.resource<*>{%0}, !stream.resource<*>{%3}) -> !stream.resource<*>{%6}
    %8 = stream.async.transfer %7 : !stream.resource<*>{%6} -> !stream.resource<external>{%6}
    %9 = stream.tensor.export %8 : tensor<128x128xf32> in !stream.resource<external>{%6} -> !hal.buffer_view
    util.return %9 : !hal.buffer_view
  }
}


// -----// IR Dump Before IPO (iree-util-ipo) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.sizeof tensor<128x256xbf16> : index
    %1 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%0}
    %2 = stream.async.transfer %1 : !stream.resource<external>{%0} -> !stream.resource<*>{%0}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %3 = stream.tensor.sizeof tensor<256x128xbf16> : index
    %4 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%3}
    %5 = stream.async.transfer %4 : !stream.resource<external>{%3} -> !stream.resource<*>{%3}
    %6 = stream.tensor.sizeof tensor<128x128xf32> : index
    %7 = stream.async.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%2[%c0 to %0 for %0], %5[%c0 to %3 for %3]) : (!stream.resource<*>{%0}, !stream.resource<*>{%3}) -> !stream.resource<*>{%6}
    %8 = stream.async.transfer %7 : !stream.resource<*>{%6} -> !stream.resource<external>{%6}
    %9 = stream.tensor.export %8 : tensor<128x128xf32> in !stream.resource<external>{%6} -> !hal.buffer_view
    util.return %9 : !hal.buffer_view
  }
}


// -----// IR Dump Before CombineInitializers (iree-util-combine-initializers) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.sizeof tensor<128x256xbf16> : index
    %1 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%0}
    %2 = stream.async.transfer %1 : !stream.resource<external>{%0} -> !stream.resource<*>{%0}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %3 = stream.tensor.sizeof tensor<256x128xbf16> : index
    %4 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%3}
    %5 = stream.async.transfer %4 : !stream.resource<external>{%3} -> !stream.resource<*>{%3}
    %6 = stream.tensor.sizeof tensor<128x128xf32> : index
    %7 = stream.async.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%2[%c0 to %0 for %0], %5[%c0 to %3 for %3]) : (!stream.resource<*>{%0}, !stream.resource<*>{%3}) -> !stream.resource<*>{%6}
    %8 = stream.async.transfer %7 : !stream.resource<*>{%6} -> !stream.resource<external>{%6}
    %9 = stream.tensor.export %8 : tensor<128x128xf32> in !stream.resource<external>{%6} -> !hal.buffer_view
    util.return %9 : !hal.buffer_view
  }
}


// -----// IR Dump Before EncodeDeviceTensorsPass (iree-stream-encode-device-tensors) //----- //
stream.executable private @matmul_i8_i32_dispatch_0 {
  stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
    %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
    stream.return %x, %y, %z : index, index, index
  }
  builtin.module {
    func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
      %cst = arith.constant 0.000000e+00 : f32
      %c0 = arith.constant 0 : index
      %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
      %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
      %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
      %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
      %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
      %5 = tensor.empty() : tensor<128x128xf32>
      %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
      %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
      flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
      return
    }
  }
}

// -----// IR Dump Before EncodeHostTensorsPass (iree-stream-encode-host-tensors) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %c0 = arith.constant 0 : index
  %c256 = arith.constant 256 : index
  %c128 = arith.constant 128 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.sizeof tensor<128x256xbf16> : index
  %1 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%0}
  %2 = stream.async.transfer %1 : !stream.resource<external>{%0} -> !stream.resource<*>{%0}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
  %3 = stream.tensor.sizeof tensor<256x128xbf16> : index
  %4 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%3}
  %5 = stream.async.transfer %4 : !stream.resource<external>{%3} -> !stream.resource<*>{%3}
  %6 = stream.tensor.sizeof tensor<128x128xf32> : index
  %7 = stream.async.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%2[%c0 to %0 for %0], %5[%c0 to %3 for %3]) : (!stream.resource<*>{%0}, !stream.resource<*>{%3}) -> !stream.resource<*>{%6}
  %8 = stream.async.transfer %7 : !stream.resource<*>{%6} -> !stream.resource<external>{%6}
  %9 = stream.tensor.export %8 : tensor<128x128xf32> in !stream.resource<external>{%6} -> !hal.buffer_view
  util.return %9 : !hal.buffer_view
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %c65536 = arith.constant 65536 : index
  %c0 = arith.constant 0 : index
  %c256 = arith.constant 256 : index
  %c128 = arith.constant 128 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
  %1 = stream.async.transfer %0 : !stream.resource<external>{%c65536} -> !stream.resource<*>{%c65536}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
  %2 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
  %3 = stream.async.transfer %2 : !stream.resource<external>{%c65536} -> !stream.resource<*>{%c65536}
  %4 = stream.async.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%1[%c0 to %c65536 for %c65536], %3[%c0 to %c65536 for %c65536]) : (!stream.resource<*>{%c65536}, !stream.resource<*>{%c65536}) -> !stream.resource<*>{%c65536}
  %5 = stream.async.transfer %4 : !stream.resource<*>{%c65536} -> !stream.resource<external>{%c65536}
  %6 = stream.tensor.export %5 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
  util.return %6 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %c65536 = arith.constant 65536 : index
  %c0 = arith.constant 0 : index
  %c256 = arith.constant 256 : index
  %c128 = arith.constant 128 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
  %1 = stream.async.transfer %0 : !stream.resource<external>{%c65536} -> !stream.resource<*>{%c65536}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
  %2 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
  %3 = stream.async.transfer %2 : !stream.resource<external>{%c65536} -> !stream.resource<*>{%c65536}
  %4 = stream.async.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%1[%c0 to %c65536 for %c65536], %3[%c0 to %c65536 for %c65536]) : (!stream.resource<*>{%c65536}, !stream.resource<*>{%c65536}) -> !stream.resource<*>{%c65536}
  %5 = stream.async.transfer %4 : !stream.resource<*>{%c65536} -> !stream.resource<external>{%c65536}
  %6 = stream.tensor.export %5 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
  util.return %6 : !hal.buffer_view
}

// -----// IR Dump Before SimplifyGlobalAccesses (iree-util-simplify-global-accesses) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %c65536 = arith.constant 65536 : index
  %c0 = arith.constant 0 : index
  %c256 = arith.constant 256 : index
  %c128 = arith.constant 128 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
  %1 = stream.async.transfer %0 : !stream.resource<external>{%c65536} -> !stream.resource<*>{%c65536}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
  %2 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
  %3 = stream.async.transfer %2 : !stream.resource<external>{%c65536} -> !stream.resource<*>{%c65536}
  %4 = stream.async.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%1[%c0 to %c65536 for %c65536], %3[%c0 to %c65536 for %c65536]) : (!stream.resource<*>{%c65536}, !stream.resource<*>{%c65536}) -> !stream.resource<*>{%c65536}
  %5 = stream.async.transfer %4 : !stream.resource<*>{%c65536} -> !stream.resource<external>{%c65536}
  %6 = stream.tensor.export %5 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
  util.return %6 : !hal.buffer_view
}

// -----// IR Dump Before ApplyPatterns (iree-util-apply-patterns) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    %1 = stream.async.transfer %0 : !stream.resource<external>{%c65536} -> !stream.resource<*>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %2 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %3 = stream.async.transfer %2 : !stream.resource<external>{%c65536} -> !stream.resource<*>{%c65536}
    %4 = stream.async.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%1[%c0 to %c65536 for %c65536], %3[%c0 to %c65536 for %c65536]) : (!stream.resource<*>{%c65536}, !stream.resource<*>{%c65536}) -> !stream.resource<*>{%c65536}
    %5 = stream.async.transfer %4 : !stream.resource<*>{%c65536} -> !stream.resource<external>{%c65536}
    %6 = stream.tensor.export %5 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %6 : !hal.buffer_view
  }
}


// -----// IR Dump Before FoldGlobals (iree-util-fold-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    %1 = stream.async.transfer %0 : !stream.resource<external>{%c65536} -> !stream.resource<*>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %2 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %3 = stream.async.transfer %2 : !stream.resource<external>{%c65536} -> !stream.resource<*>{%c65536}
    %4 = stream.async.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%1[%c0 to %c65536 for %c65536], %3[%c0 to %c65536 for %c65536]) : (!stream.resource<*>{%c65536}, !stream.resource<*>{%c65536}) -> !stream.resource<*>{%c65536}
    %5 = stream.async.transfer %4 : !stream.resource<*>{%c65536} -> !stream.resource<external>{%c65536}
    %6 = stream.tensor.export %5 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %6 : !hal.buffer_view
  }
}


// -----// IR Dump Before FuseGlobals (iree-util-fuse-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    %1 = stream.async.transfer %0 : !stream.resource<external>{%c65536} -> !stream.resource<*>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %2 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %3 = stream.async.transfer %2 : !stream.resource<external>{%c65536} -> !stream.resource<*>{%c65536}
    %4 = stream.async.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%1[%c0 to %c65536 for %c65536], %3[%c0 to %c65536 for %c65536]) : (!stream.resource<*>{%c65536}, !stream.resource<*>{%c65536}) -> !stream.resource<*>{%c65536}
    %5 = stream.async.transfer %4 : !stream.resource<*>{%c65536} -> !stream.resource<external>{%c65536}
    %6 = stream.tensor.export %5 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %6 : !hal.buffer_view
  }
}


// -----// IR Dump Before IPO (iree-util-ipo) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    %1 = stream.async.transfer %0 : !stream.resource<external>{%c65536} -> !stream.resource<*>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %2 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %3 = stream.async.transfer %2 : !stream.resource<external>{%c65536} -> !stream.resource<*>{%c65536}
    %4 = stream.async.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%1[%c0 to %c65536 for %c65536], %3[%c0 to %c65536 for %c65536]) : (!stream.resource<*>{%c65536}, !stream.resource<*>{%c65536}) -> !stream.resource<*>{%c65536}
    %5 = stream.async.transfer %4 : !stream.resource<*>{%c65536} -> !stream.resource<external>{%c65536}
    %6 = stream.tensor.export %5 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %6 : !hal.buffer_view
  }
}


// -----// IR Dump Before VerifyLoweringToAsyncResourcesPass (iree-stream-verify-lowering-to-async-resources) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    %1 = stream.async.transfer %0 : !stream.resource<external>{%c65536} -> !stream.resource<*>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %2 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %3 = stream.async.transfer %2 : !stream.resource<external>{%c65536} -> !stream.resource<*>{%c65536}
    %4 = stream.async.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%1[%c0 to %c65536 for %c65536], %3[%c0 to %c65536 for %c65536]) : (!stream.resource<*>{%c65536}, !stream.resource<*>{%c65536}) -> !stream.resource<*>{%c65536}
    %5 = stream.async.transfer %4 : !stream.resource<*>{%c65536} -> !stream.resource<external>{%c65536}
    %6 = stream.tensor.export %5 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %6 : !hal.buffer_view
  }
}


// -----// IR Dump Before MaterializeCopyOnWritePass (iree-stream-materialize-copy-on-write) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %c65536 = arith.constant 65536 : index
  %c0 = arith.constant 0 : index
  %c256 = arith.constant 256 : index
  %c128 = arith.constant 128 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
  %1 = stream.async.transfer %0 : !stream.resource<external>{%c65536} -> !stream.resource<*>{%c65536}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
  %2 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
  %3 = stream.async.transfer %2 : !stream.resource<external>{%c65536} -> !stream.resource<*>{%c65536}
  %4 = stream.async.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%1[%c0 to %c65536 for %c65536], %3[%c0 to %c65536 for %c65536]) : (!stream.resource<*>{%c65536}, !stream.resource<*>{%c65536}) -> !stream.resource<*>{%c65536}
  %5 = stream.async.transfer %4 : !stream.resource<*>{%c65536} -> !stream.resource<external>{%c65536}
  %6 = stream.tensor.export %5 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
  util.return %6 : !hal.buffer_view
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %c65536 = arith.constant 65536 : index
  %c0 = arith.constant 0 : index
  %c256 = arith.constant 256 : index
  %c128 = arith.constant 128 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
  %1 = stream.async.transfer %0 : !stream.resource<external>{%c65536} -> !stream.resource<*>{%c65536}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
  %2 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
  %3 = stream.async.transfer %2 : !stream.resource<external>{%c65536} -> !stream.resource<*>{%c65536}
  %4 = stream.async.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%1[%c0 to %c65536 for %c65536], %3[%c0 to %c65536 for %c65536]) : (!stream.resource<*>{%c65536}, !stream.resource<*>{%c65536}) -> !stream.resource<*>{%c65536}
  %5 = stream.async.transfer %4 : !stream.resource<*>{%c65536} -> !stream.resource<external>{%c65536}
  %6 = stream.tensor.export %5 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
  util.return %6 : !hal.buffer_view
}

// -----// IR Dump Before ElideAsyncCopiesPass (iree-stream-elide-async-copies) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    %1 = stream.async.transfer %0 : !stream.resource<external>{%c65536} -> !stream.resource<*>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %2 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %3 = stream.async.transfer %2 : !stream.resource<external>{%c65536} -> !stream.resource<*>{%c65536}
    %4 = stream.async.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%1[%c0 to %c65536 for %c65536], %3[%c0 to %c65536 for %c65536]) : (!stream.resource<*>{%c65536}, !stream.resource<*>{%c65536}) -> !stream.resource<*>{%c65536}
    %5 = stream.async.transfer %4 : !stream.resource<*>{%c65536} -> !stream.resource<external>{%c65536}
    %6 = stream.tensor.export %5 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %6 : !hal.buffer_view
  }
}


// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %c65536 = arith.constant 65536 : index
  %c0 = arith.constant 0 : index
  %c256 = arith.constant 256 : index
  %c128 = arith.constant 128 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
  %1 = stream.async.transfer %0 : !stream.resource<external>{%c65536} -> !stream.resource<*>{%c65536}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
  %2 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
  %3 = stream.async.transfer %2 : !stream.resource<external>{%c65536} -> !stream.resource<*>{%c65536}
  %4 = stream.async.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%1[%c0 to %c65536 for %c65536], %3[%c0 to %c65536 for %c65536]) : (!stream.resource<*>{%c65536}, !stream.resource<*>{%c65536}) -> !stream.resource<*>{%c65536}
  %5 = stream.async.transfer %4 : !stream.resource<*>{%c65536} -> !stream.resource<external>{%c65536}
  %6 = stream.tensor.export %5 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
  util.return %6 : !hal.buffer_view
}

// -----// IR Dump Before EmplaceAllocationsPass (iree-stream-emplace-allocations) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %c65536 = arith.constant 65536 : index
  %c0 = arith.constant 0 : index
  %c256 = arith.constant 256 : index
  %c128 = arith.constant 128 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
  %1 = stream.async.transfer %0 : !stream.resource<external>{%c65536} -> !stream.resource<*>{%c65536}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
  %2 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
  %3 = stream.async.transfer %2 : !stream.resource<external>{%c65536} -> !stream.resource<*>{%c65536}
  %4 = stream.async.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%1[%c0 to %c65536 for %c65536], %3[%c0 to %c65536 for %c65536]) : (!stream.resource<*>{%c65536}, !stream.resource<*>{%c65536}) -> !stream.resource<*>{%c65536}
  %5 = stream.async.transfer %4 : !stream.resource<*>{%c65536} -> !stream.resource<external>{%c65536}
  %6 = stream.tensor.export %5 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
  util.return %6 : !hal.buffer_view
}

// -----// IR Dump Before RefineUsagePass (iree-stream-refine-usage) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    %1 = stream.async.transfer %0 : !stream.resource<external>{%c65536} -> !stream.resource<*>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %2 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %3 = stream.async.transfer %2 : !stream.resource<external>{%c65536} -> !stream.resource<*>{%c65536}
    %4 = stream.async.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%1[%c0 to %c65536 for %c65536], %3[%c0 to %c65536 for %c65536]) : (!stream.resource<*>{%c65536}, !stream.resource<*>{%c65536}) -> !stream.resource<*>{%c65536}
    %5 = stream.async.transfer %4 : !stream.resource<*>{%c65536} -> !stream.resource<external>{%c65536}
    %6 = stream.tensor.export %5 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %6 : !hal.buffer_view
  }
}


// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %c65536 = arith.constant 65536 : index
  %c0 = arith.constant 0 : index
  %c256 = arith.constant 256 : index
  %c128 = arith.constant 128 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
  %2 = stream.async.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%0[%c0 to %c65536 for %c65536], %1[%c0 to %c65536 for %c65536]) : (!stream.resource<external>{%c65536}, !stream.resource<external>{%c65536}) -> !stream.resource<external>{%c65536}
  %3 = stream.tensor.export %2 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
  util.return %3 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %c65536 = arith.constant 65536 : index
  %c0 = arith.constant 0 : index
  %c256 = arith.constant 256 : index
  %c128 = arith.constant 128 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
  %2 = stream.async.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%0[%c0 to %c65536 for %c65536], %1[%c0 to %c65536 for %c65536]) : (!stream.resource<external>{%c65536}, !stream.resource<external>{%c65536}) -> !stream.resource<external>{%c65536}
  %3 = stream.tensor.export %2 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
  util.return %3 : !hal.buffer_view
}

// -----// IR Dump Before SimplifyGlobalAccesses (iree-util-simplify-global-accesses) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %c65536 = arith.constant 65536 : index
  %c0 = arith.constant 0 : index
  %c256 = arith.constant 256 : index
  %c128 = arith.constant 128 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
  %2 = stream.async.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%0[%c0 to %c65536 for %c65536], %1[%c0 to %c65536 for %c65536]) : (!stream.resource<external>{%c65536}, !stream.resource<external>{%c65536}) -> !stream.resource<external>{%c65536}
  %3 = stream.tensor.export %2 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
  util.return %3 : !hal.buffer_view
}

// -----// IR Dump Before ApplyPatterns (iree-util-apply-patterns) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %2 = stream.async.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%0[%c0 to %c65536 for %c65536], %1[%c0 to %c65536 for %c65536]) : (!stream.resource<external>{%c65536}, !stream.resource<external>{%c65536}) -> !stream.resource<external>{%c65536}
    %3 = stream.tensor.export %2 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before FoldGlobals (iree-util-fold-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %2 = stream.async.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%0[%c0 to %c65536 for %c65536], %1[%c0 to %c65536 for %c65536]) : (!stream.resource<external>{%c65536}, !stream.resource<external>{%c65536}) -> !stream.resource<external>{%c65536}
    %3 = stream.tensor.export %2 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before FuseGlobals (iree-util-fuse-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %2 = stream.async.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%0[%c0 to %c65536 for %c65536], %1[%c0 to %c65536 for %c65536]) : (!stream.resource<external>{%c65536}, !stream.resource<external>{%c65536}) -> !stream.resource<external>{%c65536}
    %3 = stream.tensor.export %2 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before IPO (iree-util-ipo) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %2 = stream.async.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%0[%c0 to %c65536 for %c65536], %1[%c0 to %c65536 for %c65536]) : (!stream.resource<external>{%c65536}, !stream.resource<external>{%c65536}) -> !stream.resource<external>{%c65536}
    %3 = stream.tensor.export %2 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before VerifyAsyncAccessRangesPass (iree-stream-verify-async-access-ranges) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %2 = stream.async.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%0[%c0 to %c65536 for %c65536], %1[%c0 to %c65536 for %c65536]) : (!stream.resource<external>{%c65536}, !stream.resource<external>{%c65536}) -> !stream.resource<external>{%c65536}
    %3 = stream.tensor.export %2 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before ScheduleExecutionPass (iree-stream-schedule-execution) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %c65536 = arith.constant 65536 : index
  %c0 = arith.constant 0 : index
  %c256 = arith.constant 256 : index
  %c128 = arith.constant 128 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
  %2 = stream.async.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%0[%c0 to %c65536 for %c65536], %1[%c0 to %c65536 for %c65536]) : (!stream.resource<external>{%c65536}, !stream.resource<external>{%c65536}) -> !stream.resource<external>{%c65536}
  %3 = stream.tensor.export %2 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
  util.return %3 : !hal.buffer_view
}

// -----// IR Dump Before ScheduleConcurrencyPass (iree-stream-schedule-concurrency) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %c65536 = arith.constant 65536 : index
  %c0 = arith.constant 0 : index
  %c256 = arith.constant 256 : index
  %c128 = arith.constant 128 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
  %results, %result_timepoint = stream.async.execute with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}) -> !stream.resource<external>{%c65536} {
    %4 = stream.async.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg2[%c0 to %c65536 for %c65536], %arg3[%c0 to %c65536 for %c65536]) : (!stream.resource<external>{%c65536}, !stream.resource<external>{%c65536}) -> !stream.resource<external>{%c65536}
    stream.yield %4 : !stream.resource<external>{%c65536}
  } => !stream.timepoint
  %2 = stream.timepoint.await %result_timepoint => %results : !stream.resource<external>{%c65536}
  %3 = stream.tensor.export %2 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
  util.return %3 : !hal.buffer_view
}

// -----// IR Dump Before PropagateTimepointsPass (iree-stream-propagate-timepoints) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %results, %result_timepoint = stream.async.execute with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}) -> !stream.resource<external>{%c65536} {
      %4 = stream.async.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg2[%c0 to %c65536 for %c65536], %arg3[%c0 to %c65536 for %c65536]) : (!stream.resource<external>{%c65536}, !stream.resource<external>{%c65536}) -> !stream.resource<external>{%c65536}
      stream.yield %4 : !stream.resource<external>{%c65536}
    } => !stream.timepoint
    %2 = stream.timepoint.await %result_timepoint => %results : !stream.resource<external>{%c65536}
    %3 = stream.tensor.export %2 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before MaterializeBuiltinsPass (iree-stream-materialize-builtins) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %2 = stream.timepoint.immediate => !stream.timepoint
    %3 = stream.timepoint.immediate => !stream.timepoint
    %4 = stream.timepoint.join max(%2, %3) => !stream.timepoint
    %results, %result_timepoint = stream.async.execute await(%4) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}) -> !stream.resource<external>{%c65536} {
      %7 = stream.async.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg2[%c0 to %c65536 for %c65536], %arg3[%c0 to %c65536 for %c65536]) : (!stream.resource<external>{%c65536}, !stream.resource<external>{%c65536}) -> !stream.resource<external>{%c65536}
      stream.yield %7 : !stream.resource<external>{%c65536}
    } => !stream.timepoint
    %5 = stream.timepoint.await %result_timepoint => %results : !stream.resource<external>{%c65536}
    %6 = stream.tensor.export %5 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %6 : !hal.buffer_view
  }
}


// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %c65536 = arith.constant 65536 : index
  %c0 = arith.constant 0 : index
  %c256 = arith.constant 256 : index
  %c128 = arith.constant 128 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
  %2 = stream.timepoint.immediate => !stream.timepoint
  %3 = stream.timepoint.immediate => !stream.timepoint
  %4 = stream.timepoint.join max(%2, %3) => !stream.timepoint
  %results, %result_timepoint = stream.async.execute await(%4) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}) -> !stream.resource<external>{%c65536} {
    %7 = stream.async.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg2[%c0 to %c65536 for %c65536], %arg3[%c0 to %c65536 for %c65536]) : (!stream.resource<external>{%c65536}, !stream.resource<external>{%c65536}) -> !stream.resource<external>{%c65536}
    stream.yield %7 : !stream.resource<external>{%c65536}
  } => !stream.timepoint
  %5 = stream.timepoint.await %result_timepoint => %results : !stream.resource<external>{%c65536}
  %6 = stream.tensor.export %5 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
  util.return %6 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %c65536 = arith.constant 65536 : index
  %c0 = arith.constant 0 : index
  %c256 = arith.constant 256 : index
  %c128 = arith.constant 128 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
  %results, %result_timepoint = stream.async.execute with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}) -> !stream.resource<external>{%c65536} {
    %4 = stream.async.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg2[%c0 to %c65536 for %c65536], %arg3[%c0 to %c65536 for %c65536]) : (!stream.resource<external>{%c65536}, !stream.resource<external>{%c65536}) -> !stream.resource<external>{%c65536}
    stream.yield %4 : !stream.resource<external>{%c65536}
  } => !stream.timepoint
  %2 = stream.timepoint.await %result_timepoint => %results : !stream.resource<external>{%c65536}
  %3 = stream.tensor.export %2 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
  util.return %3 : !hal.buffer_view
}

// -----// IR Dump Before SimplifyGlobalAccesses (iree-util-simplify-global-accesses) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %c65536 = arith.constant 65536 : index
  %c0 = arith.constant 0 : index
  %c256 = arith.constant 256 : index
  %c128 = arith.constant 128 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
  %results, %result_timepoint = stream.async.execute with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}) -> !stream.resource<external>{%c65536} {
    %4 = stream.async.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg2[%c0 to %c65536 for %c65536], %arg3[%c0 to %c65536 for %c65536]) : (!stream.resource<external>{%c65536}, !stream.resource<external>{%c65536}) -> !stream.resource<external>{%c65536}
    stream.yield %4 : !stream.resource<external>{%c65536}
  } => !stream.timepoint
  %2 = stream.timepoint.await %result_timepoint => %results : !stream.resource<external>{%c65536}
  %3 = stream.tensor.export %2 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
  util.return %3 : !hal.buffer_view
}

// -----// IR Dump Before ApplyPatterns (iree-util-apply-patterns) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %results, %result_timepoint = stream.async.execute with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}) -> !stream.resource<external>{%c65536} {
      %4 = stream.async.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg2[%c0 to %c65536 for %c65536], %arg3[%c0 to %c65536 for %c65536]) : (!stream.resource<external>{%c65536}, !stream.resource<external>{%c65536}) -> !stream.resource<external>{%c65536}
      stream.yield %4 : !stream.resource<external>{%c65536}
    } => !stream.timepoint
    %2 = stream.timepoint.await %result_timepoint => %results : !stream.resource<external>{%c65536}
    %3 = stream.tensor.export %2 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before FoldGlobals (iree-util-fold-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %results, %result_timepoint = stream.async.execute with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}) -> !stream.resource<external>{%c65536} {
      %4 = stream.async.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg2[%c0 to %c65536 for %c65536], %arg3[%c0 to %c65536 for %c65536]) : (!stream.resource<external>{%c65536}, !stream.resource<external>{%c65536}) -> !stream.resource<external>{%c65536}
      stream.yield %4 : !stream.resource<external>{%c65536}
    } => !stream.timepoint
    %2 = stream.timepoint.await %result_timepoint => %results : !stream.resource<external>{%c65536}
    %3 = stream.tensor.export %2 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before FuseGlobals (iree-util-fuse-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %results, %result_timepoint = stream.async.execute with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}) -> !stream.resource<external>{%c65536} {
      %4 = stream.async.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg2[%c0 to %c65536 for %c65536], %arg3[%c0 to %c65536 for %c65536]) : (!stream.resource<external>{%c65536}, !stream.resource<external>{%c65536}) -> !stream.resource<external>{%c65536}
      stream.yield %4 : !stream.resource<external>{%c65536}
    } => !stream.timepoint
    %2 = stream.timepoint.await %result_timepoint => %results : !stream.resource<external>{%c65536}
    %3 = stream.tensor.export %2 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before IPO (iree-util-ipo) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %results, %result_timepoint = stream.async.execute with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}) -> !stream.resource<external>{%c65536} {
      %4 = stream.async.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg2[%c0 to %c65536 for %c65536], %arg3[%c0 to %c65536 for %c65536]) : (!stream.resource<external>{%c65536}, !stream.resource<external>{%c65536}) -> !stream.resource<external>{%c65536}
      stream.yield %4 : !stream.resource<external>{%c65536}
    } => !stream.timepoint
    %2 = stream.timepoint.await %result_timepoint => %results : !stream.resource<external>{%c65536}
    %3 = stream.tensor.export %2 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before VerifyLoweringToAsyncPass (iree-stream-verify-lowering-to-async) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %results, %result_timepoint = stream.async.execute with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}) -> !stream.resource<external>{%c65536} {
      %4 = stream.async.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg2[%c0 to %c65536 for %c65536], %arg3[%c0 to %c65536 for %c65536]) : (!stream.resource<external>{%c65536}, !stream.resource<external>{%c65536}) -> !stream.resource<external>{%c65536}
      stream.yield %4 : !stream.resource<external>{%c65536}
    } => !stream.timepoint
    %2 = stream.timepoint.await %result_timepoint => %results : !stream.resource<external>{%c65536}
    %3 = stream.tensor.export %2 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before ScheduleAllocationPass (iree-stream-schedule-allocation) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %results, %result_timepoint = stream.async.execute with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}) -> !stream.resource<external>{%c65536} {
      %4 = stream.async.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg2[%c0 to %c65536 for %c65536], %arg3[%c0 to %c65536 for %c65536]) : (!stream.resource<external>{%c65536}, !stream.resource<external>{%c65536}) -> !stream.resource<external>{%c65536}
      stream.yield %4 : !stream.resource<external>{%c65536}
    } => !stream.timepoint
    %2 = stream.timepoint.await %result_timepoint => %results : !stream.resource<external>{%c65536}
    %3 = stream.tensor.export %2 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %3 : !hal.buffer_view
  }
}


// -----// IR Dump Before PackConstantsPass (iree-stream-pack-constants) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %c65536 = arith.constant 65536 : index
  %c0 = arith.constant 0 : index
  %c256 = arith.constant 256 : index
  %c128 = arith.constant 128 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
  %c0_0 = arith.constant 0 : index
  %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
  %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
    stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
      ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
      ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
      wo %arg4[%c0_0 for %c65536] : !stream.resource<external>{%c65536}
    }
  } => !stream.timepoint
  %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
  %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
  util.return %4 : !hal.buffer_view
}

// -----// IR Dump Before LayoutSlicesPass (iree-stream-layout-slices) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %c65536 = arith.constant 65536 : index
  %c0 = arith.constant 0 : index
  %c256 = arith.constant 256 : index
  %c128 = arith.constant 128 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
  %c0_0 = arith.constant 0 : index
  %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
  %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
    stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
      ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
      ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
      wo %arg4[%c0_0 for %c65536] : !stream.resource<external>{%c65536}
    }
  } => !stream.timepoint
  %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
  %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
  util.return %4 : !hal.buffer_view
}

// -----// IR Dump Before PropagateSubranges (iree-util-propagate-subranges) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %c0_0 = arith.constant 0 : index
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
      stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
        ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
        ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
        wo %arg4[%c0_0 for %c65536] : !stream.resource<external>{%c65536}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
    %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %c65536 = arith.constant 65536 : index
  %c0 = arith.constant 0 : index
  %c256 = arith.constant 256 : index
  %c128 = arith.constant 128 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
  %c0_0 = arith.constant 0 : index
  %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
  %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
    stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
      ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
      ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
      wo %arg4[%c0_0 for %c65536] : !stream.resource<external>{%c65536}
    }
  } => !stream.timepoint
  %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
  %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
  util.return %4 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %c65536 = arith.constant 65536 : index
  %c0 = arith.constant 0 : index
  %c256 = arith.constant 256 : index
  %c128 = arith.constant 128 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
  %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
  %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
    stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
      ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
      ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
      wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
    }
  } => !stream.timepoint
  %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
  %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
  util.return %4 : !hal.buffer_view
}

// -----// IR Dump Before SimplifyGlobalAccesses (iree-util-simplify-global-accesses) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %c65536 = arith.constant 65536 : index
  %c0 = arith.constant 0 : index
  %c256 = arith.constant 256 : index
  %c128 = arith.constant 128 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
  %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
  %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
    stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
      ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
      ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
      wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
    }
  } => !stream.timepoint
  %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
  %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
  util.return %4 : !hal.buffer_view
}

// -----// IR Dump Before ApplyPatterns (iree-util-apply-patterns) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
      stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
        ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
        ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
        wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
    %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before FoldGlobals (iree-util-fold-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
      stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
        ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
        ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
        wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
    %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before FuseGlobals (iree-util-fuse-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
      stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
        ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
        ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
        wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
    %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before IPO (iree-util-ipo) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
      stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
        ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
        ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
        wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
    %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before VerifyLoweringToCmdPass (iree-stream-verify-lowering-to-cmd) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
      stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
        ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
        ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
        wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
    %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %c65536 = arith.constant 65536 : index
  %c0 = arith.constant 0 : index
  %c256 = arith.constant 256 : index
  %c128 = arith.constant 128 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
  %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
  %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
    stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
      ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
      ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
      wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
    }
  } => !stream.timepoint
  %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
  %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
  util.return %4 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %c65536 = arith.constant 65536 : index
  %c0 = arith.constant 0 : index
  %c256 = arith.constant 256 : index
  %c128 = arith.constant 128 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
  %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
  %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
    stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
      ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
      ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
      wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
    }
  } => !stream.timepoint
  %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
  %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
  util.return %4 : !hal.buffer_view
}

// -----// IR Dump Before SimplifyGlobalAccesses (iree-util-simplify-global-accesses) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %c65536 = arith.constant 65536 : index
  %c0 = arith.constant 0 : index
  %c256 = arith.constant 256 : index
  %c128 = arith.constant 128 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
  %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
  %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
    stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
      ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
      ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
      wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
    }
  } => !stream.timepoint
  %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
  %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
  util.return %4 : !hal.buffer_view
}

// -----// IR Dump Before ApplyPatterns (iree-util-apply-patterns) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
      stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
        ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
        ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
        wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
    %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before FoldGlobals (iree-util-fold-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
      stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
        ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
        ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
        wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
    %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before FuseGlobals (iree-util-fuse-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
      stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
        ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
        ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
        wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
    %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before IPO (iree-util-ipo) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
      stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
        ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
        ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
        wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
    %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before SCFToControlFlow (convert-scf-to-cf) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %c65536 = arith.constant 65536 : index
  %c0 = arith.constant 0 : index
  %c256 = arith.constant 256 : index
  %c128 = arith.constant 128 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
  %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
  %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
    stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
      ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
      ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
      wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
    }
  } => !stream.timepoint
  %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
  %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
  util.return %4 : !hal.buffer_view
}

// -----// IR Dump Before FixedPointIterator (iree-util-fixed-point-iterator) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
      stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
        ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
        ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
        wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
    %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %c65536 = arith.constant 65536 : index
  %c0 = arith.constant 0 : index
  %c256 = arith.constant 256 : index
  %c128 = arith.constant 128 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
  %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
  %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
    stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
      ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
      ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
      wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
    }
  } => !stream.timepoint
  %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
  %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
  util.return %4 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %c65536 = arith.constant 65536 : index
  %c0 = arith.constant 0 : index
  %c256 = arith.constant 256 : index
  %c128 = arith.constant 128 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
  %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
  %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
    stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
      ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
      ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
      wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
    }
  } => !stream.timepoint
  %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
  %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
  util.return %4 : !hal.buffer_view
}

// -----// IR Dump Before SimplifyGlobalAccesses (iree-util-simplify-global-accesses) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %c65536 = arith.constant 65536 : index
  %c0 = arith.constant 0 : index
  %c256 = arith.constant 256 : index
  %c128 = arith.constant 128 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
  %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
  %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
    stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
      ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
      ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
      wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
    }
  } => !stream.timepoint
  %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
  %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
  util.return %4 : !hal.buffer_view
}

// -----// IR Dump Before ApplyPatterns (iree-util-apply-patterns) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie], iree.fixedpoint.iteration = 0 : index} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
      stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
        ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
        ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
        wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
    %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before FoldGlobals (iree-util-fold-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie], iree.fixedpoint.iteration = 0 : index} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
      stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
        ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
        ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
        wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
    %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before FuseGlobals (iree-util-fuse-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie], iree.fixedpoint.iteration = 0 : index} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
      stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
        ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
        ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
        wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
    %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before IPO (iree-util-ipo) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie], iree.fixedpoint.iteration = 0 : index} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
      stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
        ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
        ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
        wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
    %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before ElideTimepointsPass (iree-stream-elide-timepoints) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie], iree.fixedpoint.iteration = 0 : index} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
      stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
        ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
        ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
        wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
    %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before FuseDispatchBindingsPass (iree-stream-fuse-dispatch-bindings) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
      stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
        ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
        ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
        wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
    %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before AnnotateDispatchArgumentsPass (iree-stream-annotate-dispatch-arguments) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding, %arg1: !stream.binding, %arg2: !stream.binding, %arg3: index, %arg4: index, %arg5: index) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%arg3] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%arg4] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%arg5] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
    %c0_0 = arith.constant 0 : index
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
      stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%c0, %c0, %c0 : index, index, index) {
        ro %arg2[%c0_0 for %c65536] : !stream.resource<external>{%c65536},
        ro %arg3[%c0_0 for %c65536] : !stream.resource<external>{%c65536},
        wo %arg4[%c0_0 for %c65536] : !stream.resource<external>{%c65536}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
    %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before PackDispatchOperandsPass (iree-stream-pack-dispatch-operands) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding {stream.alignment = 64 : index}, %arg1: !stream.binding {stream.alignment = 64 : index}, %arg2: !stream.binding {stream.alignment = 64 : index}, %arg3: index {stream.values = [0 : index]}, %arg4: index {stream.values = [0 : index]}, %arg5: index {stream.values = [0 : index]}) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%arg3] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%arg4] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%arg5] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
    %c0_0 = arith.constant 0 : index
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
      stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%c0, %c0, %c0 : index, index, index) {
        ro %arg2[%c0_0 for %c65536] : !stream.resource<external>{%c65536},
        ro %arg3[%c0_0 for %c65536] : !stream.resource<external>{%c65536},
        wo %arg4[%c0_0 for %c65536] : !stream.resource<external>{%c65536}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
    %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %c65536 = arith.constant 65536 : index
  %c0 = arith.constant 0 : index
  %c256 = arith.constant 256 : index
  %c128 = arith.constant 128 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
  %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
  %c0_0 = arith.constant 0 : index
  %c0_i64 = arith.constant 0 : i64
  %c0_i32 = arith.constant 0 : i32
  %c32_i64 = arith.constant 32 : i64
  %c0_i64_1 = arith.constant 0 : i64
  %c0_i32_2 = arith.constant 0 : i32
  %c0_i64_3 = arith.constant 0 : i64
  %c0_i32_4 = arith.constant 0 : i32
  %c32_i64_5 = arith.constant 32 : i64
  %c0_i64_6 = arith.constant 0 : i64
  %c0_i32_7 = arith.constant 0 : i32
  %c0_i64_8 = arith.constant 0 : i64
  %c0_i32_9 = arith.constant 0 : i32
  %c32_i64_10 = arith.constant 32 : i64
  %c0_i64_11 = arith.constant 0 : i64
  %c0_i32_12 = arith.constant 0 : i32
  %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
    stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%c0_i32, %c0_i32_2, %c0_i32_4, %c0_i32_7, %c0_i32_9, %c0_i32_12 : i32, i32, i32, i32, i32, i32) {
      ro %arg2[%c0_0 for %c65536] : !stream.resource<external>{%c65536},
      ro %arg3[%c0_0 for %c65536] : !stream.resource<external>{%c65536},
      wo %arg4[%c0_0 for %c65536] : !stream.resource<external>{%c65536}
    }
  } => !stream.timepoint
  %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
  %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
  util.return %4 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %c0_i32 = arith.constant 0 : i32
  %c65536 = arith.constant 65536 : index
  %c0 = arith.constant 0 : index
  %c256 = arith.constant 256 : index
  %c128 = arith.constant 128 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
  %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
  %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
    stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%c0_i32, %c0_i32, %c0_i32, %c0_i32, %c0_i32, %c0_i32 : i32, i32, i32, i32, i32, i32) {
      ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
      ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
      wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
    }
  } => !stream.timepoint
  %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
  %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
  util.return %4 : !hal.buffer_view
}

// -----// IR Dump Before SimplifyGlobalAccesses (iree-util-simplify-global-accesses) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %c0_i32 = arith.constant 0 : i32
  %c65536 = arith.constant 65536 : index
  %c0 = arith.constant 0 : index
  %c256 = arith.constant 256 : index
  %c128 = arith.constant 128 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
  %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
  %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
    stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%c0_i32, %c0_i32, %c0_i32, %c0_i32, %c0_i32, %c0_i32 : i32, i32, i32, i32, i32, i32) {
      ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
      ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
      wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
    }
  } => !stream.timepoint
  %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
  %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
  util.return %4 : !hal.buffer_view
}

// -----// IR Dump Before ApplyPatterns (iree-util-apply-patterns) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding {stream.alignment = 64 : index}, %arg1: !stream.binding {stream.alignment = 64 : index}, %arg2: !stream.binding {stream.alignment = 64 : index}, %arg3: i32, %arg4: i32, %arg5: i32, %arg6: i32, %arg7: i32, %arg8: i32) {
        %0 = arith.extui %arg3 : i32 to i64
        %1 = arith.extui %arg4 : i32 to i64
        %c32_i64 = arith.constant 32 : i64
        %2 = arith.shli %1, %c32_i64 : i64
        %3 = arith.ori %0, %2 : i64
        %4 = arith.index_castui %3 {stream.values = [0 : index]} : i64 to index
        %5 = arith.extui %arg5 : i32 to i64
        %6 = arith.extui %arg6 : i32 to i64
        %c32_i64_0 = arith.constant 32 : i64
        %7 = arith.shli %6, %c32_i64_0 : i64
        %8 = arith.ori %5, %7 : i64
        %9 = arith.index_castui %8 {stream.values = [0 : index]} : i64 to index
        %10 = arith.extui %arg7 : i32 to i64
        %11 = arith.extui %arg8 : i32 to i64
        %c32_i64_1 = arith.constant 32 : i64
        %12 = arith.shli %11, %c32_i64_1 : i64
        %13 = arith.ori %10, %12 : i64
        %14 = arith.index_castui %13 {stream.values = [0 : index]} : i64 to index
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %15 = stream.binding.subspan %arg0[%4] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %16 = stream.binding.subspan %arg1[%9] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %17 = stream.binding.subspan %arg2[%14] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %18 = flow.dispatch.tensor.load %15, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %19 = flow.dispatch.tensor.load %16, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %20 = tensor.empty() : tensor<128x128xf32>
        %21 = linalg.fill ins(%cst : f32) outs(%20 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %22 = linalg.matmul ins(%18, %19 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%21 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %22, %17, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c0_i32 = arith.constant 0 : i32
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
      stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%c0_i32, %c0_i32, %c0_i32, %c0_i32, %c0_i32, %c0_i32 : i32, i32, i32, i32, i32, i32) {
        ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
        ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
        wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
    %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before FoldGlobals (iree-util-fold-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding {stream.alignment = 64 : index}, %arg1: !stream.binding {stream.alignment = 64 : index}, %arg2: !stream.binding {stream.alignment = 64 : index}, %arg3: i32, %arg4: i32, %arg5: i32, %arg6: i32, %arg7: i32, %arg8: i32) {
        %cst = arith.constant 0.000000e+00 : f32
        %c32_i64 = arith.constant 32 : i64
        %0 = arith.extui %arg3 : i32 to i64
        %1 = arith.extui %arg4 : i32 to i64
        %2 = arith.shli %1, %c32_i64 : i64
        %3 = arith.ori %0, %2 : i64
        %4 = arith.index_castui %3 {stream.values = [0 : index]} : i64 to index
        %5 = arith.extui %arg5 : i32 to i64
        %6 = arith.extui %arg6 : i32 to i64
        %7 = arith.shli %6, %c32_i64 : i64
        %8 = arith.ori %5, %7 : i64
        %9 = arith.index_castui %8 {stream.values = [0 : index]} : i64 to index
        %10 = arith.extui %arg7 : i32 to i64
        %11 = arith.extui %arg8 : i32 to i64
        %12 = arith.shli %11, %c32_i64 : i64
        %13 = arith.ori %10, %12 : i64
        %14 = arith.index_castui %13 {stream.values = [0 : index]} : i64 to index
        %15 = stream.binding.subspan %arg0[%4] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %16 = stream.binding.subspan %arg1[%9] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %17 = stream.binding.subspan %arg2[%14] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %18 = flow.dispatch.tensor.load %15, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %19 = flow.dispatch.tensor.load %16, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %20 = tensor.empty() : tensor<128x128xf32>
        %21 = linalg.fill ins(%cst : f32) outs(%20 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %22 = linalg.matmul ins(%18, %19 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%21 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %22, %17, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c0_i32 = arith.constant 0 : i32
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
      stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%c0_i32, %c0_i32, %c0_i32, %c0_i32, %c0_i32, %c0_i32 : i32, i32, i32, i32, i32, i32) {
        ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
        ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
        wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
    %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before FuseGlobals (iree-util-fuse-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding {stream.alignment = 64 : index}, %arg1: !stream.binding {stream.alignment = 64 : index}, %arg2: !stream.binding {stream.alignment = 64 : index}, %arg3: i32, %arg4: i32, %arg5: i32, %arg6: i32, %arg7: i32, %arg8: i32) {
        %cst = arith.constant 0.000000e+00 : f32
        %c32_i64 = arith.constant 32 : i64
        %0 = arith.extui %arg3 : i32 to i64
        %1 = arith.extui %arg4 : i32 to i64
        %2 = arith.shli %1, %c32_i64 : i64
        %3 = arith.ori %0, %2 : i64
        %4 = arith.index_castui %3 {stream.values = [0 : index]} : i64 to index
        %5 = arith.extui %arg5 : i32 to i64
        %6 = arith.extui %arg6 : i32 to i64
        %7 = arith.shli %6, %c32_i64 : i64
        %8 = arith.ori %5, %7 : i64
        %9 = arith.index_castui %8 {stream.values = [0 : index]} : i64 to index
        %10 = arith.extui %arg7 : i32 to i64
        %11 = arith.extui %arg8 : i32 to i64
        %12 = arith.shli %11, %c32_i64 : i64
        %13 = arith.ori %10, %12 : i64
        %14 = arith.index_castui %13 {stream.values = [0 : index]} : i64 to index
        %15 = stream.binding.subspan %arg0[%4] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %16 = stream.binding.subspan %arg1[%9] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %17 = stream.binding.subspan %arg2[%14] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %18 = flow.dispatch.tensor.load %15, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %19 = flow.dispatch.tensor.load %16, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %20 = tensor.empty() : tensor<128x128xf32>
        %21 = linalg.fill ins(%cst : f32) outs(%20 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %22 = linalg.matmul ins(%18, %19 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%21 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %22, %17, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c0_i32 = arith.constant 0 : i32
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
      stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%c0_i32, %c0_i32, %c0_i32, %c0_i32, %c0_i32, %c0_i32 : i32, i32, i32, i32, i32, i32) {
        ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
        ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
        wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
    %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before IPO (iree-util-ipo) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding {stream.alignment = 64 : index}, %arg1: !stream.binding {stream.alignment = 64 : index}, %arg2: !stream.binding {stream.alignment = 64 : index}, %arg3: i32, %arg4: i32, %arg5: i32, %arg6: i32, %arg7: i32, %arg8: i32) {
        %cst = arith.constant 0.000000e+00 : f32
        %c32_i64 = arith.constant 32 : i64
        %0 = arith.extui %arg3 : i32 to i64
        %1 = arith.extui %arg4 : i32 to i64
        %2 = arith.shli %1, %c32_i64 : i64
        %3 = arith.ori %0, %2 : i64
        %4 = arith.index_castui %3 {stream.values = [0 : index]} : i64 to index
        %5 = arith.extui %arg5 : i32 to i64
        %6 = arith.extui %arg6 : i32 to i64
        %7 = arith.shli %6, %c32_i64 : i64
        %8 = arith.ori %5, %7 : i64
        %9 = arith.index_castui %8 {stream.values = [0 : index]} : i64 to index
        %10 = arith.extui %arg7 : i32 to i64
        %11 = arith.extui %arg8 : i32 to i64
        %12 = arith.shli %11, %c32_i64 : i64
        %13 = arith.ori %10, %12 : i64
        %14 = arith.index_castui %13 {stream.values = [0 : index]} : i64 to index
        %15 = stream.binding.subspan %arg0[%4] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %16 = stream.binding.subspan %arg1[%9] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %17 = stream.binding.subspan %arg2[%14] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %18 = flow.dispatch.tensor.load %15, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %19 = flow.dispatch.tensor.load %16, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %20 = tensor.empty() : tensor<128x128xf32>
        %21 = linalg.fill ins(%cst : f32) outs(%20 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %22 = linalg.matmul ins(%18, %19 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%21 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %22, %17, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c0_i32 = arith.constant 0 : i32
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
      stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%c0_i32, %c0_i32, %c0_i32, %c0_i32, %c0_i32, %c0_i32 : i32, i32, i32, i32, i32, i32) {
        ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
        ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
        wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
    %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before FoldUniformOperandsPass (iree-stream-fold-uniform-operands) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding {stream.alignment = 64 : index}, %arg1: !stream.binding {stream.alignment = 64 : index}, %arg2: !stream.binding {stream.alignment = 64 : index}, %arg3: i32, %arg4: i32, %arg5: i32, %arg6: i32, %arg7: i32, %arg8: i32) {
        %cst = arith.constant 0.000000e+00 : f32
        %c32_i64 = arith.constant 32 : i64
        %0 = arith.extui %arg3 : i32 to i64
        %1 = arith.extui %arg4 : i32 to i64
        %2 = arith.shli %1, %c32_i64 : i64
        %3 = arith.ori %0, %2 : i64
        %4 = arith.index_castui %3 {stream.values = [0 : index]} : i64 to index
        %5 = arith.extui %arg5 : i32 to i64
        %6 = arith.extui %arg6 : i32 to i64
        %7 = arith.shli %6, %c32_i64 : i64
        %8 = arith.ori %5, %7 : i64
        %9 = arith.index_castui %8 {stream.values = [0 : index]} : i64 to index
        %10 = arith.extui %arg7 : i32 to i64
        %11 = arith.extui %arg8 : i32 to i64
        %12 = arith.shli %11, %c32_i64 : i64
        %13 = arith.ori %10, %12 : i64
        %14 = arith.index_castui %13 {stream.values = [0 : index]} : i64 to index
        %15 = stream.binding.subspan %arg0[%4] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %16 = stream.binding.subspan %arg1[%9] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %17 = stream.binding.subspan %arg2[%14] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %18 = flow.dispatch.tensor.load %15, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %19 = flow.dispatch.tensor.load %16, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %20 = tensor.empty() : tensor<128x128xf32>
        %21 = linalg.fill ins(%cst : f32) outs(%20 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %22 = linalg.matmul ins(%18, %19 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%21 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %22, %17, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c0_i32 = arith.constant 0 : i32
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
      stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%c0_i32, %c0_i32, %c0_i32, %c0_i32, %c0_i32, %c0_i32 : i32, i32, i32, i32, i32, i32) {
        ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
        ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
        wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
    %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %c0_i32 = arith.constant 0 : i32
  %c65536 = arith.constant 65536 : index
  %c0 = arith.constant 0 : index
  %c256 = arith.constant 256 : index
  %c128 = arith.constant 128 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
  %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
  %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
    stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
      ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
      ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
      wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
    }
  } => !stream.timepoint
  %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
  %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
  util.return %4 : !hal.buffer_view
}

// -----// IR Dump Before CSE (cse) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %c65536 = arith.constant 65536 : index
  %c0 = arith.constant 0 : index
  %c256 = arith.constant 256 : index
  %c128 = arith.constant 128 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
  %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
  %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
    stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
      ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
      ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
      wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
    }
  } => !stream.timepoint
  %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
  %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
  util.return %4 : !hal.buffer_view
}

// -----// IR Dump Before SimplifyGlobalAccesses (iree-util-simplify-global-accesses) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %c65536 = arith.constant 65536 : index
  %c0 = arith.constant 0 : index
  %c256 = arith.constant 256 : index
  %c128 = arith.constant 128 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
  %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
  %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
    stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
      ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
      ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
      wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
    }
  } => !stream.timepoint
  %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
  %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
  util.return %4 : !hal.buffer_view
}

// -----// IR Dump Before ApplyPatterns (iree-util-apply-patterns) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding {stream.alignment = 64 : index}, %arg1: !stream.binding {stream.alignment = 64 : index}, %arg2: !stream.binding {stream.alignment = 64 : index}) {
        %c0_i32 = arith.constant 0 : i32
        %cst = arith.constant 0.000000e+00 : f32
        %c32_i64 = arith.constant 32 : i64
        %0 = arith.extui %c0_i32 : i32 to i64
        %1 = arith.extui %c0_i32 : i32 to i64
        %2 = arith.shli %1, %c32_i64 : i64
        %3 = arith.ori %0, %2 : i64
        %4 = arith.index_castui %3 {stream.values = [0 : index]} : i64 to index
        %5 = arith.extui %c0_i32 : i32 to i64
        %6 = arith.extui %c0_i32 : i32 to i64
        %7 = arith.shli %6, %c32_i64 : i64
        %8 = arith.ori %5, %7 : i64
        %9 = arith.index_castui %8 {stream.values = [0 : index]} : i64 to index
        %10 = arith.extui %c0_i32 : i32 to i64
        %11 = arith.extui %c0_i32 : i32 to i64
        %12 = arith.shli %11, %c32_i64 : i64
        %13 = arith.ori %10, %12 : i64
        %14 = arith.index_castui %13 {stream.values = [0 : index]} : i64 to index
        %15 = stream.binding.subspan %arg0[%4] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %16 = stream.binding.subspan %arg1[%9] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %17 = stream.binding.subspan %arg2[%14] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %18 = flow.dispatch.tensor.load %15, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %19 = flow.dispatch.tensor.load %16, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %20 = tensor.empty() : tensor<128x128xf32>
        %21 = linalg.fill ins(%cst : f32) outs(%20 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %22 = linalg.matmul ins(%18, %19 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%21 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %22, %17, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
      stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
        ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
        ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
        wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
    %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before FoldGlobals (iree-util-fold-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding {stream.alignment = 64 : index}, %arg1: !stream.binding {stream.alignment = 64 : index}, %arg2: !stream.binding {stream.alignment = 64 : index}) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
      stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
        ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
        ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
        wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
    %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before FuseGlobals (iree-util-fuse-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding {stream.alignment = 64 : index}, %arg1: !stream.binding {stream.alignment = 64 : index}, %arg2: !stream.binding {stream.alignment = 64 : index}) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
      stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
        ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
        ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
        wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
    %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before IPO (iree-util-ipo) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding {stream.alignment = 64 : index}, %arg1: !stream.binding {stream.alignment = 64 : index}, %arg2: !stream.binding {stream.alignment = 64 : index}) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
      stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
        ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
        ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
        wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
    %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before SymbolDCE (symbol-dce) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding {stream.alignment = 64 : index}, %arg1: !stream.binding {stream.alignment = 64 : index}, %arg2: !stream.binding {stream.alignment = 64 : index}) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
      stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
        ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
        ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
        wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
    %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before CSE (cse) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding {stream.alignment = 64 : index}, %arg1: !stream.binding {stream.alignment = 64 : index}, %arg2: !stream.binding {stream.alignment = 64 : index}) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
      stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
        ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
        ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
        wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
    %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding {stream.alignment = 64 : index}, %arg1: !stream.binding {stream.alignment = 64 : index}, %arg2: !stream.binding {stream.alignment = 64 : index}) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
      stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
        ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
        ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
        wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
    %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before CSE (cse) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding {stream.alignment = 64 : index}, %arg1: !stream.binding {stream.alignment = 64 : index}, %arg2: !stream.binding {stream.alignment = 64 : index}) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
      stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
        ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
        ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
        wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
    %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before SimplifyGlobalAccesses (iree-util-simplify-global-accesses) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %c65536 = arith.constant 65536 : index
  %c0 = arith.constant 0 : index
  %c256 = arith.constant 256 : index
  %c128 = arith.constant 128 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
  %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
  %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
    stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
      ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
      ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
      wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
    }
  } => !stream.timepoint
  %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
  %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
  util.return %4 : !hal.buffer_view
}

// -----// IR Dump Before ApplyPatterns (iree-util-apply-patterns) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding {stream.alignment = 64 : index}, %arg1: !stream.binding {stream.alignment = 64 : index}, %arg2: !stream.binding {stream.alignment = 64 : index}) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
      stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
        ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
        ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
        wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
    %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before FoldGlobals (iree-util-fold-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding {stream.alignment = 64 : index}, %arg1: !stream.binding {stream.alignment = 64 : index}, %arg2: !stream.binding {stream.alignment = 64 : index}) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
      stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
        ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
        ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
        wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
    %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before FuseGlobals (iree-util-fuse-globals) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding {stream.alignment = 64 : index}, %arg1: !stream.binding {stream.alignment = 64 : index}, %arg2: !stream.binding {stream.alignment = 64 : index}) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
      stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
        ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
        ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
        wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
    %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before AssignTargetDevicesPass (iree-hal-assign-target-devices) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding {stream.alignment = 64 : index}, %arg1: !stream.binding {stream.alignment = 64 : index}, %arg2: !stream.binding {stream.alignment = 64 : index}) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
      stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
        ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
        ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
        wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
    %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before VerifyTargetEnvironmentPass (iree-hal-verify-target-environment) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding {stream.alignment = 64 : index}, %arg1: !stream.binding {stream.alignment = 64 : index}, %arg2: !stream.binding {stream.alignment = 64 : index}) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
      stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
        ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
        ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
        wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
    %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before MaterializeInterfacesPass (iree-hal-materialize-interfaces) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  stream.executable private @matmul_i8_i32_dispatch_0 {
    stream.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 workgroups() -> (index, index, index) {
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      stream.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32(%arg0: !stream.binding {stream.alignment = 64 : index}, %arg1: !stream.binding {stream.alignment = 64 : index}, %arg2: !stream.binding {stream.alignment = 64 : index}) {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = stream.binding.subspan %arg1[%c0] : !stream.binding -> !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = stream.binding.subspan %arg2[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
      stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
        ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
        ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
        wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
    %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before PruneExecutablesPass (iree-hal-prune-executables) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#pipeline_layout = #hal.pipeline.layout<push_constants = 0, sets = [<0, bindings = [<0, storage_buffer, ReadOnly>, <1, storage_buffer, ReadOnly>, <2, storage_buffer>]>]>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  hal.executable private @matmul_i8_i32_dispatch_0 {
    hal.executable.variant public @amdaie_xclbin_fb target(#executable_target_amdaie_xclbin_fb) {
      hal.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 ordinal(0) layout(#pipeline_layout) attributes {hal.interface.bindings = [#hal.interface.binding<0, 0>, #hal.interface.binding<0, 1>, #hal.interface.binding<0, 2>]} {
      ^bb0(%arg0: !hal.device):
        %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
        hal.return %x, %y, %z : index, index, index
      }
      builtin.module {
        func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() {
          %cst = arith.constant 0.000000e+00 : f32
          %c0 = arith.constant 0 : index
          %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
          %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
          %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
          %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
          %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
          %5 = tensor.empty() : tensor<128x128xf32>
          %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
          %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
          flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
          return
        }
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
      stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@amdaie_xclbin_fb::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
        ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
        ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
        wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
    %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before DumpExecutableSourcesPass (iree-hal-dump-executable-sources) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#pipeline_layout = #hal.pipeline.layout<push_constants = 0, sets = [<0, bindings = [<0, storage_buffer, ReadOnly>, <1, storage_buffer, ReadOnly>, <2, storage_buffer>]>]>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  hal.executable private @matmul_i8_i32_dispatch_0 {
    hal.executable.variant public @amdaie_xclbin_fb target(#executable_target_amdaie_xclbin_fb) {
      hal.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 ordinal(0) layout(#pipeline_layout) attributes {hal.interface.bindings = [#hal.interface.binding<0, 0>, #hal.interface.binding<0, 1>, #hal.interface.binding<0, 2>]} {
      ^bb0(%arg0: !hal.device):
        %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
        hal.return %x, %y, %z : index, index, index
      }
      builtin.module {
        func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() {
          %cst = arith.constant 0.000000e+00 : f32
          %c0 = arith.constant 0 : index
          %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
          %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
          %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
          %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
          %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
          %5 = tensor.empty() : tensor<128x128xf32>
          %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
          %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
          flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
          return
        }
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
      stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@amdaie_xclbin_fb::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
        ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
        ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
        wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
    %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before ConfigureExecutablesPass (iree-hal-configure-executables) //----- //
hal.executable private @matmul_i8_i32_dispatch_0 {
  hal.executable.variant public @amdaie_xclbin_fb target(<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>) {
    hal.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 ordinal(0) layout(#hal.pipeline.layout<push_constants = 0, sets = [<0, bindings = [<0, storage_buffer, ReadOnly>, <1, storage_buffer, ReadOnly>, <2, storage_buffer>]>]>) attributes {hal.interface.bindings = [#hal.interface.binding<0, 0>, #hal.interface.binding<0, 1>, #hal.interface.binding<0, 2>]} {
    ^bb0(%arg0: !hal.device):
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      hal.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
}

// -----// IR Dump Before ConfigureTargetExecutableVariantsPass (iree-hal-configure-target-executable-variants) //----- //
hal.executable.variant public @amdaie_xclbin_fb target(<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>) {
  hal.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 ordinal(0) layout(#hal.pipeline.layout<push_constants = 0, sets = [<0, bindings = [<0, storage_buffer, ReadOnly>, <1, storage_buffer, ReadOnly>, <2, storage_buffer>]>]>) attributes {hal.interface.bindings = [#hal.interface.binding<0, 0>, #hal.interface.binding<0, 1>, #hal.interface.binding<0, 2>]} {
  ^bb0(%arg0: !hal.device):
    %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
    hal.return %x, %y, %z : index, index, index
  }
  builtin.module {
    func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() {
      %cst = arith.constant 0.000000e+00 : f32
      %c0 = arith.constant 0 : index
      %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
      %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
      %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
      %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
      %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
      %5 = tensor.empty() : tensor<128x128xf32>
      %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
      %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
      flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
      return
    }
  }
}

// -----// IR Dump Before CPUMaterializeUpperBoundTileSize (iree-codegen-cpu-materialize-upper-bound-tile-size) //----- //
util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
  %c65536 = arith.constant 65536 : index
  %c0 = arith.constant 0 : index
  %c256 = arith.constant 256 : index
  %c128 = arith.constant 128 : index
  %element_type_bf16 = hal.element_type<bf16> : i32
  %dense_row_major = hal.encoding_type<dense_row_major> : i32
  hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
  %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
  hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
  %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
  %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
  %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
    stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@amdaie_xclbin_fb::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
      ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
      ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
      wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
    }
  } => !stream.timepoint
  %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
  %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
  util.return %4 : !hal.buffer_view
}

// -----// IR Dump Before DumpExecutableSourcesPass (iree-hal-dump-executable-sources) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#pipeline_layout = #hal.pipeline.layout<push_constants = 0, sets = [<0, bindings = [<0, storage_buffer, ReadOnly>, <1, storage_buffer, ReadOnly>, <2, storage_buffer>]>]>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  hal.executable private @matmul_i8_i32_dispatch_0 {
    hal.executable.variant public @amdaie_xclbin_fb target(#executable_target_amdaie_xclbin_fb) {
      hal.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 ordinal(0) layout(#pipeline_layout) attributes {hal.interface.bindings = [#hal.interface.binding<0, 0>, #hal.interface.binding<0, 1>, #hal.interface.binding<0, 2>]} {
      ^bb0(%arg0: !hal.device):
        %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
        hal.return %x, %y, %z : index, index, index
      }
      builtin.module {
        func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() {
          %cst = arith.constant 0.000000e+00 : f32
          %c0 = arith.constant 0 : index
          %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
          %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
          %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
          %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
          %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
          %5 = tensor.empty() : tensor<128x128xf32>
          %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
          %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
          flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
          return
        }
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
      stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@amdaie_xclbin_fb::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
        ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
        ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
        wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
    %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before DumpExecutableBenchmarksPass (iree-hal-dump-executable-benchmarks) //----- //
#executable_target_amdaie_xclbin_fb = #hal.executable.target<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>
#pipeline_layout = #hal.pipeline.layout<push_constants = 0, sets = [<0, bindings = [<0, storage_buffer, ReadOnly>, <1, storage_buffer, ReadOnly>, <2, storage_buffer>]>]>
#device_target_amd_aie = #hal.device.target<"amd-aie", [#executable_target_amdaie_xclbin_fb]>
module attributes {hal.device.targets = [#device_target_amd_aie]} {
  hal.executable private @matmul_i8_i32_dispatch_0 {
    hal.executable.variant public @amdaie_xclbin_fb target(#executable_target_amdaie_xclbin_fb) {
      hal.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 ordinal(0) layout(#pipeline_layout) attributes {hal.interface.bindings = [#hal.interface.binding<0, 0>, #hal.interface.binding<0, 1>, #hal.interface.binding<0, 2>]} {
      ^bb0(%arg0: !hal.device):
        %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
        hal.return %x, %y, %z : index, index, index
      }
      builtin.module {
        func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() {
          %cst = arith.constant 0.000000e+00 : f32
          %c0 = arith.constant 0 : index
          %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
          %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
          %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
          %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
          %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
          %5 = tensor.empty() : tensor<128x128xf32>
          %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
          %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
          flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
          return
        }
      }
    }
  }
  util.func public @matmul_i8_i32(%arg0: !hal.buffer_view, %arg1: !hal.buffer_view) -> !hal.buffer_view attributes {iree.abi.stub, iree.reflection = {iree.abi.declaration = "sync func @matmul_i8_i32(%input0: tensor<128x256xbf16>, %input1: tensor<256x128xbf16>) -> (%output0: tensor<128x128xf32>)"}} {
    %c65536 = arith.constant 65536 : index
    %c0 = arith.constant 0 : index
    %c256 = arith.constant 256 : index
    %c128 = arith.constant 128 : index
    %element_type_bf16 = hal.element_type<bf16> : i32
    %dense_row_major = hal.encoding_type<dense_row_major> : i32
    hal.buffer_view.assert<%arg0 : !hal.buffer_view> message("input0") shape([%c128, %c256]) type(%element_type_bf16) encoding(%dense_row_major)
    %0 = stream.tensor.import %arg0 : !hal.buffer_view -> tensor<128x256xbf16> in !stream.resource<external>{%c65536}
    hal.buffer_view.assert<%arg1 : !hal.buffer_view> message("input1") shape([%c256, %c128]) type(%element_type_bf16) encoding(%dense_row_major)
    %1 = stream.tensor.import %arg1 : !hal.buffer_view -> tensor<256x128xbf16> in !stream.resource<external>{%c65536}
    %result, %result_timepoint = stream.resource.alloca uninitialized : !stream.resource<external>{%c65536} => !stream.timepoint
    %2 = stream.cmd.execute await(%result_timepoint) => with(%0 as %arg2: !stream.resource<external>{%c65536}, %1 as %arg3: !stream.resource<external>{%c65536}, %result as %arg4: !stream.resource<external>{%c65536}) {
      stream.cmd.dispatch @matmul_i8_i32_dispatch_0::@amdaie_xclbin_fb::@matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 {
        ro %arg2[%c0 for %c65536] : !stream.resource<external>{%c65536},
        ro %arg3[%c0 for %c65536] : !stream.resource<external>{%c65536},
        wo %arg4[%c0 for %c65536] : !stream.resource<external>{%c65536}
      }
    } => !stream.timepoint
    %3 = stream.timepoint.await %2 => %result : !stream.resource<external>{%c65536}
    %4 = stream.tensor.export %3 : tensor<128x128xf32> in !stream.resource<external>{%c65536} -> !hal.buffer_view
    util.return %4 : !hal.buffer_view
  }
}


// -----// IR Dump Before TranslateExecutablesPass (iree-hal-translate-executables) //----- //
hal.executable private @matmul_i8_i32_dispatch_0 {
  hal.executable.variant public @amdaie_xclbin_fb target(<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>) {
    hal.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 ordinal(0) layout(#hal.pipeline.layout<push_constants = 0, sets = [<0, bindings = [<0, storage_buffer, ReadOnly>, <1, storage_buffer, ReadOnly>, <2, storage_buffer>]>]>) attributes {hal.interface.bindings = [#hal.interface.binding<0, 0>, #hal.interface.binding<0, 1>, #hal.interface.binding<0, 2>]} {
    ^bb0(%arg0: !hal.device):
      %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
      hal.return %x, %y, %z : index, index, index
    }
    builtin.module {
      func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() {
        %cst = arith.constant 0.000000e+00 : f32
        %c0 = arith.constant 0 : index
        %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
        %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
        %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
        %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
        %5 = tensor.empty() : tensor<128x128xf32>
        %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
        %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
        flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
        return
      }
    }
  }
}

// -----// IR Dump Before TranslateTargetExecutableVariantsPass (iree-hal-translate-target-executable-variants) //----- //
hal.executable.variant public @amdaie_xclbin_fb target(<"amd-aie", "amdaie-xclbin-fb", {target_arch = "chip-tbd", ukernels = "none"}>) {
  hal.executable.export public @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32 ordinal(0) layout(#hal.pipeline.layout<push_constants = 0, sets = [<0, bindings = [<0, storage_buffer, ReadOnly>, <1, storage_buffer, ReadOnly>, <2, storage_buffer>]>]>) attributes {hal.interface.bindings = [#hal.interface.binding<0, 0>, #hal.interface.binding<0, 1>, #hal.interface.binding<0, 2>]} {
  ^bb0(%arg0: !hal.device):
    %x, %y, %z = flow.dispatch.workgroup_count_from_slice 
    hal.return %x, %y, %z : index, index, index
  }
  builtin.module {
    func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() {
      %cst = arith.constant 0.000000e+00 : f32
      %c0 = arith.constant 0 : index
      %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
      %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
      %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
      %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
      %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
      %5 = tensor.empty() : tensor<128x128xf32>
      %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
      %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
      flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
      return
    }
  }
}

// -----// IR Dump Before TypePropagation (iree-codegen-type-propagation) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() {
  %cst = arith.constant 0.000000e+00 : f32
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
  flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  return
}

// -----// IR Dump Before BubbleUpOrdinalOps (iree-codegen-bubble-up-ordinal-ops) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() {
  %cst = arith.constant 0.000000e+00 : f32
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
  flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  return
}

// -----// IR Dump Before BufferizeCopyOnlyDispatches (iree-codegen-bufferize-copy-only-dispatches) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() {
  %cst = arith.constant 0.000000e+00 : f32
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
  flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  return
}

// -----// IR Dump Before DecomposeSoftmax (iree-codegen-decompose-softmax) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() {
  %cst = arith.constant 0.000000e+00 : f32
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
  flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  return
}

// -----// IR Dump Before MaterializeUserConfigs (iree-codegen-materialize-user-configs) //----- //
module {
  func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() {
    %cst = arith.constant 0.000000e+00 : f32
    %c0 = arith.constant 0 : index
    %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
    %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
    %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
    %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
    %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
    %5 = tensor.empty() : tensor<128x128xf32>
    %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
    flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
    return
  }
}

// -----// IR Dump Before AMDAIELoweringStrategy (iree-amdaie-lowering-strategy) //----- //
module {
  func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() {
    %cst = arith.constant 0.000000e+00 : f32
    %c0 = arith.constant 0 : index
    %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
    %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
    %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
    %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
    %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
    %5 = tensor.empty() : tensor<128x128xf32>
    %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %7 = linalg.matmul ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
    flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
    return
  }
}

KD - 1
// -----// IR Dump Before LowerExecutableUsingTransformDialect (iree-codegen-lower-executable-using-transform-dialect) //----- //
module {
  func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
    %cst = arith.constant 0.000000e+00 : f32
    %c0 = arith.constant 0 : index
    %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
    %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
    %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
    %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
    %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
    %5 = tensor.empty() : tensor<128x128xf32>
    %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
    %7 = linalg.matmul {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
    flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
    return
  }
}

// -----// IR Dump Before AMDAIELowerExecutableTarget (iree-amdaie-lower-executable-target) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %cst = arith.constant 0.000000e+00 : f32
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %7 = linalg.matmul {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
  flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  return
}

// -----// IR Dump Before AMDAIETileAndFuse (iree-amdaie-tile-and-fuse) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %cst = arith.constant 0.000000e+00 : f32
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %7 = linalg.matmul {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
  flow.dispatch.tensor.store %7, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  return
}

// -----// IR Dump Before AMDAIECleanup (iree-amdaie-cleanup) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %cst = arith.constant 0.000000e+00 : f32
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = linalg.fill ins(%cst : f32) outs(%5 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %7 = linalg.matmul {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} ins(%3, %4 : tensor<128x256xbf16>, tensor<256x128xbf16>) outs(%6 : tensor<128x128xf32>) -> tensor<128x128xf32>
  %8 = scf.forall (%arg0, %arg1) = (0, 0) to (128, 128) step (64, 64) shared_outs(%arg2 = %5) -> (tensor<128x128xf32>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [64, 256] [1, 1] : tensor<128x256xbf16> to tensor<64x256xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [256, 64] [1, 1] : tensor<256x128xbf16> to tensor<256x64xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<128x128xf32> to tensor<64x64xf32>
    %9 = linalg.fill ins(%cst : f32) outs(%extracted_slice_1 : tensor<64x64xf32>) -> tensor<64x64xf32>
    %extracted_slice_2 = tensor.extract_slice %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<128x128xf32> to tensor<64x64xf32>
    %10 = linalg.matmul {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} ins(%extracted_slice, %extracted_slice_0 : tensor<64x256xbf16>, tensor<256x64xbf16>) outs(%9 : tensor<64x64xf32>) -> tensor<64x64xf32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %10 into %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<64x64xf32> into tensor<128x128xf32>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %8, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  return
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %cst = arith.constant 0.000000e+00 : f32
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (128, 128) step (64, 64) shared_outs(%arg2 = %5) -> (tensor<128x128xf32>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [64, 256] [1, 1] : tensor<128x256xbf16> to tensor<64x256xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [256, 64] [1, 1] : tensor<256x128xbf16> to tensor<256x64xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<128x128xf32> to tensor<64x64xf32>
    %7 = linalg.fill ins(%cst : f32) outs(%extracted_slice_1 : tensor<64x64xf32>) -> tensor<64x64xf32>
    %8 = linalg.matmul {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} ins(%extracted_slice, %extracted_slice_0 : tensor<64x256xbf16>, tensor<256x64xbf16>) outs(%7 : tensor<64x64xf32>) -> tensor<64x64xf32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %8 into %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<64x64xf32> into tensor<128x128xf32>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  return
}

// -----// IR Dump Before CSE (cse) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %cst = arith.constant 0.000000e+00 : f32
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (128, 128) step (64, 64) shared_outs(%arg2 = %5) -> (tensor<128x128xf32>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [64, 256] [1, 1] : tensor<128x256xbf16> to tensor<64x256xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [256, 64] [1, 1] : tensor<256x128xbf16> to tensor<256x64xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<128x128xf32> to tensor<64x64xf32>
    %7 = linalg.fill ins(%cst : f32) outs(%extracted_slice_1 : tensor<64x64xf32>) -> tensor<64x64xf32>
    %8 = linalg.matmul {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} ins(%extracted_slice, %extracted_slice_0 : tensor<64x256xbf16>, tensor<256x64xbf16>) outs(%7 : tensor<64x64xf32>) -> tensor<64x64xf32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %8 into %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<64x64xf32> into tensor<128x128xf32>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  return
}

// -----// IR Dump Before AMDAIEPackAndTranspose (iree-amdaie-pack-and-transpose) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %cst = arith.constant 0.000000e+00 : f32
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (128, 128) step (64, 64) shared_outs(%arg2 = %5) -> (tensor<128x128xf32>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [64, 256] [1, 1] : tensor<128x256xbf16> to tensor<64x256xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [256, 64] [1, 1] : tensor<256x128xbf16> to tensor<256x64xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<128x128xf32> to tensor<64x64xf32>
    %7 = linalg.fill ins(%cst : f32) outs(%extracted_slice_1 : tensor<64x64xf32>) -> tensor<64x64xf32>
    %8 = linalg.matmul {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} ins(%extracted_slice, %extracted_slice_0 : tensor<64x256xbf16>, tensor<256x64xbf16>) outs(%7 : tensor<64x64xf32>) -> tensor<64x64xf32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %8 into %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<64x64xf32> into tensor<128x128xf32>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  return
}

// -----// IR Dump Before AMDAIEPropagateDataLayout (iree-amdaie-propagate-data-layout) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %cst = arith.constant 0.000000e+00 : f32
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (128, 128) step (64, 64) shared_outs(%arg2 = %5) -> (tensor<128x128xf32>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [64, 256] [1, 1] : tensor<128x256xbf16> to tensor<64x256xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [256, 64] [1, 1] : tensor<256x128xbf16> to tensor<256x64xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<128x128xf32> to tensor<64x64xf32>
    %7 = linalg.fill ins(%cst : f32) outs(%extracted_slice_1 : tensor<64x64xf32>) -> tensor<64x64xf32>
    %8 = tensor.empty() : tensor<2x8x32x32xbf16>
    %pack = tensor.pack %extracted_slice inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %8 : tensor<64x256xbf16> -> tensor<2x8x32x32xbf16>
    %9 = tensor.empty() : tensor<8x2x32x32xbf16>
    %10 = tensor.empty() : tensor<8x2x32x32xbf16>
    %pack_2 = tensor.pack %extracted_slice_0 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %10 : tensor<256x64xbf16> -> tensor<8x2x32x32xbf16>
    %11 = tensor.empty() : tensor<2x2x32x32xf32>
    %pack_3 = tensor.pack %7 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %11 : tensor<64x64xf32> -> tensor<2x2x32x32xf32>
    %12 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5) -> (d0, d2, d3, d5)>, affine_map<(d0, d1, d2, d3, d4, d5) -> (d2, d1, d5, d4)>, affine_map<(d0, d1, d2, d3, d4, d5) -> (d0, d1, d3, d4)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack, %pack_2 : tensor<2x8x32x32xbf16>, tensor<8x2x32x32xbf16>) outs(%pack_3 : tensor<2x2x32x32xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
    ^bb0(%in: bf16, %in_4: bf16, %out: f32):
      %13 = arith.extf %in : bf16 to f32
      %14 = arith.extf %in_4 : bf16 to f32
      %15 = arith.mulf %13, %14 : f32
      %16 = arith.addf %out, %15 : f32
      linalg.yield %16 : f32
    } -> tensor<2x2x32x32xf32>
    %unpack = tensor.unpack %12 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %7 : tensor<2x2x32x32xf32> -> tensor<64x64xf32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack into %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<64x64xf32> into tensor<128x128xf32>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  return
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %cst = arith.constant 0.000000e+00 : f32
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (128, 128) step (64, 64) shared_outs(%arg2 = %5) -> (tensor<128x128xf32>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [64, 256] [1, 1] : tensor<128x256xbf16> to tensor<64x256xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [256, 64] [1, 1] : tensor<256x128xbf16> to tensor<256x64xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<128x128xf32> to tensor<64x64xf32>
    %7 = linalg.fill ins(%cst : f32) outs(%extracted_slice_1 : tensor<64x64xf32>) -> tensor<64x64xf32>
    %8 = tensor.empty() : tensor<2x8x32x32xbf16>
    %pack = tensor.pack %extracted_slice inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %8 : tensor<64x256xbf16> -> tensor<2x8x32x32xbf16>
    %9 = tensor.empty() : tensor<8x2x32x32xbf16>
    %pack_2 = tensor.pack %extracted_slice_0 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %9 : tensor<256x64xbf16> -> tensor<8x2x32x32xbf16>
    %10 = tensor.empty() : tensor<2x2x32x32xf32>
    %pack_3 = tensor.pack %7 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %10 : tensor<64x64xf32> -> tensor<2x2x32x32xf32>
    %11 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5) -> (d0, d2, d3, d5)>, affine_map<(d0, d1, d2, d3, d4, d5) -> (d2, d1, d5, d4)>, affine_map<(d0, d1, d2, d3, d4, d5) -> (d0, d1, d3, d4)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack, %pack_2 : tensor<2x8x32x32xbf16>, tensor<8x2x32x32xbf16>) outs(%pack_3 : tensor<2x2x32x32xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
    ^bb0(%in: bf16, %in_4: bf16, %out: f32):
      %12 = arith.extf %in : bf16 to f32
      %13 = arith.extf %in_4 : bf16 to f32
      %14 = arith.mulf %12, %13 : f32
      %15 = arith.addf %out, %14 : f32
      linalg.yield %15 : f32
    } -> tensor<2x2x32x32xf32>
    %unpack = tensor.unpack %11 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %7 : tensor<2x2x32x32xf32> -> tensor<64x64xf32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack into %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<64x64xf32> into tensor<128x128xf32>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  return
}

// -----// IR Dump Before CSE (cse) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %cst = arith.constant 0.000000e+00 : f32
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (128, 128) step (64, 64) shared_outs(%arg2 = %5) -> (tensor<128x128xf32>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [64, 256] [1, 1] : tensor<128x256xbf16> to tensor<64x256xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [256, 64] [1, 1] : tensor<256x128xbf16> to tensor<256x64xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<128x128xf32> to tensor<64x64xf32>
    %7 = tensor.empty() : tensor<2x8x32x32xbf16>
    %pack = tensor.pack %extracted_slice inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %7 : tensor<64x256xbf16> -> tensor<2x8x32x32xbf16>
    %8 = tensor.empty() : tensor<8x2x32x32xbf16>
    %pack_2 = tensor.pack %extracted_slice_0 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %8 : tensor<256x64xbf16> -> tensor<8x2x32x32xbf16>
    %9 = tensor.empty() : tensor<2x2x32x32xf32>
    %10 = linalg.fill ins(%cst : f32) outs(%9 : tensor<2x2x32x32xf32>) -> tensor<2x2x32x32xf32>
    %11 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5) -> (d0, d2, d3, d5)>, affine_map<(d0, d1, d2, d3, d4, d5) -> (d2, d1, d5, d4)>, affine_map<(d0, d1, d2, d3, d4, d5) -> (d0, d1, d3, d4)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack, %pack_2 : tensor<2x8x32x32xbf16>, tensor<8x2x32x32xbf16>) outs(%10 : tensor<2x2x32x32xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
    ^bb0(%in: bf16, %in_3: bf16, %out: f32):
      %12 = arith.extf %in : bf16 to f32
      %13 = arith.extf %in_3 : bf16 to f32
      %14 = arith.mulf %12, %13 : f32
      %15 = arith.addf %out, %14 : f32
      linalg.yield %15 : f32
    } -> tensor<2x2x32x32xf32>
    %unpack = tensor.unpack %11 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %extracted_slice_1 : tensor<2x2x32x32xf32> -> tensor<64x64xf32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack into %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<64x64xf32> into tensor<128x128xf32>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  return
}

// -----// IR Dump Before AMDAIEBufferizeToAllocation (iree-amdaie-bufferize-to-allocation) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %cst = arith.constant 0.000000e+00 : f32
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (128, 128) step (64, 64) shared_outs(%arg2 = %5) -> (tensor<128x128xf32>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [64, 256] [1, 1] : tensor<128x256xbf16> to tensor<64x256xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [256, 64] [1, 1] : tensor<256x128xbf16> to tensor<256x64xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<128x128xf32> to tensor<64x64xf32>
    %7 = tensor.empty() : tensor<2x8x32x32xbf16>
    %pack = tensor.pack %extracted_slice inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %7 : tensor<64x256xbf16> -> tensor<2x8x32x32xbf16>
    %8 = tensor.empty() : tensor<8x2x32x32xbf16>
    %pack_2 = tensor.pack %extracted_slice_0 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %8 : tensor<256x64xbf16> -> tensor<8x2x32x32xbf16>
    %9 = tensor.empty() : tensor<2x2x32x32xf32>
    %10 = linalg.fill ins(%cst : f32) outs(%9 : tensor<2x2x32x32xf32>) -> tensor<2x2x32x32xf32>
    %11 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5) -> (d0, d2, d3, d5)>, affine_map<(d0, d1, d2, d3, d4, d5) -> (d2, d1, d5, d4)>, affine_map<(d0, d1, d2, d3, d4, d5) -> (d0, d1, d3, d4)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack, %pack_2 : tensor<2x8x32x32xbf16>, tensor<8x2x32x32xbf16>) outs(%10 : tensor<2x2x32x32xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
    ^bb0(%in: bf16, %in_3: bf16, %out: f32):
      %12 = arith.extf %in : bf16 to f32
      %13 = arith.extf %in_3 : bf16 to f32
      %14 = arith.mulf %12, %13 : f32
      %15 = arith.addf %out, %14 : f32
      linalg.yield %15 : f32
    } -> tensor<2x2x32x32xf32>
    %unpack = tensor.unpack %11 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %extracted_slice_1 : tensor<2x2x32x32xf32> -> tensor<64x64xf32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack into %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<64x64xf32> into tensor<128x128xf32>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  return
}

// -----// IR Dump Before AMDAIEBufferizeToAllocation (iree-amdaie-bufferize-to-allocation) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %cst = arith.constant 0.000000e+00 : f32
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (128, 128) step (64, 64) shared_outs(%arg2 = %5) -> (tensor<128x128xf32>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [64, 256] [1, 1] : tensor<128x256xbf16> to tensor<64x256xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [256, 64] [1, 1] : tensor<256x128xbf16> to tensor<256x64xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<128x128xf32> to tensor<64x64xf32>
    %7 = tensor.empty() : tensor<2x8x32x32xbf16>
    %pack = tensor.pack %extracted_slice inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %7 : tensor<64x256xbf16> -> tensor<2x8x32x32xbf16>
    %8 = tensor.empty() : tensor<8x2x32x32xbf16>
    %pack_2 = tensor.pack %extracted_slice_0 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %8 : tensor<256x64xbf16> -> tensor<8x2x32x32xbf16>
    %9 = tensor.empty() : tensor<2x2x32x32xf32>
    %alloc = memref.alloc() : memref<2x2x32x32xf32, 1 : i32>
    %10 = bufferization.to_tensor %alloc restrict writable : memref<2x2x32x32xf32, 1 : i32>
    %11 = linalg.fill ins(%cst : f32) outs(%10 : tensor<2x2x32x32xf32>) -> tensor<2x2x32x32xf32>
    %12 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5) -> (d0, d2, d3, d5)>, affine_map<(d0, d1, d2, d3, d4, d5) -> (d2, d1, d5, d4)>, affine_map<(d0, d1, d2, d3, d4, d5) -> (d0, d1, d3, d4)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack, %pack_2 : tensor<2x8x32x32xbf16>, tensor<8x2x32x32xbf16>) outs(%11 : tensor<2x2x32x32xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
    ^bb0(%in: bf16, %in_3: bf16, %out: f32):
      %13 = arith.extf %in : bf16 to f32
      %14 = arith.extf %in_3 : bf16 to f32
      %15 = arith.mulf %13, %14 : f32
      %16 = arith.addf %out, %15 : f32
      linalg.yield %16 : f32
    } -> tensor<2x2x32x32xf32>
    %unpack = tensor.unpack %12 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %extracted_slice_1 : tensor<2x2x32x32xf32> -> tensor<64x64xf32>
    memref.dealloc %alloc : memref<2x2x32x32xf32, 1 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack into %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<64x64xf32> into tensor<128x128xf32>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  return
}

// -----// IR Dump Before AMDAIEPackAndTranspose (iree-amdaie-pack-and-transpose) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %cst = arith.constant 0.000000e+00 : f32
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (128, 128) step (64, 64) shared_outs(%arg2 = %5) -> (tensor<128x128xf32>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [64, 256] [1, 1] : tensor<128x256xbf16> to tensor<64x256xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [256, 64] [1, 1] : tensor<256x128xbf16> to tensor<256x64xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<128x128xf32> to tensor<64x64xf32>
    %7 = tensor.empty() : tensor<2x8x32x32xbf16>
    %pack = tensor.pack %extracted_slice inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %7 : tensor<64x256xbf16> -> tensor<2x8x32x32xbf16>
    %8 = tensor.empty() : tensor<8x2x32x32xbf16>
    %pack_2 = tensor.pack %extracted_slice_0 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %8 : tensor<256x64xbf16> -> tensor<8x2x32x32xbf16>
    %9 = tensor.empty() : tensor<2x2x32x32xf32>
    %alloc = memref.alloc() : memref<2x2x32x32xf32, 1 : i32>
    %10 = bufferization.to_tensor %alloc restrict writable : memref<2x2x32x32xf32, 1 : i32>
    %11 = linalg.fill ins(%cst : f32) outs(%10 : tensor<2x2x32x32xf32>) -> tensor<2x2x32x32xf32>
    %12 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5) -> (d0, d2, d3, d5)>, affine_map<(d0, d1, d2, d3, d4, d5) -> (d2, d1, d5, d4)>, affine_map<(d0, d1, d2, d3, d4, d5) -> (d0, d1, d3, d4)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack, %pack_2 : tensor<2x8x32x32xbf16>, tensor<8x2x32x32xbf16>) outs(%11 : tensor<2x2x32x32xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
    ^bb0(%in: bf16, %in_3: bf16, %out: f32):
      %13 = arith.extf %in : bf16 to f32
      %14 = arith.extf %in_3 : bf16 to f32
      %15 = arith.mulf %13, %14 : f32
      %16 = arith.addf %out, %15 : f32
      linalg.yield %16 : f32
    } -> tensor<2x2x32x32xf32>
    %unpack = tensor.unpack %12 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %extracted_slice_1 : tensor<2x2x32x32xf32> -> tensor<64x64xf32>
    memref.dealloc %alloc : memref<2x2x32x32xf32, 1 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack into %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<64x64xf32> into tensor<128x128xf32>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  return
}

// -----// IR Dump Before AMDAIEPropagateDataLayout (iree-amdaie-propagate-data-layout) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %cst = arith.constant 0.000000e+00 : f32
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (128, 128) step (64, 64) shared_outs(%arg2 = %5) -> (tensor<128x128xf32>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [64, 256] [1, 1] : tensor<128x256xbf16> to tensor<64x256xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [256, 64] [1, 1] : tensor<256x128xbf16> to tensor<256x64xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<128x128xf32> to tensor<64x64xf32>
    %7 = tensor.empty() : tensor<2x8x32x32xbf16>
    %pack = tensor.pack %extracted_slice inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %7 : tensor<64x256xbf16> -> tensor<2x8x32x32xbf16>
    %8 = tensor.empty() : tensor<8x2x32x32xbf16>
    %pack_2 = tensor.pack %extracted_slice_0 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %8 : tensor<256x64xbf16> -> tensor<8x2x32x32xbf16>
    %9 = tensor.empty() : tensor<2x2x32x32xf32>
    %alloc = memref.alloc() : memref<2x2x32x32xf32, 1 : i32>
    %10 = bufferization.to_tensor %alloc restrict writable : memref<2x2x32x32xf32, 1 : i32>
    %11 = linalg.fill ins(%cst : f32) outs(%10 : tensor<2x2x32x32xf32>) -> tensor<2x2x32x32xf32>
    %12 = tensor.empty() : tensor<2x8x8x4x4x8xbf16>
    %13 = tensor.empty() : tensor<2x8x4x8x4x8xbf16>
    %pack_3 = tensor.pack %pack outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %13 : tensor<2x8x32x32xbf16> -> tensor<2x8x4x8x4x8xbf16>
    %14 = tensor.empty() : tensor<8x2x4x8x4x8xbf16>
    %15 = tensor.empty() : tensor<8x2x8x4x8x4xbf16>
    %pack_4 = tensor.pack %pack_2 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %15 : tensor<8x2x32x32xbf16> -> tensor<8x2x8x4x8x4xbf16>
    %16 = tensor.empty() : tensor<2x2x8x8x4x4xf32>
    %17 = tensor.empty() : tensor<2x2x8x8x4x4xf32>
    %pack_5 = tensor.pack %11 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %17 : tensor<2x2x32x32xf32> -> tensor<2x2x8x8x4x4xf32>
    %18 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_3, %pack_4 : tensor<2x8x4x8x4x8xbf16>, tensor<8x2x8x4x8x4xbf16>) outs(%pack_5 : tensor<2x2x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
    ^bb0(%in: bf16, %in_7: bf16, %out: f32):
      %19 = arith.extf %in : bf16 to f32
      %20 = arith.extf %in_7 : bf16 to f32
      %21 = arith.mulf %19, %20 : f32
      %22 = arith.addf %out, %21 : f32
      linalg.yield %22 : f32
    } -> tensor<2x2x8x8x4x4xf32>
    %unpack = tensor.unpack %18 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %11 : tensor<2x2x8x8x4x4xf32> -> tensor<2x2x32x32xf32>
    %unpack_6 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %extracted_slice_1 : tensor<2x2x32x32xf32> -> tensor<64x64xf32>
    memref.dealloc %alloc : memref<2x2x32x32xf32, 1 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_6 into %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<64x64xf32> into tensor<128x128xf32>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  return
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %cst = arith.constant 0.000000e+00 : f32
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (128, 128) step (64, 64) shared_outs(%arg2 = %5) -> (tensor<128x128xf32>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [64, 256] [1, 1] : tensor<128x256xbf16> to tensor<64x256xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [256, 64] [1, 1] : tensor<256x128xbf16> to tensor<256x64xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<128x128xf32> to tensor<64x64xf32>
    %7 = tensor.empty() : tensor<2x8x32x32xbf16>
    %pack = tensor.pack %extracted_slice inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %7 : tensor<64x256xbf16> -> tensor<2x8x32x32xbf16>
    %8 = tensor.empty() : tensor<8x2x32x32xbf16>
    %pack_2 = tensor.pack %extracted_slice_0 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %8 : tensor<256x64xbf16> -> tensor<8x2x32x32xbf16>
    %alloc = memref.alloc() : memref<2x2x32x32xf32, 1 : i32>
    %9 = bufferization.to_tensor %alloc restrict writable : memref<2x2x32x32xf32, 1 : i32>
    %10 = linalg.fill ins(%cst : f32) outs(%9 : tensor<2x2x32x32xf32>) -> tensor<2x2x32x32xf32>
    %11 = tensor.empty() : tensor<2x8x4x8x4x8xbf16>
    %pack_3 = tensor.pack %pack outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %11 : tensor<2x8x32x32xbf16> -> tensor<2x8x4x8x4x8xbf16>
    %12 = tensor.empty() : tensor<8x2x8x4x8x4xbf16>
    %pack_4 = tensor.pack %pack_2 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %12 : tensor<8x2x32x32xbf16> -> tensor<8x2x8x4x8x4xbf16>
    %13 = tensor.empty() : tensor<2x2x8x8x4x4xf32>
    %pack_5 = tensor.pack %10 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %13 : tensor<2x2x32x32xf32> -> tensor<2x2x8x8x4x4xf32>
    %14 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_3, %pack_4 : tensor<2x8x4x8x4x8xbf16>, tensor<8x2x8x4x8x4xbf16>) outs(%pack_5 : tensor<2x2x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
    ^bb0(%in: bf16, %in_7: bf16, %out: f32):
      %15 = arith.extf %in : bf16 to f32
      %16 = arith.extf %in_7 : bf16 to f32
      %17 = arith.mulf %15, %16 : f32
      %18 = arith.addf %out, %17 : f32
      linalg.yield %18 : f32
    } -> tensor<2x2x8x8x4x4xf32>
    %unpack = tensor.unpack %14 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %10 : tensor<2x2x8x8x4x4xf32> -> tensor<2x2x32x32xf32>
    %unpack_6 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %extracted_slice_1 : tensor<2x2x32x32xf32> -> tensor<64x64xf32>
    memref.dealloc %alloc : memref<2x2x32x32xf32, 1 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_6 into %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<64x64xf32> into tensor<128x128xf32>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  return
}

// -----// IR Dump Before CSE (cse) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %cst = arith.constant 0.000000e+00 : f32
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (128, 128) step (64, 64) shared_outs(%arg2 = %5) -> (tensor<128x128xf32>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [64, 256] [1, 1] : tensor<128x256xbf16> to tensor<64x256xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [256, 64] [1, 1] : tensor<256x128xbf16> to tensor<256x64xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<128x128xf32> to tensor<64x64xf32>
    %7 = tensor.empty() : tensor<2x8x32x32xbf16>
    %pack = tensor.pack %extracted_slice inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %7 : tensor<64x256xbf16> -> tensor<2x8x32x32xbf16>
    %8 = tensor.empty() : tensor<8x2x32x32xbf16>
    %pack_2 = tensor.pack %extracted_slice_0 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %8 : tensor<256x64xbf16> -> tensor<8x2x32x32xbf16>
    %alloc = memref.alloc() : memref<2x2x32x32xf32, 1 : i32>
    %9 = bufferization.to_tensor %alloc restrict writable : memref<2x2x32x32xf32, 1 : i32>
    %10 = tensor.empty() : tensor<2x8x4x8x4x8xbf16>
    %pack_3 = tensor.pack %pack outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %10 : tensor<2x8x32x32xbf16> -> tensor<2x8x4x8x4x8xbf16>
    %11 = tensor.empty() : tensor<8x2x8x4x8x4xbf16>
    %pack_4 = tensor.pack %pack_2 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %11 : tensor<8x2x32x32xbf16> -> tensor<8x2x8x4x8x4xbf16>
    %12 = tensor.empty() : tensor<2x2x8x8x4x4xf32>
    %13 = linalg.fill ins(%cst : f32) outs(%12 : tensor<2x2x8x8x4x4xf32>) -> tensor<2x2x8x8x4x4xf32>
    %14 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_3, %pack_4 : tensor<2x8x4x8x4x8xbf16>, tensor<8x2x8x4x8x4xbf16>) outs(%13 : tensor<2x2x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
    ^bb0(%in: bf16, %in_6: bf16, %out: f32):
      %15 = arith.extf %in : bf16 to f32
      %16 = arith.extf %in_6 : bf16 to f32
      %17 = arith.mulf %15, %16 : f32
      %18 = arith.addf %out, %17 : f32
      linalg.yield %18 : f32
    } -> tensor<2x2x8x8x4x4xf32>
    %unpack = tensor.unpack %14 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %9 : tensor<2x2x8x8x4x4xf32> -> tensor<2x2x32x32xf32>
    %unpack_5 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %extracted_slice_1 : tensor<2x2x32x32xf32> -> tensor<64x64xf32>
    memref.dealloc %alloc : memref<2x2x32x32xf32, 1 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_5 into %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<64x64xf32> into tensor<128x128xf32>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  return
}

// -----// IR Dump Before AMDAIEBufferizeToAllocation (iree-amdaie-bufferize-to-allocation) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %cst = arith.constant 0.000000e+00 : f32
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (128, 128) step (64, 64) shared_outs(%arg2 = %5) -> (tensor<128x128xf32>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [64, 256] [1, 1] : tensor<128x256xbf16> to tensor<64x256xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [256, 64] [1, 1] : tensor<256x128xbf16> to tensor<256x64xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<128x128xf32> to tensor<64x64xf32>
    %7 = tensor.empty() : tensor<2x8x32x32xbf16>
    %pack = tensor.pack %extracted_slice inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %7 : tensor<64x256xbf16> -> tensor<2x8x32x32xbf16>
    %8 = tensor.empty() : tensor<8x2x32x32xbf16>
    %pack_2 = tensor.pack %extracted_slice_0 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %8 : tensor<256x64xbf16> -> tensor<8x2x32x32xbf16>
    %alloc = memref.alloc() : memref<2x2x32x32xf32, 1 : i32>
    %9 = bufferization.to_tensor %alloc restrict writable : memref<2x2x32x32xf32, 1 : i32>
    %10 = tensor.empty() : tensor<2x8x4x8x4x8xbf16>
    %pack_3 = tensor.pack %pack outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %10 : tensor<2x8x32x32xbf16> -> tensor<2x8x4x8x4x8xbf16>
    %11 = tensor.empty() : tensor<8x2x8x4x8x4xbf16>
    %pack_4 = tensor.pack %pack_2 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %11 : tensor<8x2x32x32xbf16> -> tensor<8x2x8x4x8x4xbf16>
    %12 = tensor.empty() : tensor<2x2x8x8x4x4xf32>
    %13 = linalg.fill ins(%cst : f32) outs(%12 : tensor<2x2x8x8x4x4xf32>) -> tensor<2x2x8x8x4x4xf32>
    %14 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_3, %pack_4 : tensor<2x8x4x8x4x8xbf16>, tensor<8x2x8x4x8x4xbf16>) outs(%13 : tensor<2x2x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
    ^bb0(%in: bf16, %in_6: bf16, %out: f32):
      %15 = arith.extf %in : bf16 to f32
      %16 = arith.extf %in_6 : bf16 to f32
      %17 = arith.mulf %15, %16 : f32
      %18 = arith.addf %out, %17 : f32
      linalg.yield %18 : f32
    } -> tensor<2x2x8x8x4x4xf32>
    %unpack = tensor.unpack %14 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %9 : tensor<2x2x8x8x4x4xf32> -> tensor<2x2x32x32xf32>
    %unpack_5 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %extracted_slice_1 : tensor<2x2x32x32xf32> -> tensor<64x64xf32>
    memref.dealloc %alloc : memref<2x2x32x32xf32, 1 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_5 into %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<64x64xf32> into tensor<128x128xf32>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  return
}

// -----// IR Dump Before AMDAIETileAndFuse (iree-amdaie-tile-and-fuse) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %cst = arith.constant 0.000000e+00 : f32
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (128, 128) step (64, 64) shared_outs(%arg2 = %5) -> (tensor<128x128xf32>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [64, 256] [1, 1] : tensor<128x256xbf16> to tensor<64x256xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [256, 64] [1, 1] : tensor<256x128xbf16> to tensor<256x64xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<128x128xf32> to tensor<64x64xf32>
    %7 = tensor.empty() : tensor<2x8x32x32xbf16>
    %pack = tensor.pack %extracted_slice inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %7 : tensor<64x256xbf16> -> tensor<2x8x32x32xbf16>
    %8 = tensor.empty() : tensor<8x2x32x32xbf16>
    %pack_2 = tensor.pack %extracted_slice_0 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %8 : tensor<256x64xbf16> -> tensor<8x2x32x32xbf16>
    %alloc = memref.alloc() : memref<2x2x32x32xf32, 1 : i32>
    %9 = bufferization.to_tensor %alloc restrict writable : memref<2x2x32x32xf32, 1 : i32>
    %10 = tensor.empty() : tensor<2x8x4x8x4x8xbf16>
    %pack_3 = tensor.pack %pack outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %10 : tensor<2x8x32x32xbf16> -> tensor<2x8x4x8x4x8xbf16>
    %11 = tensor.empty() : tensor<8x2x8x4x8x4xbf16>
    %pack_4 = tensor.pack %pack_2 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %11 : tensor<8x2x32x32xbf16> -> tensor<8x2x8x4x8x4xbf16>
    %12 = tensor.empty() : tensor<2x2x8x8x4x4xf32>
    %alloc_5 = memref.alloc() : memref<2x2x8x8x4x4xf32, 2 : i32>
    %13 = bufferization.to_tensor %alloc_5 restrict writable : memref<2x2x8x8x4x4xf32, 2 : i32>
    %14 = linalg.fill ins(%cst : f32) outs(%13 : tensor<2x2x8x8x4x4xf32>) -> tensor<2x2x8x8x4x4xf32>
    %15 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_3, %pack_4 : tensor<2x8x4x8x4x8xbf16>, tensor<8x2x8x4x8x4xbf16>) outs(%14 : tensor<2x2x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
    ^bb0(%in: bf16, %in_7: bf16, %out: f32):
      %16 = arith.extf %in : bf16 to f32
      %17 = arith.extf %in_7 : bf16 to f32
      %18 = arith.mulf %16, %17 : f32
      %19 = arith.addf %out, %18 : f32
      linalg.yield %19 : f32
    } -> tensor<2x2x8x8x4x4xf32>
    %unpack = tensor.unpack %15 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %9 : tensor<2x2x8x8x4x4xf32> -> tensor<2x2x32x32xf32>
    %unpack_6 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %extracted_slice_1 : tensor<2x2x32x32xf32> -> tensor<64x64xf32>
    memref.dealloc %alloc : memref<2x2x32x32xf32, 1 : i32>
    memref.dealloc %alloc_5 : memref<2x2x8x8x4x4xf32, 2 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_6 into %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<64x64xf32> into tensor<128x128xf32>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  return
}

// -----// IR Dump Before AMDAIECleanup (iree-amdaie-cleanup) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %cst = arith.constant 0.000000e+00 : f32
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (128, 128) step (64, 64) shared_outs(%arg2 = %5) -> (tensor<128x128xf32>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [64, 256] [1, 1] : tensor<128x256xbf16> to tensor<64x256xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [256, 64] [1, 1] : tensor<256x128xbf16> to tensor<256x64xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<128x128xf32> to tensor<64x64xf32>
    %7 = tensor.empty() : tensor<2x8x32x32xbf16>
    %pack = tensor.pack %extracted_slice inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %7 : tensor<64x256xbf16> -> tensor<2x8x32x32xbf16>
    %8 = tensor.empty() : tensor<8x2x32x32xbf16>
    %pack_2 = tensor.pack %extracted_slice_0 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %8 : tensor<256x64xbf16> -> tensor<8x2x32x32xbf16>
    %alloc = memref.alloc() : memref<2x2x32x32xf32, 1 : i32>
    %9 = bufferization.to_tensor %alloc restrict writable : memref<2x2x32x32xf32, 1 : i32>
    %10 = tensor.empty() : tensor<2x8x4x8x4x8xbf16>
    %pack_3 = tensor.pack %pack outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %10 : tensor<2x8x32x32xbf16> -> tensor<2x8x4x8x4x8xbf16>
    %11 = tensor.empty() : tensor<8x2x8x4x8x4xbf16>
    %pack_4 = tensor.pack %pack_2 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %11 : tensor<8x2x32x32xbf16> -> tensor<8x2x8x4x8x4xbf16>
    %12 = tensor.empty() : tensor<2x2x8x8x4x4xf32>
    %alloc_5 = memref.alloc() : memref<2x2x8x8x4x4xf32, 2 : i32>
    %13 = bufferization.to_tensor %alloc_5 restrict writable : memref<2x2x8x8x4x4xf32, 2 : i32>
    %14 = linalg.fill ins(%cst : f32) outs(%13 : tensor<2x2x8x8x4x4xf32>) -> tensor<2x2x8x8x4x4xf32>
    %15 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_3, %pack_4 : tensor<2x8x4x8x4x8xbf16>, tensor<8x2x8x4x8x4xbf16>) outs(%14 : tensor<2x2x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
    ^bb0(%in: bf16, %in_8: bf16, %out: f32):
      %17 = arith.extf %in : bf16 to f32
      %18 = arith.extf %in_8 : bf16 to f32
      %19 = arith.mulf %17, %18 : f32
      %20 = arith.addf %out, %19 : f32
      linalg.yield %20 : f32
    } -> tensor<2x2x8x8x4x4xf32>
    %c0_6 = arith.constant 0 : index
    %c8 = arith.constant 8 : index
    %c1 = arith.constant 1 : index
    %16 = scf.for %arg3 = %c0_6 to %c8 step %c1 iter_args(%arg4 = %14) -> (tensor<2x2x8x8x4x4xf32>) {
      %extracted_slice_8 = tensor.extract_slice %pack_3[0, %arg3, 0, 0, 0, 0] [2, 1, 4, 8, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<2x8x4x8x4x8xbf16> to tensor<2x1x4x8x4x8xbf16>
      %extracted_slice_9 = tensor.extract_slice %pack_4[%arg3, 0, 0, 0, 0, 0] [1, 2, 8, 4, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<8x2x8x4x8x4xbf16> to tensor<1x2x8x4x8x4xbf16>
      %extracted_slice_10 = tensor.extract_slice %arg4[0, 0, 0, 0, 0, 0] [2, 2, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<2x2x8x8x4x4xf32>
      %17 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%extracted_slice_8, %extracted_slice_9 : tensor<2x1x4x8x4x8xbf16>, tensor<1x2x8x4x8x4xbf16>) outs(%extracted_slice_10 : tensor<2x2x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
      ^bb0(%in: bf16, %in_11: bf16, %out: f32):
        %18 = arith.extf %in : bf16 to f32
        %19 = arith.extf %in_11 : bf16 to f32
        %20 = arith.mulf %18, %19 : f32
        %21 = arith.addf %out, %20 : f32
        linalg.yield %21 : f32
      } -> tensor<2x2x8x8x4x4xf32>
      %inserted_slice = tensor.insert_slice %17 into %arg4[0, 0, 0, 0, 0, 0] [2, 2, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> into tensor<2x2x8x8x4x4xf32>
      scf.yield %inserted_slice : tensor<2x2x8x8x4x4xf32>
    }
    %unpack = tensor.unpack %16 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %9 : tensor<2x2x8x8x4x4xf32> -> tensor<2x2x32x32xf32>
    %unpack_7 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %extracted_slice_1 : tensor<2x2x32x32xf32> -> tensor<64x64xf32>
    memref.dealloc %alloc : memref<2x2x32x32xf32, 1 : i32>
    memref.dealloc %alloc_5 : memref<2x2x8x8x4x4xf32, 2 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_7 into %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<64x64xf32> into tensor<128x128xf32>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  return
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c1 = arith.constant 1 : index
  %c8 = arith.constant 8 : index
  %cst = arith.constant 0.000000e+00 : f32
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (128, 128) step (64, 64) shared_outs(%arg2 = %5) -> (tensor<128x128xf32>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [64, 256] [1, 1] : tensor<128x256xbf16> to tensor<64x256xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [256, 64] [1, 1] : tensor<256x128xbf16> to tensor<256x64xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<128x128xf32> to tensor<64x64xf32>
    %7 = tensor.empty() : tensor<2x8x32x32xbf16>
    %pack = tensor.pack %extracted_slice inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %7 : tensor<64x256xbf16> -> tensor<2x8x32x32xbf16>
    %8 = tensor.empty() : tensor<8x2x32x32xbf16>
    %pack_2 = tensor.pack %extracted_slice_0 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %8 : tensor<256x64xbf16> -> tensor<8x2x32x32xbf16>
    %alloc = memref.alloc() : memref<2x2x32x32xf32, 1 : i32>
    %9 = bufferization.to_tensor %alloc restrict writable : memref<2x2x32x32xf32, 1 : i32>
    %10 = tensor.empty() : tensor<2x8x4x8x4x8xbf16>
    %pack_3 = tensor.pack %pack outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %10 : tensor<2x8x32x32xbf16> -> tensor<2x8x4x8x4x8xbf16>
    %11 = tensor.empty() : tensor<8x2x8x4x8x4xbf16>
    %pack_4 = tensor.pack %pack_2 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %11 : tensor<8x2x32x32xbf16> -> tensor<8x2x8x4x8x4xbf16>
    %alloc_5 = memref.alloc() : memref<2x2x8x8x4x4xf32, 2 : i32>
    %12 = bufferization.to_tensor %alloc_5 restrict writable : memref<2x2x8x8x4x4xf32, 2 : i32>
    %13 = linalg.fill ins(%cst : f32) outs(%12 : tensor<2x2x8x8x4x4xf32>) -> tensor<2x2x8x8x4x4xf32>
    %14 = scf.for %arg3 = %c0 to %c8 step %c1 iter_args(%arg4 = %13) -> (tensor<2x2x8x8x4x4xf32>) {
      %extracted_slice_7 = tensor.extract_slice %pack_3[0, %arg3, 0, 0, 0, 0] [2, 1, 4, 8, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<2x8x4x8x4x8xbf16> to tensor<2x1x4x8x4x8xbf16>
      %extracted_slice_8 = tensor.extract_slice %pack_4[%arg3, 0, 0, 0, 0, 0] [1, 2, 8, 4, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<8x2x8x4x8x4xbf16> to tensor<1x2x8x4x8x4xbf16>
      %15 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%extracted_slice_7, %extracted_slice_8 : tensor<2x1x4x8x4x8xbf16>, tensor<1x2x8x4x8x4xbf16>) outs(%arg4 : tensor<2x2x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
      ^bb0(%in: bf16, %in_9: bf16, %out: f32):
        %16 = arith.extf %in : bf16 to f32
        %17 = arith.extf %in_9 : bf16 to f32
        %18 = arith.mulf %16, %17 : f32
        %19 = arith.addf %out, %18 : f32
        linalg.yield %19 : f32
      } -> tensor<2x2x8x8x4x4xf32>
      scf.yield %15 : tensor<2x2x8x8x4x4xf32>
    }
    %unpack = tensor.unpack %14 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %9 : tensor<2x2x8x8x4x4xf32> -> tensor<2x2x32x32xf32>
    %unpack_6 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %extracted_slice_1 : tensor<2x2x32x32xf32> -> tensor<64x64xf32>
    memref.dealloc %alloc : memref<2x2x32x32xf32, 1 : i32>
    memref.dealloc %alloc_5 : memref<2x2x8x8x4x4xf32, 2 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_6 into %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<64x64xf32> into tensor<128x128xf32>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  return
}

// -----// IR Dump Before CSE (cse) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c1 = arith.constant 1 : index
  %c8 = arith.constant 8 : index
  %cst = arith.constant 0.000000e+00 : f32
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (128, 128) step (64, 64) shared_outs(%arg2 = %5) -> (tensor<128x128xf32>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [64, 256] [1, 1] : tensor<128x256xbf16> to tensor<64x256xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [256, 64] [1, 1] : tensor<256x128xbf16> to tensor<256x64xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<128x128xf32> to tensor<64x64xf32>
    %7 = tensor.empty() : tensor<2x8x32x32xbf16>
    %pack = tensor.pack %extracted_slice inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %7 : tensor<64x256xbf16> -> tensor<2x8x32x32xbf16>
    %8 = tensor.empty() : tensor<8x2x32x32xbf16>
    %pack_2 = tensor.pack %extracted_slice_0 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %8 : tensor<256x64xbf16> -> tensor<8x2x32x32xbf16>
    %alloc = memref.alloc() : memref<2x2x32x32xf32, 1 : i32>
    %9 = bufferization.to_tensor %alloc restrict writable : memref<2x2x32x32xf32, 1 : i32>
    %10 = tensor.empty() : tensor<2x8x4x8x4x8xbf16>
    %pack_3 = tensor.pack %pack outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %10 : tensor<2x8x32x32xbf16> -> tensor<2x8x4x8x4x8xbf16>
    %11 = tensor.empty() : tensor<8x2x8x4x8x4xbf16>
    %pack_4 = tensor.pack %pack_2 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %11 : tensor<8x2x32x32xbf16> -> tensor<8x2x8x4x8x4xbf16>
    %alloc_5 = memref.alloc() : memref<2x2x8x8x4x4xf32, 2 : i32>
    %12 = bufferization.to_tensor %alloc_5 restrict writable : memref<2x2x8x8x4x4xf32, 2 : i32>
    %13 = linalg.fill ins(%cst : f32) outs(%12 : tensor<2x2x8x8x4x4xf32>) -> tensor<2x2x8x8x4x4xf32>
    %14 = scf.for %arg3 = %c0 to %c8 step %c1 iter_args(%arg4 = %13) -> (tensor<2x2x8x8x4x4xf32>) {
      %extracted_slice_7 = tensor.extract_slice %pack_3[0, %arg3, 0, 0, 0, 0] [2, 1, 4, 8, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<2x8x4x8x4x8xbf16> to tensor<2x1x4x8x4x8xbf16>
      %extracted_slice_8 = tensor.extract_slice %pack_4[%arg3, 0, 0, 0, 0, 0] [1, 2, 8, 4, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<8x2x8x4x8x4xbf16> to tensor<1x2x8x4x8x4xbf16>
      %15 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%extracted_slice_7, %extracted_slice_8 : tensor<2x1x4x8x4x8xbf16>, tensor<1x2x8x4x8x4xbf16>) outs(%arg4 : tensor<2x2x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
      ^bb0(%in: bf16, %in_9: bf16, %out: f32):
        %16 = arith.extf %in : bf16 to f32
        %17 = arith.extf %in_9 : bf16 to f32
        %18 = arith.mulf %16, %17 : f32
        %19 = arith.addf %out, %18 : f32
        linalg.yield %19 : f32
      } -> tensor<2x2x8x8x4x4xf32>
      scf.yield %15 : tensor<2x2x8x8x4x4xf32>
    }
    %unpack = tensor.unpack %14 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %9 : tensor<2x2x8x8x4x4xf32> -> tensor<2x2x32x32xf32>
    %unpack_6 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %extracted_slice_1 : tensor<2x2x32x32xf32> -> tensor<64x64xf32>
    memref.dealloc %alloc : memref<2x2x32x32xf32, 1 : i32>
    memref.dealloc %alloc_5 : memref<2x2x8x8x4x4xf32, 2 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_6 into %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<64x64xf32> into tensor<128x128xf32>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  return
}

// -----// IR Dump Before AMDAIEFusePackIntoLoop (iree-amdaie-fuse-pack-into-loop) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c1 = arith.constant 1 : index
  %c8 = arith.constant 8 : index
  %cst = arith.constant 0.000000e+00 : f32
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (128, 128) step (64, 64) shared_outs(%arg2 = %5) -> (tensor<128x128xf32>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [64, 256] [1, 1] : tensor<128x256xbf16> to tensor<64x256xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [256, 64] [1, 1] : tensor<256x128xbf16> to tensor<256x64xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<128x128xf32> to tensor<64x64xf32>
    %7 = tensor.empty() : tensor<2x8x32x32xbf16>
    %pack = tensor.pack %extracted_slice inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %7 : tensor<64x256xbf16> -> tensor<2x8x32x32xbf16>
    %8 = tensor.empty() : tensor<8x2x32x32xbf16>
    %pack_2 = tensor.pack %extracted_slice_0 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %8 : tensor<256x64xbf16> -> tensor<8x2x32x32xbf16>
    %alloc = memref.alloc() : memref<2x2x32x32xf32, 1 : i32>
    %9 = bufferization.to_tensor %alloc restrict writable : memref<2x2x32x32xf32, 1 : i32>
    %10 = tensor.empty() : tensor<2x8x4x8x4x8xbf16>
    %pack_3 = tensor.pack %pack outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %10 : tensor<2x8x32x32xbf16> -> tensor<2x8x4x8x4x8xbf16>
    %11 = tensor.empty() : tensor<8x2x8x4x8x4xbf16>
    %pack_4 = tensor.pack %pack_2 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %11 : tensor<8x2x32x32xbf16> -> tensor<8x2x8x4x8x4xbf16>
    %alloc_5 = memref.alloc() : memref<2x2x8x8x4x4xf32, 2 : i32>
    %12 = bufferization.to_tensor %alloc_5 restrict writable : memref<2x2x8x8x4x4xf32, 2 : i32>
    %13 = linalg.fill ins(%cst : f32) outs(%12 : tensor<2x2x8x8x4x4xf32>) -> tensor<2x2x8x8x4x4xf32>
    %14 = scf.for %arg3 = %c0 to %c8 step %c1 iter_args(%arg4 = %13) -> (tensor<2x2x8x8x4x4xf32>) {
      %extracted_slice_7 = tensor.extract_slice %pack_3[0, %arg3, 0, 0, 0, 0] [2, 1, 4, 8, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<2x8x4x8x4x8xbf16> to tensor<2x1x4x8x4x8xbf16>
      %extracted_slice_8 = tensor.extract_slice %pack_4[%arg3, 0, 0, 0, 0, 0] [1, 2, 8, 4, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<8x2x8x4x8x4xbf16> to tensor<1x2x8x4x8x4xbf16>
      %15 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%extracted_slice_7, %extracted_slice_8 : tensor<2x1x4x8x4x8xbf16>, tensor<1x2x8x4x8x4xbf16>) outs(%arg4 : tensor<2x2x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
      ^bb0(%in: bf16, %in_9: bf16, %out: f32):
        %16 = arith.extf %in : bf16 to f32
        %17 = arith.extf %in_9 : bf16 to f32
        %18 = arith.mulf %16, %17 : f32
        %19 = arith.addf %out, %18 : f32
        linalg.yield %19 : f32
      } -> tensor<2x2x8x8x4x4xf32>
      scf.yield %15 : tensor<2x2x8x8x4x4xf32>
    }
    %unpack = tensor.unpack %14 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %9 : tensor<2x2x8x8x4x4xf32> -> tensor<2x2x32x32xf32>
    %unpack_6 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %extracted_slice_1 : tensor<2x2x32x32xf32> -> tensor<64x64xf32>
    memref.dealloc %alloc : memref<2x2x32x32xf32, 1 : i32>
    memref.dealloc %alloc_5 : memref<2x2x8x8x4x4xf32, 2 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_6 into %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<64x64xf32> into tensor<128x128xf32>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  return
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c1 = arith.constant 1 : index
  %c8 = arith.constant 8 : index
  %cst = arith.constant 0.000000e+00 : f32
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (128, 128) step (64, 64) shared_outs(%arg2 = %5) -> (tensor<128x128xf32>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [64, 256] [1, 1] : tensor<128x256xbf16> to tensor<64x256xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [256, 64] [1, 1] : tensor<256x128xbf16> to tensor<256x64xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<128x128xf32> to tensor<64x64xf32>
    %7 = tensor.empty() : tensor<2x8x32x32xbf16>
    %pack = tensor.pack %extracted_slice inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %7 : tensor<64x256xbf16> -> tensor<2x8x32x32xbf16>
    %8 = tensor.empty() : tensor<8x2x32x32xbf16>
    %pack_2 = tensor.pack %extracted_slice_0 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %8 : tensor<256x64xbf16> -> tensor<8x2x32x32xbf16>
    %alloc = memref.alloc() : memref<2x2x32x32xf32, 1 : i32>
    %9 = bufferization.to_tensor %alloc restrict writable : memref<2x2x32x32xf32, 1 : i32>
    %10 = tensor.empty() : tensor<2x8x4x8x4x8xbf16>
    %pack_3 = tensor.pack %pack outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %10 : tensor<2x8x32x32xbf16> -> tensor<2x8x4x8x4x8xbf16>
    %11 = tensor.empty() : tensor<8x2x8x4x8x4xbf16>
    %pack_4 = tensor.pack %pack_2 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %11 : tensor<8x2x32x32xbf16> -> tensor<8x2x8x4x8x4xbf16>
    %alloc_5 = memref.alloc() : memref<2x2x8x8x4x4xf32, 2 : i32>
    %12 = bufferization.to_tensor %alloc_5 restrict writable : memref<2x2x8x8x4x4xf32, 2 : i32>
    %13 = linalg.fill ins(%cst : f32) outs(%12 : tensor<2x2x8x8x4x4xf32>) -> tensor<2x2x8x8x4x4xf32>
    %14 = scf.for %arg3 = %c0 to %c8 step %c1 iter_args(%arg4 = %13) -> (tensor<2x2x8x8x4x4xf32>) {
      %15 = affine.apply affine_map<(d0) -> (d0 * 32)>(%arg3)
      %extracted_slice_7 = tensor.extract_slice %extracted_slice[0, %15] [64, 32] [1, 1] : tensor<64x256xbf16> to tensor<64x32xbf16>
      %extracted_slice_8 = tensor.extract_slice %7[0, %arg3, 0, 0] [2, 1, 32, 32] [1, 1, 1, 1] : tensor<2x8x32x32xbf16> to tensor<2x1x32x32xbf16>
      %pack_9 = tensor.pack %extracted_slice_7 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %extracted_slice_8 : tensor<64x32xbf16> -> tensor<2x1x32x32xbf16>
      %extracted_slice_10 = tensor.extract_slice %pack[0, %arg3, 0, 0] [2, 1, 32, 32] [1, 1, 1, 1] : tensor<2x8x32x32xbf16> to tensor<2x1x32x32xbf16>
      %extracted_slice_11 = tensor.extract_slice %10[0, %arg3, 0, 0, 0, 0] [2, 1, 4, 8, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<2x8x4x8x4x8xbf16> to tensor<2x1x4x8x4x8xbf16>
      %pack_12 = tensor.pack %pack_9 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %extracted_slice_11 : tensor<2x1x32x32xbf16> -> tensor<2x1x4x8x4x8xbf16>
      %extracted_slice_13 = tensor.extract_slice %pack_3[0, %arg3, 0, 0, 0, 0] [2, 1, 4, 8, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<2x8x4x8x4x8xbf16> to tensor<2x1x4x8x4x8xbf16>
      %16 = affine.apply affine_map<(d0) -> (d0 * 32)>(%arg3)
      %extracted_slice_14 = tensor.extract_slice %extracted_slice_0[%16, 0] [32, 64] [1, 1] : tensor<256x64xbf16> to tensor<32x64xbf16>
      %extracted_slice_15 = tensor.extract_slice %8[%arg3, 0, 0, 0] [1, 2, 32, 32] [1, 1, 1, 1] : tensor<8x2x32x32xbf16> to tensor<1x2x32x32xbf16>
      %pack_16 = tensor.pack %extracted_slice_14 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %extracted_slice_15 : tensor<32x64xbf16> -> tensor<1x2x32x32xbf16>
      %extracted_slice_17 = tensor.extract_slice %pack_2[%arg3, 0, 0, 0] [1, 2, 32, 32] [1, 1, 1, 1] : tensor<8x2x32x32xbf16> to tensor<1x2x32x32xbf16>
      %extracted_slice_18 = tensor.extract_slice %11[%arg3, 0, 0, 0, 0, 0] [1, 2, 8, 4, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<8x2x8x4x8x4xbf16> to tensor<1x2x8x4x8x4xbf16>
      %pack_19 = tensor.pack %pack_16 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %extracted_slice_18 : tensor<1x2x32x32xbf16> -> tensor<1x2x8x4x8x4xbf16>
      %extracted_slice_20 = tensor.extract_slice %pack_4[%arg3, 0, 0, 0, 0, 0] [1, 2, 8, 4, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<8x2x8x4x8x4xbf16> to tensor<1x2x8x4x8x4xbf16>
      %17 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_12, %pack_19 : tensor<2x1x4x8x4x8xbf16>, tensor<1x2x8x4x8x4xbf16>) outs(%arg4 : tensor<2x2x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
      ^bb0(%in: bf16, %in_21: bf16, %out: f32):
        %18 = arith.extf %in : bf16 to f32
        %19 = arith.extf %in_21 : bf16 to f32
        %20 = arith.mulf %18, %19 : f32
        %21 = arith.addf %out, %20 : f32
        linalg.yield %21 : f32
      } -> tensor<2x2x8x8x4x4xf32>
      scf.yield %17 : tensor<2x2x8x8x4x4xf32>
    }
    %unpack = tensor.unpack %14 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %9 : tensor<2x2x8x8x4x4xf32> -> tensor<2x2x32x32xf32>
    %unpack_6 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %extracted_slice_1 : tensor<2x2x32x32xf32> -> tensor<64x64xf32>
    memref.dealloc %alloc : memref<2x2x32x32xf32, 1 : i32>
    memref.dealloc %alloc_5 : memref<2x2x8x8x4x4xf32, 2 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_6 into %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<64x64xf32> into tensor<128x128xf32>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  return
}

// -----// IR Dump Before CSE (cse) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c1 = arith.constant 1 : index
  %c8 = arith.constant 8 : index
  %cst = arith.constant 0.000000e+00 : f32
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (128, 128) step (64, 64) shared_outs(%arg2 = %5) -> (tensor<128x128xf32>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [64, 256] [1, 1] : tensor<128x256xbf16> to tensor<64x256xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [256, 64] [1, 1] : tensor<256x128xbf16> to tensor<256x64xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<128x128xf32> to tensor<64x64xf32>
    %7 = tensor.empty() : tensor<2x8x32x32xbf16>
    %8 = tensor.empty() : tensor<8x2x32x32xbf16>
    %alloc = memref.alloc() : memref<2x2x32x32xf32, 1 : i32>
    %9 = bufferization.to_tensor %alloc restrict writable : memref<2x2x32x32xf32, 1 : i32>
    %10 = tensor.empty() : tensor<2x8x4x8x4x8xbf16>
    %11 = tensor.empty() : tensor<8x2x8x4x8x4xbf16>
    %alloc_2 = memref.alloc() : memref<2x2x8x8x4x4xf32, 2 : i32>
    %12 = bufferization.to_tensor %alloc_2 restrict writable : memref<2x2x8x8x4x4xf32, 2 : i32>
    %13 = linalg.fill ins(%cst : f32) outs(%12 : tensor<2x2x8x8x4x4xf32>) -> tensor<2x2x8x8x4x4xf32>
    %14 = scf.for %arg3 = %c0 to %c8 step %c1 iter_args(%arg4 = %13) -> (tensor<2x2x8x8x4x4xf32>) {
      %15 = affine.apply affine_map<(d0) -> (d0 * 32)>(%arg3)
      %extracted_slice_4 = tensor.extract_slice %extracted_slice[0, %15] [64, 32] [1, 1] : tensor<64x256xbf16> to tensor<64x32xbf16>
      %extracted_slice_5 = tensor.extract_slice %7[0, %arg3, 0, 0] [2, 1, 32, 32] [1, 1, 1, 1] : tensor<2x8x32x32xbf16> to tensor<2x1x32x32xbf16>
      %pack = tensor.pack %extracted_slice_4 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %extracted_slice_5 : tensor<64x32xbf16> -> tensor<2x1x32x32xbf16>
      %extracted_slice_6 = tensor.extract_slice %10[0, %arg3, 0, 0, 0, 0] [2, 1, 4, 8, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<2x8x4x8x4x8xbf16> to tensor<2x1x4x8x4x8xbf16>
      %pack_7 = tensor.pack %pack outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %extracted_slice_6 : tensor<2x1x32x32xbf16> -> tensor<2x1x4x8x4x8xbf16>
      %16 = affine.apply affine_map<(d0) -> (d0 * 32)>(%arg3)
      %extracted_slice_8 = tensor.extract_slice %extracted_slice_0[%16, 0] [32, 64] [1, 1] : tensor<256x64xbf16> to tensor<32x64xbf16>
      %extracted_slice_9 = tensor.extract_slice %8[%arg3, 0, 0, 0] [1, 2, 32, 32] [1, 1, 1, 1] : tensor<8x2x32x32xbf16> to tensor<1x2x32x32xbf16>
      %pack_10 = tensor.pack %extracted_slice_8 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %extracted_slice_9 : tensor<32x64xbf16> -> tensor<1x2x32x32xbf16>
      %extracted_slice_11 = tensor.extract_slice %11[%arg3, 0, 0, 0, 0, 0] [1, 2, 8, 4, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<8x2x8x4x8x4xbf16> to tensor<1x2x8x4x8x4xbf16>
      %pack_12 = tensor.pack %pack_10 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %extracted_slice_11 : tensor<1x2x32x32xbf16> -> tensor<1x2x8x4x8x4xbf16>
      %17 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_7, %pack_12 : tensor<2x1x4x8x4x8xbf16>, tensor<1x2x8x4x8x4xbf16>) outs(%arg4 : tensor<2x2x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
      ^bb0(%in: bf16, %in_13: bf16, %out: f32):
        %18 = arith.extf %in : bf16 to f32
        %19 = arith.extf %in_13 : bf16 to f32
        %20 = arith.mulf %18, %19 : f32
        %21 = arith.addf %out, %20 : f32
        linalg.yield %21 : f32
      } -> tensor<2x2x8x8x4x4xf32>
      scf.yield %17 : tensor<2x2x8x8x4x4xf32>
    }
    %unpack = tensor.unpack %14 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %9 : tensor<2x2x8x8x4x4xf32> -> tensor<2x2x32x32xf32>
    %unpack_3 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %extracted_slice_1 : tensor<2x2x32x32xf32> -> tensor<64x64xf32>
    memref.dealloc %alloc : memref<2x2x32x32xf32, 1 : i32>
    memref.dealloc %alloc_2 : memref<2x2x8x8x4x4xf32, 2 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_3 into %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<64x64xf32> into tensor<128x128xf32>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  return
}

// -----// IR Dump Before AMDAIEBufferizeToAllocation (iree-amdaie-bufferize-to-allocation) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c1 = arith.constant 1 : index
  %c8 = arith.constant 8 : index
  %cst = arith.constant 0.000000e+00 : f32
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (128, 128) step (64, 64) shared_outs(%arg2 = %5) -> (tensor<128x128xf32>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [64, 256] [1, 1] : tensor<128x256xbf16> to tensor<64x256xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [256, 64] [1, 1] : tensor<256x128xbf16> to tensor<256x64xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<128x128xf32> to tensor<64x64xf32>
    %7 = tensor.empty() : tensor<2x8x32x32xbf16>
    %8 = tensor.empty() : tensor<8x2x32x32xbf16>
    %alloc = memref.alloc() : memref<2x2x32x32xf32, 1 : i32>
    %9 = bufferization.to_tensor %alloc restrict writable : memref<2x2x32x32xf32, 1 : i32>
    %10 = tensor.empty() : tensor<2x8x4x8x4x8xbf16>
    %11 = tensor.empty() : tensor<8x2x8x4x8x4xbf16>
    %alloc_2 = memref.alloc() : memref<2x2x8x8x4x4xf32, 2 : i32>
    %12 = bufferization.to_tensor %alloc_2 restrict writable : memref<2x2x8x8x4x4xf32, 2 : i32>
    %13 = linalg.fill ins(%cst : f32) outs(%12 : tensor<2x2x8x8x4x4xf32>) -> tensor<2x2x8x8x4x4xf32>
    %14 = scf.for %arg3 = %c0 to %c8 step %c1 iter_args(%arg4 = %13) -> (tensor<2x2x8x8x4x4xf32>) {
      %15 = affine.apply affine_map<(d0) -> (d0 * 32)>(%arg3)
      %extracted_slice_4 = tensor.extract_slice %extracted_slice[0, %15] [64, 32] [1, 1] : tensor<64x256xbf16> to tensor<64x32xbf16>
      %extracted_slice_5 = tensor.extract_slice %7[0, %arg3, 0, 0] [2, 1, 32, 32] [1, 1, 1, 1] : tensor<2x8x32x32xbf16> to tensor<2x1x32x32xbf16>
      %pack = tensor.pack %extracted_slice_4 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %extracted_slice_5 : tensor<64x32xbf16> -> tensor<2x1x32x32xbf16>
      %extracted_slice_6 = tensor.extract_slice %10[0, %arg3, 0, 0, 0, 0] [2, 1, 4, 8, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<2x8x4x8x4x8xbf16> to tensor<2x1x4x8x4x8xbf16>
      %pack_7 = tensor.pack %pack outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %extracted_slice_6 : tensor<2x1x32x32xbf16> -> tensor<2x1x4x8x4x8xbf16>
      %extracted_slice_8 = tensor.extract_slice %extracted_slice_0[%15, 0] [32, 64] [1, 1] : tensor<256x64xbf16> to tensor<32x64xbf16>
      %extracted_slice_9 = tensor.extract_slice %8[%arg3, 0, 0, 0] [1, 2, 32, 32] [1, 1, 1, 1] : tensor<8x2x32x32xbf16> to tensor<1x2x32x32xbf16>
      %pack_10 = tensor.pack %extracted_slice_8 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %extracted_slice_9 : tensor<32x64xbf16> -> tensor<1x2x32x32xbf16>
      %extracted_slice_11 = tensor.extract_slice %11[%arg3, 0, 0, 0, 0, 0] [1, 2, 8, 4, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<8x2x8x4x8x4xbf16> to tensor<1x2x8x4x8x4xbf16>
      %pack_12 = tensor.pack %pack_10 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %extracted_slice_11 : tensor<1x2x32x32xbf16> -> tensor<1x2x8x4x8x4xbf16>
      %16 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_7, %pack_12 : tensor<2x1x4x8x4x8xbf16>, tensor<1x2x8x4x8x4xbf16>) outs(%arg4 : tensor<2x2x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
      ^bb0(%in: bf16, %in_13: bf16, %out: f32):
        %17 = arith.extf %in : bf16 to f32
        %18 = arith.extf %in_13 : bf16 to f32
        %19 = arith.mulf %17, %18 : f32
        %20 = arith.addf %out, %19 : f32
        linalg.yield %20 : f32
      } -> tensor<2x2x8x8x4x4xf32>
      scf.yield %16 : tensor<2x2x8x8x4x4xf32>
    }
    %unpack = tensor.unpack %14 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %9 : tensor<2x2x8x8x4x4xf32> -> tensor<2x2x32x32xf32>
    %unpack_3 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %extracted_slice_1 : tensor<2x2x32x32xf32> -> tensor<64x64xf32>
    memref.dealloc %alloc : memref<2x2x32x32xf32, 1 : i32>
    memref.dealloc %alloc_2 : memref<2x2x8x8x4x4xf32, 2 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_3 into %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<64x64xf32> into tensor<128x128xf32>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  return
}

// -----// IR Dump Before AMDAIETileAndFuse (iree-amdaie-tile-and-fuse) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c1 = arith.constant 1 : index
  %c8 = arith.constant 8 : index
  %cst = arith.constant 0.000000e+00 : f32
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (128, 128) step (64, 64) shared_outs(%arg2 = %5) -> (tensor<128x128xf32>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [64, 256] [1, 1] : tensor<128x256xbf16> to tensor<64x256xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [256, 64] [1, 1] : tensor<256x128xbf16> to tensor<256x64xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<128x128xf32> to tensor<64x64xf32>
    %7 = tensor.empty() : tensor<2x8x32x32xbf16>
    %8 = tensor.empty() : tensor<8x2x32x32xbf16>
    %alloc = memref.alloc() : memref<2x2x32x32xf32, 1 : i32>
    %9 = bufferization.to_tensor %alloc restrict writable : memref<2x2x32x32xf32, 1 : i32>
    %10 = tensor.empty() : tensor<2x8x4x8x4x8xbf16>
    %11 = tensor.empty() : tensor<8x2x8x4x8x4xbf16>
    %alloc_2 = memref.alloc() : memref<2x2x8x8x4x4xf32, 2 : i32>
    %12 = bufferization.to_tensor %alloc_2 restrict writable : memref<2x2x8x8x4x4xf32, 2 : i32>
    %13 = linalg.fill ins(%cst : f32) outs(%12 : tensor<2x2x8x8x4x4xf32>) -> tensor<2x2x8x8x4x4xf32>
    %14 = scf.for %arg3 = %c0 to %c8 step %c1 iter_args(%arg4 = %13) -> (tensor<2x2x8x8x4x4xf32>) {
      %15 = affine.apply affine_map<(d0) -> (d0 * 32)>(%arg3)
      %extracted_slice_4 = tensor.extract_slice %extracted_slice[0, %15] [64, 32] [1, 1] : tensor<64x256xbf16> to tensor<64x32xbf16>
      %extracted_slice_5 = tensor.extract_slice %7[0, %arg3, 0, 0] [2, 1, 32, 32] [1, 1, 1, 1] : tensor<2x8x32x32xbf16> to tensor<2x1x32x32xbf16>
      %alloc_6 = memref.alloc() : memref<2x1x32x32xbf16, 1 : i32>
      %16 = bufferization.to_tensor %alloc_6 restrict writable : memref<2x1x32x32xbf16, 1 : i32>
      %pack = tensor.pack %extracted_slice_4 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %16 : tensor<64x32xbf16> -> tensor<2x1x32x32xbf16>
      %extracted_slice_7 = tensor.extract_slice %10[0, %arg3, 0, 0, 0, 0] [2, 1, 4, 8, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<2x8x4x8x4x8xbf16> to tensor<2x1x4x8x4x8xbf16>
      %pack_8 = tensor.pack %pack outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %extracted_slice_7 : tensor<2x1x32x32xbf16> -> tensor<2x1x4x8x4x8xbf16>
      %extracted_slice_9 = tensor.extract_slice %extracted_slice_0[%15, 0] [32, 64] [1, 1] : tensor<256x64xbf16> to tensor<32x64xbf16>
      %extracted_slice_10 = tensor.extract_slice %8[%arg3, 0, 0, 0] [1, 2, 32, 32] [1, 1, 1, 1] : tensor<8x2x32x32xbf16> to tensor<1x2x32x32xbf16>
      %alloc_11 = memref.alloc() : memref<1x2x32x32xbf16, 1 : i32>
      %17 = bufferization.to_tensor %alloc_11 restrict writable : memref<1x2x32x32xbf16, 1 : i32>
      %pack_12 = tensor.pack %extracted_slice_9 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %17 : tensor<32x64xbf16> -> tensor<1x2x32x32xbf16>
      %extracted_slice_13 = tensor.extract_slice %11[%arg3, 0, 0, 0, 0, 0] [1, 2, 8, 4, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<8x2x8x4x8x4xbf16> to tensor<1x2x8x4x8x4xbf16>
      %pack_14 = tensor.pack %pack_12 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %extracted_slice_13 : tensor<1x2x32x32xbf16> -> tensor<1x2x8x4x8x4xbf16>
      %18 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_8, %pack_14 : tensor<2x1x4x8x4x8xbf16>, tensor<1x2x8x4x8x4xbf16>) outs(%arg4 : tensor<2x2x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
      ^bb0(%in: bf16, %in_15: bf16, %out: f32):
        %19 = arith.extf %in : bf16 to f32
        %20 = arith.extf %in_15 : bf16 to f32
        %21 = arith.mulf %19, %20 : f32
        %22 = arith.addf %out, %21 : f32
        linalg.yield %22 : f32
      } -> tensor<2x2x8x8x4x4xf32>
      memref.dealloc %alloc_6 : memref<2x1x32x32xbf16, 1 : i32>
      memref.dealloc %alloc_11 : memref<1x2x32x32xbf16, 1 : i32>
      scf.yield %18 : tensor<2x2x8x8x4x4xf32>
    }
    %unpack = tensor.unpack %14 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %9 : tensor<2x2x8x8x4x4xf32> -> tensor<2x2x32x32xf32>
    %unpack_3 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %extracted_slice_1 : tensor<2x2x32x32xf32> -> tensor<64x64xf32>
    memref.dealloc %alloc : memref<2x2x32x32xf32, 1 : i32>
    memref.dealloc %alloc_2 : memref<2x2x8x8x4x4xf32, 2 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_3 into %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<64x64xf32> into tensor<128x128xf32>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  return
}

// -----// IR Dump Before AMDAIECleanup (iree-amdaie-cleanup) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c1 = arith.constant 1 : index
  %c8 = arith.constant 8 : index
  %cst = arith.constant 0.000000e+00 : f32
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (128, 128) step (64, 64) shared_outs(%arg2 = %5) -> (tensor<128x128xf32>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [64, 256] [1, 1] : tensor<128x256xbf16> to tensor<64x256xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [256, 64] [1, 1] : tensor<256x128xbf16> to tensor<256x64xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<128x128xf32> to tensor<64x64xf32>
    %7 = tensor.empty() : tensor<2x8x32x32xbf16>
    %8 = tensor.empty() : tensor<8x2x32x32xbf16>
    %alloc = memref.alloc() : memref<2x2x32x32xf32, 1 : i32>
    %9 = bufferization.to_tensor %alloc restrict writable : memref<2x2x32x32xf32, 1 : i32>
    %10 = tensor.empty() : tensor<2x8x4x8x4x8xbf16>
    %11 = tensor.empty() : tensor<8x2x8x4x8x4xbf16>
    %alloc_2 = memref.alloc() : memref<2x2x8x8x4x4xf32, 2 : i32>
    %12 = bufferization.to_tensor %alloc_2 restrict writable : memref<2x2x8x8x4x4xf32, 2 : i32>
    %13 = linalg.fill ins(%cst : f32) outs(%12 : tensor<2x2x8x8x4x4xf32>) -> tensor<2x2x8x8x4x4xf32>
    %14 = scf.for %arg3 = %c0 to %c8 step %c1 iter_args(%arg4 = %13) -> (tensor<2x2x8x8x4x4xf32>) {
      %15 = affine.apply affine_map<(d0) -> (d0 * 32)>(%arg3)
      %extracted_slice_4 = tensor.extract_slice %extracted_slice[0, %15] [64, 32] [1, 1] : tensor<64x256xbf16> to tensor<64x32xbf16>
      %extracted_slice_5 = tensor.extract_slice %7[0, %arg3, 0, 0] [2, 1, 32, 32] [1, 1, 1, 1] : tensor<2x8x32x32xbf16> to tensor<2x1x32x32xbf16>
      %alloc_6 = memref.alloc() : memref<2x1x32x32xbf16, 1 : i32>
      %16 = bufferization.to_tensor %alloc_6 restrict writable : memref<2x1x32x32xbf16, 1 : i32>
      %pack = tensor.pack %extracted_slice_4 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %16 : tensor<64x32xbf16> -> tensor<2x1x32x32xbf16>
      %extracted_slice_7 = tensor.extract_slice %10[0, %arg3, 0, 0, 0, 0] [2, 1, 4, 8, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<2x8x4x8x4x8xbf16> to tensor<2x1x4x8x4x8xbf16>
      %pack_8 = tensor.pack %pack outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %extracted_slice_7 : tensor<2x1x32x32xbf16> -> tensor<2x1x4x8x4x8xbf16>
      %extracted_slice_9 = tensor.extract_slice %extracted_slice_0[%15, 0] [32, 64] [1, 1] : tensor<256x64xbf16> to tensor<32x64xbf16>
      %extracted_slice_10 = tensor.extract_slice %8[%arg3, 0, 0, 0] [1, 2, 32, 32] [1, 1, 1, 1] : tensor<8x2x32x32xbf16> to tensor<1x2x32x32xbf16>
      %alloc_11 = memref.alloc() : memref<1x2x32x32xbf16, 1 : i32>
      %17 = bufferization.to_tensor %alloc_11 restrict writable : memref<1x2x32x32xbf16, 1 : i32>
      %pack_12 = tensor.pack %extracted_slice_9 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %17 : tensor<32x64xbf16> -> tensor<1x2x32x32xbf16>
      %extracted_slice_13 = tensor.extract_slice %11[%arg3, 0, 0, 0, 0, 0] [1, 2, 8, 4, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<8x2x8x4x8x4xbf16> to tensor<1x2x8x4x8x4xbf16>
      %pack_14 = tensor.pack %pack_12 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %extracted_slice_13 : tensor<1x2x32x32xbf16> -> tensor<1x2x8x4x8x4xbf16>
      %18 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_8, %pack_14 : tensor<2x1x4x8x4x8xbf16>, tensor<1x2x8x4x8x4xbf16>) outs(%arg4 : tensor<2x2x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
      ^bb0(%in: bf16, %in_15: bf16, %out: f32):
        %20 = arith.extf %in : bf16 to f32
        %21 = arith.extf %in_15 : bf16 to f32
        %22 = arith.mulf %20, %21 : f32
        %23 = arith.addf %out, %22 : f32
        linalg.yield %23 : f32
      } -> tensor<2x2x8x8x4x4xf32>
      %19 = scf.forall (%arg5, %arg6) in (2, 2) shared_outs(%arg7 = %arg4) -> (tensor<2x2x8x8x4x4xf32>) {
        %extracted_slice_15 = tensor.extract_slice %pack_8[%arg5, 0, 0, 0, 0, 0] [1, 1, 4, 8, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<2x1x4x8x4x8xbf16> to tensor<1x1x4x8x4x8xbf16>
        %extracted_slice_16 = tensor.extract_slice %pack_14[0, %arg6, 0, 0, 0, 0] [1, 1, 8, 4, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<1x2x8x4x8x4xbf16> to tensor<1x1x8x4x8x4xbf16>
        %extracted_slice_17 = tensor.extract_slice %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
        %20 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%extracted_slice_15, %extracted_slice_16 : tensor<1x1x4x8x4x8xbf16>, tensor<1x1x8x4x8x4xbf16>) outs(%extracted_slice_17 : tensor<1x1x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
        ^bb0(%in: bf16, %in_18: bf16, %out: f32):
          %21 = arith.extf %in : bf16 to f32
          %22 = arith.extf %in_18 : bf16 to f32
          %23 = arith.mulf %21, %22 : f32
          %24 = arith.addf %out, %23 : f32
          linalg.yield %24 : f32
        } -> tensor<1x1x8x8x4x4xf32>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %20 into %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> into tensor<2x2x8x8x4x4xf32>
        }
      } {mapping = [#gpu.thread<y>, #gpu.thread<x>]}
      memref.dealloc %alloc_6 : memref<2x1x32x32xbf16, 1 : i32>
      memref.dealloc %alloc_11 : memref<1x2x32x32xbf16, 1 : i32>
      scf.yield %19 : tensor<2x2x8x8x4x4xf32>
    }
    %unpack = tensor.unpack %14 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %9 : tensor<2x2x8x8x4x4xf32> -> tensor<2x2x32x32xf32>
    %unpack_3 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %extracted_slice_1 : tensor<2x2x32x32xf32> -> tensor<64x64xf32>
    memref.dealloc %alloc : memref<2x2x32x32xf32, 1 : i32>
    memref.dealloc %alloc_2 : memref<2x2x8x8x4x4xf32, 2 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_3 into %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<64x64xf32> into tensor<128x128xf32>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  return
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c1 = arith.constant 1 : index
  %c8 = arith.constant 8 : index
  %cst = arith.constant 0.000000e+00 : f32
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (128, 128) step (64, 64) shared_outs(%arg2 = %5) -> (tensor<128x128xf32>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [64, 256] [1, 1] : tensor<128x256xbf16> to tensor<64x256xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [256, 64] [1, 1] : tensor<256x128xbf16> to tensor<256x64xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<128x128xf32> to tensor<64x64xf32>
    %alloc = memref.alloc() : memref<2x2x32x32xf32, 1 : i32>
    %7 = bufferization.to_tensor %alloc restrict writable : memref<2x2x32x32xf32, 1 : i32>
    %alloc_2 = memref.alloc() : memref<2x2x8x8x4x4xf32, 2 : i32>
    %8 = bufferization.to_tensor %alloc_2 restrict writable : memref<2x2x8x8x4x4xf32, 2 : i32>
    %9 = linalg.fill ins(%cst : f32) outs(%8 : tensor<2x2x8x8x4x4xf32>) -> tensor<2x2x8x8x4x4xf32>
    %10 = tensor.empty() : tensor<2x1x4x8x4x8xbf16>
    %11 = tensor.empty() : tensor<1x2x8x4x8x4xbf16>
    %12 = scf.for %arg3 = %c0 to %c8 step %c1 iter_args(%arg4 = %9) -> (tensor<2x2x8x8x4x4xf32>) {
      %13 = affine.apply affine_map<(d0) -> (d0 * 32)>(%arg3)
      %extracted_slice_4 = tensor.extract_slice %extracted_slice[0, %13] [64, 32] [1, 1] : tensor<64x256xbf16> to tensor<64x32xbf16>
      %alloc_5 = memref.alloc() : memref<2x1x32x32xbf16, 1 : i32>
      %14 = bufferization.to_tensor %alloc_5 restrict writable : memref<2x1x32x32xbf16, 1 : i32>
      %pack = tensor.pack %extracted_slice_4 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %14 : tensor<64x32xbf16> -> tensor<2x1x32x32xbf16>
      %pack_6 = tensor.pack %pack outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %10 : tensor<2x1x32x32xbf16> -> tensor<2x1x4x8x4x8xbf16>
      %extracted_slice_7 = tensor.extract_slice %extracted_slice_0[%13, 0] [32, 64] [1, 1] : tensor<256x64xbf16> to tensor<32x64xbf16>
      %alloc_8 = memref.alloc() : memref<1x2x32x32xbf16, 1 : i32>
      %15 = bufferization.to_tensor %alloc_8 restrict writable : memref<1x2x32x32xbf16, 1 : i32>
      %pack_9 = tensor.pack %extracted_slice_7 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %15 : tensor<32x64xbf16> -> tensor<1x2x32x32xbf16>
      %pack_10 = tensor.pack %pack_9 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %11 : tensor<1x2x32x32xbf16> -> tensor<1x2x8x4x8x4xbf16>
      %16 = scf.forall (%arg5, %arg6) in (2, 2) shared_outs(%arg7 = %arg4) -> (tensor<2x2x8x8x4x4xf32>) {
        %extracted_slice_11 = tensor.extract_slice %pack_6[%arg5, 0, 0, 0, 0, 0] [1, 1, 4, 8, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<2x1x4x8x4x8xbf16> to tensor<1x1x4x8x4x8xbf16>
        %extracted_slice_12 = tensor.extract_slice %pack_10[0, %arg6, 0, 0, 0, 0] [1, 1, 8, 4, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<1x2x8x4x8x4xbf16> to tensor<1x1x8x4x8x4xbf16>
        %extracted_slice_13 = tensor.extract_slice %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
        %17 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%extracted_slice_11, %extracted_slice_12 : tensor<1x1x4x8x4x8xbf16>, tensor<1x1x8x4x8x4xbf16>) outs(%extracted_slice_13 : tensor<1x1x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
        ^bb0(%in: bf16, %in_14: bf16, %out: f32):
          %18 = arith.extf %in : bf16 to f32
          %19 = arith.extf %in_14 : bf16 to f32
          %20 = arith.mulf %18, %19 : f32
          %21 = arith.addf %out, %20 : f32
          linalg.yield %21 : f32
        } -> tensor<1x1x8x8x4x4xf32>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %17 into %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> into tensor<2x2x8x8x4x4xf32>
        }
      } {mapping = [#gpu.thread<y>, #gpu.thread<x>]}
      memref.dealloc %alloc_5 : memref<2x1x32x32xbf16, 1 : i32>
      memref.dealloc %alloc_8 : memref<1x2x32x32xbf16, 1 : i32>
      scf.yield %16 : tensor<2x2x8x8x4x4xf32>
    }
    %unpack = tensor.unpack %12 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %7 : tensor<2x2x8x8x4x4xf32> -> tensor<2x2x32x32xf32>
    %unpack_3 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %extracted_slice_1 : tensor<2x2x32x32xf32> -> tensor<64x64xf32>
    memref.dealloc %alloc : memref<2x2x32x32xf32, 1 : i32>
    memref.dealloc %alloc_2 : memref<2x2x8x8x4x4xf32, 2 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_3 into %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<64x64xf32> into tensor<128x128xf32>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  return
}

// -----// IR Dump Before CSE (cse) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c1 = arith.constant 1 : index
  %c8 = arith.constant 8 : index
  %cst = arith.constant 0.000000e+00 : f32
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (128, 128) step (64, 64) shared_outs(%arg2 = %5) -> (tensor<128x128xf32>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [64, 256] [1, 1] : tensor<128x256xbf16> to tensor<64x256xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [256, 64] [1, 1] : tensor<256x128xbf16> to tensor<256x64xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<128x128xf32> to tensor<64x64xf32>
    %alloc = memref.alloc() : memref<2x2x32x32xf32, 1 : i32>
    %7 = bufferization.to_tensor %alloc restrict writable : memref<2x2x32x32xf32, 1 : i32>
    %alloc_2 = memref.alloc() : memref<2x2x8x8x4x4xf32, 2 : i32>
    %8 = bufferization.to_tensor %alloc_2 restrict writable : memref<2x2x8x8x4x4xf32, 2 : i32>
    %9 = linalg.fill ins(%cst : f32) outs(%8 : tensor<2x2x8x8x4x4xf32>) -> tensor<2x2x8x8x4x4xf32>
    %10 = tensor.empty() : tensor<2x1x4x8x4x8xbf16>
    %11 = tensor.empty() : tensor<1x2x8x4x8x4xbf16>
    %12 = scf.for %arg3 = %c0 to %c8 step %c1 iter_args(%arg4 = %9) -> (tensor<2x2x8x8x4x4xf32>) {
      %13 = affine.apply affine_map<(d0) -> (d0 * 32)>(%arg3)
      %extracted_slice_4 = tensor.extract_slice %extracted_slice[0, %13] [64, 32] [1, 1] : tensor<64x256xbf16> to tensor<64x32xbf16>
      %alloc_5 = memref.alloc() : memref<2x1x32x32xbf16, 1 : i32>
      %14 = bufferization.to_tensor %alloc_5 restrict writable : memref<2x1x32x32xbf16, 1 : i32>
      %pack = tensor.pack %extracted_slice_4 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %14 : tensor<64x32xbf16> -> tensor<2x1x32x32xbf16>
      %pack_6 = tensor.pack %pack outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %10 : tensor<2x1x32x32xbf16> -> tensor<2x1x4x8x4x8xbf16>
      %extracted_slice_7 = tensor.extract_slice %extracted_slice_0[%13, 0] [32, 64] [1, 1] : tensor<256x64xbf16> to tensor<32x64xbf16>
      %alloc_8 = memref.alloc() : memref<1x2x32x32xbf16, 1 : i32>
      %15 = bufferization.to_tensor %alloc_8 restrict writable : memref<1x2x32x32xbf16, 1 : i32>
      %pack_9 = tensor.pack %extracted_slice_7 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %15 : tensor<32x64xbf16> -> tensor<1x2x32x32xbf16>
      %pack_10 = tensor.pack %pack_9 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %11 : tensor<1x2x32x32xbf16> -> tensor<1x2x8x4x8x4xbf16>
      %16 = scf.forall (%arg5, %arg6) in (2, 2) shared_outs(%arg7 = %arg4) -> (tensor<2x2x8x8x4x4xf32>) {
        %extracted_slice_11 = tensor.extract_slice %pack_6[%arg5, 0, 0, 0, 0, 0] [1, 1, 4, 8, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<2x1x4x8x4x8xbf16> to tensor<1x1x4x8x4x8xbf16>
        %extracted_slice_12 = tensor.extract_slice %pack_10[0, %arg6, 0, 0, 0, 0] [1, 1, 8, 4, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<1x2x8x4x8x4xbf16> to tensor<1x1x8x4x8x4xbf16>
        %extracted_slice_13 = tensor.extract_slice %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
        %17 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%extracted_slice_11, %extracted_slice_12 : tensor<1x1x4x8x4x8xbf16>, tensor<1x1x8x4x8x4xbf16>) outs(%extracted_slice_13 : tensor<1x1x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
        ^bb0(%in: bf16, %in_14: bf16, %out: f32):
          %18 = arith.extf %in : bf16 to f32
          %19 = arith.extf %in_14 : bf16 to f32
          %20 = arith.mulf %18, %19 : f32
          %21 = arith.addf %out, %20 : f32
          linalg.yield %21 : f32
        } -> tensor<1x1x8x8x4x4xf32>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %17 into %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> into tensor<2x2x8x8x4x4xf32>
        }
      } {mapping = [#gpu.thread<y>, #gpu.thread<x>]}
      memref.dealloc %alloc_5 : memref<2x1x32x32xbf16, 1 : i32>
      memref.dealloc %alloc_8 : memref<1x2x32x32xbf16, 1 : i32>
      scf.yield %16 : tensor<2x2x8x8x4x4xf32>
    }
    %unpack = tensor.unpack %12 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %7 : tensor<2x2x8x8x4x4xf32> -> tensor<2x2x32x32xf32>
    %unpack_3 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %extracted_slice_1 : tensor<2x2x32x32xf32> -> tensor<64x64xf32>
    memref.dealloc %alloc : memref<2x2x32x32xf32, 1 : i32>
    memref.dealloc %alloc_2 : memref<2x2x8x8x4x4xf32, 2 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_3 into %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<64x64xf32> into tensor<128x128xf32>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  return
}

// -----// IR Dump Before AMDAIEFusePackIntoLoop (iree-amdaie-fuse-pack-into-loop) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c1 = arith.constant 1 : index
  %c8 = arith.constant 8 : index
  %cst = arith.constant 0.000000e+00 : f32
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (128, 128) step (64, 64) shared_outs(%arg2 = %5) -> (tensor<128x128xf32>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [64, 256] [1, 1] : tensor<128x256xbf16> to tensor<64x256xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [256, 64] [1, 1] : tensor<256x128xbf16> to tensor<256x64xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<128x128xf32> to tensor<64x64xf32>
    %alloc = memref.alloc() : memref<2x2x32x32xf32, 1 : i32>
    %7 = bufferization.to_tensor %alloc restrict writable : memref<2x2x32x32xf32, 1 : i32>
    %alloc_2 = memref.alloc() : memref<2x2x8x8x4x4xf32, 2 : i32>
    %8 = bufferization.to_tensor %alloc_2 restrict writable : memref<2x2x8x8x4x4xf32, 2 : i32>
    %9 = linalg.fill ins(%cst : f32) outs(%8 : tensor<2x2x8x8x4x4xf32>) -> tensor<2x2x8x8x4x4xf32>
    %10 = tensor.empty() : tensor<2x1x4x8x4x8xbf16>
    %11 = tensor.empty() : tensor<1x2x8x4x8x4xbf16>
    %12 = scf.for %arg3 = %c0 to %c8 step %c1 iter_args(%arg4 = %9) -> (tensor<2x2x8x8x4x4xf32>) {
      %13 = affine.apply affine_map<(d0) -> (d0 * 32)>(%arg3)
      %extracted_slice_4 = tensor.extract_slice %extracted_slice[0, %13] [64, 32] [1, 1] : tensor<64x256xbf16> to tensor<64x32xbf16>
      %alloc_5 = memref.alloc() : memref<2x1x32x32xbf16, 1 : i32>
      %14 = bufferization.to_tensor %alloc_5 restrict writable : memref<2x1x32x32xbf16, 1 : i32>
      %pack = tensor.pack %extracted_slice_4 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %14 : tensor<64x32xbf16> -> tensor<2x1x32x32xbf16>
      %pack_6 = tensor.pack %pack outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %10 : tensor<2x1x32x32xbf16> -> tensor<2x1x4x8x4x8xbf16>
      %extracted_slice_7 = tensor.extract_slice %extracted_slice_0[%13, 0] [32, 64] [1, 1] : tensor<256x64xbf16> to tensor<32x64xbf16>
      %alloc_8 = memref.alloc() : memref<1x2x32x32xbf16, 1 : i32>
      %15 = bufferization.to_tensor %alloc_8 restrict writable : memref<1x2x32x32xbf16, 1 : i32>
      %pack_9 = tensor.pack %extracted_slice_7 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %15 : tensor<32x64xbf16> -> tensor<1x2x32x32xbf16>
      %pack_10 = tensor.pack %pack_9 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %11 : tensor<1x2x32x32xbf16> -> tensor<1x2x8x4x8x4xbf16>
      %16 = scf.forall (%arg5, %arg6) in (2, 2) shared_outs(%arg7 = %arg4) -> (tensor<2x2x8x8x4x4xf32>) {
        %extracted_slice_11 = tensor.extract_slice %pack_6[%arg5, 0, 0, 0, 0, 0] [1, 1, 4, 8, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<2x1x4x8x4x8xbf16> to tensor<1x1x4x8x4x8xbf16>
        %extracted_slice_12 = tensor.extract_slice %pack_10[0, %arg6, 0, 0, 0, 0] [1, 1, 8, 4, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<1x2x8x4x8x4xbf16> to tensor<1x1x8x4x8x4xbf16>
        %extracted_slice_13 = tensor.extract_slice %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
        %17 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%extracted_slice_11, %extracted_slice_12 : tensor<1x1x4x8x4x8xbf16>, tensor<1x1x8x4x8x4xbf16>) outs(%extracted_slice_13 : tensor<1x1x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
        ^bb0(%in: bf16, %in_14: bf16, %out: f32):
          %18 = arith.extf %in : bf16 to f32
          %19 = arith.extf %in_14 : bf16 to f32
          %20 = arith.mulf %18, %19 : f32
          %21 = arith.addf %out, %20 : f32
          linalg.yield %21 : f32
        } -> tensor<1x1x8x8x4x4xf32>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %17 into %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> into tensor<2x2x8x8x4x4xf32>
        }
      } {mapping = [#gpu.thread<y>, #gpu.thread<x>]}
      memref.dealloc %alloc_5 : memref<2x1x32x32xbf16, 1 : i32>
      memref.dealloc %alloc_8 : memref<1x2x32x32xbf16, 1 : i32>
      scf.yield %16 : tensor<2x2x8x8x4x4xf32>
    }
    %unpack = tensor.unpack %12 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %7 : tensor<2x2x8x8x4x4xf32> -> tensor<2x2x32x32xf32>
    %unpack_3 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %extracted_slice_1 : tensor<2x2x32x32xf32> -> tensor<64x64xf32>
    memref.dealloc %alloc : memref<2x2x32x32xf32, 1 : i32>
    memref.dealloc %alloc_2 : memref<2x2x8x8x4x4xf32, 2 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_3 into %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<64x64xf32> into tensor<128x128xf32>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  return
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c1 = arith.constant 1 : index
  %c8 = arith.constant 8 : index
  %cst = arith.constant 0.000000e+00 : f32
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (128, 128) step (64, 64) shared_outs(%arg2 = %5) -> (tensor<128x128xf32>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [64, 256] [1, 1] : tensor<128x256xbf16> to tensor<64x256xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [256, 64] [1, 1] : tensor<256x128xbf16> to tensor<256x64xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<128x128xf32> to tensor<64x64xf32>
    %alloc = memref.alloc() : memref<2x2x32x32xf32, 1 : i32>
    %7 = bufferization.to_tensor %alloc restrict writable : memref<2x2x32x32xf32, 1 : i32>
    %alloc_2 = memref.alloc() : memref<2x2x8x8x4x4xf32, 2 : i32>
    %8 = bufferization.to_tensor %alloc_2 restrict writable : memref<2x2x8x8x4x4xf32, 2 : i32>
    %9 = linalg.fill ins(%cst : f32) outs(%8 : tensor<2x2x8x8x4x4xf32>) -> tensor<2x2x8x8x4x4xf32>
    %10 = tensor.empty() : tensor<2x1x4x8x4x8xbf16>
    %11 = tensor.empty() : tensor<1x2x8x4x8x4xbf16>
    %12 = scf.for %arg3 = %c0 to %c8 step %c1 iter_args(%arg4 = %9) -> (tensor<2x2x8x8x4x4xf32>) {
      %13 = affine.apply affine_map<(d0) -> (d0 * 32)>(%arg3)
      %extracted_slice_4 = tensor.extract_slice %extracted_slice[0, %13] [64, 32] [1, 1] : tensor<64x256xbf16> to tensor<64x32xbf16>
      %alloc_5 = memref.alloc() : memref<2x1x32x32xbf16, 1 : i32>
      %14 = bufferization.to_tensor %alloc_5 restrict writable : memref<2x1x32x32xbf16, 1 : i32>
      %pack = tensor.pack %extracted_slice_4 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %14 : tensor<64x32xbf16> -> tensor<2x1x32x32xbf16>
      %pack_6 = tensor.pack %pack outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %10 : tensor<2x1x32x32xbf16> -> tensor<2x1x4x8x4x8xbf16>
      %extracted_slice_7 = tensor.extract_slice %extracted_slice_0[%13, 0] [32, 64] [1, 1] : tensor<256x64xbf16> to tensor<32x64xbf16>
      %alloc_8 = memref.alloc() : memref<1x2x32x32xbf16, 1 : i32>
      %15 = bufferization.to_tensor %alloc_8 restrict writable : memref<1x2x32x32xbf16, 1 : i32>
      %pack_9 = tensor.pack %extracted_slice_7 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %15 : tensor<32x64xbf16> -> tensor<1x2x32x32xbf16>
      %pack_10 = tensor.pack %pack_9 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %11 : tensor<1x2x32x32xbf16> -> tensor<1x2x8x4x8x4xbf16>
      %16 = scf.forall (%arg5, %arg6) in (2, 2) shared_outs(%arg7 = %arg4) -> (tensor<2x2x8x8x4x4xf32>) {
        %extracted_slice_11 = tensor.extract_slice %pack[%arg5, 0, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<2x1x32x32xbf16> to tensor<1x1x32x32xbf16>
        %extracted_slice_12 = tensor.extract_slice %10[%arg5, 0, 0, 0, 0, 0] [1, 1, 4, 8, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<2x1x4x8x4x8xbf16> to tensor<1x1x4x8x4x8xbf16>
        %pack_13 = tensor.pack %extracted_slice_11 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %extracted_slice_12 : tensor<1x1x32x32xbf16> -> tensor<1x1x4x8x4x8xbf16>
        %extracted_slice_14 = tensor.extract_slice %pack_6[%arg5, 0, 0, 0, 0, 0] [1, 1, 4, 8, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<2x1x4x8x4x8xbf16> to tensor<1x1x4x8x4x8xbf16>
        %extracted_slice_15 = tensor.extract_slice %pack_9[0, %arg6, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<1x2x32x32xbf16> to tensor<1x1x32x32xbf16>
        %extracted_slice_16 = tensor.extract_slice %11[0, %arg6, 0, 0, 0, 0] [1, 1, 8, 4, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<1x2x8x4x8x4xbf16> to tensor<1x1x8x4x8x4xbf16>
        %pack_17 = tensor.pack %extracted_slice_15 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %extracted_slice_16 : tensor<1x1x32x32xbf16> -> tensor<1x1x8x4x8x4xbf16>
        %extracted_slice_18 = tensor.extract_slice %pack_10[0, %arg6, 0, 0, 0, 0] [1, 1, 8, 4, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<1x2x8x4x8x4xbf16> to tensor<1x1x8x4x8x4xbf16>
        %extracted_slice_19 = tensor.extract_slice %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
        %17 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_13, %pack_17 : tensor<1x1x4x8x4x8xbf16>, tensor<1x1x8x4x8x4xbf16>) outs(%extracted_slice_19 : tensor<1x1x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
        ^bb0(%in: bf16, %in_20: bf16, %out: f32):
          %18 = arith.extf %in : bf16 to f32
          %19 = arith.extf %in_20 : bf16 to f32
          %20 = arith.mulf %18, %19 : f32
          %21 = arith.addf %out, %20 : f32
          linalg.yield %21 : f32
        } -> tensor<1x1x8x8x4x4xf32>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %17 into %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> into tensor<2x2x8x8x4x4xf32>
        }
      } {mapping = [#gpu.thread<y>, #gpu.thread<x>]}
      memref.dealloc %alloc_5 : memref<2x1x32x32xbf16, 1 : i32>
      memref.dealloc %alloc_8 : memref<1x2x32x32xbf16, 1 : i32>
      scf.yield %16 : tensor<2x2x8x8x4x4xf32>
    }
    %unpack = tensor.unpack %12 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %7 : tensor<2x2x8x8x4x4xf32> -> tensor<2x2x32x32xf32>
    %unpack_3 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %extracted_slice_1 : tensor<2x2x32x32xf32> -> tensor<64x64xf32>
    memref.dealloc %alloc : memref<2x2x32x32xf32, 1 : i32>
    memref.dealloc %alloc_2 : memref<2x2x8x8x4x4xf32, 2 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_3 into %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<64x64xf32> into tensor<128x128xf32>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  return
}

// -----// IR Dump Before CSE (cse) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c1 = arith.constant 1 : index
  %c8 = arith.constant 8 : index
  %cst = arith.constant 0.000000e+00 : f32
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (128, 128) step (64, 64) shared_outs(%arg2 = %5) -> (tensor<128x128xf32>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [64, 256] [1, 1] : tensor<128x256xbf16> to tensor<64x256xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [256, 64] [1, 1] : tensor<256x128xbf16> to tensor<256x64xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<128x128xf32> to tensor<64x64xf32>
    %alloc = memref.alloc() : memref<2x2x32x32xf32, 1 : i32>
    %7 = bufferization.to_tensor %alloc restrict writable : memref<2x2x32x32xf32, 1 : i32>
    %alloc_2 = memref.alloc() : memref<2x2x8x8x4x4xf32, 2 : i32>
    %8 = bufferization.to_tensor %alloc_2 restrict writable : memref<2x2x8x8x4x4xf32, 2 : i32>
    %9 = linalg.fill ins(%cst : f32) outs(%8 : tensor<2x2x8x8x4x4xf32>) -> tensor<2x2x8x8x4x4xf32>
    %10 = tensor.empty() : tensor<2x1x4x8x4x8xbf16>
    %11 = tensor.empty() : tensor<1x2x8x4x8x4xbf16>
    %12 = scf.for %arg3 = %c0 to %c8 step %c1 iter_args(%arg4 = %9) -> (tensor<2x2x8x8x4x4xf32>) {
      %13 = affine.apply affine_map<(d0) -> (d0 * 32)>(%arg3)
      %extracted_slice_4 = tensor.extract_slice %extracted_slice[0, %13] [64, 32] [1, 1] : tensor<64x256xbf16> to tensor<64x32xbf16>
      %alloc_5 = memref.alloc() : memref<2x1x32x32xbf16, 1 : i32>
      %14 = bufferization.to_tensor %alloc_5 restrict writable : memref<2x1x32x32xbf16, 1 : i32>
      %pack = tensor.pack %extracted_slice_4 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %14 : tensor<64x32xbf16> -> tensor<2x1x32x32xbf16>
      %extracted_slice_6 = tensor.extract_slice %extracted_slice_0[%13, 0] [32, 64] [1, 1] : tensor<256x64xbf16> to tensor<32x64xbf16>
      %alloc_7 = memref.alloc() : memref<1x2x32x32xbf16, 1 : i32>
      %15 = bufferization.to_tensor %alloc_7 restrict writable : memref<1x2x32x32xbf16, 1 : i32>
      %pack_8 = tensor.pack %extracted_slice_6 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %15 : tensor<32x64xbf16> -> tensor<1x2x32x32xbf16>
      %16 = scf.forall (%arg5, %arg6) in (2, 2) shared_outs(%arg7 = %arg4) -> (tensor<2x2x8x8x4x4xf32>) {
        %extracted_slice_9 = tensor.extract_slice %pack[%arg5, 0, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<2x1x32x32xbf16> to tensor<1x1x32x32xbf16>
        %extracted_slice_10 = tensor.extract_slice %10[%arg5, 0, 0, 0, 0, 0] [1, 1, 4, 8, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<2x1x4x8x4x8xbf16> to tensor<1x1x4x8x4x8xbf16>
        %pack_11 = tensor.pack %extracted_slice_9 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %extracted_slice_10 : tensor<1x1x32x32xbf16> -> tensor<1x1x4x8x4x8xbf16>
        %extracted_slice_12 = tensor.extract_slice %pack_8[0, %arg6, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<1x2x32x32xbf16> to tensor<1x1x32x32xbf16>
        %extracted_slice_13 = tensor.extract_slice %11[0, %arg6, 0, 0, 0, 0] [1, 1, 8, 4, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<1x2x8x4x8x4xbf16> to tensor<1x1x8x4x8x4xbf16>
        %pack_14 = tensor.pack %extracted_slice_12 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %extracted_slice_13 : tensor<1x1x32x32xbf16> -> tensor<1x1x8x4x8x4xbf16>
        %extracted_slice_15 = tensor.extract_slice %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
        %17 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_11, %pack_14 : tensor<1x1x4x8x4x8xbf16>, tensor<1x1x8x4x8x4xbf16>) outs(%extracted_slice_15 : tensor<1x1x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
        ^bb0(%in: bf16, %in_16: bf16, %out: f32):
          %18 = arith.extf %in : bf16 to f32
          %19 = arith.extf %in_16 : bf16 to f32
          %20 = arith.mulf %18, %19 : f32
          %21 = arith.addf %out, %20 : f32
          linalg.yield %21 : f32
        } -> tensor<1x1x8x8x4x4xf32>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %17 into %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> into tensor<2x2x8x8x4x4xf32>
        }
      } {mapping = [#gpu.thread<y>, #gpu.thread<x>]}
      memref.dealloc %alloc_5 : memref<2x1x32x32xbf16, 1 : i32>
      memref.dealloc %alloc_7 : memref<1x2x32x32xbf16, 1 : i32>
      scf.yield %16 : tensor<2x2x8x8x4x4xf32>
    }
    %unpack = tensor.unpack %12 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %7 : tensor<2x2x8x8x4x4xf32> -> tensor<2x2x32x32xf32>
    %unpack_3 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %extracted_slice_1 : tensor<2x2x32x32xf32> -> tensor<64x64xf32>
    memref.dealloc %alloc : memref<2x2x32x32xf32, 1 : i32>
    memref.dealloc %alloc_2 : memref<2x2x8x8x4x4xf32, 2 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_3 into %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<64x64xf32> into tensor<128x128xf32>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  return
}

// -----// IR Dump Before AMDAIEBufferizeToAllocation (iree-amdaie-bufferize-to-allocation) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c1 = arith.constant 1 : index
  %c8 = arith.constant 8 : index
  %cst = arith.constant 0.000000e+00 : f32
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (128, 128) step (64, 64) shared_outs(%arg2 = %5) -> (tensor<128x128xf32>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [64, 256] [1, 1] : tensor<128x256xbf16> to tensor<64x256xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [256, 64] [1, 1] : tensor<256x128xbf16> to tensor<256x64xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<128x128xf32> to tensor<64x64xf32>
    %alloc = memref.alloc() : memref<2x2x32x32xf32, 1 : i32>
    %7 = bufferization.to_tensor %alloc restrict writable : memref<2x2x32x32xf32, 1 : i32>
    %alloc_2 = memref.alloc() : memref<2x2x8x8x4x4xf32, 2 : i32>
    %8 = bufferization.to_tensor %alloc_2 restrict writable : memref<2x2x8x8x4x4xf32, 2 : i32>
    %9 = linalg.fill ins(%cst : f32) outs(%8 : tensor<2x2x8x8x4x4xf32>) -> tensor<2x2x8x8x4x4xf32>
    %10 = tensor.empty() : tensor<2x1x4x8x4x8xbf16>
    %11 = tensor.empty() : tensor<1x2x8x4x8x4xbf16>
    %12 = scf.for %arg3 = %c0 to %c8 step %c1 iter_args(%arg4 = %9) -> (tensor<2x2x8x8x4x4xf32>) {
      %13 = affine.apply affine_map<(d0) -> (d0 * 32)>(%arg3)
      %extracted_slice_4 = tensor.extract_slice %extracted_slice[0, %13] [64, 32] [1, 1] : tensor<64x256xbf16> to tensor<64x32xbf16>
      %alloc_5 = memref.alloc() : memref<2x1x32x32xbf16, 1 : i32>
      %14 = bufferization.to_tensor %alloc_5 restrict writable : memref<2x1x32x32xbf16, 1 : i32>
      %pack = tensor.pack %extracted_slice_4 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %14 : tensor<64x32xbf16> -> tensor<2x1x32x32xbf16>
      %extracted_slice_6 = tensor.extract_slice %extracted_slice_0[%13, 0] [32, 64] [1, 1] : tensor<256x64xbf16> to tensor<32x64xbf16>
      %alloc_7 = memref.alloc() : memref<1x2x32x32xbf16, 1 : i32>
      %15 = bufferization.to_tensor %alloc_7 restrict writable : memref<1x2x32x32xbf16, 1 : i32>
      %pack_8 = tensor.pack %extracted_slice_6 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %15 : tensor<32x64xbf16> -> tensor<1x2x32x32xbf16>
      %16 = scf.forall (%arg5, %arg6) in (2, 2) shared_outs(%arg7 = %arg4) -> (tensor<2x2x8x8x4x4xf32>) {
        %extracted_slice_9 = tensor.extract_slice %pack[%arg5, 0, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<2x1x32x32xbf16> to tensor<1x1x32x32xbf16>
        %extracted_slice_10 = tensor.extract_slice %10[%arg5, 0, 0, 0, 0, 0] [1, 1, 4, 8, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<2x1x4x8x4x8xbf16> to tensor<1x1x4x8x4x8xbf16>
        %pack_11 = tensor.pack %extracted_slice_9 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %extracted_slice_10 : tensor<1x1x32x32xbf16> -> tensor<1x1x4x8x4x8xbf16>
        %extracted_slice_12 = tensor.extract_slice %pack_8[0, %arg6, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<1x2x32x32xbf16> to tensor<1x1x32x32xbf16>
        %extracted_slice_13 = tensor.extract_slice %11[0, %arg6, 0, 0, 0, 0] [1, 1, 8, 4, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<1x2x8x4x8x4xbf16> to tensor<1x1x8x4x8x4xbf16>
        %pack_14 = tensor.pack %extracted_slice_12 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %extracted_slice_13 : tensor<1x1x32x32xbf16> -> tensor<1x1x8x4x8x4xbf16>
        %extracted_slice_15 = tensor.extract_slice %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
        %17 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_11, %pack_14 : tensor<1x1x4x8x4x8xbf16>, tensor<1x1x8x4x8x4xbf16>) outs(%extracted_slice_15 : tensor<1x1x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
        ^bb0(%in: bf16, %in_16: bf16, %out: f32):
          %18 = arith.extf %in : bf16 to f32
          %19 = arith.extf %in_16 : bf16 to f32
          %20 = arith.mulf %18, %19 : f32
          %21 = arith.addf %out, %20 : f32
          linalg.yield %21 : f32
        } -> tensor<1x1x8x8x4x4xf32>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %17 into %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> into tensor<2x2x8x8x4x4xf32>
        }
      } {mapping = [#gpu.thread<y>, #gpu.thread<x>]}
      memref.dealloc %alloc_5 : memref<2x1x32x32xbf16, 1 : i32>
      memref.dealloc %alloc_7 : memref<1x2x32x32xbf16, 1 : i32>
      scf.yield %16 : tensor<2x2x8x8x4x4xf32>
    }
    %unpack = tensor.unpack %12 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %7 : tensor<2x2x8x8x4x4xf32> -> tensor<2x2x32x32xf32>
    %unpack_3 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %extracted_slice_1 : tensor<2x2x32x32xf32> -> tensor<64x64xf32>
    memref.dealloc %alloc : memref<2x2x32x32xf32, 1 : i32>
    memref.dealloc %alloc_2 : memref<2x2x8x8x4x4xf32, 2 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_3 into %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<64x64xf32> into tensor<128x128xf32>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  return
}

// -----// IR Dump Before HoistStaticallyBoundAllocations (iree-hoist-statically-bound-allocations) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c1 = arith.constant 1 : index
  %c8 = arith.constant 8 : index
  %cst = arith.constant 0.000000e+00 : f32
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (128, 128) step (64, 64) shared_outs(%arg2 = %5) -> (tensor<128x128xf32>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [64, 256] [1, 1] : tensor<128x256xbf16> to tensor<64x256xbf16>
    %extracted_slice_0 = tensor.extract_slice %4[0, %arg1] [256, 64] [1, 1] : tensor<256x128xbf16> to tensor<256x64xbf16>
    %extracted_slice_1 = tensor.extract_slice %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<128x128xf32> to tensor<64x64xf32>
    %alloc = memref.alloc() : memref<2x2x32x32xf32, 1 : i32>
    %7 = bufferization.to_tensor %alloc restrict writable : memref<2x2x32x32xf32, 1 : i32>
    %alloc_2 = memref.alloc() : memref<2x2x8x8x4x4xf32, 2 : i32>
    %8 = bufferization.to_tensor %alloc_2 restrict writable : memref<2x2x8x8x4x4xf32, 2 : i32>
    %9 = linalg.fill ins(%cst : f32) outs(%8 : tensor<2x2x8x8x4x4xf32>) -> tensor<2x2x8x8x4x4xf32>
    %10 = tensor.empty() : tensor<2x1x4x8x4x8xbf16>
    %11 = tensor.empty() : tensor<1x2x8x4x8x4xbf16>
    %12 = scf.for %arg3 = %c0 to %c8 step %c1 iter_args(%arg4 = %9) -> (tensor<2x2x8x8x4x4xf32>) {
      %13 = affine.apply affine_map<(d0) -> (d0 * 32)>(%arg3)
      %extracted_slice_4 = tensor.extract_slice %extracted_slice[0, %13] [64, 32] [1, 1] : tensor<64x256xbf16> to tensor<64x32xbf16>
      %alloc_5 = memref.alloc() : memref<2x1x32x32xbf16, 1 : i32>
      %14 = bufferization.to_tensor %alloc_5 restrict writable : memref<2x1x32x32xbf16, 1 : i32>
      %pack = tensor.pack %extracted_slice_4 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %14 : tensor<64x32xbf16> -> tensor<2x1x32x32xbf16>
      %extracted_slice_6 = tensor.extract_slice %extracted_slice_0[%13, 0] [32, 64] [1, 1] : tensor<256x64xbf16> to tensor<32x64xbf16>
      %alloc_7 = memref.alloc() : memref<1x2x32x32xbf16, 1 : i32>
      %15 = bufferization.to_tensor %alloc_7 restrict writable : memref<1x2x32x32xbf16, 1 : i32>
      %pack_8 = tensor.pack %extracted_slice_6 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %15 : tensor<32x64xbf16> -> tensor<1x2x32x32xbf16>
      %16 = scf.forall (%arg5, %arg6) in (2, 2) shared_outs(%arg7 = %arg4) -> (tensor<2x2x8x8x4x4xf32>) {
        %extracted_slice_9 = tensor.extract_slice %pack[%arg5, 0, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<2x1x32x32xbf16> to tensor<1x1x32x32xbf16>
        %extracted_slice_10 = tensor.extract_slice %10[%arg5, 0, 0, 0, 0, 0] [1, 1, 4, 8, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<2x1x4x8x4x8xbf16> to tensor<1x1x4x8x4x8xbf16>
        %alloc_11 = memref.alloc() : memref<1x1x4x8x4x8xbf16, 2 : i32>
        %17 = bufferization.to_tensor %alloc_11 restrict writable : memref<1x1x4x8x4x8xbf16, 2 : i32>
        %pack_12 = tensor.pack %extracted_slice_9 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %17 : tensor<1x1x32x32xbf16> -> tensor<1x1x4x8x4x8xbf16>
        %extracted_slice_13 = tensor.extract_slice %pack_8[0, %arg6, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<1x2x32x32xbf16> to tensor<1x1x32x32xbf16>
        %extracted_slice_14 = tensor.extract_slice %11[0, %arg6, 0, 0, 0, 0] [1, 1, 8, 4, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<1x2x8x4x8x4xbf16> to tensor<1x1x8x4x8x4xbf16>
        %alloc_15 = memref.alloc() : memref<1x1x8x4x8x4xbf16, 2 : i32>
        %18 = bufferization.to_tensor %alloc_15 restrict writable : memref<1x1x8x4x8x4xbf16, 2 : i32>
        %pack_16 = tensor.pack %extracted_slice_13 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %18 : tensor<1x1x32x32xbf16> -> tensor<1x1x8x4x8x4xbf16>
        %extracted_slice_17 = tensor.extract_slice %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
        %19 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_12, %pack_16 : tensor<1x1x4x8x4x8xbf16>, tensor<1x1x8x4x8x4xbf16>) outs(%extracted_slice_17 : tensor<1x1x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
        ^bb0(%in: bf16, %in_18: bf16, %out: f32):
          %20 = arith.extf %in : bf16 to f32
          %21 = arith.extf %in_18 : bf16 to f32
          %22 = arith.mulf %20, %21 : f32
          %23 = arith.addf %out, %22 : f32
          linalg.yield %23 : f32
        } -> tensor<1x1x8x8x4x4xf32>
        memref.dealloc %alloc_11 : memref<1x1x4x8x4x8xbf16, 2 : i32>
        memref.dealloc %alloc_15 : memref<1x1x8x4x8x4xbf16, 2 : i32>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %19 into %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> into tensor<2x2x8x8x4x4xf32>
        }
      } {mapping = [#gpu.thread<y>, #gpu.thread<x>]}
      memref.dealloc %alloc_5 : memref<2x1x32x32xbf16, 1 : i32>
      memref.dealloc %alloc_7 : memref<1x2x32x32xbf16, 1 : i32>
      scf.yield %16 : tensor<2x2x8x8x4x4xf32>
    }
    %unpack = tensor.unpack %12 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %7 : tensor<2x2x8x8x4x4xf32> -> tensor<2x2x32x32xf32>
    %unpack_3 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %extracted_slice_1 : tensor<2x2x32x32xf32> -> tensor<64x64xf32>
    memref.dealloc %alloc : memref<2x2x32x32xf32, 1 : i32>
    memref.dealloc %alloc_2 : memref<2x2x8x8x4x4xf32, 2 : i32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_3 into %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<64x64xf32> into tensor<128x128xf32>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  return
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %alloc = memref.alloc() : memref<1x1x8x4x8x4xbf16, 2 : i32>
  %alloc_0 = memref.alloc() : memref<1x1x4x8x4x8xbf16, 2 : i32>
  %alloc_1 = memref.alloc() : memref<1x2x32x32xbf16, 1 : i32>
  %alloc_2 = memref.alloc() : memref<2x1x32x32xbf16, 1 : i32>
  %alloc_3 = memref.alloc() : memref<2x2x8x8x4x4xf32, 2 : i32>
  %alloc_4 = memref.alloc() : memref<2x2x32x32xf32, 1 : i32>
  %c1 = arith.constant 1 : index
  %c8 = arith.constant 8 : index
  %cst = arith.constant 0.000000e+00 : f32
  %c0 = arith.constant 0 : index
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (128, 128) step (64, 64) shared_outs(%arg2 = %5) -> (tensor<128x128xf32>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [64, 256] [1, 1] : tensor<128x256xbf16> to tensor<64x256xbf16>
    %extracted_slice_5 = tensor.extract_slice %4[0, %arg1] [256, 64] [1, 1] : tensor<256x128xbf16> to tensor<256x64xbf16>
    %extracted_slice_6 = tensor.extract_slice %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<128x128xf32> to tensor<64x64xf32>
    %7 = bufferization.to_tensor %alloc_4 restrict writable : memref<2x2x32x32xf32, 1 : i32>
    %8 = bufferization.to_tensor %alloc_3 restrict writable : memref<2x2x8x8x4x4xf32, 2 : i32>
    %9 = linalg.fill ins(%cst : f32) outs(%8 : tensor<2x2x8x8x4x4xf32>) -> tensor<2x2x8x8x4x4xf32>
    %10 = tensor.empty() : tensor<2x1x4x8x4x8xbf16>
    %11 = tensor.empty() : tensor<1x2x8x4x8x4xbf16>
    %12 = scf.for %arg3 = %c0 to %c8 step %c1 iter_args(%arg4 = %9) -> (tensor<2x2x8x8x4x4xf32>) {
      %13 = affine.apply affine_map<(d0) -> (d0 * 32)>(%arg3)
      %extracted_slice_8 = tensor.extract_slice %extracted_slice[0, %13] [64, 32] [1, 1] : tensor<64x256xbf16> to tensor<64x32xbf16>
      %14 = bufferization.to_tensor %alloc_2 restrict writable : memref<2x1x32x32xbf16, 1 : i32>
      %pack = tensor.pack %extracted_slice_8 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %14 : tensor<64x32xbf16> -> tensor<2x1x32x32xbf16>
      %extracted_slice_9 = tensor.extract_slice %extracted_slice_5[%13, 0] [32, 64] [1, 1] : tensor<256x64xbf16> to tensor<32x64xbf16>
      %15 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x2x32x32xbf16, 1 : i32>
      %pack_10 = tensor.pack %extracted_slice_9 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %15 : tensor<32x64xbf16> -> tensor<1x2x32x32xbf16>
      %16 = scf.forall (%arg5, %arg6) in (2, 2) shared_outs(%arg7 = %arg4) -> (tensor<2x2x8x8x4x4xf32>) {
        %extracted_slice_11 = tensor.extract_slice %pack[%arg5, 0, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<2x1x32x32xbf16> to tensor<1x1x32x32xbf16>
        %extracted_slice_12 = tensor.extract_slice %10[%arg5, 0, 0, 0, 0, 0] [1, 1, 4, 8, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<2x1x4x8x4x8xbf16> to tensor<1x1x4x8x4x8xbf16>
        %17 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x4x8x4x8xbf16, 2 : i32>
        %pack_13 = tensor.pack %extracted_slice_11 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %17 : tensor<1x1x32x32xbf16> -> tensor<1x1x4x8x4x8xbf16>
        %extracted_slice_14 = tensor.extract_slice %pack_10[0, %arg6, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<1x2x32x32xbf16> to tensor<1x1x32x32xbf16>
        %extracted_slice_15 = tensor.extract_slice %11[0, %arg6, 0, 0, 0, 0] [1, 1, 8, 4, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<1x2x8x4x8x4xbf16> to tensor<1x1x8x4x8x4xbf16>
        %18 = bufferization.to_tensor %alloc restrict writable : memref<1x1x8x4x8x4xbf16, 2 : i32>
        %pack_16 = tensor.pack %extracted_slice_14 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %18 : tensor<1x1x32x32xbf16> -> tensor<1x1x8x4x8x4xbf16>
        %extracted_slice_17 = tensor.extract_slice %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
        %19 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_13, %pack_16 : tensor<1x1x4x8x4x8xbf16>, tensor<1x1x8x4x8x4xbf16>) outs(%extracted_slice_17 : tensor<1x1x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
        ^bb0(%in: bf16, %in_18: bf16, %out: f32):
          %20 = arith.extf %in : bf16 to f32
          %21 = arith.extf %in_18 : bf16 to f32
          %22 = arith.mulf %20, %21 : f32
          %23 = arith.addf %out, %22 : f32
          linalg.yield %23 : f32
        } -> tensor<1x1x8x8x4x4xf32>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %19 into %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> into tensor<2x2x8x8x4x4xf32>
        }
      } {mapping = [#gpu.thread<y>, #gpu.thread<x>]}
      scf.yield %16 : tensor<2x2x8x8x4x4xf32>
    }
    %unpack = tensor.unpack %12 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %7 : tensor<2x2x8x8x4x4xf32> -> tensor<2x2x32x32xf32>
    %unpack_7 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %extracted_slice_6 : tensor<2x2x32x32xf32> -> tensor<64x64xf32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_7 into %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<64x64xf32> into tensor<128x128xf32>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  memref.dealloc %alloc_4 : memref<2x2x32x32xf32, 1 : i32>
  memref.dealloc %alloc_3 : memref<2x2x8x8x4x4xf32, 2 : i32>
  memref.dealloc %alloc_2 : memref<2x1x32x32xbf16, 1 : i32>
  memref.dealloc %alloc_1 : memref<1x2x32x32xbf16, 1 : i32>
  memref.dealloc %alloc_0 : memref<1x1x4x8x4x8xbf16, 2 : i32>
  memref.dealloc %alloc : memref<1x1x8x4x8x4xbf16, 2 : i32>
  return
}

// -----// IR Dump Before CSE (cse) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c0 = arith.constant 0 : index
  %cst = arith.constant 0.000000e+00 : f32
  %c8 = arith.constant 8 : index
  %c1 = arith.constant 1 : index
  %alloc = memref.alloc() : memref<1x1x8x4x8x4xbf16, 2 : i32>
  %alloc_0 = memref.alloc() : memref<1x1x4x8x4x8xbf16, 2 : i32>
  %alloc_1 = memref.alloc() : memref<1x2x32x32xbf16, 1 : i32>
  %alloc_2 = memref.alloc() : memref<2x1x32x32xbf16, 1 : i32>
  %alloc_3 = memref.alloc() : memref<2x2x8x8x4x4xf32, 2 : i32>
  %alloc_4 = memref.alloc() : memref<2x2x32x32xf32, 1 : i32>
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (128, 128) step (64, 64) shared_outs(%arg2 = %5) -> (tensor<128x128xf32>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [64, 256] [1, 1] : tensor<128x256xbf16> to tensor<64x256xbf16>
    %extracted_slice_5 = tensor.extract_slice %4[0, %arg1] [256, 64] [1, 1] : tensor<256x128xbf16> to tensor<256x64xbf16>
    %extracted_slice_6 = tensor.extract_slice %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<128x128xf32> to tensor<64x64xf32>
    %7 = bufferization.to_tensor %alloc_4 restrict writable : memref<2x2x32x32xf32, 1 : i32>
    %8 = bufferization.to_tensor %alloc_3 restrict writable : memref<2x2x8x8x4x4xf32, 2 : i32>
    %9 = linalg.fill ins(%cst : f32) outs(%8 : tensor<2x2x8x8x4x4xf32>) -> tensor<2x2x8x8x4x4xf32>
    %10 = scf.for %arg3 = %c0 to %c8 step %c1 iter_args(%arg4 = %9) -> (tensor<2x2x8x8x4x4xf32>) {
      %11 = affine.apply affine_map<(d0) -> (d0 * 32)>(%arg3)
      %extracted_slice_8 = tensor.extract_slice %extracted_slice[0, %11] [64, 32] [1, 1] : tensor<64x256xbf16> to tensor<64x32xbf16>
      %12 = bufferization.to_tensor %alloc_2 restrict writable : memref<2x1x32x32xbf16, 1 : i32>
      %pack = tensor.pack %extracted_slice_8 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %12 : tensor<64x32xbf16> -> tensor<2x1x32x32xbf16>
      %extracted_slice_9 = tensor.extract_slice %extracted_slice_5[%11, 0] [32, 64] [1, 1] : tensor<256x64xbf16> to tensor<32x64xbf16>
      %13 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x2x32x32xbf16, 1 : i32>
      %pack_10 = tensor.pack %extracted_slice_9 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %13 : tensor<32x64xbf16> -> tensor<1x2x32x32xbf16>
      %14 = scf.forall (%arg5, %arg6) in (2, 2) shared_outs(%arg7 = %arg4) -> (tensor<2x2x8x8x4x4xf32>) {
        %extracted_slice_11 = tensor.extract_slice %pack[%arg5, 0, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<2x1x32x32xbf16> to tensor<1x1x32x32xbf16>
        %15 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x4x8x4x8xbf16, 2 : i32>
        %pack_12 = tensor.pack %extracted_slice_11 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %15 : tensor<1x1x32x32xbf16> -> tensor<1x1x4x8x4x8xbf16>
        %extracted_slice_13 = tensor.extract_slice %pack_10[0, %arg6, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<1x2x32x32xbf16> to tensor<1x1x32x32xbf16>
        %16 = bufferization.to_tensor %alloc restrict writable : memref<1x1x8x4x8x4xbf16, 2 : i32>
        %pack_14 = tensor.pack %extracted_slice_13 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %16 : tensor<1x1x32x32xbf16> -> tensor<1x1x8x4x8x4xbf16>
        %extracted_slice_15 = tensor.extract_slice %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
        %17 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_12, %pack_14 : tensor<1x1x4x8x4x8xbf16>, tensor<1x1x8x4x8x4xbf16>) outs(%extracted_slice_15 : tensor<1x1x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
        ^bb0(%in: bf16, %in_16: bf16, %out: f32):
          %18 = arith.extf %in : bf16 to f32
          %19 = arith.extf %in_16 : bf16 to f32
          %20 = arith.mulf %18, %19 : f32
          %21 = arith.addf %out, %20 : f32
          linalg.yield %21 : f32
        } -> tensor<1x1x8x8x4x4xf32>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %17 into %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> into tensor<2x2x8x8x4x4xf32>
        }
      } {mapping = [#gpu.thread<y>, #gpu.thread<x>]}
      scf.yield %14 : tensor<2x2x8x8x4x4xf32>
    }
    %unpack = tensor.unpack %10 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %7 : tensor<2x2x8x8x4x4xf32> -> tensor<2x2x32x32xf32>
    %unpack_7 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %extracted_slice_6 : tensor<2x2x32x32xf32> -> tensor<64x64xf32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_7 into %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<64x64xf32> into tensor<128x128xf32>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  memref.dealloc %alloc_4 : memref<2x2x32x32xf32, 1 : i32>
  memref.dealloc %alloc_3 : memref<2x2x8x8x4x4xf32, 2 : i32>
  memref.dealloc %alloc_2 : memref<2x1x32x32xbf16, 1 : i32>
  memref.dealloc %alloc_1 : memref<1x2x32x32xbf16, 1 : i32>
  memref.dealloc %alloc_0 : memref<1x1x4x8x4x8xbf16, 2 : i32>
  memref.dealloc %alloc : memref<1x1x8x4x8x4xbf16, 2 : i32>
  return
}

// -----// IR Dump Before AMDAIEPeelForLoop (iree-amdaie-peel-for-loop) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c0 = arith.constant 0 : index
  %cst = arith.constant 0.000000e+00 : f32
  %c8 = arith.constant 8 : index
  %c1 = arith.constant 1 : index
  %alloc = memref.alloc() : memref<1x1x8x4x8x4xbf16, 2 : i32>
  %alloc_0 = memref.alloc() : memref<1x1x4x8x4x8xbf16, 2 : i32>
  %alloc_1 = memref.alloc() : memref<1x2x32x32xbf16, 1 : i32>
  %alloc_2 = memref.alloc() : memref<2x1x32x32xbf16, 1 : i32>
  %alloc_3 = memref.alloc() : memref<2x2x8x8x4x4xf32, 2 : i32>
  %alloc_4 = memref.alloc() : memref<2x2x32x32xf32, 1 : i32>
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (128, 128) step (64, 64) shared_outs(%arg2 = %5) -> (tensor<128x128xf32>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [64, 256] [1, 1] : tensor<128x256xbf16> to tensor<64x256xbf16>
    %extracted_slice_5 = tensor.extract_slice %4[0, %arg1] [256, 64] [1, 1] : tensor<256x128xbf16> to tensor<256x64xbf16>
    %extracted_slice_6 = tensor.extract_slice %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<128x128xf32> to tensor<64x64xf32>
    %7 = bufferization.to_tensor %alloc_4 restrict writable : memref<2x2x32x32xf32, 1 : i32>
    %8 = bufferization.to_tensor %alloc_3 restrict writable : memref<2x2x8x8x4x4xf32, 2 : i32>
    %9 = linalg.fill ins(%cst : f32) outs(%8 : tensor<2x2x8x8x4x4xf32>) -> tensor<2x2x8x8x4x4xf32>
    %10 = scf.for %arg3 = %c0 to %c8 step %c1 iter_args(%arg4 = %9) -> (tensor<2x2x8x8x4x4xf32>) {
      %11 = affine.apply affine_map<(d0) -> (d0 * 32)>(%arg3)
      %extracted_slice_8 = tensor.extract_slice %extracted_slice[0, %11] [64, 32] [1, 1] : tensor<64x256xbf16> to tensor<64x32xbf16>
      %12 = bufferization.to_tensor %alloc_2 restrict writable : memref<2x1x32x32xbf16, 1 : i32>
      %pack = tensor.pack %extracted_slice_8 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %12 : tensor<64x32xbf16> -> tensor<2x1x32x32xbf16>
      %extracted_slice_9 = tensor.extract_slice %extracted_slice_5[%11, 0] [32, 64] [1, 1] : tensor<256x64xbf16> to tensor<32x64xbf16>
      %13 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x2x32x32xbf16, 1 : i32>
      %pack_10 = tensor.pack %extracted_slice_9 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %13 : tensor<32x64xbf16> -> tensor<1x2x32x32xbf16>
      %14 = scf.forall (%arg5, %arg6) in (2, 2) shared_outs(%arg7 = %arg4) -> (tensor<2x2x8x8x4x4xf32>) {
        %extracted_slice_11 = tensor.extract_slice %pack[%arg5, 0, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<2x1x32x32xbf16> to tensor<1x1x32x32xbf16>
        %15 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x4x8x4x8xbf16, 2 : i32>
        %pack_12 = tensor.pack %extracted_slice_11 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %15 : tensor<1x1x32x32xbf16> -> tensor<1x1x4x8x4x8xbf16>
        %extracted_slice_13 = tensor.extract_slice %pack_10[0, %arg6, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<1x2x32x32xbf16> to tensor<1x1x32x32xbf16>
        %16 = bufferization.to_tensor %alloc restrict writable : memref<1x1x8x4x8x4xbf16, 2 : i32>
        %pack_14 = tensor.pack %extracted_slice_13 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %16 : tensor<1x1x32x32xbf16> -> tensor<1x1x8x4x8x4xbf16>
        %extracted_slice_15 = tensor.extract_slice %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
        %17 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_12, %pack_14 : tensor<1x1x4x8x4x8xbf16>, tensor<1x1x8x4x8x4xbf16>) outs(%extracted_slice_15 : tensor<1x1x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
        ^bb0(%in: bf16, %in_16: bf16, %out: f32):
          %18 = arith.extf %in : bf16 to f32
          %19 = arith.extf %in_16 : bf16 to f32
          %20 = arith.mulf %18, %19 : f32
          %21 = arith.addf %out, %20 : f32
          linalg.yield %21 : f32
        } -> tensor<1x1x8x8x4x4xf32>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %17 into %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> into tensor<2x2x8x8x4x4xf32>
        }
      } {mapping = [#gpu.thread<y>, #gpu.thread<x>]}
      scf.yield %14 : tensor<2x2x8x8x4x4xf32>
    }
    %unpack = tensor.unpack %10 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %7 : tensor<2x2x8x8x4x4xf32> -> tensor<2x2x32x32xf32>
    %unpack_7 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %extracted_slice_6 : tensor<2x2x32x32xf32> -> tensor<64x64xf32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_7 into %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<64x64xf32> into tensor<128x128xf32>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  memref.dealloc %alloc_4 : memref<2x2x32x32xf32, 1 : i32>
  memref.dealloc %alloc_3 : memref<2x2x8x8x4x4xf32, 2 : i32>
  memref.dealloc %alloc_2 : memref<2x1x32x32xbf16, 1 : i32>
  memref.dealloc %alloc_1 : memref<1x2x32x32xbf16, 1 : i32>
  memref.dealloc %alloc_0 : memref<1x1x4x8x4x8xbf16, 2 : i32>
  memref.dealloc %alloc : memref<1x1x8x4x8x4xbf16, 2 : i32>
  return
}

// -----// IR Dump Before Canonicalizer (canonicalize) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c0 = arith.constant 0 : index
  %cst = arith.constant 0.000000e+00 : f32
  %c8 = arith.constant 8 : index
  %c1 = arith.constant 1 : index
  %alloc = memref.alloc() : memref<1x1x8x4x8x4xbf16, 2 : i32>
  %alloc_0 = memref.alloc() : memref<1x1x4x8x4x8xbf16, 2 : i32>
  %alloc_1 = memref.alloc() : memref<1x2x32x32xbf16, 1 : i32>
  %alloc_2 = memref.alloc() : memref<2x1x32x32xbf16, 1 : i32>
  %alloc_3 = memref.alloc() : memref<2x2x8x8x4x4xf32, 2 : i32>
  %alloc_4 = memref.alloc() : memref<2x2x32x32xf32, 1 : i32>
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (128, 128) step (64, 64) shared_outs(%arg2 = %5) -> (tensor<128x128xf32>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [64, 256] [1, 1] : tensor<128x256xbf16> to tensor<64x256xbf16>
    %extracted_slice_5 = tensor.extract_slice %4[0, %arg1] [256, 64] [1, 1] : tensor<256x128xbf16> to tensor<256x64xbf16>
    %extracted_slice_6 = tensor.extract_slice %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<128x128xf32> to tensor<64x64xf32>
    %7 = bufferization.to_tensor %alloc_4 restrict writable : memref<2x2x32x32xf32, 1 : i32>
    %8 = bufferization.to_tensor %alloc_3 restrict writable : memref<2x2x8x8x4x4xf32, 2 : i32>
    %9 = linalg.fill ins(%cst : f32) outs(%8 : tensor<2x2x8x8x4x4xf32>) -> tensor<2x2x8x8x4x4xf32>
    %c1_7 = arith.constant 1 : index
    %10 = scf.for %arg3 = %c0 to %c1_7 step %c1 iter_args(%arg4 = %9) -> (tensor<2x2x8x8x4x4xf32>) {
      %13 = affine.apply affine_map<(d0) -> (d0 * 32)>(%arg3)
      %extracted_slice_9 = tensor.extract_slice %extracted_slice[0, %13] [64, 32] [1, 1] : tensor<64x256xbf16> to tensor<64x32xbf16>
      %14 = bufferization.to_tensor %alloc_2 restrict writable : memref<2x1x32x32xbf16, 1 : i32>
      %pack = tensor.pack %extracted_slice_9 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %14 : tensor<64x32xbf16> -> tensor<2x1x32x32xbf16>
      %extracted_slice_10 = tensor.extract_slice %extracted_slice_5[%13, 0] [32, 64] [1, 1] : tensor<256x64xbf16> to tensor<32x64xbf16>
      %15 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x2x32x32xbf16, 1 : i32>
      %pack_11 = tensor.pack %extracted_slice_10 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %15 : tensor<32x64xbf16> -> tensor<1x2x32x32xbf16>
      %16 = scf.forall (%arg5, %arg6) in (2, 2) shared_outs(%arg7 = %arg4) -> (tensor<2x2x8x8x4x4xf32>) {
        %extracted_slice_12 = tensor.extract_slice %pack[%arg5, 0, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<2x1x32x32xbf16> to tensor<1x1x32x32xbf16>
        %17 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x4x8x4x8xbf16, 2 : i32>
        %pack_13 = tensor.pack %extracted_slice_12 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %17 : tensor<1x1x32x32xbf16> -> tensor<1x1x4x8x4x8xbf16>
        %extracted_slice_14 = tensor.extract_slice %pack_11[0, %arg6, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<1x2x32x32xbf16> to tensor<1x1x32x32xbf16>
        %18 = bufferization.to_tensor %alloc restrict writable : memref<1x1x8x4x8x4xbf16, 2 : i32>
        %pack_15 = tensor.pack %extracted_slice_14 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %18 : tensor<1x1x32x32xbf16> -> tensor<1x1x8x4x8x4xbf16>
        %extracted_slice_16 = tensor.extract_slice %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
        %19 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_13, %pack_15 : tensor<1x1x4x8x4x8xbf16>, tensor<1x1x8x4x8x4xbf16>) outs(%extracted_slice_16 : tensor<1x1x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
        ^bb0(%in: bf16, %in_17: bf16, %out: f32):
          %20 = arith.extf %in : bf16 to f32
          %21 = arith.extf %in_17 : bf16 to f32
          %22 = arith.mulf %20, %21 : f32
          %23 = arith.addf %out, %22 : f32
          linalg.yield %23 : f32
        } -> tensor<1x1x8x8x4x4xf32>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %19 into %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> into tensor<2x2x8x8x4x4xf32>
        }
      } {mapping = [#gpu.thread<y>, #gpu.thread<x>]}
      scf.yield %16 : tensor<2x2x8x8x4x4xf32>
    }
    %c7 = arith.constant 7 : index
    %11 = scf.for %arg3 = %c1_7 to %c7 step %c1 iter_args(%arg4 = %10) -> (tensor<2x2x8x8x4x4xf32>) {
      %13 = affine.apply affine_map<(d0) -> (d0 * 32)>(%arg3)
      %extracted_slice_9 = tensor.extract_slice %extracted_slice[0, %13] [64, 32] [1, 1] : tensor<64x256xbf16> to tensor<64x32xbf16>
      %14 = bufferization.to_tensor %alloc_2 restrict writable : memref<2x1x32x32xbf16, 1 : i32>
      %pack = tensor.pack %extracted_slice_9 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %14 : tensor<64x32xbf16> -> tensor<2x1x32x32xbf16>
      %extracted_slice_10 = tensor.extract_slice %extracted_slice_5[%13, 0] [32, 64] [1, 1] : tensor<256x64xbf16> to tensor<32x64xbf16>
      %15 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x2x32x32xbf16, 1 : i32>
      %pack_11 = tensor.pack %extracted_slice_10 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %15 : tensor<32x64xbf16> -> tensor<1x2x32x32xbf16>
      %16 = scf.forall (%arg5, %arg6) in (2, 2) shared_outs(%arg7 = %arg4) -> (tensor<2x2x8x8x4x4xf32>) {
        %extracted_slice_12 = tensor.extract_slice %pack[%arg5, 0, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<2x1x32x32xbf16> to tensor<1x1x32x32xbf16>
        %17 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x4x8x4x8xbf16, 2 : i32>
        %pack_13 = tensor.pack %extracted_slice_12 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %17 : tensor<1x1x32x32xbf16> -> tensor<1x1x4x8x4x8xbf16>
        %extracted_slice_14 = tensor.extract_slice %pack_11[0, %arg6, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<1x2x32x32xbf16> to tensor<1x1x32x32xbf16>
        %18 = bufferization.to_tensor %alloc restrict writable : memref<1x1x8x4x8x4xbf16, 2 : i32>
        %pack_15 = tensor.pack %extracted_slice_14 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %18 : tensor<1x1x32x32xbf16> -> tensor<1x1x8x4x8x4xbf16>
        %extracted_slice_16 = tensor.extract_slice %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
        %19 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_13, %pack_15 : tensor<1x1x4x8x4x8xbf16>, tensor<1x1x8x4x8x4xbf16>) outs(%extracted_slice_16 : tensor<1x1x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
        ^bb0(%in: bf16, %in_17: bf16, %out: f32):
          %20 = arith.extf %in : bf16 to f32
          %21 = arith.extf %in_17 : bf16 to f32
          %22 = arith.mulf %20, %21 : f32
          %23 = arith.addf %out, %22 : f32
          linalg.yield %23 : f32
        } -> tensor<1x1x8x8x4x4xf32>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %19 into %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> into tensor<2x2x8x8x4x4xf32>
        }
      } {mapping = [#gpu.thread<y>, #gpu.thread<x>]}
      scf.yield %16 : tensor<2x2x8x8x4x4xf32>
    }
    %12 = scf.for %arg3 = %c7 to %c8 step %c1 iter_args(%arg4 = %11) -> (tensor<2x2x8x8x4x4xf32>) {
      %13 = affine.apply affine_map<(d0) -> (d0 * 32)>(%arg3)
      %extracted_slice_9 = tensor.extract_slice %extracted_slice[0, %13] [64, 32] [1, 1] : tensor<64x256xbf16> to tensor<64x32xbf16>
      %14 = bufferization.to_tensor %alloc_2 restrict writable : memref<2x1x32x32xbf16, 1 : i32>
      %pack = tensor.pack %extracted_slice_9 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %14 : tensor<64x32xbf16> -> tensor<2x1x32x32xbf16>
      %extracted_slice_10 = tensor.extract_slice %extracted_slice_5[%13, 0] [32, 64] [1, 1] : tensor<256x64xbf16> to tensor<32x64xbf16>
      %15 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x2x32x32xbf16, 1 : i32>
      %pack_11 = tensor.pack %extracted_slice_10 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %15 : tensor<32x64xbf16> -> tensor<1x2x32x32xbf16>
      %16 = scf.forall (%arg5, %arg6) in (2, 2) shared_outs(%arg7 = %arg4) -> (tensor<2x2x8x8x4x4xf32>) {
        %extracted_slice_12 = tensor.extract_slice %pack[%arg5, 0, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<2x1x32x32xbf16> to tensor<1x1x32x32xbf16>
        %17 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x4x8x4x8xbf16, 2 : i32>
        %pack_13 = tensor.pack %extracted_slice_12 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %17 : tensor<1x1x32x32xbf16> -> tensor<1x1x4x8x4x8xbf16>
        %extracted_slice_14 = tensor.extract_slice %pack_11[0, %arg6, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<1x2x32x32xbf16> to tensor<1x1x32x32xbf16>
        %18 = bufferization.to_tensor %alloc restrict writable : memref<1x1x8x4x8x4xbf16, 2 : i32>
        %pack_15 = tensor.pack %extracted_slice_14 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %18 : tensor<1x1x32x32xbf16> -> tensor<1x1x8x4x8x4xbf16>
        %extracted_slice_16 = tensor.extract_slice %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
        %19 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_13, %pack_15 : tensor<1x1x4x8x4x8xbf16>, tensor<1x1x8x4x8x4xbf16>) outs(%extracted_slice_16 : tensor<1x1x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
        ^bb0(%in: bf16, %in_17: bf16, %out: f32):
          %20 = arith.extf %in : bf16 to f32
          %21 = arith.extf %in_17 : bf16 to f32
          %22 = arith.mulf %20, %21 : f32
          %23 = arith.addf %out, %22 : f32
          linalg.yield %23 : f32
        } -> tensor<1x1x8x8x4x4xf32>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %19 into %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> into tensor<2x2x8x8x4x4xf32>
        }
      } {mapping = [#gpu.thread<y>, #gpu.thread<x>]}
      scf.yield %16 : tensor<2x2x8x8x4x4xf32>
    }
    %unpack = tensor.unpack %12 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %7 : tensor<2x2x8x8x4x4xf32> -> tensor<2x2x32x32xf32>
    %unpack_8 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %extracted_slice_6 : tensor<2x2x32x32xf32> -> tensor<64x64xf32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_8 into %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<64x64xf32> into tensor<128x128xf32>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  memref.dealloc %alloc_4 : memref<2x2x32x32xf32, 1 : i32>
  memref.dealloc %alloc_3 : memref<2x2x8x8x4x4xf32, 2 : i32>
  memref.dealloc %alloc_2 : memref<2x1x32x32xbf16, 1 : i32>
  memref.dealloc %alloc_1 : memref<1x2x32x32xbf16, 1 : i32>
  memref.dealloc %alloc_0 : memref<1x1x4x8x4x8xbf16, 2 : i32>
  memref.dealloc %alloc : memref<1x1x8x4x8x4xbf16, 2 : i32>
  return
}

// -----// IR Dump Before AMDAIEFuseFillIntoForall (iree-amdaie-fuse-fill-into-forall) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c7 = arith.constant 7 : index
  %c0 = arith.constant 0 : index
  %cst = arith.constant 0.000000e+00 : f32
  %c1 = arith.constant 1 : index
  %alloc = memref.alloc() : memref<1x1x8x4x8x4xbf16, 2 : i32>
  %alloc_0 = memref.alloc() : memref<1x1x4x8x4x8xbf16, 2 : i32>
  %alloc_1 = memref.alloc() : memref<1x2x32x32xbf16, 1 : i32>
  %alloc_2 = memref.alloc() : memref<2x1x32x32xbf16, 1 : i32>
  %alloc_3 = memref.alloc() : memref<2x2x8x8x4x4xf32, 2 : i32>
  %alloc_4 = memref.alloc() : memref<2x2x32x32xf32, 1 : i32>
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (128, 128) step (64, 64) shared_outs(%arg2 = %5) -> (tensor<128x128xf32>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [64, 256] [1, 1] : tensor<128x256xbf16> to tensor<64x256xbf16>
    %extracted_slice_5 = tensor.extract_slice %4[0, %arg1] [256, 64] [1, 1] : tensor<256x128xbf16> to tensor<256x64xbf16>
    %extracted_slice_6 = tensor.extract_slice %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<128x128xf32> to tensor<64x64xf32>
    %7 = bufferization.to_tensor %alloc_4 restrict writable : memref<2x2x32x32xf32, 1 : i32>
    %8 = bufferization.to_tensor %alloc_3 restrict writable : memref<2x2x8x8x4x4xf32, 2 : i32>
    %9 = linalg.fill ins(%cst : f32) outs(%8 : tensor<2x2x8x8x4x4xf32>) -> tensor<2x2x8x8x4x4xf32>
    %extracted_slice_7 = tensor.extract_slice %extracted_slice[0, 0] [64, 32] [1, 1] : tensor<64x256xbf16> to tensor<64x32xbf16>
    %10 = bufferization.to_tensor %alloc_2 restrict writable : memref<2x1x32x32xbf16, 1 : i32>
    %pack = tensor.pack %extracted_slice_7 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %10 : tensor<64x32xbf16> -> tensor<2x1x32x32xbf16>
    %extracted_slice_8 = tensor.extract_slice %extracted_slice_5[0, 0] [32, 64] [1, 1] : tensor<256x64xbf16> to tensor<32x64xbf16>
    %11 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x2x32x32xbf16, 1 : i32>
    %pack_9 = tensor.pack %extracted_slice_8 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %11 : tensor<32x64xbf16> -> tensor<1x2x32x32xbf16>
    %12 = scf.forall (%arg3, %arg4) in (2, 2) shared_outs(%arg5 = %9) -> (tensor<2x2x8x8x4x4xf32>) {
      %extracted_slice_15 = tensor.extract_slice %pack[%arg3, 0, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<2x1x32x32xbf16> to tensor<1x1x32x32xbf16>
      %17 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x4x8x4x8xbf16, 2 : i32>
      %pack_16 = tensor.pack %extracted_slice_15 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %17 : tensor<1x1x32x32xbf16> -> tensor<1x1x4x8x4x8xbf16>
      %extracted_slice_17 = tensor.extract_slice %pack_9[0, %arg4, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<1x2x32x32xbf16> to tensor<1x1x32x32xbf16>
      %18 = bufferization.to_tensor %alloc restrict writable : memref<1x1x8x4x8x4xbf16, 2 : i32>
      %pack_18 = tensor.pack %extracted_slice_17 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %18 : tensor<1x1x32x32xbf16> -> tensor<1x1x8x4x8x4xbf16>
      %extracted_slice_19 = tensor.extract_slice %arg5[%arg3, %arg4, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
      %19 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_16, %pack_18 : tensor<1x1x4x8x4x8xbf16>, tensor<1x1x8x4x8x4xbf16>) outs(%extracted_slice_19 : tensor<1x1x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
      ^bb0(%in: bf16, %in_20: bf16, %out: f32):
        %20 = arith.extf %in : bf16 to f32
        %21 = arith.extf %in_20 : bf16 to f32
        %22 = arith.mulf %20, %21 : f32
        %23 = arith.addf %out, %22 : f32
        linalg.yield %23 : f32
      } -> tensor<1x1x8x8x4x4xf32>
      scf.forall.in_parallel {
        tensor.parallel_insert_slice %19 into %arg5[%arg3, %arg4, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> into tensor<2x2x8x8x4x4xf32>
      }
    } {mapping = [#gpu.thread<y>, #gpu.thread<x>]}
    %13 = scf.for %arg3 = %c1 to %c7 step %c1 iter_args(%arg4 = %12) -> (tensor<2x2x8x8x4x4xf32>) {
      %17 = affine.apply affine_map<(d0) -> (d0 * 32)>(%arg3)
      %extracted_slice_15 = tensor.extract_slice %extracted_slice[0, %17] [64, 32] [1, 1] : tensor<64x256xbf16> to tensor<64x32xbf16>
      %18 = bufferization.to_tensor %alloc_2 restrict writable : memref<2x1x32x32xbf16, 1 : i32>
      %pack_16 = tensor.pack %extracted_slice_15 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %18 : tensor<64x32xbf16> -> tensor<2x1x32x32xbf16>
      %extracted_slice_17 = tensor.extract_slice %extracted_slice_5[%17, 0] [32, 64] [1, 1] : tensor<256x64xbf16> to tensor<32x64xbf16>
      %19 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x2x32x32xbf16, 1 : i32>
      %pack_18 = tensor.pack %extracted_slice_17 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %19 : tensor<32x64xbf16> -> tensor<1x2x32x32xbf16>
      %20 = scf.forall (%arg5, %arg6) in (2, 2) shared_outs(%arg7 = %arg4) -> (tensor<2x2x8x8x4x4xf32>) {
        %extracted_slice_19 = tensor.extract_slice %pack_16[%arg5, 0, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<2x1x32x32xbf16> to tensor<1x1x32x32xbf16>
        %21 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x4x8x4x8xbf16, 2 : i32>
        %pack_20 = tensor.pack %extracted_slice_19 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %21 : tensor<1x1x32x32xbf16> -> tensor<1x1x4x8x4x8xbf16>
        %extracted_slice_21 = tensor.extract_slice %pack_18[0, %arg6, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<1x2x32x32xbf16> to tensor<1x1x32x32xbf16>
        %22 = bufferization.to_tensor %alloc restrict writable : memref<1x1x8x4x8x4xbf16, 2 : i32>
        %pack_22 = tensor.pack %extracted_slice_21 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %22 : tensor<1x1x32x32xbf16> -> tensor<1x1x8x4x8x4xbf16>
        %extracted_slice_23 = tensor.extract_slice %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
        %23 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_20, %pack_22 : tensor<1x1x4x8x4x8xbf16>, tensor<1x1x8x4x8x4xbf16>) outs(%extracted_slice_23 : tensor<1x1x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
        ^bb0(%in: bf16, %in_24: bf16, %out: f32):
          %24 = arith.extf %in : bf16 to f32
          %25 = arith.extf %in_24 : bf16 to f32
          %26 = arith.mulf %24, %25 : f32
          %27 = arith.addf %out, %26 : f32
          linalg.yield %27 : f32
        } -> tensor<1x1x8x8x4x4xf32>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %23 into %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> into tensor<2x2x8x8x4x4xf32>
        }
      } {mapping = [#gpu.thread<y>, #gpu.thread<x>]}
      scf.yield %20 : tensor<2x2x8x8x4x4xf32>
    }
    %extracted_slice_10 = tensor.extract_slice %extracted_slice[0, 224] [64, 32] [1, 1] : tensor<64x256xbf16> to tensor<64x32xbf16>
    %14 = bufferization.to_tensor %alloc_2 restrict writable : memref<2x1x32x32xbf16, 1 : i32>
    %pack_11 = tensor.pack %extracted_slice_10 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %14 : tensor<64x32xbf16> -> tensor<2x1x32x32xbf16>
    %extracted_slice_12 = tensor.extract_slice %extracted_slice_5[224, 0] [32, 64] [1, 1] : tensor<256x64xbf16> to tensor<32x64xbf16>
    %15 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x2x32x32xbf16, 1 : i32>
    %pack_13 = tensor.pack %extracted_slice_12 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %15 : tensor<32x64xbf16> -> tensor<1x2x32x32xbf16>
    %16 = scf.forall (%arg3, %arg4) in (2, 2) shared_outs(%arg5 = %13) -> (tensor<2x2x8x8x4x4xf32>) {
      %extracted_slice_15 = tensor.extract_slice %pack_11[%arg3, 0, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<2x1x32x32xbf16> to tensor<1x1x32x32xbf16>
      %17 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x4x8x4x8xbf16, 2 : i32>
      %pack_16 = tensor.pack %extracted_slice_15 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %17 : tensor<1x1x32x32xbf16> -> tensor<1x1x4x8x4x8xbf16>
      %extracted_slice_17 = tensor.extract_slice %pack_13[0, %arg4, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<1x2x32x32xbf16> to tensor<1x1x32x32xbf16>
      %18 = bufferization.to_tensor %alloc restrict writable : memref<1x1x8x4x8x4xbf16, 2 : i32>
      %pack_18 = tensor.pack %extracted_slice_17 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %18 : tensor<1x1x32x32xbf16> -> tensor<1x1x8x4x8x4xbf16>
      %extracted_slice_19 = tensor.extract_slice %arg5[%arg3, %arg4, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
      %19 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_16, %pack_18 : tensor<1x1x4x8x4x8xbf16>, tensor<1x1x8x4x8x4xbf16>) outs(%extracted_slice_19 : tensor<1x1x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
      ^bb0(%in: bf16, %in_20: bf16, %out: f32):
        %20 = arith.extf %in : bf16 to f32
        %21 = arith.extf %in_20 : bf16 to f32
        %22 = arith.mulf %20, %21 : f32
        %23 = arith.addf %out, %22 : f32
        linalg.yield %23 : f32
      } -> tensor<1x1x8x8x4x4xf32>
      scf.forall.in_parallel {
        tensor.parallel_insert_slice %19 into %arg5[%arg3, %arg4, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> into tensor<2x2x8x8x4x4xf32>
      }
    } {mapping = [#gpu.thread<y>, #gpu.thread<x>]}
    %unpack = tensor.unpack %16 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %7 : tensor<2x2x8x8x4x4xf32> -> tensor<2x2x32x32xf32>
    %unpack_14 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %extracted_slice_6 : tensor<2x2x32x32xf32> -> tensor<64x64xf32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_14 into %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<64x64xf32> into tensor<128x128xf32>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  memref.dealloc %alloc_4 : memref<2x2x32x32xf32, 1 : i32>
  memref.dealloc %alloc_3 : memref<2x2x8x8x4x4xf32, 2 : i32>
  memref.dealloc %alloc_2 : memref<2x1x32x32xbf16, 1 : i32>
  memref.dealloc %alloc_1 : memref<1x2x32x32xbf16, 1 : i32>
  memref.dealloc %alloc_0 : memref<1x1x4x8x4x8xbf16, 2 : i32>
  memref.dealloc %alloc : memref<1x1x8x4x8x4xbf16, 2 : i32>
  return
}

// -----// IR Dump Before AMDAIEFuseConsumerIntoLoop (iree-amdaie-fuse-consumer-into-loop) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c7 = arith.constant 7 : index
  %c0 = arith.constant 0 : index
  %cst = arith.constant 0.000000e+00 : f32
  %c1 = arith.constant 1 : index
  %alloc = memref.alloc() : memref<1x1x8x4x8x4xbf16, 2 : i32>
  %alloc_0 = memref.alloc() : memref<1x1x4x8x4x8xbf16, 2 : i32>
  %alloc_1 = memref.alloc() : memref<1x2x32x32xbf16, 1 : i32>
  %alloc_2 = memref.alloc() : memref<2x1x32x32xbf16, 1 : i32>
  %alloc_3 = memref.alloc() : memref<2x2x8x8x4x4xf32, 2 : i32>
  %alloc_4 = memref.alloc() : memref<2x2x32x32xf32, 1 : i32>
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (128, 128) step (64, 64) shared_outs(%arg2 = %5) -> (tensor<128x128xf32>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [64, 256] [1, 1] : tensor<128x256xbf16> to tensor<64x256xbf16>
    %extracted_slice_5 = tensor.extract_slice %4[0, %arg1] [256, 64] [1, 1] : tensor<256x128xbf16> to tensor<256x64xbf16>
    %extracted_slice_6 = tensor.extract_slice %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<128x128xf32> to tensor<64x64xf32>
    %7 = bufferization.to_tensor %alloc_4 restrict writable : memref<2x2x32x32xf32, 1 : i32>
    %8 = bufferization.to_tensor %alloc_3 restrict writable : memref<2x2x8x8x4x4xf32, 2 : i32>
    %9 = linalg.fill ins(%cst : f32) outs(%8 : tensor<2x2x8x8x4x4xf32>) -> tensor<2x2x8x8x4x4xf32>
    %extracted_slice_7 = tensor.extract_slice %extracted_slice[0, 0] [64, 32] [1, 1] : tensor<64x256xbf16> to tensor<64x32xbf16>
    %10 = bufferization.to_tensor %alloc_2 restrict writable : memref<2x1x32x32xbf16, 1 : i32>
    %pack = tensor.pack %extracted_slice_7 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %10 : tensor<64x32xbf16> -> tensor<2x1x32x32xbf16>
    %extracted_slice_8 = tensor.extract_slice %extracted_slice_5[0, 0] [32, 64] [1, 1] : tensor<256x64xbf16> to tensor<32x64xbf16>
    %11 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x2x32x32xbf16, 1 : i32>
    %pack_9 = tensor.pack %extracted_slice_8 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %11 : tensor<32x64xbf16> -> tensor<1x2x32x32xbf16>
    %12 = scf.forall (%arg3, %arg4) in (2, 2) shared_outs(%arg5 = %8) -> (tensor<2x2x8x8x4x4xf32>) {
      %extracted_slice_15 = tensor.extract_slice %pack[%arg3, 0, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<2x1x32x32xbf16> to tensor<1x1x32x32xbf16>
      %17 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x4x8x4x8xbf16, 2 : i32>
      %pack_16 = tensor.pack %extracted_slice_15 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %17 : tensor<1x1x32x32xbf16> -> tensor<1x1x4x8x4x8xbf16>
      %extracted_slice_17 = tensor.extract_slice %pack_9[0, %arg4, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<1x2x32x32xbf16> to tensor<1x1x32x32xbf16>
      %18 = bufferization.to_tensor %alloc restrict writable : memref<1x1x8x4x8x4xbf16, 2 : i32>
      %pack_18 = tensor.pack %extracted_slice_17 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %18 : tensor<1x1x32x32xbf16> -> tensor<1x1x8x4x8x4xbf16>
      %extracted_slice_19 = tensor.extract_slice %arg5[%arg3, %arg4, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
      %19 = linalg.fill ins(%cst : f32) outs(%extracted_slice_19 : tensor<1x1x8x8x4x4xf32>) -> tensor<1x1x8x8x4x4xf32>
      %extracted_slice_20 = tensor.extract_slice %arg5[%arg3, %arg4, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
      %20 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_16, %pack_18 : tensor<1x1x4x8x4x8xbf16>, tensor<1x1x8x4x8x4xbf16>) outs(%19 : tensor<1x1x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
      ^bb0(%in: bf16, %in_21: bf16, %out: f32):
        %21 = arith.extf %in : bf16 to f32
        %22 = arith.extf %in_21 : bf16 to f32
        %23 = arith.mulf %21, %22 : f32
        %24 = arith.addf %out, %23 : f32
        linalg.yield %24 : f32
      } -> tensor<1x1x8x8x4x4xf32>
      scf.forall.in_parallel {
        tensor.parallel_insert_slice %20 into %arg5[%arg3, %arg4, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> into tensor<2x2x8x8x4x4xf32>
      }
    } {mapping = [#gpu.thread<y>, #gpu.thread<x>]}
    %13 = scf.for %arg3 = %c1 to %c7 step %c1 iter_args(%arg4 = %12) -> (tensor<2x2x8x8x4x4xf32>) {
      %17 = affine.apply affine_map<(d0) -> (d0 * 32)>(%arg3)
      %extracted_slice_15 = tensor.extract_slice %extracted_slice[0, %17] [64, 32] [1, 1] : tensor<64x256xbf16> to tensor<64x32xbf16>
      %18 = bufferization.to_tensor %alloc_2 restrict writable : memref<2x1x32x32xbf16, 1 : i32>
      %pack_16 = tensor.pack %extracted_slice_15 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %18 : tensor<64x32xbf16> -> tensor<2x1x32x32xbf16>
      %extracted_slice_17 = tensor.extract_slice %extracted_slice_5[%17, 0] [32, 64] [1, 1] : tensor<256x64xbf16> to tensor<32x64xbf16>
      %19 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x2x32x32xbf16, 1 : i32>
      %pack_18 = tensor.pack %extracted_slice_17 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %19 : tensor<32x64xbf16> -> tensor<1x2x32x32xbf16>
      %20 = scf.forall (%arg5, %arg6) in (2, 2) shared_outs(%arg7 = %arg4) -> (tensor<2x2x8x8x4x4xf32>) {
        %extracted_slice_19 = tensor.extract_slice %pack_16[%arg5, 0, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<2x1x32x32xbf16> to tensor<1x1x32x32xbf16>
        %21 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x4x8x4x8xbf16, 2 : i32>
        %pack_20 = tensor.pack %extracted_slice_19 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %21 : tensor<1x1x32x32xbf16> -> tensor<1x1x4x8x4x8xbf16>
        %extracted_slice_21 = tensor.extract_slice %pack_18[0, %arg6, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<1x2x32x32xbf16> to tensor<1x1x32x32xbf16>
        %22 = bufferization.to_tensor %alloc restrict writable : memref<1x1x8x4x8x4xbf16, 2 : i32>
        %pack_22 = tensor.pack %extracted_slice_21 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %22 : tensor<1x1x32x32xbf16> -> tensor<1x1x8x4x8x4xbf16>
        %extracted_slice_23 = tensor.extract_slice %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
        %23 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_20, %pack_22 : tensor<1x1x4x8x4x8xbf16>, tensor<1x1x8x4x8x4xbf16>) outs(%extracted_slice_23 : tensor<1x1x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
        ^bb0(%in: bf16, %in_24: bf16, %out: f32):
          %24 = arith.extf %in : bf16 to f32
          %25 = arith.extf %in_24 : bf16 to f32
          %26 = arith.mulf %24, %25 : f32
          %27 = arith.addf %out, %26 : f32
          linalg.yield %27 : f32
        } -> tensor<1x1x8x8x4x4xf32>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %23 into %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> into tensor<2x2x8x8x4x4xf32>
        }
      } {mapping = [#gpu.thread<y>, #gpu.thread<x>]}
      scf.yield %20 : tensor<2x2x8x8x4x4xf32>
    }
    %extracted_slice_10 = tensor.extract_slice %extracted_slice[0, 224] [64, 32] [1, 1] : tensor<64x256xbf16> to tensor<64x32xbf16>
    %14 = bufferization.to_tensor %alloc_2 restrict writable : memref<2x1x32x32xbf16, 1 : i32>
    %pack_11 = tensor.pack %extracted_slice_10 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %14 : tensor<64x32xbf16> -> tensor<2x1x32x32xbf16>
    %extracted_slice_12 = tensor.extract_slice %extracted_slice_5[224, 0] [32, 64] [1, 1] : tensor<256x64xbf16> to tensor<32x64xbf16>
    %15 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x2x32x32xbf16, 1 : i32>
    %pack_13 = tensor.pack %extracted_slice_12 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %15 : tensor<32x64xbf16> -> tensor<1x2x32x32xbf16>
    %16 = scf.forall (%arg3, %arg4) in (2, 2) shared_outs(%arg5 = %13) -> (tensor<2x2x8x8x4x4xf32>) {
      %extracted_slice_15 = tensor.extract_slice %pack_11[%arg3, 0, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<2x1x32x32xbf16> to tensor<1x1x32x32xbf16>
      %17 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x4x8x4x8xbf16, 2 : i32>
      %pack_16 = tensor.pack %extracted_slice_15 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %17 : tensor<1x1x32x32xbf16> -> tensor<1x1x4x8x4x8xbf16>
      %extracted_slice_17 = tensor.extract_slice %pack_13[0, %arg4, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<1x2x32x32xbf16> to tensor<1x1x32x32xbf16>
      %18 = bufferization.to_tensor %alloc restrict writable : memref<1x1x8x4x8x4xbf16, 2 : i32>
      %pack_18 = tensor.pack %extracted_slice_17 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %18 : tensor<1x1x32x32xbf16> -> tensor<1x1x8x4x8x4xbf16>
      %extracted_slice_19 = tensor.extract_slice %arg5[%arg3, %arg4, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
      %19 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_16, %pack_18 : tensor<1x1x4x8x4x8xbf16>, tensor<1x1x8x4x8x4xbf16>) outs(%extracted_slice_19 : tensor<1x1x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
      ^bb0(%in: bf16, %in_20: bf16, %out: f32):
        %20 = arith.extf %in : bf16 to f32
        %21 = arith.extf %in_20 : bf16 to f32
        %22 = arith.mulf %20, %21 : f32
        %23 = arith.addf %out, %22 : f32
        linalg.yield %23 : f32
      } -> tensor<1x1x8x8x4x4xf32>
      scf.forall.in_parallel {
        tensor.parallel_insert_slice %19 into %arg5[%arg3, %arg4, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> into tensor<2x2x8x8x4x4xf32>
      }
    } {mapping = [#gpu.thread<y>, #gpu.thread<x>]}
    %unpack = tensor.unpack %16 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %7 : tensor<2x2x8x8x4x4xf32> -> tensor<2x2x32x32xf32>
    %unpack_14 = tensor.unpack %unpack inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %extracted_slice_6 : tensor<2x2x32x32xf32> -> tensor<64x64xf32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack_14 into %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<64x64xf32> into tensor<128x128xf32>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  memref.dealloc %alloc_4 : memref<2x2x32x32xf32, 1 : i32>
  memref.dealloc %alloc_3 : memref<2x2x8x8x4x4xf32, 2 : i32>
  memref.dealloc %alloc_2 : memref<2x1x32x32xbf16, 1 : i32>
  memref.dealloc %alloc_1 : memref<1x2x32x32xbf16, 1 : i32>
  memref.dealloc %alloc_0 : memref<1x1x4x8x4x8xbf16, 2 : i32>
  memref.dealloc %alloc : memref<1x1x8x4x8x4xbf16, 2 : i32>
  return
}

// -----// IR Dump Before AMDAIEFusePackIntoLoop (iree-amdaie-fuse-pack-into-loop) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c7 = arith.constant 7 : index
  %c0 = arith.constant 0 : index
  %cst = arith.constant 0.000000e+00 : f32
  %c1 = arith.constant 1 : index
  %alloc = memref.alloc() : memref<1x1x8x4x8x4xbf16, 2 : i32>
  %alloc_0 = memref.alloc() : memref<1x1x4x8x4x8xbf16, 2 : i32>
  %alloc_1 = memref.alloc() : memref<1x2x32x32xbf16, 1 : i32>
  %alloc_2 = memref.alloc() : memref<2x1x32x32xbf16, 1 : i32>
  %alloc_3 = memref.alloc() : memref<2x2x8x8x4x4xf32, 2 : i32>
  %alloc_4 = memref.alloc() : memref<2x2x32x32xf32, 1 : i32>
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (128, 128) step (64, 64) shared_outs(%arg2 = %5) -> (tensor<128x128xf32>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [64, 256] [1, 1] : tensor<128x256xbf16> to tensor<64x256xbf16>
    %extracted_slice_5 = tensor.extract_slice %4[0, %arg1] [256, 64] [1, 1] : tensor<256x128xbf16> to tensor<256x64xbf16>
    %extracted_slice_6 = tensor.extract_slice %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<128x128xf32> to tensor<64x64xf32>
    %7 = bufferization.to_tensor %alloc_4 restrict writable : memref<2x2x32x32xf32, 1 : i32>
    %8 = bufferization.to_tensor %alloc_3 restrict writable : memref<2x2x8x8x4x4xf32, 2 : i32>
    %9 = linalg.fill ins(%cst : f32) outs(%8 : tensor<2x2x8x8x4x4xf32>) -> tensor<2x2x8x8x4x4xf32>
    %extracted_slice_7 = tensor.extract_slice %extracted_slice[0, 0] [64, 32] [1, 1] : tensor<64x256xbf16> to tensor<64x32xbf16>
    %10 = bufferization.to_tensor %alloc_2 restrict writable : memref<2x1x32x32xbf16, 1 : i32>
    %pack = tensor.pack %extracted_slice_7 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %10 : tensor<64x32xbf16> -> tensor<2x1x32x32xbf16>
    %extracted_slice_8 = tensor.extract_slice %extracted_slice_5[0, 0] [32, 64] [1, 1] : tensor<256x64xbf16> to tensor<32x64xbf16>
    %11 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x2x32x32xbf16, 1 : i32>
    %pack_9 = tensor.pack %extracted_slice_8 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %11 : tensor<32x64xbf16> -> tensor<1x2x32x32xbf16>
    %12 = scf.forall (%arg3, %arg4) in (2, 2) shared_outs(%arg5 = %8) -> (tensor<2x2x8x8x4x4xf32>) {
      %extracted_slice_14 = tensor.extract_slice %pack[%arg3, 0, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<2x1x32x32xbf16> to tensor<1x1x32x32xbf16>
      %17 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x4x8x4x8xbf16, 2 : i32>
      %pack_15 = tensor.pack %extracted_slice_14 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %17 : tensor<1x1x32x32xbf16> -> tensor<1x1x4x8x4x8xbf16>
      %extracted_slice_16 = tensor.extract_slice %pack_9[0, %arg4, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<1x2x32x32xbf16> to tensor<1x1x32x32xbf16>
      %18 = bufferization.to_tensor %alloc restrict writable : memref<1x1x8x4x8x4xbf16, 2 : i32>
      %pack_17 = tensor.pack %extracted_slice_16 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %18 : tensor<1x1x32x32xbf16> -> tensor<1x1x8x4x8x4xbf16>
      %extracted_slice_18 = tensor.extract_slice %arg5[%arg3, %arg4, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
      %19 = linalg.fill ins(%cst : f32) outs(%extracted_slice_18 : tensor<1x1x8x8x4x4xf32>) -> tensor<1x1x8x8x4x4xf32>
      %extracted_slice_19 = tensor.extract_slice %arg5[%arg3, %arg4, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
      %20 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_15, %pack_17 : tensor<1x1x4x8x4x8xbf16>, tensor<1x1x8x4x8x4xbf16>) outs(%19 : tensor<1x1x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
      ^bb0(%in: bf16, %in_20: bf16, %out: f32):
        %21 = arith.extf %in : bf16 to f32
        %22 = arith.extf %in_20 : bf16 to f32
        %23 = arith.mulf %21, %22 : f32
        %24 = arith.addf %out, %23 : f32
        linalg.yield %24 : f32
      } -> tensor<1x1x8x8x4x4xf32>
      scf.forall.in_parallel {
        tensor.parallel_insert_slice %20 into %arg5[%arg3, %arg4, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> into tensor<2x2x8x8x4x4xf32>
      }
    } {mapping = [#gpu.thread<y>, #gpu.thread<x>]}
    %13 = scf.for %arg3 = %c1 to %c7 step %c1 iter_args(%arg4 = %12) -> (tensor<2x2x8x8x4x4xf32>) {
      %17 = affine.apply affine_map<(d0) -> (d0 * 32)>(%arg3)
      %extracted_slice_14 = tensor.extract_slice %extracted_slice[0, %17] [64, 32] [1, 1] : tensor<64x256xbf16> to tensor<64x32xbf16>
      %18 = bufferization.to_tensor %alloc_2 restrict writable : memref<2x1x32x32xbf16, 1 : i32>
      %pack_15 = tensor.pack %extracted_slice_14 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %18 : tensor<64x32xbf16> -> tensor<2x1x32x32xbf16>
      %extracted_slice_16 = tensor.extract_slice %extracted_slice_5[%17, 0] [32, 64] [1, 1] : tensor<256x64xbf16> to tensor<32x64xbf16>
      %19 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x2x32x32xbf16, 1 : i32>
      %pack_17 = tensor.pack %extracted_slice_16 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %19 : tensor<32x64xbf16> -> tensor<1x2x32x32xbf16>
      %20 = scf.forall (%arg5, %arg6) in (2, 2) shared_outs(%arg7 = %arg4) -> (tensor<2x2x8x8x4x4xf32>) {
        %extracted_slice_18 = tensor.extract_slice %pack_15[%arg5, 0, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<2x1x32x32xbf16> to tensor<1x1x32x32xbf16>
        %21 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x4x8x4x8xbf16, 2 : i32>
        %pack_19 = tensor.pack %extracted_slice_18 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %21 : tensor<1x1x32x32xbf16> -> tensor<1x1x4x8x4x8xbf16>
        %extracted_slice_20 = tensor.extract_slice %pack_17[0, %arg6, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<1x2x32x32xbf16> to tensor<1x1x32x32xbf16>
        %22 = bufferization.to_tensor %alloc restrict writable : memref<1x1x8x4x8x4xbf16, 2 : i32>
        %pack_21 = tensor.pack %extracted_slice_20 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %22 : tensor<1x1x32x32xbf16> -> tensor<1x1x8x4x8x4xbf16>
        %extracted_slice_22 = tensor.extract_slice %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
        %23 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_19, %pack_21 : tensor<1x1x4x8x4x8xbf16>, tensor<1x1x8x4x8x4xbf16>) outs(%extracted_slice_22 : tensor<1x1x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
        ^bb0(%in: bf16, %in_23: bf16, %out: f32):
          %24 = arith.extf %in : bf16 to f32
          %25 = arith.extf %in_23 : bf16 to f32
          %26 = arith.mulf %24, %25 : f32
          %27 = arith.addf %out, %26 : f32
          linalg.yield %27 : f32
        } -> tensor<1x1x8x8x4x4xf32>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %23 into %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> into tensor<2x2x8x8x4x4xf32>
        }
      } {mapping = [#gpu.thread<y>, #gpu.thread<x>]}
      scf.yield %20 : tensor<2x2x8x8x4x4xf32>
    }
    %extracted_slice_10 = tensor.extract_slice %extracted_slice[0, 224] [64, 32] [1, 1] : tensor<64x256xbf16> to tensor<64x32xbf16>
    %14 = bufferization.to_tensor %alloc_2 restrict writable : memref<2x1x32x32xbf16, 1 : i32>
    %pack_11 = tensor.pack %extracted_slice_10 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %14 : tensor<64x32xbf16> -> tensor<2x1x32x32xbf16>
    %extracted_slice_12 = tensor.extract_slice %extracted_slice_5[224, 0] [32, 64] [1, 1] : tensor<256x64xbf16> to tensor<32x64xbf16>
    %15 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x2x32x32xbf16, 1 : i32>
    %pack_13 = tensor.pack %extracted_slice_12 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %15 : tensor<32x64xbf16> -> tensor<1x2x32x32xbf16>
    %16:2 = scf.forall (%arg3, %arg4) in (2, 2) shared_outs(%arg5 = %13, %arg6 = %7) -> (tensor<2x2x8x8x4x4xf32>, tensor<2x2x32x32xf32>) {
      %extracted_slice_14 = tensor.extract_slice %pack_11[%arg3, 0, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<2x1x32x32xbf16> to tensor<1x1x32x32xbf16>
      %17 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x4x8x4x8xbf16, 2 : i32>
      %pack_15 = tensor.pack %extracted_slice_14 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %17 : tensor<1x1x32x32xbf16> -> tensor<1x1x4x8x4x8xbf16>
      %extracted_slice_16 = tensor.extract_slice %pack_13[0, %arg4, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<1x2x32x32xbf16> to tensor<1x1x32x32xbf16>
      %18 = bufferization.to_tensor %alloc restrict writable : memref<1x1x8x4x8x4xbf16, 2 : i32>
      %pack_17 = tensor.pack %extracted_slice_16 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %18 : tensor<1x1x32x32xbf16> -> tensor<1x1x8x4x8x4xbf16>
      %extracted_slice_18 = tensor.extract_slice %arg5[%arg3, %arg4, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
      %19 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_15, %pack_17 : tensor<1x1x4x8x4x8xbf16>, tensor<1x1x8x4x8x4xbf16>) outs(%extracted_slice_18 : tensor<1x1x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
      ^bb0(%in: bf16, %in_22: bf16, %out: f32):
        %20 = arith.extf %in : bf16 to f32
        %21 = arith.extf %in_22 : bf16 to f32
        %22 = arith.mulf %20, %21 : f32
        %23 = arith.addf %out, %22 : f32
        linalg.yield %23 : f32
      } -> tensor<1x1x8x8x4x4xf32>
      %inserted_slice = tensor.insert_slice %19 into %arg5[%arg3, %arg4, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> into tensor<2x2x8x8x4x4xf32>
      %extracted_slice_19 = tensor.extract_slice %arg6[%arg3, %arg4, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<2x2x32x32xf32> to tensor<1x1x32x32xf32>
      %extracted_slice_20 = tensor.extract_slice %inserted_slice[%arg3, %arg4, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
      %unpack_21 = tensor.unpack %19 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %extracted_slice_19 : tensor<1x1x8x8x4x4xf32> -> tensor<1x1x32x32xf32>
      scf.forall.in_parallel {
        tensor.parallel_insert_slice %unpack_21 into %arg6[%arg3, %arg4, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<1x1x32x32xf32> into tensor<2x2x32x32xf32>
        tensor.parallel_insert_slice %19 into %arg5[%arg3, %arg4, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> into tensor<2x2x8x8x4x4xf32>
      }
    } {mapping = [#gpu.thread<y>, #gpu.thread<x>]}
    %unpack = tensor.unpack %16#1 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %extracted_slice_6 : tensor<2x2x32x32xf32> -> tensor<64x64xf32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack into %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<64x64xf32> into tensor<128x128xf32>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  memref.dealloc %alloc_4 : memref<2x2x32x32xf32, 1 : i32>
  memref.dealloc %alloc_3 : memref<2x2x8x8x4x4xf32, 2 : i32>
  memref.dealloc %alloc_2 : memref<2x1x32x32xbf16, 1 : i32>
  memref.dealloc %alloc_1 : memref<1x2x32x32xbf16, 1 : i32>
  memref.dealloc %alloc_0 : memref<1x1x4x8x4x8xbf16, 2 : i32>
  memref.dealloc %alloc : memref<1x1x8x4x8x4xbf16, 2 : i32>
  return
}

// -----// IR Dump Before AMDAIEBufferizeToAllocation (iree-amdaie-bufferize-to-allocation) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c7 = arith.constant 7 : index
  %c0 = arith.constant 0 : index
  %cst = arith.constant 0.000000e+00 : f32
  %c1 = arith.constant 1 : index
  %alloc = memref.alloc() : memref<1x1x8x4x8x4xbf16, 2 : i32>
  %alloc_0 = memref.alloc() : memref<1x1x4x8x4x8xbf16, 2 : i32>
  %alloc_1 = memref.alloc() : memref<1x2x32x32xbf16, 1 : i32>
  %alloc_2 = memref.alloc() : memref<2x1x32x32xbf16, 1 : i32>
  %alloc_3 = memref.alloc() : memref<2x2x8x8x4x4xf32, 2 : i32>
  %alloc_4 = memref.alloc() : memref<2x2x32x32xf32, 1 : i32>
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (128, 128) step (64, 64) shared_outs(%arg2 = %5) -> (tensor<128x128xf32>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [64, 256] [1, 1] : tensor<128x256xbf16> to tensor<64x256xbf16>
    %extracted_slice_5 = tensor.extract_slice %4[0, %arg1] [256, 64] [1, 1] : tensor<256x128xbf16> to tensor<256x64xbf16>
    %extracted_slice_6 = tensor.extract_slice %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<128x128xf32> to tensor<64x64xf32>
    %7 = bufferization.to_tensor %alloc_4 restrict writable : memref<2x2x32x32xf32, 1 : i32>
    %8 = bufferization.to_tensor %alloc_3 restrict writable : memref<2x2x8x8x4x4xf32, 2 : i32>
    %9 = linalg.fill ins(%cst : f32) outs(%8 : tensor<2x2x8x8x4x4xf32>) -> tensor<2x2x8x8x4x4xf32>
    %extracted_slice_7 = tensor.extract_slice %extracted_slice[0, 0] [64, 32] [1, 1] : tensor<64x256xbf16> to tensor<64x32xbf16>
    %10 = bufferization.to_tensor %alloc_2 restrict writable : memref<2x1x32x32xbf16, 1 : i32>
    %pack = tensor.pack %extracted_slice_7 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %10 : tensor<64x32xbf16> -> tensor<2x1x32x32xbf16>
    %extracted_slice_8 = tensor.extract_slice %extracted_slice_5[0, 0] [32, 64] [1, 1] : tensor<256x64xbf16> to tensor<32x64xbf16>
    %11 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x2x32x32xbf16, 1 : i32>
    %pack_9 = tensor.pack %extracted_slice_8 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %11 : tensor<32x64xbf16> -> tensor<1x2x32x32xbf16>
    %12 = scf.forall (%arg3, %arg4) in (2, 2) shared_outs(%arg5 = %8) -> (tensor<2x2x8x8x4x4xf32>) {
      %extracted_slice_14 = tensor.extract_slice %pack[%arg3, 0, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<2x1x32x32xbf16> to tensor<1x1x32x32xbf16>
      %17 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x4x8x4x8xbf16, 2 : i32>
      %pack_15 = tensor.pack %extracted_slice_14 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %17 : tensor<1x1x32x32xbf16> -> tensor<1x1x4x8x4x8xbf16>
      %extracted_slice_16 = tensor.extract_slice %pack_9[0, %arg4, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<1x2x32x32xbf16> to tensor<1x1x32x32xbf16>
      %18 = bufferization.to_tensor %alloc restrict writable : memref<1x1x8x4x8x4xbf16, 2 : i32>
      %pack_17 = tensor.pack %extracted_slice_16 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %18 : tensor<1x1x32x32xbf16> -> tensor<1x1x8x4x8x4xbf16>
      %extracted_slice_18 = tensor.extract_slice %arg5[%arg3, %arg4, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
      %19 = linalg.fill ins(%cst : f32) outs(%extracted_slice_18 : tensor<1x1x8x8x4x4xf32>) -> tensor<1x1x8x8x4x4xf32>
      %extracted_slice_19 = tensor.extract_slice %arg5[%arg3, %arg4, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
      %20 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_15, %pack_17 : tensor<1x1x4x8x4x8xbf16>, tensor<1x1x8x4x8x4xbf16>) outs(%19 : tensor<1x1x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
      ^bb0(%in: bf16, %in_20: bf16, %out: f32):
        %21 = arith.extf %in : bf16 to f32
        %22 = arith.extf %in_20 : bf16 to f32
        %23 = arith.mulf %21, %22 : f32
        %24 = arith.addf %out, %23 : f32
        linalg.yield %24 : f32
      } -> tensor<1x1x8x8x4x4xf32>
      scf.forall.in_parallel {
        tensor.parallel_insert_slice %20 into %arg5[%arg3, %arg4, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> into tensor<2x2x8x8x4x4xf32>
      }
    } {mapping = [#gpu.thread<y>, #gpu.thread<x>]}
    %13 = scf.for %arg3 = %c1 to %c7 step %c1 iter_args(%arg4 = %12) -> (tensor<2x2x8x8x4x4xf32>) {
      %17 = affine.apply affine_map<(d0) -> (d0 * 32)>(%arg3)
      %extracted_slice_14 = tensor.extract_slice %extracted_slice[0, %17] [64, 32] [1, 1] : tensor<64x256xbf16> to tensor<64x32xbf16>
      %18 = bufferization.to_tensor %alloc_2 restrict writable : memref<2x1x32x32xbf16, 1 : i32>
      %pack_15 = tensor.pack %extracted_slice_14 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %18 : tensor<64x32xbf16> -> tensor<2x1x32x32xbf16>
      %extracted_slice_16 = tensor.extract_slice %extracted_slice_5[%17, 0] [32, 64] [1, 1] : tensor<256x64xbf16> to tensor<32x64xbf16>
      %19 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x2x32x32xbf16, 1 : i32>
      %pack_17 = tensor.pack %extracted_slice_16 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %19 : tensor<32x64xbf16> -> tensor<1x2x32x32xbf16>
      %20 = scf.forall (%arg5, %arg6) in (2, 2) shared_outs(%arg7 = %arg4) -> (tensor<2x2x8x8x4x4xf32>) {
        %extracted_slice_18 = tensor.extract_slice %pack_15[%arg5, 0, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<2x1x32x32xbf16> to tensor<1x1x32x32xbf16>
        %21 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x4x8x4x8xbf16, 2 : i32>
        %pack_19 = tensor.pack %extracted_slice_18 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %21 : tensor<1x1x32x32xbf16> -> tensor<1x1x4x8x4x8xbf16>
        %extracted_slice_20 = tensor.extract_slice %pack_17[0, %arg6, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<1x2x32x32xbf16> to tensor<1x1x32x32xbf16>
        %22 = bufferization.to_tensor %alloc restrict writable : memref<1x1x8x4x8x4xbf16, 2 : i32>
        %pack_21 = tensor.pack %extracted_slice_20 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %22 : tensor<1x1x32x32xbf16> -> tensor<1x1x8x4x8x4xbf16>
        %extracted_slice_22 = tensor.extract_slice %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
        %23 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_19, %pack_21 : tensor<1x1x4x8x4x8xbf16>, tensor<1x1x8x4x8x4xbf16>) outs(%extracted_slice_22 : tensor<1x1x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
        ^bb0(%in: bf16, %in_23: bf16, %out: f32):
          %24 = arith.extf %in : bf16 to f32
          %25 = arith.extf %in_23 : bf16 to f32
          %26 = arith.mulf %24, %25 : f32
          %27 = arith.addf %out, %26 : f32
          linalg.yield %27 : f32
        } -> tensor<1x1x8x8x4x4xf32>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %23 into %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> into tensor<2x2x8x8x4x4xf32>
        }
      } {mapping = [#gpu.thread<y>, #gpu.thread<x>]}
      scf.yield %20 : tensor<2x2x8x8x4x4xf32>
    }
    %extracted_slice_10 = tensor.extract_slice %extracted_slice[0, 224] [64, 32] [1, 1] : tensor<64x256xbf16> to tensor<64x32xbf16>
    %14 = bufferization.to_tensor %alloc_2 restrict writable : memref<2x1x32x32xbf16, 1 : i32>
    %pack_11 = tensor.pack %extracted_slice_10 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %14 : tensor<64x32xbf16> -> tensor<2x1x32x32xbf16>
    %extracted_slice_12 = tensor.extract_slice %extracted_slice_5[224, 0] [32, 64] [1, 1] : tensor<256x64xbf16> to tensor<32x64xbf16>
    %15 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x2x32x32xbf16, 1 : i32>
    %pack_13 = tensor.pack %extracted_slice_12 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %15 : tensor<32x64xbf16> -> tensor<1x2x32x32xbf16>
    %16:2 = scf.forall (%arg3, %arg4) in (2, 2) shared_outs(%arg5 = %13, %arg6 = %7) -> (tensor<2x2x8x8x4x4xf32>, tensor<2x2x32x32xf32>) {
      %extracted_slice_14 = tensor.extract_slice %pack_11[%arg3, 0, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<2x1x32x32xbf16> to tensor<1x1x32x32xbf16>
      %17 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x4x8x4x8xbf16, 2 : i32>
      %pack_15 = tensor.pack %extracted_slice_14 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %17 : tensor<1x1x32x32xbf16> -> tensor<1x1x4x8x4x8xbf16>
      %extracted_slice_16 = tensor.extract_slice %pack_13[0, %arg4, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<1x2x32x32xbf16> to tensor<1x1x32x32xbf16>
      %18 = bufferization.to_tensor %alloc restrict writable : memref<1x1x8x4x8x4xbf16, 2 : i32>
      %pack_17 = tensor.pack %extracted_slice_16 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %18 : tensor<1x1x32x32xbf16> -> tensor<1x1x8x4x8x4xbf16>
      %extracted_slice_18 = tensor.extract_slice %arg5[%arg3, %arg4, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
      %19 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_15, %pack_17 : tensor<1x1x4x8x4x8xbf16>, tensor<1x1x8x4x8x4xbf16>) outs(%extracted_slice_18 : tensor<1x1x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
      ^bb0(%in: bf16, %in_22: bf16, %out: f32):
        %20 = arith.extf %in : bf16 to f32
        %21 = arith.extf %in_22 : bf16 to f32
        %22 = arith.mulf %20, %21 : f32
        %23 = arith.addf %out, %22 : f32
        linalg.yield %23 : f32
      } -> tensor<1x1x8x8x4x4xf32>
      %inserted_slice = tensor.insert_slice %19 into %arg5[%arg3, %arg4, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> into tensor<2x2x8x8x4x4xf32>
      %extracted_slice_19 = tensor.extract_slice %arg6[%arg3, %arg4, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<2x2x32x32xf32> to tensor<1x1x32x32xf32>
      %extracted_slice_20 = tensor.extract_slice %inserted_slice[%arg3, %arg4, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
      %unpack_21 = tensor.unpack %19 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %extracted_slice_19 : tensor<1x1x8x8x4x4xf32> -> tensor<1x1x32x32xf32>
      scf.forall.in_parallel {
        tensor.parallel_insert_slice %unpack_21 into %arg6[%arg3, %arg4, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<1x1x32x32xf32> into tensor<2x2x32x32xf32>
        tensor.parallel_insert_slice %19 into %arg5[%arg3, %arg4, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> into tensor<2x2x8x8x4x4xf32>
      }
    } {mapping = [#gpu.thread<y>, #gpu.thread<x>]}
    %unpack = tensor.unpack %16#1 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %extracted_slice_6 : tensor<2x2x32x32xf32> -> tensor<64x64xf32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack into %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<64x64xf32> into tensor<128x128xf32>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  memref.dealloc %alloc_4 : memref<2x2x32x32xf32, 1 : i32>
  memref.dealloc %alloc_3 : memref<2x2x8x8x4x4xf32, 2 : i32>
  memref.dealloc %alloc_2 : memref<2x1x32x32xbf16, 1 : i32>
  memref.dealloc %alloc_1 : memref<1x2x32x32xbf16, 1 : i32>
  memref.dealloc %alloc_0 : memref<1x1x4x8x4x8xbf16, 2 : i32>
  memref.dealloc %alloc : memref<1x1x8x4x8x4xbf16, 2 : i32>
  return
}

// -----// IR Dump Before AMDAIELowerToUKernels (iree-amdaie-lower-to-ukernels) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c7 = arith.constant 7 : index
  %c0 = arith.constant 0 : index
  %cst = arith.constant 0.000000e+00 : f32
  %c1 = arith.constant 1 : index
  %alloc = memref.alloc() : memref<1x1x8x4x8x4xbf16, 2 : i32>
  %alloc_0 = memref.alloc() : memref<1x1x4x8x4x8xbf16, 2 : i32>
  %alloc_1 = memref.alloc() : memref<1x2x32x32xbf16, 1 : i32>
  %alloc_2 = memref.alloc() : memref<2x1x32x32xbf16, 1 : i32>
  %alloc_3 = memref.alloc() : memref<2x2x8x8x4x4xf32, 2 : i32>
  %alloc_4 = memref.alloc() : memref<2x2x32x32xf32, 1 : i32>
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (128, 128) step (64, 64) shared_outs(%arg2 = %5) -> (tensor<128x128xf32>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [64, 256] [1, 1] : tensor<128x256xbf16> to tensor<64x256xbf16>
    %extracted_slice_5 = tensor.extract_slice %4[0, %arg1] [256, 64] [1, 1] : tensor<256x128xbf16> to tensor<256x64xbf16>
    %extracted_slice_6 = tensor.extract_slice %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<128x128xf32> to tensor<64x64xf32>
    %7 = bufferization.to_tensor %alloc_4 restrict writable : memref<2x2x32x32xf32, 1 : i32>
    %8 = bufferization.to_tensor %alloc_3 restrict writable : memref<2x2x8x8x4x4xf32, 2 : i32>
    %9 = linalg.fill ins(%cst : f32) outs(%8 : tensor<2x2x8x8x4x4xf32>) -> tensor<2x2x8x8x4x4xf32>
    %extracted_slice_7 = tensor.extract_slice %extracted_slice[0, 0] [64, 32] [1, 1] : tensor<64x256xbf16> to tensor<64x32xbf16>
    %10 = bufferization.to_tensor %alloc_2 restrict writable : memref<2x1x32x32xbf16, 1 : i32>
    %pack = tensor.pack %extracted_slice_7 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %10 : tensor<64x32xbf16> -> tensor<2x1x32x32xbf16>
    %extracted_slice_8 = tensor.extract_slice %extracted_slice_5[0, 0] [32, 64] [1, 1] : tensor<256x64xbf16> to tensor<32x64xbf16>
    %11 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x2x32x32xbf16, 1 : i32>
    %pack_9 = tensor.pack %extracted_slice_8 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %11 : tensor<32x64xbf16> -> tensor<1x2x32x32xbf16>
    %12 = scf.forall (%arg3, %arg4) in (2, 2) shared_outs(%arg5 = %8) -> (tensor<2x2x8x8x4x4xf32>) {
      %extracted_slice_14 = tensor.extract_slice %pack[%arg3, 0, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<2x1x32x32xbf16> to tensor<1x1x32x32xbf16>
      %17 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x4x8x4x8xbf16, 2 : i32>
      %pack_15 = tensor.pack %extracted_slice_14 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %17 : tensor<1x1x32x32xbf16> -> tensor<1x1x4x8x4x8xbf16>
      %extracted_slice_16 = tensor.extract_slice %pack_9[0, %arg4, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<1x2x32x32xbf16> to tensor<1x1x32x32xbf16>
      %18 = bufferization.to_tensor %alloc restrict writable : memref<1x1x8x4x8x4xbf16, 2 : i32>
      %pack_17 = tensor.pack %extracted_slice_16 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %18 : tensor<1x1x32x32xbf16> -> tensor<1x1x8x4x8x4xbf16>
      %extracted_slice_18 = tensor.extract_slice %arg5[%arg3, %arg4, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
      %19 = linalg.fill ins(%cst : f32) outs(%extracted_slice_18 : tensor<1x1x8x8x4x4xf32>) -> tensor<1x1x8x8x4x4xf32>
      %extracted_slice_19 = tensor.extract_slice %arg5[%arg3, %arg4, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
      %20 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_15, %pack_17 : tensor<1x1x4x8x4x8xbf16>, tensor<1x1x8x4x8x4xbf16>) outs(%19 : tensor<1x1x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
      ^bb0(%in: bf16, %in_20: bf16, %out: f32):
        %21 = arith.extf %in : bf16 to f32
        %22 = arith.extf %in_20 : bf16 to f32
        %23 = arith.mulf %21, %22 : f32
        %24 = arith.addf %out, %23 : f32
        linalg.yield %24 : f32
      } -> tensor<1x1x8x8x4x4xf32>
      scf.forall.in_parallel {
        tensor.parallel_insert_slice %20 into %arg5[%arg3, %arg4, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> into tensor<2x2x8x8x4x4xf32>
      }
    } {mapping = [#gpu.thread<y>, #gpu.thread<x>]}
    %13 = scf.for %arg3 = %c1 to %c7 step %c1 iter_args(%arg4 = %12) -> (tensor<2x2x8x8x4x4xf32>) {
      %17 = affine.apply affine_map<(d0) -> (d0 * 32)>(%arg3)
      %extracted_slice_14 = tensor.extract_slice %extracted_slice[0, %17] [64, 32] [1, 1] : tensor<64x256xbf16> to tensor<64x32xbf16>
      %18 = bufferization.to_tensor %alloc_2 restrict writable : memref<2x1x32x32xbf16, 1 : i32>
      %pack_15 = tensor.pack %extracted_slice_14 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %18 : tensor<64x32xbf16> -> tensor<2x1x32x32xbf16>
      %extracted_slice_16 = tensor.extract_slice %extracted_slice_5[%17, 0] [32, 64] [1, 1] : tensor<256x64xbf16> to tensor<32x64xbf16>
      %19 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x2x32x32xbf16, 1 : i32>
      %pack_17 = tensor.pack %extracted_slice_16 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %19 : tensor<32x64xbf16> -> tensor<1x2x32x32xbf16>
      %20 = scf.forall (%arg5, %arg6) in (2, 2) shared_outs(%arg7 = %arg4) -> (tensor<2x2x8x8x4x4xf32>) {
        %extracted_slice_18 = tensor.extract_slice %pack_15[%arg5, 0, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<2x1x32x32xbf16> to tensor<1x1x32x32xbf16>
        %21 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x4x8x4x8xbf16, 2 : i32>
        %pack_19 = tensor.pack %extracted_slice_18 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %21 : tensor<1x1x32x32xbf16> -> tensor<1x1x4x8x4x8xbf16>
        %extracted_slice_20 = tensor.extract_slice %pack_17[0, %arg6, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<1x2x32x32xbf16> to tensor<1x1x32x32xbf16>
        %22 = bufferization.to_tensor %alloc restrict writable : memref<1x1x8x4x8x4xbf16, 2 : i32>
        %pack_21 = tensor.pack %extracted_slice_20 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %22 : tensor<1x1x32x32xbf16> -> tensor<1x1x8x4x8x4xbf16>
        %extracted_slice_22 = tensor.extract_slice %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
        %23 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_19, %pack_21 : tensor<1x1x4x8x4x8xbf16>, tensor<1x1x8x4x8x4xbf16>) outs(%extracted_slice_22 : tensor<1x1x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
        ^bb0(%in: bf16, %in_23: bf16, %out: f32):
          %24 = arith.extf %in : bf16 to f32
          %25 = arith.extf %in_23 : bf16 to f32
          %26 = arith.mulf %24, %25 : f32
          %27 = arith.addf %out, %26 : f32
          linalg.yield %27 : f32
        } -> tensor<1x1x8x8x4x4xf32>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %23 into %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> into tensor<2x2x8x8x4x4xf32>
        }
      } {mapping = [#gpu.thread<y>, #gpu.thread<x>]}
      scf.yield %20 : tensor<2x2x8x8x4x4xf32>
    }
    %extracted_slice_10 = tensor.extract_slice %extracted_slice[0, 224] [64, 32] [1, 1] : tensor<64x256xbf16> to tensor<64x32xbf16>
    %14 = bufferization.to_tensor %alloc_2 restrict writable : memref<2x1x32x32xbf16, 1 : i32>
    %pack_11 = tensor.pack %extracted_slice_10 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %14 : tensor<64x32xbf16> -> tensor<2x1x32x32xbf16>
    %extracted_slice_12 = tensor.extract_slice %extracted_slice_5[224, 0] [32, 64] [1, 1] : tensor<256x64xbf16> to tensor<32x64xbf16>
    %15 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x2x32x32xbf16, 1 : i32>
    %pack_13 = tensor.pack %extracted_slice_12 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %15 : tensor<32x64xbf16> -> tensor<1x2x32x32xbf16>
    %16:2 = scf.forall (%arg3, %arg4) in (2, 2) shared_outs(%arg5 = %13, %arg6 = %7) -> (tensor<2x2x8x8x4x4xf32>, tensor<2x2x32x32xf32>) {
      %extracted_slice_14 = tensor.extract_slice %pack_11[%arg3, 0, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<2x1x32x32xbf16> to tensor<1x1x32x32xbf16>
      %17 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x4x8x4x8xbf16, 2 : i32>
      %pack_15 = tensor.pack %extracted_slice_14 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %17 : tensor<1x1x32x32xbf16> -> tensor<1x1x4x8x4x8xbf16>
      %extracted_slice_16 = tensor.extract_slice %pack_13[0, %arg4, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<1x2x32x32xbf16> to tensor<1x1x32x32xbf16>
      %18 = bufferization.to_tensor %alloc restrict writable : memref<1x1x8x4x8x4xbf16, 2 : i32>
      %pack_17 = tensor.pack %extracted_slice_16 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %18 : tensor<1x1x32x32xbf16> -> tensor<1x1x8x4x8x4xbf16>
      %extracted_slice_18 = tensor.extract_slice %arg5[%arg3, %arg4, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
      %19 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_15, %pack_17 : tensor<1x1x4x8x4x8xbf16>, tensor<1x1x8x4x8x4xbf16>) outs(%extracted_slice_18 : tensor<1x1x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
      ^bb0(%in: bf16, %in_22: bf16, %out: f32):
        %20 = arith.extf %in : bf16 to f32
        %21 = arith.extf %in_22 : bf16 to f32
        %22 = arith.mulf %20, %21 : f32
        %23 = arith.addf %out, %22 : f32
        linalg.yield %23 : f32
      } -> tensor<1x1x8x8x4x4xf32>
      %inserted_slice = tensor.insert_slice %19 into %arg5[%arg3, %arg4, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> into tensor<2x2x8x8x4x4xf32>
      %extracted_slice_19 = tensor.extract_slice %arg6[%arg3, %arg4, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<2x2x32x32xf32> to tensor<1x1x32x32xf32>
      %extracted_slice_20 = tensor.extract_slice %inserted_slice[%arg3, %arg4, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
      %unpack_21 = tensor.unpack %19 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %extracted_slice_19 : tensor<1x1x8x8x4x4xf32> -> tensor<1x1x32x32xf32>
      scf.forall.in_parallel {
        tensor.parallel_insert_slice %unpack_21 into %arg6[%arg3, %arg4, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<1x1x32x32xf32> into tensor<2x2x32x32xf32>
        tensor.parallel_insert_slice %19 into %arg5[%arg3, %arg4, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> into tensor<2x2x8x8x4x4xf32>
      }
    } {mapping = [#gpu.thread<y>, #gpu.thread<x>]}
    %unpack = tensor.unpack %16#1 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %extracted_slice_6 : tensor<2x2x32x32xf32> -> tensor<64x64xf32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack into %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<64x64xf32> into tensor<128x128xf32>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  memref.dealloc %alloc_4 : memref<2x2x32x32xf32, 1 : i32>
  memref.dealloc %alloc_3 : memref<2x2x8x8x4x4xf32, 2 : i32>
  memref.dealloc %alloc_2 : memref<2x1x32x32xbf16, 1 : i32>
  memref.dealloc %alloc_1 : memref<1x2x32x32xbf16, 1 : i32>
  memref.dealloc %alloc_0 : memref<1x1x4x8x4x8xbf16, 2 : i32>
  memref.dealloc %alloc : memref<1x1x8x4x8x4xbf16, 2 : i32>
  return
}

// -----// IR Dump Before AMDAIECleanup (iree-amdaie-cleanup) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c7 = arith.constant 7 : index
  %c0 = arith.constant 0 : index
  %cst = arith.constant 0.000000e+00 : f32
  %c1 = arith.constant 1 : index
  %alloc = memref.alloc() : memref<1x1x8x4x8x4xbf16, 2 : i32>
  %alloc_0 = memref.alloc() : memref<1x1x4x8x4x8xbf16, 2 : i32>
  %alloc_1 = memref.alloc() : memref<1x2x32x32xbf16, 1 : i32>
  %alloc_2 = memref.alloc() : memref<2x1x32x32xbf16, 1 : i32>
  %alloc_3 = memref.alloc() : memref<2x2x8x8x4x4xf32, 2 : i32>
  %alloc_4 = memref.alloc() : memref<2x2x32x32xf32, 1 : i32>
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (128, 128) step (64, 64) shared_outs(%arg2 = %5) -> (tensor<128x128xf32>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [64, 256] [1, 1] : tensor<128x256xbf16> to tensor<64x256xbf16>
    %extracted_slice_5 = tensor.extract_slice %4[0, %arg1] [256, 64] [1, 1] : tensor<256x128xbf16> to tensor<256x64xbf16>
    %extracted_slice_6 = tensor.extract_slice %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<128x128xf32> to tensor<64x64xf32>
    %7 = bufferization.to_tensor %alloc_4 restrict writable : memref<2x2x32x32xf32, 1 : i32>
    %8 = bufferization.to_tensor %alloc_3 restrict writable : memref<2x2x8x8x4x4xf32, 2 : i32>
    %extracted_slice_7 = tensor.extract_slice %extracted_slice[0, 0] [64, 32] [1, 1] : tensor<64x256xbf16> to tensor<64x32xbf16>
    %9 = bufferization.to_tensor %alloc_2 restrict writable : memref<2x1x32x32xbf16, 1 : i32>
    %pack = tensor.pack %extracted_slice_7 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %9 : tensor<64x32xbf16> -> tensor<2x1x32x32xbf16>
    %extracted_slice_8 = tensor.extract_slice %extracted_slice_5[0, 0] [32, 64] [1, 1] : tensor<256x64xbf16> to tensor<32x64xbf16>
    %10 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x2x32x32xbf16, 1 : i32>
    %pack_9 = tensor.pack %extracted_slice_8 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %10 : tensor<32x64xbf16> -> tensor<1x2x32x32xbf16>
    %11 = scf.forall (%arg3, %arg4) in (2, 2) shared_outs(%arg5 = %8) -> (tensor<2x2x8x8x4x4xf32>) {
      %extracted_slice_14 = tensor.extract_slice %pack[%arg3, 0, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<2x1x32x32xbf16> to tensor<1x1x32x32xbf16>
      %16 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x4x8x4x8xbf16, 2 : i32>
      %pack_15 = tensor.pack %extracted_slice_14 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %16 : tensor<1x1x32x32xbf16> -> tensor<1x1x4x8x4x8xbf16>
      %extracted_slice_16 = tensor.extract_slice %pack_9[0, %arg4, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<1x2x32x32xbf16> to tensor<1x1x32x32xbf16>
      %17 = bufferization.to_tensor %alloc restrict writable : memref<1x1x8x4x8x4xbf16, 2 : i32>
      %pack_17 = tensor.pack %extracted_slice_16 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %17 : tensor<1x1x32x32xbf16> -> tensor<1x1x8x4x8x4xbf16>
      %extracted_slice_18 = tensor.extract_slice %arg5[%arg3, %arg4, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
      %18 = linalg.fill ins(%cst : f32) outs(%extracted_slice_18 : tensor<1x1x8x8x4x4xf32>) -> tensor<1x1x8x8x4x4xf32>
      %19 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_15, %pack_17 : tensor<1x1x4x8x4x8xbf16>, tensor<1x1x8x4x8x4xbf16>) outs(%18 : tensor<1x1x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
      ^bb0(%in: bf16, %in_19: bf16, %out: f32):
        %20 = arith.extf %in : bf16 to f32
        %21 = arith.extf %in_19 : bf16 to f32
        %22 = arith.mulf %20, %21 : f32
        %23 = arith.addf %out, %22 : f32
        linalg.yield %23 : f32
      } -> tensor<1x1x8x8x4x4xf32>
      scf.forall.in_parallel {
        tensor.parallel_insert_slice %19 into %arg5[%arg3, %arg4, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> into tensor<2x2x8x8x4x4xf32>
      }
    } {mapping = [#gpu.thread<y>, #gpu.thread<x>]}
    %12 = scf.for %arg3 = %c1 to %c7 step %c1 iter_args(%arg4 = %11) -> (tensor<2x2x8x8x4x4xf32>) {
      %16 = affine.apply affine_map<(d0) -> (d0 * 32)>(%arg3)
      %extracted_slice_14 = tensor.extract_slice %extracted_slice[0, %16] [64, 32] [1, 1] : tensor<64x256xbf16> to tensor<64x32xbf16>
      %17 = bufferization.to_tensor %alloc_2 restrict writable : memref<2x1x32x32xbf16, 1 : i32>
      %pack_15 = tensor.pack %extracted_slice_14 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %17 : tensor<64x32xbf16> -> tensor<2x1x32x32xbf16>
      %extracted_slice_16 = tensor.extract_slice %extracted_slice_5[%16, 0] [32, 64] [1, 1] : tensor<256x64xbf16> to tensor<32x64xbf16>
      %18 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x2x32x32xbf16, 1 : i32>
      %pack_17 = tensor.pack %extracted_slice_16 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %18 : tensor<32x64xbf16> -> tensor<1x2x32x32xbf16>
      %19 = scf.forall (%arg5, %arg6) in (2, 2) shared_outs(%arg7 = %arg4) -> (tensor<2x2x8x8x4x4xf32>) {
        %extracted_slice_18 = tensor.extract_slice %pack_15[%arg5, 0, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<2x1x32x32xbf16> to tensor<1x1x32x32xbf16>
        %20 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x4x8x4x8xbf16, 2 : i32>
        %pack_19 = tensor.pack %extracted_slice_18 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %20 : tensor<1x1x32x32xbf16> -> tensor<1x1x4x8x4x8xbf16>
        %extracted_slice_20 = tensor.extract_slice %pack_17[0, %arg6, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<1x2x32x32xbf16> to tensor<1x1x32x32xbf16>
        %21 = bufferization.to_tensor %alloc restrict writable : memref<1x1x8x4x8x4xbf16, 2 : i32>
        %pack_21 = tensor.pack %extracted_slice_20 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %21 : tensor<1x1x32x32xbf16> -> tensor<1x1x8x4x8x4xbf16>
        %extracted_slice_22 = tensor.extract_slice %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
        %22 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_19, %pack_21 : tensor<1x1x4x8x4x8xbf16>, tensor<1x1x8x4x8x4xbf16>) outs(%extracted_slice_22 : tensor<1x1x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
        ^bb0(%in: bf16, %in_23: bf16, %out: f32):
          %23 = arith.extf %in : bf16 to f32
          %24 = arith.extf %in_23 : bf16 to f32
          %25 = arith.mulf %23, %24 : f32
          %26 = arith.addf %out, %25 : f32
          linalg.yield %26 : f32
        } -> tensor<1x1x8x8x4x4xf32>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %22 into %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> into tensor<2x2x8x8x4x4xf32>
        }
      } {mapping = [#gpu.thread<y>, #gpu.thread<x>]}
      scf.yield %19 : tensor<2x2x8x8x4x4xf32>
    }
    %extracted_slice_10 = tensor.extract_slice %extracted_slice[0, 224] [64, 32] [1, 1] : tensor<64x256xbf16> to tensor<64x32xbf16>
    %13 = bufferization.to_tensor %alloc_2 restrict writable : memref<2x1x32x32xbf16, 1 : i32>
    %pack_11 = tensor.pack %extracted_slice_10 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %13 : tensor<64x32xbf16> -> tensor<2x1x32x32xbf16>
    %extracted_slice_12 = tensor.extract_slice %extracted_slice_5[224, 0] [32, 64] [1, 1] : tensor<256x64xbf16> to tensor<32x64xbf16>
    %14 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x2x32x32xbf16, 1 : i32>
    %pack_13 = tensor.pack %extracted_slice_12 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %14 : tensor<32x64xbf16> -> tensor<1x2x32x32xbf16>
    %15:2 = scf.forall (%arg3, %arg4) in (2, 2) shared_outs(%arg5 = %12, %arg6 = %7) -> (tensor<2x2x8x8x4x4xf32>, tensor<2x2x32x32xf32>) {
      %extracted_slice_14 = tensor.extract_slice %pack_11[%arg3, 0, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<2x1x32x32xbf16> to tensor<1x1x32x32xbf16>
      %16 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x4x8x4x8xbf16, 2 : i32>
      %pack_15 = tensor.pack %extracted_slice_14 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %16 : tensor<1x1x32x32xbf16> -> tensor<1x1x4x8x4x8xbf16>
      %extracted_slice_16 = tensor.extract_slice %pack_13[0, %arg4, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<1x2x32x32xbf16> to tensor<1x1x32x32xbf16>
      %17 = bufferization.to_tensor %alloc restrict writable : memref<1x1x8x4x8x4xbf16, 2 : i32>
      %pack_17 = tensor.pack %extracted_slice_16 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %17 : tensor<1x1x32x32xbf16> -> tensor<1x1x8x4x8x4xbf16>
      %extracted_slice_18 = tensor.extract_slice %arg5[%arg3, %arg4, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
      %18 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_15, %pack_17 : tensor<1x1x4x8x4x8xbf16>, tensor<1x1x8x4x8x4xbf16>) outs(%extracted_slice_18 : tensor<1x1x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
      ^bb0(%in: bf16, %in_21: bf16, %out: f32):
        %19 = arith.extf %in : bf16 to f32
        %20 = arith.extf %in_21 : bf16 to f32
        %21 = arith.mulf %19, %20 : f32
        %22 = arith.addf %out, %21 : f32
        linalg.yield %22 : f32
      } -> tensor<1x1x8x8x4x4xf32>
      %extracted_slice_19 = tensor.extract_slice %arg6[%arg3, %arg4, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<2x2x32x32xf32> to tensor<1x1x32x32xf32>
      %unpack_20 = tensor.unpack %18 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %extracted_slice_19 : tensor<1x1x8x8x4x4xf32> -> tensor<1x1x32x32xf32>
      scf.forall.in_parallel {
        tensor.parallel_insert_slice %unpack_20 into %arg6[%arg3, %arg4, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<1x1x32x32xf32> into tensor<2x2x32x32xf32>
        tensor.parallel_insert_slice %18 into %arg5[%arg3, %arg4, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> into tensor<2x2x8x8x4x4xf32>
      }
    } {mapping = [#gpu.thread<y>, #gpu.thread<x>]}
    %unpack = tensor.unpack %15#1 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %extracted_slice_6 : tensor<2x2x32x32xf32> -> tensor<64x64xf32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack into %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<64x64xf32> into tensor<128x128xf32>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  memref.dealloc %alloc_4 : memref<2x2x32x32xf32, 1 : i32>
  memref.dealloc %alloc_3 : memref<2x2x8x8x4x4xf32, 2 : i32>
  memref.dealloc %alloc_2 : memref<2x1x32x32xbf16, 1 : i32>
  memref.dealloc %alloc_1 : memref<1x2x32x32xbf16, 1 : i32>
  memref.dealloc %alloc_0 : memref<1x1x4x8x4x8xbf16, 2 : i32>
  memref.dealloc %alloc : memref<1x1x8x4x8x4xbf16, 2 : i32>
  return
}

// -----// IR Dump Before AMDAIEInsertLoopsForVectorization (iree-amdaie-insert-loops-for-vectorization) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c7 = arith.constant 7 : index
  %c0 = arith.constant 0 : index
  %cst = arith.constant 0.000000e+00 : f32
  %c1 = arith.constant 1 : index
  %alloc = memref.alloc() : memref<1x1x8x4x8x4xbf16, 2 : i32>
  %alloc_0 = memref.alloc() : memref<1x1x4x8x4x8xbf16, 2 : i32>
  %alloc_1 = memref.alloc() : memref<1x2x32x32xbf16, 1 : i32>
  %alloc_2 = memref.alloc() : memref<2x1x32x32xbf16, 1 : i32>
  %alloc_3 = memref.alloc() : memref<2x2x8x8x4x4xf32, 2 : i32>
  %alloc_4 = memref.alloc() : memref<2x2x32x32xf32, 1 : i32>
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (128, 128) step (64, 64) shared_outs(%arg2 = %5) -> (tensor<128x128xf32>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [64, 256] [1, 1] : tensor<128x256xbf16> to tensor<64x256xbf16>
    %extracted_slice_5 = tensor.extract_slice %4[0, %arg1] [256, 64] [1, 1] : tensor<256x128xbf16> to tensor<256x64xbf16>
    %extracted_slice_6 = tensor.extract_slice %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<128x128xf32> to tensor<64x64xf32>
    %7 = bufferization.to_tensor %alloc_4 restrict writable : memref<2x2x32x32xf32, 1 : i32>
    %8 = bufferization.to_tensor %alloc_3 restrict writable : memref<2x2x8x8x4x4xf32, 2 : i32>
    %extracted_slice_7 = tensor.extract_slice %extracted_slice[0, 0] [64, 32] [1, 1] : tensor<64x256xbf16> to tensor<64x32xbf16>
    %9 = bufferization.to_tensor %alloc_2 restrict writable : memref<2x1x32x32xbf16, 1 : i32>
    %pack = tensor.pack %extracted_slice_7 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %9 : tensor<64x32xbf16> -> tensor<2x1x32x32xbf16>
    %extracted_slice_8 = tensor.extract_slice %extracted_slice_5[0, 0] [32, 64] [1, 1] : tensor<256x64xbf16> to tensor<32x64xbf16>
    %10 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x2x32x32xbf16, 1 : i32>
    %pack_9 = tensor.pack %extracted_slice_8 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %10 : tensor<32x64xbf16> -> tensor<1x2x32x32xbf16>
    %11 = scf.forall (%arg3, %arg4) in (2, 2) shared_outs(%arg5 = %8) -> (tensor<2x2x8x8x4x4xf32>) {
      %extracted_slice_14 = tensor.extract_slice %pack[%arg3, 0, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<2x1x32x32xbf16> to tensor<1x1x32x32xbf16>
      %16 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x4x8x4x8xbf16, 2 : i32>
      %pack_15 = tensor.pack %extracted_slice_14 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %16 : tensor<1x1x32x32xbf16> -> tensor<1x1x4x8x4x8xbf16>
      %extracted_slice_16 = tensor.extract_slice %pack_9[0, %arg4, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<1x2x32x32xbf16> to tensor<1x1x32x32xbf16>
      %17 = bufferization.to_tensor %alloc restrict writable : memref<1x1x8x4x8x4xbf16, 2 : i32>
      %pack_17 = tensor.pack %extracted_slice_16 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %17 : tensor<1x1x32x32xbf16> -> tensor<1x1x8x4x8x4xbf16>
      %extracted_slice_18 = tensor.extract_slice %arg5[%arg3, %arg4, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
      %18 = linalg.fill ins(%cst : f32) outs(%extracted_slice_18 : tensor<1x1x8x8x4x4xf32>) -> tensor<1x1x8x8x4x4xf32>
      %19 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_15, %pack_17 : tensor<1x1x4x8x4x8xbf16>, tensor<1x1x8x4x8x4xbf16>) outs(%18 : tensor<1x1x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
      ^bb0(%in: bf16, %in_19: bf16, %out: f32):
        %20 = arith.extf %in : bf16 to f32
        %21 = arith.extf %in_19 : bf16 to f32
        %22 = arith.mulf %20, %21 : f32
        %23 = arith.addf %out, %22 : f32
        linalg.yield %23 : f32
      } -> tensor<1x1x8x8x4x4xf32>
      scf.forall.in_parallel {
        tensor.parallel_insert_slice %19 into %arg5[%arg3, %arg4, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> into tensor<2x2x8x8x4x4xf32>
      }
    } {mapping = [#gpu.thread<y>, #gpu.thread<x>]}
    %12 = scf.for %arg3 = %c1 to %c7 step %c1 iter_args(%arg4 = %11) -> (tensor<2x2x8x8x4x4xf32>) {
      %16 = affine.apply affine_map<(d0) -> (d0 * 32)>(%arg3)
      %extracted_slice_14 = tensor.extract_slice %extracted_slice[0, %16] [64, 32] [1, 1] : tensor<64x256xbf16> to tensor<64x32xbf16>
      %17 = bufferization.to_tensor %alloc_2 restrict writable : memref<2x1x32x32xbf16, 1 : i32>
      %pack_15 = tensor.pack %extracted_slice_14 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %17 : tensor<64x32xbf16> -> tensor<2x1x32x32xbf16>
      %extracted_slice_16 = tensor.extract_slice %extracted_slice_5[%16, 0] [32, 64] [1, 1] : tensor<256x64xbf16> to tensor<32x64xbf16>
      %18 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x2x32x32xbf16, 1 : i32>
      %pack_17 = tensor.pack %extracted_slice_16 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %18 : tensor<32x64xbf16> -> tensor<1x2x32x32xbf16>
      %19 = scf.forall (%arg5, %arg6) in (2, 2) shared_outs(%arg7 = %arg4) -> (tensor<2x2x8x8x4x4xf32>) {
        %extracted_slice_18 = tensor.extract_slice %pack_15[%arg5, 0, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<2x1x32x32xbf16> to tensor<1x1x32x32xbf16>
        %20 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x4x8x4x8xbf16, 2 : i32>
        %pack_19 = tensor.pack %extracted_slice_18 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %20 : tensor<1x1x32x32xbf16> -> tensor<1x1x4x8x4x8xbf16>
        %extracted_slice_20 = tensor.extract_slice %pack_17[0, %arg6, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<1x2x32x32xbf16> to tensor<1x1x32x32xbf16>
        %21 = bufferization.to_tensor %alloc restrict writable : memref<1x1x8x4x8x4xbf16, 2 : i32>
        %pack_21 = tensor.pack %extracted_slice_20 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %21 : tensor<1x1x32x32xbf16> -> tensor<1x1x8x4x8x4xbf16>
        %extracted_slice_22 = tensor.extract_slice %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
        %22 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_19, %pack_21 : tensor<1x1x4x8x4x8xbf16>, tensor<1x1x8x4x8x4xbf16>) outs(%extracted_slice_22 : tensor<1x1x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
        ^bb0(%in: bf16, %in_23: bf16, %out: f32):
          %23 = arith.extf %in : bf16 to f32
          %24 = arith.extf %in_23 : bf16 to f32
          %25 = arith.mulf %23, %24 : f32
          %26 = arith.addf %out, %25 : f32
          linalg.yield %26 : f32
        } -> tensor<1x1x8x8x4x4xf32>
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %22 into %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> into tensor<2x2x8x8x4x4xf32>
        }
      } {mapping = [#gpu.thread<y>, #gpu.thread<x>]}
      scf.yield %19 : tensor<2x2x8x8x4x4xf32>
    }
    %extracted_slice_10 = tensor.extract_slice %extracted_slice[0, 224] [64, 32] [1, 1] : tensor<64x256xbf16> to tensor<64x32xbf16>
    %13 = bufferization.to_tensor %alloc_2 restrict writable : memref<2x1x32x32xbf16, 1 : i32>
    %pack_11 = tensor.pack %extracted_slice_10 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %13 : tensor<64x32xbf16> -> tensor<2x1x32x32xbf16>
    %extracted_slice_12 = tensor.extract_slice %extracted_slice_5[224, 0] [32, 64] [1, 1] : tensor<256x64xbf16> to tensor<32x64xbf16>
    %14 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x2x32x32xbf16, 1 : i32>
    %pack_13 = tensor.pack %extracted_slice_12 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %14 : tensor<32x64xbf16> -> tensor<1x2x32x32xbf16>
    %15:2 = scf.forall (%arg3, %arg4) in (2, 2) shared_outs(%arg5 = %12, %arg6 = %7) -> (tensor<2x2x8x8x4x4xf32>, tensor<2x2x32x32xf32>) {
      %extracted_slice_14 = tensor.extract_slice %pack_11[%arg3, 0, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<2x1x32x32xbf16> to tensor<1x1x32x32xbf16>
      %16 = bufferization.to_tensor %alloc_0 restrict writable : memref<1x1x4x8x4x8xbf16, 2 : i32>
      %pack_15 = tensor.pack %extracted_slice_14 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %16 : tensor<1x1x32x32xbf16> -> tensor<1x1x4x8x4x8xbf16>
      %extracted_slice_16 = tensor.extract_slice %pack_13[0, %arg4, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<1x2x32x32xbf16> to tensor<1x1x32x32xbf16>
      %17 = bufferization.to_tensor %alloc restrict writable : memref<1x1x8x4x8x4xbf16, 2 : i32>
      %pack_17 = tensor.pack %extracted_slice_16 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %17 : tensor<1x1x32x32xbf16> -> tensor<1x1x8x4x8x4xbf16>
      %extracted_slice_18 = tensor.extract_slice %arg5[%arg3, %arg4, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
      %18 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%pack_15, %pack_17 : tensor<1x1x4x8x4x8xbf16>, tensor<1x1x8x4x8x4xbf16>) outs(%extracted_slice_18 : tensor<1x1x8x8x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
      ^bb0(%in: bf16, %in_21: bf16, %out: f32):
        %19 = arith.extf %in : bf16 to f32
        %20 = arith.extf %in_21 : bf16 to f32
        %21 = arith.mulf %19, %20 : f32
        %22 = arith.addf %out, %21 : f32
        linalg.yield %22 : f32
      } -> tensor<1x1x8x8x4x4xf32>
      %extracted_slice_19 = tensor.extract_slice %arg6[%arg3, %arg4, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<2x2x32x32xf32> to tensor<1x1x32x32xf32>
      %unpack_20 = tensor.unpack %18 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %extracted_slice_19 : tensor<1x1x8x8x4x4xf32> -> tensor<1x1x32x32xf32>
      scf.forall.in_parallel {
        tensor.parallel_insert_slice %unpack_20 into %arg6[%arg3, %arg4, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<1x1x32x32xf32> into tensor<2x2x32x32xf32>
        tensor.parallel_insert_slice %18 into %arg5[%arg3, %arg4, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> into tensor<2x2x8x8x4x4xf32>
      }
    } {mapping = [#gpu.thread<y>, #gpu.thread<x>]}
    %unpack = tensor.unpack %15#1 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %extracted_slice_6 : tensor<2x2x32x32xf32> -> tensor<64x64xf32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack into %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<64x64xf32> into tensor<128x128xf32>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  memref.dealloc %alloc_4 : memref<2x2x32x32xf32, 1 : i32>
  memref.dealloc %alloc_3 : memref<2x2x8x8x4x4xf32, 2 : i32>
  memref.dealloc %alloc_2 : memref<2x1x32x32xbf16, 1 : i32>
  memref.dealloc %alloc_1 : memref<1x2x32x32xbf16, 1 : i32>
  memref.dealloc %alloc_0 : memref<1x1x4x8x4x8xbf16, 2 : i32>
  memref.dealloc %alloc : memref<1x1x8x4x8x4xbf16, 2 : i32>
  return
}

// -----// IR Dump Before AMDAIEVectorization (iree-amdaie-vectorization) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %c1 = arith.constant 1 : index
  %c1_0 = arith.constant 1 : index
  %c1_1 = arith.constant 1 : index
  %c1_2 = arith.constant 1 : index
  %c1_3 = arith.constant 1 : index
  %c1_4 = arith.constant 1 : index
  %c0 = arith.constant 0 : index
  %c0_5 = arith.constant 0 : index
  %c0_6 = arith.constant 0 : index
  %c1_7 = arith.constant 1 : index
  %c1_8 = arith.constant 1 : index
  %c1_9 = arith.constant 1 : index
  %c1_10 = arith.constant 1 : index
  %c1_11 = arith.constant 1 : index
  %c1_12 = arith.constant 1 : index
  %c0_13 = arith.constant 0 : index
  %c0_14 = arith.constant 0 : index
  %c0_15 = arith.constant 0 : index
  %c1_16 = arith.constant 1 : index
  %c1_17 = arith.constant 1 : index
  %c1_18 = arith.constant 1 : index
  %c1_19 = arith.constant 1 : index
  %c1_20 = arith.constant 1 : index
  %c1_21 = arith.constant 1 : index
  %c0_22 = arith.constant 0 : index
  %c0_23 = arith.constant 0 : index
  %c0_24 = arith.constant 0 : index
  %c7 = arith.constant 7 : index
  %c0_25 = arith.constant 0 : index
  %cst = arith.constant 0.000000e+00 : f32
  %c1_26 = arith.constant 1 : index
  %alloc = memref.alloc() : memref<1x1x8x4x8x4xbf16, 2 : i32>
  %alloc_27 = memref.alloc() : memref<1x1x4x8x4x8xbf16, 2 : i32>
  %alloc_28 = memref.alloc() : memref<1x2x32x32xbf16, 1 : i32>
  %alloc_29 = memref.alloc() : memref<2x1x32x32xbf16, 1 : i32>
  %alloc_30 = memref.alloc() : memref<2x2x8x8x4x4xf32, 2 : i32>
  %alloc_31 = memref.alloc() : memref<2x2x32x32xf32, 1 : i32>
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0_25) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0_25) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0_25) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (128, 128) step (64, 64) shared_outs(%arg2 = %5) -> (tensor<128x128xf32>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [64, 256] [1, 1] : tensor<128x256xbf16> to tensor<64x256xbf16>
    %extracted_slice_32 = tensor.extract_slice %4[0, %arg1] [256, 64] [1, 1] : tensor<256x128xbf16> to tensor<256x64xbf16>
    %extracted_slice_33 = tensor.extract_slice %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<128x128xf32> to tensor<64x64xf32>
    %7 = bufferization.to_tensor %alloc_31 restrict writable : memref<2x2x32x32xf32, 1 : i32>
    %8 = bufferization.to_tensor %alloc_30 restrict writable : memref<2x2x8x8x4x4xf32, 2 : i32>
    %extracted_slice_34 = tensor.extract_slice %extracted_slice[0, 0] [64, 32] [1, 1] : tensor<64x256xbf16> to tensor<64x32xbf16>
    %9 = bufferization.to_tensor %alloc_29 restrict writable : memref<2x1x32x32xbf16, 1 : i32>
    %pack = tensor.pack %extracted_slice_34 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %9 : tensor<64x32xbf16> -> tensor<2x1x32x32xbf16>
    %extracted_slice_35 = tensor.extract_slice %extracted_slice_32[0, 0] [32, 64] [1, 1] : tensor<256x64xbf16> to tensor<32x64xbf16>
    %10 = bufferization.to_tensor %alloc_28 restrict writable : memref<1x2x32x32xbf16, 1 : i32>
    %pack_36 = tensor.pack %extracted_slice_35 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %10 : tensor<32x64xbf16> -> tensor<1x2x32x32xbf16>
    %11 = scf.forall (%arg3, %arg4) in (2, 2) shared_outs(%arg5 = %8) -> (tensor<2x2x8x8x4x4xf32>) {
      %extracted_slice_41 = tensor.extract_slice %pack[%arg3, 0, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<2x1x32x32xbf16> to tensor<1x1x32x32xbf16>
      %16 = bufferization.to_tensor %alloc_27 restrict writable : memref<1x1x4x8x4x8xbf16, 2 : i32>
      %pack_42 = tensor.pack %extracted_slice_41 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %16 : tensor<1x1x32x32xbf16> -> tensor<1x1x4x8x4x8xbf16>
      %extracted_slice_43 = tensor.extract_slice %pack_36[0, %arg4, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<1x2x32x32xbf16> to tensor<1x1x32x32xbf16>
      %17 = bufferization.to_tensor %alloc restrict writable : memref<1x1x8x4x8x4xbf16, 2 : i32>
      %pack_44 = tensor.pack %extracted_slice_43 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %17 : tensor<1x1x32x32xbf16> -> tensor<1x1x8x4x8x4xbf16>
      %extracted_slice_45 = tensor.extract_slice %arg5[%arg3, %arg4, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
      %18 = linalg.fill ins(%cst : f32) outs(%extracted_slice_45 : tensor<1x1x8x8x4x4xf32>) -> tensor<1x1x8x8x4x4xf32>
      %c0_46 = arith.constant 0 : index
      %c1_47 = arith.constant 1 : index
      %c1_48 = arith.constant 1 : index
      %c0_49 = arith.constant 0 : index
      %c1_50 = arith.constant 1 : index
      %c1_51 = arith.constant 1 : index
      %c0_52 = arith.constant 0 : index
      %c1_53 = arith.constant 1 : index
      %c1_54 = arith.constant 1 : index
      %c0_55 = arith.constant 0 : index
      %c8 = arith.constant 8 : index
      %c1_56 = arith.constant 1 : index
      %c0_57 = arith.constant 0 : index
      %c8_58 = arith.constant 8 : index
      %c1_59 = arith.constant 1 : index
      %c0_60 = arith.constant 0 : index
      %c4 = arith.constant 4 : index
      %c1_61 = arith.constant 1 : index
      %19 = scf.for %arg6 = %c0_46 to %c1_47 step %c1_48 iter_args(%arg7 = %18) -> (tensor<1x1x8x8x4x4xf32>) {
        %20 = scf.for %arg8 = %c0_49 to %c1_50 step %c1_51 iter_args(%arg9 = %arg7) -> (tensor<1x1x8x8x4x4xf32>) {
          %21 = scf.for %arg10 = %c0_52 to %c1_53 step %c1_54 iter_args(%arg11 = %arg9) -> (tensor<1x1x8x8x4x4xf32>) {
            %22 = scf.for %arg12 = %c0_55 to %c8 step %c1_56 iter_args(%arg13 = %arg11) -> (tensor<1x1x8x8x4x4xf32>) {
              %23 = scf.for %arg14 = %c0_57 to %c8_58 step %c1_59 iter_args(%arg15 = %arg13) -> (tensor<1x1x8x8x4x4xf32>) {
                %24 = scf.for %arg16 = %c0_60 to %c4 step %c1_61 iter_args(%arg17 = %arg15) -> (tensor<1x1x8x8x4x4xf32>) {
                  %extracted_slice_62 = tensor.extract_slice %pack_42[%arg6, %arg10, %arg16, %arg12, 0, 0] [1, 1, 1, 1, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<1x1x4x8x4x8xbf16> to tensor<1x1x1x1x4x8xbf16>
                  %extracted_slice_63 = tensor.extract_slice %pack_44[%arg10, %arg8, %arg14, %arg16, 0, 0] [1, 1, 1, 1, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x4x8x4xbf16> to tensor<1x1x1x1x8x4xbf16>
                  %extracted_slice_64 = tensor.extract_slice %arg17[%arg6, %arg8, %arg14, %arg12, 0, 0] [1, 1, 1, 1, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> to tensor<1x1x1x1x4x4xf32>
                  %25 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%extracted_slice_62, %extracted_slice_63 : tensor<1x1x1x1x4x8xbf16>, tensor<1x1x1x1x8x4xbf16>) outs(%extracted_slice_64 : tensor<1x1x1x1x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
                  ^bb0(%in: bf16, %in_65: bf16, %out: f32):
                    %26 = arith.extf %in : bf16 to f32
                    %27 = arith.extf %in_65 : bf16 to f32
                    %28 = arith.mulf %26, %27 : f32
                    %29 = arith.addf %out, %28 : f32
                    linalg.yield %29 : f32
                  } -> tensor<1x1x1x1x4x4xf32>
                  %inserted_slice = tensor.insert_slice %25 into %arg17[%arg6, %arg8, %arg14, %arg12, 0, 0] [1, 1, 1, 1, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x1x1x4x4xf32> into tensor<1x1x8x8x4x4xf32>
                  scf.yield %inserted_slice : tensor<1x1x8x8x4x4xf32>
                }
                scf.yield %24 : tensor<1x1x8x8x4x4xf32>
              }
              scf.yield %23 : tensor<1x1x8x8x4x4xf32>
            }
            scf.yield %22 : tensor<1x1x8x8x4x4xf32>
          }
          scf.yield %21 : tensor<1x1x8x8x4x4xf32>
        }
        scf.yield %20 : tensor<1x1x8x8x4x4xf32>
      }
      scf.forall.in_parallel {
        tensor.parallel_insert_slice %19 into %arg5[%arg3, %arg4, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> into tensor<2x2x8x8x4x4xf32>
      }
    } {mapping = [#gpu.thread<y>, #gpu.thread<x>]}
    %12 = scf.for %arg3 = %c1_26 to %c7 step %c1_26 iter_args(%arg4 = %11) -> (tensor<2x2x8x8x4x4xf32>) {
      %16 = affine.apply affine_map<(d0) -> (d0 * 32)>(%arg3)
      %extracted_slice_41 = tensor.extract_slice %extracted_slice[0, %16] [64, 32] [1, 1] : tensor<64x256xbf16> to tensor<64x32xbf16>
      %17 = bufferization.to_tensor %alloc_29 restrict writable : memref<2x1x32x32xbf16, 1 : i32>
      %pack_42 = tensor.pack %extracted_slice_41 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %17 : tensor<64x32xbf16> -> tensor<2x1x32x32xbf16>
      %extracted_slice_43 = tensor.extract_slice %extracted_slice_32[%16, 0] [32, 64] [1, 1] : tensor<256x64xbf16> to tensor<32x64xbf16>
      %18 = bufferization.to_tensor %alloc_28 restrict writable : memref<1x2x32x32xbf16, 1 : i32>
      %pack_44 = tensor.pack %extracted_slice_43 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %18 : tensor<32x64xbf16> -> tensor<1x2x32x32xbf16>
      %19 = scf.forall (%arg5, %arg6) in (2, 2) shared_outs(%arg7 = %arg4) -> (tensor<2x2x8x8x4x4xf32>) {
        %extracted_slice_45 = tensor.extract_slice %pack_42[%arg5, 0, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<2x1x32x32xbf16> to tensor<1x1x32x32xbf16>
        %20 = bufferization.to_tensor %alloc_27 restrict writable : memref<1x1x4x8x4x8xbf16, 2 : i32>
        %pack_46 = tensor.pack %extracted_slice_45 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %20 : tensor<1x1x32x32xbf16> -> tensor<1x1x4x8x4x8xbf16>
        %extracted_slice_47 = tensor.extract_slice %pack_44[0, %arg6, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<1x2x32x32xbf16> to tensor<1x1x32x32xbf16>
        %21 = bufferization.to_tensor %alloc restrict writable : memref<1x1x8x4x8x4xbf16, 2 : i32>
        %pack_48 = tensor.pack %extracted_slice_47 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %21 : tensor<1x1x32x32xbf16> -> tensor<1x1x8x4x8x4xbf16>
        %extracted_slice_49 = tensor.extract_slice %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
        %c0_50 = arith.constant 0 : index
        %c1_51 = arith.constant 1 : index
        %c1_52 = arith.constant 1 : index
        %c0_53 = arith.constant 0 : index
        %c1_54 = arith.constant 1 : index
        %c1_55 = arith.constant 1 : index
        %c0_56 = arith.constant 0 : index
        %c1_57 = arith.constant 1 : index
        %c1_58 = arith.constant 1 : index
        %c0_59 = arith.constant 0 : index
        %c8 = arith.constant 8 : index
        %c1_60 = arith.constant 1 : index
        %c0_61 = arith.constant 0 : index
        %c8_62 = arith.constant 8 : index
        %c1_63 = arith.constant 1 : index
        %c0_64 = arith.constant 0 : index
        %c4 = arith.constant 4 : index
        %c1_65 = arith.constant 1 : index
        %22 = scf.for %arg8 = %c0_50 to %c1_51 step %c1_52 iter_args(%arg9 = %extracted_slice_49) -> (tensor<1x1x8x8x4x4xf32>) {
          %23 = scf.for %arg10 = %c0_53 to %c1_54 step %c1_55 iter_args(%arg11 = %arg9) -> (tensor<1x1x8x8x4x4xf32>) {
            %24 = scf.for %arg12 = %c0_56 to %c1_57 step %c1_58 iter_args(%arg13 = %arg11) -> (tensor<1x1x8x8x4x4xf32>) {
              %25 = scf.for %arg14 = %c0_59 to %c8 step %c1_60 iter_args(%arg15 = %arg13) -> (tensor<1x1x8x8x4x4xf32>) {
                %26 = scf.for %arg16 = %c0_61 to %c8_62 step %c1_63 iter_args(%arg17 = %arg15) -> (tensor<1x1x8x8x4x4xf32>) {
                  %27 = scf.for %arg18 = %c0_64 to %c4 step %c1_65 iter_args(%arg19 = %arg17) -> (tensor<1x1x8x8x4x4xf32>) {
                    %extracted_slice_66 = tensor.extract_slice %pack_46[%arg8, %arg12, %arg18, %arg14, 0, 0] [1, 1, 1, 1, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<1x1x4x8x4x8xbf16> to tensor<1x1x1x1x4x8xbf16>
                    %extracted_slice_67 = tensor.extract_slice %pack_48[%arg12, %arg10, %arg16, %arg18, 0, 0] [1, 1, 1, 1, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x4x8x4xbf16> to tensor<1x1x1x1x8x4xbf16>
                    %extracted_slice_68 = tensor.extract_slice %arg19[%arg8, %arg10, %arg16, %arg14, 0, 0] [1, 1, 1, 1, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> to tensor<1x1x1x1x4x4xf32>
                    %28 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%extracted_slice_66, %extracted_slice_67 : tensor<1x1x1x1x4x8xbf16>, tensor<1x1x1x1x8x4xbf16>) outs(%extracted_slice_68 : tensor<1x1x1x1x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
                    ^bb0(%in: bf16, %in_69: bf16, %out: f32):
                      %29 = arith.extf %in : bf16 to f32
                      %30 = arith.extf %in_69 : bf16 to f32
                      %31 = arith.mulf %29, %30 : f32
                      %32 = arith.addf %out, %31 : f32
                      linalg.yield %32 : f32
                    } -> tensor<1x1x1x1x4x4xf32>
                    %inserted_slice = tensor.insert_slice %28 into %arg19[%arg8, %arg10, %arg16, %arg14, 0, 0] [1, 1, 1, 1, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x1x1x4x4xf32> into tensor<1x1x8x8x4x4xf32>
                    scf.yield %inserted_slice : tensor<1x1x8x8x4x4xf32>
                  }
                  scf.yield %27 : tensor<1x1x8x8x4x4xf32>
                }
                scf.yield %26 : tensor<1x1x8x8x4x4xf32>
              }
              scf.yield %25 : tensor<1x1x8x8x4x4xf32>
            }
            scf.yield %24 : tensor<1x1x8x8x4x4xf32>
          }
          scf.yield %23 : tensor<1x1x8x8x4x4xf32>
        }
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %22 into %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> into tensor<2x2x8x8x4x4xf32>
        }
      } {mapping = [#gpu.thread<y>, #gpu.thread<x>]}
      scf.yield %19 : tensor<2x2x8x8x4x4xf32>
    }
    %extracted_slice_37 = tensor.extract_slice %extracted_slice[0, 224] [64, 32] [1, 1] : tensor<64x256xbf16> to tensor<64x32xbf16>
    %13 = bufferization.to_tensor %alloc_29 restrict writable : memref<2x1x32x32xbf16, 1 : i32>
    %pack_38 = tensor.pack %extracted_slice_37 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %13 : tensor<64x32xbf16> -> tensor<2x1x32x32xbf16>
    %extracted_slice_39 = tensor.extract_slice %extracted_slice_32[224, 0] [32, 64] [1, 1] : tensor<256x64xbf16> to tensor<32x64xbf16>
    %14 = bufferization.to_tensor %alloc_28 restrict writable : memref<1x2x32x32xbf16, 1 : i32>
    %pack_40 = tensor.pack %extracted_slice_39 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %14 : tensor<32x64xbf16> -> tensor<1x2x32x32xbf16>
    %15:2 = scf.forall (%arg3, %arg4) in (2, 2) shared_outs(%arg5 = %12, %arg6 = %7) -> (tensor<2x2x8x8x4x4xf32>, tensor<2x2x32x32xf32>) {
      %extracted_slice_41 = tensor.extract_slice %pack_38[%arg3, 0, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<2x1x32x32xbf16> to tensor<1x1x32x32xbf16>
      %16 = bufferization.to_tensor %alloc_27 restrict writable : memref<1x1x4x8x4x8xbf16, 2 : i32>
      %pack_42 = tensor.pack %extracted_slice_41 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %16 : tensor<1x1x32x32xbf16> -> tensor<1x1x4x8x4x8xbf16>
      %extracted_slice_43 = tensor.extract_slice %pack_40[0, %arg4, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<1x2x32x32xbf16> to tensor<1x1x32x32xbf16>
      %17 = bufferization.to_tensor %alloc restrict writable : memref<1x1x8x4x8x4xbf16, 2 : i32>
      %pack_44 = tensor.pack %extracted_slice_43 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %17 : tensor<1x1x32x32xbf16> -> tensor<1x1x8x4x8x4xbf16>
      %extracted_slice_45 = tensor.extract_slice %arg5[%arg3, %arg4, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
      %c0_46 = arith.constant 0 : index
      %c1_47 = arith.constant 1 : index
      %c1_48 = arith.constant 1 : index
      %c0_49 = arith.constant 0 : index
      %c1_50 = arith.constant 1 : index
      %c1_51 = arith.constant 1 : index
      %c0_52 = arith.constant 0 : index
      %c1_53 = arith.constant 1 : index
      %c1_54 = arith.constant 1 : index
      %c0_55 = arith.constant 0 : index
      %c8 = arith.constant 8 : index
      %c1_56 = arith.constant 1 : index
      %c0_57 = arith.constant 0 : index
      %c8_58 = arith.constant 8 : index
      %c1_59 = arith.constant 1 : index
      %c0_60 = arith.constant 0 : index
      %c4 = arith.constant 4 : index
      %c1_61 = arith.constant 1 : index
      %18 = scf.for %arg7 = %c0_46 to %c1_47 step %c1_48 iter_args(%arg8 = %extracted_slice_45) -> (tensor<1x1x8x8x4x4xf32>) {
        %19 = scf.for %arg9 = %c0_49 to %c1_50 step %c1_51 iter_args(%arg10 = %arg8) -> (tensor<1x1x8x8x4x4xf32>) {
          %20 = scf.for %arg11 = %c0_52 to %c1_53 step %c1_54 iter_args(%arg12 = %arg10) -> (tensor<1x1x8x8x4x4xf32>) {
            %21 = scf.for %arg13 = %c0_55 to %c8 step %c1_56 iter_args(%arg14 = %arg12) -> (tensor<1x1x8x8x4x4xf32>) {
              %22 = scf.for %arg15 = %c0_57 to %c8_58 step %c1_59 iter_args(%arg16 = %arg14) -> (tensor<1x1x8x8x4x4xf32>) {
                %23 = scf.for %arg17 = %c0_60 to %c4 step %c1_61 iter_args(%arg18 = %arg16) -> (tensor<1x1x8x8x4x4xf32>) {
                  %extracted_slice_64 = tensor.extract_slice %pack_42[%arg7, %arg11, %arg17, %arg13, 0, 0] [1, 1, 1, 1, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<1x1x4x8x4x8xbf16> to tensor<1x1x1x1x4x8xbf16>
                  %extracted_slice_65 = tensor.extract_slice %pack_44[%arg11, %arg9, %arg15, %arg17, 0, 0] [1, 1, 1, 1, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x4x8x4xbf16> to tensor<1x1x1x1x8x4xbf16>
                  %extracted_slice_66 = tensor.extract_slice %arg18[%arg7, %arg9, %arg15, %arg13, 0, 0] [1, 1, 1, 1, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> to tensor<1x1x1x1x4x4xf32>
                  %24 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"]} ins(%extracted_slice_64, %extracted_slice_65 : tensor<1x1x1x1x4x8xbf16>, tensor<1x1x1x1x8x4xbf16>) outs(%extracted_slice_66 : tensor<1x1x1x1x4x4xf32>) attrs =  {lowering_config = #iree_codegen.lowering_config<tile_sizes = [[64, 64], [0, 0, 1], [1, 1, 0, 0, 0, 0]]>, packing_config = #amdaie.packing_config<packing_config = [{packedSizes = [32, 32, 32], transposePackIndices = [1], unpackEmpty = [false], innerPerm = [[1, 0]], outerPerm = [[0, 1]]}, {packedSizes = [0, 0, 0, 4, 4, 8], transposePackIndices = [0, 1, 2], unpackEmpty = [false, false, true], innerPerm = [[0, 1], [1, 0], [0, 1]], outerPerm = [[0, 1, 3, 2], [0, 1, 3, 2], [0, 1, 3, 2]]}]>} {
                  ^bb0(%in: bf16, %in_67: bf16, %out: f32):
                    %25 = arith.extf %in : bf16 to f32
                    %26 = arith.extf %in_67 : bf16 to f32
                    %27 = arith.mulf %25, %26 : f32
                    %28 = arith.addf %out, %27 : f32
                    linalg.yield %28 : f32
                  } -> tensor<1x1x1x1x4x4xf32>
                  %inserted_slice = tensor.insert_slice %24 into %arg18[%arg7, %arg9, %arg15, %arg13, 0, 0] [1, 1, 1, 1, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x1x1x4x4xf32> into tensor<1x1x8x8x4x4xf32>
                  scf.yield %inserted_slice : tensor<1x1x8x8x4x4xf32>
                }
                scf.yield %23 : tensor<1x1x8x8x4x4xf32>
              }
              scf.yield %22 : tensor<1x1x8x8x4x4xf32>
            }
            scf.yield %21 : tensor<1x1x8x8x4x4xf32>
          }
          scf.yield %20 : tensor<1x1x8x8x4x4xf32>
        }
        scf.yield %19 : tensor<1x1x8x8x4x4xf32>
      }
      %extracted_slice_62 = tensor.extract_slice %arg6[%arg3, %arg4, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<2x2x32x32xf32> to tensor<1x1x32x32xf32>
      %unpack_63 = tensor.unpack %18 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 4] into %extracted_slice_62 : tensor<1x1x8x8x4x4xf32> -> tensor<1x1x32x32xf32>
      scf.forall.in_parallel {
        tensor.parallel_insert_slice %unpack_63 into %arg6[%arg3, %arg4, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<1x1x32x32xf32> into tensor<2x2x32x32xf32>
        tensor.parallel_insert_slice %18 into %arg5[%arg3, %arg4, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> into tensor<2x2x8x8x4x4xf32>
      }
    } {mapping = [#gpu.thread<y>, #gpu.thread<x>]}
    %unpack = tensor.unpack %15#1 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %extracted_slice_33 : tensor<2x2x32x32xf32> -> tensor<64x64xf32>
    scf.forall.in_parallel {
      tensor.parallel_insert_slice %unpack into %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<64x64xf32> into tensor<128x128xf32>
    }
  } {mapping = [#gpu.block<y>, #gpu.block<x>]}
  flow.dispatch.tensor.store %6, %2, offsets = [0, 0], sizes = [128, 128], strides = [1, 1] : tensor<128x128xf32> -> !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  memref.dealloc %alloc_31 : memref<2x2x32x32xf32, 1 : i32>
  memref.dealloc %alloc_30 : memref<2x2x8x8x4x4xf32, 2 : i32>
  memref.dealloc %alloc_29 : memref<2x1x32x32xbf16, 1 : i32>
  memref.dealloc %alloc_28 : memref<1x2x32x32xbf16, 1 : i32>
  memref.dealloc %alloc_27 : memref<1x1x4x8x4x8xbf16, 2 : i32>
  memref.dealloc %alloc : memref<1x1x8x4x8x4xbf16, 2 : i32>
  return
}

// -----// IR Dump Before EliminateEmptyTensors (iree-eliminate-empty-tensors) //----- //
func.func @matmul_i8_i32_dispatch_0_matmul_128x128x256_bf16xbf16xf32() attributes {translation_info = #iree_codegen.translation_info<Custom>} {
  %cst = arith.constant 0.000000e+00 : bf16
  %c4 = arith.constant 4 : index
  %c8 = arith.constant 8 : index
  %c1 = arith.constant 1 : index
  %c0 = arith.constant 0 : index
  %c7 = arith.constant 7 : index
  %cst_0 = arith.constant 0.000000e+00 : f32
  %alloc = memref.alloc() : memref<1x1x8x4x8x4xbf16, 2 : i32>
  %alloc_1 = memref.alloc() : memref<1x1x4x8x4x8xbf16, 2 : i32>
  %alloc_2 = memref.alloc() : memref<1x2x32x32xbf16, 1 : i32>
  %alloc_3 = memref.alloc() : memref<2x1x32x32xbf16, 1 : i32>
  %alloc_4 = memref.alloc() : memref<2x2x8x8x4x4xf32, 2 : i32>
  %alloc_5 = memref.alloc() : memref<2x2x32x32xf32, 1 : i32>
  %0 = hal.interface.binding.subspan set(0) binding(0) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>>
  %1 = hal.interface.binding.subspan set(0) binding(1) type(storage_buffer) alignment(64) offset(%c0) flags(ReadOnly) : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>>
  %2 = hal.interface.binding.subspan set(0) binding(2) type(storage_buffer) alignment(64) offset(%c0) : !flow.dispatch.tensor<writeonly:tensor<128x128xf32>>
  %3 = flow.dispatch.tensor.load %0, offsets = [0, 0], sizes = [128, 256], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<128x256xbf16>> -> tensor<128x256xbf16>
  %4 = flow.dispatch.tensor.load %1, offsets = [0, 0], sizes = [256, 128], strides = [1, 1] : !flow.dispatch.tensor<readonly:tensor<256x128xbf16>> -> tensor<256x128xbf16>
  %5 = tensor.empty() : tensor<128x128xf32>
  %6 = scf.forall (%arg0, %arg1) = (0, 0) to (128, 128) step (64, 64) shared_outs(%arg2 = %5) -> (tensor<128x128xf32>) {
    %extracted_slice = tensor.extract_slice %3[%arg0, 0] [64, 256] [1, 1] : tensor<128x256xbf16> to tensor<64x256xbf16>
    %extracted_slice_6 = tensor.extract_slice %4[0, %arg1] [256, 64] [1, 1] : tensor<256x128xbf16> to tensor<256x64xbf16>
    %extracted_slice_7 = tensor.extract_slice %arg2[%arg0, %arg1] [64, 64] [1, 1] : tensor<128x128xf32> to tensor<64x64xf32>
    %7 = bufferization.to_tensor %alloc_5 restrict writable : memref<2x2x32x32xf32, 1 : i32>
    %8 = bufferization.to_tensor %alloc_4 restrict writable : memref<2x2x8x8x4x4xf32, 2 : i32>
    %extracted_slice_8 = tensor.extract_slice %extracted_slice[0, 0] [64, 32] [1, 1] : tensor<64x256xbf16> to tensor<64x32xbf16>
    %9 = bufferization.to_tensor %alloc_3 restrict writable : memref<2x1x32x32xbf16, 1 : i32>
    %pack = tensor.pack %extracted_slice_8 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %9 : tensor<64x32xbf16> -> tensor<2x1x32x32xbf16>
    %extracted_slice_9 = tensor.extract_slice %extracted_slice_6[0, 0] [32, 64] [1, 1] : tensor<256x64xbf16> to tensor<32x64xbf16>
    %10 = bufferization.to_tensor %alloc_2 restrict writable : memref<1x2x32x32xbf16, 1 : i32>
    %pack_10 = tensor.pack %extracted_slice_9 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %10 : tensor<32x64xbf16> -> tensor<1x2x32x32xbf16>
    %11 = scf.forall (%arg3, %arg4) in (2, 2) shared_outs(%arg5 = %8) -> (tensor<2x2x8x8x4x4xf32>) {
      %extracted_slice_15 = tensor.extract_slice %pack[%arg3, 0, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<2x1x32x32xbf16> to tensor<1x1x32x32xbf16>
      %16 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x1x4x8x4x8xbf16, 2 : i32>
      %pack_16 = tensor.pack %extracted_slice_15 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %16 : tensor<1x1x32x32xbf16> -> tensor<1x1x4x8x4x8xbf16>
      %extracted_slice_17 = tensor.extract_slice %pack_10[0, %arg4, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<1x2x32x32xbf16> to tensor<1x1x32x32xbf16>
      %17 = bufferization.to_tensor %alloc restrict writable : memref<1x1x8x4x8x4xbf16, 2 : i32>
      %pack_18 = tensor.pack %extracted_slice_17 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %17 : tensor<1x1x32x32xbf16> -> tensor<1x1x8x4x8x4xbf16>
      %extracted_slice_19 = tensor.extract_slice %arg5[%arg3, %arg4, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
      %18 = linalg.fill ins(%cst_0 : f32) outs(%extracted_slice_19 : tensor<1x1x8x8x4x4xf32>) -> tensor<1x1x8x8x4x4xf32>
      %19 = scf.for %arg6 = %c0 to %c1 step %c1 iter_args(%arg7 = %18) -> (tensor<1x1x8x8x4x4xf32>) {
        %20 = scf.for %arg8 = %c0 to %c1 step %c1 iter_args(%arg9 = %arg7) -> (tensor<1x1x8x8x4x4xf32>) {
          %21 = scf.for %arg10 = %c0 to %c1 step %c1 iter_args(%arg11 = %arg9) -> (tensor<1x1x8x8x4x4xf32>) {
            %22 = scf.for %arg12 = %c0 to %c8 step %c1 iter_args(%arg13 = %arg11) -> (tensor<1x1x8x8x4x4xf32>) {
              %23 = scf.for %arg14 = %c0 to %c8 step %c1 iter_args(%arg15 = %arg13) -> (tensor<1x1x8x8x4x4xf32>) {
                %24 = scf.for %arg16 = %c0 to %c4 step %c1 iter_args(%arg17 = %arg15) -> (tensor<1x1x8x8x4x4xf32>) {
                  %extracted_slice_20 = tensor.extract_slice %pack_16[%arg6, %arg10, %arg16, %arg12, 0, 0] [1, 1, 1, 1, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<1x1x4x8x4x8xbf16> to tensor<1x1x1x1x4x8xbf16>
                  %extracted_slice_21 = tensor.extract_slice %pack_18[%arg10, %arg8, %arg14, %arg16, 0, 0] [1, 1, 1, 1, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x4x8x4xbf16> to tensor<1x1x1x1x8x4xbf16>
                  %extracted_slice_22 = tensor.extract_slice %arg17[%arg6, %arg8, %arg14, %arg12, 0, 0] [1, 1, 1, 1, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> to tensor<1x1x1x1x4x4xf32>
                  %25 = vector.transfer_read %extracted_slice_20[%c0, %c0, %c0, %c0, %c0, %c0], %cst {in_bounds = [true, true, true, true, true, true]} : tensor<1x1x1x1x4x8xbf16>, vector<1x1x1x1x4x8xbf16>
                  %26 = vector.transfer_read %extracted_slice_21[%c0, %c0, %c0, %c0, %c0, %c0], %cst {in_bounds = [true, true, true, true, true, true]} : tensor<1x1x1x1x8x4xbf16>, vector<1x1x1x1x8x4xbf16>
                  %27 = vector.transfer_read %extracted_slice_22[%c0, %c0, %c0, %c0, %c0, %c0], %cst_0 {in_bounds = [true, true, true, true, true, true]} : tensor<1x1x1x1x4x4xf32>, vector<1x1x1x1x4x4xf32>
                  %28 = arith.extf %25 : vector<1x1x1x1x4x8xbf16> to vector<1x1x1x1x4x8xf32>
                  %29 = arith.extf %26 : vector<1x1x1x1x8x4xbf16> to vector<1x1x1x1x8x4xf32>
                  %30 = vector.contract {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"], kind = #vector.kind<add>} %28, %29, %27 : vector<1x1x1x1x4x8xf32>, vector<1x1x1x1x8x4xf32> into vector<1x1x1x1x4x4xf32>
                  %31 = vector.transfer_write %30, %extracted_slice_22[%c0, %c0, %c0, %c0, %c0, %c0] {in_bounds = [true, true, true, true, true, true]} : vector<1x1x1x1x4x4xf32>, tensor<1x1x1x1x4x4xf32>
                  %inserted_slice = tensor.insert_slice %31 into %arg17[%arg6, %arg8, %arg14, %arg12, 0, 0] [1, 1, 1, 1, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x1x1x4x4xf32> into tensor<1x1x8x8x4x4xf32>
                  scf.yield %inserted_slice : tensor<1x1x8x8x4x4xf32>
                }
                scf.yield %24 : tensor<1x1x8x8x4x4xf32>
              }
              scf.yield %23 : tensor<1x1x8x8x4x4xf32>
            }
            scf.yield %22 : tensor<1x1x8x8x4x4xf32>
          }
          scf.yield %21 : tensor<1x1x8x8x4x4xf32>
        }
        scf.yield %20 : tensor<1x1x8x8x4x4xf32>
      }
      scf.forall.in_parallel {
        tensor.parallel_insert_slice %19 into %arg5[%arg3, %arg4, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> into tensor<2x2x8x8x4x4xf32>
      }
    } {mapping = [#gpu.thread<y>, #gpu.thread<x>]}
    %12 = scf.for %arg3 = %c1 to %c7 step %c1 iter_args(%arg4 = %11) -> (tensor<2x2x8x8x4x4xf32>) {
      %16 = affine.apply affine_map<(d0) -> (d0 * 32)>(%arg3)
      %extracted_slice_15 = tensor.extract_slice %extracted_slice[0, %16] [64, 32] [1, 1] : tensor<64x256xbf16> to tensor<64x32xbf16>
      %17 = bufferization.to_tensor %alloc_3 restrict writable : memref<2x1x32x32xbf16, 1 : i32>
      %pack_16 = tensor.pack %extracted_slice_15 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %17 : tensor<64x32xbf16> -> tensor<2x1x32x32xbf16>
      %extracted_slice_17 = tensor.extract_slice %extracted_slice_6[%16, 0] [32, 64] [1, 1] : tensor<256x64xbf16> to tensor<32x64xbf16>
      %18 = bufferization.to_tensor %alloc_2 restrict writable : memref<1x2x32x32xbf16, 1 : i32>
      %pack_18 = tensor.pack %extracted_slice_17 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %18 : tensor<32x64xbf16> -> tensor<1x2x32x32xbf16>
      %19 = scf.forall (%arg5, %arg6) in (2, 2) shared_outs(%arg7 = %arg4) -> (tensor<2x2x8x8x4x4xf32>) {
        %extracted_slice_19 = tensor.extract_slice %pack_16[%arg5, 0, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<2x1x32x32xbf16> to tensor<1x1x32x32xbf16>
        %20 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x1x4x8x4x8xbf16, 2 : i32>
        %pack_20 = tensor.pack %extracted_slice_19 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %20 : tensor<1x1x32x32xbf16> -> tensor<1x1x4x8x4x8xbf16>
        %extracted_slice_21 = tensor.extract_slice %pack_18[0, %arg6, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<1x2x32x32xbf16> to tensor<1x1x32x32xbf16>
        %21 = bufferization.to_tensor %alloc restrict writable : memref<1x1x8x4x8x4xbf16, 2 : i32>
        %pack_22 = tensor.pack %extracted_slice_21 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %21 : tensor<1x1x32x32xbf16> -> tensor<1x1x8x4x8x4xbf16>
        %extracted_slice_23 = tensor.extract_slice %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
        %22 = scf.for %arg8 = %c0 to %c1 step %c1 iter_args(%arg9 = %extracted_slice_23) -> (tensor<1x1x8x8x4x4xf32>) {
          %23 = scf.for %arg10 = %c0 to %c1 step %c1 iter_args(%arg11 = %arg9) -> (tensor<1x1x8x8x4x4xf32>) {
            %24 = scf.for %arg12 = %c0 to %c1 step %c1 iter_args(%arg13 = %arg11) -> (tensor<1x1x8x8x4x4xf32>) {
              %25 = scf.for %arg14 = %c0 to %c8 step %c1 iter_args(%arg15 = %arg13) -> (tensor<1x1x8x8x4x4xf32>) {
                %26 = scf.for %arg16 = %c0 to %c8 step %c1 iter_args(%arg17 = %arg15) -> (tensor<1x1x8x8x4x4xf32>) {
                  %27 = scf.for %arg18 = %c0 to %c4 step %c1 iter_args(%arg19 = %arg17) -> (tensor<1x1x8x8x4x4xf32>) {
                    %extracted_slice_24 = tensor.extract_slice %pack_20[%arg8, %arg12, %arg18, %arg14, 0, 0] [1, 1, 1, 1, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<1x1x4x8x4x8xbf16> to tensor<1x1x1x1x4x8xbf16>
                    %extracted_slice_25 = tensor.extract_slice %pack_22[%arg12, %arg10, %arg16, %arg18, 0, 0] [1, 1, 1, 1, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x4x8x4xbf16> to tensor<1x1x1x1x8x4xbf16>
                    %extracted_slice_26 = tensor.extract_slice %arg19[%arg8, %arg10, %arg16, %arg14, 0, 0] [1, 1, 1, 1, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> to tensor<1x1x1x1x4x4xf32>
                    %28 = vector.transfer_read %extracted_slice_24[%c0, %c0, %c0, %c0, %c0, %c0], %cst {in_bounds = [true, true, true, true, true, true]} : tensor<1x1x1x1x4x8xbf16>, vector<1x1x1x1x4x8xbf16>
                    %29 = vector.transfer_read %extracted_slice_25[%c0, %c0, %c0, %c0, %c0, %c0], %cst {in_bounds = [true, true, true, true, true, true]} : tensor<1x1x1x1x8x4xbf16>, vector<1x1x1x1x8x4xbf16>
                    %30 = vector.transfer_read %extracted_slice_26[%c0, %c0, %c0, %c0, %c0, %c0], %cst_0 {in_bounds = [true, true, true, true, true, true]} : tensor<1x1x1x1x4x4xf32>, vector<1x1x1x1x4x4xf32>
                    %31 = arith.extf %28 : vector<1x1x1x1x4x8xbf16> to vector<1x1x1x1x4x8xf32>
                    %32 = arith.extf %29 : vector<1x1x1x1x8x4xbf16> to vector<1x1x1x1x8x4xf32>
                    %33 = vector.contract {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "reduction"], kind = #vector.kind<add>} %31, %32, %30 : vector<1x1x1x1x4x8xf32>, vector<1x1x1x1x8x4xf32> into vector<1x1x1x1x4x4xf32>
                    %34 = vector.transfer_write %33, %extracted_slice_26[%c0, %c0, %c0, %c0, %c0, %c0] {in_bounds = [true, true, true, true, true, true]} : vector<1x1x1x1x4x4xf32>, tensor<1x1x1x1x4x4xf32>
                    %inserted_slice = tensor.insert_slice %34 into %arg19[%arg8, %arg10, %arg16, %arg14, 0, 0] [1, 1, 1, 1, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x1x1x4x4xf32> into tensor<1x1x8x8x4x4xf32>
                    scf.yield %inserted_slice : tensor<1x1x8x8x4x4xf32>
                  }
                  scf.yield %27 : tensor<1x1x8x8x4x4xf32>
                }
                scf.yield %26 : tensor<1x1x8x8x4x4xf32>
              }
              scf.yield %25 : tensor<1x1x8x8x4x4xf32>
            }
            scf.yield %24 : tensor<1x1x8x8x4x4xf32>
          }
          scf.yield %23 : tensor<1x1x8x8x4x4xf32>
        }
        scf.forall.in_parallel {
          tensor.parallel_insert_slice %22 into %arg7[%arg5, %arg6, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> into tensor<2x2x8x8x4x4xf32>
        }
      } {mapping = [#gpu.thread<y>, #gpu.thread<x>]}
      scf.yield %19 : tensor<2x2x8x8x4x4xf32>
    }
    %extracted_slice_11 = tensor.extract_slice %extracted_slice[0, 224] [64, 32] [1, 1] : tensor<64x256xbf16> to tensor<64x32xbf16>
    %13 = bufferization.to_tensor %alloc_3 restrict writable : memref<2x1x32x32xbf16, 1 : i32>
    %pack_12 = tensor.pack %extracted_slice_11 inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %13 : tensor<64x32xbf16> -> tensor<2x1x32x32xbf16>
    %extracted_slice_13 = tensor.extract_slice %extracted_slice_6[224, 0] [32, 64] [1, 1] : tensor<256x64xbf16> to tensor<32x64xbf16>
    %14 = bufferization.to_tensor %alloc_2 restrict writable : memref<1x2x32x32xbf16, 1 : i32>
    %pack_14 = tensor.pack %extracted_slice_13 outer_dims_perm = [0, 1] inner_dims_pos = [0, 1] inner_tiles = [32, 32] into %14 : tensor<32x64xbf16> -> tensor<1x2x32x32xbf16>
    %15:2 = scf.forall (%arg3, %arg4) in (2, 2) shared_outs(%arg5 = %12, %arg6 = %7) -> (tensor<2x2x8x8x4x4xf32>, tensor<2x2x32x32xf32>) {
      %extracted_slice_15 = tensor.extract_slice %pack_12[%arg3, 0, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<2x1x32x32xbf16> to tensor<1x1x32x32xbf16>
      %16 = bufferization.to_tensor %alloc_1 restrict writable : memref<1x1x4x8x4x8xbf16, 2 : i32>
      %pack_16 = tensor.pack %extracted_slice_15 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [4, 8] into %16 : tensor<1x1x32x32xbf16> -> tensor<1x1x4x8x4x8xbf16>
      %extracted_slice_17 = tensor.extract_slice %pack_14[0, %arg4, 0, 0] [1, 1, 32, 32] [1, 1, 1, 1] : tensor<1x2x32x32xbf16> to tensor<1x1x32x32xbf16>
      %17 = bufferization.to_tensor %alloc restrict writable : memref<1x1x8x4x8x4xbf16, 2 : i32>
      %pack_18 = tensor.pack %extracted_slice_17 outer_dims_perm = [0, 1, 3, 2] inner_dims_pos = [2, 3] inner_tiles = [8, 4] into %17 : tensor<1x1x32x32xbf16> -> tensor<1x1x8x4x8x4xbf16>
      %extracted_slice_19 = tensor.extract_slice %arg5[%arg3, %arg4, 0, 0, 0, 0] [1, 1, 8, 8, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<2x2x8x8x4x4xf32> to tensor<1x1x8x8x4x4xf32>
      %18 = scf.for %arg7 = %c0 to %c1 step %c1 iter_args(%arg8 = %extracted_slice_19) -> (tensor<1x1x8x8x4x4xf32>) {
        %19 = scf.for %arg9 = %c0 to %c1 step %c1 iter_args(%arg10 = %arg8) -> (tensor<1x1x8x8x4x4xf32>) {
          %20 = scf.for %arg11 = %c0 to %c1 step %c1 iter_args(%arg12 = %arg10) -> (tensor<1x1x8x8x4x4xf32>) {
            %21 = scf.for %arg13 = %c0 to %c8 step %c1 iter_args(%arg14 = %arg12) -> (tensor<1x1x8x8x4x4xf32>) {
              %22 = scf.for %arg15 = %c0 to %c8 step %c1 iter_args(%arg16 = %arg14) -> (tensor<1x1x8x8x4x4xf32>) {
                %23 = scf.for %arg17 = %c0 to %c4 step %c1 iter_args(%arg18 = %arg16) -> (tensor<1x1x8x8x4x4xf32>) {
                  %extracted_slice_22 = tensor.extract_slice %pack_16[%arg7, %arg11, %arg17, %arg13, 0, 0] [1, 1, 1, 1, 4, 8] [1, 1, 1, 1, 1, 1] : tensor<1x1x4x8x4x8xbf16> to tensor<1x1x1x1x4x8xbf16>
                  %extracted_slice_23 = tensor.extract_slice %pack_18[%arg11, %arg9, %arg15, %arg17, 0, 0] [1, 1, 1, 1, 8, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x4x8x4xbf16> to tensor<1x1x1x1x8x4xbf16>
                  %extracted_slice_24 = tensor.extract_slice %arg18[%arg7, %arg9, %arg15, %arg13, 0, 0] [1, 1, 1, 1, 4, 4] [1, 1, 1, 1, 1, 1] : tensor<1x1x8x8x4x4xf32> to tensor<1x1x1x1x4x4xf32>
                  %24 = vector.transfer_read %extracted_slice_22[%c0, %c0, %c0, %c0, %c0, %c0], %cst {in_bounds = [true, true, true, true, true, true]} : tensor<1x1x1x1x4x8xbf16>, vector<1x1x1x1x4x8xbf16>
                  %25 = vector.transfer_read %extracted_slice_23[%c0, %c0, %c0, %c0, %c0, %c0], %cst {in_bounds = [true, true, true, true, true, true]} : tensor<1x1x1x1x8x4xbf16>, vector<1x1x1x1x8x4xbf16>
                  %26 = vector.transfer_read %extracted_slice_24[%c0, %c0, %c0, %c0, %c0, %c0], %cst_0 {in_bounds = [true, true, true, true, true, true]} : tensor<1x1x1x1x4x4xf32>, vector<1x1x1x1x4x4xf32>
                  %27 = arith.extf %24 : vector<1x1x1x1x4x8xbf16> to vector<1x1x1x1x4x8xf32>
                  %28 = arith.extf %25 : vector<1x1x1x1x8x4xbf16> to vector<1x1x1x1x8x4xf32>
                  %29 = vector.contract {indexing_maps = [affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d2, d5, d3, d6, d8)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d2, d1, d4, d5, d8, d7)>, affine_map<(d0, d1, d2, d3, d4, d5, d6, d7, d8) -> (d0, d1, d4, d3, d6, d7)>], iterator_types = ["parallel", "parallel", "reduction", "parallel", "parallel", "reduction", "parallel", "parallel", "red