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Created January 5, 2017 07:01
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nfc confs diff
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nfcconfs.diff
diff --git a/configs/libnfc-brcm.conf b/configs/libnfc-brcm.conf
index e29e1a4..40c1ee5 100644
--- a/configs/libnfc-brcm.conf
+++ b/configs/libnfc-brcm.conf
@@ -143,7 +143,13 @@ NFA_HCI_STATIC_PIPE_ID_C0=0x19
# Force UICC to only listen to the following technology(s).
# The bits are defined as tNFA_TECHNOLOGY_MASK in nfa_api.h.
# Default is NFA_TECHNOLOGY_MASK_A | NFA_TECHNOLOGY_MASK_B | NFA_TECHNOLOGY_MASK_F
-UICC_LISTEN_TECH_MASK=0x07
+UICC_LISTEN_TECH_MASK=0xC7
+
+###############################################################################
+# Force HOST listen feature enable or disable.
+# 0: Disable
+# 1: Enable
+HOST_LISTEN_ENABLE=0x01
###############################################################################
# Forcing HOST to listen for a selected technology
@@ -157,7 +163,7 @@ HOST_LISTEN_TECH_MASK=0x03
# Enabling/Disabling Forward functionality
# Disable 0x00
# Enable 0x01
-NXP_FWD_FUNCTIONALITY_ENABLE=0x01
+NXP_FWD_FUNCTIONALITY_ENABLE=0x00
###############################################################################
# Allow UICC to be powered off if there is no traffic.
@@ -290,7 +296,7 @@ MAX_RF_DATA_CREDITS=1
###############################################################################
# Default poll duration (in ms)
-# The defualt is 500ms if not set (see nfc_target.h)
+# The default is 500ms if not set (see nfc_target.h)
#NFA_DM_DISC_DURATION_POLL=333
###############################################################################
# Antenna Configuration - This data is used when setting 0xC8 config item
@@ -315,7 +321,7 @@ MAX_RF_DATA_CREDITS=1
# 2 NFA_RW_PRES_CHK_RESET; Deactivate to Sleep, then re-activate
# 3 NFA_RW_PRES_CHK_RB_CH0; Type-4 tag protocol's ReadBinary command on channel 0
# 4 NFA_RW_PRES_CHK_RB_CH3; Type-4 tag protocol's ReadBinary command on channel 3
-PRESENCE_CHECK_ALGORITHM=1
+#PRESENCE_CHECK_ALGORITHM=0
###############################################################################
# Force tag polling for the following technology(s).
@@ -329,8 +335,8 @@ PRESENCE_CHECK_ALGORITHM=1
# NFA_TECHNOLOGY_MASK_A 0x01 /* NFC Technology A */
# NFA_TECHNOLOGY_MASK_B 0x02 /* NFC Technology B */
# NFA_TECHNOLOGY_MASK_F 0x04 /* NFC Technology F */
-# NFA_TECHNOLOGY_MASK_ISO15693 0x08 /* Proprietary Technology */
-# NFA_TECHNOLOGY_MASK_KOVIO 0x20 /* Proprietary Technology */
+# NFA_TECHNOLOGY_MASK_ISO15693 0x08 /* Proprietary Technology */
+# NFA_TECHNOLOGY_MASK_KOVIO 0x20 /* Proprietary Technology */
# NFA_TECHNOLOGY_MASK_A_ACTIVE 0x40 /* NFC Technology A active mode */
# NFA_TECHNOLOGY_MASK_F_ACTIVE 0x80 /* NFC Technology F active mode */
POLLING_TECH_MASK=0xEF
@@ -342,11 +348,11 @@ POLLING_TECH_MASK=0xEF
# NFA_TECHNOLOGY_MASK_A_ACTIVE | NFA_TECHNOLOGY_MASK_F_ACTIVE
#
# Notable bits:
-# NFA_TECHNOLOGY_MASK_A 0x01 /* NFC Technology A */
-# NFA_TECHNOLOGY_MASK_F 0x04 /* NFC Technology F */
+# NFA_TECHNOLOGY_MASK_A 0x01 /* NFC Technology A */
+# NFA_TECHNOLOGY_MASK_F 0x04 /* NFC Technology F */
# NFA_TECHNOLOGY_MASK_A_ACTIVE 0x40 /* NFC Technology A active mode */
# NFA_TECHNOLOGY_MASK_F_ACTIVE 0x80 /* NFC Technology F active mode */
-P2P_LISTEN_TECH_MASK=0xC5
+P2P_LISTEN_TECH_MASK=0xC4
PRESERVE_STORAGE=0x01
@@ -361,10 +367,12 @@ PRESERVE_STORAGE=0x01
# NXP PN65T 0x03
# NXP PN548C2 0x02
# NXP PN66T 0x03
-NFA_MAX_EE_SUPPORTED=0x03
+NFA_MAX_EE_SUPPORTED=0x02
###############################################################################
# NCI Hal Module name
+#NCI_HAL_MODULE="nfc_nci.pn54x"
+#NCI_HAL_MODULE="nfc_lg.default"
NCI_HAL_MODULE="nfc_nci.nqx"
##############################################################################
@@ -380,6 +388,12 @@ NFA_DM_DISC_NTF_TIMEOUT=100
AID_MATCHING_MODE=0x01
###############################################################################
+# Preferred Secure Element for Technology based routing
+# eSE 0x01
+# UICC 0x02
+NXP_PRFD_TECH_SE=0x02
+
+###############################################################################
# Default Secure Element route id
DEFAULT_OFFHOST_ROUTE=0x02
@@ -402,3 +416,4 @@ NFA_PROPRIETARY_CFG={05:FF:FF:06:81:80:70:FF:FF}
# If set to 1, NFCC is using bail out mode for either Type A or Type B poll.
NFA_POLL_BAIL_OUT_MODE=0x01
#################################################################################
+
diff --git a/configs/libnfc-nxp.conf b/configs/libnfc-nxp.conf
index c4c8c3b..c9fc629 100644
--- a/configs/libnfc-nxp.conf
+++ b/configs/libnfc-nxp.conf
@@ -1,3 +1,15 @@
+###################################################################################
+#
+# R E L E A S E H I S T O R Y
+#
+# condition : PN548/C2 --> eSE disabled
+#
+# 20160706 : Sample version for FW 10.1.1C
+# : Remove BLK1~6 because it is default value of FW
+# : make BLK1 for antenna tuning parameter
+###################################################################################
+
+
## This file is used by NFC NXP NCI HAL(external/libnfc-nci/halimpl/pn547)
## and NFC Service Java Native Interface Extensions (packages/apps/Nfc/nci/jni/extns/pn547)
@@ -16,63 +28,37 @@ NXPLOG_NCIX_LOGLEVEL=0x03
NXPLOG_NCIR_LOGLEVEL=0x03
NXPLOG_FWDNLD_LOGLEVEL=0x03
NXPLOG_TML_LOGLEVEL=0x03
-###############################################################################
-# Nfc Device Node name
-NXP_NFC_DEV_NODE="/dev/pn547"
###############################################################################
# Extension for Mifare reader enable
+# 0x00 - Disabled
+# 0x01 - Enabled
MIFARE_READER_ENABLE=0x01
###############################################################################
-# Vzw Feature enable
-VZW_FEATURE_ENABLE=0x01
-
-###############################################################################
-# File name for Firmware
-NXP_FW_NAME="libpn548ad_fw.so"
+# File location for Firmware
+#FW_STORAGE="/vendor/firmware/libpn548_fw.so"
###############################################################################
# System clock source selection configuration
-#define CLK_SRC_XTAL 1
-#define CLK_SRC_PLL 2
-
-NXP_SYS_CLK_SRC_SEL=0x02
+# CLK_SRC_XTAL - 0x01
+# CLK_SRC_PLL - 0x02
+NXP_SYS_CLK_SRC_SEL=0x01
###############################################################################
-# System clock frequency selection configuration
-#define CLK_FREQ_13MHZ 1
-#define CLK_FREQ_19_2MHZ 2
-#define CLK_FREQ_24MHZ 3
-#define CLK_FREQ_26MHZ 4
-#define CLK_FREQ_38_4MHZ 5
-#define CLK_FREQ_52MHZ 6
-
-NXP_SYS_CLK_FREQ_SEL=0x02
+# System clock frequency selection configuration for PLL
+# CLK_FREQ_13MHZ - 0x01
+# CLK_FREQ_19_2MHZ - 0x02
+# CLK_FREQ_24MHZ - 0x03
+# CLK_FREQ_26MHZ - 0x04
+# CLK_FREQ_38_4MHZ - 0x05
+# CLK_FREQ_52MHZ - 0x06
+NXP_SYS_CLK_FREQ_SEL=0x00
###############################################################################
# The timeout value to be used for clock request acknowledgment
# min value = 0x01 to max = 0x06
-
-NXP_SYS_CLOCK_TO_CFG=0x03
-
-###############################################################################
-# NXP proprietary settings
-NXP_ACT_PROP_EXTN={2F, 02, 00}
-
-###############################################################################
-# NFC forum profile settings
-NXP_NFC_PROFILE_EXTN={20, 02, 05, 01, A0, 44, 01, 00}
-
-###############################################################################
-# NFCC Configuration Control
-# Allow NFCC to manage RF Config 0x01
-# Don't allow NFCC to manage RF Config 0x00
-NXP_NFC_MERGE_RF_PARAMS={20, 02, 04, 01, 85, 01, 01}
-
-###############################################################################
-# Standby enable settings
-#NXP_CORE_STANDBY={2F, 00, 01, 01}
+NXP_SYS_CLOCK_TO_CFG=0x06
###############################################################################
# NXP TVDD configurations settings
@@ -82,94 +68,207 @@ NXP_NFC_MERGE_RF_PARAMS={20, 02, 04, 01, 85, 01, 01}
NXP_EXT_TVDD_CFG=0x01
-#config1:SLALM, 3.3V for both RM and CM
-NXP_EXT_TVDD_CFG_1={20, 02, 0B, 02, A0, 66, 01, 00, A0, 0E, 03, 02, 09, 00}
-
-#config2: use DCDC in CE, use Tx_Pwr_Req, set CFG2 mode, SLALM,
-#monitoring 5V from DCDC, 4.7V for both RM and CM, DCDCWaitTime=4.2ms
-NXP_EXT_TVDD_CFG_2={20, 02, 0B, 02, A0, 66, 01, 00, A0, 0E, 03, 56, 64, 0A}
-
-#config3: use DCDC in CE, use Tx_Pwr_Req, SLALM, monitoring 5V from DCDC,
-#DCDCWaitTime=4.2ms
-NXP_EXT_TVDD_CFG_3={20, 02, 0B, 02, A0, 66, 01, 01, A0, 0E, 03, 52, 64, 0A}
-
-###############################################################################
-# NXP RF configuration ALM/PLM settings
-# This section needs to be updated with the correct values based on the platform
-#NXP_RF_CONF_BLK_1={
-#}
-
###############################################################################
-# NXP RF configuration ALM/PLM settings
-# This section needs to be updated with the correct values based on the platform
-#NXP_RF_CONF_BLK_2={
-#}
-
-###############################################################################
-# NXP RF configuration ALM/PLM settings
-# This section needs to be updated with the correct values based on the platform
-#NXP_RF_CONF_BLK_3={
-#}
+# NXP proprietary settings
+NXP_ACT_PROP_EXTN={2F, 02, 00}
###############################################################################
-# NXP RF configuration ALM/PLM settings
-# This section needs to be updated with the correct values based on the platform
-#NXP_RF_CONF_BLK_4={
-#}
+# NFC forum profile settings
+NXP_NFC_PROFILE_EXTN={20, 02, 05, 01, A0, 44, 01, 00}
###############################################################################
-# NXP RF configuration ALM/PLM settings
-# This section needs to be updated with the correct values based on the platform
-#NXP_RF_CONF_BLK_5={
-#}
+# Standby enable settings
+# 0x00 - Disabled
+# 0x01 - Enabled
+NXP_CORE_STANDBY={2F, 00, 01, 01}
+# *** ALMSL(NO BOOSTER) FW VERSION = 10.01.1C ***
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
-#NXP_RF_CONF_BLK_6={
-#}
-
-
-###############################################################################
-# Set configuration optimization decision setting
-# Enable = 0x01
-# Disable = 0x00
-NXP_SET_CONFIG_ALWAYS=0x01
+# New Features were added since FW10.1.13
+# A0, 0D, 06, 70, 44, A3, 90, 03, 00, RF_CLIF_CFG_BR_212_T_RXA CLIF_ANA_RX_REG
+# A0, 0D, 06, 74, 44, A3, 90, 03, 00 RF_CLIF_CFG_BR_424_T_RXA CLIF_ANA_RX_REG
+# A0, 0D, 06, 8E, 44, 12, 90, 03, 00, RF_CLIF_CFG_BR_212_T_RXF CLIF_ANA_RX_REG
+# A0, 0D, 06, 94, 44, 12, 90, 03, 00, RF_CLIF_CFG_BR_424_T_RXF CLIF_ANA_RX_REG
+# A0, 0D, 03, 24, 41, 40, RF_CLIF_CFG_TECHNO_T_TXA_P CLIF_ANA_TX_CLK_CONTROL_REG
+# A0, 0D, 06, 24, 42, 00, 02, FF, FF, RF_CLIF_CFG_TECHNO_T_TXA_P CLIF_ANA_TX_AMPLITUDE_REG
+# A0, 0D, 03, 28, 41, 40, RF_CLIF_CFG_TECHNO_T_TXB CLIF_ANA_TX_CLK_CONTROL_REG
+# A0, 0D, 06, 28, 42, 00, 02, FF, FF, RF_CLIF_CFG_TECHNO_T_TXB CLIF_ANA_TX_AMPLITUDE_REG
+# A0, 0D, 03, 8A, 41, 40, RF_CLIF_CFG_BR_212_T_TXF_P CLIF_ANA_TX_CLK_CONTROL_REG
+# A0, 0D, 03, 90, 41, 40, RF_CLIF_CFG_BR_424_T_TXF_P CLIF_ANA_TX_CLK_CONTROL_REG
+
+# legacy RF parameters.
+# A0, 0D, 03, 06, 37, 08, RF_CLIF_CFG_TARGET CLIF_TX_CONTROL_REG
+# A0, 0D, 06, 32, 42, F8, 20, FF, FF, RF_CLIF_CFG_BR_106_I_TXA CLIF_ANA_TX_AMPLITUDE_REG
+# A0, 0D, 06, 06, 42, 00, 03, F2, F4, RF_CLIF_CFG_TARGET CLIF_ANA_TX_AMPLITUDE_REG
+# A0, 0D, 06, 32, 4A, 33, 07, 00, 1C, RF_CLIF_CFG_BR_106_I_TXA CLIF_ANA_TX_SHAPE_CONTROL_REG
+# A0, 1D, 11, 55, ... CLK_MAN_Power ON
+# A0, 1E, 11, 1D, ... CLK_MAN_Power OFF
+# A0, 0D, 04, 06, 03, 00, 71, RF_CLIF_CFG_TARGET CLIF_TRANSCEIVE_CONTROL_REG
+# A0, 0D, 03, 00, 40, 05 RF_CLIF_CFG_BOOT CLIF_ANA_NFCLD_REG
+# A0, 0D, 06, 9A, 42, 00, 00, FF, FF, RF_CLIF_CFG_GTM_FELICA CLIF_ANA_TX_AMPLITUDE_REG
+##############################################################################################################
+
+##############################################################################################################
+# Please be noticed that below registers has to be set as same value !!!!!
+# x value should be set to 0x0
+# y value should be set as same value.
+# A0, 0D, 06, 06, 42, 00, 0x, Fy, F3,
+# A0, 0D, 06, 24, 42, 00, 0x, Fy, F3,
+# A0, 0D, 06, 98, 42, 00, 0x, Fy, F3,
+# A0, 0D, 06, 9A, 42, 00, 0x, Fy, F3,
+##############################################################################################################
+
+##############################################################################################################
+# Below were added by MyungHwan Cho as requested. - 2015/07/07
+# A0, 0D, 06, 34, 2D, 24, 77, 0C, 00 RF_CLIF_CFG_BR_106_I_RXA_P CLIF_SIGPRO_RM_CONFIG1_REG
+# A0, 0D, 04, 34, 44, 21, 00 RF_CLIF_CFG_BR_106_I_RXA_P CLIF_ANA_RX_REG(21,22,23)
+##############################################################################################################
+
+NXP_RF_CONF_BLK_1={ 20, 02, 89, 10,
+ A0, 0D, 03, 06, 37, 38,
+ A0, 0D, 06, 32, 42, F8, 20, FF, FF,
+ A0, 0D, 06, 06, 42, 00, 00, F4, F3,
+ A0, 0D, 06, 24, 42, 00, 00, F4, F3,
+ A0, 0D, 06, 98, 42, 00, 00, F4, F3,
+ A0, 0D, 06, 9A, 42, 00, 00, F4, F3,
+ A0, 0D, 06, 32, 4A, 33, 07, 00, 1C,
+ A0, 0D, 06, 06, 03, 00, 73, 00, 20,
+ A0, 0D, 03, 00, 40, 04,
+ A0, 0D, 06, 34, 2D, 24, 47, 0C, 00,
+ A0, 0D, 04, 34, 44, 21, 00,
+ A0, 0D, 06, 06, 33, 07, 40, 00, 00,
+ A0, 0D, 06, 10, 35, FF, 01, FF, 02,
+ A0, 0D, 06, 06, 35, 00, 02, 00, 02,
+ A0, 0D, 06, 00, 35, 00, 00, 00, 00,
+ A0, 0D, 06, 07, 35, 00, 00, 00, 00
+}
+
+NXP_RF_CONF_BLK_1_FACTORY={ 20, 02, 48, 09,
+ A0, 0D, 03, 06, 37, 38,
+ A0, 0D, 06, 32, 42, F8, 20, FF, FF,
+ A0, 0D, 06, 06, 42, 00, 00, F4, F3,
+ A0, 0D, 06, 9A, 42, 00, 00, F4, F3,
+ A0, 0D, 06, 32, 4A, 33, 07, 00, 1C,
+ A0, 0D, 04, 06, 03, 00, 73,
+ A0, 0D, 03, 00, 40, 04,
+ A0, 0D, 06, 34, 2D, 24, 47, 0C, 00,
+ A0, 0D, 04, 34, 44, 21, 00
+}
+
+NXP_RF_CONF_BLK_2={ 20, 02, 29, 02,
+ A0, 1D, 11, 54, 33, 14, 17, 00, AA, 85, 00, 80, 55, 2A, 04, 00, 63, 00, 00, 00,
+ A0, 1E, 11, 1C, 13, 14, 14, 00, 6F, 97, 00, 00, 00, 10, 04, 00, 63, 02, 00, 00
+}
-###############################################################################
# Core configuration extensions
# It includes
-# Wired mode settings A0ED, A0EE
-# Tag Detector A040, A041, A043
-# Low Power mode A007
-# Clock settings A002, A003
-# PbF settings A008
-# Clock timeout settings A004
-NXP_CORE_CONF_EXTN={20, 02, 21, 08,
- A0, EC, 01, 01,
- A0, ED, 01, 03,
- A0, 5E, 01, 01,
- A0, 12, 01, 02,
- A0, 40, 01, 01,
- A0, DD, 01, 2D,
- A0, F2, 01, 01,
- A0, 96, 01, 01
- }
-# A0, 41, 01, 02,
-# A0, 43, 01, 04,
-# A0, 02, 01, 01,
-# A0, 03, 01, 11,
-# A0, 07, 01, 03,
-# A0, 08, 01, 01
-# }
-
-###############################################################################
-# Core configuration rf field filter settings to enable set to 01 to disable set to 00 last bit
-NXP_CORE_RF_FIELD={ 20, 02, 05, 01, A0, 62, 01, 01
- }
-###############################################################################
-# To enable i2c fragmentation set i2c fragmentation enable 0x01 to disable set to 0x00
-NXP_I2C_FRAGMENTATION_ENABLED=0x00
+# A002 - Clock Request
+# 0x00 - Disabled
+# 0x01 - Enabled
+# A003 - Clock Selection
+# Please refer to User Manual
+# A004 - Clock Time Out
+# Defined in ms
+# A006 - Vbat Monitor
+# 0x00 - Enable
+# 0x01 - Set Threshold, 1 : 2.3v, 0 : 2.75
+# A00E - Load Modulation Mode
+# 0x00 - PLM
+# 0x01 - ALM
+# A012 - SWP interface 2 configuration
+# 0x00 - SWP
+# 0x02 - DWP
+# Please refer to User Manual
+# A040-A043 - Ultra Low Power Tag Detector
+# Please refer to Application Note of ULPTD
+# A05E - Jewel Reader
+# Please refer to User Manual
+# A080 - Restart polling Time Out
+# Defined in ms
+# 0x01 - Set Threshold, 1 : 2.3v, 0 : 2
+# A0CD - SWP S1 line behavior
+# Defined S1 High time out during Activation sequence
+# A0EC - SWP1 interface
+# 0x00 - Disabled
+# 0x01 - Enabled
+# A0ED - SWP2 interface
+# 0x00 - Disabled
+# 0x01 - Enabled
+# A09A - LG Gemalto Issue enable
+# 0x00 - Disabled
+# 0x01 - Enabled
+# A0F7 - Delay before Sending RSET (1.19us per 1 step)
+NXP_CORE_CONF_EXTN_PM={20, 02, 4E, 10,
+ A0, 02, 01, 01,
+ A0, 03, 01, 11,
+ A0, 04, 01, 06,
+ A0, 06, 01, 01,
+ A0, 80, 02, 84, 03,
+ A0, 11, 04, CD, 67, 22, 01,
+ A0, 5E, 01, 01,
+ A0, CD, 01, 1F,
+ A0, EC, 01, 01,
+ A0, ED, 01, 00,
+ A0, CB, 01, 0F,
+ A0, 68, 01, 00,
+ A0, 69, 09, 02, CF, 80, 00, 00, 07, 40, 00, 00,
+ A0, 98, 01, 00,
+ A0, 9A, 01, 00,
+ A0, F7, 02, 6D, 01
+}
+NXP_CORE_CONF_EXTN_XTAL={20, 02, 4E, 10,
+ A0, 02, 01, 01,
+ A0, 03, 01, 08,
+ A0, 04, 01, 06,
+ A0, 06, 01, 03,
+ A0, 80, 02, 84, 03,
+ A0, 11, 04, 14, B8, 0B, 14,
+ A0, 5E, 01, 01,
+ A0, CD, 01, 0F,
+ A0, EC, 01, 01,
+ A0, ED, 01, 00,
+ A0, CB, 01, 0F,
+ A0, 68, 01, 00,
+ A0, 69, 09, 02, CF, 80, 00, 00, 07, 40, 00, 00,
+ A0, 98, 01, 00,
+ A0, 9A, 01, 00,
+ A0, F7, 02, 6D, 01
+}
+
+NXP_CORE_CONF_EXTN={20, 02, 54, 11,
+ A0, 02, 01, 01,
+ A0, 03, 01, 08,
+ A0, 04, 01, 06,
+ A0, 06, 01, 01,
+ A0, 80, 02, E8, 03,
+ A0, 11, 04, 14, B8, 0B, 14,
+ A0, 5E, 01, 01,
+ A0, CD, 01, 0F,
+ A0, EC, 01, 01,
+ A0, ED, 01, 00,
+ A0, CB, 01, 0F,
+ A0, 0E, 03, 02, 09, 00,
+ A0, 66, 01, 00,
+ A0, 69, 09, 02, CF, 80, 00, 00, 07, 40, 00, 00,
+ A0, 98, 01, 00,
+ A0, 9A, 01, 00,
+ A0, F7, 02, 6D, 01
+}
+
+###############################################################################
+# apply Low Power Polling(LPM) Algorithm, detecting RF field using short-term single carrier
+# NORMAL Polling : {20, 02, 11, 04, A0, 40, 01, 00, A0, 41, 01, 04, A0, 42, 01, 19, A0, 43, 01, 50}
+# LPM Polling : {20, 02, 11, 04, A0, 40, 01, 01, A0, 41, 01, 04, A0, 42, 01, 19, A0, 43, 01, 00}
+# HYBRID Polling : {20, 02, 11, 04, A0, 40, 01, 01, A0, 41, 01, 04, A0, 42, 01, 19, A0, 43, 01, 04}
+
+NXP_POLLING_MODE={20, 02, 11, 04,
+ A0, 40, 01, 01,
+ A0, 41, 01, 03,
+ A0, 42, 01, 19,
+ A0, 43, 01, 03
+}
###############################################################################
# Core configuration settings
@@ -178,11 +277,11 @@ NXP_CORE_CONF={ 20, 02, 2E, 0E,
21, 01, 00,
30, 01, 08,
31, 01, 03,
- 32, 01, 60,
+ 32, 01, 20,
38, 01, 01,
33, 04, 01, 02, 03, 04,
54, 01, 06,
- 50, 01, 02,
+ 50, 01, 00,
5B, 01, 00,
80, 01, 01,
81, 01, 01,
@@ -203,7 +302,10 @@ NXP_CORE_CONF={ 20, 02, 2E, 0E,
# eSE 0x01
# UICC 0x02
-NXP_DEFAULT_SE=0x03
+NXP_DEFAULT_SE=0x02
+
+###############################################################################
+NXP_DEFAULT_NFCEE_TIMEOUT=0x06
###############################################################################
#Enable SWP full power mode when phone is power off
@@ -224,25 +326,20 @@ NXP_NFC_CHIP=0x03
# Enable 0x01
NXP_CE_ROUTE_STRICT_DISABLE=0x01
-#Timeout in secs to get NFCEE Discover notification
-NXP_DEFAULT_NFCEE_DISC_TIMEOUT=20
-
-NXP_DEFAULT_NFCEE_TIMEOUT=0x06
-
-#Timeout in secs
+###############################################################################
+#SWP Reader feature
+#Timeout in seconds
NXP_SWP_RD_START_TIMEOUT=0x0A
-
-#Timeout in secs
+#Timeout in seconds
NXP_SWP_RD_TAG_OP_TIMEOUT=0x01
###############################################################################
-
#Set the default AID route Location :
#This settings will be used when application does not set this parameter
# host 0x00
# eSE 0x01
# UICC 0x02
-DEFAULT_AID_ROUTE=0x00
+DEFAULT_AID_ROUTE=0x02
###############################################################################
#Set the Mifare Desfire route Location :
@@ -259,138 +356,8 @@ DEFAULT_DESFIRE_ROUTE=0x02
# eSE 0x01
# UICC 0x02
DEFAULT_MIFARE_CLT_ROUTE=0x02
-
-###############################################################################
-#Set the default AID Power state :
-#This settings will be used when application does not set this parameter
-# bit pos 0 = Switch On
-# bit pos 1 = Switch Off
-# bit pos 2 = Battery Off
-# bit pos 3 = Screen Lock
-# bit pos 4 = Screen Off
-DEFAULT_AID_PWR_STATE=0x19
-
-###############################################################################
-#Set the Mifare Desfire Power state :
-#This settings will be used when application does not set this parameter
-# bit pos 0 = Switch On
-# bit pos 1 = Switch Off
-# bit pos 2 = Battery Off
-# bit pos 3 = Screen Lock
-# bit pos 4 = Screen Off
-DEFAULT_DESFIRE_PWR_STATE=0x1B
-
-###############################################################################
-#Set the Mifare CLT Power state :
-#This settings will be used when application does not set this parameter
-# bit pos 0 = Switch On
-# bit pos 1 = Switch Off
-# bit pos 2 = Battery Off
-# bit pos 3 = Screen Lock
-# bit pos 4 = Screen Off
-DEFAULT_MIFARE_CLT_PWR_STATE=0x1B
-
###############################################################################
# AID Matching platform options
# AID_MATCHING_L 0x01
# AID_MATCHING_K 0x02
AID_MATCHING_PLATFORM=0x01
-###############################################################################
-# P61 interface options
-# NFC 0x01
-# SPI 0x02
-NXP_P61_LS_DEFAULT_INTERFACE=0x01
-###############################################################################
-# P61 LTSM interface options
-# NFC 0x01
-# SPI 0x02
-NXP_P61_LTSM_DEFAULT_INTERFACE=0x01
-###############################################################################
-#CHINA_TIANJIN_RF_SETTING
-#Enable 0x01
-#Disable 0x00
-NXP_CHINA_TIANJIN_RF_ENABLED=0x01
-###############################################################################
-#SWP_SWITCH_TIMEOUT_SETTING
-# Allowed range of swp timeout setting is 0x00 to 0x3C [0 - 60].
-# Timeout in milliseconds, for example
-# No Timeout 0x00
-# 10 millisecond timeout 0x0A
-NXP_SWP_SWITCH_TIMEOUT=0x0A
-###############################################################################
-# P61 interface options for JCOP Download
-# NFC 0x01
-# SPI 0x02
-NXP_P61_JCOP_DEFAULT_INTERFACE=0x01
-###############################################################################
-# P61 JCOP OS download options
-# FRAMEWORK API BY APPLICATION 0x00
-# AT BOOT_TIME 0x01
-NXP_JCOPDL_AT_BOOT_ENABLE=0x00
-
-###############################################################################
-# Loader service version
-# NFC service checks for LS version 2.0 or 2.1
-# LS2.0 0x20
-# LS2.1 0x21
-# LS2.2 0x22
-# AT NFC service intialization
-NXP_LOADER_SERVICE_VERSION=0x21
-###############################################################################
-#Timeout value in milliseconds for NFCC standby mode.The range is between 5000 msec to 20000 msec and zero is to disable.
-NXP_NFCC_STANDBY_TIMEOUT=20000
-
-###############################################################################
-#Dynamic RSSI feature enable
-# Disable 0x00
-# Enable 0x01
-NXP_AGC_DEBUG_ENABLE=0x00
-
-###############################################################################
-#Virtual Mode ESE and Wired Mode ongoing delay Wired Mode
-# For Technology routing to ESE Technology Mask = 4
-# For ISO-DEP Protocol routing to ESE Mask = 2
-# It can also take TECH|PROTO = 6
-# To ignore the delay set mask to = 0
-NXP_ESE_WIRED_PRT_MASK=0x00
-
-###############################################################################
-#Virtual Mode UICC and Wired Mode ongoing delay Wired Mode
-#For Technology routing to UICC Technology Mask = 4
-#For ISO-DEP Protocol routing to UICC set Mask = 2
-#For Select AID Routing to UICC set Mask = 1
-#It can also take values TECH|PROTO|SELECT_AID = 7 , 6 , 5 ,3 .To ignore delay set mask = 0
-NXP_UICC_WIRED_PRT_MASK=0x00
-
-################################################################################
-#RF field true delay Wired Mode
-# delay wired mode = 1
-# allow wired mode = 0
-NXP_WIRED_MODE_RF_FIELD_ENABLE=0x00
-
-###############################################################################
-#Config to allow adding aids
-#NFC on/off is required after this config
-#1 = enabling adding aid to NFCC routing table.
-#0 = disabling adding aid to NFCC routing table.
-NXP_ENABLE_ADD_AID=0x01
-###############################################################################
-# UICC mode supported
-# Disable 0x00
-# Enable 0x01
-NXP_DUAL_UICC_ENABLE=0x00
-#################################################################################
-# JCOP-3.3 continuous process timeout in msec and value should be in Hexadecimal.
-# JCOP CP TIMEOUT
-NXP_CP_TIMEOUT={00, 77}
-###############################################################################
-# Enable/Disable checking default proto SE Id
-# Disable 0x00
-# Enable 0x01
-NXP_CHECK_DEFAULT_PROTO_SE_ID=0x01
-###############################################################################
-#NXP_CN_TRANSIT_BLK_NUM_CHECK_ENABLE
-#Enable/Disable block number checks for china transit use case
-#Enable 0x01
-#Disable 0x00
-NXP_CN_TRANSIT_BLK_NUM_CHECK_ENABLE=0x01
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