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| --- qcom-ipq8064-ap148.old.dtb | |
| +++ qcom-ipq8064-ap148.new.dtb | |
| @@ -21,21 +21,21 @@ | |
| #clock-cells = <0x00>; | |
| clock-frequency = <0x17d7840>; | |
| compatible = "fixed-clock"; | |
| - phandle = <0x14>; | |
| + phandle = <0x0d>; | |
| }; | |
| pxo_board { | |
| #clock-cells = <0x00>; | |
| clock-frequency = <0x17d7840>; | |
| compatible = "fixed-clock"; | |
| - phandle = <0x13>; | |
| + phandle = <0x0c>; | |
| }; | |
| sleep_clk { | |
| #clock-cells = <0x00>; | |
| clock-frequency = <0x8000>; | |
| compatible = "fixed-clock"; | |
| - phandle = <0x0b>; | |
| + phandle = <0x10>; | |
| }; | |
| }; | |
| @@ -123,10 +123,10 @@ | |
| cap-mmc-highspeed; | |
| cap-sd-highspeed; | |
| clock-names = "mclk\0apb_pclk"; | |
| - clocks = <0x0c 0x6b 0x0c 0x64>; | |
| + clocks = <0x0a 0x6b 0x0a 0x64>; | |
| compatible = "arm,pl18x\0arm,primecell"; | |
| dma-names = "tx\0rx"; | |
| - dmas = <0x24 0x02 0x24 0x01>; | |
| + dmas = <0x16 0x02 0x16 0x01>; | |
| interrupt-names = "cmd_irq"; | |
| interrupts = <0x00 0x66 0x04>; | |
| max-frequency = <0xb71b000>; | |
| @@ -134,7 +134,7 @@ | |
| sd-uhs-ddr50; | |
| sd-uhs-sdr104; | |
| status = "disabled"; | |
| - vqmmc-supply = <0x22>; | |
| + vqmmc-supply = <0x15>; | |
| }; | |
| mmc@12400000 { | |
| @@ -143,10 +143,10 @@ | |
| cap-mmc-highspeed; | |
| cap-sd-highspeed; | |
| clock-names = "mclk\0apb_pclk"; | |
| - clocks = <0x0c 0x67 0x0c 0x62>; | |
| + clocks = <0x0a 0x67 0x0a 0x62>; | |
| compatible = "arm,pl18x\0arm,primecell"; | |
| dma-names = "tx\0rx"; | |
| - dmas = <0x23 0x02 0x23 0x01>; | |
| + dmas = <0x17 0x02 0x17 0x01>; | |
| interrupt-names = "cmd_irq"; | |
| interrupts = <0x00 0x68 0x04>; | |
| max-frequency = <0x5b8d800>; | |
| @@ -154,16 +154,16 @@ | |
| non-removable; | |
| reg = <0x12400000 0x2000>; | |
| status = "disabled"; | |
| - vmmc-supply = <0x22>; | |
| + vmmc-supply = <0x15>; | |
| }; | |
| }; | |
| clock-controller@2011000 { | |
| clock-names = "pll8_vote\0pxo"; | |
| clock-output-names = "acpu_l2_aux"; | |
| - clocks = <0x0c 0xe3 0x13>; | |
| + clocks = <0x0a 0xe3 0x0c>; | |
| compatible = "qcom,kpss-gcc\0syscon"; | |
| - phandle = <0x17>; | |
| + phandle = <0x09>; | |
| reg = <0x2011000 0x1000>; | |
| }; | |
| @@ -183,7 +183,7 @@ | |
| #clock-cells = <0x01>; | |
| #reset-cells = <0x01>; | |
| compatible = "qcom,lcc-ipq8064"; | |
| - phandle = <0x09>; | |
| + phandle = <0x20>; | |
| reg = <0x28000000 0x1000>; | |
| }; | |
| @@ -192,9 +192,9 @@ | |
| #power-domain-cells = <0x01>; | |
| #reset-cells = <0x01>; | |
| clock-names = "pxo\0cxo"; | |
| - clocks = <0x13 0x14>; | |
| + clocks = <0x0c 0x0d>; | |
| compatible = "qcom,gcc-ipq8064\0syscon"; | |
| - phandle = <0x0c>; | |
| + phandle = <0x0a>; | |
| reg = <0x900000 0x4000>; | |
| thermal-sensor@900000 { | |
| @@ -204,7 +204,7 @@ | |
| interrupt-names = "uplow"; | |
| interrupts = <0x00 0xb2 0x04>; | |
| nvmem-cell-names = "calib\0calib_backup"; | |
| - nvmem-cells = <0x15 0x16>; | |
| + nvmem-cells = <0x0e 0x0f>; | |
| phandle = <0x07>; | |
| }; | |
| }; | |
| @@ -212,10 +212,10 @@ | |
| dma-controller@12182000 { | |
| #dma-cells = <0x01>; | |
| clock-names = "bam_clk"; | |
| - clocks = <0x0c 0x64>; | |
| + clocks = <0x0a 0x64>; | |
| compatible = "qcom,bam-v1.3.0"; | |
| interrupts = <0x00 0x60 0x04>; | |
| - phandle = <0x24>; | |
| + phandle = <0x16>; | |
| qcom,ee = <0x00>; | |
| reg = <0x12182000 0x8000>; | |
| }; | |
| @@ -223,10 +223,10 @@ | |
| dma-controller@12402000 { | |
| #dma-cells = <0x01>; | |
| clock-names = "bam_clk"; | |
| - clocks = <0x0c 0x62>; | |
| + clocks = <0x0a 0x62>; | |
| compatible = "qcom,bam-v1.3.0"; | |
| interrupts = <0x00 0x62 0x04>; | |
| - phandle = <0x23>; | |
| + phandle = <0x17>; | |
| qcom,ee = <0x00>; | |
| reg = <0x12402000 0x8000>; | |
| }; | |
| @@ -234,85 +234,85 @@ | |
| dma-controller@18300000 { | |
| #dma-cells = <0x01>; | |
| clock-names = "core\0iface"; | |
| - clocks = <0x0c 0x25 0x0c 0x26>; | |
| + clocks = <0x0a 0x25 0x0a 0x26>; | |
| compatible = "qcom,adm"; | |
| interrupts = <0x00 0xaa 0x04>; | |
| - phandle = <0x11>; | |
| + phandle = <0x1c>; | |
| qcom,ee = <0x00>; | |
| reg = <0x18300000 0x100000>; | |
| reset-names = "clk\0pbus\0c0\0c1\0c2"; | |
| - resets = <0x0c 0x0d 0x0c 0x0c 0x0c 0x0b 0x0c 0x0a 0x0c 0x09>; | |
| + resets = <0x0a 0x0d 0x0a 0x0c 0x0a 0x0b 0x0a 0x0a 0x0a 0x09>; | |
| status = "disabled"; | |
| }; | |
| ethernet@37000000 { | |
| clock-names = "stmmaceth"; | |
| - clocks = <0x0c 0x111>; | |
| + clocks = <0x0a 0x111>; | |
| compatible = "qcom,ipq806x-gmac\0snps,dwmac"; | |
| device_type = "network"; | |
| interrupt-names = "macirq"; | |
| interrupts = <0x00 0xdc 0x04>; | |
| - qcom,nss-common = <0x1c>; | |
| - qcom,qsgmii-csr = <0x1d>; | |
| + qcom,nss-common = <0x23>; | |
| + qcom,qsgmii-csr = <0x24>; | |
| reg = <0x37000000 0x200000>; | |
| reset-names = "stmmaceth\0ahb"; | |
| - resets = <0x0c 0x7b 0x0c 0x7f>; | |
| + resets = <0x0a 0x7b 0x0a 0x7f>; | |
| snps,aal; | |
| - snps,axi-config = <0x1b>; | |
| + snps,axi-config = <0x22>; | |
| snps,pbl = <0x20>; | |
| status = "disabled"; | |
| }; | |
| ethernet@37200000 { | |
| clock-names = "stmmaceth"; | |
| - clocks = <0x0c 0x112>; | |
| + clocks = <0x0a 0x112>; | |
| compatible = "qcom,ipq806x-gmac\0snps,dwmac"; | |
| device_type = "network"; | |
| interrupt-names = "macirq"; | |
| interrupts = <0x00 0xdf 0x04>; | |
| - qcom,nss-common = <0x1c>; | |
| - qcom,qsgmii-csr = <0x1d>; | |
| + qcom,nss-common = <0x23>; | |
| + qcom,qsgmii-csr = <0x24>; | |
| reg = <0x37200000 0x200000>; | |
| reset-names = "stmmaceth\0ahb"; | |
| - resets = <0x0c 0x7c 0x0c 0x7f>; | |
| + resets = <0x0a 0x7c 0x0a 0x7f>; | |
| snps,aal; | |
| - snps,axi-config = <0x1b>; | |
| + snps,axi-config = <0x22>; | |
| snps,pbl = <0x20>; | |
| status = "disabled"; | |
| }; | |
| ethernet@37400000 { | |
| clock-names = "stmmaceth"; | |
| - clocks = <0x0c 0x113>; | |
| + clocks = <0x0a 0x113>; | |
| compatible = "qcom,ipq806x-gmac\0snps,dwmac"; | |
| device_type = "network"; | |
| interrupt-names = "macirq"; | |
| interrupts = <0x00 0xe2 0x04>; | |
| - qcom,nss-common = <0x1c>; | |
| - qcom,qsgmii-csr = <0x1d>; | |
| + qcom,nss-common = <0x23>; | |
| + qcom,qsgmii-csr = <0x24>; | |
| reg = <0x37400000 0x200000>; | |
| reset-names = "stmmaceth\0ahb"; | |
| - resets = <0x0c 0x7d 0x0c 0x7f>; | |
| + resets = <0x0a 0x7d 0x0a 0x7f>; | |
| snps,aal; | |
| - snps,axi-config = <0x1b>; | |
| + snps,axi-config = <0x22>; | |
| snps,pbl = <0x20>; | |
| status = "disabled"; | |
| }; | |
| ethernet@37600000 { | |
| clock-names = "stmmaceth"; | |
| - clocks = <0x0c 0x114>; | |
| + clocks = <0x0a 0x114>; | |
| compatible = "qcom,ipq806x-gmac\0snps,dwmac"; | |
| device_type = "network"; | |
| interrupt-names = "macirq"; | |
| interrupts = <0x00 0xe5 0x04>; | |
| - qcom,nss-common = <0x1c>; | |
| - qcom,qsgmii-csr = <0x1d>; | |
| + qcom,nss-common = <0x23>; | |
| + qcom,qsgmii-csr = <0x24>; | |
| reg = <0x37600000 0x200000>; | |
| reset-names = "stmmaceth\0ahb"; | |
| - resets = <0x0c 0x7e 0x0c 0x7f>; | |
| + resets = <0x0a 0x7e 0x0a 0x7f>; | |
| snps,aal; | |
| - snps,axi-config = <0x1b>; | |
| + snps,axi-config = <0x22>; | |
| snps,pbl = <0x20>; | |
| status = "disabled"; | |
| }; | |
| @@ -324,7 +324,7 @@ | |
| button-1 { | |
| debounce-interval = <0x3c>; | |
| - gpios = <0x0a 0x36 0x01>; | |
| + gpios = <0x0b 0x36 0x01>; | |
| label = "reset"; | |
| linux,code = <0x198>; | |
| linux,input-type = <0x01>; | |
| @@ -332,7 +332,7 @@ | |
| button-2 { | |
| debounce-interval = <0x3c>; | |
| - gpios = <0x0a 0x41 0x01>; | |
| + gpios = <0x0b 0x41 0x01>; | |
| label = "wps"; | |
| linux,code = <0x211>; | |
| linux,input-type = <0x01>; | |
| @@ -344,18 +344,18 @@ | |
| #size-cells = <0x01>; | |
| cell-index = <0x01>; | |
| clock-names = "iface"; | |
| - clocks = <0x0c 0x7f>; | |
| + clocks = <0x0a 0x7f>; | |
| compatible = "qcom,gsbi-v1.0.0"; | |
| ranges; | |
| reg = <0x12440000 0x100>; | |
| status = "disabled"; | |
| - syscon-tcsr = <0x0d>; | |
| + syscon-tcsr = <0x18>; | |
| i2c@12460000 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| clock-names = "core\0iface"; | |
| - clocks = <0x0c 0x87 0x0c 0x7f>; | |
| + clocks = <0x0a 0x87 0x0a 0x7f>; | |
| compatible = "qcom,i2c-qup-v1.1.1"; | |
| interrupts = <0x00 0xc2 0x04>; | |
| reg = <0x12460000 0x1000>; | |
| @@ -364,7 +364,7 @@ | |
| serial@12450000 { | |
| clock-names = "core\0iface"; | |
| - clocks = <0x0c 0x95 0x0c 0x7f>; | |
| + clocks = <0x0a 0x95 0x0a 0x7f>; | |
| compatible = "qcom,msm-uartdm-v1.3\0qcom,msm-uartdm"; | |
| interrupts = <0x00 0xc1 0x04>; | |
| reg = <0x12450000 0x100 0x12400000 0x03>; | |
| @@ -377,18 +377,18 @@ | |
| #size-cells = <0x01>; | |
| cell-index = <0x02>; | |
| clock-names = "iface"; | |
| - clocks = <0x0c 0x80>; | |
| + clocks = <0x0a 0x80>; | |
| compatible = "qcom,gsbi-v1.0.0"; | |
| ranges; | |
| reg = <0x12480000 0x100>; | |
| status = "disabled"; | |
| - syscon-tcsr = <0x0d>; | |
| + syscon-tcsr = <0x18>; | |
| i2c@124a0000 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| clock-names = "core\0iface"; | |
| - clocks = <0x0c 0x89 0x0c 0x80>; | |
| + clocks = <0x0a 0x89 0x0a 0x80>; | |
| compatible = "qcom,i2c-qup-v1.1.1"; | |
| interrupts = <0x00 0xc4 0x04>; | |
| reg = <0x124a0000 0x1000>; | |
| @@ -397,7 +397,7 @@ | |
| serial@12490000 { | |
| clock-names = "core\0iface"; | |
| - clocks = <0x0c 0x97 0x0c 0x80>; | |
| + clocks = <0x0a 0x97 0x0a 0x80>; | |
| compatible = "qcom,msm-uartdm-v1.3\0qcom,msm-uartdm"; | |
| interrupts = <0x00 0xc3 0x04>; | |
| reg = <0x12490000 0x1000 0x12480000 0x1000>; | |
| @@ -410,23 +410,23 @@ | |
| #size-cells = <0x01>; | |
| cell-index = <0x04>; | |
| clock-names = "iface"; | |
| - clocks = <0x0c 0x82>; | |
| + clocks = <0x0a 0x82>; | |
| compatible = "qcom,gsbi-v1.0.0"; | |
| qcom,mode = <0x06>; | |
| ranges; | |
| reg = <0x16300000 0x100>; | |
| status = "okay"; | |
| - syscon-tcsr = <0x0d>; | |
| + syscon-tcsr = <0x18>; | |
| i2c@16380000 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| clock-frequency = <0x30d40>; | |
| clock-names = "core\0iface"; | |
| - clocks = <0x0c 0x8d 0x0c 0x82>; | |
| + clocks = <0x0a 0x8d 0x0a 0x82>; | |
| compatible = "qcom,i2c-qup-v1.1.1"; | |
| interrupts = <0x00 0x99 0x04>; | |
| - pinctrl-0 = <0x0e>; | |
| + pinctrl-0 = <0x19>; | |
| pinctrl-names = "default"; | |
| reg = <0x16380000 0x1000>; | |
| status = "okay"; | |
| @@ -434,7 +434,7 @@ | |
| serial@16340000 { | |
| clock-names = "core\0iface"; | |
| - clocks = <0x0c 0x9b 0x0c 0x82>; | |
| + clocks = <0x0a 0x9b 0x0a 0x82>; | |
| compatible = "qcom,msm-uartdm-v1.3\0qcom,msm-uartdm"; | |
| interrupts = <0x00 0x98 0x04>; | |
| reg = <0x16340000 0x1000 0x16300000 0x1000>; | |
| @@ -447,18 +447,18 @@ | |
| #size-cells = <0x01>; | |
| cell-index = <0x06>; | |
| clock-names = "iface"; | |
| - clocks = <0x0c 0x84>; | |
| + clocks = <0x0a 0x84>; | |
| compatible = "qcom,gsbi-v1.0.0"; | |
| ranges; | |
| reg = <0x16500000 0x100>; | |
| status = "disabled"; | |
| - syscon-tcsr = <0x0d>; | |
| + syscon-tcsr = <0x18>; | |
| i2c@16580000 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| clock-names = "core\0iface"; | |
| - clocks = <0x0c 0x91 0x0c 0x84>; | |
| + clocks = <0x0a 0x91 0x0a 0x84>; | |
| compatible = "qcom,i2c-qup-v1.1.1"; | |
| interrupts = <0x00 0x9d 0x04>; | |
| reg = <0x16580000 0x1000>; | |
| @@ -469,7 +469,7 @@ | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| clock-names = "core\0iface"; | |
| - clocks = <0x0c 0x91 0x0c 0x84>; | |
| + clocks = <0x0a 0x91 0x0a 0x84>; | |
| compatible = "qcom,spi-qup-v1.1.1"; | |
| interrupts = <0x00 0x9d 0x04>; | |
| reg = <0x16580000 0x1000>; | |
| @@ -482,18 +482,18 @@ | |
| #size-cells = <0x01>; | |
| cell-index = <0x07>; | |
| clock-names = "iface"; | |
| - clocks = <0x0c 0x85>; | |
| + clocks = <0x0a 0x85>; | |
| compatible = "qcom,gsbi-v1.0.0"; | |
| ranges; | |
| reg = <0x16600000 0x100>; | |
| status = "disabled"; | |
| - syscon-tcsr = <0x0d>; | |
| + syscon-tcsr = <0x18>; | |
| i2c@16680000 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| clock-names = "core\0iface"; | |
| - clocks = <0x0c 0x93 0x0c 0x85>; | |
| + clocks = <0x0a 0x93 0x0a 0x85>; | |
| compatible = "qcom,i2c-qup-v1.1.1"; | |
| interrupts = <0x00 0x9f 0x04>; | |
| reg = <0x16680000 0x1000>; | |
| @@ -502,7 +502,7 @@ | |
| serial@16640000 { | |
| clock-names = "core\0iface"; | |
| - clocks = <0x0c 0xa1 0x0c 0x85>; | |
| + clocks = <0x0a 0xa1 0x0a 0x85>; | |
| compatible = "qcom,msm-uartdm-v1.3\0qcom,msm-uartdm"; | |
| interrupts = <0x00 0x9e 0x04>; | |
| reg = <0x16640000 0x1000 0x16600000 0x1000>; | |
| @@ -515,19 +515,19 @@ | |
| #size-cells = <0x01>; | |
| cell-index = <0x05>; | |
| clock-names = "iface"; | |
| - clocks = <0x0c 0x83>; | |
| + clocks = <0x0a 0x83>; | |
| compatible = "qcom,gsbi-v1.0.0"; | |
| qcom,mode = <0x03>; | |
| ranges; | |
| reg = <0x1a200000 0x100>; | |
| status = "okay"; | |
| - syscon-tcsr = <0x0d>; | |
| + syscon-tcsr = <0x18>; | |
| i2c@1a280000 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| clock-names = "core\0iface"; | |
| - clocks = <0x0c 0x8f 0x0c 0x83>; | |
| + clocks = <0x0a 0x8f 0x0a 0x83>; | |
| compatible = "qcom,i2c-qup-v1.1.1"; | |
| interrupts = <0x00 0x9b 0x04>; | |
| reg = <0x1a280000 0x1000>; | |
| @@ -536,7 +536,7 @@ | |
| serial@1a240000 { | |
| clock-names = "core\0iface"; | |
| - clocks = <0x0c 0x9d 0x0c 0x83>; | |
| + clocks = <0x0a 0x9d 0x0a 0x83>; | |
| compatible = "qcom,msm-uartdm-v1.3\0qcom,msm-uartdm"; | |
| interrupts = <0x00 0x9a 0x04>; | |
| reg = <0x1a240000 0x1000 0x1a200000 0x1000>; | |
| @@ -547,11 +547,11 @@ | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| clock-names = "core\0iface"; | |
| - clocks = <0x0c 0x8f 0x0c 0x83>; | |
| + clocks = <0x0a 0x8f 0x0a 0x83>; | |
| compatible = "qcom,spi-qup-v1.1.1"; | |
| - cs-gpios = <0x0a 0x14 0x00>; | |
| + cs-gpios = <0x0b 0x14 0x00>; | |
| interrupts = <0x00 0x9b 0x04>; | |
| - pinctrl-0 = <0x0f>; | |
| + pinctrl-0 = <0x1a>; | |
| pinctrl-names = "default"; | |
| reg = <0x1a280000 0x1000>; | |
| spi-max-frequency = <0x2faf080>; | |
| @@ -599,27 +599,27 @@ | |
| led@26 { | |
| default-state = "off"; | |
| - gpios = <0x0a 0x1a 0x00>; | |
| + gpios = <0x0b 0x1a 0x00>; | |
| label = "sata_led"; | |
| }; | |
| led@53 { | |
| default-state = "off"; | |
| function = "status"; | |
| - gpios = <0x0a 0x35 0x00>; | |
| + gpios = <0x0b 0x35 0x00>; | |
| label = "status_led_pass"; | |
| }; | |
| led@7 { | |
| default-state = "off"; | |
| - gpios = <0x0a 0x07 0x00>; | |
| + gpios = <0x0b 0x07 0x00>; | |
| label = "led_usb1"; | |
| linux,default-trigger = "usbdev"; | |
| }; | |
| led@8 { | |
| default-state = "off"; | |
| - gpios = <0x0a 0x08 0x00>; | |
| + gpios = <0x0b 0x08 0x00>; | |
| label = "led_usb3"; | |
| linux,default-trigger = "usbdev"; | |
| }; | |
| @@ -627,14 +627,14 @@ | |
| led@9 { | |
| default-state = "off"; | |
| function = "status"; | |
| - gpios = <0x0a 0x09 0x00>; | |
| + gpios = <0x0b 0x09 0x00>; | |
| label = "status_led_fail"; | |
| }; | |
| }; | |
| lpass@28100000 { | |
| clock-names = "ahbix-clk\0mi2s-osr-clk\0mi2s-bit-clk"; | |
| - clocks = <0x09 0x0b 0x09 0x02 0x09 0x05>; | |
| + clocks = <0x20 0x0b 0x20 0x02 0x20 0x05>; | |
| compatible = "qcom,lpass-cpu"; | |
| interrupt-names = "lpass-irq-lpaif"; | |
| interrupts = <0x00 0x55 0x01>; | |
| @@ -647,11 +647,11 @@ | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| clock-names = "core\0aon"; | |
| - clocks = <0x0c 0x105 0x0c 0x119>; | |
| + clocks = <0x0a 0x105 0x0a 0x119>; | |
| compatible = "qcom,ipq806x-nand"; | |
| dma-names = "rxtx"; | |
| - dmas = <0x11 0x03>; | |
| - pinctrl-0 = <0x10>; | |
| + dmas = <0x1c 0x03>; | |
| + pinctrl-0 = <0x1b>; | |
| pinctrl-names = "default"; | |
| qcom,cmd-crci = <0x0f>; | |
| qcom,data-crci = <0x03>; | |
| @@ -664,10 +664,10 @@ | |
| #interrupt-cells = <0x01>; | |
| #size-cells = <0x02>; | |
| assigned-clock-rates = <0x5f5e100>; | |
| - assigned-clocks = <0x0c 0xf8>; | |
| + assigned-clocks = <0x0a 0xf8>; | |
| bus-range = <0x00 0xff>; | |
| clock-names = "core\0iface\0phy\0aux\0ref"; | |
| - clocks = <0x0c 0x29 0x0c 0x2b 0x0c 0x2c 0x0c 0x2a 0x0c 0xf8>; | |
| + clocks = <0x0a 0x29 0x0a 0x2b 0x0a 0x2c 0x0a 0x2a 0x0a 0xf8>; | |
| compatible = "qcom,pcie-ipq8064"; | |
| device_type = "pci"; | |
| interrupt-map = <0x00 0x00 0x00 0x01 0x01 0x00 0x24 0x04 0x00 0x00 0x00 0x02 0x01 0x00 0x25 0x04 0x00 0x00 0x00 0x03 0x01 0x00 0x26 0x04 0x00 0x00 0x00 0x04 0x01 0x00 0x27 0x04>; | |
| @@ -676,14 +676,14 @@ | |
| interrupts = <0x00 0x23 0x04>; | |
| linux,pci-domain = <0x00>; | |
| num-lanes = <0x01>; | |
| - perst-gpio = <0x0a 0x03 0x01>; | |
| - pinctrl-0 = <0x18>; | |
| + perst-gpio = <0x0b 0x03 0x01>; | |
| + pinctrl-0 = <0x1d>; | |
| pinctrl-names = "default"; | |
| ranges = <0x81000000 0x00 0xfe00000 0xfe00000 0x00 0x10000 0x82000000 0x00 0x8000000 0x8000000 0x00 0x7e00000>; | |
| reg = <0x1b500000 0x1000 0x1b502000 0x80 0x1b600000 0x100 0xff00000 0x100000>; | |
| reg-names = "dbi\0elbi\0parf\0config"; | |
| reset-names = "axi\0ahb\0por\0pci\0phy\0ext"; | |
| - resets = <0x0c 0x1b 0x0c 0x1a 0x0c 0x19 0x0c 0x18 0x0c 0x17 0x0c 0x16>; | |
| + resets = <0x0a 0x1b 0x0a 0x1a 0x0a 0x19 0x0a 0x18 0x0a 0x17 0x0a 0x16>; | |
| status = "disabled"; | |
| }; | |
| @@ -692,10 +692,10 @@ | |
| #interrupt-cells = <0x01>; | |
| #size-cells = <0x02>; | |
| assigned-clock-rates = <0x5f5e100>; | |
| - assigned-clocks = <0x0c 0xfe>; | |
| + assigned-clocks = <0x0a 0xfe>; | |
| bus-range = <0x00 0xff>; | |
| clock-names = "core\0iface\0phy\0aux\0ref"; | |
| - clocks = <0x0c 0xf9 0x0c 0xfb 0x0c 0xfc 0x0c 0xfa 0x0c 0xfe>; | |
| + clocks = <0x0a 0xf9 0x0a 0xfb 0x0a 0xfc 0x0a 0xfa 0x0a 0xfe>; | |
| compatible = "qcom,pcie-ipq8064"; | |
| device_type = "pci"; | |
| interrupt-map = <0x00 0x00 0x00 0x01 0x01 0x00 0x3a 0x04 0x00 0x00 0x00 0x02 0x01 0x00 0x3b 0x04 0x00 0x00 0x00 0x03 0x01 0x00 0x3c 0x04 0x00 0x00 0x00 0x04 0x01 0x00 0x3d 0x04>; | |
| @@ -704,14 +704,14 @@ | |
| interrupts = <0x00 0x39 0x04>; | |
| linux,pci-domain = <0x01>; | |
| num-lanes = <0x01>; | |
| - perst-gpio = <0x0a 0x30 0x01>; | |
| - pinctrl-0 = <0x19>; | |
| + perst-gpio = <0x0b 0x30 0x01>; | |
| + pinctrl-0 = <0x1e>; | |
| pinctrl-names = "default"; | |
| ranges = <0x81000000 0x00 0x31e00000 0x31e00000 0x00 0x10000 0x82000000 0x00 0x2e000000 0x2e000000 0x00 0x3e00000>; | |
| reg = <0x1b700000 0x1000 0x1b702000 0x80 0x1b800000 0x100 0x31f00000 0x100000>; | |
| reg-names = "dbi\0elbi\0parf\0config"; | |
| reset-names = "axi\0ahb\0por\0pci\0phy\0ext"; | |
| - resets = <0x0c 0x5b 0x0c 0x5a 0x0c 0x59 0x0c 0x58 0x0c 0x57 0x0c 0x56>; | |
| + resets = <0x0a 0x5b 0x0a 0x5a 0x0a 0x59 0x0a 0x58 0x0a 0x57 0x0a 0x56>; | |
| status = "disabled"; | |
| }; | |
| @@ -720,10 +720,10 @@ | |
| #interrupt-cells = <0x01>; | |
| #size-cells = <0x02>; | |
| assigned-clock-rates = <0x5f5e100>; | |
| - assigned-clocks = <0x0c 0x104>; | |
| + assigned-clocks = <0x0a 0x104>; | |
| bus-range = <0x00 0xff>; | |
| clock-names = "core\0iface\0phy\0aux\0ref"; | |
| - clocks = <0x0c 0xff 0x0c 0x101 0x0c 0x102 0x0c 0x100 0x0c 0x104>; | |
| + clocks = <0x0a 0xff 0x0a 0x101 0x0a 0x102 0x0a 0x100 0x0a 0x104>; | |
| compatible = "qcom,pcie-ipq8064"; | |
| device_type = "pci"; | |
| interrupt-map = <0x00 0x00 0x00 0x01 0x01 0x00 0x48 0x04 0x00 0x00 0x00 0x02 0x01 0x00 0x49 0x04 0x00 0x00 0x00 0x03 0x01 0x00 0x4a 0x04 0x00 0x00 0x00 0x04 0x01 0x00 0x4b 0x04>; | |
| @@ -732,23 +732,23 @@ | |
| interrupts = <0x00 0x47 0x04>; | |
| linux,pci-domain = <0x02>; | |
| num-lanes = <0x01>; | |
| - perst-gpio = <0x0a 0x3f 0x01>; | |
| - pinctrl-0 = <0x1a>; | |
| + perst-gpio = <0x0b 0x3f 0x01>; | |
| + pinctrl-0 = <0x1f>; | |
| pinctrl-names = "default"; | |
| ranges = <0x81000000 0x00 0x35e00000 0x35e00000 0x00 0x10000 0x82000000 0x00 0x32000000 0x32000000 0x00 0x3e00000>; | |
| reg = <0x1b900000 0x1000 0x1b902000 0x80 0x1ba00000 0x100 0x35f00000 0x100000>; | |
| reg-names = "dbi\0elbi\0parf\0config"; | |
| reset-names = "axi\0ahb\0por\0pci\0phy\0ext"; | |
| - resets = <0x0c 0x63 0x0c 0x62 0x0c 0x61 0x0c 0x60 0x0c 0x5f 0x0c 0x5e>; | |
| + resets = <0x0a 0x63 0x0a 0x62 0x0a 0x61 0x0a 0x60 0x0a 0x5f 0x0a 0x5e>; | |
| status = "disabled"; | |
| }; | |
| phy@100f8800 { | |
| #phy-cells = <0x00>; | |
| clock-names = "ref"; | |
| - clocks = <0x0c 0x108>; | |
| + clocks = <0x0a 0x108>; | |
| compatible = "qcom,ipq806x-usb-phy-hs"; | |
| - phandle = <0x1e>; | |
| + phandle = <0x11>; | |
| reg = <0x100f8800 0x30>; | |
| status = "disabled"; | |
| }; | |
| @@ -756,9 +756,9 @@ | |
| phy@100f8830 { | |
| #phy-cells = <0x00>; | |
| clock-names = "ref"; | |
| - clocks = <0x0c 0x10b>; | |
| + clocks = <0x0a 0x10b>; | |
| compatible = "qcom,ipq806x-usb-phy-ss"; | |
| - phandle = <0x1f>; | |
| + phandle = <0x12>; | |
| reg = <0x100f8830 0x30>; | |
| status = "disabled"; | |
| }; | |
| @@ -766,9 +766,9 @@ | |
| phy@110f8800 { | |
| #phy-cells = <0x00>; | |
| clock-names = "ref"; | |
| - clocks = <0x0c 0x109>; | |
| + clocks = <0x0a 0x109>; | |
| compatible = "qcom,ipq806x-usb-phy-hs"; | |
| - phandle = <0x20>; | |
| + phandle = <0x13>; | |
| reg = <0x110f8800 0x30>; | |
| status = "disabled"; | |
| }; | |
| @@ -776,9 +776,9 @@ | |
| phy@110f8830 { | |
| #phy-cells = <0x00>; | |
| clock-names = "ref"; | |
| - clocks = <0x0c 0x10c>; | |
| + clocks = <0x0a 0x10c>; | |
| compatible = "qcom,ipq806x-usb-phy-ss"; | |
| - phandle = <0x21>; | |
| + phandle = <0x14>; | |
| reg = <0x110f8830 0x30>; | |
| status = "disabled"; | |
| }; | |
| @@ -788,10 +788,10 @@ | |
| #interrupt-cells = <0x02>; | |
| compatible = "qcom,ipq8064-pinctrl"; | |
| gpio-controller; | |
| - gpio-ranges = <0x0a 0x00 0x00 0x45>; | |
| + gpio-ranges = <0x0b 0x00 0x00 0x45>; | |
| interrupt-controller; | |
| interrupts = <0x00 0x10 0x04>; | |
| - phandle = <0x0a>; | |
| + phandle = <0x0b>; | |
| reg = <0x800000 0x4000>; | |
| buttons_pins { | |
| @@ -808,7 +808,7 @@ | |
| bias-disable; | |
| drive-strength = <0x0c>; | |
| function = "gsbi4"; | |
| - phandle = <0x0e>; | |
| + phandle = <0x19>; | |
| pins = "gpio12\0gpio13"; | |
| }; | |
| @@ -835,7 +835,7 @@ | |
| }; | |
| nand_pins { | |
| - phandle = <0x10>; | |
| + phandle = <0x1b>; | |
| hold { | |
| bias-bus-hold; | |
| @@ -860,7 +860,7 @@ | |
| }; | |
| pcie0_pinmux { | |
| - phandle = <0x18>; | |
| + phandle = <0x1d>; | |
| mux { | |
| bias-disable; | |
| @@ -871,7 +871,7 @@ | |
| }; | |
| pcie1_pinmux { | |
| - phandle = <0x19>; | |
| + phandle = <0x1e>; | |
| mux { | |
| bias-disable; | |
| @@ -882,7 +882,7 @@ | |
| }; | |
| pcie2_pinmux { | |
| - phandle = <0x1a>; | |
| + phandle = <0x1f>; | |
| mux { | |
| bias-disable; | |
| @@ -903,7 +903,7 @@ | |
| }; | |
| spi_pins { | |
| - phandle = <0x0f>; | |
| + phandle = <0x1a>; | |
| mux { | |
| bias-none; | |
| @@ -927,12 +927,12 @@ | |
| reg = <0x700000 0x1000>; | |
| calib@400 { | |
| - phandle = <0x15>; | |
| + phandle = <0x0e>; | |
| reg = <0x400 0x0b>; | |
| }; | |
| calib_backup@410 { | |
| - phandle = <0x16>; | |
| + phandle = <0x0f>; | |
| reg = <0x410 0x0b>; | |
| }; | |
| @@ -957,18 +957,18 @@ | |
| rng@1a500000 { | |
| clock-names = "core"; | |
| - clocks = <0x0c 0xd2>; | |
| + clocks = <0x0a 0xd2>; | |
| compatible = "qcom,prng"; | |
| reg = <0x1a500000 0x200>; | |
| }; | |
| rpm@108000 { | |
| clock-names = "ram"; | |
| - clocks = <0x0c 0x5d>; | |
| + clocks = <0x0a 0x5d>; | |
| compatible = "qcom,rpm-ipq8064"; | |
| interrupt-names = "ack\0err\0wakeup"; | |
| interrupts = <0x00 0x13 0x04 0x00 0x15 0x04 0x00 0x16 0x04>; | |
| - qcom,ipc = <0x17 0x08 0x02>; | |
| + qcom,ipc = <0x09 0x08 0x02>; | |
| reg = <0x108000 0x1000>; | |
| clock-controller { | |
| @@ -980,29 +980,29 @@ | |
| sata-phy@1b400000 { | |
| #phy-cells = <0x00>; | |
| clock-names = "cfg"; | |
| - clocks = <0x0c 0xbb>; | |
| + clocks = <0x0a 0xbb>; | |
| compatible = "qcom,ipq806x-sata-phy"; | |
| - phandle = <0x12>; | |
| + phandle = <0x21>; | |
| reg = <0x1b400000 0x200>; | |
| status = "okay"; | |
| }; | |
| sata@29000000 { | |
| assigned-clock-rates = <0x5f5e100 0x5f5e100>; | |
| - assigned-clocks = <0x0c 0xb7 0x0c 0xb8>; | |
| + assigned-clocks = <0x0a 0xb7 0x0a 0xb8>; | |
| clock-names = "slave_face\0iface\0core\0rxoob\0pmalive"; | |
| - clocks = <0x0c 0x32 0x0c 0xb5 0x0c 0xba 0x0c 0xb7 0x0c 0xb8>; | |
| + clocks = <0x0a 0x32 0x0a 0xb5 0x0a 0xba 0x0a 0xb7 0x0a 0xb8>; | |
| compatible = "qcom,ipq806x-ahci\0generic-ahci"; | |
| interrupts = <0x00 0xd1 0x04>; | |
| phy-names = "sata-phy"; | |
| - phys = <0x12>; | |
| + phys = <0x21>; | |
| ports-implemented = <0x01>; | |
| reg = <0x29000000 0x180>; | |
| status = "okay"; | |
| }; | |
| stmmac-axi-config { | |
| - phandle = <0x1b>; | |
| + phandle = <0x22>; | |
| snps,blen = <0x10 0x00 0x00 0x00 0x00 0x00 0x00>; | |
| snps,rd_osr_lmt = <0x07>; | |
| snps,wr_osr_lmt = <0x07>; | |
| @@ -1010,26 +1010,26 @@ | |
| syscon@03000000 { | |
| compatible = "syscon"; | |
| - phandle = <0x1c>; | |
| + phandle = <0x23>; | |
| reg = <0x3000000 0xffff>; | |
| }; | |
| syscon@1a400000 { | |
| compatible = "qcom,tcsr-ipq8064\0syscon"; | |
| - phandle = <0x0d>; | |
| + phandle = <0x18>; | |
| reg = <0x1a400000 0x100>; | |
| }; | |
| syscon@1bb00000 { | |
| compatible = "syscon"; | |
| - phandle = <0x1d>; | |
| + phandle = <0x24>; | |
| reg = <0x1bb00000 0x1ff>; | |
| }; | |
| timer@200a000 { | |
| clock-frequency = <0x17d7840 0x8000>; | |
| clock-names = "sleep"; | |
| - clocks = <0x0b>; | |
| + clocks = <0x10>; | |
| compatible = "qcom,kpss-timer\0qcom,kpss-wdt-ipq8064\0qcom,msm-timer"; | |
| cpu-offset = <0x80000>; | |
| interrupts = <0x01 0x01 0x301 0x01 0x02 0x301 0x01 0x03 0x301 0x01 0x04 0x301 0x01 0x05 0x301>; | |
| @@ -1040,12 +1040,12 @@ | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| clock-names = "core"; | |
| - clocks = <0x0c 0x10b>; | |
| + clocks = <0x0a 0x10b>; | |
| compatible = "qcom,ipq8064-dwc3\0qcom,dwc3"; | |
| ranges; | |
| reg = <0x100f8800 0x8000>; | |
| reset-names = "master"; | |
| - resets = <0x0c 0x67>; | |
| + resets = <0x0a 0x67>; | |
| status = "disabled"; | |
| dwc3@10000000 { | |
| @@ -1053,7 +1053,7 @@ | |
| dr_mode = "host"; | |
| interrupts = <0x00 0xcd 0x04>; | |
| phy-names = "usb2-phy\0usb3-phy"; | |
| - phys = <0x1e 0x1f>; | |
| + phys = <0x11 0x12>; | |
| reg = <0x10000000 0xcd00>; | |
| snps,dis_u3_susphy_quirk; | |
| }; | |
| @@ -1063,12 +1063,12 @@ | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| clock-names = "core"; | |
| - clocks = <0x0c 0x10c>; | |
| + clocks = <0x0a 0x10c>; | |
| compatible = "qcom,ipq8064-dwc3\0qcom,dwc3"; | |
| ranges; | |
| reg = <0x110f8800 0x8000>; | |
| reset-names = "master"; | |
| - resets = <0x0c 0x6c>; | |
| + resets = <0x0a 0x6c>; | |
| status = "disabled"; | |
| dwc3@11000000 { | |
| @@ -1076,7 +1076,7 @@ | |
| dr_mode = "host"; | |
| interrupts = <0x00 0x6e 0x04>; | |
| phy-names = "usb2-phy\0usb3-phy"; | |
| - phys = <0x20 0x21>; | |
| + phys = <0x13 0x14>; | |
| reg = <0x11000000 0xcd00>; | |
| snps,dis_u3_susphy_quirk; | |
| }; | |
| @@ -1084,7 +1084,7 @@ | |
| vsdcc-regulator { | |
| compatible = "regulator-fixed"; | |
| - phandle = <0x22>; | |
| + phandle = <0x15>; | |
| regulator-always-on; | |
| regulator-max-microvolt = <0x325aa0>; | |
| regulator-min-microvolt = <0x325aa0>; |
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