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September 28, 2023 21:30
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Turing RK1 devicetree
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From d04cab81eec9a859237d1f28836276a4c67dd607 Mon Sep 17 00:00:00 2001 | |
From: Sam Edwards <CFSworks@gmail.com> | |
Date: Sun, 17 Sep 2023 22:16:07 -0600 | |
Subject: [PATCH] arm64: dts: rockchip: Add Turing RK1 SoM support | |
MIME-Version: 1.0 | |
Content-Type: text/plain; charset=UTF-8 | |
Content-Transfer-Encoding: 8bit | |
The Turing RK1 is an upcoming RK3588-based SoM from Turing Machines, | |
designed on the Jetson SO-DIMM form factor and meant to be compatible | |
with most Jetson carrier boards (but especially the Turing Pi 2 cluster | |
board from the same vendor). It has the typical I/O you'd expect from | |
a Jetson board, including: | |
- USB-OTG | |
- Two UARTs (one for console, one auxiliary) | |
- PCI Express (2.0 x1 + 3.0 x4) | |
- Gigabit Ethernet | |
- On-board eMMC | |
- PWM fan w/ tach | |
- HDMI and MIPI DSI [1] | |
- Miscellaneous GPIO, I²C, SPI lines [1] | |
Beyond that, it is pretty similar to the RK3588 EVB (in terms of PMICs, | |
etc). | |
This patch introduces a devicetree to enable most[1] of the SoM I/O, | |
and defines a cooling map to control the fan. | |
[1] These peripherals are not addressed with this patch. | |
Signed-off-by: Sam Edwards <CFSworks@gmail.com> | |
--- | |
arch/arm64/boot/dts/rockchip/Makefile | 1 + | |
.../boot/dts/rockchip/rk3588-turing-rk1.dts | 701 ++++++++++++++++++ | |
2 files changed, 702 insertions(+) | |
create mode 100644 arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dts | |
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile | |
index e7728007fd1b..bedca9f68b8d 100644 | |
--- a/arch/arm64/boot/dts/rockchip/Makefile | |
+++ b/arch/arm64/boot/dts/rockchip/Makefile | |
@@ -102,6 +102,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6b-io.dtb | |
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb1-v10.dtb | |
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-nanopc-t6.dtb | |
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b.dtb | |
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-turing-rk1.dtb | |
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-indiedroid-nova.dtb | |
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-khadas-edge2.dtb | |
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-rock-5a.dtb | |
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dts b/arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dts | |
new file mode 100644 | |
index 000000000000..06eec0b96c97 | |
--- /dev/null | |
+++ b/arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dts | |
@@ -0,0 +1,701 @@ | |
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) | |
+/* | |
+ * Copyright (c) 2023 Sam Edwards <CFSworks@gmail.com> | |
+ * | |
+ * Based on RK3588-EVB1 devicetree | |
+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd. | |
+ */ | |
+ | |
+/dts-v1/; | |
+ | |
+#include <dt-bindings/gpio/gpio.h> | |
+#include <dt-bindings/pinctrl/rockchip.h> | |
+#include "rk3588.dtsi" | |
+ | |
+/ { | |
+ model = "Turing Machines RK1"; | |
+ compatible = "turing,rk1", "rockchip,rk3588"; | |
+ | |
+ aliases { | |
+ ethernet0 = &gmac1; | |
+ mmc0 = &sdhci; | |
+ serial2 = &uart2; | |
+ serial9 = &uart9; | |
+ }; | |
+ | |
+ chosen { | |
+ stdout-path = "serial9:115200n8"; | |
+ }; | |
+ | |
+ fan: pwm-fan { | |
+ compatible = "pwm-fan"; | |
+ cooling-levels = <0 25 95 145 195 255>; | |
+ fan-supply = <&vcc5v0_sys>; | |
+ pinctrl-names = "default"; | |
+ pinctrl-0 = <&pwm0m2_pins &fan_int>; | |
+ interrupt-parent = <&gpio0>; | |
+ interrupts = <RK_PA4 IRQ_TYPE_EDGE_FALLING>; | |
+ pwms = <&pwm0 0 50000 0>; | |
+ #cooling-cells = <2>; | |
+ }; | |
+ | |
+ vcc3v3_pcie30: vcc3v3-pcie30-regulator { | |
+ compatible = "regulator-fixed"; | |
+ regulator-name = "vcc3v3_pcie30"; | |
+ regulator-min-microvolt = <3300000>; | |
+ regulator-max-microvolt = <3300000>; | |
+ enable-active-high; | |
+ gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>; | |
+ pinctrl-names = "default"; | |
+ pinctrl-0 = <&vcc3v3_pcie30_en>; | |
+ startup-delay-us = <5000>; | |
+ }; | |
+ | |
+ vcc5v0_sys: vcc5v0-sys-regulator { | |
+ compatible = "regulator-fixed"; | |
+ regulator-name = "vcc5v0_sys"; | |
+ regulator-always-on; | |
+ regulator-boot-on; | |
+ regulator-min-microvolt = <5000000>; | |
+ regulator-max-microvolt = <5000000>; | |
+ }; | |
+ | |
+ vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator { | |
+ compatible = "regulator-fixed"; | |
+ regulator-name = "vcc_1v1_nldo_s3"; | |
+ regulator-always-on; | |
+ regulator-boot-on; | |
+ regulator-min-microvolt = <1100000>; | |
+ regulator-max-microvolt = <1100000>; | |
+ vin-supply = <&vcc5v0_sys>; | |
+ }; | |
+}; | |
+ | |
+&combphy2_psu { | |
+ status = "okay"; | |
+}; | |
+ | |
+&cpu_b0 { | |
+ cpu-supply = <&vdd_cpu_big0_s0>; | |
+ mem-supply = <&vdd_cpu_big0_s0>; | |
+}; | |
+ | |
+&cpu_b1 { | |
+ cpu-supply = <&vdd_cpu_big0_s0>; | |
+ mem-supply = <&vdd_cpu_big0_s0>; | |
+}; | |
+ | |
+&cpu_b2 { | |
+ cpu-supply = <&vdd_cpu_big1_s0>; | |
+ mem-supply = <&vdd_cpu_big1_s0>; | |
+}; | |
+ | |
+&cpu_b3 { | |
+ cpu-supply = <&vdd_cpu_big1_s0>; | |
+ mem-supply = <&vdd_cpu_big1_s0>; | |
+}; | |
+ | |
+&cpu_l0 { | |
+ cpu-supply = <&vdd_cpu_lit_s0>; | |
+ mem-supply = <&vdd_cpu_lit_mem_s0>; | |
+}; | |
+ | |
+&cpu_l1 { | |
+ cpu-supply = <&vdd_cpu_lit_s0>; | |
+ mem-supply = <&vdd_cpu_lit_mem_s0>; | |
+}; | |
+ | |
+&cpu_l2 { | |
+ cpu-supply = <&vdd_cpu_lit_s0>; | |
+ mem-supply = <&vdd_cpu_lit_mem_s0>; | |
+}; | |
+ | |
+&cpu_l3 { | |
+ cpu-supply = <&vdd_cpu_lit_s0>; | |
+ mem-supply = <&vdd_cpu_lit_mem_s0>; | |
+}; | |
+ | |
+&gmac1 { | |
+ clock_in_out = "output"; | |
+ phy-handle = <&rgmii_phy>; | |
+ phy-mode = "rgmii-rxid"; | |
+ pinctrl-0 = <&gmac1_miim | |
+ &gmac1_tx_bus2 | |
+ &gmac1_rx_bus2 | |
+ &gmac1_rgmii_clk | |
+ &gmac1_rgmii_bus>; | |
+ pinctrl-names = "default"; | |
+ | |
+ rx_delay = <0x00>; | |
+ tx_delay = <0x43>; | |
+ status = "okay"; | |
+}; | |
+ | |
+&i2c0 { | |
+ pinctrl-names = "default"; | |
+ pinctrl-0 = <&i2c0m2_xfer>; | |
+ status = "okay"; | |
+ | |
+ vdd_cpu_big0_s0: regulator@42 { | |
+ compatible = "rockchip,rk8602"; | |
+ reg = <0x42>; | |
+ fcs,suspend-voltage-selector = <1>; | |
+ regulator-name = "vdd_cpu_big0_s0"; | |
+ regulator-always-on; | |
+ regulator-boot-on; | |
+ regulator-min-microvolt = <550000>; | |
+ regulator-max-microvolt = <1050000>; | |
+ regulator-ramp-delay = <2300>; | |
+ vin-supply = <&vcc5v0_sys>; | |
+ | |
+ regulator-state-mem { | |
+ regulator-off-in-suspend; | |
+ }; | |
+ }; | |
+ | |
+ vdd_cpu_big1_s0: regulator@43 { | |
+ compatible = "rockchip,rk8603", "rockchip,rk8602"; | |
+ reg = <0x43>; | |
+ fcs,suspend-voltage-selector = <1>; | |
+ regulator-name = "vdd_cpu_big1_s0"; | |
+ regulator-always-on; | |
+ regulator-boot-on; | |
+ regulator-min-microvolt = <550000>; | |
+ regulator-max-microvolt = <1050000>; | |
+ regulator-ramp-delay = <2300>; | |
+ vin-supply = <&vcc5v0_sys>; | |
+ | |
+ regulator-state-mem { | |
+ regulator-off-in-suspend; | |
+ }; | |
+ }; | |
+}; | |
+ | |
+&i2c1 { | |
+ pinctrl-names = "default"; | |
+ pinctrl-0 = <&i2c1m2_xfer>; | |
+ status = "okay"; | |
+ | |
+ vdd_npu_s0: regulator@42 { | |
+ compatible = "rockchip,rk8602"; | |
+ reg = <0x42>; | |
+ fcs,suspend-voltage-selector = <1>; | |
+ regulator-name = "vdd_npu_s0"; | |
+ regulator-always-on; | |
+ regulator-boot-on; | |
+ regulator-min-microvolt = <550000>; | |
+ regulator-max-microvolt = <950000>; | |
+ regulator-ramp-delay = <2300>; | |
+ vin-supply = <&vcc5v0_sys>; | |
+ | |
+ regulator-state-mem { | |
+ regulator-off-in-suspend; | |
+ }; | |
+ }; | |
+}; | |
+ | |
+&i2c6 { | |
+ status = "okay"; | |
+ | |
+ hym8563: rtc@51 { | |
+ compatible = "haoyu,hym8563"; | |
+ reg = <0x51>; | |
+ #clock-cells = <0>; | |
+ clock-output-names = "hym8563"; | |
+ pinctrl-names = "default"; | |
+ pinctrl-0 = <&hym8563_int>; | |
+ interrupt-parent = <&gpio0>; | |
+ interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>; | |
+ wakeup-source; | |
+ }; | |
+}; | |
+ | |
+&mdio1 { | |
+ rgmii_phy: ethernet-phy@1 { | |
+ /* RTL8211F */ | |
+ compatible = "ethernet-phy-id001c.c916", | |
+ "ethernet-phy-ieee802.3-c22"; | |
+ reg = <0x1>; | |
+ pinctrl-names = "default"; | |
+ pinctrl-0 = <&rtl8211f_rst>; | |
+ reset-assert-us = <15000>; | |
+ reset-deassert-us = <50000>; | |
+ reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; | |
+ }; | |
+}; | |
+ | |
+&pcie2x1l1 { | |
+ linux,pci-domain = <1>; | |
+ pinctrl-names = "default"; | |
+ pinctrl-0 = <&pcie2_reset>; | |
+ reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; | |
+ status = "okay"; | |
+}; | |
+ | |
+&pcie30phy { | |
+ status = "okay"; | |
+}; | |
+ | |
+&pcie3x4 { | |
+ linux,pci-domain = <0>; | |
+ pinctrl-names = "default"; | |
+ pinctrl-0 = <&pcie3_reset>; | |
+ reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; | |
+ vpcie3v3-supply = <&vcc3v3_pcie30>; | |
+ status = "okay"; | |
+}; | |
+ | |
+&pinctrl { | |
+ hym8563 { | |
+ hym8563_int: hym8563-int { | |
+ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; | |
+ }; | |
+ }; | |
+ | |
+ fan { | |
+ fan_int: fan-int { | |
+ rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; | |
+ }; | |
+ }; | |
+ | |
+ pcie2 { | |
+ pcie2_reset: pcie2-reset { | |
+ rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; | |
+ }; | |
+ }; | |
+ | |
+ pcie3 { | |
+ pcie3_reset: pcie3-reset { | |
+ rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; | |
+ }; | |
+ | |
+ vcc3v3_pcie30_en: pcie3-reg { | |
+ rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; | |
+ }; | |
+ }; | |
+ | |
+ rtl8211f { | |
+ rtl8211f_rst: rtl8211f-rst { | |
+ rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; | |
+ }; | |
+ }; | |
+}; | |
+ | |
+&pwm0 { | |
+ status = "okay"; | |
+}; | |
+ | |
+&sdhci { | |
+ bus-width = <8>; | |
+ no-sdio; | |
+ no-sd; | |
+ non-removable; | |
+ mmc-hs400-1_8v; | |
+ mmc-hs400-enhanced-strobe; | |
+ status = "okay"; | |
+}; | |
+ | |
+&soc_thermal { | |
+ trips { | |
+ soc_active1: trip-active1 { | |
+ temperature = <37500>; | |
+ hysteresis = <1000>; | |
+ type = "active"; | |
+ }; | |
+ soc_active2: trip-active2 { | |
+ temperature = <42500>; | |
+ hysteresis = <2000>; | |
+ type = "active"; | |
+ }; | |
+ soc_active3: trip-active3 { | |
+ temperature = <47500>; | |
+ hysteresis = <2000>; | |
+ type = "active"; | |
+ }; | |
+ soc_active4: trip-active4 { | |
+ temperature = <55000>; | |
+ hysteresis = <2000>; | |
+ type = "active"; | |
+ }; | |
+ soc_active5: trip-active5 { | |
+ temperature = <65000>; | |
+ hysteresis = <2000>; | |
+ type = "active"; | |
+ }; | |
+ }; | |
+ | |
+ cooling-maps { | |
+ map1 { | |
+ trip = <&soc_active1>; | |
+ cooling-device = <&fan 1 1>; | |
+ }; | |
+ map2 { | |
+ trip = <&soc_active2>; | |
+ cooling-device = <&fan 2 2>; | |
+ }; | |
+ map3 { | |
+ trip = <&soc_active3>; | |
+ cooling-device = <&fan 3 3>; | |
+ }; | |
+ map4 { | |
+ trip = <&soc_active4>; | |
+ cooling-device = <&fan 4 4>; | |
+ }; | |
+ map5 { | |
+ trip = <&soc_active5>; | |
+ cooling-device = <&fan 5 5>; | |
+ }; | |
+ }; | |
+}; | |
+ | |
+&spi2 { | |
+ status = "okay"; | |
+ pinctrl-names = "default"; | |
+ pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; | |
+ num-cs = <1>; | |
+ | |
+ pmic@0 { | |
+ compatible = "rockchip,rk806"; | |
+ spi-max-frequency = <1000000>; | |
+ reg = <0x0>; | |
+ | |
+ interrupt-parent = <&gpio0>; | |
+ interrupts = <7 IRQ_TYPE_LEVEL_LOW>; | |
+ | |
+ pinctrl-names = "default"; | |
+ pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, | |
+ <&rk806_dvs2_null>, <&rk806_dvs3_null>; | |
+ | |
+ vcc1-supply = <&vcc5v0_sys>; | |
+ vcc2-supply = <&vcc5v0_sys>; | |
+ vcc3-supply = <&vcc5v0_sys>; | |
+ vcc4-supply = <&vcc5v0_sys>; | |
+ vcc5-supply = <&vcc5v0_sys>; | |
+ vcc6-supply = <&vcc5v0_sys>; | |
+ vcc7-supply = <&vcc5v0_sys>; | |
+ vcc8-supply = <&vcc5v0_sys>; | |
+ vcc9-supply = <&vcc5v0_sys>; | |
+ vcc10-supply = <&vcc5v0_sys>; | |
+ vcc11-supply = <&vcc_2v0_pldo_s3>; | |
+ vcc12-supply = <&vcc5v0_sys>; | |
+ vcc13-supply = <&vcc_1v1_nldo_s3>; | |
+ vcc14-supply = <&vcc_1v1_nldo_s3>; | |
+ vcca-supply = <&vcc5v0_sys>; | |
+ | |
+ gpio-controller; | |
+ #gpio-cells = <2>; | |
+ | |
+ rk806_dvs1_null: dvs1-null-pins { | |
+ pins = "gpio_pwrctrl2"; | |
+ function = "pin_fun0"; | |
+ }; | |
+ | |
+ rk806_dvs2_null: dvs2-null-pins { | |
+ pins = "gpio_pwrctrl2"; | |
+ function = "pin_fun0"; | |
+ }; | |
+ | |
+ rk806_dvs3_null: dvs3-null-pins { | |
+ pins = "gpio_pwrctrl3"; | |
+ function = "pin_fun0"; | |
+ }; | |
+ | |
+ regulators { | |
+ vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { | |
+ regulator-boot-on; | |
+ regulator-min-microvolt = <550000>; | |
+ regulator-max-microvolt = <950000>; | |
+ regulator-ramp-delay = <12500>; | |
+ regulator-name = "vdd_gpu_s0"; | |
+ regulator-enable-ramp-delay = <400>; | |
+ | |
+ regulator-state-mem { | |
+ regulator-off-in-suspend; | |
+ }; | |
+ }; | |
+ | |
+ vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { | |
+ regulator-always-on; | |
+ regulator-boot-on; | |
+ regulator-min-microvolt = <550000>; | |
+ regulator-max-microvolt = <950000>; | |
+ regulator-ramp-delay = <12500>; | |
+ regulator-name = "vdd_cpu_lit_s0"; | |
+ | |
+ regulator-state-mem { | |
+ regulator-off-in-suspend; | |
+ }; | |
+ }; | |
+ | |
+ vdd_log_s0: dcdc-reg3 { | |
+ regulator-always-on; | |
+ regulator-boot-on; | |
+ regulator-min-microvolt = <675000>; | |
+ regulator-max-microvolt = <750000>; | |
+ regulator-ramp-delay = <12500>; | |
+ regulator-name = "vdd_log_s0"; | |
+ | |
+ regulator-state-mem { | |
+ regulator-off-in-suspend; | |
+ regulator-suspend-microvolt = <750000>; | |
+ }; | |
+ }; | |
+ | |
+ vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { | |
+ regulator-always-on; | |
+ regulator-boot-on; | |
+ regulator-min-microvolt = <550000>; | |
+ regulator-max-microvolt = <950000>; | |
+ regulator-ramp-delay = <12500>; | |
+ regulator-name = "vdd_vdenc_s0"; | |
+ | |
+ regulator-state-mem { | |
+ regulator-off-in-suspend; | |
+ }; | |
+ }; | |
+ | |
+ vdd_ddr_s0: dcdc-reg5 { | |
+ regulator-always-on; | |
+ regulator-boot-on; | |
+ regulator-min-microvolt = <675000>; | |
+ regulator-max-microvolt = <900000>; | |
+ regulator-ramp-delay = <12500>; | |
+ regulator-name = "vdd_ddr_s0"; | |
+ | |
+ regulator-state-mem { | |
+ regulator-off-in-suspend; | |
+ regulator-suspend-microvolt = <850000>; | |
+ }; | |
+ }; | |
+ | |
+ vdd2_ddr_s3: dcdc-reg6 { | |
+ regulator-always-on; | |
+ regulator-boot-on; | |
+ regulator-name = "vdd2_ddr_s3"; | |
+ | |
+ regulator-state-mem { | |
+ regulator-on-in-suspend; | |
+ }; | |
+ }; | |
+ | |
+ vcc_2v0_pldo_s3: dcdc-reg7 { | |
+ regulator-always-on; | |
+ regulator-boot-on; | |
+ regulator-min-microvolt = <2000000>; | |
+ regulator-max-microvolt = <2000000>; | |
+ regulator-ramp-delay = <12500>; | |
+ regulator-name = "vdd_2v0_pldo_s3"; | |
+ | |
+ regulator-state-mem { | |
+ regulator-on-in-suspend; | |
+ regulator-suspend-microvolt = <2000000>; | |
+ }; | |
+ }; | |
+ | |
+ vcc_3v3_s3: dcdc-reg8 { | |
+ regulator-always-on; | |
+ regulator-boot-on; | |
+ regulator-min-microvolt = <3300000>; | |
+ regulator-max-microvolt = <3300000>; | |
+ regulator-name = "vcc_3v3_s3"; | |
+ | |
+ regulator-state-mem { | |
+ regulator-on-in-suspend; | |
+ regulator-suspend-microvolt = <3300000>; | |
+ }; | |
+ }; | |
+ | |
+ vddq_ddr_s0: dcdc-reg9 { | |
+ regulator-always-on; | |
+ regulator-boot-on; | |
+ regulator-name = "vddq_ddr_s0"; | |
+ | |
+ regulator-state-mem { | |
+ regulator-off-in-suspend; | |
+ }; | |
+ }; | |
+ | |
+ vcc_1v8_s3: dcdc-reg10 { | |
+ regulator-always-on; | |
+ regulator-boot-on; | |
+ regulator-min-microvolt = <1800000>; | |
+ regulator-max-microvolt = <1800000>; | |
+ regulator-name = "vcc_1v8_s3"; | |
+ | |
+ regulator-state-mem { | |
+ regulator-on-in-suspend; | |
+ regulator-suspend-microvolt = <1800000>; | |
+ }; | |
+ }; | |
+ | |
+ avcc_1v8_s0: pldo-reg1 { | |
+ regulator-always-on; | |
+ regulator-boot-on; | |
+ regulator-min-microvolt = <1800000>; | |
+ regulator-max-microvolt = <1800000>; | |
+ regulator-name = "avcc_1v8_s0"; | |
+ | |
+ regulator-state-mem { | |
+ regulator-off-in-suspend; | |
+ }; | |
+ }; | |
+ | |
+ vcc_1v8_s0: pldo-reg2 { | |
+ regulator-always-on; | |
+ regulator-boot-on; | |
+ regulator-min-microvolt = <1800000>; | |
+ regulator-max-microvolt = <1800000>; | |
+ regulator-name = "vcc_1v8_s0"; | |
+ | |
+ regulator-state-mem { | |
+ regulator-off-in-suspend; | |
+ regulator-suspend-microvolt = <1800000>; | |
+ }; | |
+ }; | |
+ | |
+ avdd_1v2_s0: pldo-reg3 { | |
+ regulator-always-on; | |
+ regulator-boot-on; | |
+ regulator-min-microvolt = <1200000>; | |
+ regulator-max-microvolt = <1200000>; | |
+ regulator-name = "avdd_1v2_s0"; | |
+ | |
+ regulator-state-mem { | |
+ regulator-off-in-suspend; | |
+ }; | |
+ }; | |
+ | |
+ vcc_3v3_s0: pldo-reg4 { | |
+ regulator-always-on; | |
+ regulator-boot-on; | |
+ regulator-min-microvolt = <3300000>; | |
+ regulator-max-microvolt = <3300000>; | |
+ regulator-ramp-delay = <12500>; | |
+ regulator-name = "vcc_3v3_s0"; | |
+ | |
+ regulator-state-mem { | |
+ regulator-off-in-suspend; | |
+ }; | |
+ }; | |
+ | |
+ vccio_sd_s0: pldo-reg5 { | |
+ regulator-always-on; | |
+ regulator-boot-on; | |
+ regulator-min-microvolt = <1800000>; | |
+ regulator-max-microvolt = <3300000>; | |
+ regulator-ramp-delay = <12500>; | |
+ regulator-name = "vccio_sd_s0"; | |
+ | |
+ regulator-state-mem { | |
+ regulator-off-in-suspend; | |
+ }; | |
+ }; | |
+ | |
+ pldo6_s3: pldo-reg6 { | |
+ regulator-always-on; | |
+ regulator-boot-on; | |
+ regulator-min-microvolt = <1800000>; | |
+ regulator-max-microvolt = <1800000>; | |
+ regulator-name = "pldo6_s3"; | |
+ | |
+ regulator-state-mem { | |
+ regulator-on-in-suspend; | |
+ regulator-suspend-microvolt = <1800000>; | |
+ }; | |
+ }; | |
+ | |
+ vdd_0v75_s3: nldo-reg1 { | |
+ regulator-always-on; | |
+ regulator-boot-on; | |
+ regulator-min-microvolt = <750000>; | |
+ regulator-max-microvolt = <750000>; | |
+ regulator-name = "vdd_0v75_s3"; | |
+ | |
+ regulator-state-mem { | |
+ regulator-on-in-suspend; | |
+ regulator-suspend-microvolt = <750000>; | |
+ }; | |
+ }; | |
+ | |
+ vdd_ddr_pll_s0: nldo-reg2 { | |
+ regulator-always-on; | |
+ regulator-boot-on; | |
+ regulator-min-microvolt = <850000>; | |
+ regulator-max-microvolt = <850000>; | |
+ regulator-name = "vdd_ddr_pll_s0"; | |
+ | |
+ regulator-state-mem { | |
+ regulator-off-in-suspend; | |
+ regulator-suspend-microvolt = <850000>; | |
+ }; | |
+ }; | |
+ | |
+ avdd_0v75_s0: nldo-reg3 { | |
+ regulator-always-on; | |
+ regulator-boot-on; | |
+ regulator-min-microvolt = <750000>; | |
+ regulator-max-microvolt = <750000>; | |
+ regulator-name = "avdd_0v75_s0"; | |
+ | |
+ regulator-state-mem { | |
+ regulator-off-in-suspend; | |
+ }; | |
+ }; | |
+ | |
+ vdd_0v85_s0: nldo-reg4 { | |
+ regulator-always-on; | |
+ regulator-boot-on; | |
+ regulator-min-microvolt = <850000>; | |
+ regulator-max-microvolt = <850000>; | |
+ regulator-name = "vdd_0v85_s0"; | |
+ | |
+ regulator-state-mem { | |
+ regulator-off-in-suspend; | |
+ }; | |
+ }; | |
+ | |
+ vdd_0v75_s0: nldo-reg5 { | |
+ regulator-always-on; | |
+ regulator-boot-on; | |
+ regulator-min-microvolt = <750000>; | |
+ regulator-max-microvolt = <750000>; | |
+ regulator-name = "vdd_0v75_s0"; | |
+ | |
+ regulator-state-mem { | |
+ regulator-off-in-suspend; | |
+ }; | |
+ }; | |
+ }; | |
+ }; | |
+}; | |
+ | |
+&uart2 { | |
+ pinctrl-0 = <&uart2m0_xfer>; | |
+ status = "okay"; | |
+}; | |
+ | |
+&uart9 { | |
+ pinctrl-0 = <&uart9m0_xfer>; | |
+ status = "okay"; | |
+}; | |
+ | |
+&u2phy0 { | |
+ status = "okay"; | |
+}; | |
+ | |
+&u2phy0_otg { | |
+ status = "okay"; | |
+}; | |
+ | |
+&usbdp_phy0 { | |
+ status = "okay"; | |
+}; | |
+ | |
+&usbdp_phy0_u3 { | |
+ status = "okay"; | |
+}; | |
+ | |
+&usb_host0_xhci { | |
+ extcon = <&u2phy0>; | |
+ status = "okay"; | |
+}; | |
-- | |
2.41.0 | |
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