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Created March 5, 2020 01:08
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xxhash.s
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.file "xxhash.c"
.intel_syntax noprefix
# GNU C17 (Rev2, Built by MSYS2 project) version 9.2.0 (x86_64-w64-mingw32)
# compiled by GNU C version 9.2.0, GMP version 6.1.2, MPFR version 4.0.2, MPC version 1.1.0, isl version isl-0.21-GMP
# warning: GMP header version 6.1.2 differs from library version 6.2.0.
# GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072
# options passed:
# -iprefix C:/msys64/mingw64/bin/../lib/gcc/x86_64-w64-mingw32/9.2.0/
# -D_REENTRANT xxhash.c -masm=intel -mavx2
# -mno-avx256-split-unaligned-load -mtune=generic -march=x86-64
# -auxbase-strip xxhash.s -g -O3 -fverbose-asm
# options enabled: -faggressive-loop-optimizations -falign-functions
# -falign-jumps -falign-labels -falign-loops -fassume-phsa
# -fasynchronous-unwind-tables -fauto-inc-dec -fbranch-count-reg
# -fcaller-saves -fcode-hoisting -fcombine-stack-adjustments -fcommon
# -fcompare-elim -fcprop-registers -fcrossjumping -fcse-follow-jumps
# -fdefer-pop -fdelete-null-pointer-checks -fdevirtualize
# -fdevirtualize-speculatively -fdwarf2-cfi-asm -fearly-inlining
# -feliminate-unused-debug-types -fexpensive-optimizations
# -fforward-propagate -ffp-int-builtin-inexact -ffunction-cse -fgcse
# -fgcse-after-reload -fgcse-lm -fgnu-runtime -fgnu-unique
# -fguess-branch-probability -fhoist-adjacent-loads -fident
# -fif-conversion -fif-conversion2 -findirect-inlining -finline
# -finline-atomics -finline-functions -finline-functions-called-once
# -finline-small-functions -fipa-bit-cp -fipa-cp -fipa-cp-clone -fipa-icf
# -fipa-icf-functions -fipa-icf-variables -fipa-profile -fipa-pure-const
# -fipa-ra -fipa-reference -fipa-reference-addressable -fipa-sra
# -fipa-stack-alignment -fipa-vrp -fira-hoist-pressure
# -fira-share-save-slots -fira-share-spill-slots
# -fisolate-erroneous-paths-dereference -fivopts -fkeep-inline-dllexport
# -fkeep-static-consts -fleading-underscore -flifetime-dse
# -floop-interchange -floop-unroll-and-jam -flra-remat
# -flto-odr-type-merging -fmath-errno -fmerge-constants
# -fmerge-debug-strings -fmove-loop-invariants -fomit-frame-pointer
# -foptimize-sibling-calls -foptimize-strlen -fpartial-inlining
# -fpeel-loops -fpeephole -fpeephole2 -fpic -fplt -fpredictive-commoning
# -fprefetch-loop-arrays -free -freg-struct-return -freorder-blocks
# -freorder-blocks-and-partition -freorder-functions
# -frerun-cse-after-loop -fsched-critical-path-heuristic
# -fsched-dep-count-heuristic -fsched-group-heuristic -fsched-interblock
# -fsched-last-insn-heuristic -fsched-rank-heuristic -fsched-spec
# -fsched-spec-insn-heuristic -fsched-stalled-insns-dep -fschedule-fusion
# -fschedule-insns2 -fsemantic-interposition -fset-stack-executable
# -fshow-column -fshrink-wrap -fshrink-wrap-separate -fsigned-zeros
# -fsplit-ivs-in-unroller -fsplit-loops -fsplit-paths -fsplit-wide-types
# -fssa-backprop -fssa-phiopt -fstdarg-opt -fstore-merging
# -fstrict-aliasing -fstrict-volatile-bitfields -fsync-libcalls
# -fthread-jumps -ftoplevel-reorder -ftrapping-math -ftree-bit-ccp
# -ftree-builtin-call-dce -ftree-ccp -ftree-ch -ftree-coalesce-vars
# -ftree-copy-prop -ftree-cselim -ftree-dce -ftree-dominator-opts
# -ftree-dse -ftree-forwprop -ftree-fre -ftree-loop-distribute-patterns
# -ftree-loop-distribution -ftree-loop-if-convert -ftree-loop-im
# -ftree-loop-ivcanon -ftree-loop-optimize -ftree-loop-vectorize
# -ftree-parallelize-loops= -ftree-partial-pre -ftree-phiprop -ftree-pre
# -ftree-pta -ftree-reassoc -ftree-scev-cprop -ftree-sink
# -ftree-slp-vectorize -ftree-slsr -ftree-sra -ftree-switch-conversion
# -ftree-tail-merge -ftree-ter -ftree-vrp -funit-at-a-time
# -funswitch-loops -funwind-tables -fvar-tracking
# -fvar-tracking-assignments -fverbose-asm -fversion-loops-for-strides
# -fzero-initialized-in-bss -m128bit-long-double -m64 -m80387
# -maccumulate-outgoing-args -malign-double -malign-stringops -mavx -mavx2
# -mavx256-split-unaligned-store -mfancy-math-387 -mfentry -mfp-ret-in-387
# -mfxsr -mieee-fp -mlong-double-80 -mmmx -mms-bitfields -mpopcnt
# -mpush-args -mred-zone -msse -msse2 -msse3 -msse4 -msse4.1 -msse4.2
# -mssse3 -mstack-arg-probe -mstackrealign -mvzeroupper -mxsave
.text
.Ltext0:
.cfi_sections .debug_frame
.p2align 4
.def XXH64_finalize; .scl 3; .type 32; .endef
.seh_proc XXH64_finalize
XXH64_finalize:
.LVL0:
.LFB43:
.file 1 "xxhash.h"
.loc 1 1608 1 view -0
.cfi_startproc
.loc 1 1608 1 is_stmt 0 view .LVU1
.seh_endprologue
.loc 1 1626 5 is_stmt 1 view .LVU2
.loc 1 1642 9 view .LVU3
lea r9, .L4[rip] # tmp414,
.LVL1:
# xxhash.h:1642: switch(len & 31) {
.loc 1 1642 20 is_stmt 0 view .LVU4
and r8d, 31 # tmp413,
.LVL2:
.loc 1 1642 20 view .LVU5
movsx rax, DWORD PTR [r9+r8*4] # tmp416,
add rax, r9 # tmp417, tmp414
jmp rax # tmp417
.section .rdata,"dr"
.align 4
.L4:
.long .L2-.L4
.long .L34-.L4
.long .L36-.L4
.long .L32-.L4
.long .L31-.L4
.long .L30-.L4
.long .L29-.L4
.long .L28-.L4
.long .L27-.L4
.long .L26-.L4
.long .L25-.L4
.long .L24-.L4
.long .L23-.L4
.long .L22-.L4
.long .L21-.L4
.long .L20-.L4
.long .L19-.L4
.long .L18-.L4
.long .L17-.L4
.long .L16-.L4
.long .L15-.L4
.long .L14-.L4
.long .L13-.L4
.long .L12-.L4
.long .L11-.L4
.long .L10-.L4
.long .L9-.L4
.long .L8-.L4
.long .L7-.L4
.long .L6-.L4
.long .L5-.L4
.long .L3-.L4
.text
.p2align 4,,10
.p2align 3
.L3:
.LBB7462:
.loc 1 1707 21 is_stmt 1 view .LVU6
.LVL3:
.loc 1 1707 21 is_stmt 0 view .LVU7
.LBE7462:
.loc 1 1562 5 is_stmt 1 view .LVU8
.LBB7469:
.LBB7463:
.LBI7463:
.loc 1 1577 16 view .LVU9
.LBB7464:
.loc 1 1579 5 view .LVU10
.loc 1 1580 5 view .LVU11
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 is_stmt 0 view .LVU12
movabs rax, -4417276706812531889 # tmp697,
imul rax, QWORD PTR [rdx] # tmp695, MEM[(char * {ref-all})ptr_149(D)]
.LBE7464:
.LBE7463:
# xxhash.h:1707: case 31: PROCESS8_64;
.loc 1 1707 21 view .LVU13
add rdx, 8 # ptr,
.LVL4:
.LBB7467:
.LBB7465:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 view .LVU14
movabs r8, -7046029288634856825 # tmp699,
# xxhash.h:1580: acc = XXH_rotl64(acc, 31);
.loc 1 1580 10 view .LVU15
rol rax, 31 # acc,
.LVL5:
.loc 1 1581 5 is_stmt 1 view .LVU16
.loc 1 1582 5 view .LVU17
.loc 1 1582 5 is_stmt 0 view .LVU18
.LBE7465:
.LBE7467:
.loc 1 1707 21 is_stmt 1 view .LVU19
.loc 1 1707 21 view .LVU20
.loc 1 1707 21 view .LVU21
.LBB7468:
.LBB7466:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 is_stmt 0 view .LVU22
imul rax, r8 # acc, tmp699
.LVL6:
.loc 1 1581 9 view .LVU23
.LBE7466:
.LBE7468:
# xxhash.h:1707: case 31: PROCESS8_64;
.loc 1 1707 21 view .LVU24
xor rax, rcx # h64, h64
.LVL7:
.loc 1 1707 21 view .LVU25
movabs rcx, -8796714831421723037 # tmp703,
rol rax, 27 # tmp701,
.LVL8:
.loc 1 1707 21 view .LVU26
imul rax, r8 # _92, tmp699
add rcx, rax # h64, _92
.LVL9:
.L12:
.loc 1 1707 21 view .LVU27
.LBE7469:
.loc 1 1707 32 is_stmt 1 discriminator 1 view .LVU28
.LBB7470:
.loc 1 1709 21 discriminator 1 view .LVU29
.loc 1 1709 21 is_stmt 0 discriminator 1 view .LVU30
.LBE7470:
.loc 1 1562 5 is_stmt 1 discriminator 1 view .LVU31
.LBB7477:
.LBB7471:
.LBI7471:
.loc 1 1577 16 discriminator 1 view .LVU32
.LBB7472:
.loc 1 1579 5 discriminator 1 view .LVU33
.loc 1 1580 5 discriminator 1 view .LVU34
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 is_stmt 0 discriminator 1 view .LVU35
movabs rax, -4417276706812531889 # tmp706,
imul rax, QWORD PTR [rdx] # tmp704, MEM[(char * {ref-all})ptr_139]
.LBE7472:
.LBE7471:
# xxhash.h:1709: case 23: PROCESS8_64;
.loc 1 1709 21 discriminator 1 view .LVU36
add rdx, 8 # ptr,
.LBB7475:
.LBB7473:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 discriminator 1 view .LVU37
movabs r8, -7046029288634856825 # tmp708,
# xxhash.h:1580: acc = XXH_rotl64(acc, 31);
.loc 1 1580 10 discriminator 1 view .LVU38
rol rax, 31 # acc,
.LVL10:
.loc 1 1581 5 is_stmt 1 discriminator 1 view .LVU39
.loc 1 1582 5 discriminator 1 view .LVU40
.loc 1 1582 5 is_stmt 0 discriminator 1 view .LVU41
.LBE7473:
.LBE7475:
.loc 1 1709 21 is_stmt 1 discriminator 1 view .LVU42
.loc 1 1709 21 discriminator 1 view .LVU43
.loc 1 1709 21 discriminator 1 view .LVU44
.LBB7476:
.LBB7474:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 is_stmt 0 discriminator 1 view .LVU45
imul rax, r8 # acc, tmp708
.LVL11:
.loc 1 1581 9 discriminator 1 view .LVU46
.LBE7474:
.LBE7476:
# xxhash.h:1709: case 23: PROCESS8_64;
.loc 1 1709 21 discriminator 1 view .LVU47
xor rax, rcx # h64, h64
.LVL12:
.loc 1 1709 21 discriminator 1 view .LVU48
movabs rcx, -8796714831421723037 # tmp712,
rol rax, 27 # tmp710,
.LVL13:
.loc 1 1709 21 discriminator 1 view .LVU49
imul rax, r8 # _94, tmp708
add rcx, rax # h64, _94
.LVL14:
.L20:
.loc 1 1709 21 discriminator 1 view .LVU50
.LBE7477:
.loc 1 1709 32 is_stmt 1 discriminator 1 view .LVU51
.LBB7478:
.loc 1 1711 21 discriminator 1 view .LVU52
.loc 1 1711 21 is_stmt 0 discriminator 1 view .LVU53
.LBE7478:
.loc 1 1562 5 is_stmt 1 discriminator 1 view .LVU54
.LBB7485:
.LBB7479:
.LBI7479:
.loc 1 1577 16 discriminator 1 view .LVU55
.LBB7480:
.loc 1 1579 5 discriminator 1 view .LVU56
.loc 1 1580 5 discriminator 1 view .LVU57
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 is_stmt 0 discriminator 1 view .LVU58
movabs rax, -4417276706812531889 # tmp715,
imul rax, QWORD PTR [rdx] # tmp713, MEM[(char * {ref-all})ptr_140]
.LBE7480:
.LBE7479:
# xxhash.h:1711: case 15: PROCESS8_64;
.loc 1 1711 21 discriminator 1 view .LVU59
add rdx, 8 # ptr,
.LBB7483:
.LBB7481:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 discriminator 1 view .LVU60
movabs r8, -7046029288634856825 # tmp717,
# xxhash.h:1580: acc = XXH_rotl64(acc, 31);
.loc 1 1580 10 discriminator 1 view .LVU61
rol rax, 31 # acc,
.LVL15:
.loc 1 1581 5 is_stmt 1 discriminator 1 view .LVU62
.loc 1 1582 5 discriminator 1 view .LVU63
.loc 1 1582 5 is_stmt 0 discriminator 1 view .LVU64
.LBE7481:
.LBE7483:
.loc 1 1711 21 is_stmt 1 discriminator 1 view .LVU65
.loc 1 1711 21 discriminator 1 view .LVU66
.loc 1 1711 21 discriminator 1 view .LVU67
.LBB7484:
.LBB7482:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 is_stmt 0 discriminator 1 view .LVU68
imul rax, r8 # acc, tmp717
.LVL16:
.loc 1 1581 9 discriminator 1 view .LVU69
.LBE7482:
.LBE7484:
# xxhash.h:1711: case 15: PROCESS8_64;
.loc 1 1711 21 discriminator 1 view .LVU70
xor rax, rcx # h64, h64
.LVL17:
.loc 1 1711 21 discriminator 1 view .LVU71
movabs rcx, -8796714831421723037 # tmp721,
rol rax, 27 # tmp719,
.LVL18:
.loc 1 1711 21 discriminator 1 view .LVU72
imul rax, r8 # _96, tmp717
add rcx, rax # h64, _96
.LVL19:
.L28:
.loc 1 1711 21 discriminator 1 view .LVU73
.LBE7485:
.loc 1 1711 32 is_stmt 1 discriminator 1 view .LVU74
.loc 1 1713 21 discriminator 1 view .LVU75
.loc 1 1059 5 discriminator 1 view .LVU76
# xxhash.h:1713: case 7: PROCESS4_64;
.loc 1 1713 21 is_stmt 0 discriminator 1 view .LVU77
movabs r8, -7046029288634856825 # tmp724,
mov eax, DWORD PTR [rdx] # MEM[(char * {ref-all})ptr_141], MEM[(char * {ref-all})ptr_141]
add rdx, 4 # ptr,
imul rax, r8 # tmp723, tmp724
xor rax, rcx # h64, h64
.LVL20:
.loc 1 1713 21 is_stmt 1 discriminator 1 view .LVU78
.loc 1 1713 21 discriminator 1 view .LVU79
movabs rcx, -4417276706812531889 # tmp726,
rol rax, 23 # tmp725,
.LVL21:
.loc 1 1713 21 is_stmt 0 discriminator 1 view .LVU80
imul rax, rcx # _99, tmp726
movabs rcx, 1609587929392839161 # tmp727,
add rcx, rax # h64, _99
.LVL22:
.L32:
.loc 1 1713 32 is_stmt 1 discriminator 1 view .LVU81
.loc 1 1715 21 discriminator 1 view .LVU82
movzx eax, BYTE PTR [rdx] # *ptr_142, *ptr_142
lea r8, 1[rdx] # ptr,
.LVL23:
.loc 1 1715 21 discriminator 1 view .LVU83
movabs rdx, 2870177450012600261 # tmp730,
imul rax, rdx # tmp729, tmp730
xor rax, rcx # h64, h64
movabs rcx, -7046029288634856825 # tmp732,
rol rax, 11 # _102,
imul rcx, rax # h64, _102
.LVL24:
.L33:
.loc 1 1715 32 discriminator 1 view .LVU84
.loc 1 1717 21 discriminator 1 view .LVU85
movzx eax, BYTE PTR [r8] # *ptr_143, *ptr_143
lea rdx, 1[r8] # ptr,
.LVL25:
.loc 1 1717 21 discriminator 1 view .LVU86
movabs r8, 2870177450012600261 # tmp735,
.LVL26:
.loc 1 1717 21 is_stmt 0 discriminator 1 view .LVU87
imul rax, r8 # tmp734, tmp735
xor rax, rcx # h64, h64
.LVL27:
.loc 1 1717 21 discriminator 1 view .LVU88
movabs rcx, -7046029288634856825 # tmp737,
rol rax, 11 # _105,
.LVL28:
.loc 1 1717 21 discriminator 1 view .LVU89
imul rcx, rax # h64, _105
.LVL29:
.L34:
.loc 1 1717 32 is_stmt 1 discriminator 1 view .LVU90
.loc 1 1719 21 discriminator 1 view .LVU91
.loc 1 1719 21 discriminator 1 view .LVU92
movzx eax, BYTE PTR [rdx] # *ptr_144, *ptr_144
movabs rdx, 2870177450012600261 # tmp740,
.LVL30:
.loc 1 1719 21 is_stmt 0 discriminator 1 view .LVU93
imul rax, rdx # tmp739, tmp740
xor rax, rcx # h64, h64
movabs rcx, -7046029288634856825 # tmp742,
rol rax, 11 # _108,
imul rcx, rax # h64, _108
.LVL31:
.L2:
.loc 1 1719 32 is_stmt 1 discriminator 1 view .LVU94
.loc 1 1721 21 discriminator 1 view .LVU95
.LBB7486:
.LBI7486:
.loc 1 1593 16 discriminator 1 view .LVU96
.LBB7487:
.loc 1 1595 5 discriminator 1 view .LVU97
# xxhash.h:1598: h64 *= PRIME64_3;
.loc 1 1598 9 is_stmt 0 discriminator 1 view .LVU98
movabs rdx, 1609587929392839161 # tmp745,
# xxhash.h:1595: h64 ^= h64 >> 33;
.loc 1 1595 16 discriminator 1 view .LVU99
mov rax, rcx # tmp743, h64
shr rax, 33 # tmp743,
# xxhash.h:1595: h64 ^= h64 >> 33;
.loc 1 1595 9 discriminator 1 view .LVU100
xor rax, rcx # h64, h64
.LVL32:
.loc 1 1596 5 is_stmt 1 discriminator 1 view .LVU101
# xxhash.h:1596: h64 *= PRIME64_2;
.loc 1 1596 9 is_stmt 0 discriminator 1 view .LVU102
movabs rcx, -4417276706812531889 # tmp744,
.LVL33:
.loc 1 1596 9 discriminator 1 view .LVU103
imul rax, rcx # h64, tmp744
.LVL34:
.loc 1 1597 5 is_stmt 1 discriminator 1 view .LVU104
# xxhash.h:1597: h64 ^= h64 >> 29;
.loc 1 1597 16 is_stmt 0 discriminator 1 view .LVU105
mov rcx, rax # _485, h64
shr rcx, 29 # _485,
# xxhash.h:1597: h64 ^= h64 >> 29;
.loc 1 1597 9 discriminator 1 view .LVU106
xor rax, rcx # h64, _485
.LVL35:
.loc 1 1598 5 is_stmt 1 discriminator 1 view .LVU107
# xxhash.h:1598: h64 *= PRIME64_3;
.loc 1 1598 9 is_stmt 0 discriminator 1 view .LVU108
imul rax, rdx # h64, tmp745
.LVL36:
.loc 1 1599 5 is_stmt 1 discriminator 1 view .LVU109
# xxhash.h:1599: h64 ^= h64 >> 32;
.loc 1 1599 16 is_stmt 0 discriminator 1 view .LVU110
mov rdx, rax # _488, h64
shr rdx, 32 # _488,
# xxhash.h:1599: h64 ^= h64 >> 32;
.loc 1 1599 9 discriminator 1 view .LVU111
xor rax, rdx # <retval>, _488
.LVL37:
.loc 1 1600 5 is_stmt 1 discriminator 1 view .LVU112
.loc 1 1600 5 is_stmt 0 discriminator 1 view .LVU113
.LBE7487:
.LBE7486:
# xxhash.h:1727: }
.loc 1 1727 1 discriminator 1 view .LVU114
ret
.LVL38:
.p2align 4,,10
.p2align 3
.L5:
.LBB7488:
.loc 1 1686 21 is_stmt 1 view .LVU115
.loc 1 1686 21 is_stmt 0 view .LVU116
.LBE7488:
.loc 1 1562 5 is_stmt 1 view .LVU117
.LBB7495:
.LBB7489:
.LBI7489:
.loc 1 1577 16 view .LVU118
.LBB7490:
.loc 1 1579 5 view .LVU119
.loc 1 1580 5 view .LVU120
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 is_stmt 0 view .LVU121
movabs rax, -4417276706812531889 # tmp605,
imul rax, QWORD PTR [rdx] # tmp603, MEM[(char * {ref-all})ptr_149(D)]
.LBE7490:
.LBE7489:
# xxhash.h:1686: case 30: PROCESS8_64;
.loc 1 1686 21 view .LVU122
add rdx, 8 # ptr,
.LVL39:
.LBB7493:
.LBB7491:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 view .LVU123
movabs r8, -7046029288634856825 # tmp607,
# xxhash.h:1580: acc = XXH_rotl64(acc, 31);
.loc 1 1580 10 view .LVU124
rol rax, 31 # acc,
.LVL40:
.loc 1 1581 5 is_stmt 1 view .LVU125
.loc 1 1582 5 view .LVU126
.loc 1 1582 5 is_stmt 0 view .LVU127
.LBE7491:
.LBE7493:
.loc 1 1686 21 is_stmt 1 view .LVU128
.loc 1 1686 21 view .LVU129
.loc 1 1686 21 view .LVU130
.LBB7494:
.LBB7492:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 is_stmt 0 view .LVU131
imul rax, r8 # acc, tmp607
.LVL41:
.loc 1 1581 9 view .LVU132
.LBE7492:
.LBE7494:
# xxhash.h:1686: case 30: PROCESS8_64;
.loc 1 1686 21 view .LVU133
xor rax, rcx # h64, h64
.LVL42:
.loc 1 1686 21 view .LVU134
movabs rcx, -8796714831421723037 # tmp611,
rol rax, 27 # tmp609,
.LVL43:
.loc 1 1686 21 view .LVU135
imul rax, r8 # _62, tmp607
add rcx, rax # h64, _62
.LVL44:
.L13:
.loc 1 1686 21 view .LVU136
.LBE7495:
.loc 1 1686 32 is_stmt 1 discriminator 1 view .LVU137
.LBB7496:
.loc 1 1688 21 discriminator 1 view .LVU138
.loc 1 1688 21 is_stmt 0 discriminator 1 view .LVU139
.LBE7496:
.loc 1 1562 5 is_stmt 1 discriminator 1 view .LVU140
.LBB7503:
.LBB7497:
.LBI7497:
.loc 1 1577 16 discriminator 1 view .LVU141
.LBB7498:
.loc 1 1579 5 discriminator 1 view .LVU142
.loc 1 1580 5 discriminator 1 view .LVU143
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 is_stmt 0 discriminator 1 view .LVU144
movabs rax, -4417276706812531889 # tmp614,
imul rax, QWORD PTR [rdx] # tmp612, MEM[(char * {ref-all})ptr_134]
.LBE7498:
.LBE7497:
# xxhash.h:1688: case 22: PROCESS8_64;
.loc 1 1688 21 discriminator 1 view .LVU145
add rdx, 8 # ptr,
.LBB7501:
.LBB7499:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 discriminator 1 view .LVU146
movabs r8, -7046029288634856825 # tmp616,
# xxhash.h:1580: acc = XXH_rotl64(acc, 31);
.loc 1 1580 10 discriminator 1 view .LVU147
rol rax, 31 # acc,
.LVL45:
.loc 1 1581 5 is_stmt 1 discriminator 1 view .LVU148
.loc 1 1582 5 discriminator 1 view .LVU149
.loc 1 1582 5 is_stmt 0 discriminator 1 view .LVU150
.LBE7499:
.LBE7501:
.loc 1 1688 21 is_stmt 1 discriminator 1 view .LVU151
.loc 1 1688 21 discriminator 1 view .LVU152
.loc 1 1688 21 discriminator 1 view .LVU153
.LBB7502:
.LBB7500:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 is_stmt 0 discriminator 1 view .LVU154
imul rax, r8 # acc, tmp616
.LVL46:
.loc 1 1581 9 discriminator 1 view .LVU155
.LBE7500:
.LBE7502:
# xxhash.h:1688: case 22: PROCESS8_64;
.loc 1 1688 21 discriminator 1 view .LVU156
xor rax, rcx # h64, h64
.LVL47:
.loc 1 1688 21 discriminator 1 view .LVU157
movabs rcx, -8796714831421723037 # tmp620,
rol rax, 27 # tmp618,
.LVL48:
.loc 1 1688 21 discriminator 1 view .LVU158
imul rax, r8 # _64, tmp616
add rcx, rax # h64, _64
.LVL49:
.L21:
.loc 1 1688 21 discriminator 1 view .LVU159
.LBE7503:
.loc 1 1688 32 is_stmt 1 discriminator 1 view .LVU160
.LBB7504:
.loc 1 1690 21 discriminator 1 view .LVU161
.loc 1 1690 21 is_stmt 0 discriminator 1 view .LVU162
.LBE7504:
.loc 1 1562 5 is_stmt 1 discriminator 1 view .LVU163
.LBB7511:
.LBB7505:
.LBI7505:
.loc 1 1577 16 discriminator 1 view .LVU164
.LBB7506:
.loc 1 1579 5 discriminator 1 view .LVU165
.loc 1 1580 5 discriminator 1 view .LVU166
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 is_stmt 0 discriminator 1 view .LVU167
movabs rax, -4417276706812531889 # tmp623,
imul rax, QWORD PTR [rdx] # tmp621, MEM[(char * {ref-all})ptr_135]
.LBE7506:
.LBE7505:
# xxhash.h:1690: case 14: PROCESS8_64;
.loc 1 1690 21 discriminator 1 view .LVU168
add rdx, 8 # ptr,
.LBB7509:
.LBB7507:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 discriminator 1 view .LVU169
movabs r8, -7046029288634856825 # tmp625,
# xxhash.h:1580: acc = XXH_rotl64(acc, 31);
.loc 1 1580 10 discriminator 1 view .LVU170
rol rax, 31 # acc,
.LVL50:
.loc 1 1581 5 is_stmt 1 discriminator 1 view .LVU171
.loc 1 1582 5 discriminator 1 view .LVU172
.loc 1 1582 5 is_stmt 0 discriminator 1 view .LVU173
.LBE7507:
.LBE7509:
.loc 1 1690 21 is_stmt 1 discriminator 1 view .LVU174
.loc 1 1690 21 discriminator 1 view .LVU175
.loc 1 1690 21 discriminator 1 view .LVU176
.LBB7510:
.LBB7508:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 is_stmt 0 discriminator 1 view .LVU177
imul rax, r8 # acc, tmp625
.LVL51:
.loc 1 1581 9 discriminator 1 view .LVU178
.LBE7508:
.LBE7510:
# xxhash.h:1690: case 14: PROCESS8_64;
.loc 1 1690 21 discriminator 1 view .LVU179
xor rax, rcx # h64, h64
.LVL52:
.loc 1 1690 21 discriminator 1 view .LVU180
movabs rcx, -8796714831421723037 # tmp629,
rol rax, 27 # tmp627,
.LVL53:
.loc 1 1690 21 discriminator 1 view .LVU181
imul rax, r8 # _66, tmp625
add rcx, rax # h64, _66
.LVL54:
.L29:
.loc 1 1690 21 discriminator 1 view .LVU182
.LBE7511:
.loc 1 1690 32 is_stmt 1 discriminator 1 view .LVU183
.loc 1 1692 21 discriminator 1 view .LVU184
.loc 1 1059 5 discriminator 1 view .LVU185
.loc 1 1692 21 discriminator 1 view .LVU186
.loc 1 1692 21 discriminator 1 view .LVU187
mov eax, DWORD PTR [rdx] # MEM[(char * {ref-all})ptr_136], MEM[(char * {ref-all})ptr_136]
# xxhash.h:1693: PROCESS1_64;
.loc 1 1693 21 is_stmt 0 discriminator 1 view .LVU188
movzx r8d, BYTE PTR 4[rdx] # MEM[(const xxh_u8 *)ptr_136 + 4B], MEM[(const xxh_u8 *)ptr_136 + 4B]
# xxhash.h:1692: case 6: PROCESS4_64;
.loc 1 1692 21 discriminator 1 view .LVU189
movabs r9, -7046029288634856825 # tmp632,
# xxhash.h:1693: PROCESS1_64;
.loc 1 1693 21 discriminator 1 view .LVU190
movabs r11, 2870177450012600261 # tmp639,
# xxhash.h:1692: case 6: PROCESS4_64;
.loc 1 1692 21 discriminator 1 view .LVU191
movabs r10, 1609587929392839161 # tmp636,
imul rax, r9 # tmp631, tmp632
# xxhash.h:1693: PROCESS1_64;
.loc 1 1693 21 discriminator 1 view .LVU192
imul r8, r11 # tmp638, tmp639
# xxhash.h:1692: case 6: PROCESS4_64;
.loc 1 1692 21 discriminator 1 view .LVU193
xor rcx, rax # h64, tmp631
movabs rax, -4417276706812531889 # tmp635,
rol rcx, 23 # tmp634,
imul rcx, rax # _69, tmp635
add rcx, r10 # h64, tmp636
.LVL55:
.loc 1 1692 32 is_stmt 1 discriminator 1 view .LVU194
.loc 1 1693 21 discriminator 1 view .LVU195
.loc 1 1693 21 discriminator 1 view .LVU196
xor rcx, r8 # h64, tmp638
rol rcx, 11 # _72,
imul rcx, r9 # _72, tmp632
mov r8, rcx # h64, _72
.LVL56:
.loc 1 1693 32 discriminator 1 view .LVU197
.loc 1 1694 21 discriminator 1 view .LVU198
.loc 1 1694 21 discriminator 1 view .LVU199
movzx ecx, BYTE PTR 5[rdx] # MEM[(const xxh_u8 *)ptr_136 + 5B], MEM[(const xxh_u8 *)ptr_136 + 5B]
imul rcx, r11 # tmp643, tmp639
xor rcx, r8 # h64, h64
rol rcx, 11 # h64,
imul rcx, r9 # _75, tmp632
.LVL57:
.loc 1 1694 32 discriminator 1 view .LVU200
.loc 1 1695 21 discriminator 1 view .LVU201
.LBB7512:
.LBI7512:
.loc 1 1593 16 discriminator 1 view .LVU202
.LBB7513:
.loc 1 1595 5 discriminator 1 view .LVU203
# xxhash.h:1595: h64 ^= h64 >> 33;
.loc 1 1595 16 is_stmt 0 discriminator 1 view .LVU204
mov rdx, rcx # tmp647, h64
shr rdx, 33 # tmp647,
# xxhash.h:1595: h64 ^= h64 >> 33;
.loc 1 1595 9 discriminator 1 view .LVU205
xor rdx, rcx # h64, h64
.LVL58:
.loc 1 1596 5 is_stmt 1 discriminator 1 view .LVU206
# xxhash.h:1596: h64 *= PRIME64_2;
.loc 1 1596 9 is_stmt 0 discriminator 1 view .LVU207
imul rdx, rax # h64, tmp635
.LVL59:
.loc 1 1597 5 is_stmt 1 discriminator 1 view .LVU208
# xxhash.h:1597: h64 ^= h64 >> 29;
.loc 1 1597 16 is_stmt 0 discriminator 1 view .LVU209
mov rax, rdx # _444, h64
shr rax, 29 # _444,
# xxhash.h:1597: h64 ^= h64 >> 29;
.loc 1 1597 9 discriminator 1 view .LVU210
xor rax, rdx # h64, h64
.LVL60:
.loc 1 1598 5 is_stmt 1 discriminator 1 view .LVU211
# xxhash.h:1598: h64 *= PRIME64_3;
.loc 1 1598 9 is_stmt 0 discriminator 1 view .LVU212
imul rax, r10 # h64, tmp636
.LVL61:
.loc 1 1599 5 is_stmt 1 discriminator 1 view .LVU213
# xxhash.h:1599: h64 ^= h64 >> 32;
.loc 1 1599 16 is_stmt 0 discriminator 1 view .LVU214
mov rdx, rax # _447, h64
shr rdx, 32 # _447,
# xxhash.h:1599: h64 ^= h64 >> 32;
.loc 1 1599 9 discriminator 1 view .LVU215
xor rax, rdx # <retval>, _447
.LVL62:
.loc 1 1600 5 is_stmt 1 discriminator 1 view .LVU216
.loc 1 1600 5 is_stmt 0 discriminator 1 view .LVU217
.LBE7513:
.LBE7512:
# xxhash.h:1727: }
.loc 1 1727 1 discriminator 1 view .LVU218
ret
.LVL63:
.p2align 4,,10
.p2align 3
.L7:
.LBB7514:
.loc 1 1650 21 is_stmt 1 view .LVU219
.loc 1 1650 21 is_stmt 0 view .LVU220
.LBE7514:
.loc 1 1562 5 is_stmt 1 view .LVU221
.LBB7521:
.LBB7515:
.LBI7515:
.loc 1 1577 16 view .LVU222
.LBB7516:
.loc 1 1579 5 view .LVU223
.loc 1 1580 5 view .LVU224
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 is_stmt 0 view .LVU225
movabs rax, -4417276706812531889 # tmp451,
imul rax, QWORD PTR [rdx] # tmp449, MEM[(char * {ref-all})ptr_149(D)]
.LBE7516:
.LBE7515:
# xxhash.h:1650: case 28: PROCESS8_64;
.loc 1 1650 21 view .LVU226
add rdx, 8 # ptr,
.LVL64:
.LBB7519:
.LBB7517:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 view .LVU227
movabs r8, -7046029288634856825 # tmp453,
# xxhash.h:1580: acc = XXH_rotl64(acc, 31);
.loc 1 1580 10 view .LVU228
rol rax, 31 # acc,
.LVL65:
.loc 1 1581 5 is_stmt 1 view .LVU229
.loc 1 1582 5 view .LVU230
.loc 1 1582 5 is_stmt 0 view .LVU231
.LBE7517:
.LBE7519:
.loc 1 1650 21 is_stmt 1 view .LVU232
.loc 1 1650 21 view .LVU233
.loc 1 1650 21 view .LVU234
.LBB7520:
.LBB7518:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 is_stmt 0 view .LVU235
imul rax, r8 # acc, tmp453
.LVL66:
.loc 1 1581 9 view .LVU236
.LBE7518:
.LBE7520:
# xxhash.h:1650: case 28: PROCESS8_64;
.loc 1 1650 21 view .LVU237
xor rax, rcx # h64, h64
.LVL67:
.loc 1 1650 21 view .LVU238
movabs rcx, -8796714831421723037 # tmp457,
rol rax, 27 # tmp455,
.LVL68:
.loc 1 1650 21 view .LVU239
imul rax, r8 # _20, tmp453
add rcx, rax # h64, _20
.LVL69:
.L15:
.loc 1 1650 21 view .LVU240
.LBE7521:
.loc 1 1650 32 is_stmt 1 discriminator 1 view .LVU241
.LBB7522:
.loc 1 1652 21 discriminator 1 view .LVU242
.loc 1 1652 21 is_stmt 0 discriminator 1 view .LVU243
.LBE7522:
.loc 1 1562 5 is_stmt 1 discriminator 1 view .LVU244
.LBB7529:
.LBB7523:
.LBI7523:
.loc 1 1577 16 discriminator 1 view .LVU245
.LBB7524:
.loc 1 1579 5 discriminator 1 view .LVU246
.loc 1 1580 5 discriminator 1 view .LVU247
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 is_stmt 0 discriminator 1 view .LVU248
movabs rax, -4417276706812531889 # tmp460,
imul rax, QWORD PTR [rdx] # tmp458, MEM[(char * {ref-all})ptr_124]
.LBE7524:
.LBE7523:
# xxhash.h:1652: case 20: PROCESS8_64;
.loc 1 1652 21 discriminator 1 view .LVU249
add rdx, 8 # ptr,
.LBB7527:
.LBB7525:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 discriminator 1 view .LVU250
movabs r8, -7046029288634856825 # tmp462,
# xxhash.h:1580: acc = XXH_rotl64(acc, 31);
.loc 1 1580 10 discriminator 1 view .LVU251
rol rax, 31 # acc,
.LVL70:
.loc 1 1581 5 is_stmt 1 discriminator 1 view .LVU252
.loc 1 1582 5 discriminator 1 view .LVU253
.loc 1 1582 5 is_stmt 0 discriminator 1 view .LVU254
.LBE7525:
.LBE7527:
.loc 1 1652 21 is_stmt 1 discriminator 1 view .LVU255
.loc 1 1652 21 discriminator 1 view .LVU256
.loc 1 1652 21 discriminator 1 view .LVU257
.LBB7528:
.LBB7526:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 is_stmt 0 discriminator 1 view .LVU258
imul rax, r8 # acc, tmp462
.LVL71:
.loc 1 1581 9 discriminator 1 view .LVU259
.LBE7526:
.LBE7528:
# xxhash.h:1652: case 20: PROCESS8_64;
.loc 1 1652 21 discriminator 1 view .LVU260
xor rax, rcx # h64, h64
.LVL72:
.loc 1 1652 21 discriminator 1 view .LVU261
movabs rcx, -8796714831421723037 # tmp466,
rol rax, 27 # tmp464,
.LVL73:
.loc 1 1652 21 discriminator 1 view .LVU262
imul rax, r8 # _22, tmp462
add rcx, rax # h64, _22
.LVL74:
.L23:
.loc 1 1652 21 discriminator 1 view .LVU263
.LBE7529:
.loc 1 1652 32 is_stmt 1 discriminator 1 view .LVU264
.LBB7530:
.loc 1 1654 21 discriminator 1 view .LVU265
.loc 1 1654 21 is_stmt 0 discriminator 1 view .LVU266
.LBE7530:
.loc 1 1562 5 is_stmt 1 discriminator 1 view .LVU267
.LBB7537:
.LBB7531:
.LBI7531:
.loc 1 1577 16 discriminator 1 view .LVU268
.LBB7532:
.loc 1 1579 5 discriminator 1 view .LVU269
.loc 1 1580 5 discriminator 1 view .LVU270
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 is_stmt 0 discriminator 1 view .LVU271
movabs rax, -4417276706812531889 # tmp469,
imul rax, QWORD PTR [rdx] # tmp467, MEM[(char * {ref-all})ptr_125]
.LBE7532:
.LBE7531:
# xxhash.h:1654: case 12: PROCESS8_64;
.loc 1 1654 21 discriminator 1 view .LVU272
add rdx, 8 # ptr,
.LBB7535:
.LBB7533:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 discriminator 1 view .LVU273
movabs r8, -7046029288634856825 # tmp471,
# xxhash.h:1580: acc = XXH_rotl64(acc, 31);
.loc 1 1580 10 discriminator 1 view .LVU274
rol rax, 31 # acc,
.LVL75:
.loc 1 1581 5 is_stmt 1 discriminator 1 view .LVU275
.loc 1 1582 5 discriminator 1 view .LVU276
.loc 1 1582 5 is_stmt 0 discriminator 1 view .LVU277
.LBE7533:
.LBE7535:
.loc 1 1654 21 is_stmt 1 discriminator 1 view .LVU278
.loc 1 1654 21 discriminator 1 view .LVU279
.loc 1 1654 21 discriminator 1 view .LVU280
.LBB7536:
.LBB7534:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 is_stmt 0 discriminator 1 view .LVU281
imul rax, r8 # acc, tmp471
.LVL76:
.loc 1 1581 9 discriminator 1 view .LVU282
.LBE7534:
.LBE7536:
# xxhash.h:1654: case 12: PROCESS8_64;
.loc 1 1654 21 discriminator 1 view .LVU283
xor rax, rcx # h64, h64
.LVL77:
.loc 1 1654 21 discriminator 1 view .LVU284
movabs rcx, -8796714831421723037 # tmp475,
rol rax, 27 # tmp473,
.LVL78:
.loc 1 1654 21 discriminator 1 view .LVU285
imul rax, r8 # _24, tmp471
add rcx, rax # h64, _24
.LVL79:
.L31:
.loc 1 1654 21 discriminator 1 view .LVU286
.LBE7537:
.loc 1 1654 32 is_stmt 1 discriminator 1 view .LVU287
.loc 1 1656 21 discriminator 1 view .LVU288
.loc 1 1059 5 discriminator 1 view .LVU289
.loc 1 1656 21 discriminator 1 view .LVU290
.loc 1 1656 21 discriminator 1 view .LVU291
movabs r8, 1609587929392839161 # tmp482,
mov eax, DWORD PTR [rdx] # MEM[(char * {ref-all})ptr_126], MEM[(char * {ref-all})ptr_126]
movabs rdx, -7046029288634856825 # tmp478,
imul rax, rdx # tmp477, tmp478
xor rcx, rax # h64, tmp477
movabs rax, -4417276706812531889 # tmp481,
rol rcx, 23 # tmp480,
imul rcx, rax # _27, tmp481
add rcx, r8 # h64, tmp482
.LVL80:
.loc 1 1656 32 discriminator 1 view .LVU292
.loc 1 1657 21 discriminator 1 view .LVU293
.LBB7538:
.LBI7538:
.loc 1 1593 16 discriminator 1 view .LVU294
.LBB7539:
.loc 1 1595 5 discriminator 1 view .LVU295
# xxhash.h:1595: h64 ^= h64 >> 33;
.loc 1 1595 16 is_stmt 0 discriminator 1 view .LVU296
mov rdx, rcx # tmp483, h64
.LVL81:
.L39:
.loc 1 1595 16 discriminator 1 view .LVU297
.LBE7539:
.LBE7538:
.loc 1 1674 32 is_stmt 1 discriminator 1 view .LVU298
.loc 1 1675 21 discriminator 1 view .LVU299
.LBB7540:
.LBI7540:
.loc 1 1593 16 discriminator 1 view .LVU300
.LBB7541:
.loc 1 1595 5 discriminator 1 view .LVU301
# xxhash.h:1595: h64 ^= h64 >> 33;
.loc 1 1595 16 is_stmt 0 discriminator 1 view .LVU302
shr rdx, 33 # tmp560,
# xxhash.h:1595: h64 ^= h64 >> 33;
.loc 1 1595 9 discriminator 1 view .LVU303
xor rdx, rcx # h64, h64
.LVL82:
.loc 1 1596 5 is_stmt 1 discriminator 1 view .LVU304
# xxhash.h:1596: h64 *= PRIME64_2;
.loc 1 1596 9 is_stmt 0 discriminator 1 view .LVU305
imul rdx, rax # h64, tmp553
.LVL83:
.loc 1 1597 5 is_stmt 1 discriminator 1 view .LVU306
# xxhash.h:1597: h64 ^= h64 >> 29;
.loc 1 1597 16 is_stmt 0 discriminator 1 view .LVU307
mov rax, rdx # _403, h64
shr rax, 29 # _403,
# xxhash.h:1597: h64 ^= h64 >> 29;
.loc 1 1597 9 discriminator 1 view .LVU308
xor rax, rdx # h64, h64
.LVL84:
.loc 1 1598 5 is_stmt 1 discriminator 1 view .LVU309
# xxhash.h:1598: h64 *= PRIME64_3;
.loc 1 1598 9 is_stmt 0 discriminator 1 view .LVU310
imul rax, r8 # h64, tmp554
.LVL85:
.loc 1 1599 5 is_stmt 1 discriminator 1 view .LVU311
# xxhash.h:1599: h64 ^= h64 >> 32;
.loc 1 1599 16 is_stmt 0 discriminator 1 view .LVU312
mov rdx, rax # _406, h64
shr rdx, 32 # _406,
# xxhash.h:1599: h64 ^= h64 >> 32;
.loc 1 1599 9 discriminator 1 view .LVU313
xor rax, rdx # <retval>, _406
.LVL86:
.loc 1 1600 5 is_stmt 1 discriminator 1 view .LVU314
.loc 1 1600 5 is_stmt 0 discriminator 1 view .LVU315
.LBE7541:
.LBE7540:
# xxhash.h:1727: }
.loc 1 1727 1 discriminator 1 view .LVU316
ret
.LVL87:
.p2align 4,,10
.p2align 3
.L6:
.LBB7542:
.loc 1 1667 21 is_stmt 1 view .LVU317
.loc 1 1667 21 is_stmt 0 view .LVU318
.LBE7542:
.loc 1 1562 5 is_stmt 1 view .LVU319
.LBB7549:
.LBB7543:
.LBI7543:
.loc 1 1577 16 view .LVU320
.LBB7544:
.loc 1 1579 5 view .LVU321
.loc 1 1580 5 view .LVU322
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 is_stmt 0 view .LVU323
movabs rax, -4417276706812531889 # tmp523,
imul rax, QWORD PTR [rdx] # tmp521, MEM[(char * {ref-all})ptr_149(D)]
.LBE7544:
.LBE7543:
# xxhash.h:1667: case 29: PROCESS8_64;
.loc 1 1667 21 view .LVU324
add rdx, 8 # ptr,
.LVL88:
.LBB7547:
.LBB7545:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 view .LVU325
movabs r8, -7046029288634856825 # tmp525,
# xxhash.h:1580: acc = XXH_rotl64(acc, 31);
.loc 1 1580 10 view .LVU326
rol rax, 31 # acc,
.LVL89:
.loc 1 1581 5 is_stmt 1 view .LVU327
.loc 1 1582 5 view .LVU328
.loc 1 1582 5 is_stmt 0 view .LVU329
.LBE7545:
.LBE7547:
.loc 1 1667 21 is_stmt 1 view .LVU330
.loc 1 1667 21 view .LVU331
.loc 1 1667 21 view .LVU332
.LBB7548:
.LBB7546:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 is_stmt 0 view .LVU333
imul rax, r8 # acc, tmp525
.LVL90:
.loc 1 1581 9 view .LVU334
.LBE7546:
.LBE7548:
# xxhash.h:1667: case 29: PROCESS8_64;
.loc 1 1667 21 view .LVU335
xor rax, rcx # h64, h64
.LVL91:
.loc 1 1667 21 view .LVU336
movabs rcx, -8796714831421723037 # tmp529,
rol rax, 27 # tmp527,
.LVL92:
.loc 1 1667 21 view .LVU337
imul rax, r8 # _38, tmp525
add rcx, rax # h64, _38
.LVL93:
.L14:
.loc 1 1667 21 view .LVU338
.LBE7549:
.loc 1 1667 32 is_stmt 1 discriminator 1 view .LVU339
.LBB7550:
.loc 1 1669 21 discriminator 1 view .LVU340
.loc 1 1669 21 is_stmt 0 discriminator 1 view .LVU341
.LBE7550:
.loc 1 1562 5 is_stmt 1 discriminator 1 view .LVU342
.LBB7557:
.LBB7551:
.LBI7551:
.loc 1 1577 16 discriminator 1 view .LVU343
.LBB7552:
.loc 1 1579 5 discriminator 1 view .LVU344
.loc 1 1580 5 discriminator 1 view .LVU345
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 is_stmt 0 discriminator 1 view .LVU346
movabs rax, -4417276706812531889 # tmp532,
imul rax, QWORD PTR [rdx] # tmp530, MEM[(char * {ref-all})ptr_129]
.LBE7552:
.LBE7551:
# xxhash.h:1669: case 21: PROCESS8_64;
.loc 1 1669 21 discriminator 1 view .LVU347
add rdx, 8 # ptr,
.LBB7555:
.LBB7553:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 discriminator 1 view .LVU348
movabs r8, -7046029288634856825 # tmp534,
# xxhash.h:1580: acc = XXH_rotl64(acc, 31);
.loc 1 1580 10 discriminator 1 view .LVU349
rol rax, 31 # acc,
.LVL94:
.loc 1 1581 5 is_stmt 1 discriminator 1 view .LVU350
.loc 1 1582 5 discriminator 1 view .LVU351
.loc 1 1582 5 is_stmt 0 discriminator 1 view .LVU352
.LBE7553:
.LBE7555:
.loc 1 1669 21 is_stmt 1 discriminator 1 view .LVU353
.loc 1 1669 21 discriminator 1 view .LVU354
.loc 1 1669 21 discriminator 1 view .LVU355
.LBB7556:
.LBB7554:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 is_stmt 0 discriminator 1 view .LVU356
imul rax, r8 # acc, tmp534
.LVL95:
.loc 1 1581 9 discriminator 1 view .LVU357
.LBE7554:
.LBE7556:
# xxhash.h:1669: case 21: PROCESS8_64;
.loc 1 1669 21 discriminator 1 view .LVU358
xor rax, rcx # h64, h64
.LVL96:
.loc 1 1669 21 discriminator 1 view .LVU359
movabs rcx, -8796714831421723037 # tmp538,
rol rax, 27 # tmp536,
.LVL97:
.loc 1 1669 21 discriminator 1 view .LVU360
imul rax, r8 # _40, tmp534
add rcx, rax # h64, _40
.LVL98:
.L22:
.loc 1 1669 21 discriminator 1 view .LVU361
.LBE7557:
.loc 1 1669 32 is_stmt 1 discriminator 1 view .LVU362
.LBB7558:
.loc 1 1671 21 discriminator 1 view .LVU363
.loc 1 1671 21 is_stmt 0 discriminator 1 view .LVU364
.LBE7558:
.loc 1 1562 5 is_stmt 1 discriminator 1 view .LVU365
.LBB7565:
.LBB7559:
.LBI7559:
.loc 1 1577 16 discriminator 1 view .LVU366
.LBB7560:
.loc 1 1579 5 discriminator 1 view .LVU367
.loc 1 1580 5 discriminator 1 view .LVU368
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 is_stmt 0 discriminator 1 view .LVU369
movabs rax, -4417276706812531889 # tmp541,
imul rax, QWORD PTR [rdx] # tmp539, MEM[(char * {ref-all})ptr_130]
.LBE7560:
.LBE7559:
# xxhash.h:1671: case 13: PROCESS8_64;
.loc 1 1671 21 discriminator 1 view .LVU370
add rdx, 8 # ptr,
.LBB7563:
.LBB7561:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 discriminator 1 view .LVU371
movabs r8, -7046029288634856825 # tmp543,
# xxhash.h:1580: acc = XXH_rotl64(acc, 31);
.loc 1 1580 10 discriminator 1 view .LVU372
rol rax, 31 # acc,
.LVL99:
.loc 1 1581 5 is_stmt 1 discriminator 1 view .LVU373
.loc 1 1582 5 discriminator 1 view .LVU374
.loc 1 1582 5 is_stmt 0 discriminator 1 view .LVU375
.LBE7561:
.LBE7563:
.loc 1 1671 21 is_stmt 1 discriminator 1 view .LVU376
.loc 1 1671 21 discriminator 1 view .LVU377
.loc 1 1671 21 discriminator 1 view .LVU378
.LBB7564:
.LBB7562:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 is_stmt 0 discriminator 1 view .LVU379
imul rax, r8 # acc, tmp543
.LVL100:
.loc 1 1581 9 discriminator 1 view .LVU380
.LBE7562:
.LBE7564:
# xxhash.h:1671: case 13: PROCESS8_64;
.loc 1 1671 21 discriminator 1 view .LVU381
xor rax, rcx # h64, h64
.LVL101:
.loc 1 1671 21 discriminator 1 view .LVU382
movabs rcx, -8796714831421723037 # tmp547,
rol rax, 27 # tmp545,
.LVL102:
.loc 1 1671 21 discriminator 1 view .LVU383
imul rax, r8 # _42, tmp543
add rcx, rax # h64, _42
.LVL103:
.L30:
.loc 1 1671 21 discriminator 1 view .LVU384
.LBE7565:
.loc 1 1671 32 is_stmt 1 discriminator 1 view .LVU385
.loc 1 1673 21 discriminator 1 view .LVU386
.loc 1 1059 5 discriminator 1 view .LVU387
.loc 1 1673 21 discriminator 1 view .LVU388
.loc 1 1673 21 discriminator 1 view .LVU389
movabs r9, -7046029288634856825 # tmp550,
mov eax, DWORD PTR [rdx] # MEM[(char * {ref-all})ptr_131], MEM[(char * {ref-all})ptr_131]
# xxhash.h:1674: PROCESS1_64;
.loc 1 1674 21 is_stmt 0 discriminator 1 view .LVU390
movzx edx, BYTE PTR 4[rdx] # MEM[(const xxh_u8 *)ptr_131 + 4B], MEM[(const xxh_u8 *)ptr_131 + 4B]
movabs r10, 2870177450012600261 # tmp557,
# xxhash.h:1673: case 5: PROCESS4_64;
.loc 1 1673 21 discriminator 1 view .LVU391
movabs r8, 1609587929392839161 # tmp554,
imul rax, r9 # tmp549, tmp550
# xxhash.h:1674: PROCESS1_64;
.loc 1 1674 21 discriminator 1 view .LVU392
imul rdx, r10 # tmp556, tmp557
# xxhash.h:1673: case 5: PROCESS4_64;
.loc 1 1673 21 discriminator 1 view .LVU393
xor rcx, rax # h64, tmp549
movabs rax, -4417276706812531889 # tmp553,
rol rcx, 23 # tmp552,
imul rcx, rax # _45, tmp553
add rcx, r8 # h64, tmp554
.LVL104:
.loc 1 1673 32 is_stmt 1 discriminator 1 view .LVU394
.loc 1 1674 21 discriminator 1 view .LVU395
.loc 1 1674 21 discriminator 1 view .LVU396
xor rcx, rdx # h64, tmp556
mov rdx, rcx # h64, h64
rol rdx, 11 # h64,
imul rdx, r9 # _48, tmp550
mov rcx, rdx # h64, _48
jmp .L39 #
.LVL105:
.p2align 4,,10
.p2align 3
.L11:
.LBB7566:
.loc 1 1643 21 view .LVU397
.loc 1 1643 21 is_stmt 0 view .LVU398
.LBE7566:
.loc 1 1562 5 is_stmt 1 view .LVU399
.LBB7573:
.LBB7567:
.LBI7567:
.loc 1 1577 16 view .LVU400
.LBB7568:
.loc 1 1579 5 view .LVU401
.loc 1 1580 5 view .LVU402
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 is_stmt 0 view .LVU403
movabs rax, -4417276706812531889 # tmp421,
imul rax, QWORD PTR [rdx] # tmp419, MEM[(char * {ref-all})ptr_149(D)]
.LBE7568:
.LBE7567:
# xxhash.h:1643: case 24: PROCESS8_64;
.loc 1 1643 21 view .LVU404
add rdx, 8 # ptr,
.LVL106:
.LBB7571:
.LBB7569:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 view .LVU405
movabs r8, -7046029288634856825 # tmp423,
# xxhash.h:1580: acc = XXH_rotl64(acc, 31);
.loc 1 1580 10 view .LVU406
rol rax, 31 # acc,
.LVL107:
.loc 1 1581 5 is_stmt 1 view .LVU407
.loc 1 1582 5 view .LVU408
.loc 1 1582 5 is_stmt 0 view .LVU409
.LBE7569:
.LBE7571:
.loc 1 1643 21 is_stmt 1 view .LVU410
.loc 1 1643 21 view .LVU411
.loc 1 1643 21 view .LVU412
.LBB7572:
.LBB7570:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 is_stmt 0 view .LVU413
imul rax, r8 # acc, tmp423
.LVL108:
.loc 1 1581 9 view .LVU414
.LBE7570:
.LBE7572:
# xxhash.h:1643: case 24: PROCESS8_64;
.loc 1 1643 21 view .LVU415
xor rax, rcx # h64, h64
.LVL109:
.loc 1 1643 21 view .LVU416
movabs rcx, -8796714831421723037 # tmp427,
rol rax, 27 # tmp425,
.LVL110:
.loc 1 1643 21 view .LVU417
imul rax, r8 # _14, tmp423
add rcx, rax # h64, _14
.LVL111:
.L19:
.loc 1 1643 21 view .LVU418
.LBE7573:
.loc 1 1643 32 is_stmt 1 discriminator 1 view .LVU419
.LBB7574:
.loc 1 1645 21 discriminator 1 view .LVU420
.loc 1 1645 21 is_stmt 0 discriminator 1 view .LVU421
.LBE7574:
.loc 1 1562 5 is_stmt 1 discriminator 1 view .LVU422
.LBB7581:
.LBB7575:
.LBI7575:
.loc 1 1577 16 discriminator 1 view .LVU423
.LBB7576:
.loc 1 1579 5 discriminator 1 view .LVU424
.loc 1 1580 5 discriminator 1 view .LVU425
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 is_stmt 0 discriminator 1 view .LVU426
movabs rax, -4417276706812531889 # tmp430,
imul rax, QWORD PTR [rdx] # tmp428, MEM[(char * {ref-all})ptr_122]
.LBE7576:
.LBE7575:
# xxhash.h:1645: case 16: PROCESS8_64;
.loc 1 1645 21 discriminator 1 view .LVU427
add rdx, 8 # ptr,
.LBB7579:
.LBB7577:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 discriminator 1 view .LVU428
movabs r8, -7046029288634856825 # tmp432,
# xxhash.h:1580: acc = XXH_rotl64(acc, 31);
.loc 1 1580 10 discriminator 1 view .LVU429
rol rax, 31 # acc,
.LVL112:
.loc 1 1581 5 is_stmt 1 discriminator 1 view .LVU430
.loc 1 1582 5 discriminator 1 view .LVU431
.loc 1 1582 5 is_stmt 0 discriminator 1 view .LVU432
.LBE7577:
.LBE7579:
.loc 1 1645 21 is_stmt 1 discriminator 1 view .LVU433
.loc 1 1645 21 discriminator 1 view .LVU434
.loc 1 1645 21 discriminator 1 view .LVU435
.LBB7580:
.LBB7578:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 is_stmt 0 discriminator 1 view .LVU436
imul rax, r8 # acc, tmp432
.LVL113:
.loc 1 1581 9 discriminator 1 view .LVU437
.LBE7578:
.LBE7580:
# xxhash.h:1645: case 16: PROCESS8_64;
.loc 1 1645 21 discriminator 1 view .LVU438
xor rax, rcx # h64, h64
.LVL114:
.loc 1 1645 21 discriminator 1 view .LVU439
movabs rcx, -8796714831421723037 # tmp436,
rol rax, 27 # tmp434,
.LVL115:
.loc 1 1645 21 discriminator 1 view .LVU440
imul rax, r8 # _16, tmp432
add rcx, rax # h64, _16
.LVL116:
.L27:
.loc 1 1645 21 discriminator 1 view .LVU441
.LBE7581:
.loc 1 1645 32 is_stmt 1 discriminator 1 view .LVU442
.LBB7582:
.loc 1 1647 21 discriminator 1 view .LVU443
.loc 1 1647 21 is_stmt 0 discriminator 1 view .LVU444
.LBE7582:
.loc 1 1562 5 is_stmt 1 discriminator 1 view .LVU445
.LBB7587:
.LBB7583:
.LBI7583:
.loc 1 1577 16 discriminator 1 view .LVU446
.LBB7584:
.loc 1 1579 5 discriminator 1 view .LVU447
.loc 1 1580 5 discriminator 1 view .LVU448
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 is_stmt 0 discriminator 1 view .LVU449
movabs r8, -4417276706812531889 # tmp439,
mov rax, QWORD PTR [rdx] # tmp437, MEM[(char * {ref-all})ptr_123]
imul rax, r8 # tmp437, tmp439
mov rdx, rax # tmp437, tmp437
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 discriminator 1 view .LVU450
movabs rax, -7046029288634856825 # tmp441,
# xxhash.h:1580: acc = XXH_rotl64(acc, 31);
.loc 1 1580 10 discriminator 1 view .LVU451
rol rdx, 31 # acc,
.LVL117:
.loc 1 1581 5 is_stmt 1 discriminator 1 view .LVU452
.loc 1 1582 5 discriminator 1 view .LVU453
.loc 1 1582 5 is_stmt 0 discriminator 1 view .LVU454
.LBE7584:
.LBE7583:
.loc 1 1647 21 is_stmt 1 discriminator 1 view .LVU455
.loc 1 1647 21 discriminator 1 view .LVU456
.loc 1 1647 21 discriminator 1 view .LVU457
.LBB7586:
.LBB7585:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 is_stmt 0 discriminator 1 view .LVU458
imul rdx, rax # acc, tmp441
.LVL118:
.loc 1 1581 9 discriminator 1 view .LVU459
.LBE7585:
.LBE7586:
# xxhash.h:1647: case 8: PROCESS8_64;
.loc 1 1647 21 discriminator 1 view .LVU460
xor rdx, rcx # h64, h64
.LVL119:
.loc 1 1647 21 discriminator 1 view .LVU461
rol rdx, 27 # tmp443,
.LVL120:
.loc 1 1647 21 discriminator 1 view .LVU462
imul rdx, rax # _18, tmp441
movabs rax, -8796714831421723037 # tmp445,
add rdx, rax # h64, tmp445
.LVL121:
.loc 1 1647 21 discriminator 1 view .LVU463
.LBE7587:
.loc 1 1647 32 is_stmt 1 discriminator 1 view .LVU464
.loc 1 1648 21 discriminator 1 view .LVU465
.LBB7588:
.LBI7588:
.loc 1 1593 16 discriminator 1 view .LVU466
.LBB7589:
.loc 1 1595 5 discriminator 1 view .LVU467
# xxhash.h:1595: h64 ^= h64 >> 33;
.loc 1 1595 16 is_stmt 0 discriminator 1 view .LVU468
mov rax, rdx # tmp446, h64
shr rax, 33 # tmp446,
# xxhash.h:1595: h64 ^= h64 >> 33;
.loc 1 1595 9 discriminator 1 view .LVU469
xor rax, rdx # h64, h64
.LVL122:
.loc 1 1596 5 is_stmt 1 discriminator 1 view .LVU470
.L38:
.loc 1 1596 5 is_stmt 0 discriminator 1 view .LVU471
.LBE7589:
.LBE7588:
.LBB7590:
.LBB7591:
.loc 1 1596 5 is_stmt 1 discriminator 1 view .LVU472
# xxhash.h:1596: h64 *= PRIME64_2;
.loc 1 1596 9 is_stmt 0 discriminator 1 view .LVU473
imul rax, r8 # h64, tmp506
.LVL123:
.loc 1 1597 5 is_stmt 1 discriminator 1 view .LVU474
# xxhash.h:1597: h64 ^= h64 >> 29;
.loc 1 1597 16 is_stmt 0 discriminator 1 view .LVU475
mov rdx, rax # _379, h64
shr rdx, 29 # _379,
# xxhash.h:1597: h64 ^= h64 >> 29;
.loc 1 1597 9 discriminator 1 view .LVU476
xor rax, rdx # h64, _379
.LVL124:
.loc 1 1598 5 is_stmt 1 discriminator 1 view .LVU477
# xxhash.h:1598: h64 *= PRIME64_3;
.loc 1 1598 9 is_stmt 0 discriminator 1 view .LVU478
movabs rdx, 1609587929392839161 # tmp520,
imul rax, rdx # h64, tmp520
.LVL125:
.loc 1 1599 5 is_stmt 1 discriminator 1 view .LVU479
# xxhash.h:1599: h64 ^= h64 >> 32;
.loc 1 1599 16 is_stmt 0 discriminator 1 view .LVU480
mov rdx, rax # _382, h64
shr rdx, 32 # _382,
# xxhash.h:1599: h64 ^= h64 >> 32;
.loc 1 1599 9 discriminator 1 view .LVU481
xor rax, rdx # <retval>, _382
.LVL126:
.loc 1 1600 5 is_stmt 1 discriminator 1 view .LVU482
.loc 1 1600 5 is_stmt 0 discriminator 1 view .LVU483
.LBE7591:
.LBE7590:
# xxhash.h:1727: }
.loc 1 1727 1 discriminator 1 view .LVU484
ret
.LVL127:
.p2align 4,,10
.p2align 3
.L10:
.LBB7593:
.loc 1 1659 21 is_stmt 1 view .LVU485
.loc 1 1659 21 is_stmt 0 view .LVU486
.LBE7593:
.loc 1 1562 5 is_stmt 1 view .LVU487
.LBB7600:
.LBB7594:
.LBI7594:
.loc 1 1577 16 view .LVU488
.LBB7595:
.loc 1 1579 5 view .LVU489
.loc 1 1580 5 view .LVU490
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 is_stmt 0 view .LVU491
movabs rax, -4417276706812531889 # tmp488,
imul rax, QWORD PTR [rdx] # tmp486, MEM[(char * {ref-all})ptr_149(D)]
.LBE7595:
.LBE7594:
# xxhash.h:1659: case 25: PROCESS8_64;
.loc 1 1659 21 view .LVU492
add rdx, 8 # ptr,
.LVL128:
.LBB7598:
.LBB7596:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 view .LVU493
movabs r8, -7046029288634856825 # tmp490,
# xxhash.h:1580: acc = XXH_rotl64(acc, 31);
.loc 1 1580 10 view .LVU494
rol rax, 31 # acc,
.LVL129:
.loc 1 1581 5 is_stmt 1 view .LVU495
.loc 1 1582 5 view .LVU496
.loc 1 1582 5 is_stmt 0 view .LVU497
.LBE7596:
.LBE7598:
.loc 1 1659 21 is_stmt 1 view .LVU498
.loc 1 1659 21 view .LVU499
.loc 1 1659 21 view .LVU500
.LBB7599:
.LBB7597:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 is_stmt 0 view .LVU501
imul rax, r8 # acc, tmp490
.LVL130:
.loc 1 1581 9 view .LVU502
.LBE7597:
.LBE7599:
# xxhash.h:1659: case 25: PROCESS8_64;
.loc 1 1659 21 view .LVU503
xor rax, rcx # h64, h64
.LVL131:
.loc 1 1659 21 view .LVU504
movabs rcx, -8796714831421723037 # tmp494,
rol rax, 27 # tmp492,
.LVL132:
.loc 1 1659 21 view .LVU505
imul rax, r8 # _29, tmp490
add rcx, rax # h64, _29
.LVL133:
.L18:
.loc 1 1659 21 view .LVU506
.LBE7600:
.loc 1 1659 32 is_stmt 1 discriminator 1 view .LVU507
.LBB7601:
.loc 1 1661 21 discriminator 1 view .LVU508
.loc 1 1661 21 is_stmt 0 discriminator 1 view .LVU509
.LBE7601:
.loc 1 1562 5 is_stmt 1 discriminator 1 view .LVU510
.LBB7608:
.LBB7602:
.LBI7602:
.loc 1 1577 16 discriminator 1 view .LVU511
.LBB7603:
.loc 1 1579 5 discriminator 1 view .LVU512
.loc 1 1580 5 discriminator 1 view .LVU513
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 is_stmt 0 discriminator 1 view .LVU514
movabs rax, -4417276706812531889 # tmp497,
imul rax, QWORD PTR [rdx] # tmp495, MEM[(char * {ref-all})ptr_127]
.LBE7603:
.LBE7602:
# xxhash.h:1661: case 17: PROCESS8_64;
.loc 1 1661 21 discriminator 1 view .LVU515
add rdx, 8 # ptr,
.LBB7606:
.LBB7604:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 discriminator 1 view .LVU516
movabs r8, -7046029288634856825 # tmp499,
# xxhash.h:1580: acc = XXH_rotl64(acc, 31);
.loc 1 1580 10 discriminator 1 view .LVU517
rol rax, 31 # acc,
.LVL134:
.loc 1 1581 5 is_stmt 1 discriminator 1 view .LVU518
.loc 1 1582 5 discriminator 1 view .LVU519
.loc 1 1582 5 is_stmt 0 discriminator 1 view .LVU520
.LBE7604:
.LBE7606:
.loc 1 1661 21 is_stmt 1 discriminator 1 view .LVU521
.loc 1 1661 21 discriminator 1 view .LVU522
.loc 1 1661 21 discriminator 1 view .LVU523
.LBB7607:
.LBB7605:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 is_stmt 0 discriminator 1 view .LVU524
imul rax, r8 # acc, tmp499
.LVL135:
.loc 1 1581 9 discriminator 1 view .LVU525
.LBE7605:
.LBE7607:
# xxhash.h:1661: case 17: PROCESS8_64;
.loc 1 1661 21 discriminator 1 view .LVU526
xor rax, rcx # h64, h64
.LVL136:
.loc 1 1661 21 discriminator 1 view .LVU527
movabs rcx, -8796714831421723037 # tmp503,
rol rax, 27 # tmp501,
.LVL137:
.loc 1 1661 21 discriminator 1 view .LVU528
imul rax, r8 # _31, tmp499
add rcx, rax # h64, _31
.LVL138:
.L26:
.loc 1 1661 21 discriminator 1 view .LVU529
.LBE7608:
.loc 1 1661 32 is_stmt 1 discriminator 1 view .LVU530
.LBB7609:
.loc 1 1663 21 discriminator 1 view .LVU531
.loc 1 1663 21 is_stmt 0 discriminator 1 view .LVU532
.LBE7609:
.loc 1 1562 5 is_stmt 1 discriminator 1 view .LVU533
.LBB7616:
.LBB7610:
.LBI7610:
.loc 1 1577 16 discriminator 1 view .LVU534
.LBB7611:
.loc 1 1579 5 discriminator 1 view .LVU535
.loc 1 1580 5 discriminator 1 view .LVU536
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 is_stmt 0 discriminator 1 view .LVU537
movabs r8, -4417276706812531889 # tmp506,
mov rax, QWORD PTR [rdx] # tmp504, MEM[(char * {ref-all})ptr_128]
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 discriminator 1 view .LVU538
movabs r9, -7046029288634856825 # tmp508,
.LBE7611:
.LBE7610:
.LBE7616:
# xxhash.h:1664: PROCESS1_64;
.loc 1 1664 21 discriminator 1 view .LVU539
movzx edx, BYTE PTR 8[rdx] # MEM[(const xxh_u8 *)ptr_128 + 8B], MEM[(const xxh_u8 *)ptr_128 + 8B]
.LBB7617:
.LBB7614:
.LBB7612:
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 discriminator 1 view .LVU540
imul rax, r8 # tmp504, tmp506
# xxhash.h:1580: acc = XXH_rotl64(acc, 31);
.loc 1 1580 10 discriminator 1 view .LVU541
rol rax, 31 # acc,
.LVL139:
.loc 1 1581 5 is_stmt 1 discriminator 1 view .LVU542
.loc 1 1582 5 discriminator 1 view .LVU543
.loc 1 1582 5 is_stmt 0 discriminator 1 view .LVU544
.LBE7612:
.LBE7614:
.loc 1 1663 21 is_stmt 1 discriminator 1 view .LVU545
.loc 1 1663 21 discriminator 1 view .LVU546
.loc 1 1663 21 discriminator 1 view .LVU547
.LBB7615:
.LBB7613:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 is_stmt 0 discriminator 1 view .LVU548
imul rax, r9 # acc, tmp508
.LVL140:
.loc 1 1581 9 discriminator 1 view .LVU549
.LBE7613:
.LBE7615:
# xxhash.h:1663: case 9: PROCESS8_64;
.loc 1 1663 21 discriminator 1 view .LVU550
xor rcx, rax # h64, acc
.LVL141:
.loc 1 1663 21 discriminator 1 view .LVU551
movabs rax, -8796714831421723037 # tmp512,
.LVL142:
.loc 1 1663 21 discriminator 1 view .LVU552
rol rcx, 27 # tmp510,
.LVL143:
.loc 1 1663 21 discriminator 1 view .LVU553
imul rcx, r9 # _33, tmp508
add rcx, rax # h64, tmp512
.LVL144:
.loc 1 1663 21 discriminator 1 view .LVU554
.LBE7617:
.loc 1 1663 32 is_stmt 1 discriminator 1 view .LVU555
.loc 1 1664 21 discriminator 1 view .LVU556
.loc 1 1664 21 discriminator 1 view .LVU557
movabs rax, 2870177450012600261 # tmp515,
imul rdx, rax # tmp514, tmp515
xor rcx, rdx # h64, tmp514
rol rcx, 11 # _36,
imul rcx, r9 # h64, tmp508
.LVL145:
.loc 1 1664 32 discriminator 1 view .LVU558
.loc 1 1665 21 discriminator 1 view .LVU559
.LBB7618:
.LBI7590:
.loc 1 1593 16 discriminator 1 view .LVU560
.LBB7592:
.loc 1 1595 5 discriminator 1 view .LVU561
# xxhash.h:1595: h64 ^= h64 >> 33;
.loc 1 1595 16 is_stmt 0 discriminator 1 view .LVU562
mov rax, rcx # tmp518, h64
shr rax, 33 # tmp518,
# xxhash.h:1595: h64 ^= h64 >> 33;
.loc 1 1595 9 discriminator 1 view .LVU563
xor rax, rcx # h64, h64
jmp .L38 #
.LVL146:
.p2align 4,,10
.p2align 3
.L9:
.loc 1 1595 9 discriminator 1 view .LVU564
.LBE7592:
.LBE7618:
.LBB7619:
.loc 1 1677 21 is_stmt 1 view .LVU565
.loc 1 1677 21 is_stmt 0 view .LVU566
.LBE7619:
.loc 1 1562 5 is_stmt 1 view .LVU567
.LBB7626:
.LBB7620:
.LBI7620:
.loc 1 1577 16 view .LVU568
.LBB7621:
.loc 1 1579 5 view .LVU569
.loc 1 1580 5 view .LVU570
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 is_stmt 0 view .LVU571
movabs rax, -4417276706812531889 # tmp565,
imul rax, QWORD PTR [rdx] # tmp563, MEM[(char * {ref-all})ptr_149(D)]
.LBE7621:
.LBE7620:
# xxhash.h:1677: case 26: PROCESS8_64;
.loc 1 1677 21 view .LVU572
add rdx, 8 # ptr,
.LVL147:
.LBB7624:
.LBB7622:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 view .LVU573
movabs r8, -7046029288634856825 # tmp567,
# xxhash.h:1580: acc = XXH_rotl64(acc, 31);
.loc 1 1580 10 view .LVU574
rol rax, 31 # acc,
.LVL148:
.loc 1 1581 5 is_stmt 1 view .LVU575
.loc 1 1582 5 view .LVU576
.loc 1 1582 5 is_stmt 0 view .LVU577
.LBE7622:
.LBE7624:
.loc 1 1677 21 is_stmt 1 view .LVU578
.loc 1 1677 21 view .LVU579
.loc 1 1677 21 view .LVU580
.LBB7625:
.LBB7623:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 is_stmt 0 view .LVU581
imul rax, r8 # acc, tmp567
.LVL149:
.loc 1 1581 9 view .LVU582
.LBE7623:
.LBE7625:
# xxhash.h:1677: case 26: PROCESS8_64;
.loc 1 1677 21 view .LVU583
xor rax, rcx # h64, h64
.LVL150:
.loc 1 1677 21 view .LVU584
movabs rcx, -8796714831421723037 # tmp571,
rol rax, 27 # tmp569,
.LVL151:
.loc 1 1677 21 view .LVU585
imul rax, r8 # _50, tmp567
add rcx, rax # h64, _50
.LVL152:
.L17:
.loc 1 1677 21 view .LVU586
.LBE7626:
.loc 1 1677 32 is_stmt 1 discriminator 1 view .LVU587
.LBB7627:
.loc 1 1679 21 discriminator 1 view .LVU588
.loc 1 1679 21 is_stmt 0 discriminator 1 view .LVU589
.LBE7627:
.loc 1 1562 5 is_stmt 1 discriminator 1 view .LVU590
.LBB7634:
.LBB7628:
.LBI7628:
.loc 1 1577 16 discriminator 1 view .LVU591
.LBB7629:
.loc 1 1579 5 discriminator 1 view .LVU592
.loc 1 1580 5 discriminator 1 view .LVU593
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 is_stmt 0 discriminator 1 view .LVU594
movabs rax, -4417276706812531889 # tmp574,
imul rax, QWORD PTR [rdx] # tmp572, MEM[(char * {ref-all})ptr_132]
.LBE7629:
.LBE7628:
# xxhash.h:1679: case 18: PROCESS8_64;
.loc 1 1679 21 discriminator 1 view .LVU595
add rdx, 8 # ptr,
.LBB7632:
.LBB7630:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 discriminator 1 view .LVU596
movabs r8, -7046029288634856825 # tmp576,
# xxhash.h:1580: acc = XXH_rotl64(acc, 31);
.loc 1 1580 10 discriminator 1 view .LVU597
rol rax, 31 # acc,
.LVL153:
.loc 1 1581 5 is_stmt 1 discriminator 1 view .LVU598
.loc 1 1582 5 discriminator 1 view .LVU599
.loc 1 1582 5 is_stmt 0 discriminator 1 view .LVU600
.LBE7630:
.LBE7632:
.loc 1 1679 21 is_stmt 1 discriminator 1 view .LVU601
.loc 1 1679 21 discriminator 1 view .LVU602
.loc 1 1679 21 discriminator 1 view .LVU603
.LBB7633:
.LBB7631:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 is_stmt 0 discriminator 1 view .LVU604
imul rax, r8 # acc, tmp576
.LVL154:
.loc 1 1581 9 discriminator 1 view .LVU605
.LBE7631:
.LBE7633:
# xxhash.h:1679: case 18: PROCESS8_64;
.loc 1 1679 21 discriminator 1 view .LVU606
xor rax, rcx # h64, h64
.LVL155:
.loc 1 1679 21 discriminator 1 view .LVU607
movabs rcx, -8796714831421723037 # tmp580,
rol rax, 27 # tmp578,
.LVL156:
.loc 1 1679 21 discriminator 1 view .LVU608
imul rax, r8 # _52, tmp576
add rcx, rax # h64, _52
.LVL157:
.L25:
.loc 1 1679 21 discriminator 1 view .LVU609
.LBE7634:
.loc 1 1679 32 is_stmt 1 discriminator 1 view .LVU610
.LBB7635:
.loc 1 1681 21 discriminator 1 view .LVU611
.loc 1 1681 21 is_stmt 0 discriminator 1 view .LVU612
.LBE7635:
.loc 1 1562 5 is_stmt 1 discriminator 1 view .LVU613
.LBB7642:
.LBB7636:
.LBI7636:
.loc 1 1577 16 discriminator 1 view .LVU614
.LBB7637:
.loc 1 1579 5 discriminator 1 view .LVU615
.loc 1 1580 5 discriminator 1 view .LVU616
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 is_stmt 0 discriminator 1 view .LVU617
movabs r8, -4417276706812531889 # tmp583,
mov rax, QWORD PTR [rdx] # tmp581, MEM[(char * {ref-all})ptr_133]
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 discriminator 1 view .LVU618
movabs r9, -7046029288634856825 # tmp585,
.LBE7637:
.LBE7636:
.LBE7642:
# xxhash.h:1682: PROCESS1_64;
.loc 1 1682 21 discriminator 1 view .LVU619
movabs r10, 2870177450012600261 # tmp592,
.LBB7643:
.LBB7640:
.LBB7638:
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 discriminator 1 view .LVU620
imul rax, r8 # tmp581, tmp583
# xxhash.h:1580: acc = XXH_rotl64(acc, 31);
.loc 1 1580 10 discriminator 1 view .LVU621
rol rax, 31 # acc,
.LVL158:
.loc 1 1581 5 is_stmt 1 discriminator 1 view .LVU622
.loc 1 1582 5 discriminator 1 view .LVU623
.loc 1 1582 5 is_stmt 0 discriminator 1 view .LVU624
.LBE7638:
.LBE7640:
.loc 1 1681 21 is_stmt 1 discriminator 1 view .LVU625
.loc 1 1681 21 discriminator 1 view .LVU626
.loc 1 1681 21 discriminator 1 view .LVU627
.LBB7641:
.LBB7639:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 is_stmt 0 discriminator 1 view .LVU628
imul rax, r9 # acc, tmp585
.LVL159:
.loc 1 1581 9 discriminator 1 view .LVU629
.LBE7639:
.LBE7641:
# xxhash.h:1681: case 10: PROCESS8_64;
.loc 1 1681 21 discriminator 1 view .LVU630
xor rcx, rax # h64, acc
.LVL160:
.loc 1 1681 21 discriminator 1 view .LVU631
movabs rax, -8796714831421723037 # tmp589,
.LVL161:
.loc 1 1681 21 discriminator 1 view .LVU632
rol rcx, 27 # tmp587,
.LVL162:
.loc 1 1681 21 discriminator 1 view .LVU633
imul rcx, r9 # _54, tmp585
add rcx, rax # h64, tmp589
.LVL163:
.loc 1 1681 21 discriminator 1 view .LVU634
.LBE7643:
.loc 1 1681 32 is_stmt 1 discriminator 1 view .LVU635
.loc 1 1682 21 discriminator 1 view .LVU636
.loc 1 1682 21 discriminator 1 view .LVU637
movzx eax, BYTE PTR 8[rdx] # MEM[(const xxh_u8 *)ptr_133 + 8B], MEM[(const xxh_u8 *)ptr_133 + 8B]
# xxhash.h:1683: PROCESS1_64;
.loc 1 1683 21 is_stmt 0 discriminator 1 view .LVU638
movzx edx, BYTE PTR 9[rdx] # MEM[(const xxh_u8 *)ptr_133 + 9B], MEM[(const xxh_u8 *)ptr_133 + 9B]
.LVL164:
# xxhash.h:1682: PROCESS1_64;
.loc 1 1682 21 discriminator 1 view .LVU639
imul rax, r10 # tmp591, tmp592
xor rax, rcx # h64, h64
rol rax, 11 # _57,
imul rax, r9 # h64, tmp585
.LVL165:
.loc 1 1682 32 is_stmt 1 discriminator 1 view .LVU640
.loc 1 1683 21 discriminator 1 view .LVU641
.loc 1 1683 21 discriminator 1 view .LVU642
.L40:
# xxhash.h:1704: PROCESS1_64;
.loc 1 1704 21 is_stmt 0 discriminator 1 view .LVU643
imul rdx, r10 # tmp688, tmp679
xor rdx, rax # h64, h64
mov rax, rdx # h64, h64
rol rax, 11 # h64,
imul rax, r9 # _90, tmp672
mov rdx, rax # h64, _90
.LVL166:
.loc 1 1704 32 is_stmt 1 discriminator 1 view .LVU644
.loc 1 1705 21 discriminator 1 view .LVU645
.LBB7644:
.LBI7644:
.loc 1 1593 16 discriminator 1 view .LVU646
.LBB7645:
.loc 1 1595 5 discriminator 1 view .LVU647
# xxhash.h:1595: h64 ^= h64 >> 33;
.loc 1 1595 16 is_stmt 0 discriminator 1 view .LVU648
shr rax, 33 # tmp692,
.LVL167:
# xxhash.h:1595: h64 ^= h64 >> 33;
.loc 1 1595 9 discriminator 1 view .LVU649
xor rax, rdx # h64, h64
.LVL168:
.loc 1 1596 5 is_stmt 1 discriminator 1 view .LVU650
jmp .L38 #
.LVL169:
.p2align 4,,10
.p2align 3
.L8:
.loc 1 1596 5 is_stmt 0 discriminator 1 view .LVU651
.LBE7645:
.LBE7644:
.LBB7646:
.loc 1 1697 21 is_stmt 1 view .LVU652
.loc 1 1697 21 is_stmt 0 view .LVU653
.LBE7646:
.loc 1 1562 5 is_stmt 1 view .LVU654
.LBB7653:
.LBB7647:
.LBI7647:
.loc 1 1577 16 view .LVU655
.LBB7648:
.loc 1 1579 5 view .LVU656
.loc 1 1580 5 view .LVU657
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 is_stmt 0 view .LVU658
movabs rax, -4417276706812531889 # tmp652,
imul rax, QWORD PTR [rdx] # tmp650, MEM[(char * {ref-all})ptr_149(D)]
.LBE7648:
.LBE7647:
# xxhash.h:1697: case 27: PROCESS8_64;
.loc 1 1697 21 view .LVU659
add rdx, 8 # ptr,
.LVL170:
.LBB7651:
.LBB7649:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 view .LVU660
movabs r8, -7046029288634856825 # tmp654,
# xxhash.h:1580: acc = XXH_rotl64(acc, 31);
.loc 1 1580 10 view .LVU661
rol rax, 31 # acc,
.LVL171:
.loc 1 1581 5 is_stmt 1 view .LVU662
.loc 1 1582 5 view .LVU663
.loc 1 1582 5 is_stmt 0 view .LVU664
.LBE7649:
.LBE7651:
.loc 1 1697 21 is_stmt 1 view .LVU665
.loc 1 1697 21 view .LVU666
.loc 1 1697 21 view .LVU667
.LBB7652:
.LBB7650:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 is_stmt 0 view .LVU668
imul rax, r8 # acc, tmp654
.LVL172:
.loc 1 1581 9 view .LVU669
.LBE7650:
.LBE7652:
# xxhash.h:1697: case 27: PROCESS8_64;
.loc 1 1697 21 view .LVU670
xor rax, rcx # h64, h64
.LVL173:
.loc 1 1697 21 view .LVU671
movabs rcx, -8796714831421723037 # tmp658,
rol rax, 27 # tmp656,
.LVL174:
.loc 1 1697 21 view .LVU672
imul rax, r8 # _77, tmp654
add rcx, rax # h64, _77
.LVL175:
.L16:
.loc 1 1697 21 view .LVU673
.LBE7653:
.loc 1 1697 32 is_stmt 1 discriminator 1 view .LVU674
.LBB7654:
.loc 1 1699 21 discriminator 1 view .LVU675
.loc 1 1699 21 is_stmt 0 discriminator 1 view .LVU676
.LBE7654:
.loc 1 1562 5 is_stmt 1 discriminator 1 view .LVU677
.LBB7661:
.LBB7655:
.LBI7655:
.loc 1 1577 16 discriminator 1 view .LVU678
.LBB7656:
.loc 1 1579 5 discriminator 1 view .LVU679
.loc 1 1580 5 discriminator 1 view .LVU680
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 is_stmt 0 discriminator 1 view .LVU681
movabs rax, -4417276706812531889 # tmp661,
imul rax, QWORD PTR [rdx] # tmp659, MEM[(char * {ref-all})ptr_137]
.LBE7656:
.LBE7655:
# xxhash.h:1699: case 19: PROCESS8_64;
.loc 1 1699 21 discriminator 1 view .LVU682
add rdx, 8 # ptr,
.LBB7659:
.LBB7657:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 discriminator 1 view .LVU683
movabs r8, -7046029288634856825 # tmp663,
# xxhash.h:1580: acc = XXH_rotl64(acc, 31);
.loc 1 1580 10 discriminator 1 view .LVU684
rol rax, 31 # acc,
.LVL176:
.loc 1 1581 5 is_stmt 1 discriminator 1 view .LVU685
.loc 1 1582 5 discriminator 1 view .LVU686
.loc 1 1582 5 is_stmt 0 discriminator 1 view .LVU687
.LBE7657:
.LBE7659:
.loc 1 1699 21 is_stmt 1 discriminator 1 view .LVU688
.loc 1 1699 21 discriminator 1 view .LVU689
.loc 1 1699 21 discriminator 1 view .LVU690
.LBB7660:
.LBB7658:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 is_stmt 0 discriminator 1 view .LVU691
imul rax, r8 # acc, tmp663
.LVL177:
.loc 1 1581 9 discriminator 1 view .LVU692
.LBE7658:
.LBE7660:
# xxhash.h:1699: case 19: PROCESS8_64;
.loc 1 1699 21 discriminator 1 view .LVU693
xor rax, rcx # h64, h64
.LVL178:
.loc 1 1699 21 discriminator 1 view .LVU694
movabs rcx, -8796714831421723037 # tmp667,
rol rax, 27 # tmp665,
.LVL179:
.loc 1 1699 21 discriminator 1 view .LVU695
imul rax, r8 # _79, tmp663
add rcx, rax # h64, _79
.LVL180:
.L24:
.loc 1 1699 21 discriminator 1 view .LVU696
.LBE7661:
.loc 1 1699 32 is_stmt 1 discriminator 1 view .LVU697
.LBB7662:
.loc 1 1701 21 discriminator 1 view .LVU698
.loc 1 1701 21 is_stmt 0 discriminator 1 view .LVU699
.LBE7662:
.loc 1 1562 5 is_stmt 1 discriminator 1 view .LVU700
.LBB7669:
.LBB7663:
.LBI7663:
.loc 1 1577 16 discriminator 1 view .LVU701
.LBB7664:
.loc 1 1579 5 discriminator 1 view .LVU702
.loc 1 1580 5 discriminator 1 view .LVU703
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 is_stmt 0 discriminator 1 view .LVU704
movabs r8, -4417276706812531889 # tmp670,
mov rax, QWORD PTR [rdx] # tmp668, MEM[(char * {ref-all})ptr_138]
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 discriminator 1 view .LVU705
movabs r9, -7046029288634856825 # tmp672,
.LBE7664:
.LBE7663:
.LBE7669:
# xxhash.h:1702: PROCESS1_64;
.loc 1 1702 21 discriminator 1 view .LVU706
movabs r10, 2870177450012600261 # tmp679,
.LBB7670:
.LBB7667:
.LBB7665:
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 discriminator 1 view .LVU707
imul rax, r8 # tmp668, tmp670
# xxhash.h:1580: acc = XXH_rotl64(acc, 31);
.loc 1 1580 10 discriminator 1 view .LVU708
rol rax, 31 # acc,
.LVL181:
.loc 1 1581 5 is_stmt 1 discriminator 1 view .LVU709
.loc 1 1582 5 discriminator 1 view .LVU710
.loc 1 1582 5 is_stmt 0 discriminator 1 view .LVU711
.LBE7665:
.LBE7667:
.loc 1 1701 21 is_stmt 1 discriminator 1 view .LVU712
.loc 1 1701 21 discriminator 1 view .LVU713
.loc 1 1701 21 discriminator 1 view .LVU714
.LBB7668:
.LBB7666:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 is_stmt 0 discriminator 1 view .LVU715
imul rax, r9 # acc, tmp672
.LVL182:
.loc 1 1581 9 discriminator 1 view .LVU716
.LBE7666:
.LBE7668:
# xxhash.h:1701: case 11: PROCESS8_64;
.loc 1 1701 21 discriminator 1 view .LVU717
xor rcx, rax # h64, acc
.LVL183:
.loc 1 1701 21 discriminator 1 view .LVU718
movabs rax, -8796714831421723037 # tmp676,
.LVL184:
.loc 1 1701 21 discriminator 1 view .LVU719
rol rcx, 27 # tmp674,
.LVL185:
.loc 1 1701 21 discriminator 1 view .LVU720
imul rcx, r9 # _81, tmp672
add rcx, rax # h64, tmp676
.LVL186:
.loc 1 1701 21 discriminator 1 view .LVU721
.LBE7670:
.loc 1 1701 32 is_stmt 1 discriminator 1 view .LVU722
.loc 1 1702 21 discriminator 1 view .LVU723
.loc 1 1702 21 discriminator 1 view .LVU724
movzx eax, BYTE PTR 8[rdx] # MEM[(const xxh_u8 *)ptr_138 + 8B], MEM[(const xxh_u8 *)ptr_138 + 8B]
imul rax, r10 # tmp678, tmp679
xor rcx, rax # h64, tmp678
mov rax, rcx # h64, h64
rol rax, 11 # h64,
imul rax, r9 # _84, tmp672
mov rcx, rax # h64, _84
.LVL187:
.loc 1 1702 32 discriminator 1 view .LVU725
.loc 1 1703 21 discriminator 1 view .LVU726
.loc 1 1703 21 discriminator 1 view .LVU727
movzx eax, BYTE PTR 9[rdx] # MEM[(const xxh_u8 *)ptr_138 + 9B], MEM[(const xxh_u8 *)ptr_138 + 9B]
# xxhash.h:1704: PROCESS1_64;
.loc 1 1704 21 is_stmt 0 discriminator 1 view .LVU728
movzx edx, BYTE PTR 10[rdx] # MEM[(const xxh_u8 *)ptr_138 + 10B], MEM[(const xxh_u8 *)ptr_138 + 10B]
.LVL188:
# xxhash.h:1703: PROCESS1_64;
.loc 1 1703 21 discriminator 1 view .LVU729
imul rax, r10 # tmp683, tmp679
xor rax, rcx # h64, h64
rol rax, 11 # _87,
imul rax, r9 # h64, tmp672
.LVL189:
.loc 1 1703 32 is_stmt 1 discriminator 1 view .LVU730
.loc 1 1704 21 discriminator 1 view .LVU731
.loc 1 1704 21 discriminator 1 view .LVU732
jmp .L40 #
.LVL190:
.p2align 4,,10
.p2align 3
.L36:
# xxhash.h:1642: switch(len & 31) {
.loc 1 1642 20 is_stmt 0 view .LVU733
mov r8, rdx # ptr, ptr
jmp .L33 #
.cfi_endproc
.LFE43:
.seh_endproc
.p2align 4
.def XXH3_mergeAccs; .scl 3; .type 32; .endef
.seh_proc XXH3_mergeAccs
XXH3_mergeAccs:
.LVL191:
.LFB5336:
.file 2 "xxh3.h"
.loc 2 1333 1 is_stmt 1 view -0
.cfi_startproc
.loc 2 1333 1 is_stmt 0 view .LVU735
push rdi #
.seh_pushreg rdi
.cfi_def_cfa_offset 16
.cfi_offset 5, -16
push rsi #
.seh_pushreg rsi
.cfi_def_cfa_offset 24
.cfi_offset 4, -24
.seh_endprologue
.loc 2 1334 5 is_stmt 1 view .LVU736
.LVL192:
.loc 2 1336 5 view .LVU737
.LBB7671:
.LBB7672:
# xxh3.h:1326: return XXH3_mul128_fold64(
.loc 2 1326 12 is_stmt 0 view .LVU738
mov rax, QWORD PTR 8[rcx] # MEM[(const xxh_u64 *)acc_3(D) + 8B], MEM[(const xxh_u64 *)acc_3(D) + 8B]
.LBE7672:
.LBE7671:
.LBB7697:
.LBB7698:
mov r10, QWORD PTR 16[rcx] # MEM[(const xxh_u64 *)acc_3(D) + 16B], MEM[(const xxh_u64 *)acc_3(D) + 16B]
.LBE7698:
.LBE7697:
# xxh3.h:1333: {
.loc 2 1333 1 view .LVU739
mov r9, rdx # secret, tmp177
.LVL193:
.LBB7715:
.LBI7671:
.loc 2 1324 1 is_stmt 1 view .LVU740
.LBB7691:
.loc 2 1326 5 view .LVU741
.loc 2 1326 5 is_stmt 0 view .LVU742
.LBE7691:
.LBE7715:
.loc 1 1550 5 is_stmt 1 view .LVU743
.loc 1 1492 5 view .LVU744
.loc 1 1493 5 view .LVU745
.loc 1 1494 5 view .LVU746
.loc 1 1550 5 view .LVU747
.loc 1 1492 5 view .LVU748
.loc 1 1493 5 view .LVU749
.loc 1 1494 5 view .LVU750
.LBB7716:
.LBB7692:
.LBB7673:
.LBI7673:
.loc 2 616 1 view .LVU751
.LBB7674:
.loc 2 618 5 view .LVU752
.LBB7675:
.LBI7675:
.loc 2 507 1 view .LVU753
.LBB7676:
.loc 2 528 5 view .LVU754
.LBE7676:
.LBE7675:
.LBE7674:
.LBE7673:
# xxh3.h:1326: return XXH3_mul128_fold64(
.loc 2 1326 12 is_stmt 0 view .LVU755
mov rdx, QWORD PTR [rcx] # *acc_3(D), *acc_3(D)
.LVL194:
.loc 2 1326 12 view .LVU756
mov rdi, QWORD PTR [r9] # *acc_3(D), MEM[(char * {ref-all})secret_4(D)]
xor rax, QWORD PTR 8[r9] # MEM[(const xxh_u64 *)acc_3(D) + 8B], MEM[(char * {ref-all})secret_4(D) + 8B]
.LVL195:
.loc 2 1326 12 view .LVU757
mov rsi, rax # tmp140, MEM[(const xxh_u64 *)acc_3(D) + 8B]
.LBE7692:
.LBE7716:
.LBB7717:
.LBB7709:
xor r10, QWORD PTR 16[r9] # tmp142, MEM[(char * {ref-all})secret_4(D) + 16B]
.LBE7709:
.LBE7717:
.LBB7718:
.LBB7693:
xor rdi, rdx # *acc_3(D), *acc_3(D)
.LVL196:
.LBB7687:
.LBB7683:
.LBB7680:
.LBB7677:
# xxh3.h:528: __uint128_t product = (__uint128_t)lhs * (__uint128_t)rhs;
.loc 2 528 17 view .LVU758
mov rax, rdi # product, tmp138
.LVL197:
.loc 2 528 17 view .LVU759
mul rsi # tmp140
mov rsi, rax # product, product
.LVL198:
.loc 2 528 17 view .LVU760
.LBE7677:
.LBE7680:
.LBE7683:
.LBE7687:
.LBE7693:
.LBE7718:
.LBB7719:
.LBB7710:
# xxh3.h:1326: return XXH3_mul128_fold64(
.loc 2 1326 12 view .LVU761
mov rax, QWORD PTR 24[rcx] # MEM[(const xxh_u64 *)acc_3(D) + 24B], MEM[(const xxh_u64 *)acc_3(D) + 24B]
xor rax, QWORD PTR 24[r9] # MEM[(const xxh_u64 *)acc_3(D) + 24B], MEM[(char * {ref-all})secret_4(D) + 24B]
.LBE7710:
.LBE7719:
.LBB7720:
.LBB7694:
.LBB7688:
.LBB7684:
.LBB7681:
.LBB7678:
# xxh3.h:528: __uint128_t product = (__uint128_t)lhs * (__uint128_t)rhs;
.loc 2 528 17 view .LVU762
mov rdi, rdx # product, product
.LVL199:
.loc 2 529 5 is_stmt 1 view .LVU763
.loc 2 530 5 view .LVU764
.loc 2 530 5 is_stmt 0 view .LVU765
.LBE7678:
.LBE7681:
.loc 2 619 5 is_stmt 1 view .LVU766
.loc 2 619 5 is_stmt 0 view .LVU767
.LBE7684:
.LBE7688:
.LBE7694:
.LBE7720:
.loc 2 1337 5 is_stmt 1 view .LVU768
.LBB7721:
.LBI7697:
.loc 2 1324 1 view .LVU769
.LBB7711:
.loc 2 1326 5 view .LVU770
.loc 2 1326 5 is_stmt 0 view .LVU771
.LBE7711:
.LBE7721:
.loc 1 1550 5 is_stmt 1 view .LVU772
.loc 1 1492 5 view .LVU773
.loc 1 1493 5 view .LVU774
.loc 1 1494 5 view .LVU775
.loc 1 1550 5 view .LVU776
.loc 1 1492 5 view .LVU777
.loc 1 1493 5 view .LVU778
.loc 1 1494 5 view .LVU779
.LBB7722:
.LBB7712:
.LBB7699:
.LBI7699:
.loc 2 616 1 view .LVU780
.LBB7700:
.loc 2 618 5 view .LVU781
.LBB7701:
.LBI7701:
.loc 2 507 1 view .LVU782
.LBB7702:
.loc 2 528 5 view .LVU783
# xxh3.h:528: __uint128_t product = (__uint128_t)lhs * (__uint128_t)rhs;
.loc 2 528 17 is_stmt 0 view .LVU784
mul r10 # tmp142
.LVL200:
.loc 2 528 17 view .LVU785
mov r11, rdx # product, product
mov r10, rax # product, product
.LVL201:
.loc 2 529 5 is_stmt 1 view .LVU786
.loc 2 530 5 view .LVU787
.loc 2 530 5 is_stmt 0 view .LVU788
.LBE7702:
.LBE7701:
.loc 2 619 5 is_stmt 1 view .LVU789
.loc 2 619 5 is_stmt 0 view .LVU790
.LBE7700:
.LBE7699:
.LBE7712:
.LBE7722:
.LBB7723:
.LBB7695:
.LBB7689:
.LBB7685:
.LBB7682:
.LBB7679:
# xxh3.h:529: XXH128_hash_t const r128 = { (xxh_u64)(product), (xxh_u64)(product >> 64) };
.loc 2 529 72 view .LVU791
mov rdx, rdi # tmp168, product
.LBE7679:
.LBE7682:
.LBE7685:
.LBE7689:
.LBE7695:
.LBE7723:
.LBB7724:
.LBB7713:
.LBB7707:
.LBB7705:
.LBB7704:
.LBB7703:
mov rax, r11 # tmp170, product
.LVL202:
.loc 2 529 72 view .LVU792
.LBE7703:
.LBE7704:
.LBE7705:
.LBE7707:
.LBE7713:
.LBE7724:
.LBB7725:
.LBB7696:
.LBB7690:
.LBB7686:
# xxh3.h:619: return product.low64 ^ product.high64;
.loc 2 619 26 view .LVU793
xor rdx, rsi # tmp147, product
.LBE7686:
.LBE7690:
.LBE7696:
.LBE7725:
.LBB7726:
.LBB7714:
.LBB7708:
.LBB7706:
xor rax, r10 # tmp149, product
.LBE7706:
.LBE7708:
.LBE7714:
.LBE7726:
# xxh3.h:1337: result64 += XXH3_mix2Accs(acc+2, secret + 16);
.loc 2 1337 14 view .LVU794
add rdx, rax # tmp150, tmp149
.LBB7727:
.LBB7728:
# xxh3.h:1326: return XXH3_mul128_fold64(
.loc 2 1326 12 view .LVU795
mov rax, QWORD PTR 32[rcx] # MEM[(const xxh_u64 *)acc_3(D) + 32B], MEM[(const xxh_u64 *)acc_3(D) + 32B]
xor rax, QWORD PTR 32[r9] # tmp151, MEM[(char * {ref-all})secret_4(D) + 32B]
.LBE7728:
.LBE7727:
# xxh3.h:1337: result64 += XXH3_mix2Accs(acc+2, secret + 16);
.loc 2 1337 14 view .LVU796
add r8, rdx # result64, tmp150
.LVL203:
.loc 2 1338 5 is_stmt 1 view .LVU797
.LBB7739:
.LBI7727:
.loc 2 1324 1 view .LVU798
.LBB7737:
.loc 2 1326 5 view .LVU799
.loc 2 1326 5 is_stmt 0 view .LVU800
.LBE7737:
.LBE7739:
.loc 1 1550 5 is_stmt 1 view .LVU801
.loc 1 1492 5 view .LVU802
.loc 1 1493 5 view .LVU803
.loc 1 1494 5 view .LVU804
.loc 1 1550 5 view .LVU805
.loc 1 1492 5 view .LVU806
.loc 1 1493 5 view .LVU807
.loc 1 1494 5 view .LVU808
.LBB7740:
.LBB7738:
.LBB7729:
.LBI7729:
.loc 2 616 1 view .LVU809
.LBB7730:
.loc 2 618 5 view .LVU810
.LBB7731:
.LBI7731:
.loc 2 507 1 view .LVU811
.LBB7732:
.loc 2 528 5 view .LVU812
.LBE7732:
.LBE7731:
.LBE7730:
.LBE7729:
# xxh3.h:1326: return XXH3_mul128_fold64(
.loc 2 1326 12 is_stmt 0 view .LVU813
mov rdx, QWORD PTR 40[rcx] # MEM[(const xxh_u64 *)acc_3(D) + 40B], MEM[(const xxh_u64 *)acc_3(D) + 40B]
xor rdx, QWORD PTR 40[r9] # tmp153, MEM[(char * {ref-all})secret_4(D) + 40B]
.LVL204:
.LBB7736:
.LBB7735:
.LBB7734:
.LBB7733:
# xxh3.h:528: __uint128_t product = (__uint128_t)lhs * (__uint128_t)rhs;
.loc 2 528 17 view .LVU814
mul rdx # tmp153
.LVL205:
.loc 2 529 5 is_stmt 1 view .LVU815
.loc 2 530 5 view .LVU816
.loc 2 530 5 is_stmt 0 view .LVU817
.LBE7733:
.LBE7734:
.loc 2 619 5 is_stmt 1 view .LVU818
# xxh3.h:619: return product.low64 ^ product.high64;
.loc 2 619 26 is_stmt 0 view .LVU819
xor rax, rdx # tmp156, tmp172
.LVL206:
.loc 2 619 26 view .LVU820
.LBE7735:
.LBE7736:
.LBE7738:
.LBE7740:
# xxh3.h:1338: result64 += XXH3_mix2Accs(acc+4, secret + 32);
.loc 2 1338 14 view .LVU821
lea r10, [rax+r8] # result64,
.LVL207:
.loc 2 1339 5 is_stmt 1 view .LVU822
.LBB7741:
.LBI7741:
.loc 2 1324 1 view .LVU823
.LBB7742:
.loc 2 1326 5 view .LVU824
.loc 2 1326 5 is_stmt 0 view .LVU825
.LBE7742:
.LBE7741:
.loc 1 1550 5 is_stmt 1 view .LVU826
.loc 1 1492 5 view .LVU827
.loc 1 1493 5 view .LVU828
.loc 1 1494 5 view .LVU829
.loc 1 1550 5 view .LVU830
.loc 1 1492 5 view .LVU831
.loc 1 1493 5 view .LVU832
.loc 1 1494 5 view .LVU833
.LBB7754:
.LBB7753:
.LBB7743:
.LBI7743:
.loc 2 616 1 view .LVU834
.LBB7744:
.loc 2 618 5 view .LVU835
.LBB7745:
.LBI7745:
.loc 2 507 1 view .LVU836
.LBB7746:
.loc 2 528 5 view .LVU837
.LBE7746:
.LBE7745:
.LBE7744:
.LBE7743:
# xxh3.h:1326: return XXH3_mul128_fold64(
.loc 2 1326 12 is_stmt 0 view .LVU838
mov r8, QWORD PTR 48[rcx] # MEM[(const xxh_u64 *)acc_3(D) + 48B], MEM[(const xxh_u64 *)acc_3(D) + 48B]
mov rax, QWORD PTR 56[rcx] # MEM[(const xxh_u64 *)acc_3(D) + 56B], MEM[(const xxh_u64 *)acc_3(D) + 56B]
xor r8, QWORD PTR 48[r9] # tmp157, MEM[(char * {ref-all})secret_4(D) + 48B]
.LVL208:
.loc 2 1326 12 view .LVU839
xor rax, QWORD PTR 56[r9] # tmp159, MEM[(char * {ref-all})secret_4(D) + 56B]
.LVL209:
.LBB7752:
.LBB7751:
.LBB7749:
.LBB7747:
# xxh3.h:528: __uint128_t product = (__uint128_t)lhs * (__uint128_t)rhs;
.loc 2 528 17 view .LVU840
mul r8 # tmp157
.LVL210:
.loc 2 529 5 is_stmt 1 view .LVU841
.loc 2 530 5 view .LVU842
.loc 2 530 5 is_stmt 0 view .LVU843
.LBE7747:
.LBE7749:
.loc 2 619 5 is_stmt 1 view .LVU844
.LBB7750:
.LBB7748:
# xxh3.h:529: XXH128_hash_t const r128 = { (xxh_u64)(product), (xxh_u64)(product >> 64) };
.loc 2 529 72 is_stmt 0 view .LVU845
mov r8, rdx # tmp174, product
.LBE7748:
.LBE7750:
# xxh3.h:619: return product.low64 ^ product.high64;
.loc 2 619 26 view .LVU846
xor r8, rax # tmp162, product
.LBE7751:
.LBE7752:
.LBE7753:
.LBE7754:
# xxh3.h:1339: result64 += XXH3_mix2Accs(acc+6, secret + 48);
.loc 2 1339 14 view .LVU847
add r8, r10 # result64, result64
.LVL211:
.loc 2 1341 5 is_stmt 1 view .LVU848
.LBB7755:
.LBI7755:
.loc 2 634 21 view .LVU849
.LBB7756:
.loc 2 636 5 view .LVU850
.LBB7757:
.LBI7757:
.loc 2 623 26 view .LVU851
.LBB7758:
.loc 2 625 5 view .LVU852
.loc 2 626 5 view .LVU853
.loc 2 626 5 is_stmt 0 view .LVU854
.LBE7758:
.LBE7757:
.loc 2 637 5 is_stmt 1 view .LVU855
.LBB7760:
.LBB7759:
# xxh3.h:626: return v64 ^ (v64 >> shift);
.loc 2 626 23 is_stmt 0 view .LVU856
mov rax, r8 # tmp163, result64
.LVL212:
.loc 2 626 23 view .LVU857
shr rax, 37 # tmp163,
# xxh3.h:626: return v64 ^ (v64 >> shift);
.loc 2 626 16 view .LVU858
xor rax, r8 # tmp164, result64
.LVL213:
.loc 2 626 16 view .LVU859
.LBE7759:
.LBE7760:
# xxh3.h:637: h64 *= 0x165667919E3779F9ULL;
.loc 2 637 9 view .LVU860
movabs r8, 1609587791953885689 # tmp165,
.LVL214:
.loc 2 637 9 view .LVU861
imul rax, r8 # h64, tmp165
.LVL215:
.loc 2 638 5 is_stmt 1 view .LVU862
.LBB7761:
.LBI7761:
.loc 2 623 26 view .LVU863
.LBB7762:
.loc 2 625 5 view .LVU864
.loc 2 626 5 view .LVU865
.loc 2 626 5 is_stmt 0 view .LVU866
.LBE7762:
.LBE7761:
.loc 2 639 5 is_stmt 1 view .LVU867
.LBB7764:
.LBB7763:
# xxh3.h:626: return v64 ^ (v64 >> shift);
.loc 2 626 23 is_stmt 0 view .LVU868
mov r8, rax # tmp167, h64
shr r8, 32 # tmp167,
# xxh3.h:626: return v64 ^ (v64 >> shift);
.loc 2 626 16 view .LVU869
xor rax, r8 # tmp166, tmp167
.LBE7763:
.LBE7764:
.LBE7756:
.LBE7755:
# xxh3.h:1342: }
.loc 2 1342 1 view .LVU870
pop rsi #
.cfi_restore 4
.cfi_def_cfa_offset 16
pop rdi #
.cfi_restore 5
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE5336:
.seh_endproc
.p2align 4
.def XXH3_hashLong_64b_defaultSecret; .scl 3; .type 32; .endef
.seh_proc XXH3_hashLong_64b_defaultSecret
XXH3_hashLong_64b_defaultSecret:
.LVL216:
.LFB5338:
.loc 2 1369 1 is_stmt 1 view -0
.cfi_startproc
.loc 2 1369 1 is_stmt 0 view .LVU872
push rsi #
.seh_pushreg rsi
.cfi_def_cfa_offset 16
.cfi_offset 4, -16
push rbx #
.seh_pushreg rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
sub rsp, 152 #,
.seh_stackalloc 152
.cfi_def_cfa_offset 176
vmovaps XMMWORD PTR 112[rsp], xmm6 #,
.seh_savexmm xmm6, 112
vmovaps XMMWORD PTR 128[rsp], xmm7 #,
.seh_savexmm xmm7, 128
.cfi_offset 23, -64
.cfi_offset 24, -48
.seh_endprologue
.loc 2 1370 5 is_stmt 1 view .LVU873
.LVL217:
.LBB7765:
.LBI7765:
.loc 2 1348 1 view .LVU874
.LBB7766:
.loc 2 1351 5 view .LVU875
# xxh3.h:1351: XXH_ALIGN(XXH_ACC_ALIGN) xxh_u64 acc[ACC_NB] = XXH3_INIT_ACC;
.loc 2 1351 38 is_stmt 0 view .LVU876
mov eax, 3266489917 # tmp315,
.LBE7766:
.LBE7765:
# xxh3.h:1369: {
.loc 2 1369 1 view .LVU877
lea r10, 63[rsp] # tmp212,
.LBB8024:
.LBB8015:
.LBB7767:
.LBB7768:
# xxh3.h:1303: for (n = 0; n < nb_blocks; n++) {
.loc 2 1303 5 view .LVU878
mov r11, rdx # nb_blocks, len
.LBE7768:
.LBE7767:
.LBE8015:
.LBE8024:
# xxh3.h:1369: {
.loc 2 1369 1 view .LVU879
mov rsi, rcx # input, tmp312
mov r8, rdx # len, tmp313
and r10, -32 # tmp214,
.LBB8025:
.LBB8016:
.LBB8005:
.LBB7996:
# xxh3.h:1303: for (n = 0; n < nb_blocks; n++) {
.loc 2 1303 5 view .LVU880
shr r11, 10 # nb_blocks,
.LBE7996:
.LBE8005:
# xxh3.h:1351: XXH_ALIGN(XXH_ACC_ALIGN) xxh_u64 acc[ACC_NB] = XXH3_INIT_ACC;
.loc 2 1351 38 view .LVU881
mov QWORD PTR [r10], rax # acc, tmp315
movabs rax, -7046029288634856825 # tmp316,
mov QWORD PTR 8[r10], rax # acc, tmp316
movabs rax, -4417276706812531889 # tmp317,
mov QWORD PTR 16[r10], rax # acc, tmp317
movabs rax, 1609587929392839161 # tmp318,
mov QWORD PTR 24[r10], rax # acc, tmp318
movabs rax, -8796714831421723037 # tmp319,
mov QWORD PTR 32[r10], rax # acc, tmp319
mov eax, 2246822519 # tmp320,
mov QWORD PTR 40[r10], rax # acc, tmp320
movabs rax, 2870177450012600261 # tmp321,
mov QWORD PTR 48[r10], rax # acc, tmp321
mov eax, 2654435761 # tmp322,
mov QWORD PTR 56[r10], rax # acc, tmp322
.loc 2 1351 65 is_stmt 1 view .LVU882
.loc 2 1353 5 view .LVU883
.LVL218:
.LBB8006:
.LBI7767:
.loc 2 1290 1 view .LVU884
.LBB7997:
.loc 2 1295 5 view .LVU885
.loc 2 1296 5 view .LVU886
.loc 2 1297 5 view .LVU887
.loc 2 1299 5 view .LVU888
.loc 2 1301 5 view .LVU889
.loc 2 1303 5 view .LVU890
.loc 2 1303 17 view .LVU891
# xxh3.h:1303: for (n = 0; n < nb_blocks; n++) {
.loc 2 1303 5 is_stmt 0 view .LVU892
je .L44 #,
vmovdqa ymm4, YMMWORD PTR [r10] # acc__lsm.229, MEM[(__m256i * {ref-all})&acc]
vmovdqa ymm2, YMMWORD PTR 32[r10] # acc__lsm.231, MEM[(__m256i * {ref-all})&acc + 32B]
lea rbx, 384[rcx] # tmp311,
sal r11, 10 # _147,
.LVL219:
.loc 2 1303 5 view .LVU893
vmovdqa ymm7, YMMWORD PTR .LC0[rip] # tmp307,
vmovdqa ymm5, YMMWORD PTR .LC1[rip] # tmp308,
xor r9d, r9d # ivtmp.265
lea rcx, kSecret[rip+160] # _72,
.LVL220:
.loc 2 1303 5 view .LVU894
vmovdqa ymm6, YMMWORD PTR .LC2[rip] # tmp309,
.LVL221:
.p2align 4,,10
.p2align 3
.L46:
.loc 2 1304 9 is_stmt 1 view .LVU895
.LBB7769:
.LBI7769:
.loc 2 1272 1 view .LVU896
.LBB7770:
.loc 2 1278 5 view .LVU897
.loc 2 1279 5 view .LVU898
.loc 2 1279 17 view .LVU899
lea rdx, [rbx+r9] # ivtmp.252,
lea rax, kSecret[rip+32] # ivtmp.256,
.LVL222:
.p2align 4,,10
.p2align 3
.L45:
.LBB7771:
.loc 2 1280 9 view .LVU900
.loc 2 1281 9 view .LVU901
.LBB7772:
.LBB7773:
.LBB7774:
.LBB7775:
.LBB7776:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.file 3 "C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h"
.loc 3 915 33 is_stmt 0 view .LVU902
vmovdqu ymm3, YMMWORD PTR -32[rax] # tmp324, MEM[base: _74, offset: -32B]
vpxor ymm1, ymm3, YMMWORD PTR -384[rdx] # tmp227, tmp324, MEM[base: _12, offset: -384B]
add rax, 8 # ivtmp.256,
.LBE7776:
.LBE7775:
.LBE7774:
.LBE7773:
.LBE7772:
# xxh3.h:1281: XXH_PREFETCH(in + XXH_PREFETCH_DIST);
.loc 2 1281 9 view .LVU903
prefetcht0 [rdx] # ivtmp.252
.loc 2 1282 9 is_stmt 1 view .LVU904
.LVL223:
.LBB7823:
.LBI7772:
.loc 2 921 1 view .LVU905
.LBE7823:
.LBE7771:
.LBE7770:
.LBE7769:
.LBE7997:
.LBE8006:
.LBE8016:
.LBE8025:
.loc 2 928 5 view .LVU906
.LBB8026:
.LBB8017:
.LBB8007:
.LBB7998:
.LBB7827:
.LBB7826:
.LBB7825:
.LBB7824:
.LBB7822:
.loc 2 929 9 view .LVU907
.loc 2 932 9 view .LVU908
.loc 2 935 9 view .LVU909
.loc 2 937 9 view .LVU910
.loc 2 938 9 view .LVU911
.loc 2 938 19 view .LVU912
.LBB7820:
.loc 2 940 13 view .LVU913
.LBB7781:
.LBI7781:
.file 4 "C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avxintrin.h"
.loc 4 919 1 view .LVU914
.LBB7782:
.loc 4 921 3 view .LVU915
.loc 4 921 3 is_stmt 0 view .LVU916
.LBE7782:
.LBE7781:
.loc 2 942 13 is_stmt 1 view .LVU917
.LBB7784:
.LBI7784:
.loc 4 919 1 view .LVU918
.LBB7785:
.loc 4 921 3 view .LVU919
.LBE7785:
.LBE7784:
.loc 2 944 13 view .LVU920
.LBB7787:
.LBI7775:
.loc 3 913 1 view .LVU921
.LBB7777:
.loc 3 915 3 view .LVU922
.loc 3 915 3 is_stmt 0 view .LVU923
.LBE7777:
.LBE7787:
.loc 2 946 13 is_stmt 1 view .LVU924
.LBB7788:
.LBI7788:
.loc 3 597 1 view .LVU925
.LBB7789:
.loc 3 599 3 view .LVU926
.LBE7789:
.LBE7788:
.LBB7793:
.LBB7778:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU927
vmovdqu ymm3, YMMWORD PTR -8[rax] # tmp325, MEM[base: _74, offset: 0B]
add rdx, 64 # ivtmp.252,
.LVL224:
.loc 3 915 33 view .LVU928
.LBE7778:
.LBE7793:
.LBB7794:
.LBB7790:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 view .LVU929
vpshufd ymm0, ymm1, 49 # tmp228, tmp227,
.LVL225:
.loc 3 599 19 view .LVU930
.LBE7790:
.LBE7794:
.loc 2 948 13 is_stmt 1 view .LVU931
.LBB7795:
.LBI7795:
.loc 3 567 1 view .LVU932
.LBB7796:
.loc 3 569 3 view .LVU933
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU934
vpmuludq ymm1, ymm1, ymm0 # tmp230, tmp227, tmp228
.LVL226:
.loc 3 569 19 view .LVU935
.LBE7796:
.LBE7795:
.loc 2 949 13 is_stmt 1 view .LVU936
.LBB7799:
.loc 2 957 17 view .LVU937
.LBB7800:
.LBI7800:
.loc 3 126 1 view .LVU938
.LBB7801:
.loc 3 128 3 view .LVU939
.loc 3 128 3 is_stmt 0 view .LVU940
.LBE7801:
.LBE7800:
.loc 2 959 17 is_stmt 1 view .LVU941
.LBB7803:
.LBI7803:
.loc 3 126 1 view .LVU942
.LBB7804:
.loc 3 128 3 view .LVU943
.LBE7804:
.LBE7803:
.LBE7799:
.LBB7810:
.LBB7779:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU944
vpxor ymm0, ymm3, YMMWORD PTR -416[rdx] # tmp234, tmp325, MEM[base: _12, offset: -352B]
.LVL227:
.loc 3 915 33 view .LVU945
.LBE7779:
.LBE7810:
.LBB7811:
.LBB7791:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 view .LVU946
vpshufd ymm3, ymm0, 49 # tmp235, tmp234,
.LBE7791:
.LBE7811:
.LBB7812:
.LBB7797:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 view .LVU947
vpmuludq ymm0, ymm0, ymm3 # tmp237, tmp234, tmp235
.LBE7797:
.LBE7812:
.LBB7813:
.LBB7807:
.LBB7805:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 view .LVU948
vpaddq ymm1, ymm4, ymm1 # tmp231, acc__lsm.229, tmp230
.LVL228:
.loc 3 128 33 view .LVU949
vpaddq ymm4, ymm1, YMMWORD PTR -448[rdx] # acc__lsm.229, tmp231, MEM[base: _12, offset: -384B]
.loc 3 128 33 view .LVU950
.LBE7805:
.LBE7807:
.LBE7813:
.LBE7820:
.loc 2 938 51 is_stmt 1 view .LVU951
.LVL229:
.loc 2 938 19 view .LVU952
.LBB7821:
.loc 2 940 13 view .LVU953
.LBB7814:
.loc 4 919 1 view .LVU954
.LBB7783:
.loc 4 921 3 view .LVU955
.loc 4 921 3 is_stmt 0 view .LVU956
.LBE7783:
.LBE7814:
.loc 2 942 13 is_stmt 1 view .LVU957
.LBB7815:
.loc 4 919 1 view .LVU958
.LBB7786:
.loc 4 921 3 view .LVU959
.LBE7786:
.LBE7815:
.loc 2 944 13 view .LVU960
.LBB7816:
.loc 3 913 1 view .LVU961
.LBB7780:
.loc 3 915 3 view .LVU962
.loc 3 915 3 is_stmt 0 view .LVU963
.LBE7780:
.LBE7816:
.loc 2 946 13 is_stmt 1 view .LVU964
.LBB7817:
.loc 3 597 1 view .LVU965
.LBB7792:
.loc 3 599 3 view .LVU966
.loc 3 599 3 is_stmt 0 view .LVU967
.LBE7792:
.LBE7817:
.loc 2 948 13 is_stmt 1 view .LVU968
.LBB7818:
.loc 3 567 1 view .LVU969
.LBB7798:
.loc 3 569 3 view .LVU970
.loc 3 569 3 is_stmt 0 view .LVU971
.LBE7798:
.LBE7818:
.loc 2 949 13 is_stmt 1 view .LVU972
.LBB7819:
.loc 2 957 17 view .LVU973
.LBB7808:
.loc 3 126 1 view .LVU974
.LBB7802:
.loc 3 128 3 view .LVU975
.loc 3 128 3 is_stmt 0 view .LVU976
.LBE7802:
.LBE7808:
.loc 2 959 17 is_stmt 1 view .LVU977
.LBB7809:
.loc 3 126 1 view .LVU978
.LBB7806:
.loc 3 128 3 view .LVU979
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 is_stmt 0 view .LVU980
vpaddq ymm0, ymm2, ymm0 # tmp238, acc__lsm.231, tmp237
.LVL230:
.loc 3 128 33 view .LVU981
vpaddq ymm2, ymm0, YMMWORD PTR -416[rdx] # acc__lsm.231, tmp238, MEM[base: _12, offset: -352B]
.loc 3 128 33 view .LVU982
.LBE7806:
.LBE7809:
.LBE7819:
.LBE7821:
.loc 2 938 51 is_stmt 1 view .LVU983
.LVL231:
.loc 2 938 19 view .LVU984
.loc 2 938 19 is_stmt 0 view .LVU985
.LBE7822:
.LBE7824:
.LBE7825:
.loc 2 1279 32 is_stmt 1 view .LVU986
.loc 2 1279 17 view .LVU987
# xxh3.h:1279: for (n = 0; n < nbStripes; n++ ) {
.loc 2 1279 5 is_stmt 0 view .LVU988
cmp rcx, rax # _72, ivtmp.256
jne .L45 #,
.LVL232:
.loc 2 1279 5 view .LVU989
.LBE7826:
.LBE7827:
.LBB7828:
.LBB7829:
.loc 2 1123 19 is_stmt 1 view .LVU990
.LBB7830:
.loc 2 1125 13 view .LVU991
.loc 2 1126 13 view .LVU992
.LBB7831:
.LBI7831:
.loc 3 787 1 view .LVU993
.LBB7832:
.loc 3 789 3 view .LVU994
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:789: return (__m256i)__builtin_ia32_psrlqi256 ((__v4di)__A, __B);
.loc 3 789 19 is_stmt 0 view .LVU995
vpsrlq ymm0, ymm4, 47 # tmp239, acc__lsm.229,
.LVL233:
.loc 3 789 19 view .LVU996
.LBE7832:
.LBE7831:
.loc 2 1127 13 is_stmt 1 view .LVU997
.LBB7834:
.LBI7834:
.loc 3 913 1 view .LVU998
.LBB7835:
.loc 3 915 3 view .LVU999
.loc 3 915 3 is_stmt 0 view .LVU1000
.LBE7835:
.LBE7834:
.loc 2 1129 13 is_stmt 1 view .LVU1001
.loc 2 1129 13 is_stmt 0 view .LVU1002
.LBE7830:
.LBE7829:
.LBE7828:
.LBE7998:
.LBE8007:
.LBE8017:
.LBE8026:
.loc 4 921 3 is_stmt 1 view .LVU1003
.LBB8027:
.LBB8018:
.LBB8008:
.LBB7999:
.LBB7876:
.LBB7874:
.LBB7871:
.loc 2 1130 13 view .LVU1004
.LBB7837:
.LBI7837:
.loc 3 913 1 view .LVU1005
.LBB7838:
.loc 3 915 3 view .LVU1006
.loc 3 915 3 is_stmt 0 view .LVU1007
.LBE7838:
.LBE7837:
.loc 2 1133 13 is_stmt 1 view .LVU1008
.LBB7842:
.LBI7842:
.loc 3 597 1 view .LVU1009
.LBB7843:
.loc 3 599 3 view .LVU1010
.LBE7843:
.LBE7842:
.LBB7847:
.LBB7839:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU1011
vpxor ymm1, ymm4, ymm7 # tmp241, acc__lsm.229, tmp307
add r9, 1024 # ivtmp.265,
vpxor ymm1, ymm1, ymm0 # tmp243, tmp241, tmp239
vpxor ymm0, ymm2, ymm6 # tmp255, acc__lsm.231, tmp309
.LVL234:
.loc 3 915 33 view .LVU1012
.LBE7839:
.LBE7847:
.LBB7848:
.LBB7844:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 view .LVU1013
vpshufd ymm4, ymm1, 49 # tmp244, tmp243,
.LVL235:
.loc 3 599 19 view .LVU1014
.LBE7844:
.LBE7848:
.loc 2 1134 13 is_stmt 1 view .LVU1015
.LBB7849:
.LBI7849:
.loc 3 567 1 view .LVU1016
.LBB7850:
.loc 3 569 3 view .LVU1017
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU1018
vpmuludq ymm1, ymm1, ymm5 # tmp246, tmp243, tmp308
.LVL236:
.loc 3 569 19 view .LVU1019
.LBE7850:
.LBE7849:
.loc 2 1135 13 is_stmt 1 view .LVU1020
.LBB7852:
.LBI7852:
.loc 3 567 1 view .LVU1021
.LBB7853:
.loc 3 569 3 view .LVU1022
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU1023
vpmuludq ymm4, ymm4, ymm5 # tmp248, tmp244, tmp308
.LVL237:
.loc 3 569 19 view .LVU1024
.LBE7853:
.LBE7852:
.loc 2 1136 13 is_stmt 1 view .LVU1025
.LBB7855:
.LBI7855:
.loc 3 696 1 view .LVU1026
.LBB7856:
.loc 3 698 3 view .LVU1027
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:698: return (__m256i)__builtin_ia32_psllqi256 ((__v4di)__A, __B);
.loc 3 698 19 is_stmt 0 view .LVU1028
vpsllq ymm4, ymm4, 32 # tmp250, tmp248,
.LVL238:
.loc 3 698 19 view .LVU1029
.LBE7856:
.LBE7855:
.LBB7858:
.LBI7858:
.loc 3 126 1 is_stmt 1 view .LVU1030
.LBB7859:
.loc 3 128 3 view .LVU1031
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 is_stmt 0 view .LVU1032
vpaddq ymm4, ymm1, ymm4 # acc__lsm.229, tmp246, tmp250
.LVL239:
.loc 3 128 33 view .LVU1033
.LBE7859:
.LBE7858:
.LBE7871:
.loc 2 1123 51 is_stmt 1 view .LVU1034
.loc 2 1123 19 view .LVU1035
.LBB7872:
.loc 2 1125 13 view .LVU1036
.loc 2 1126 13 view .LVU1037
.LBB7861:
.loc 3 787 1 view .LVU1038
.LBB7833:
.loc 3 789 3 view .LVU1039
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:789: return (__m256i)__builtin_ia32_psrlqi256 ((__v4di)__A, __B);
.loc 3 789 19 is_stmt 0 view .LVU1040
vpsrlq ymm1, ymm2, 47 # tmp253, acc__lsm.231,
.LVL240:
.loc 3 789 19 view .LVU1041
.LBE7833:
.LBE7861:
.loc 2 1127 13 is_stmt 1 view .LVU1042
.LBB7862:
.loc 3 913 1 view .LVU1043
.LBB7836:
.loc 3 915 3 view .LVU1044
.loc 3 915 3 is_stmt 0 view .LVU1045
.LBE7836:
.LBE7862:
.loc 2 1129 13 is_stmt 1 view .LVU1046
.loc 2 1129 13 is_stmt 0 view .LVU1047
.LBE7872:
.LBE7874:
.LBE7876:
.LBE7999:
.LBE8008:
.LBE8018:
.LBE8027:
.loc 4 921 3 is_stmt 1 view .LVU1048
.LBB8028:
.LBB8019:
.LBB8009:
.LBB8000:
.LBB7877:
.LBB7875:
.LBB7873:
.loc 2 1130 13 view .LVU1049
.LBB7863:
.loc 3 913 1 view .LVU1050
.LBB7840:
.loc 3 915 3 view .LVU1051
.loc 3 915 3 is_stmt 0 view .LVU1052
.LBE7840:
.LBE7863:
.loc 2 1133 13 is_stmt 1 view .LVU1053
.LBB7864:
.loc 3 597 1 view .LVU1054
.LBB7845:
.loc 3 599 3 view .LVU1055
.LBE7845:
.LBE7864:
.LBB7865:
.LBB7841:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU1056
vpxor ymm0, ymm0, ymm1 # tmp257, tmp255, tmp253
.LBE7841:
.LBE7865:
.LBB7866:
.LBB7846:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 view .LVU1057
vpshufd ymm2, ymm0, 49 # tmp258, tmp257,
.LVL241:
.loc 3 599 19 view .LVU1058
.LBE7846:
.LBE7866:
.loc 2 1134 13 is_stmt 1 view .LVU1059
.LBB7867:
.loc 3 567 1 view .LVU1060
.LBB7851:
.loc 3 569 3 view .LVU1061
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU1062
vpmuludq ymm0, ymm0, ymm5 # tmp260, tmp257, tmp308
.LVL242:
.loc 3 569 19 view .LVU1063
.LBE7851:
.LBE7867:
.loc 2 1135 13 is_stmt 1 view .LVU1064
.LBB7868:
.loc 3 567 1 view .LVU1065
.LBB7854:
.loc 3 569 3 view .LVU1066
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU1067
vpmuludq ymm2, ymm2, ymm5 # tmp262, tmp258, tmp308
.LVL243:
.loc 3 569 19 view .LVU1068
.LBE7854:
.LBE7868:
.loc 2 1136 13 is_stmt 1 view .LVU1069
.LBB7869:
.loc 3 696 1 view .LVU1070
.LBB7857:
.loc 3 698 3 view .LVU1071
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:698: return (__m256i)__builtin_ia32_psllqi256 ((__v4di)__A, __B);
.loc 3 698 19 is_stmt 0 view .LVU1072
vpsllq ymm2, ymm2, 32 # tmp264, tmp262,
.LVL244:
.loc 3 698 19 view .LVU1073
.LBE7857:
.LBE7869:
.LBB7870:
.loc 3 126 1 is_stmt 1 view .LVU1074
.LBB7860:
.loc 3 128 3 view .LVU1075
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 is_stmt 0 view .LVU1076
vpaddq ymm2, ymm0, ymm2 # acc__lsm.231, tmp260, tmp264
.LVL245:
.loc 3 128 33 view .LVU1077
.LBE7860:
.LBE7870:
.LBE7873:
.loc 2 1123 51 is_stmt 1 view .LVU1078
.loc 2 1123 19 view .LVU1079
.loc 2 1123 19 is_stmt 0 view .LVU1080
.LBE7875:
.LBE7877:
.loc 2 1303 32 is_stmt 1 view .LVU1081
.loc 2 1303 17 view .LVU1082
# xxh3.h:1303: for (n = 0; n < nb_blocks; n++) {
.loc 2 1303 5 is_stmt 0 view .LVU1083
cmp r11, r9 # _147, ivtmp.265
jne .L46 #,
vmovdqa YMMWORD PTR [r10], ymm4 # MEM[(__m256i * {ref-all})&acc], acc__lsm.229
vmovdqa YMMWORD PTR 32[r10], ymm2 # MEM[(__m256i * {ref-all})&acc + 32B], acc__lsm.231
.LVL246:
.L44:
.loc 2 1309 5 is_stmt 1 view .LVU1084
.LBB7878:
.loc 2 1310 9 view .LVU1085
# xxh3.h:1310: { size_t const nbStripes = (len - (block_len * nb_blocks)) / STRIPE_LEN;
.loc 2 1310 22 is_stmt 0 view .LVU1086
mov rax, r8 # tmp267, len
# xxh3.h:1310: { size_t const nbStripes = (len - (block_len * nb_blocks)) / STRIPE_LEN;
.loc 2 1310 52 view .LVU1087
mov rdx, r8 # _60, len
# xxh3.h:1310: { size_t const nbStripes = (len - (block_len * nb_blocks)) / STRIPE_LEN;
.loc 2 1310 22 view .LVU1088
shr rax, 6 # tmp267,
.LVL247:
.loc 2 1311 9 is_stmt 1 view .LVU1089
.loc 2 1312 9 view .LVU1090
# xxh3.h:1310: { size_t const nbStripes = (len - (block_len * nb_blocks)) / STRIPE_LEN;
.loc 2 1310 52 is_stmt 0 view .LVU1091
and rdx, -1024 # _60,
.LVL248:
.LBB7879:
.LBI7879:
.loc 2 1272 1 is_stmt 1 view .LVU1092
.LBB7880:
.loc 2 1278 5 view .LVU1093
.loc 2 1279 5 view .LVU1094
.loc 2 1279 17 view .LVU1095
# xxh3.h:1279: for (n = 0; n < nbStripes; n++ ) {
.loc 2 1279 5 is_stmt 0 view .LVU1096
and eax, 15 # tmp267,
.LVL249:
.loc 2 1279 5 view .LVU1097
mov rcx, rax # nbStripes, tmp267
je .L47 #,
lea rax, kSecret[rip] # ivtmp.239,
.LVL250:
.loc 2 1279 5 view .LVU1098
vmovdqa ymm3, YMMWORD PTR [r10] # acc__lsm.225, MEM[(__m256i * {ref-all})&acc]
vmovdqa ymm2, YMMWORD PTR 32[r10] # acc__lsm.227, MEM[(__m256i * {ref-all})&acc + 32B]
lea rdx, 384[rsi+rdx] # ivtmp.237,
.LVL251:
.loc 2 1279 5 view .LVU1099
lea rcx, [rax+rcx*8] # _262,
.LVL252:
.p2align 4,,10
.p2align 3
.L48:
.LBB7881:
.loc 2 1280 9 is_stmt 1 view .LVU1100
.loc 2 1281 9 view .LVU1101
.LBB7882:
.LBB7883:
.LBB7884:
.LBB7885:
.LBB7886:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU1102
vmovdqu ymm6, YMMWORD PTR [rax] # tmp329, MEM[base: _101, offset: 0B]
vmovdqu ymm7, YMMWORD PTR 32[rax] # tmp330, MEM[base: _101, offset: 32B]
add rax, 8 # ivtmp.239,
.LBE7886:
.LBE7885:
.LBE7884:
.LBE7883:
.LBE7882:
# xxh3.h:1281: XXH_PREFETCH(in + XXH_PREFETCH_DIST);
.loc 2 1281 9 view .LVU1103
prefetcht0 [rdx] # ivtmp.237
.loc 2 1282 9 is_stmt 1 view .LVU1104
.LVL253:
.LBB7929:
.LBI7882:
.loc 2 921 1 view .LVU1105
.LBE7929:
.LBE7881:
.LBE7880:
.LBE7879:
.LBE7878:
.LBE8000:
.LBE8009:
.LBE8019:
.LBE8028:
.loc 2 928 5 view .LVU1106
.LBB8029:
.LBB8020:
.LBB8010:
.LBB8001:
.LBB7992:
.LBB7933:
.LBB7932:
.LBB7931:
.LBB7930:
.LBB7928:
.loc 2 929 9 view .LVU1107
.loc 2 932 9 view .LVU1108
.loc 2 935 9 view .LVU1109
.loc 2 937 9 view .LVU1110
.loc 2 938 9 view .LVU1111
.loc 2 938 19 view .LVU1112
.LBB7926:
.loc 2 940 13 view .LVU1113
.LBB7891:
.LBI7891:
.loc 4 919 1 view .LVU1114
.LBB7892:
.loc 4 921 3 view .LVU1115
.loc 4 921 3 is_stmt 0 view .LVU1116
.LBE7892:
.LBE7891:
.loc 2 942 13 is_stmt 1 view .LVU1117
.LBB7894:
.LBI7894:
.loc 4 919 1 view .LVU1118
.LBB7895:
.loc 4 921 3 view .LVU1119
.LBE7895:
.LBE7894:
.loc 2 944 13 view .LVU1120
.LBB7897:
.LBI7885:
.loc 3 913 1 view .LVU1121
.LBB7887:
.loc 3 915 3 view .LVU1122
.loc 3 915 3 is_stmt 0 view .LVU1123
.LBE7887:
.LBE7897:
.loc 2 946 13 is_stmt 1 view .LVU1124
.LBB7898:
.LBI7898:
.loc 3 597 1 view .LVU1125
.LBB7899:
.loc 3 599 3 view .LVU1126
.LBE7899:
.LBE7898:
.LBB7902:
.LBB7888:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU1127
vpxor ymm1, ymm6, YMMWORD PTR -384[rdx] # tmp272, tmp329, MEM[base: _66, offset: -384B]
add rdx, 64 # ivtmp.237,
.LVL254:
.loc 3 915 33 view .LVU1128
.LBE7888:
.LBE7902:
.LBB7903:
.LBB7900:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 view .LVU1129
vpshufd ymm0, ymm1, 49 # tmp273, tmp272,
.LVL255:
.loc 3 599 19 view .LVU1130
.LBE7900:
.LBE7903:
.loc 2 948 13 is_stmt 1 view .LVU1131
.LBB7904:
.LBI7904:
.loc 3 567 1 view .LVU1132
.LBB7905:
.loc 3 569 3 view .LVU1133
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU1134
vpmuludq ymm1, ymm1, ymm0 # tmp275, tmp272, tmp273
.LVL256:
.loc 3 569 19 view .LVU1135
.LBE7905:
.LBE7904:
.loc 2 949 13 is_stmt 1 view .LVU1136
.LBB7907:
.loc 2 957 17 view .LVU1137
.LBB7908:
.LBI7908:
.loc 3 126 1 view .LVU1138
.LBB7909:
.loc 3 128 3 view .LVU1139
.loc 3 128 3 is_stmt 0 view .LVU1140
.LBE7909:
.LBE7908:
.loc 2 959 17 is_stmt 1 view .LVU1141
.LBB7911:
.LBI7911:
.loc 3 126 1 view .LVU1142
.LBB7912:
.loc 3 128 3 view .LVU1143
.LBE7912:
.LBE7911:
.LBE7907:
.LBB7918:
.LBB7889:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU1144
vpxor ymm0, ymm7, YMMWORD PTR -416[rdx] # tmp280, tmp330, MEM[base: _66, offset: -352B]
.LVL257:
.loc 3 915 33 view .LVU1145
.LBE7889:
.LBE7918:
.LBB7919:
.LBB7915:
.LBB7913:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 view .LVU1146
vpaddq ymm1, ymm3, ymm1 # tmp276, acc__lsm.225, tmp275
.LVL258:
.loc 3 128 33 view .LVU1147
vpaddq ymm3, ymm1, YMMWORD PTR -448[rdx] # acc__lsm.225, tmp276, MEM[base: _66, offset: -384B]
.loc 3 128 33 view .LVU1148
.LBE7913:
.LBE7915:
.LBE7919:
.LBE7926:
.loc 2 938 51 is_stmt 1 view .LVU1149
.LVL259:
.loc 2 938 19 view .LVU1150
.LBB7927:
.loc 2 940 13 view .LVU1151
.LBB7920:
.loc 4 919 1 view .LVU1152
.LBB7893:
.loc 4 921 3 view .LVU1153
.loc 4 921 3 is_stmt 0 view .LVU1154
.LBE7893:
.LBE7920:
.loc 2 942 13 is_stmt 1 view .LVU1155
.LBB7921:
.loc 4 919 1 view .LVU1156
.LBB7896:
.loc 4 921 3 view .LVU1157
.LBE7896:
.LBE7921:
.loc 2 944 13 view .LVU1158
.LBB7922:
.loc 3 913 1 view .LVU1159
.LBB7890:
.loc 3 915 3 view .LVU1160
.loc 3 915 3 is_stmt 0 view .LVU1161
.LBE7890:
.LBE7922:
.loc 2 946 13 is_stmt 1 view .LVU1162
.LBB7923:
.loc 3 597 1 view .LVU1163
.LBB7901:
.loc 3 599 3 view .LVU1164
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 is_stmt 0 view .LVU1165
vpshufd ymm1, ymm0, 49 # tmp281, tmp280,
.LVL260:
.loc 3 599 19 view .LVU1166
.LBE7901:
.LBE7923:
.loc 2 948 13 is_stmt 1 view .LVU1167
.LBB7924:
.loc 3 567 1 view .LVU1168
.LBB7906:
.loc 3 569 3 view .LVU1169
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU1170
vpmuludq ymm0, ymm0, ymm1 # tmp283, tmp280, tmp281
.LVL261:
.loc 3 569 19 view .LVU1171
.LBE7906:
.LBE7924:
.loc 2 949 13 is_stmt 1 view .LVU1172
.LBB7925:
.loc 2 957 17 view .LVU1173
.LBB7916:
.loc 3 126 1 view .LVU1174
.LBB7910:
.loc 3 128 3 view .LVU1175
.loc 3 128 3 is_stmt 0 view .LVU1176
.LBE7910:
.LBE7916:
.loc 2 959 17 is_stmt 1 view .LVU1177
.LBB7917:
.loc 3 126 1 view .LVU1178
.LBB7914:
.loc 3 128 3 view .LVU1179
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 is_stmt 0 view .LVU1180
vpaddq ymm0, ymm2, ymm0 # tmp284, acc__lsm.227, tmp283
.LVL262:
.loc 3 128 33 view .LVU1181
vpaddq ymm2, ymm0, YMMWORD PTR -416[rdx] # acc__lsm.227, tmp284, MEM[base: _66, offset: -352B]
.loc 3 128 33 view .LVU1182
.LBE7914:
.LBE7917:
.LBE7925:
.LBE7927:
.loc 2 938 51 is_stmt 1 view .LVU1183
.LVL263:
.loc 2 938 19 view .LVU1184
.loc 2 938 19 is_stmt 0 view .LVU1185
.LBE7928:
.LBE7930:
.LBE7931:
.loc 2 1279 32 is_stmt 1 view .LVU1186
.loc 2 1279 17 view .LVU1187
# xxh3.h:1279: for (n = 0; n < nbStripes; n++ ) {
.loc 2 1279 5 is_stmt 0 view .LVU1188
cmp rax, rcx # ivtmp.239, _262
jne .L48 #,
vmovdqa YMMWORD PTR [r10], ymm3 # MEM[(__m256i * {ref-all})&acc], acc__lsm.225
vmovdqa YMMWORD PTR 32[r10], ymm2 # MEM[(__m256i * {ref-all})&acc + 32B], acc__lsm.227
.LVL264:
.L47:
.loc 2 1279 5 view .LVU1189
.LBE7932:
.LBE7933:
.loc 2 1315 9 is_stmt 1 view .LVU1190
# xxh3.h:1315: if (len & (STRIPE_LEN - 1)) {
.loc 2 1315 12 is_stmt 0 view .LVU1191
test r8b, 63 # len,
je .L49 #,
.LBB7934:
.loc 2 1316 13 is_stmt 1 view .LVU1192
.LVL265:
.loc 2 1319 13 view .LVU1193
.LBB7935:
.LBI7935:
.loc 2 921 1 view .LVU1194
.LBE7935:
.LBE7934:
.LBE7992:
.LBE8001:
.LBE8010:
.LBE8020:
.LBE8029:
.loc 2 928 5 view .LVU1195
.LBB8030:
.LBB8021:
.LBB8011:
.LBB8002:
.LBB7993:
.LBB7989:
.LBB7986:
.LBB7936:
.loc 2 929 9 view .LVU1196
.loc 2 932 9 view .LVU1197
.loc 2 935 9 view .LVU1198
.loc 2 937 9 view .LVU1199
.loc 2 938 9 view .LVU1200
.loc 2 938 19 view .LVU1201
.LBB7937:
.loc 2 940 13 view .LVU1202
.LBB7938:
.LBI7938:
.loc 4 919 1 view .LVU1203
.LBB7939:
.loc 4 921 3 view .LVU1204
.loc 4 921 3 is_stmt 0 view .LVU1205
.LBE7939:
.LBE7938:
.loc 2 942 13 is_stmt 1 view .LVU1206
.loc 2 942 13 is_stmt 0 view .LVU1207
.LBE7937:
.LBE7936:
.LBE7986:
.LBE7989:
.LBE7993:
.LBE8002:
.LBE8011:
.LBE8021:
.LBE8030:
.loc 4 921 3 is_stmt 1 view .LVU1208
.LBB8031:
.LBB8022:
.LBB8012:
.LBB8003:
.LBB7994:
.LBB7990:
.LBB7987:
.LBB7984:
.LBB7981:
.loc 2 944 13 view .LVU1209
.LBB7942:
.LBI7942:
.loc 3 913 1 view .LVU1210
.LBB7943:
.loc 3 915 3 view .LVU1211
.loc 3 915 3 is_stmt 0 view .LVU1212
.LBE7943:
.LBE7942:
.loc 2 946 13 is_stmt 1 view .LVU1213
.LBB7947:
.LBI7947:
.loc 3 597 1 view .LVU1214
.LBB7948:
.loc 3 599 3 view .LVU1215
.LBE7948:
.LBE7947:
.LBB7952:
.LBB7944:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU1216
vmovdqu ymm6, YMMWORD PTR -64[rsi+r8] # tmp331, MEM[(const __m256i_u * {ref-all})_141]
vpxor ymm0, ymm6, YMMWORD PTR .LC3[rip] # tmp288, tmp331,
.LBE7944:
.LBE7952:
.LBB7953:
.LBB7949:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 view .LVU1217
vpshufd ymm1, ymm0, 49 # tmp290, tmp288,
.LVL266:
.loc 3 599 19 view .LVU1218
.LBE7949:
.LBE7953:
.loc 2 948 13 is_stmt 1 view .LVU1219
.LBB7954:
.LBI7954:
.loc 3 567 1 view .LVU1220
.LBB7955:
.loc 3 569 3 view .LVU1221
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU1222
vpmuludq ymm1, ymm0, ymm1 # tmp292, tmp288, tmp290
.LVL267:
.loc 3 569 19 view .LVU1223
.LBE7955:
.LBE7954:
.loc 2 949 13 is_stmt 1 view .LVU1224
.LBB7957:
.loc 2 957 17 view .LVU1225
.LBB7958:
.LBI7958:
.loc 3 126 1 view .LVU1226
.LBB7959:
.loc 3 128 3 view .LVU1227
.loc 3 128 3 is_stmt 0 view .LVU1228
.LBE7959:
.LBE7958:
.loc 2 959 17 is_stmt 1 view .LVU1229
.LBB7963:
.LBI7963:
.loc 3 126 1 view .LVU1230
.LBB7964:
.loc 3 128 3 view .LVU1231
.loc 3 128 3 is_stmt 0 view .LVU1232
.LBE7964:
.LBE7963:
.LBB7967:
.LBB7960:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 view .LVU1233
vpaddq ymm0, ymm6, YMMWORD PTR [r10] # tmp293, tmp332, MEM[(__m256i * {ref-all})&acc]
.LVL268:
.loc 3 128 33 view .LVU1234
.LBE7960:
.LBE7967:
.LBB7968:
.LBB7965:
vpaddq ymm0, ymm0, ymm1 # tmp294, tmp293, tmp292
.LVL269:
.loc 3 128 33 view .LVU1235
.LBE7965:
.LBE7968:
# xxh3.h:959: xacc[i] = _mm256_add_epi64(product, sum);
.loc 2 959 25 view .LVU1236
vmovdqa YMMWORD PTR [r10], ymm0 # MEM[(__m256i * {ref-all})&acc], tmp294
.LVL270:
.loc 2 959 25 view .LVU1237
.LBE7957:
.LBE7981:
.loc 2 938 51 is_stmt 1 view .LVU1238
.loc 2 938 19 view .LVU1239
.LBB7982:
.loc 2 940 13 view .LVU1240
.LBB7972:
.loc 4 919 1 view .LVU1241
.LBB7940:
.loc 4 921 3 view .LVU1242
.loc 4 921 3 is_stmt 0 view .LVU1243
.LBE7940:
.LBE7972:
.loc 2 942 13 is_stmt 1 view .LVU1244
.loc 2 942 13 is_stmt 0 view .LVU1245
.LBE7982:
.LBE7984:
.LBE7987:
.LBE7990:
.LBE7994:
.LBE8003:
.LBE8012:
.LBE8022:
.LBE8031:
.loc 4 921 3 is_stmt 1 view .LVU1246
.LBB8032:
.LBB8023:
.LBB8013:
.LBB8004:
.LBB7995:
.LBB7991:
.LBB7988:
.LBB7985:
.LBB7983:
.loc 2 944 13 view .LVU1247
.LBB7973:
.loc 3 913 1 view .LVU1248
.LBB7945:
.loc 3 915 3 view .LVU1249
.LBE7945:
.LBE7973:
.LBB7974:
.LBB7941:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avxintrin.h:921: return *__P;
.loc 4 921 10 is_stmt 0 view .LVU1250
vmovdqu ymm0, YMMWORD PTR -32[rsi+r8] # MEM[(const __m256i_u * {ref-all})_165], MEM[(const __m256i_u * {ref-all})_165]
.LVL271:
.loc 4 921 10 view .LVU1251
.LBE7941:
.LBE7974:
.loc 2 946 13 is_stmt 1 view .LVU1252
.LBB7975:
.loc 3 597 1 view .LVU1253
.LBB7950:
.loc 3 599 3 view .LVU1254
.LBE7950:
.LBE7975:
.LBB7976:
.LBB7946:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU1255
vpxor ymm1, ymm0, YMMWORD PTR .LC4[rip] # tmp296, MEM[(const __m256i_u * {ref-all})_165],
.LVL272:
.loc 3 915 33 view .LVU1256
.LBE7946:
.LBE7976:
.LBB7977:
.LBB7969:
.LBB7961:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 view .LVU1257
vpaddq ymm0, ymm0, YMMWORD PTR 32[r10] # tmp301, MEM[(const __m256i_u * {ref-all})_165], MEM[(__m256i * {ref-all})&acc + 32B]
.LBE7961:
.LBE7969:
.LBE7977:
.LBB7978:
.LBB7951:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 view .LVU1258
vpshufd ymm2, ymm1, 49 # tmp298, tmp296,
.LVL273:
.loc 3 599 19 view .LVU1259
.LBE7951:
.LBE7978:
.loc 2 948 13 is_stmt 1 view .LVU1260
.LBB7979:
.loc 3 567 1 view .LVU1261
.LBB7956:
.loc 3 569 3 view .LVU1262
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU1263
vpmuludq ymm1, ymm1, ymm2 # tmp300, tmp296, tmp298
.LVL274:
.loc 3 569 19 view .LVU1264
.LBE7956:
.LBE7979:
.loc 2 949 13 is_stmt 1 view .LVU1265
.LBB7980:
.loc 2 957 17 view .LVU1266
.LBB7970:
.loc 3 126 1 view .LVU1267
.LBB7962:
.loc 3 128 3 view .LVU1268
.loc 3 128 3 is_stmt 0 view .LVU1269
.LBE7962:
.LBE7970:
.loc 2 959 17 is_stmt 1 view .LVU1270
.LBB7971:
.loc 3 126 1 view .LVU1271
.LBB7966:
.loc 3 128 3 view .LVU1272
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 is_stmt 0 view .LVU1273
vpaddq ymm0, ymm0, ymm1 # tmp302, tmp301, tmp300
.LBE7966:
.LBE7971:
# xxh3.h:959: xacc[i] = _mm256_add_epi64(product, sum);
.loc 2 959 25 view .LVU1274
vmovdqa YMMWORD PTR 32[r10], ymm0 # MEM[(__m256i * {ref-all})&acc + 32B], tmp302
.LBE7980:
.LBE7983:
.loc 2 938 51 is_stmt 1 view .LVU1275
.LVL275:
.loc 2 938 19 view .LVU1276
.L49:
.loc 2 938 19 is_stmt 0 view .LVU1277
.LBE7985:
.LBE7988:
.LBE7991:
.LBE7995:
.LBE8004:
.LBE8013:
.LBB8014:
.loc 2 1356 5 is_stmt 1 view .LVU1278
.LBE8014:
.loc 2 1356 41 view .LVU1279
.loc 2 1359 5 view .LVU1280
.loc 2 1360 5 view .LVU1281
# xxh3.h:1360: return XXH3_mergeAccs(acc, secret + XXH_SECRET_MERGEACCS_START, (xxh_u64)len * PRIME64_1);
.loc 2 1360 12 is_stmt 0 view .LVU1282
movabs rax, -7046029288634856825 # tmp304,
lea rdx, kSecret[rip+11] #,
mov rcx, r10 #, tmp214
imul r8, rax #, tmp304
.LVL276:
.loc 2 1360 12 view .LVU1283
vzeroupper
call XXH3_mergeAccs #
nop
.LVL277:
.loc 2 1360 12 view .LVU1284
.LBE8023:
.LBE8032:
# xxh3.h:1371: }
.loc 2 1371 1 view .LVU1285
vmovaps xmm6, XMMWORD PTR 112[rsp] #,
vmovaps xmm7, XMMWORD PTR 128[rsp] #,
add rsp, 152 #,
.cfi_restore 24
.cfi_restore 23
.cfi_def_cfa_offset 24
pop rbx #
.cfi_restore 3
.cfi_def_cfa_offset 16
pop rsi #
.cfi_restore 4
.cfi_def_cfa_offset 8
.LVL278:
.loc 2 1371 1 view .LVU1286
ret
.cfi_endproc
.LFE5338:
.seh_endproc
.p2align 4
.def XXH3_hashLong_64b_withSecret; .scl 3; .type 32; .endef
.seh_proc XXH3_hashLong_64b_withSecret
XXH3_hashLong_64b_withSecret:
.LVL279:
.LFB5339:
.loc 2 1380 1 is_stmt 1 view -0
.cfi_startproc
.loc 2 1380 1 is_stmt 0 view .LVU1288
push r15 #
.seh_pushreg r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14 #
.seh_pushreg r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13 #
.seh_pushreg r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12 #
.seh_pushreg r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp #
.seh_pushreg rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rdi #
.seh_pushreg rdi
.cfi_def_cfa_offset 56
.cfi_offset 5, -56
push rsi #
.seh_pushreg rsi
.cfi_def_cfa_offset 64
.cfi_offset 4, -64
push rbx #
.seh_pushreg rbx
.cfi_def_cfa_offset 72
.cfi_offset 3, -72
sub rsp, 152 #,
.seh_stackalloc 152
.cfi_def_cfa_offset 224
vmovaps XMMWORD PTR 128[rsp], xmm6 #,
.seh_savexmm xmm6, 128
.cfi_offset 23, -96
.seh_endprologue
.loc 2 1381 5 is_stmt 1 view .LVU1289
.LVL280:
.LBB8033:
.LBB8034:
# xxh3.h:1351: XXH_ALIGN(XXH_ACC_ALIGN) xxh_u64 acc[ACC_NB] = XXH3_INIT_ACC;
.loc 2 1351 38 is_stmt 0 view .LVU1290
mov eax, 3266489917 # tmp387,
.LBE8034:
.LBE8033:
# xxh3.h:1380: {
.loc 2 1380 1 view .LVU1291
mov r13, r9 # secretSize, tmp349
.LVL281:
.LBB8291:
.LBI8033:
.loc 2 1348 1 is_stmt 1 view .LVU1292
.LBB8283:
.loc 2 1351 5 view .LVU1293
.LBE8283:
.LBE8291:
# xxh3.h:1380: {
.loc 2 1380 1 is_stmt 0 view .LVU1294
lea r9, 79[rsp] # tmp241,
.LVL282:
.loc 2 1380 1 view .LVU1295
mov rdi, rdx # len, tmp347
mov rbp, rcx # input, tmp346
and r9, -32 # tmp243,
.LBB8292:
.LBB8284:
.LBB8035:
.LBB8036:
# xxh3.h:1295: size_t const nb_rounds = (secretSize - STRIPE_LEN) / XXH_SECRET_CONSUME_RATE;
.loc 2 1295 42 view .LVU1296
lea rsi, -64[r13] # _6,
.LBE8036:
.LBE8035:
.LBE8284:
.LBE8292:
# xxh3.h:1380: {
.loc 2 1380 1 view .LVU1297
mov r12, r8 # secret, tmp348
.LBB8293:
.LBB8285:
# xxh3.h:1351: XXH_ALIGN(XXH_ACC_ALIGN) xxh_u64 acc[ACC_NB] = XXH3_INIT_ACC;
.loc 2 1351 38 view .LVU1298
mov QWORD PTR [r9], rax # acc, tmp387
.LBB8273:
.LBB8264:
# xxh3.h:1295: size_t const nb_rounds = (secretSize - STRIPE_LEN) / XXH_SECRET_CONSUME_RATE;
.loc 2 1295 18 view .LVU1299
shr rsi, 3 # nb_rounds,
.LBE8264:
.LBE8273:
# xxh3.h:1351: XXH_ALIGN(XXH_ACC_ALIGN) xxh_u64 acc[ACC_NB] = XXH3_INIT_ACC;
.loc 2 1351 38 view .LVU1300
movabs rax, -7046029288634856825 # tmp388,
mov QWORD PTR 8[r9], rax # acc, tmp388
.LBB8274:
.LBB8265:
# xxh3.h:1296: size_t const block_len = STRIPE_LEN * nb_rounds;
.loc 2 1296 18 view .LVU1301
mov rbx, rsi # block_len, nb_rounds
.LBE8265:
.LBE8274:
# xxh3.h:1351: XXH_ALIGN(XXH_ACC_ALIGN) xxh_u64 acc[ACC_NB] = XXH3_INIT_ACC;
.loc 2 1351 38 view .LVU1302
movabs rax, -4417276706812531889 # tmp389,
mov QWORD PTR 16[r9], rax # acc, tmp389
.LBB8275:
.LBB8266:
# xxh3.h:1296: size_t const block_len = STRIPE_LEN * nb_rounds;
.loc 2 1296 18 view .LVU1303
sal rbx, 6 # block_len,
.LBE8266:
.LBE8275:
# xxh3.h:1351: XXH_ALIGN(XXH_ACC_ALIGN) xxh_u64 acc[ACC_NB] = XXH3_INIT_ACC;
.loc 2 1351 38 view .LVU1304
movabs rax, 1609587929392839161 # tmp390,
mov QWORD PTR 24[r9], rax # acc, tmp390
movabs rax, -8796714831421723037 # tmp391,
mov QWORD PTR 32[r9], rax # acc, tmp391
mov eax, 2246822519 # tmp392,
mov QWORD PTR 40[r9], rax # acc, tmp392
movabs rax, 2870177450012600261 # tmp393,
mov QWORD PTR 48[r9], rax # acc, tmp393
mov eax, 2654435761 # tmp394,
mov QWORD PTR 56[r9], rax # acc, tmp394
.loc 2 1351 65 is_stmt 1 view .LVU1305
.loc 2 1353 5 view .LVU1306
.LVL283:
.LBB8276:
.LBI8035:
.loc 2 1290 1 view .LVU1307
.LBB8267:
.loc 2 1295 5 view .LVU1308
.loc 2 1296 5 view .LVU1309
.loc 2 1297 5 view .LVU1310
mov rax, rdx # tmp254, len
xor edx, edx # tmp255
.LVL284:
.loc 2 1297 5 is_stmt 0 view .LVU1311
div rbx # block_len
.LVL285:
.loc 2 1297 5 view .LVU1312
mov QWORD PTR 40[rsp], rdx # %sfp, tmp255
.LVL286:
.loc 2 1299 5 is_stmt 1 view .LVU1313
.loc 2 1301 5 view .LVU1314
.loc 2 1303 5 view .LVU1315
.loc 2 1303 17 view .LVU1316
# xxh3.h:1303: for (n = 0; n < nb_blocks; n++) {
.loc 2 1303 5 is_stmt 0 view .LVU1317
cmp rdi, rbx # len, block_len
jb .L63 #,
lea r14, 32[r8] # ivtmp.299,
vmovdqa ymm6, YMMWORD PTR [r9] # acc__lsm.276, MEM[(__m256i * {ref-all})&acc]
vmovdqa ymm1, YMMWORD PTR 32[r9] # acc__lsm.278, MEM[(__m256i * {ref-all})&acc + 32B]
# xxh3.h:1303: for (n = 0; n < nb_blocks; n++) {
.loc 2 1303 12 view .LVU1318
xor r11d, r11d # n
vmovdqa ymm3, YMMWORD PTR .LC1[rip] # tmp343,
vmovdqu ymm5, YMMWORD PTR -64[r8+r13] # _36, MEM[(const __m256i_u * {ref-all})_33]
lea r10, [r14+rsi*8] # _59,
lea r15, 384[rcx] # tmp345,
vmovdqu ymm4, YMMWORD PTR -32[r8+r13] # _290, MEM[(const __m256i_u * {ref-all})_143]
# xxh3.h:1303: for (n = 0; n < nb_blocks; n++) {
.loc 2 1303 5 view .LVU1319
xor r8d, r8d # ivtmp.308
.LVL287:
.p2align 4,,10
.p2align 3
.L66:
.loc 2 1304 9 is_stmt 1 view .LVU1320
.LBB8037:
.LBI8037:
.loc 2 1272 1 view .LVU1321
.LBB8038:
.loc 2 1278 5 view .LVU1322
.loc 2 1279 5 view .LVU1323
.loc 2 1279 17 view .LVU1324
# xxh3.h:1279: for (n = 0; n < nbStripes; n++ ) {
.loc 2 1279 5 is_stmt 0 view .LVU1325
test rsi, rsi # nb_rounds
je .L64 #,
lea rcx, [r15+r8] # ivtmp.295,
mov rdx, r14 # ivtmp.299, ivtmp.299
.LVL288:
.p2align 4,,10
.p2align 3
.L65:
.LBB8039:
.loc 2 1280 9 is_stmt 1 view .LVU1326
.loc 2 1281 9 view .LVU1327
.LBB8040:
.LBB8041:
.LBB8042:
.LBB8043:
.LBB8044:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU1328
vmovdqu ymm2, YMMWORD PTR -32[rdx] # tmp398, MEM[base: _74, offset: -32B]
vpxor ymm0, ymm2, YMMWORD PTR -384[rcx] # tmp263, tmp398, MEM[base: _16, offset: -384B]
add rdx, 8 # ivtmp.299,
.LBE8044:
.LBE8043:
.LBE8042:
.LBE8041:
.LBE8040:
# xxh3.h:1281: XXH_PREFETCH(in + XXH_PREFETCH_DIST);
.loc 2 1281 9 view .LVU1329
prefetcht0 [rcx] # ivtmp.295
.loc 2 1282 9 is_stmt 1 view .LVU1330
.LVL289:
.LBB8087:
.LBI8040:
.loc 2 921 1 view .LVU1331
.LBE8087:
.LBE8039:
.LBE8038:
.LBE8037:
.LBE8267:
.LBE8276:
.LBE8285:
.LBE8293:
.loc 2 928 5 view .LVU1332
.LBB8294:
.LBB8286:
.LBB8277:
.LBB8268:
.LBB8091:
.LBB8090:
.LBB8089:
.LBB8088:
.LBB8086:
.loc 2 929 9 view .LVU1333
.loc 2 932 9 view .LVU1334
.loc 2 935 9 view .LVU1335
.loc 2 937 9 view .LVU1336
.loc 2 938 9 view .LVU1337
.loc 2 938 19 view .LVU1338
.LBB8084:
.loc 2 940 13 view .LVU1339
.LBB8049:
.LBI8049:
.loc 4 919 1 view .LVU1340
.LBB8050:
.loc 4 921 3 view .LVU1341
.loc 4 921 3 is_stmt 0 view .LVU1342
.LBE8050:
.LBE8049:
.loc 2 942 13 is_stmt 1 view .LVU1343
.LBB8052:
.LBI8052:
.loc 4 919 1 view .LVU1344
.LBB8053:
.loc 4 921 3 view .LVU1345
.LBE8053:
.LBE8052:
.loc 2 944 13 view .LVU1346
.LBB8055:
.LBI8043:
.loc 3 913 1 view .LVU1347
.LBB8045:
.loc 3 915 3 view .LVU1348
.loc 3 915 3 is_stmt 0 view .LVU1349
.LBE8045:
.LBE8055:
.loc 2 946 13 is_stmt 1 view .LVU1350
.LBB8056:
.LBI8056:
.loc 3 597 1 view .LVU1351
.LBB8057:
.loc 3 599 3 view .LVU1352
add rcx, 64 # ivtmp.295,
.LVL290:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 is_stmt 0 view .LVU1353
vpshufd ymm2, ymm0, 49 # tmp264, tmp263,
.LVL291:
.loc 3 599 19 view .LVU1354
.LBE8057:
.LBE8056:
.loc 2 948 13 is_stmt 1 view .LVU1355
.LBB8060:
.LBI8060:
.loc 3 567 1 view .LVU1356
.LBB8061:
.loc 3 569 3 view .LVU1357
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU1358
vpmuludq ymm2, ymm0, ymm2 # tmp266, tmp263, tmp264
.LVL292:
.loc 3 569 19 view .LVU1359
.LBE8061:
.LBE8060:
.loc 2 949 13 is_stmt 1 view .LVU1360
.LBB8063:
.loc 2 957 17 view .LVU1361
.LBB8064:
.LBI8064:
.loc 3 126 1 view .LVU1362
.LBB8065:
.loc 3 128 3 view .LVU1363
.loc 3 128 3 is_stmt 0 view .LVU1364
.LBE8065:
.LBE8064:
.loc 2 959 17 is_stmt 1 view .LVU1365
.LBB8067:
.LBI8067:
.loc 3 126 1 view .LVU1366
.LBB8068:
.loc 3 128 3 view .LVU1367
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 is_stmt 0 view .LVU1368
vpaddq ymm0, ymm6, ymm2 # tmp267, acc__lsm.276, tmp266
.LBE8068:
.LBE8067:
.LBE8063:
.LBB8074:
.LBB8046:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 view .LVU1369
vmovdqu ymm2, YMMWORD PTR -8[rdx] # tmp399, MEM[base: _74, offset: 0B]
.LVL293:
.loc 3 915 33 view .LVU1370
.LBE8046:
.LBE8074:
.LBB8075:
.LBB8071:
.LBB8069:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 view .LVU1371
vpaddq ymm6, ymm0, YMMWORD PTR -448[rcx] # acc__lsm.276, tmp267, MEM[base: _16, offset: -384B]
.loc 3 128 33 view .LVU1372
.LBE8069:
.LBE8071:
.LBE8075:
.LBE8084:
.loc 2 938 51 is_stmt 1 view .LVU1373
.LVL294:
.loc 2 938 19 view .LVU1374
.LBB8085:
.loc 2 940 13 view .LVU1375
.LBB8076:
.loc 4 919 1 view .LVU1376
.LBB8051:
.loc 4 921 3 view .LVU1377
.loc 4 921 3 is_stmt 0 view .LVU1378
.LBE8051:
.LBE8076:
.loc 2 942 13 is_stmt 1 view .LVU1379
.LBB8077:
.loc 4 919 1 view .LVU1380
.LBB8054:
.loc 4 921 3 view .LVU1381
.LBE8054:
.LBE8077:
.loc 2 944 13 view .LVU1382
.LBB8078:
.loc 3 913 1 view .LVU1383
.LBB8047:
.loc 3 915 3 view .LVU1384
.loc 3 915 3 is_stmt 0 view .LVU1385
.LBE8047:
.LBE8078:
.loc 2 946 13 is_stmt 1 view .LVU1386
.LBB8079:
.loc 3 597 1 view .LVU1387
.LBB8058:
.loc 3 599 3 view .LVU1388
.LBE8058:
.LBE8079:
.LBB8080:
.LBB8048:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU1389
vpxor ymm0, ymm2, YMMWORD PTR -416[rcx] # tmp271, tmp399, MEM[base: _16, offset: -352B]
.LBE8048:
.LBE8080:
.LBB8081:
.LBB8059:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 view .LVU1390
vpshufd ymm2, ymm0, 49 # tmp272, tmp271,
.LVL295:
.loc 3 599 19 view .LVU1391
.LBE8059:
.LBE8081:
.loc 2 948 13 is_stmt 1 view .LVU1392
.LBB8082:
.loc 3 567 1 view .LVU1393
.LBB8062:
.loc 3 569 3 view .LVU1394
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU1395
vpmuludq ymm0, ymm0, ymm2 # tmp274, tmp271, tmp272
.LVL296:
.loc 3 569 19 view .LVU1396
.LBE8062:
.LBE8082:
.loc 2 949 13 is_stmt 1 view .LVU1397
.LBB8083:
.loc 2 957 17 view .LVU1398
.LBB8072:
.loc 3 126 1 view .LVU1399
.LBB8066:
.loc 3 128 3 view .LVU1400
.loc 3 128 3 is_stmt 0 view .LVU1401
.LBE8066:
.LBE8072:
.loc 2 959 17 is_stmt 1 view .LVU1402
.LBB8073:
.loc 3 126 1 view .LVU1403
.LBB8070:
.loc 3 128 3 view .LVU1404
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 is_stmt 0 view .LVU1405
vpaddq ymm1, ymm1, ymm0 # tmp275, acc__lsm.278, tmp274
vpaddq ymm1, ymm1, YMMWORD PTR -416[rcx] # acc__lsm.278, tmp275, MEM[base: _16, offset: -352B]
.LVL297:
.loc 3 128 33 view .LVU1406
.LBE8070:
.LBE8073:
.LBE8083:
.LBE8085:
.loc 2 938 51 is_stmt 1 view .LVU1407
.loc 2 938 19 view .LVU1408
.loc 2 938 19 is_stmt 0 view .LVU1409
.LBE8086:
.LBE8088:
.LBE8089:
.loc 2 1279 32 is_stmt 1 view .LVU1410
.loc 2 1279 17 view .LVU1411
# xxh3.h:1279: for (n = 0; n < nbStripes; n++ ) {
.loc 2 1279 5 is_stmt 0 view .LVU1412
cmp r10, rdx # _59, ivtmp.299
jne .L65 #,
.LVL298:
.L64:
.loc 2 1279 5 view .LVU1413
.LBE8090:
.LBE8091:
.LBB8092:
.LBB8093:
.loc 2 1123 19 is_stmt 1 view .LVU1414
.LBB8094:
.loc 2 1125 13 view .LVU1415
.loc 2 1126 13 view .LVU1416
.LBB8095:
.LBI8095:
.loc 3 787 1 view .LVU1417
.LBB8096:
.loc 3 789 3 view .LVU1418
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:789: return (__m256i)__builtin_ia32_psrlqi256 ((__v4di)__A, __B);
.loc 3 789 19 is_stmt 0 view .LVU1419
vpsrlq ymm0, ymm6, 47 # tmp277, acc__lsm.276,
.LVL299:
.loc 3 789 19 view .LVU1420
.LBE8096:
.LBE8095:
.loc 2 1127 13 is_stmt 1 view .LVU1421
.LBB8099:
.LBI8099:
.loc 3 913 1 view .LVU1422
.LBB8100:
.loc 3 915 3 view .LVU1423
.loc 3 915 3 is_stmt 0 view .LVU1424
.LBE8100:
.LBE8099:
.loc 2 1129 13 is_stmt 1 view .LVU1425
.loc 2 1129 13 is_stmt 0 view .LVU1426
.LBE8094:
.LBE8093:
.LBE8092:
.LBE8268:
.LBE8277:
.LBE8286:
.LBE8294:
.loc 4 921 3 is_stmt 1 view .LVU1427
.LBB8295:
.LBB8287:
.LBB8278:
.LBB8269:
.LBB8144:
.LBB8141:
.LBB8137:
.loc 2 1130 13 view .LVU1428
.LBB8102:
.LBI8102:
.loc 3 913 1 view .LVU1429
.LBB8103:
.loc 3 915 3 view .LVU1430
.loc 3 915 3 is_stmt 0 view .LVU1431
.LBE8103:
.LBE8102:
.loc 2 1133 13 is_stmt 1 view .LVU1432
.LBB8106:
.LBI8106:
.loc 3 597 1 view .LVU1433
.LBB8107:
.loc 3 599 3 view .LVU1434
.LBE8107:
.LBE8106:
.LBB8110:
.LBB8097:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:789: return (__m256i)__builtin_ia32_psrlqi256 ((__v4di)__A, __B);
.loc 3 789 19 is_stmt 0 view .LVU1435
vpsrlq ymm2, ymm1, 47 # tmp290, acc__lsm.278,
.LBE8097:
.LBE8110:
.LBE8137:
.LBE8141:
.LBE8144:
# xxh3.h:1303: for (n = 0; n < nb_blocks; n++) {
.loc 2 1303 33 view .LVU1436
add r11, 1 # n,
.LVL300:
.loc 2 1303 33 view .LVU1437
add r8, rbx # ivtmp.308, block_len
.LBB8145:
.LBB8142:
.LBB8138:
.LBB8111:
.LBB8104:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 view .LVU1438
vpxor ymm0, ymm6, ymm0 # tmp279, acc__lsm.276, tmp277
.LVL301:
.loc 3 915 33 view .LVU1439
vpxor ymm1, ymm1, ymm2 # tmp292, acc__lsm.278, tmp290
vpxor ymm0, ymm0, ymm5 # tmp280, tmp279, _36
.LVL302:
.loc 3 915 33 view .LVU1440
vpxor ymm1, ymm1, ymm4 # tmp293, tmp292, _290
.LBE8104:
.LBE8111:
.LBB8112:
.LBB8108:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 view .LVU1441
vpshufd ymm6, ymm0, 49 # tmp281, tmp280,
.LVL303:
.loc 3 599 19 view .LVU1442
.LBE8108:
.LBE8112:
.loc 2 1134 13 is_stmt 1 view .LVU1443
.LBB8113:
.LBI8113:
.loc 3 567 1 view .LVU1444
.LBB8114:
.loc 3 569 3 view .LVU1445
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU1446
vpmuludq ymm0, ymm0, ymm3 # tmp283, tmp280, tmp343
.LVL304:
.loc 3 569 19 view .LVU1447
.LBE8114:
.LBE8113:
.loc 2 1135 13 is_stmt 1 view .LVU1448
.LBB8117:
.LBI8117:
.loc 3 567 1 view .LVU1449
.LBB8118:
.loc 3 569 3 view .LVU1450
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU1451
vpmuludq ymm6, ymm6, ymm3 # tmp285, tmp281, tmp343
.LVL305:
.loc 3 569 19 view .LVU1452
.LBE8118:
.LBE8117:
.loc 2 1136 13 is_stmt 1 view .LVU1453
.LBB8121:
.LBI8121:
.loc 3 696 1 view .LVU1454
.LBB8122:
.loc 3 698 3 view .LVU1455
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:698: return (__m256i)__builtin_ia32_psllqi256 ((__v4di)__A, __B);
.loc 3 698 19 is_stmt 0 view .LVU1456
vpsllq ymm6, ymm6, 32 # tmp287, tmp285,
.LVL306:
.loc 3 698 19 view .LVU1457
.LBE8122:
.LBE8121:
.LBB8124:
.LBI8124:
.loc 3 126 1 is_stmt 1 view .LVU1458
.LBB8125:
.loc 3 128 3 view .LVU1459
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 is_stmt 0 view .LVU1460
vpaddq ymm6, ymm0, ymm6 # acc__lsm.276, tmp283, tmp287
.LVL307:
.loc 3 128 33 view .LVU1461
.LBE8125:
.LBE8124:
.LBE8138:
.loc 2 1123 51 is_stmt 1 view .LVU1462
.loc 2 1123 19 view .LVU1463
.LBB8139:
.loc 2 1125 13 view .LVU1464
.loc 2 1126 13 view .LVU1465
.LBB8127:
.loc 3 787 1 view .LVU1466
.LBB8098:
.loc 3 789 3 view .LVU1467
.loc 3 789 3 is_stmt 0 view .LVU1468
.LBE8098:
.LBE8127:
.loc 2 1127 13 is_stmt 1 view .LVU1469
.LBB8128:
.loc 3 913 1 view .LVU1470
.LBB8101:
.loc 3 915 3 view .LVU1471
.loc 3 915 3 is_stmt 0 view .LVU1472
.LBE8101:
.LBE8128:
.loc 2 1129 13 is_stmt 1 view .LVU1473
.loc 2 1129 13 is_stmt 0 view .LVU1474
.LBE8139:
.LBE8142:
.LBE8145:
.LBE8269:
.LBE8278:
.LBE8287:
.LBE8295:
.loc 4 921 3 is_stmt 1 view .LVU1475
.LBB8296:
.LBB8288:
.LBB8279:
.LBB8270:
.LBB8146:
.LBB8143:
.LBB8140:
.loc 2 1130 13 view .LVU1476
.LBB8129:
.loc 3 913 1 view .LVU1477
.LBB8105:
.loc 3 915 3 view .LVU1478
.loc 3 915 3 is_stmt 0 view .LVU1479
.LBE8105:
.LBE8129:
.loc 2 1133 13 is_stmt 1 view .LVU1480
.LBB8130:
.loc 3 597 1 view .LVU1481
.LBB8109:
.loc 3 599 3 view .LVU1482
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 is_stmt 0 view .LVU1483
vpshufd ymm0, ymm1, 49 # tmp294, tmp293,
.LVL308:
.loc 3 599 19 view .LVU1484
.LBE8109:
.LBE8130:
.loc 2 1134 13 is_stmt 1 view .LVU1485
.LBB8131:
.loc 3 567 1 view .LVU1486
.LBB8115:
.loc 3 569 3 view .LVU1487
.LBE8115:
.LBE8131:
.LBB8132:
.LBB8119:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU1488
vpmuludq ymm0, ymm0, ymm3 # tmp298, tmp294, tmp343
.LVL309:
.loc 3 569 19 view .LVU1489
.LBE8119:
.LBE8132:
.LBB8133:
.LBB8116:
vpmuludq ymm1, ymm1, ymm3 # tmp296, tmp293, tmp343
.LVL310:
.loc 3 569 19 view .LVU1490
.LBE8116:
.LBE8133:
.loc 2 1135 13 is_stmt 1 view .LVU1491
.LBB8134:
.loc 3 567 1 view .LVU1492
.LBB8120:
.loc 3 569 3 view .LVU1493
.loc 3 569 3 is_stmt 0 view .LVU1494
.LBE8120:
.LBE8134:
.loc 2 1136 13 is_stmt 1 view .LVU1495
.LBB8135:
.loc 3 696 1 view .LVU1496
.LBB8123:
.loc 3 698 3 view .LVU1497
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:698: return (__m256i)__builtin_ia32_psllqi256 ((__v4di)__A, __B);
.loc 3 698 19 is_stmt 0 view .LVU1498
vpsllq ymm0, ymm0, 32 # tmp300, tmp298,
.LVL311:
.loc 3 698 19 view .LVU1499
.LBE8123:
.LBE8135:
.LBB8136:
.loc 3 126 1 is_stmt 1 view .LVU1500
.LBB8126:
.loc 3 128 3 view .LVU1501
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 is_stmt 0 view .LVU1502
vpaddq ymm1, ymm1, ymm0 # acc__lsm.278, tmp296, tmp300
.LVL312:
.loc 3 128 33 view .LVU1503
.LBE8126:
.LBE8136:
.LBE8140:
.loc 2 1123 51 is_stmt 1 view .LVU1504
.loc 2 1123 19 view .LVU1505
.loc 2 1123 19 is_stmt 0 view .LVU1506
.LBE8143:
.LBE8146:
.loc 2 1303 32 is_stmt 1 view .LVU1507
.loc 2 1303 17 view .LVU1508
# xxh3.h:1303: for (n = 0; n < nb_blocks; n++) {
.loc 2 1303 5 is_stmt 0 view .LVU1509
cmp rax, r11 # tmp254, n
ja .L66 #,
vmovdqa YMMWORD PTR [r9], ymm6 # MEM[(__m256i * {ref-all})&acc], acc__lsm.276
.LVL313:
.loc 2 1303 5 view .LVU1510
vmovdqa YMMWORD PTR 32[r9], ymm1 # MEM[(__m256i * {ref-all})&acc + 32B], acc__lsm.278
.LVL314:
.L63:
.loc 2 1309 5 is_stmt 1 view .LVU1511
.LBB8147:
.loc 2 1310 9 view .LVU1512
.loc 2 1311 9 view .LVU1513
.loc 2 1312 9 view .LVU1514
.LBB8148:
.LBB8149:
# xxh3.h:1279: for (n = 0; n < nbStripes; n++ ) {
.loc 2 1279 5 is_stmt 0 view .LVU1515
mov rcx, QWORD PTR 40[rsp] # tmp255, %sfp
.LBE8149:
.LBE8148:
# xxh3.h:1310: { size_t const nbStripes = (len - (block_len * nb_blocks)) / STRIPE_LEN;
.loc 2 1310 52 view .LVU1516
imul rax, rbx # _64, block_len
.LVL315:
.LBB8203:
.LBI8148:
.loc 2 1272 1 is_stmt 1 view .LVU1517
.LBB8201:
.loc 2 1278 5 view .LVU1518
.loc 2 1279 5 view .LVU1519
.loc 2 1279 17 view .LVU1520
# xxh3.h:1279: for (n = 0; n < nbStripes; n++ ) {
.loc 2 1279 5 is_stmt 0 view .LVU1521
shr rcx, 6 # tmp255,
.LVL316:
.loc 2 1279 5 view .LVU1522
je .L67 #,
lea rdx, 384[rbp+rax] # ivtmp.284,
vmovdqa ymm2, YMMWORD PTR [r9] # acc__lsm.272, MEM[(__m256i * {ref-all})&acc]
lea rax, 32[r12] # ivtmp.288,
.LVL317:
.loc 2 1279 5 view .LVU1523
vmovdqa ymm1, YMMWORD PTR 32[r9] # acc__lsm.274, MEM[(__m256i * {ref-all})&acc + 32B]
lea rcx, [rax+rcx*8] # _87,
.LVL318:
.p2align 4,,10
.p2align 3
.L68:
.LBB8150:
.loc 2 1280 9 is_stmt 1 view .LVU1524
.loc 2 1281 9 view .LVU1525
.LBB8151:
.LBB8152:
.LBB8153:
.LBB8154:
.LBB8155:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU1526
vmovdqu ymm4, YMMWORD PTR -32[rax] # tmp401, MEM[base: _91, offset: -32B]
vmovdqu ymm5, YMMWORD PTR [rax] # tmp402, MEM[base: _91, offset: 0B]
add rax, 8 # ivtmp.288,
.LBE8155:
.LBE8154:
.LBE8153:
.LBE8152:
.LBE8151:
# xxh3.h:1281: XXH_PREFETCH(in + XXH_PREFETCH_DIST);
.loc 2 1281 9 view .LVU1527
prefetcht0 [rdx] # ivtmp.284
.loc 2 1282 9 is_stmt 1 view .LVU1528
.LVL319:
.LBB8198:
.LBI8151:
.loc 2 921 1 view .LVU1529
.LBE8198:
.LBE8150:
.LBE8201:
.LBE8203:
.LBE8147:
.LBE8270:
.LBE8279:
.LBE8288:
.LBE8296:
.loc 2 928 5 view .LVU1530
.LBB8297:
.LBB8289:
.LBB8280:
.LBB8271:
.LBB8262:
.LBB8204:
.LBB8202:
.LBB8200:
.LBB8199:
.LBB8197:
.loc 2 929 9 view .LVU1531
.loc 2 932 9 view .LVU1532
.loc 2 935 9 view .LVU1533
.loc 2 937 9 view .LVU1534
.loc 2 938 9 view .LVU1535
.loc 2 938 19 view .LVU1536
.LBB8195:
.loc 2 940 13 view .LVU1537
.LBB8160:
.LBI8160:
.loc 4 919 1 view .LVU1538
.LBB8161:
.loc 4 921 3 view .LVU1539
.loc 4 921 3 is_stmt 0 view .LVU1540
.LBE8161:
.LBE8160:
.loc 2 942 13 is_stmt 1 view .LVU1541
.LBB8163:
.LBI8163:
.loc 4 919 1 view .LVU1542
.LBB8164:
.loc 4 921 3 view .LVU1543
.LBE8164:
.LBE8163:
.loc 2 944 13 view .LVU1544
.LBB8166:
.LBI8154:
.loc 3 913 1 view .LVU1545
.LBB8156:
.loc 3 915 3 view .LVU1546
.loc 3 915 3 is_stmt 0 view .LVU1547
.LBE8156:
.LBE8166:
.loc 2 946 13 is_stmt 1 view .LVU1548
.LBB8167:
.LBI8167:
.loc 3 597 1 view .LVU1549
.LBB8168:
.loc 3 599 3 view .LVU1550
.LBE8168:
.LBE8167:
.LBB8171:
.LBB8157:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU1551
vpxor ymm0, ymm4, YMMWORD PTR -384[rdx] # tmp308, tmp401, MEM[base: _71, offset: -384B]
add rdx, 64 # ivtmp.284,
.LVL320:
.loc 3 915 33 view .LVU1552
.LBE8157:
.LBE8171:
.LBB8172:
.LBB8169:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 view .LVU1553
vpshufd ymm3, ymm0, 49 # tmp309, tmp308,
.LVL321:
.loc 3 599 19 view .LVU1554
.LBE8169:
.LBE8172:
.loc 2 948 13 is_stmt 1 view .LVU1555
.LBB8173:
.LBI8173:
.loc 3 567 1 view .LVU1556
.LBB8174:
.loc 3 569 3 view .LVU1557
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU1558
vpmuludq ymm0, ymm0, ymm3 # tmp311, tmp308, tmp309
.LVL322:
.loc 3 569 19 view .LVU1559
.LBE8174:
.LBE8173:
.loc 2 949 13 is_stmt 1 view .LVU1560
.LBB8176:
.loc 2 957 17 view .LVU1561
.LBB8177:
.LBI8177:
.loc 3 126 1 view .LVU1562
.LBB8178:
.loc 3 128 3 view .LVU1563
.loc 3 128 3 is_stmt 0 view .LVU1564
.LBE8178:
.LBE8177:
.loc 2 959 17 is_stmt 1 view .LVU1565
.LBB8180:
.LBI8180:
.loc 3 126 1 view .LVU1566
.LBB8181:
.loc 3 128 3 view .LVU1567
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 is_stmt 0 view .LVU1568
vpaddq ymm2, ymm2, ymm0 # tmp312, acc__lsm.272, tmp311
.LBE8181:
.LBE8180:
.LBE8176:
.LBB8187:
.LBB8158:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 view .LVU1569
vpxor ymm0, ymm5, YMMWORD PTR -416[rdx] # tmp316, tmp402, MEM[base: _71, offset: -352B]
.LVL323:
.loc 3 915 33 view .LVU1570
.LBE8158:
.LBE8187:
.LBB8188:
.LBB8184:
.LBB8182:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 view .LVU1571
vpaddq ymm2, ymm2, YMMWORD PTR -448[rdx] # acc__lsm.272, tmp312, MEM[base: _71, offset: -384B]
.loc 3 128 33 view .LVU1572
.LBE8182:
.LBE8184:
.LBE8188:
.LBE8195:
.loc 2 938 51 is_stmt 1 view .LVU1573
.LVL324:
.loc 2 938 19 view .LVU1574
.LBB8196:
.loc 2 940 13 view .LVU1575
.LBB8189:
.loc 4 919 1 view .LVU1576
.LBB8162:
.loc 4 921 3 view .LVU1577
.loc 4 921 3 is_stmt 0 view .LVU1578
.LBE8162:
.LBE8189:
.loc 2 942 13 is_stmt 1 view .LVU1579
.LBB8190:
.loc 4 919 1 view .LVU1580
.LBB8165:
.loc 4 921 3 view .LVU1581
.LBE8165:
.LBE8190:
.loc 2 944 13 view .LVU1582
.LBB8191:
.loc 3 913 1 view .LVU1583
.LBB8159:
.loc 3 915 3 view .LVU1584
.loc 3 915 3 is_stmt 0 view .LVU1585
.LBE8159:
.LBE8191:
.loc 2 946 13 is_stmt 1 view .LVU1586
.LBB8192:
.loc 3 597 1 view .LVU1587
.LBB8170:
.loc 3 599 3 view .LVU1588
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 is_stmt 0 view .LVU1589
vpshufd ymm3, ymm0, 49 # tmp317, tmp316,
.LVL325:
.loc 3 599 19 view .LVU1590
.LBE8170:
.LBE8192:
.loc 2 948 13 is_stmt 1 view .LVU1591
.LBB8193:
.loc 3 567 1 view .LVU1592
.LBB8175:
.loc 3 569 3 view .LVU1593
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU1594
vpmuludq ymm0, ymm0, ymm3 # tmp319, tmp316, tmp317
.LVL326:
.loc 3 569 19 view .LVU1595
.LBE8175:
.LBE8193:
.loc 2 949 13 is_stmt 1 view .LVU1596
.LBB8194:
.loc 2 957 17 view .LVU1597
.LBB8185:
.loc 3 126 1 view .LVU1598
.LBB8179:
.loc 3 128 3 view .LVU1599
.loc 3 128 3 is_stmt 0 view .LVU1600
.LBE8179:
.LBE8185:
.loc 2 959 17 is_stmt 1 view .LVU1601
.LBB8186:
.loc 3 126 1 view .LVU1602
.LBB8183:
.loc 3 128 3 view .LVU1603
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 is_stmt 0 view .LVU1604
vpaddq ymm1, ymm1, ymm0 # tmp320, acc__lsm.274, tmp319
vpaddq ymm1, ymm1, YMMWORD PTR -416[rdx] # acc__lsm.274, tmp320, MEM[base: _71, offset: -352B]
.LVL327:
.loc 3 128 33 view .LVU1605
.LBE8183:
.LBE8186:
.LBE8194:
.LBE8196:
.loc 2 938 51 is_stmt 1 view .LVU1606
.loc 2 938 19 view .LVU1607
.loc 2 938 19 is_stmt 0 view .LVU1608
.LBE8197:
.LBE8199:
.LBE8200:
.loc 2 1279 32 is_stmt 1 view .LVU1609
.loc 2 1279 17 view .LVU1610
# xxh3.h:1279: for (n = 0; n < nbStripes; n++ ) {
.loc 2 1279 5 is_stmt 0 view .LVU1611
cmp rcx, rax # _87, ivtmp.288
jne .L68 #,
vmovdqa YMMWORD PTR [r9], ymm2 # MEM[(__m256i * {ref-all})&acc], acc__lsm.272
vmovdqa YMMWORD PTR 32[r9], ymm1 # MEM[(__m256i * {ref-all})&acc + 32B], acc__lsm.274
.LVL328:
.L67:
.loc 2 1279 5 view .LVU1612
.LBE8202:
.LBE8204:
.loc 2 1315 9 is_stmt 1 view .LVU1613
# xxh3.h:1315: if (len & (STRIPE_LEN - 1)) {
.loc 2 1315 12 is_stmt 0 view .LVU1614
test dil, 63 # len,
je .L69 #,
.LBB8205:
.loc 2 1316 13 is_stmt 1 view .LVU1615
.LVL329:
.loc 2 1319 13 view .LVU1616
.LBB8206:
.LBI8206:
.loc 2 921 1 view .LVU1617
.LBE8206:
.LBE8205:
.LBE8262:
.LBE8271:
.LBE8280:
.LBE8289:
.LBE8297:
.loc 2 928 5 view .LVU1618
.LBB8298:
.LBB8290:
.LBB8281:
.LBB8272:
.LBB8263:
.LBB8261:
.LBB8260:
.LBB8207:
.loc 2 929 9 view .LVU1619
.loc 2 932 9 view .LVU1620
.loc 2 935 9 view .LVU1621
.loc 2 937 9 view .LVU1622
.loc 2 938 9 view .LVU1623
.loc 2 938 19 view .LVU1624
.LBB8208:
.loc 2 940 13 view .LVU1625
.LBB8209:
.LBI8209:
.loc 4 919 1 view .LVU1626
.LBB8210:
.loc 4 921 3 view .LVU1627
.loc 4 921 3 is_stmt 0 view .LVU1628
.LBE8210:
.LBE8209:
.loc 2 942 13 is_stmt 1 view .LVU1629
.LBB8213:
.LBI8213:
.loc 4 919 1 view .LVU1630
.LBB8214:
.loc 4 921 3 view .LVU1631
.loc 4 921 3 is_stmt 0 view .LVU1632
.LBE8214:
.LBE8213:
.loc 2 944 13 is_stmt 1 view .LVU1633
.LBB8216:
.LBI8216:
.loc 3 913 1 view .LVU1634
.LBB8217:
.loc 3 915 3 view .LVU1635
.loc 3 915 3 is_stmt 0 view .LVU1636
.LBE8217:
.LBE8216:
.loc 2 946 13 is_stmt 1 view .LVU1637
.LBB8221:
.LBI8221:
.loc 3 597 1 view .LVU1638
.LBB8222:
.loc 3 599 3 view .LVU1639
.LBE8222:
.LBE8221:
.LBB8226:
.LBB8218:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU1640
vmovdqu ymm4, YMMWORD PTR -71[r12+r13] # tmp403, MEM[(const __m256i_u * {ref-all})_151]
vpxor ymm0, ymm4, YMMWORD PTR -64[rbp+rdi] # tmp325, tmp403, MEM[(const __m256i_u * {ref-all})_148]
.LVL330:
.loc 3 915 33 view .LVU1641
.LBE8218:
.LBE8226:
.LBB8227:
.LBB8228:
.LBB8229:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 view .LVU1642
vmovdqu ymm5, YMMWORD PTR -64[rbp+rdi] # tmp404, MEM[(const __m256i_u * {ref-all})_148]
.LBE8229:
.LBE8228:
.LBE8227:
.LBB8244:
.LBB8223:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 view .LVU1643
vpshufd ymm1, ymm0, 49 # tmp326, tmp325,
.LVL331:
.loc 3 599 19 view .LVU1644
.LBE8223:
.LBE8244:
.loc 2 948 13 is_stmt 1 view .LVU1645
.LBB8245:
.LBI8245:
.loc 3 567 1 view .LVU1646
.LBB8246:
.loc 3 569 3 view .LVU1647
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU1648
vpmuludq ymm1, ymm0, ymm1 # tmp328, tmp325, tmp326
.LVL332:
.loc 3 569 19 view .LVU1649
.LBE8246:
.LBE8245:
.loc 2 949 13 is_stmt 1 view .LVU1650
.LBB8248:
.loc 2 957 17 view .LVU1651
.LBB8234:
.LBI8228:
.loc 3 126 1 view .LVU1652
.LBB8230:
.loc 3 128 3 view .LVU1653
.loc 3 128 3 is_stmt 0 view .LVU1654
.LBE8230:
.LBE8234:
.loc 2 959 17 is_stmt 1 view .LVU1655
.LBB8235:
.LBI8235:
.loc 3 126 1 view .LVU1656
.LBB8236:
.loc 3 128 3 view .LVU1657
.loc 3 128 3 is_stmt 0 view .LVU1658
.LBE8236:
.LBE8235:
.LBB8239:
.LBB8231:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 view .LVU1659
vpaddq ymm0, ymm5, YMMWORD PTR [r9] # tmp329, tmp404, MEM[(__m256i * {ref-all})&acc]
.LVL333:
.loc 3 128 33 view .LVU1660
.LBE8231:
.LBE8239:
.LBB8240:
.LBB8237:
vpaddq ymm0, ymm0, ymm1 # tmp330, tmp329, tmp328
.LVL334:
.loc 3 128 33 view .LVU1661
.LBE8237:
.LBE8240:
# xxh3.h:959: xacc[i] = _mm256_add_epi64(product, sum);
.loc 2 959 25 view .LVU1662
vmovdqa YMMWORD PTR [r9], ymm0 # MEM[(__m256i * {ref-all})&acc], tmp330
.LVL335:
.loc 2 959 25 view .LVU1663
.LBE8248:
.LBE8208:
.loc 2 938 51 is_stmt 1 view .LVU1664
.loc 2 938 19 view .LVU1665
.LBB8259:
.loc 2 940 13 view .LVU1666
.LBB8249:
.loc 4 919 1 view .LVU1667
.LBB8211:
.loc 4 921 3 view .LVU1668
.loc 4 921 3 is_stmt 0 view .LVU1669
.LBE8211:
.LBE8249:
.loc 2 942 13 is_stmt 1 view .LVU1670
.LBB8250:
.loc 4 919 1 view .LVU1671
.LBB8215:
.loc 4 921 3 view .LVU1672
.loc 4 921 3 is_stmt 0 view .LVU1673
.LBE8215:
.LBE8250:
.loc 2 944 13 is_stmt 1 view .LVU1674
.LBB8251:
.loc 3 913 1 view .LVU1675
.LBB8219:
.loc 3 915 3 view .LVU1676
.LBE8219:
.LBE8251:
.LBB8252:
.LBB8212:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avxintrin.h:921: return *__P;
.loc 4 921 10 is_stmt 0 view .LVU1677
vmovdqu ymm0, YMMWORD PTR -32[rbp+rdi] # MEM[(const __m256i_u * {ref-all})_172], MEM[(const __m256i_u * {ref-all})_172]
.LVL336:
.loc 4 921 10 view .LVU1678
.LBE8212:
.LBE8252:
.loc 2 946 13 is_stmt 1 view .LVU1679
.LBB8253:
.loc 3 597 1 view .LVU1680
.LBB8224:
.loc 3 599 3 view .LVU1681
.LBE8224:
.LBE8253:
.LBB8254:
.LBB8220:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU1682
vpxor ymm1, ymm0, YMMWORD PTR -39[r12+r13] # tmp333, MEM[(const __m256i_u * {ref-all})_172], MEM[(const __m256i_u * {ref-all})_175]
.LVL337:
.loc 3 915 33 view .LVU1683
.LBE8220:
.LBE8254:
.LBB8255:
.LBB8241:
.LBB8232:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 view .LVU1684
vpaddq ymm0, ymm0, YMMWORD PTR 32[r9] # tmp337, MEM[(const __m256i_u * {ref-all})_172], MEM[(__m256i * {ref-all})&acc + 32B]
.LBE8232:
.LBE8241:
.LBE8255:
.LBB8256:
.LBB8225:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 view .LVU1685
vpshufd ymm2, ymm1, 49 # tmp334, tmp333,
.LVL338:
.loc 3 599 19 view .LVU1686
.LBE8225:
.LBE8256:
.loc 2 948 13 is_stmt 1 view .LVU1687
.LBB8257:
.loc 3 567 1 view .LVU1688
.LBB8247:
.loc 3 569 3 view .LVU1689
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU1690
vpmuludq ymm1, ymm1, ymm2 # tmp336, tmp333, tmp334
.LVL339:
.loc 3 569 19 view .LVU1691
.LBE8247:
.LBE8257:
.loc 2 949 13 is_stmt 1 view .LVU1692
.LBB8258:
.loc 2 957 17 view .LVU1693
.LBB8242:
.loc 3 126 1 view .LVU1694
.LBB8233:
.loc 3 128 3 view .LVU1695
.loc 3 128 3 is_stmt 0 view .LVU1696
.LBE8233:
.LBE8242:
.loc 2 959 17 is_stmt 1 view .LVU1697
.LBB8243:
.loc 3 126 1 view .LVU1698
.LBB8238:
.loc 3 128 3 view .LVU1699
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 is_stmt 0 view .LVU1700
vpaddq ymm0, ymm0, ymm1 # tmp338, tmp337, tmp336
.LBE8238:
.LBE8243:
# xxh3.h:959: xacc[i] = _mm256_add_epi64(product, sum);
.loc 2 959 25 view .LVU1701
vmovdqa YMMWORD PTR 32[r9], ymm0 # MEM[(__m256i * {ref-all})&acc + 32B], tmp338
.LBE8258:
.LBE8259:
.loc 2 938 51 is_stmt 1 view .LVU1702
.LVL340:
.loc 2 938 19 view .LVU1703
.L69:
.loc 2 938 19 is_stmt 0 view .LVU1704
.LBE8207:
.LBE8260:
.LBE8261:
.LBE8263:
.LBE8272:
.LBE8281:
.LBB8282:
.loc 2 1356 5 is_stmt 1 view .LVU1705
.LBE8282:
.loc 2 1356 41 view .LVU1706
.loc 2 1359 5 view .LVU1707
.loc 2 1360 5 view .LVU1708
# xxh3.h:1360: return XXH3_mergeAccs(acc, secret + XXH_SECRET_MERGEACCS_START, (xxh_u64)len * PRIME64_1);
.loc 2 1360 12 is_stmt 0 view .LVU1709
movabs r8, -7046029288634856825 # tmp340,
lea rdx, 11[r12] # tmp341,
mov rcx, r9 #, tmp243
imul r8, rdi #, len
vzeroupper
call XXH3_mergeAccs #
nop
.LVL341:
.loc 2 1360 12 view .LVU1710
.LBE8290:
.LBE8298:
# xxh3.h:1382: }
.loc 2 1382 1 view .LVU1711
vmovaps xmm6, XMMWORD PTR 128[rsp] #,
add rsp, 152 #,
.cfi_restore 23
.cfi_def_cfa_offset 72
pop rbx #
.cfi_restore 3
.cfi_def_cfa_offset 64
pop rsi #
.cfi_restore 4
.cfi_def_cfa_offset 56
pop rdi #
.cfi_restore 5
.cfi_def_cfa_offset 48
.LVL342:
.loc 2 1382 1 view .LVU1712
pop rbp #
.cfi_restore 6
.cfi_def_cfa_offset 40
.LVL343:
.loc 2 1382 1 view .LVU1713
pop r12 #
.cfi_restore 12
.cfi_def_cfa_offset 32
.LVL344:
.loc 2 1382 1 view .LVU1714
pop r13 #
.cfi_restore 13
.cfi_def_cfa_offset 24
.LVL345:
.loc 2 1382 1 view .LVU1715
pop r14 #
.cfi_restore 14
.cfi_def_cfa_offset 16
pop r15 #
.cfi_restore 15
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE5339:
.seh_endproc
.p2align 4
.def XXH3_hashLong_64b_withSeed; .scl 3; .type 32; .endef
.seh_proc XXH3_hashLong_64b_withSeed
XXH3_hashLong_64b_withSeed:
.LVL346:
.LFB5342:
.loc 2 1421 1 is_stmt 1 view -0
.cfi_startproc
.loc 2 1421 1 is_stmt 0 view .LVU1717
push rdi #
.seh_pushreg rdi
.cfi_def_cfa_offset 16
.cfi_offset 5, -16
push rsi #
.seh_pushreg rsi
.cfi_def_cfa_offset 24
.cfi_offset 4, -24
push rbx #
.seh_pushreg rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
sub rsp, 336 #,
.seh_stackalloc 336
.cfi_def_cfa_offset 368
vmovaps XMMWORD PTR 304[rsp], xmm6 #,
.seh_savexmm xmm6, 304
vmovaps XMMWORD PTR 320[rsp], xmm7 #,
.seh_savexmm xmm7, 320
.cfi_offset 23, -64
.cfi_offset 24, -48
.seh_endprologue
.loc 2 1422 5 is_stmt 1 view .LVU1718
.loc 2 1423 5 view .LVU1719
# xxh3.h:1421: {
.loc 2 1421 1 is_stmt 0 view .LVU1720
lea r10, 255[rsp] # tmp230,
mov r11, rcx # input, tmp338
and r10, -32 # tmp232,
# xxh3.h:1423: if (seed==0) return XXH3_hashLong_64b_defaultSecret(input, len);
.loc 2 1423 8 view .LVU1721
test r8, r8 # seed
je .L83 #,
lea rax, kSecret[rip] # ivtmp.370,
lea rcx, 40[rsp] # ivtmp.372,
.LVL347:
.loc 2 1423 8 view .LVU1722
movabs r9, -4734510112055689544 # prephitmp_42,
lea rbx, 192[rax] # _340,
jmp .L84 #
.LVL348:
.p2align 4,,10
.p2align 3
.L106:
.loc 2 1423 8 view .LVU1723
mov r9, QWORD PTR [rax] # prephitmp_42, MEM[base: _188, offset: 0B]
.L84:
.LBB8299:
.LBB8300:
.loc 2 1402 9 is_stmt 1 view .LVU1724
.LVL349:
.loc 2 1402 9 is_stmt 0 view .LVU1725
.LBE8300:
.LBE8299:
.loc 1 1550 5 is_stmt 1 view .LVU1726
.loc 1 1492 5 view .LVU1727
.loc 1 1493 5 view .LVU1728
.loc 1 1494 5 view .LVU1729
.LBB8309:
.LBB8307:
.LBB8301:
.LBI8301:
.loc 2 1385 23 view .LVU1730
.LBB8302:
.loc 2 1387 5 view .LVU1731
.loc 2 1388 5 view .LVU1732
.LBE8302:
.LBE8301:
# xxh3.h:1402: XXH_writeLE64(customSecret + 16*i, XXH_readLE64(kSecret + 16*i) + seed64);
.loc 2 1402 9 is_stmt 0 view .LVU1733
add r9, r8 # tmp238, seed
.LVL350:
.loc 2 1402 9 view .LVU1734
add rax, 16 # ivtmp.370,
add rcx, 16 # ivtmp.372,
.LVL351:
.loc 2 1402 9 view .LVU1735
mov QWORD PTR -24[rcx], r9 # MEM[base: _317, offset: -8B], tmp238
.LVL352:
.loc 2 1403 9 is_stmt 1 view .LVU1736
.loc 2 1403 9 is_stmt 0 view .LVU1737
.LBE8307:
.LBE8309:
.loc 1 1550 5 is_stmt 1 view .LVU1738
.loc 1 1492 5 view .LVU1739
.loc 1 1493 5 view .LVU1740
.loc 1 1494 5 view .LVU1741
.LBB8310:
.LBB8308:
.LBB8303:
.LBI8303:
.loc 2 1385 23 view .LVU1742
.LBB8304:
.loc 2 1387 5 view .LVU1743
.loc 2 1388 5 view .LVU1744
.LBE8304:
.LBE8303:
# xxh3.h:1403: XXH_writeLE64(customSecret + 16*i + 8, XXH_readLE64(kSecret + 16*i + 8) - seed64);
.loc 2 1403 9 is_stmt 0 view .LVU1745
mov r9, QWORD PTR -8[rax] # tmp241, MEM[base: _161, offset: 8B]
sub r9, r8 # tmp241, seed
.LBB8306:
.LBB8305:
# xxh3.h:1388: memcpy(dst, &v64, sizeof(v64));
.loc 2 1388 5 view .LVU1746
mov QWORD PTR -16[rcx], r9 # MEM[base: _317, offset: 0B], tmp241
.LBE8305:
.LBE8306:
.loc 2 1401 29 is_stmt 1 view .LVU1747
.loc 2 1401 15 view .LVU1748
# xxh3.h:1401: for (i=0; i < nbRounds; i++) {
.loc 2 1401 5 is_stmt 0 view .LVU1749
cmp rax, rbx # ivtmp.370, _340
jne .L106 #,
.LBE8308:
.LBE8310:
.loc 2 1425 5 is_stmt 1 view .LVU1750
.LVL353:
.LBB8311:
.LBI8311:
.loc 2 1348 1 view .LVU1751
.LBB8312:
.loc 2 1351 5 view .LVU1752
# xxh3.h:1351: XXH_ALIGN(XXH_ACC_ALIGN) xxh_u64 acc[ACC_NB] = XXH3_INIT_ACC;
.loc 2 1351 38 is_stmt 0 view .LVU1753
mov eax, 3266489917 # tmp344,
.LBB8313:
.LBB8314:
# xxh3.h:1303: for (n = 0; n < nb_blocks; n++) {
.loc 2 1303 5 view .LVU1754
mov rbx, rdx # nb_blocks, len
.LBE8314:
.LBE8313:
# xxh3.h:1351: XXH_ALIGN(XXH_ACC_ALIGN) xxh_u64 acc[ACC_NB] = XXH3_INIT_ACC;
.loc 2 1351 38 view .LVU1755
mov QWORD PTR [r10], rax # acc, tmp344
.LBB8551:
.LBB8545:
# xxh3.h:1303: for (n = 0; n < nb_blocks; n++) {
.loc 2 1303 5 view .LVU1756
shr rbx, 10 # nb_blocks,
.LBE8545:
.LBE8551:
# xxh3.h:1351: XXH_ALIGN(XXH_ACC_ALIGN) xxh_u64 acc[ACC_NB] = XXH3_INIT_ACC;
.loc 2 1351 38 view .LVU1757
movabs rax, -7046029288634856825 # tmp345,
mov QWORD PTR 8[r10], rax # acc, tmp345
movabs rax, -4417276706812531889 # tmp346,
mov QWORD PTR 16[r10], rax # acc, tmp346
movabs rax, 1609587929392839161 # tmp347,
mov QWORD PTR 24[r10], rax # acc, tmp347
movabs rax, -8796714831421723037 # tmp348,
mov QWORD PTR 32[r10], rax # acc, tmp348
mov eax, 2246822519 # tmp349,
mov QWORD PTR 40[r10], rax # acc, tmp349
movabs rax, 2870177450012600261 # tmp350,
mov QWORD PTR 48[r10], rax # acc, tmp350
mov eax, 2654435761 # tmp351,
mov QWORD PTR 56[r10], rax # acc, tmp351
.loc 2 1351 65 is_stmt 1 view .LVU1758
.loc 2 1353 5 view .LVU1759
.LVL354:
.LBB8552:
.LBI8313:
.loc 2 1290 1 view .LVU1760
.LBB8546:
.loc 2 1295 5 view .LVU1761
.loc 2 1296 5 view .LVU1762
.loc 2 1297 5 view .LVU1763
.loc 2 1299 5 view .LVU1764
.loc 2 1301 5 view .LVU1765
.loc 2 1303 5 view .LVU1766
.loc 2 1303 17 view .LVU1767
# xxh3.h:1303: for (n = 0; n < nb_blocks; n++) {
.loc 2 1303 5 is_stmt 0 view .LVU1768
je .L87 #,
vmovdqa ymm4, YMMWORD PTR [r10] # acc__lsm.318, MEM[(__m256i * {ref-all})&acc]
sal rbx, 10 # _51,
.LVL355:
.loc 2 1303 5 view .LVU1769
vmovdqa ymm2, YMMWORD PTR 32[r10] # acc__lsm.320, MEM[(__m256i * {ref-all})&acc + 32B]
.LBB8315:
.LBB8316:
.LBB8317:
.LBB8318:
.LBB8319:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 35 view .LVU1770
xor r9d, r9d # ivtmp.353
.LBE8319:
.LBE8318:
.LBB8324:
.LBB8325:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avxintrin.h:921: return *__P;
.loc 4 921 10 view .LVU1771
vmovdqu ymm7, YMMWORD PTR 160[rsp] # _264, MEM[(const __m256i_u * {ref-all})&secret + 128B]
vmovdqa ymm5, YMMWORD PTR .LC1[rip] # tmp334,
lea rdi, 384[r11] # tmp337,
lea rsi, 64[rsp] # ivtmp.344,
vmovdqu ymm6, YMMWORD PTR 192[rsp] # _289, MEM[(const __m256i_u * {ref-all})&secret + 160B]
lea r8, 192[rsp] # _56,
.LVL356:
.p2align 4,,10
.p2align 3
.L89:
.loc 4 921 10 view .LVU1772
.LBE8325:
.LBE8324:
.LBE8317:
.LBE8316:
.LBE8315:
.loc 2 1304 9 is_stmt 1 view .LVU1773
.LBB8369:
.LBI8369:
.loc 2 1272 1 view .LVU1774
.LBB8370:
.loc 2 1278 5 view .LVU1775
.loc 2 1279 5 view .LVU1776
.loc 2 1279 17 view .LVU1777
lea rcx, [rdi+r9] # ivtmp.340,
mov rax, rsi # ivtmp.344, ivtmp.344
.LVL357:
.p2align 4,,10
.p2align 3
.L88:
.LBB8371:
.loc 2 1280 9 view .LVU1778
.loc 2 1281 9 view .LVU1779
.LBB8372:
.LBB8373:
.LBB8374:
.LBB8375:
.LBB8376:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU1780
vmovdqu ymm3, YMMWORD PTR -32[rax] # tmp353, MEM[base: _54, offset: -32B]
vpxor ymm1, ymm3, YMMWORD PTR -384[rcx] # tmp255, tmp353, MEM[base: _17, offset: -384B]
add rax, 8 # ivtmp.344,
.LBE8376:
.LBE8375:
.LBE8374:
.LBE8373:
.LBE8372:
# xxh3.h:1281: XXH_PREFETCH(in + XXH_PREFETCH_DIST);
.loc 2 1281 9 view .LVU1781
prefetcht0 [rcx] # ivtmp.340
.loc 2 1282 9 is_stmt 1 view .LVU1782
.LVL358:
.LBB8423:
.LBI8372:
.loc 2 921 1 view .LVU1783
.LBE8423:
.LBE8371:
.LBE8370:
.LBE8369:
.LBE8546:
.LBE8552:
.LBE8312:
.LBE8311:
.loc 2 928 5 view .LVU1784
.LBB8562:
.LBB8558:
.LBB8553:
.LBB8547:
.LBB8427:
.LBB8426:
.LBB8425:
.LBB8424:
.LBB8422:
.loc 2 929 9 view .LVU1785
.loc 2 932 9 view .LVU1786
.loc 2 935 9 view .LVU1787
.loc 2 937 9 view .LVU1788
.loc 2 938 9 view .LVU1789
.loc 2 938 19 view .LVU1790
.LBB8420:
.loc 2 940 13 view .LVU1791
.LBB8381:
.LBI8381:
.loc 4 919 1 view .LVU1792
.LBB8382:
.loc 4 921 3 view .LVU1793
.loc 4 921 3 is_stmt 0 view .LVU1794
.LBE8382:
.LBE8381:
.loc 2 942 13 is_stmt 1 view .LVU1795
.LBB8384:
.LBI8384:
.loc 4 919 1 view .LVU1796
.LBB8385:
.loc 4 921 3 view .LVU1797
.LBE8385:
.LBE8384:
.loc 2 944 13 view .LVU1798
.LBB8387:
.LBI8375:
.loc 3 913 1 view .LVU1799
.LBB8377:
.loc 3 915 3 view .LVU1800
.loc 3 915 3 is_stmt 0 view .LVU1801
.LBE8377:
.LBE8387:
.loc 2 946 13 is_stmt 1 view .LVU1802
.LBB8388:
.LBI8388:
.loc 3 597 1 view .LVU1803
.LBB8389:
.loc 3 599 3 view .LVU1804
.LBE8389:
.LBE8388:
.LBB8393:
.LBB8378:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU1805
vmovdqu ymm3, YMMWORD PTR -8[rax] # tmp354, MEM[base: _54, offset: 0B]
add rcx, 64 # ivtmp.340,
.LVL359:
.loc 3 915 33 view .LVU1806
.LBE8378:
.LBE8393:
.LBB8394:
.LBB8390:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 view .LVU1807
vpshufd ymm0, ymm1, 49 # tmp256, tmp255,
.LVL360:
.loc 3 599 19 view .LVU1808
.LBE8390:
.LBE8394:
.loc 2 948 13 is_stmt 1 view .LVU1809
.LBB8395:
.LBI8395:
.loc 3 567 1 view .LVU1810
.LBB8396:
.loc 3 569 3 view .LVU1811
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU1812
vpmuludq ymm1, ymm1, ymm0 # tmp258, tmp255, tmp256
.LVL361:
.loc 3 569 19 view .LVU1813
.LBE8396:
.LBE8395:
.loc 2 949 13 is_stmt 1 view .LVU1814
.LBB8399:
.loc 2 957 17 view .LVU1815
.LBB8400:
.LBI8400:
.loc 3 126 1 view .LVU1816
.LBB8401:
.loc 3 128 3 view .LVU1817
.loc 3 128 3 is_stmt 0 view .LVU1818
.LBE8401:
.LBE8400:
.loc 2 959 17 is_stmt 1 view .LVU1819
.LBB8403:
.LBI8403:
.loc 3 126 1 view .LVU1820
.LBB8404:
.loc 3 128 3 view .LVU1821
.LBE8404:
.LBE8403:
.LBE8399:
.LBB8410:
.LBB8379:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU1822
vpxor ymm0, ymm3, YMMWORD PTR -416[rcx] # tmp262, tmp354, MEM[base: _17, offset: -352B]
.LVL362:
.loc 3 915 33 view .LVU1823
.LBE8379:
.LBE8410:
.LBB8411:
.LBB8391:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 view .LVU1824
vpshufd ymm3, ymm0, 49 # tmp263, tmp262,
.LBE8391:
.LBE8411:
.LBB8412:
.LBB8397:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 view .LVU1825
vpmuludq ymm0, ymm0, ymm3 # tmp265, tmp262, tmp263
.LBE8397:
.LBE8412:
.LBB8413:
.LBB8407:
.LBB8405:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 view .LVU1826
vpaddq ymm1, ymm4, ymm1 # tmp259, acc__lsm.318, tmp258
.LVL363:
.loc 3 128 33 view .LVU1827
vpaddq ymm4, ymm1, YMMWORD PTR -448[rcx] # acc__lsm.318, tmp259, MEM[base: _17, offset: -384B]
.loc 3 128 33 view .LVU1828
.LBE8405:
.LBE8407:
.LBE8413:
.LBE8420:
.loc 2 938 51 is_stmt 1 view .LVU1829
.LVL364:
.loc 2 938 19 view .LVU1830
.LBB8421:
.loc 2 940 13 view .LVU1831
.LBB8414:
.loc 4 919 1 view .LVU1832
.LBB8383:
.loc 4 921 3 view .LVU1833
.loc 4 921 3 is_stmt 0 view .LVU1834
.LBE8383:
.LBE8414:
.loc 2 942 13 is_stmt 1 view .LVU1835
.LBB8415:
.loc 4 919 1 view .LVU1836
.LBB8386:
.loc 4 921 3 view .LVU1837
.LBE8386:
.LBE8415:
.loc 2 944 13 view .LVU1838
.LBB8416:
.loc 3 913 1 view .LVU1839
.LBB8380:
.loc 3 915 3 view .LVU1840
.loc 3 915 3 is_stmt 0 view .LVU1841
.LBE8380:
.LBE8416:
.loc 2 946 13 is_stmt 1 view .LVU1842
.LBB8417:
.loc 3 597 1 view .LVU1843
.LBB8392:
.loc 3 599 3 view .LVU1844
.loc 3 599 3 is_stmt 0 view .LVU1845
.LBE8392:
.LBE8417:
.loc 2 948 13 is_stmt 1 view .LVU1846
.LBB8418:
.loc 3 567 1 view .LVU1847
.LBB8398:
.loc 3 569 3 view .LVU1848
.loc 3 569 3 is_stmt 0 view .LVU1849
.LBE8398:
.LBE8418:
.loc 2 949 13 is_stmt 1 view .LVU1850
.LBB8419:
.loc 2 957 17 view .LVU1851
.LBB8408:
.loc 3 126 1 view .LVU1852
.LBB8402:
.loc 3 128 3 view .LVU1853
.loc 3 128 3 is_stmt 0 view .LVU1854
.LBE8402:
.LBE8408:
.loc 2 959 17 is_stmt 1 view .LVU1855
.LBB8409:
.loc 3 126 1 view .LVU1856
.LBB8406:
.loc 3 128 3 view .LVU1857
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 is_stmt 0 view .LVU1858
vpaddq ymm0, ymm2, ymm0 # tmp266, acc__lsm.320, tmp265
.LVL365:
.loc 3 128 33 view .LVU1859
vpaddq ymm2, ymm0, YMMWORD PTR -416[rcx] # acc__lsm.320, tmp266, MEM[base: _17, offset: -352B]
.loc 3 128 33 view .LVU1860
.LBE8406:
.LBE8409:
.LBE8419:
.LBE8421:
.loc 2 938 51 is_stmt 1 view .LVU1861
.LVL366:
.loc 2 938 19 view .LVU1862
.loc 2 938 19 is_stmt 0 view .LVU1863
.LBE8422:
.LBE8424:
.LBE8425:
.loc 2 1279 32 is_stmt 1 view .LVU1864
.loc 2 1279 17 view .LVU1865
# xxh3.h:1279: for (n = 0; n < nbStripes; n++ ) {
.loc 2 1279 5 is_stmt 0 view .LVU1866
cmp r8, rax # _56, ivtmp.344
jne .L88 #,
.LVL367:
.loc 2 1279 5 view .LVU1867
.LBE8426:
.LBE8427:
.LBB8428:
.LBB8368:
.loc 2 1123 19 is_stmt 1 view .LVU1868
.LBB8366:
.loc 2 1125 13 view .LVU1869
.loc 2 1126 13 view .LVU1870
.LBB8328:
.LBI8328:
.loc 3 787 1 view .LVU1871
.LBB8329:
.loc 3 789 3 view .LVU1872
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:789: return (__m256i)__builtin_ia32_psrlqi256 ((__v4di)__A, __B);
.loc 3 789 19 is_stmt 0 view .LVU1873
vpsrlq ymm0, ymm4, 47 # tmp267, acc__lsm.318,
.LVL368:
.loc 3 789 19 view .LVU1874
.LBE8329:
.LBE8328:
.loc 2 1127 13 is_stmt 1 view .LVU1875
.LBB8331:
.LBI8331:
.loc 3 913 1 view .LVU1876
.LBB8332:
.loc 3 915 3 view .LVU1877
.loc 3 915 3 is_stmt 0 view .LVU1878
.LBE8332:
.LBE8331:
.loc 2 1129 13 is_stmt 1 view .LVU1879
.LBB8334:
.LBI8324:
.loc 4 919 1 view .LVU1880
.LBB8326:
.loc 4 921 3 view .LVU1881
.loc 4 921 3 is_stmt 0 view .LVU1882
.LBE8326:
.LBE8334:
.loc 2 1130 13 is_stmt 1 view .LVU1883
.LBB8335:
.LBI8318:
.loc 3 913 1 view .LVU1884
.LBB8320:
.loc 3 915 3 view .LVU1885
.loc 3 915 3 is_stmt 0 view .LVU1886
.LBE8320:
.LBE8335:
.loc 2 1133 13 is_stmt 1 view .LVU1887
.LBB8336:
.LBI8336:
.loc 3 597 1 view .LVU1888
.LBB8337:
.loc 3 599 3 view .LVU1889
.LBE8337:
.LBE8336:
.LBB8341:
.LBB8321:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU1890
vpxor ymm1, ymm7, ymm4 # tmp269, _264, acc__lsm.318
add r9, 1024 # ivtmp.353,
vpxor ymm1, ymm1, ymm0 # tmp270, tmp269, tmp267
.LVL369:
.loc 3 915 33 view .LVU1891
vpxor ymm0, ymm6, ymm2 # tmp282, _289, acc__lsm.320
.LVL370:
.loc 3 915 33 view .LVU1892
.LBE8321:
.LBE8341:
.LBB8342:
.LBB8338:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 view .LVU1893
vpshufd ymm4, ymm1, 49 # tmp271, tmp270,
.LVL371:
.loc 3 599 19 view .LVU1894
.LBE8338:
.LBE8342:
.loc 2 1134 13 is_stmt 1 view .LVU1895
.LBB8343:
.LBI8343:
.loc 3 567 1 view .LVU1896
.LBB8344:
.loc 3 569 3 view .LVU1897
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU1898
vpmuludq ymm1, ymm1, ymm5 # tmp273, tmp270, tmp334
.LVL372:
.loc 3 569 19 view .LVU1899
.LBE8344:
.LBE8343:
.loc 2 1135 13 is_stmt 1 view .LVU1900
.LBB8346:
.LBI8346:
.loc 3 567 1 view .LVU1901
.LBB8347:
.loc 3 569 3 view .LVU1902
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU1903
vpmuludq ymm4, ymm4, ymm5 # tmp275, tmp271, tmp334
.LVL373:
.loc 3 569 19 view .LVU1904
.LBE8347:
.LBE8346:
.loc 2 1136 13 is_stmt 1 view .LVU1905
.LBB8349:
.LBI8349:
.loc 3 696 1 view .LVU1906
.LBB8350:
.loc 3 698 3 view .LVU1907
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:698: return (__m256i)__builtin_ia32_psllqi256 ((__v4di)__A, __B);
.loc 3 698 19 is_stmt 0 view .LVU1908
vpsllq ymm4, ymm4, 32 # tmp277, tmp275,
.LVL374:
.loc 3 698 19 view .LVU1909
.LBE8350:
.LBE8349:
.LBB8352:
.LBI8352:
.loc 3 126 1 is_stmt 1 view .LVU1910
.LBB8353:
.loc 3 128 3 view .LVU1911
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 is_stmt 0 view .LVU1912
vpaddq ymm4, ymm1, ymm4 # acc__lsm.318, tmp273, tmp277
.LVL375:
.loc 3 128 33 view .LVU1913
.LBE8353:
.LBE8352:
.LBE8366:
.loc 2 1123 51 is_stmt 1 view .LVU1914
.loc 2 1123 19 view .LVU1915
.LBB8367:
.loc 2 1125 13 view .LVU1916
.loc 2 1126 13 view .LVU1917
.LBB8355:
.loc 3 787 1 view .LVU1918
.LBB8330:
.loc 3 789 3 view .LVU1919
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:789: return (__m256i)__builtin_ia32_psrlqi256 ((__v4di)__A, __B);
.loc 3 789 19 is_stmt 0 view .LVU1920
vpsrlq ymm1, ymm2, 47 # tmp280, acc__lsm.320,
.LVL376:
.loc 3 789 19 view .LVU1921
.LBE8330:
.LBE8355:
.loc 2 1127 13 is_stmt 1 view .LVU1922
.LBB8356:
.loc 3 913 1 view .LVU1923
.LBB8333:
.loc 3 915 3 view .LVU1924
.loc 3 915 3 is_stmt 0 view .LVU1925
.LBE8333:
.LBE8356:
.loc 2 1129 13 is_stmt 1 view .LVU1926
.LBB8357:
.loc 4 919 1 view .LVU1927
.LBB8327:
.loc 4 921 3 view .LVU1928
.loc 4 921 3 is_stmt 0 view .LVU1929
.LBE8327:
.LBE8357:
.loc 2 1130 13 is_stmt 1 view .LVU1930
.LBB8358:
.loc 3 913 1 view .LVU1931
.LBB8322:
.loc 3 915 3 view .LVU1932
.loc 3 915 3 is_stmt 0 view .LVU1933
.LBE8322:
.LBE8358:
.loc 2 1133 13 is_stmt 1 view .LVU1934
.LBB8359:
.loc 3 597 1 view .LVU1935
.LBB8339:
.loc 3 599 3 view .LVU1936
.LBE8339:
.LBE8359:
.LBB8360:
.LBB8323:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU1937
vpxor ymm0, ymm0, ymm1 # tmp283, tmp282, tmp280
.LVL377:
.loc 3 915 33 view .LVU1938
.LBE8323:
.LBE8360:
.LBB8361:
.LBB8340:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 view .LVU1939
vpshufd ymm2, ymm0, 49 # tmp284, tmp283,
.LVL378:
.loc 3 599 19 view .LVU1940
.LBE8340:
.LBE8361:
.loc 2 1134 13 is_stmt 1 view .LVU1941
.LBB8362:
.loc 3 567 1 view .LVU1942
.LBB8345:
.loc 3 569 3 view .LVU1943
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU1944
vpmuludq ymm0, ymm0, ymm5 # tmp286, tmp283, tmp334
.LVL379:
.loc 3 569 19 view .LVU1945
.LBE8345:
.LBE8362:
.loc 2 1135 13 is_stmt 1 view .LVU1946
.LBB8363:
.loc 3 567 1 view .LVU1947
.LBB8348:
.loc 3 569 3 view .LVU1948
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU1949
vpmuludq ymm2, ymm2, ymm5 # tmp288, tmp284, tmp334
.LVL380:
.loc 3 569 19 view .LVU1950
.LBE8348:
.LBE8363:
.loc 2 1136 13 is_stmt 1 view .LVU1951
.LBB8364:
.loc 3 696 1 view .LVU1952
.LBB8351:
.loc 3 698 3 view .LVU1953
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:698: return (__m256i)__builtin_ia32_psllqi256 ((__v4di)__A, __B);
.loc 3 698 19 is_stmt 0 view .LVU1954
vpsllq ymm2, ymm2, 32 # tmp290, tmp288,
.LVL381:
.loc 3 698 19 view .LVU1955
.LBE8351:
.LBE8364:
.LBB8365:
.loc 3 126 1 is_stmt 1 view .LVU1956
.LBB8354:
.loc 3 128 3 view .LVU1957
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 is_stmt 0 view .LVU1958
vpaddq ymm2, ymm0, ymm2 # acc__lsm.320, tmp286, tmp290
.LVL382:
.loc 3 128 33 view .LVU1959
.LBE8354:
.LBE8365:
.LBE8367:
.loc 2 1123 51 is_stmt 1 view .LVU1960
.loc 2 1123 19 view .LVU1961
.loc 2 1123 19 is_stmt 0 view .LVU1962
.LBE8368:
.LBE8428:
.loc 2 1303 32 is_stmt 1 view .LVU1963
.loc 2 1303 17 view .LVU1964
# xxh3.h:1303: for (n = 0; n < nb_blocks; n++) {
.loc 2 1303 5 is_stmt 0 view .LVU1965
cmp r9, rbx # ivtmp.353, _51
jne .L89 #,
vmovdqa YMMWORD PTR [r10], ymm4 # MEM[(__m256i * {ref-all})&acc], acc__lsm.318
vmovdqa YMMWORD PTR 32[r10], ymm2 # MEM[(__m256i * {ref-all})&acc + 32B], acc__lsm.320
.LVL383:
.L87:
.loc 2 1309 5 is_stmt 1 view .LVU1966
.LBB8429:
.loc 2 1310 9 view .LVU1967
# xxh3.h:1310: { size_t const nbStripes = (len - (block_len * nb_blocks)) / STRIPE_LEN;
.loc 2 1310 22 is_stmt 0 view .LVU1968
mov rax, rdx # tmp293, len
# xxh3.h:1310: { size_t const nbStripes = (len - (block_len * nb_blocks)) / STRIPE_LEN;
.loc 2 1310 52 view .LVU1969
mov rcx, rdx # _65, len
# xxh3.h:1310: { size_t const nbStripes = (len - (block_len * nb_blocks)) / STRIPE_LEN;
.loc 2 1310 22 view .LVU1970
shr rax, 6 # tmp293,
.LVL384:
.loc 2 1311 9 is_stmt 1 view .LVU1971
.loc 2 1312 9 view .LVU1972
# xxh3.h:1310: { size_t const nbStripes = (len - (block_len * nb_blocks)) / STRIPE_LEN;
.loc 2 1310 52 is_stmt 0 view .LVU1973
and rcx, -1024 # _65,
.LVL385:
.LBB8430:
.LBI8430:
.loc 2 1272 1 is_stmt 1 view .LVU1974
.LBB8431:
.loc 2 1278 5 view .LVU1975
.loc 2 1279 5 view .LVU1976
.loc 2 1279 17 view .LVU1977
# xxh3.h:1279: for (n = 0; n < nbStripes; n++ ) {
.loc 2 1279 5 is_stmt 0 view .LVU1978
and eax, 15 # tmp293,
.LVL386:
.loc 2 1279 5 view .LVU1979
mov r8, rax # nbStripes, tmp293
je .L90 #,
lea rax, 32[rsp] # ivtmp.328,
.LVL387:
.loc 2 1279 5 view .LVU1980
vmovdqa ymm3, YMMWORD PTR [r10] # acc__lsm.314, MEM[(__m256i * {ref-all})&acc]
vmovdqa ymm2, YMMWORD PTR 32[r10] # acc__lsm.316, MEM[(__m256i * {ref-all})&acc + 32B]
lea rcx, 384[r11+rcx] # ivtmp.326,
.LVL388:
.loc 2 1279 5 view .LVU1981
lea r8, [rax+r8*8] # _81,
.LVL389:
.p2align 4,,10
.p2align 3
.L91:
.LBB8432:
.loc 2 1280 9 is_stmt 1 view .LVU1982
.loc 2 1281 9 view .LVU1983
.LBB8433:
.LBB8434:
.LBB8435:
.LBB8436:
.LBB8437:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU1984
vmovdqu ymm6, YMMWORD PTR [rax] # tmp358, MEM[base: _84, offset: 0B]
vmovdqu ymm7, YMMWORD PTR 32[rax] # tmp359, MEM[base: _84, offset: 32B]
add rax, 8 # ivtmp.328,
.LBE8437:
.LBE8436:
.LBE8435:
.LBE8434:
.LBE8433:
# xxh3.h:1281: XXH_PREFETCH(in + XXH_PREFETCH_DIST);
.loc 2 1281 9 view .LVU1985
prefetcht0 [rcx] # ivtmp.326
.loc 2 1282 9 is_stmt 1 view .LVU1986
.LVL390:
.LBB8480:
.LBI8433:
.loc 2 921 1 view .LVU1987
.LBE8480:
.LBE8432:
.LBE8431:
.LBE8430:
.LBE8429:
.LBE8547:
.LBE8553:
.LBE8558:
.LBE8562:
.loc 2 928 5 view .LVU1988
.LBB8563:
.LBB8559:
.LBB8554:
.LBB8548:
.LBB8542:
.LBB8484:
.LBB8483:
.LBB8482:
.LBB8481:
.LBB8479:
.loc 2 929 9 view .LVU1989
.loc 2 932 9 view .LVU1990
.loc 2 935 9 view .LVU1991
.loc 2 937 9 view .LVU1992
.loc 2 938 9 view .LVU1993
.loc 2 938 19 view .LVU1994
.LBB8477:
.loc 2 940 13 view .LVU1995
.LBB8442:
.LBI8442:
.loc 4 919 1 view .LVU1996
.LBB8443:
.loc 4 921 3 view .LVU1997
.loc 4 921 3 is_stmt 0 view .LVU1998
.LBE8443:
.LBE8442:
.loc 2 942 13 is_stmt 1 view .LVU1999
.LBB8445:
.LBI8445:
.loc 4 919 1 view .LVU2000
.LBB8446:
.loc 4 921 3 view .LVU2001
.LBE8446:
.LBE8445:
.loc 2 944 13 view .LVU2002
.LBB8448:
.LBI8436:
.loc 3 913 1 view .LVU2003
.LBB8438:
.loc 3 915 3 view .LVU2004
.loc 3 915 3 is_stmt 0 view .LVU2005
.LBE8438:
.LBE8448:
.loc 2 946 13 is_stmt 1 view .LVU2006
.LBB8449:
.LBI8449:
.loc 3 597 1 view .LVU2007
.LBB8450:
.loc 3 599 3 view .LVU2008
.LBE8450:
.LBE8449:
.LBB8453:
.LBB8439:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU2009
vpxor ymm1, ymm6, YMMWORD PTR -384[rcx] # tmp298, tmp358, MEM[base: _71, offset: -384B]
add rcx, 64 # ivtmp.326,
.LVL391:
.loc 3 915 33 view .LVU2010
.LBE8439:
.LBE8453:
.LBB8454:
.LBB8451:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 view .LVU2011
vpshufd ymm0, ymm1, 49 # tmp299, tmp298,
.LVL392:
.loc 3 599 19 view .LVU2012
.LBE8451:
.LBE8454:
.loc 2 948 13 is_stmt 1 view .LVU2013
.LBB8455:
.LBI8455:
.loc 3 567 1 view .LVU2014
.LBB8456:
.loc 3 569 3 view .LVU2015
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU2016
vpmuludq ymm1, ymm1, ymm0 # tmp301, tmp298, tmp299
.LVL393:
.loc 3 569 19 view .LVU2017
.LBE8456:
.LBE8455:
.loc 2 949 13 is_stmt 1 view .LVU2018
.LBB8458:
.loc 2 957 17 view .LVU2019
.LBB8459:
.LBI8459:
.loc 3 126 1 view .LVU2020
.LBB8460:
.loc 3 128 3 view .LVU2021
.loc 3 128 3 is_stmt 0 view .LVU2022
.LBE8460:
.LBE8459:
.loc 2 959 17 is_stmt 1 view .LVU2023
.LBB8462:
.LBI8462:
.loc 3 126 1 view .LVU2024
.LBB8463:
.loc 3 128 3 view .LVU2025
.LBE8463:
.LBE8462:
.LBE8458:
.LBB8469:
.LBB8440:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU2026
vpxor ymm0, ymm7, YMMWORD PTR -416[rcx] # tmp306, tmp359, MEM[base: _71, offset: -352B]
.LVL394:
.loc 3 915 33 view .LVU2027
.LBE8440:
.LBE8469:
.LBB8470:
.LBB8466:
.LBB8464:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 view .LVU2028
vpaddq ymm1, ymm3, ymm1 # tmp302, acc__lsm.314, tmp301
.LVL395:
.loc 3 128 33 view .LVU2029
vpaddq ymm3, ymm1, YMMWORD PTR -448[rcx] # acc__lsm.314, tmp302, MEM[base: _71, offset: -384B]
.loc 3 128 33 view .LVU2030
.LBE8464:
.LBE8466:
.LBE8470:
.LBE8477:
.loc 2 938 51 is_stmt 1 view .LVU2031
.LVL396:
.loc 2 938 19 view .LVU2032
.LBB8478:
.loc 2 940 13 view .LVU2033
.LBB8471:
.loc 4 919 1 view .LVU2034
.LBB8444:
.loc 4 921 3 view .LVU2035
.loc 4 921 3 is_stmt 0 view .LVU2036
.LBE8444:
.LBE8471:
.loc 2 942 13 is_stmt 1 view .LVU2037
.LBB8472:
.loc 4 919 1 view .LVU2038
.LBB8447:
.loc 4 921 3 view .LVU2039
.LBE8447:
.LBE8472:
.loc 2 944 13 view .LVU2040
.LBB8473:
.loc 3 913 1 view .LVU2041
.LBB8441:
.loc 3 915 3 view .LVU2042
.loc 3 915 3 is_stmt 0 view .LVU2043
.LBE8441:
.LBE8473:
.loc 2 946 13 is_stmt 1 view .LVU2044
.LBB8474:
.loc 3 597 1 view .LVU2045
.LBB8452:
.loc 3 599 3 view .LVU2046
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 is_stmt 0 view .LVU2047
vpshufd ymm1, ymm0, 49 # tmp307, tmp306,
.LVL397:
.loc 3 599 19 view .LVU2048
.LBE8452:
.LBE8474:
.loc 2 948 13 is_stmt 1 view .LVU2049
.LBB8475:
.loc 3 567 1 view .LVU2050
.LBB8457:
.loc 3 569 3 view .LVU2051
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU2052
vpmuludq ymm0, ymm0, ymm1 # tmp309, tmp306, tmp307
.LVL398:
.loc 3 569 19 view .LVU2053
.LBE8457:
.LBE8475:
.loc 2 949 13 is_stmt 1 view .LVU2054
.LBB8476:
.loc 2 957 17 view .LVU2055
.LBB8467:
.loc 3 126 1 view .LVU2056
.LBB8461:
.loc 3 128 3 view .LVU2057
.loc 3 128 3 is_stmt 0 view .LVU2058
.LBE8461:
.LBE8467:
.loc 2 959 17 is_stmt 1 view .LVU2059
.LBB8468:
.loc 3 126 1 view .LVU2060
.LBB8465:
.loc 3 128 3 view .LVU2061
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 is_stmt 0 view .LVU2062
vpaddq ymm0, ymm2, ymm0 # tmp310, acc__lsm.316, tmp309
.LVL399:
.loc 3 128 33 view .LVU2063
vpaddq ymm2, ymm0, YMMWORD PTR -416[rcx] # acc__lsm.316, tmp310, MEM[base: _71, offset: -352B]
.loc 3 128 33 view .LVU2064
.LBE8465:
.LBE8468:
.LBE8476:
.LBE8478:
.loc 2 938 51 is_stmt 1 view .LVU2065
.LVL400:
.loc 2 938 19 view .LVU2066
.loc 2 938 19 is_stmt 0 view .LVU2067
.LBE8479:
.LBE8481:
.LBE8482:
.loc 2 1279 32 is_stmt 1 view .LVU2068
.loc 2 1279 17 view .LVU2069
# xxh3.h:1279: for (n = 0; n < nbStripes; n++ ) {
.loc 2 1279 5 is_stmt 0 view .LVU2070
cmp r8, rax # _81, ivtmp.328
jne .L91 #,
vmovdqa YMMWORD PTR [r10], ymm3 # MEM[(__m256i * {ref-all})&acc], acc__lsm.314
vmovdqa YMMWORD PTR 32[r10], ymm2 # MEM[(__m256i * {ref-all})&acc + 32B], acc__lsm.316
.LVL401:
.L90:
.loc 2 1279 5 view .LVU2071
.LBE8483:
.LBE8484:
.loc 2 1315 9 is_stmt 1 view .LVU2072
# xxh3.h:1315: if (len & (STRIPE_LEN - 1)) {
.loc 2 1315 12 is_stmt 0 view .LVU2073
test dl, 63 # len,
jne .L107 #,
.L92:
.LVL402:
.loc 2 1315 12 view .LVU2074
.LBE8542:
.LBE8548:
.LBE8554:
.LBB8555:
.loc 2 1356 5 is_stmt 1 view .LVU2075
.LBE8555:
.loc 2 1356 41 view .LVU2076
.loc 2 1359 5 view .LVU2077
.loc 2 1360 5 view .LVU2078
# xxh3.h:1360: return XXH3_mergeAccs(acc, secret + XXH_SECRET_MERGEACCS_START, (xxh_u64)len * PRIME64_1);
.loc 2 1360 12 is_stmt 0 view .LVU2079
movabs r8, -7046029288634856825 # tmp330,
lea r9, 43[rsp] # tmp332,
mov rcx, r10 #, tmp232
imul r8, rdx #, len
mov rdx, r9 #, tmp332
.LVL403:
.loc 2 1360 12 view .LVU2080
vzeroupper
call XXH3_mergeAccs #
.LVL404:
.L105:
.loc 2 1360 12 view .LVU2081
.LBE8559:
.LBE8563:
# xxh3.h:1426: }
.loc 2 1426 1 view .LVU2082
vmovaps xmm6, XMMWORD PTR 304[rsp] #,
vmovaps xmm7, XMMWORD PTR 320[rsp] #,
add rsp, 336 #,
.cfi_remember_state
.cfi_restore 24
.cfi_restore 23
.cfi_def_cfa_offset 32
pop rbx #
.cfi_restore 3
.cfi_def_cfa_offset 24
pop rsi #
.cfi_restore 4
.cfi_def_cfa_offset 16
pop rdi #
.cfi_restore 5
.cfi_def_cfa_offset 8
ret
.LVL405:
.L107:
.cfi_restore_state
.LBB8564:
.LBB8560:
.LBB8556:
.LBB8549:
.LBB8543:
.LBB8485:
.loc 2 1316 13 is_stmt 1 view .LVU2083
.loc 2 1319 13 view .LVU2084
.LBB8486:
.LBI8486:
.loc 2 921 1 view .LVU2085
.LBE8486:
.LBE8485:
.LBE8543:
.LBE8549:
.LBE8556:
.LBE8560:
.LBE8564:
.loc 2 928 5 view .LVU2086
.LBB8565:
.LBB8561:
.LBB8557:
.LBB8550:
.LBB8544:
.LBB8541:
.LBB8540:
.LBB8487:
.loc 2 929 9 view .LVU2087
.loc 2 932 9 view .LVU2088
.loc 2 935 9 view .LVU2089
.loc 2 937 9 view .LVU2090
.loc 2 938 9 view .LVU2091
.loc 2 938 19 view .LVU2092
.LBB8488:
.loc 2 940 13 view .LVU2093
.LBB8489:
.LBI8489:
.loc 4 919 1 view .LVU2094
.LBB8490:
.loc 4 921 3 view .LVU2095
.loc 4 921 3 is_stmt 0 view .LVU2096
.LBE8490:
.LBE8489:
.loc 2 942 13 is_stmt 1 view .LVU2097
.LBB8493:
.LBI8493:
.loc 4 919 1 view .LVU2098
.LBB8494:
.loc 4 921 3 view .LVU2099
.loc 4 921 3 is_stmt 0 view .LVU2100
.LBE8494:
.LBE8493:
.loc 2 944 13 is_stmt 1 view .LVU2101
.LBB8496:
.LBI8496:
.loc 3 913 1 view .LVU2102
.LBB8497:
.loc 3 915 3 view .LVU2103
.loc 3 915 3 is_stmt 0 view .LVU2104
.LBE8497:
.LBE8496:
.loc 2 946 13 is_stmt 1 view .LVU2105
.LBB8501:
.LBI8501:
.loc 3 597 1 view .LVU2106
.LBB8502:
.loc 3 599 3 view .LVU2107
.LBE8502:
.LBE8501:
.LBB8506:
.LBB8498:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU2108
vmovdqu ymm6, YMMWORD PTR 153[rsp] # tmp360, MEM[(const __m256i_u * {ref-all})&secret + 121B]
vpxor ymm0, ymm6, YMMWORD PTR -64[r11+rdx] # tmp315, tmp360, MEM[(const __m256i_u * {ref-all})_162]
.LVL406:
.loc 3 915 33 view .LVU2109
.LBE8498:
.LBE8506:
.LBB8507:
.LBB8508:
.LBB8509:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 view .LVU2110
vmovdqu ymm7, YMMWORD PTR -64[r11+rdx] # tmp361, MEM[(const __m256i_u * {ref-all})_162]
.LBE8509:
.LBE8508:
.LBE8507:
.LBB8524:
.LBB8503:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 view .LVU2111
vpshufd ymm1, ymm0, 49 # tmp316, tmp315,
.LVL407:
.loc 3 599 19 view .LVU2112
.LBE8503:
.LBE8524:
.loc 2 948 13 is_stmt 1 view .LVU2113
.LBB8525:
.LBI8525:
.loc 3 567 1 view .LVU2114
.LBB8526:
.loc 3 569 3 view .LVU2115
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU2116
vpmuludq ymm1, ymm0, ymm1 # tmp318, tmp315, tmp316
.LVL408:
.loc 3 569 19 view .LVU2117
.LBE8526:
.LBE8525:
.loc 2 949 13 is_stmt 1 view .LVU2118
.LBB8528:
.loc 2 957 17 view .LVU2119
.LBB8514:
.LBI8508:
.loc 3 126 1 view .LVU2120
.LBB8510:
.loc 3 128 3 view .LVU2121
.loc 3 128 3 is_stmt 0 view .LVU2122
.LBE8510:
.LBE8514:
.loc 2 959 17 is_stmt 1 view .LVU2123
.LBB8515:
.LBI8515:
.loc 3 126 1 view .LVU2124
.LBB8516:
.loc 3 128 3 view .LVU2125
.loc 3 128 3 is_stmt 0 view .LVU2126
.LBE8516:
.LBE8515:
.LBB8519:
.LBB8511:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 view .LVU2127
vpaddq ymm0, ymm7, YMMWORD PTR [r10] # tmp319, tmp361, MEM[(__m256i * {ref-all})&acc]
.LVL409:
.loc 3 128 33 view .LVU2128
.LBE8511:
.LBE8519:
.LBB8520:
.LBB8517:
vpaddq ymm0, ymm0, ymm1 # tmp320, tmp319, tmp318
.LVL410:
.loc 3 128 33 view .LVU2129
.LBE8517:
.LBE8520:
# xxh3.h:959: xacc[i] = _mm256_add_epi64(product, sum);
.loc 2 959 25 view .LVU2130
vmovdqa YMMWORD PTR [r10], ymm0 # MEM[(__m256i * {ref-all})&acc], tmp320
.LVL411:
.loc 2 959 25 view .LVU2131
.LBE8528:
.LBE8488:
.loc 2 938 51 is_stmt 1 view .LVU2132
.loc 2 938 19 view .LVU2133
.LBB8539:
.loc 2 940 13 view .LVU2134
.LBB8529:
.loc 4 919 1 view .LVU2135
.LBB8491:
.loc 4 921 3 view .LVU2136
.loc 4 921 3 is_stmt 0 view .LVU2137
.LBE8491:
.LBE8529:
.loc 2 942 13 is_stmt 1 view .LVU2138
.LBB8530:
.loc 4 919 1 view .LVU2139
.LBB8495:
.loc 4 921 3 view .LVU2140
.loc 4 921 3 is_stmt 0 view .LVU2141
.LBE8495:
.LBE8530:
.loc 2 944 13 is_stmt 1 view .LVU2142
.LBB8531:
.loc 3 913 1 view .LVU2143
.LBB8499:
.loc 3 915 3 view .LVU2144
.LBE8499:
.LBE8531:
.LBB8532:
.LBB8492:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avxintrin.h:921: return *__P;
.loc 4 921 10 is_stmt 0 view .LVU2145
vmovdqu ymm0, YMMWORD PTR -32[r11+rdx] # MEM[(const __m256i_u * {ref-all})_186], MEM[(const __m256i_u * {ref-all})_186]
.LVL412:
.loc 4 921 10 view .LVU2146
.LBE8492:
.LBE8532:
.loc 2 946 13 is_stmt 1 view .LVU2147
.LBB8533:
.loc 3 597 1 view .LVU2148
.LBB8504:
.loc 3 599 3 view .LVU2149
.LBE8504:
.LBE8533:
.LBB8534:
.LBB8500:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU2150
vpxor ymm1, ymm0, YMMWORD PTR 185[rsp] # tmp323, MEM[(const __m256i_u * {ref-all})_186], MEM[(const __m256i_u * {ref-all})&secret + 153B]
.LVL413:
.loc 3 915 33 view .LVU2151
.LBE8500:
.LBE8534:
.LBB8535:
.LBB8521:
.LBB8512:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 view .LVU2152
vpaddq ymm0, ymm0, YMMWORD PTR 32[r10] # tmp327, MEM[(const __m256i_u * {ref-all})_186], MEM[(__m256i * {ref-all})&acc + 32B]
.LBE8512:
.LBE8521:
.LBE8535:
.LBB8536:
.LBB8505:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 view .LVU2153
vpshufd ymm2, ymm1, 49 # tmp324, tmp323,
.LVL414:
.loc 3 599 19 view .LVU2154
.LBE8505:
.LBE8536:
.loc 2 948 13 is_stmt 1 view .LVU2155
.LBB8537:
.loc 3 567 1 view .LVU2156
.LBB8527:
.loc 3 569 3 view .LVU2157
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU2158
vpmuludq ymm1, ymm1, ymm2 # tmp326, tmp323, tmp324
.LVL415:
.loc 3 569 19 view .LVU2159
.LBE8527:
.LBE8537:
.loc 2 949 13 is_stmt 1 view .LVU2160
.LBB8538:
.loc 2 957 17 view .LVU2161
.LBB8522:
.loc 3 126 1 view .LVU2162
.LBB8513:
.loc 3 128 3 view .LVU2163
.loc 3 128 3 is_stmt 0 view .LVU2164
.LBE8513:
.LBE8522:
.loc 2 959 17 is_stmt 1 view .LVU2165
.LBB8523:
.loc 3 126 1 view .LVU2166
.LBB8518:
.loc 3 128 3 view .LVU2167
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 is_stmt 0 view .LVU2168
vpaddq ymm0, ymm0, ymm1 # tmp328, tmp327, tmp326
.LBE8518:
.LBE8523:
# xxh3.h:959: xacc[i] = _mm256_add_epi64(product, sum);
.loc 2 959 25 view .LVU2169
vmovdqa YMMWORD PTR 32[r10], ymm0 # MEM[(__m256i * {ref-all})&acc + 32B], tmp328
.LBE8538:
.LBE8539:
.loc 2 938 51 is_stmt 1 view .LVU2170
.LVL416:
.loc 2 938 19 view .LVU2171
jmp .L92 #
.LVL417:
.L83:
.loc 2 938 19 is_stmt 0 view .LVU2172
.LBE8487:
.LBE8540:
.LBE8541:
.LBE8544:
.LBE8550:
.LBE8557:
.LBE8561:
.LBE8565:
.loc 2 1423 18 is_stmt 1 discriminator 1 view .LVU2173
# xxh3.h:1423: if (seed==0) return XXH3_hashLong_64b_defaultSecret(input, len);
.loc 2 1423 25 is_stmt 0 discriminator 1 view .LVU2174
call XXH3_hashLong_64b_defaultSecret #
.LVL418:
.loc 2 1423 25 discriminator 1 view .LVU2175
jmp .L105 #
.cfi_endproc
.LFE5342:
.seh_endproc
.p2align 4
.def XXH3_hashLong_128b_defaultSecret; .scl 3; .type 32; .endef
.seh_proc XXH3_hashLong_128b_defaultSecret
XXH3_hashLong_128b_defaultSecret:
.LVL419:
.LFB5366:
.loc 2 1922 1 is_stmt 1 view -0
.cfi_startproc
.loc 2 1922 1 is_stmt 0 view .LVU2177
push r13 #
.seh_pushreg r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
push r12 #
.seh_pushreg r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
push rsi #
.seh_pushreg rsi
.cfi_def_cfa_offset 32
.cfi_offset 4, -32
push rbx #
.seh_pushreg rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
sub rsp, 136 #,
.seh_stackalloc 136
.cfi_def_cfa_offset 176
vmovaps XMMWORD PTR 112[rsp], xmm6 #,
.seh_savexmm xmm6, 112
.cfi_offset 23, -64
.seh_endprologue
.loc 2 1923 5 is_stmt 1 view .LVU2178
.LVL420:
.LBB8566:
.LBI8566:
.loc 2 1899 1 view .LVU2179
.LBB8567:
.loc 2 1902 5 view .LVU2180
# xxh3.h:1902: XXH_ALIGN(XXH_ACC_ALIGN) xxh_u64 acc[ACC_NB] = XXH3_INIT_ACC;
.loc 2 1902 38 is_stmt 0 view .LVU2181
mov eax, 3266489917 # tmp353,
.LBE8567:
.LBE8566:
# xxh3.h:1922: {
.loc 2 1922 1 view .LVU2182
lea r12, 63[rsp] # tmp234,
mov rbx, r8 # len, tmp350
mov r13, rcx # .result_ptr, tmp348
mov r11, rdx # input, tmp349
and r12, -32 # tmp236,
.LBB8829:
.LBB8820:
.LBB8568:
.LBB8569:
# xxh3.h:1303: for (n = 0; n < nb_blocks; n++) {
.loc 2 1303 5 view .LVU2183
shr r8, 10 # nb_blocks,
.LVL421:
.loc 2 1303 5 view .LVU2184
.LBE8569:
.LBE8568:
# xxh3.h:1902: XXH_ALIGN(XXH_ACC_ALIGN) xxh_u64 acc[ACC_NB] = XXH3_INIT_ACC;
.loc 2 1902 38 view .LVU2185
mov QWORD PTR [r12], rax # acc, tmp353
movabs rax, -7046029288634856825 # tmp354,
mov QWORD PTR 8[r12], rax # acc, tmp354
movabs rax, -4417276706812531889 # tmp355,
mov QWORD PTR 16[r12], rax # acc, tmp355
movabs rax, 1609587929392839161 # tmp356,
mov QWORD PTR 24[r12], rax # acc, tmp356
movabs rax, -8796714831421723037 # tmp357,
mov QWORD PTR 32[r12], rax # acc, tmp357
mov eax, 2246822519 # tmp358,
mov QWORD PTR 40[r12], rax # acc, tmp358
movabs rax, 2870177450012600261 # tmp359,
mov QWORD PTR 48[r12], rax # acc, tmp359
mov eax, 2654435761 # tmp360,
mov QWORD PTR 56[r12], rax # acc, tmp360
.loc 2 1902 65 is_stmt 1 view .LVU2186
.loc 2 1904 5 view .LVU2187
.LVL422:
.LBB8809:
.LBI8568:
.loc 2 1290 1 view .LVU2188
.LBB8801:
.loc 2 1295 5 view .LVU2189
.loc 2 1296 5 view .LVU2190
.loc 2 1297 5 view .LVU2191
.loc 2 1299 5 view .LVU2192
.loc 2 1301 5 view .LVU2193
.loc 2 1303 5 view .LVU2194
.loc 2 1303 17 view .LVU2195
# xxh3.h:1303: for (n = 0; n < nb_blocks; n++) {
.loc 2 1303 5 is_stmt 0 view .LVU2196
je .L109 #,
vmovdqa ymm3, YMMWORD PTR [r12] # acc__lsm.389, MEM[(__m256i * {ref-all})&acc]
vmovdqa ymm2, YMMWORD PTR 32[r12] # acc__lsm.391, MEM[(__m256i * {ref-all})&acc + 32B]
sal r8, 10 # _105,
xor r9d, r9d # ivtmp.424
vmovdqa ymm6, YMMWORD PTR .LC0[rip] # tmp344,
vmovdqa ymm4, YMMWORD PTR .LC1[rip] # tmp345,
lea r10, 384[rdx] # tmp347,
lea rcx, kSecret[rip+160] # _158,
.LVL423:
.loc 2 1303 5 view .LVU2197
vmovdqa ymm5, YMMWORD PTR .LC2[rip] # tmp346,
.LVL424:
.p2align 4,,10
.p2align 3
.L111:
.loc 2 1304 9 is_stmt 1 view .LVU2198
.LBB8570:
.LBI8570:
.loc 2 1272 1 view .LVU2199
.LBB8571:
.loc 2 1278 5 view .LVU2200
.loc 2 1279 5 view .LVU2201
.loc 2 1279 17 view .LVU2202
lea rdx, [r10+r9] # ivtmp.411,
lea rax, kSecret[rip+32] # ivtmp.415,
.LVL425:
.p2align 4,,10
.p2align 3
.L110:
.LBB8572:
.loc 2 1280 9 view .LVU2203
.loc 2 1281 9 view .LVU2204
.LBB8573:
.LBB8574:
.LBB8575:
.LBB8576:
.LBB8577:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU2205
vmovdqu ymm1, YMMWORD PTR -32[rax] # tmp362, MEM[base: _159, offset: -32B]
vpxor ymm0, ymm1, YMMWORD PTR -384[rdx] # tmp249, tmp362, MEM[base: _12, offset: -384B]
add rax, 8 # ivtmp.415,
.LBE8577:
.LBE8576:
.LBE8575:
.LBE8574:
.LBE8573:
# xxh3.h:1281: XXH_PREFETCH(in + XXH_PREFETCH_DIST);
.loc 2 1281 9 view .LVU2206
prefetcht0 [rdx] # ivtmp.411
.loc 2 1282 9 is_stmt 1 view .LVU2207
.LVL426:
.LBB8624:
.LBI8573:
.loc 2 921 1 view .LVU2208
.LBE8624:
.LBE8572:
.LBE8571:
.LBE8570:
.LBE8801:
.LBE8809:
.LBE8820:
.LBE8829:
.loc 2 928 5 view .LVU2209
.LBB8830:
.LBB8821:
.LBB8810:
.LBB8802:
.LBB8628:
.LBB8627:
.LBB8626:
.LBB8625:
.LBB8623:
.loc 2 929 9 view .LVU2210
.loc 2 932 9 view .LVU2211
.loc 2 935 9 view .LVU2212
.loc 2 937 9 view .LVU2213
.loc 2 938 9 view .LVU2214
.loc 2 938 19 view .LVU2215
.LBB8621:
.loc 2 940 13 view .LVU2216
.LBB8582:
.LBI8582:
.loc 4 919 1 view .LVU2217
.LBB8583:
.loc 4 921 3 view .LVU2218
.loc 4 921 3 is_stmt 0 view .LVU2219
.LBE8583:
.LBE8582:
.loc 2 942 13 is_stmt 1 view .LVU2220
.LBB8585:
.LBI8585:
.loc 4 919 1 view .LVU2221
.LBB8586:
.loc 4 921 3 view .LVU2222
.LBE8586:
.LBE8585:
.loc 2 944 13 view .LVU2223
.LBB8588:
.LBI8576:
.loc 3 913 1 view .LVU2224
.LBB8578:
.loc 3 915 3 view .LVU2225
.loc 3 915 3 is_stmt 0 view .LVU2226
.LBE8578:
.LBE8588:
.loc 2 946 13 is_stmt 1 view .LVU2227
.LBB8589:
.LBI8589:
.loc 3 597 1 view .LVU2228
.LBB8590:
.loc 3 599 3 view .LVU2229
add rdx, 64 # ivtmp.411,
.LVL427:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 is_stmt 0 view .LVU2230
vpshufd ymm1, ymm0, 49 # tmp250, tmp249,
.LVL428:
.loc 3 599 19 view .LVU2231
.LBE8590:
.LBE8589:
.loc 2 948 13 is_stmt 1 view .LVU2232
.LBB8593:
.LBI8593:
.loc 3 567 1 view .LVU2233
.LBB8594:
.loc 3 569 3 view .LVU2234
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU2235
vpmuludq ymm0, ymm0, ymm1 # tmp252, tmp249, tmp250
.LVL429:
.loc 3 569 19 view .LVU2236
.LBE8594:
.LBE8593:
.loc 2 949 13 is_stmt 1 view .LVU2237
.LBB8596:
.loc 2 951 17 view .LVU2238
.LBB8597:
.LBI8597:
.loc 3 597 1 view .LVU2239
.LBB8598:
.loc 3 599 3 view .LVU2240
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 is_stmt 0 view .LVU2241
vpshufd ymm1, YMMWORD PTR -448[rdx], 78 # tmp253, MEM[base: _12, offset: -384B],
.LVL430:
.loc 3 599 19 view .LVU2242
.LBE8598:
.LBE8597:
.loc 2 952 17 is_stmt 1 view .LVU2243
.LBB8600:
.LBI8600:
.loc 3 126 1 view .LVU2244
.LBB8601:
.loc 3 128 3 view .LVU2245
.loc 3 128 3 is_stmt 0 view .LVU2246
.LBE8601:
.LBE8600:
.loc 2 954 17 is_stmt 1 view .LVU2247
.LBB8603:
.LBI8603:
.loc 3 126 1 view .LVU2248
.LBB8604:
.loc 3 128 3 view .LVU2249
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 is_stmt 0 view .LVU2250
vpaddq ymm0, ymm0, ymm1 # tmp255, tmp252, tmp253
.LVL431:
.loc 3 128 33 view .LVU2251
.LBE8604:
.LBE8603:
.LBE8596:
.LBB8611:
.LBB8579:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 view .LVU2252
vmovdqu ymm1, YMMWORD PTR -8[rax] # tmp363, MEM[base: _159, offset: 0B]
.LVL432:
.loc 3 915 33 view .LVU2253
.LBE8579:
.LBE8611:
.LBB8612:
.LBB8607:
.LBB8605:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 view .LVU2254
vpaddq ymm3, ymm0, ymm3 # acc__lsm.389, tmp255, acc__lsm.389
.loc 3 128 33 view .LVU2255
.LBE8605:
.LBE8607:
.LBE8612:
.LBE8621:
.loc 2 938 51 is_stmt 1 view .LVU2256
.LVL433:
.loc 2 938 19 view .LVU2257
.LBB8622:
.loc 2 940 13 view .LVU2258
.LBB8613:
.loc 4 919 1 view .LVU2259
.LBB8584:
.loc 4 921 3 view .LVU2260
.loc 4 921 3 is_stmt 0 view .LVU2261
.LBE8584:
.LBE8613:
.loc 2 942 13 is_stmt 1 view .LVU2262
.LBB8614:
.loc 4 919 1 view .LVU2263
.LBB8587:
.loc 4 921 3 view .LVU2264
.LBE8587:
.LBE8614:
.loc 2 944 13 view .LVU2265
.LBB8615:
.loc 3 913 1 view .LVU2266
.LBB8580:
.loc 3 915 3 view .LVU2267
.loc 3 915 3 is_stmt 0 view .LVU2268
.LBE8580:
.LBE8615:
.loc 2 946 13 is_stmt 1 view .LVU2269
.LBB8616:
.loc 3 597 1 view .LVU2270
.LBB8591:
.loc 3 599 3 view .LVU2271
.LBE8591:
.LBE8616:
.LBB8617:
.LBB8581:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU2272
vpxor ymm0, ymm1, YMMWORD PTR -416[rdx] # tmp258, tmp363, MEM[base: _12, offset: -352B]
.LBE8581:
.LBE8617:
.LBB8618:
.LBB8592:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 view .LVU2273
vpshufd ymm1, ymm0, 49 # tmp259, tmp258,
.LVL434:
.loc 3 599 19 view .LVU2274
.LBE8592:
.LBE8618:
.loc 2 948 13 is_stmt 1 view .LVU2275
.LBB8619:
.loc 3 567 1 view .LVU2276
.LBB8595:
.loc 3 569 3 view .LVU2277
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU2278
vpmuludq ymm0, ymm0, ymm1 # tmp261, tmp258, tmp259
.LVL435:
.loc 3 569 19 view .LVU2279
.LBE8595:
.LBE8619:
.loc 2 949 13 is_stmt 1 view .LVU2280
.LBB8620:
.loc 2 951 17 view .LVU2281
.LBB8608:
.loc 3 597 1 view .LVU2282
.LBB8599:
.loc 3 599 3 view .LVU2283
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 is_stmt 0 view .LVU2284
vpshufd ymm1, YMMWORD PTR -416[rdx], 78 # tmp262, MEM[base: _12, offset: -352B],
.LVL436:
.loc 3 599 19 view .LVU2285
.LBE8599:
.LBE8608:
.loc 2 952 17 is_stmt 1 view .LVU2286
.LBB8609:
.loc 3 126 1 view .LVU2287
.LBB8602:
.loc 3 128 3 view .LVU2288
.loc 3 128 3 is_stmt 0 view .LVU2289
.LBE8602:
.LBE8609:
.loc 2 954 17 is_stmt 1 view .LVU2290
.LBB8610:
.loc 3 126 1 view .LVU2291
.LBB8606:
.loc 3 128 3 view .LVU2292
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 is_stmt 0 view .LVU2293
vpaddq ymm0, ymm0, ymm1 # tmp264, tmp261, tmp262
.LVL437:
.loc 3 128 33 view .LVU2294
vpaddq ymm2, ymm0, ymm2 # acc__lsm.391, tmp264, acc__lsm.391
.loc 3 128 33 view .LVU2295
.LBE8606:
.LBE8610:
.LBE8620:
.LBE8622:
.loc 2 938 51 is_stmt 1 view .LVU2296
.LVL438:
.loc 2 938 19 view .LVU2297
.loc 2 938 19 is_stmt 0 view .LVU2298
.LBE8623:
.LBE8625:
.LBE8626:
.loc 2 1279 32 is_stmt 1 view .LVU2299
.loc 2 1279 17 view .LVU2300
# xxh3.h:1279: for (n = 0; n < nbStripes; n++ ) {
.loc 2 1279 5 is_stmt 0 view .LVU2301
cmp rcx, rax # _158, ivtmp.415
jne .L110 #,
.LVL439:
.loc 2 1279 5 view .LVU2302
.LBE8627:
.LBE8628:
.LBB8629:
.LBB8630:
.loc 2 1123 19 is_stmt 1 view .LVU2303
.LBB8631:
.loc 2 1125 13 view .LVU2304
.loc 2 1126 13 view .LVU2305
.LBB8632:
.LBI8632:
.loc 3 787 1 view .LVU2306
.LBB8633:
.loc 3 789 3 view .LVU2307
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:789: return (__m256i)__builtin_ia32_psrlqi256 ((__v4di)__A, __B);
.loc 3 789 19 is_stmt 0 view .LVU2308
vpsrlq ymm0, ymm3, 47 # tmp265, acc__lsm.389,
.LVL440:
.loc 3 789 19 view .LVU2309
.LBE8633:
.LBE8632:
.loc 2 1127 13 is_stmt 1 view .LVU2310
.LBB8635:
.LBI8635:
.loc 3 913 1 view .LVU2311
.LBB8636:
.loc 3 915 3 view .LVU2312
.loc 3 915 3 is_stmt 0 view .LVU2313
.LBE8636:
.LBE8635:
.loc 2 1129 13 is_stmt 1 view .LVU2314
.loc 2 1129 13 is_stmt 0 view .LVU2315
.LBE8631:
.LBE8630:
.LBE8629:
.LBE8802:
.LBE8810:
.LBE8821:
.LBE8830:
.loc 4 921 3 is_stmt 1 view .LVU2316
.LBB8831:
.LBB8822:
.LBB8811:
.LBB8803:
.LBB8677:
.LBB8675:
.LBB8672:
.loc 2 1130 13 view .LVU2317
.LBB8638:
.LBI8638:
.loc 3 913 1 view .LVU2318
.LBB8639:
.loc 3 915 3 view .LVU2319
.loc 3 915 3 is_stmt 0 view .LVU2320
.LBE8639:
.LBE8638:
.loc 2 1133 13 is_stmt 1 view .LVU2321
.LBB8643:
.LBI8643:
.loc 3 597 1 view .LVU2322
.LBB8644:
.loc 3 599 3 view .LVU2323
.LBE8644:
.LBE8643:
.LBB8648:
.LBB8640:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU2324
vpxor ymm3, ymm3, ymm6 # tmp267, acc__lsm.389, tmp344
.LVL441:
.loc 3 915 33 view .LVU2325
add r9, 1024 # ivtmp.424,
vpxor ymm3, ymm3, ymm0 # tmp269, tmp267, tmp265
.LBE8640:
.LBE8648:
.LBB8649:
.LBB8645:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 view .LVU2326
vpshufd ymm0, ymm3, 49 # tmp270, tmp269,
.LVL442:
.loc 3 599 19 view .LVU2327
.LBE8645:
.LBE8649:
.loc 2 1134 13 is_stmt 1 view .LVU2328
.LBB8650:
.LBI8650:
.loc 3 567 1 view .LVU2329
.LBB8651:
.loc 3 569 3 view .LVU2330
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU2331
vpmuludq ymm3, ymm3, ymm4 # tmp272, tmp269, tmp345
.LVL443:
.loc 3 569 19 view .LVU2332
.LBE8651:
.LBE8650:
.loc 2 1135 13 is_stmt 1 view .LVU2333
.LBB8653:
.LBI8653:
.loc 3 567 1 view .LVU2334
.LBB8654:
.loc 3 569 3 view .LVU2335
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU2336
vpmuludq ymm0, ymm0, ymm4 # tmp274, tmp270, tmp345
.LVL444:
.loc 3 569 19 view .LVU2337
.LBE8654:
.LBE8653:
.loc 2 1136 13 is_stmt 1 view .LVU2338
.LBB8656:
.LBI8656:
.loc 3 696 1 view .LVU2339
.LBB8657:
.loc 3 698 3 view .LVU2340
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:698: return (__m256i)__builtin_ia32_psllqi256 ((__v4di)__A, __B);
.loc 3 698 19 is_stmt 0 view .LVU2341
vpsllq ymm0, ymm0, 32 # tmp276, tmp274,
.LVL445:
.loc 3 698 19 view .LVU2342
.LBE8657:
.LBE8656:
.LBB8659:
.LBI8659:
.loc 3 126 1 is_stmt 1 view .LVU2343
.LBB8660:
.loc 3 128 3 view .LVU2344
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 is_stmt 0 view .LVU2345
vpaddq ymm3, ymm3, ymm0 # acc__lsm.389, tmp272, tmp276
.LVL446:
.loc 3 128 33 view .LVU2346
.LBE8660:
.LBE8659:
.LBE8672:
.loc 2 1123 51 is_stmt 1 view .LVU2347
.loc 2 1123 19 view .LVU2348
.LBB8673:
.loc 2 1125 13 view .LVU2349
.loc 2 1126 13 view .LVU2350
.LBB8662:
.loc 3 787 1 view .LVU2351
.LBB8634:
.loc 3 789 3 view .LVU2352
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:789: return (__m256i)__builtin_ia32_psrlqi256 ((__v4di)__A, __B);
.loc 3 789 19 is_stmt 0 view .LVU2353
vpsrlq ymm0, ymm2, 47 # tmp279, acc__lsm.391,
.LVL447:
.loc 3 789 19 view .LVU2354
.LBE8634:
.LBE8662:
.loc 2 1127 13 is_stmt 1 view .LVU2355
.LBB8663:
.loc 3 913 1 view .LVU2356
.LBB8637:
.loc 3 915 3 view .LVU2357
.loc 3 915 3 is_stmt 0 view .LVU2358
.LBE8637:
.LBE8663:
.loc 2 1129 13 is_stmt 1 view .LVU2359
.loc 2 1129 13 is_stmt 0 view .LVU2360
.LBE8673:
.LBE8675:
.LBE8677:
.LBE8803:
.LBE8811:
.LBE8822:
.LBE8831:
.loc 4 921 3 is_stmt 1 view .LVU2361
.LBB8832:
.LBB8823:
.LBB8812:
.LBB8804:
.LBB8678:
.LBB8676:
.LBB8674:
.loc 2 1130 13 view .LVU2362
.LBB8664:
.loc 3 913 1 view .LVU2363
.LBB8641:
.loc 3 915 3 view .LVU2364
.loc 3 915 3 is_stmt 0 view .LVU2365
.LBE8641:
.LBE8664:
.loc 2 1133 13 is_stmt 1 view .LVU2366
.LBB8665:
.loc 3 597 1 view .LVU2367
.LBB8646:
.loc 3 599 3 view .LVU2368
.LBE8646:
.LBE8665:
.LBB8666:
.LBB8642:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU2369
vpxor ymm2, ymm2, ymm5 # tmp281, acc__lsm.391, tmp346
.LVL448:
.loc 3 915 33 view .LVU2370
vpxor ymm2, ymm2, ymm0 # tmp283, tmp281, tmp279
.LBE8642:
.LBE8666:
.LBB8667:
.LBB8647:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 view .LVU2371
vpshufd ymm0, ymm2, 49 # tmp284, tmp283,
.LVL449:
.loc 3 599 19 view .LVU2372
.LBE8647:
.LBE8667:
.loc 2 1134 13 is_stmt 1 view .LVU2373
.LBB8668:
.loc 3 567 1 view .LVU2374
.LBB8652:
.loc 3 569 3 view .LVU2375
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU2376
vpmuludq ymm2, ymm2, ymm4 # tmp286, tmp283, tmp345
.LVL450:
.loc 3 569 19 view .LVU2377
.LBE8652:
.LBE8668:
.loc 2 1135 13 is_stmt 1 view .LVU2378
.LBB8669:
.loc 3 567 1 view .LVU2379
.LBB8655:
.loc 3 569 3 view .LVU2380
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU2381
vpmuludq ymm0, ymm0, ymm4 # tmp288, tmp284, tmp345
.LVL451:
.loc 3 569 19 view .LVU2382
.LBE8655:
.LBE8669:
.loc 2 1136 13 is_stmt 1 view .LVU2383
.LBB8670:
.loc 3 696 1 view .LVU2384
.LBB8658:
.loc 3 698 3 view .LVU2385
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:698: return (__m256i)__builtin_ia32_psllqi256 ((__v4di)__A, __B);
.loc 3 698 19 is_stmt 0 view .LVU2386
vpsllq ymm0, ymm0, 32 # tmp290, tmp288,
.LVL452:
.loc 3 698 19 view .LVU2387
.LBE8658:
.LBE8670:
.LBB8671:
.loc 3 126 1 is_stmt 1 view .LVU2388
.LBB8661:
.loc 3 128 3 view .LVU2389
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 is_stmt 0 view .LVU2390
vpaddq ymm2, ymm2, ymm0 # acc__lsm.391, tmp286, tmp290
.LVL453:
.loc 3 128 33 view .LVU2391
.LBE8661:
.LBE8671:
.LBE8674:
.loc 2 1123 51 is_stmt 1 view .LVU2392
.loc 2 1123 19 view .LVU2393
.loc 2 1123 19 is_stmt 0 view .LVU2394
.LBE8676:
.LBE8678:
.loc 2 1303 32 is_stmt 1 view .LVU2395
.loc 2 1303 17 view .LVU2396
# xxh3.h:1303: for (n = 0; n < nb_blocks; n++) {
.loc 2 1303 5 is_stmt 0 view .LVU2397
cmp r9, r8 # ivtmp.424, _105
jne .L111 #,
vmovdqa YMMWORD PTR [r12], ymm3 # MEM[(__m256i * {ref-all})&acc], acc__lsm.389
vmovdqa YMMWORD PTR 32[r12], ymm2 # MEM[(__m256i * {ref-all})&acc + 32B], acc__lsm.391
.LVL454:
.L109:
.loc 2 1309 5 is_stmt 1 view .LVU2398
.LBB8679:
.loc 2 1310 9 view .LVU2399
# xxh3.h:1310: { size_t const nbStripes = (len - (block_len * nb_blocks)) / STRIPE_LEN;
.loc 2 1310 22 is_stmt 0 view .LVU2400
mov rax, rbx # tmp293, len
# xxh3.h:1310: { size_t const nbStripes = (len - (block_len * nb_blocks)) / STRIPE_LEN;
.loc 2 1310 52 view .LVU2401
mov rdx, rbx # _63, len
# xxh3.h:1310: { size_t const nbStripes = (len - (block_len * nb_blocks)) / STRIPE_LEN;
.loc 2 1310 22 view .LVU2402
shr rax, 6 # tmp293,
.LVL455:
.loc 2 1311 9 is_stmt 1 view .LVU2403
.loc 2 1312 9 view .LVU2404
# xxh3.h:1310: { size_t const nbStripes = (len - (block_len * nb_blocks)) / STRIPE_LEN;
.loc 2 1310 52 is_stmt 0 view .LVU2405
and rdx, -1024 # _63,
.LVL456:
.LBB8680:
.LBI8680:
.loc 2 1272 1 is_stmt 1 view .LVU2406
.LBB8681:
.loc 2 1278 5 view .LVU2407
.loc 2 1279 5 view .LVU2408
.loc 2 1279 17 view .LVU2409
# xxh3.h:1279: for (n = 0; n < nbStripes; n++ ) {
.loc 2 1279 5 is_stmt 0 view .LVU2410
and eax, 15 # tmp293,
.LVL457:
.loc 2 1279 5 view .LVU2411
mov rcx, rax # nbStripes, tmp293
je .L112 #,
lea rax, kSecret[rip] # ivtmp.399,
.LVL458:
.loc 2 1279 5 view .LVU2412
vmovdqa ymm3, YMMWORD PTR [r12] # acc__lsm.385, MEM[(__m256i * {ref-all})&acc]
vmovdqa ymm2, YMMWORD PTR 32[r12] # acc__lsm.387, MEM[(__m256i * {ref-all})&acc + 32B]
lea rdx, 384[r11+rdx] # ivtmp.397,
.LVL459:
.loc 2 1279 5 view .LVU2413
lea rcx, [rax+rcx*8] # _118,
.LVL460:
.p2align 4,,10
.p2align 3
.L113:
.LBB8682:
.loc 2 1280 9 is_stmt 1 view .LVU2414
.loc 2 1281 9 view .LVU2415
.LBB8683:
.LBB8684:
.LBB8685:
.LBB8686:
.LBB8687:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU2416
vmovdqu ymm5, YMMWORD PTR [rax] # tmp367, MEM[base: _121, offset: 0B]
vmovdqu ymm6, YMMWORD PTR 32[rax] # tmp368, MEM[base: _121, offset: 32B]
add rax, 8 # ivtmp.399,
.LBE8687:
.LBE8686:
.LBE8685:
.LBE8684:
.LBE8683:
# xxh3.h:1281: XXH_PREFETCH(in + XXH_PREFETCH_DIST);
.loc 2 1281 9 view .LVU2417
prefetcht0 [rdx] # ivtmp.397
.loc 2 1282 9 is_stmt 1 view .LVU2418
.LVL461:
.LBB8733:
.LBI8683:
.loc 2 921 1 view .LVU2419
.LBE8733:
.LBE8682:
.LBE8681:
.LBE8680:
.LBE8679:
.LBE8804:
.LBE8812:
.LBE8823:
.LBE8832:
.loc 2 928 5 view .LVU2420
.LBB8833:
.LBB8824:
.LBB8813:
.LBB8805:
.LBB8797:
.LBB8737:
.LBB8736:
.LBB8735:
.LBB8734:
.LBB8732:
.loc 2 929 9 view .LVU2421
.loc 2 932 9 view .LVU2422
.loc 2 935 9 view .LVU2423
.loc 2 937 9 view .LVU2424
.loc 2 938 9 view .LVU2425
.loc 2 938 19 view .LVU2426
.LBB8730:
.loc 2 940 13 view .LVU2427
.LBB8692:
.LBI8692:
.loc 4 919 1 view .LVU2428
.LBB8693:
.loc 4 921 3 view .LVU2429
.loc 4 921 3 is_stmt 0 view .LVU2430
.LBE8693:
.LBE8692:
.loc 2 942 13 is_stmt 1 view .LVU2431
.LBB8695:
.LBI8695:
.loc 4 919 1 view .LVU2432
.LBB8696:
.loc 4 921 3 view .LVU2433
.LBE8696:
.LBE8695:
.loc 2 944 13 view .LVU2434
.LBB8698:
.LBI8686:
.loc 3 913 1 view .LVU2435
.LBB8688:
.loc 3 915 3 view .LVU2436
.loc 3 915 3 is_stmt 0 view .LVU2437
.LBE8688:
.LBE8698:
.loc 2 946 13 is_stmt 1 view .LVU2438
.LBB8699:
.LBI8699:
.loc 3 597 1 view .LVU2439
.LBB8700:
.loc 3 599 3 view .LVU2440
.LBE8700:
.LBE8699:
.LBB8704:
.LBB8689:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU2441
vpxor ymm0, ymm5, YMMWORD PTR -384[rdx] # tmp298, tmp367, MEM[base: _69, offset: -384B]
add rdx, 64 # ivtmp.397,
.LVL462:
.loc 3 915 33 view .LVU2442
.LBE8689:
.LBE8704:
.LBB8705:
.LBB8701:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 view .LVU2443
vpshufd ymm1, ymm0, 49 # tmp299, tmp298,
.LVL463:
.loc 3 599 19 view .LVU2444
.LBE8701:
.LBE8705:
.loc 2 948 13 is_stmt 1 view .LVU2445
.LBB8706:
.LBI8706:
.loc 3 567 1 view .LVU2446
.LBB8707:
.loc 3 569 3 view .LVU2447
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU2448
vpmuludq ymm0, ymm0, ymm1 # tmp301, tmp298, tmp299
.LVL464:
.loc 3 569 19 view .LVU2449
.LBE8707:
.LBE8706:
.loc 2 949 13 is_stmt 1 view .LVU2450
.LBB8709:
.loc 2 951 17 view .LVU2451
.LBB8710:
.LBI8710:
.loc 3 597 1 view .LVU2452
.LBB8711:
.loc 3 599 3 view .LVU2453
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 is_stmt 0 view .LVU2454
vpshufd ymm1, YMMWORD PTR -448[rdx], 78 # tmp302, MEM[base: _69, offset: -384B],
.LVL465:
.loc 3 599 19 view .LVU2455
.LBE8711:
.LBE8710:
.loc 2 952 17 is_stmt 1 view .LVU2456
.LBB8713:
.LBI8713:
.loc 3 126 1 view .LVU2457
.LBB8714:
.loc 3 128 3 view .LVU2458
.loc 3 128 3 is_stmt 0 view .LVU2459
.LBE8714:
.LBE8713:
.loc 2 954 17 is_stmt 1 view .LVU2460
.LBB8716:
.LBI8716:
.loc 3 126 1 view .LVU2461
.LBB8717:
.loc 3 128 3 view .LVU2462
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 is_stmt 0 view .LVU2463
vpaddq ymm0, ymm0, ymm1 # tmp304, tmp301, tmp302
.LVL466:
.loc 3 128 33 view .LVU2464
vpaddq ymm3, ymm0, ymm3 # acc__lsm.385, tmp304, acc__lsm.385
.LVL467:
.loc 3 128 33 view .LVU2465
.LBE8717:
.LBE8716:
.LBE8709:
.LBE8730:
.loc 2 938 51 is_stmt 1 view .LVU2466
.loc 2 938 19 view .LVU2467
.LBB8731:
.loc 2 940 13 view .LVU2468
.LBB8722:
.loc 4 919 1 view .LVU2469
.LBB8694:
.loc 4 921 3 view .LVU2470
.loc 4 921 3 is_stmt 0 view .LVU2471
.LBE8694:
.LBE8722:
.loc 2 942 13 is_stmt 1 view .LVU2472
.LBB8723:
.loc 4 919 1 view .LVU2473
.LBB8697:
.loc 4 921 3 view .LVU2474
.LBE8697:
.LBE8723:
.loc 2 944 13 view .LVU2475
.LBB8724:
.loc 3 913 1 view .LVU2476
.LBB8690:
.loc 3 915 3 view .LVU2477
.loc 3 915 3 is_stmt 0 view .LVU2478
.LBE8690:
.LBE8724:
.loc 2 946 13 is_stmt 1 view .LVU2479
.LBB8725:
.loc 3 597 1 view .LVU2480
.LBB8702:
.loc 3 599 3 view .LVU2481
.LBE8702:
.LBE8725:
.LBB8726:
.LBB8691:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU2482
vpxor ymm0, ymm6, YMMWORD PTR -416[rdx] # tmp308, tmp368, MEM[base: _69, offset: -352B]
.LBE8691:
.LBE8726:
.LBB8727:
.LBB8703:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 view .LVU2483
vpshufd ymm1, ymm0, 49 # tmp309, tmp308,
.LVL468:
.loc 3 599 19 view .LVU2484
.LBE8703:
.LBE8727:
.loc 2 948 13 is_stmt 1 view .LVU2485
.LBB8728:
.loc 3 567 1 view .LVU2486
.LBB8708:
.loc 3 569 3 view .LVU2487
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU2488
vpmuludq ymm0, ymm0, ymm1 # tmp311, tmp308, tmp309
.LVL469:
.loc 3 569 19 view .LVU2489
.LBE8708:
.LBE8728:
.loc 2 949 13 is_stmt 1 view .LVU2490
.LBB8729:
.loc 2 951 17 view .LVU2491
.LBB8719:
.loc 3 597 1 view .LVU2492
.LBB8712:
.loc 3 599 3 view .LVU2493
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 is_stmt 0 view .LVU2494
vpshufd ymm1, YMMWORD PTR -416[rdx], 78 # tmp312, MEM[base: _69, offset: -352B],
.LVL470:
.loc 3 599 19 view .LVU2495
.LBE8712:
.LBE8719:
.loc 2 952 17 is_stmt 1 view .LVU2496
.LBB8720:
.loc 3 126 1 view .LVU2497
.LBB8715:
.loc 3 128 3 view .LVU2498
.loc 3 128 3 is_stmt 0 view .LVU2499
.LBE8715:
.LBE8720:
.loc 2 954 17 is_stmt 1 view .LVU2500
.LBB8721:
.loc 3 126 1 view .LVU2501
.LBB8718:
.loc 3 128 3 view .LVU2502
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 is_stmt 0 view .LVU2503
vpaddq ymm0, ymm0, ymm1 # tmp314, tmp311, tmp312
.LVL471:
.loc 3 128 33 view .LVU2504
vpaddq ymm2, ymm0, ymm2 # acc__lsm.387, tmp314, acc__lsm.387
.LVL472:
.loc 3 128 33 view .LVU2505
.LBE8718:
.LBE8721:
.LBE8729:
.LBE8731:
.loc 2 938 51 is_stmt 1 view .LVU2506
.loc 2 938 19 view .LVU2507
.loc 2 938 19 is_stmt 0 view .LVU2508
.LBE8732:
.LBE8734:
.LBE8735:
.loc 2 1279 32 is_stmt 1 view .LVU2509
.loc 2 1279 17 view .LVU2510
# xxh3.h:1279: for (n = 0; n < nbStripes; n++ ) {
.loc 2 1279 5 is_stmt 0 view .LVU2511
cmp rcx, rax # _118, ivtmp.399
jne .L113 #,
vmovdqa YMMWORD PTR [r12], ymm3 # MEM[(__m256i * {ref-all})&acc], acc__lsm.385
vmovdqa YMMWORD PTR 32[r12], ymm2 # MEM[(__m256i * {ref-all})&acc + 32B], acc__lsm.387
.LVL473:
.L112:
.loc 2 1279 5 view .LVU2512
.LBE8736:
.LBE8737:
.loc 2 1315 9 is_stmt 1 view .LVU2513
# xxh3.h:1315: if (len & (STRIPE_LEN - 1)) {
.loc 2 1315 12 is_stmt 0 view .LVU2514
test bl, 63 # len,
je .L114 #,
.LBB8738:
.loc 2 1316 13 is_stmt 1 view .LVU2515
.LVL474:
.loc 2 1319 13 view .LVU2516
.LBB8739:
.LBI8739:
.loc 2 921 1 view .LVU2517
.LBE8739:
.LBE8738:
.LBE8797:
.LBE8805:
.LBE8813:
.LBE8824:
.LBE8833:
.loc 2 928 5 view .LVU2518
.LBB8834:
.LBB8825:
.LBB8814:
.LBB8806:
.LBB8798:
.LBB8794:
.LBB8791:
.LBB8740:
.loc 2 929 9 view .LVU2519
.loc 2 932 9 view .LVU2520
.loc 2 935 9 view .LVU2521
.loc 2 937 9 view .LVU2522
.loc 2 938 9 view .LVU2523
.loc 2 938 19 view .LVU2524
.LBB8741:
.loc 2 940 13 view .LVU2525
.LBB8742:
.LBI8742:
.loc 4 919 1 view .LVU2526
.LBB8743:
.loc 4 921 3 view .LVU2527
.loc 4 921 3 is_stmt 0 view .LVU2528
.LBE8743:
.LBE8742:
.loc 2 942 13 is_stmt 1 view .LVU2529
.loc 2 942 13 is_stmt 0 view .LVU2530
.LBE8741:
.LBE8740:
.LBE8791:
.LBE8794:
.LBE8798:
.LBE8806:
.LBE8814:
.LBE8825:
.LBE8834:
.loc 4 921 3 is_stmt 1 view .LVU2531
.LBB8835:
.LBB8826:
.LBB8815:
.LBB8807:
.LBB8799:
.LBB8795:
.LBB8792:
.LBB8789:
.LBB8786:
.loc 2 944 13 view .LVU2532
.LBB8746:
.LBI8746:
.loc 3 913 1 view .LVU2533
.LBB8747:
.loc 3 915 3 view .LVU2534
.loc 3 915 3 is_stmt 0 view .LVU2535
.LBE8747:
.LBE8746:
.loc 2 946 13 is_stmt 1 view .LVU2536
.LBB8751:
.LBI8751:
.loc 3 597 1 view .LVU2537
.LBB8752:
.loc 3 599 3 view .LVU2538
.LBE8752:
.LBE8751:
.LBB8756:
.LBB8748:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU2539
vmovdqu ymm5, YMMWORD PTR -64[r11+rbx] # tmp369, MEM[(const __m256i_u * {ref-all})_155]
vpxor ymm0, ymm5, YMMWORD PTR .LC3[rip] # tmp318, tmp369,
.LBE8748:
.LBE8756:
.LBB8757:
.LBB8753:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 view .LVU2540
vpshufd ymm1, ymm0, 49 # tmp320, tmp318,
.LVL475:
.loc 3 599 19 view .LVU2541
.LBE8753:
.LBE8757:
.loc 2 948 13 is_stmt 1 view .LVU2542
.LBB8758:
.LBI8758:
.loc 3 567 1 view .LVU2543
.LBB8759:
.loc 3 569 3 view .LVU2544
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU2545
vpmuludq ymm0, ymm0, ymm1 # tmp322, tmp318, tmp320
.LVL476:
.loc 3 569 19 view .LVU2546
.LBE8759:
.LBE8758:
.loc 2 949 13 is_stmt 1 view .LVU2547
.LBB8761:
.loc 2 951 17 view .LVU2548
.LBB8762:
.LBI8762:
.loc 3 597 1 view .LVU2549
.LBB8763:
.loc 3 599 3 view .LVU2550
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 is_stmt 0 view .LVU2551
vpshufd ymm1, YMMWORD PTR -64[r11+rbx], 78 # tmp323, MEM[(const __m256i_u * {ref-all})_155],
.LVL477:
.loc 3 599 19 view .LVU2552
.LBE8763:
.LBE8762:
.loc 2 952 17 is_stmt 1 view .LVU2553
.LBB8766:
.LBI8766:
.loc 3 126 1 view .LVU2554
.LBB8767:
.loc 3 128 3 view .LVU2555
.loc 3 128 3 is_stmt 0 view .LVU2556
.LBE8767:
.LBE8766:
.loc 2 954 17 is_stmt 1 view .LVU2557
.LBB8769:
.LBI8769:
.loc 3 126 1 view .LVU2558
.LBB8770:
.loc 3 128 3 view .LVU2559
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 is_stmt 0 view .LVU2560
vpaddq ymm0, ymm0, ymm1 # tmp325, tmp322, tmp323
.LVL478:
.loc 3 128 33 view .LVU2561
vpaddq ymm0, ymm0, YMMWORD PTR [r12] # tmp326, tmp325, MEM[(__m256i * {ref-all})&acc]
.LBE8770:
.LBE8769:
.LBE8761:
.LBB8776:
.LBB8744:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avxintrin.h:921: return *__P;
.loc 4 921 10 view .LVU2562
vmovdqu ymm1, YMMWORD PTR -32[r11+rbx] # MEM[(const __m256i_u * {ref-all})_182], MEM[(const __m256i_u * {ref-all})_182]
.LVL479:
.loc 4 921 10 view .LVU2563
.LBE8744:
.LBE8776:
.LBB8777:
# xxh3.h:954: xacc[i] = _mm256_add_epi64(product, sum);
.loc 2 954 25 view .LVU2564
vmovdqa YMMWORD PTR [r12], ymm0 # MEM[(__m256i * {ref-all})&acc], tmp326
.loc 2 954 25 view .LVU2565
.LBE8777:
.LBE8786:
.loc 2 938 51 is_stmt 1 view .LVU2566
.LVL480:
.loc 2 938 19 view .LVU2567
.LBB8787:
.loc 2 940 13 view .LVU2568
.LBB8778:
.loc 4 919 1 view .LVU2569
.LBB8745:
.loc 4 921 3 view .LVU2570
.loc 4 921 3 is_stmt 0 view .LVU2571
.LBE8745:
.LBE8778:
.loc 2 942 13 is_stmt 1 view .LVU2572
.loc 2 942 13 is_stmt 0 view .LVU2573
.LBE8787:
.LBE8789:
.LBE8792:
.LBE8795:
.LBE8799:
.LBE8807:
.LBE8815:
.LBE8826:
.LBE8835:
.loc 4 921 3 is_stmt 1 view .LVU2574
.LBB8836:
.LBB8827:
.LBB8816:
.LBB8808:
.LBB8800:
.LBB8796:
.LBB8793:
.LBB8790:
.LBB8788:
.loc 2 944 13 view .LVU2575
.LBB8779:
.loc 3 913 1 view .LVU2576
.LBB8749:
.loc 3 915 3 view .LVU2577
.loc 3 915 3 is_stmt 0 view .LVU2578
.LBE8749:
.LBE8779:
.loc 2 946 13 is_stmt 1 view .LVU2579
.LBB8780:
.loc 3 597 1 view .LVU2580
.LBB8754:
.loc 3 599 3 view .LVU2581
.LBE8754:
.LBE8780:
.LBB8781:
.LBB8750:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU2582
vpxor ymm0, ymm1, YMMWORD PTR .LC4[rip] # tmp328, MEM[(const __m256i_u * {ref-all})_182],
.LBE8750:
.LBE8781:
.LBB8782:
.LBB8772:
.LBB8764:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 view .LVU2583
vpshufd ymm1, ymm1, 78 # tmp333, MEM[(const __m256i_u * {ref-all})_182],
.LVL481:
.loc 3 599 19 view .LVU2584
.LBE8764:
.LBE8772:
.LBE8782:
.LBB8783:
.LBB8755:
vpshufd ymm2, ymm0, 49 # tmp330, tmp328,
.LVL482:
.loc 3 599 19 view .LVU2585
.LBE8755:
.LBE8783:
.loc 2 948 13 is_stmt 1 view .LVU2586
.LBB8784:
.loc 3 567 1 view .LVU2587
.LBB8760:
.loc 3 569 3 view .LVU2588
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU2589
vpmuludq ymm0, ymm0, ymm2 # tmp332, tmp328, tmp330
.LVL483:
.loc 3 569 19 view .LVU2590
.LBE8760:
.LBE8784:
.loc 2 949 13 is_stmt 1 view .LVU2591
.LBB8785:
.loc 2 951 17 view .LVU2592
.LBB8773:
.loc 3 597 1 view .LVU2593
.LBB8765:
.loc 3 599 3 view .LVU2594
.loc 3 599 3 is_stmt 0 view .LVU2595
.LBE8765:
.LBE8773:
.loc 2 952 17 is_stmt 1 view .LVU2596
.LBB8774:
.loc 3 126 1 view .LVU2597
.LBB8768:
.loc 3 128 3 view .LVU2598
.loc 3 128 3 is_stmt 0 view .LVU2599
.LBE8768:
.LBE8774:
.loc 2 954 17 is_stmt 1 view .LVU2600
.LBB8775:
.loc 3 126 1 view .LVU2601
.LBB8771:
.loc 3 128 3 view .LVU2602
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 is_stmt 0 view .LVU2603
vpaddq ymm0, ymm0, ymm1 # tmp335, tmp332, tmp333
.LVL484:
.loc 3 128 33 view .LVU2604
vpaddq ymm0, ymm0, YMMWORD PTR 32[r12] # tmp336, tmp335, MEM[(__m256i * {ref-all})&acc + 32B]
.LBE8771:
.LBE8775:
# xxh3.h:954: xacc[i] = _mm256_add_epi64(product, sum);
.loc 2 954 25 view .LVU2605
vmovdqa YMMWORD PTR 32[r12], ymm0 # MEM[(__m256i * {ref-all})&acc + 32B], tmp336
.LVL485:
.loc 2 954 25 view .LVU2606
.LBE8785:
.LBE8788:
.loc 2 938 51 is_stmt 1 view .LVU2607
.loc 2 938 19 view .LVU2608
.L114:
.loc 2 938 19 is_stmt 0 view .LVU2609
.LBE8790:
.LBE8793:
.LBE8796:
.LBE8800:
.LBE8808:
.LBE8816:
.LBB8817:
.loc 2 1907 5 is_stmt 1 view .LVU2610
.LBE8817:
.loc 2 1907 41 view .LVU2611
.loc 2 1908 5 view .LVU2612
.LBB8818:
.loc 2 1909 9 view .LVU2613
# xxh3.h:1909: { xxh_u64 const low64 = XXH3_mergeAccs(acc, secret + XXH_SECRET_MERGEACCS_START, (xxh_u64)len * PRIME64_1);
.loc 2 1909 31 is_stmt 0 view .LVU2614
movabs r8, -7046029288634856825 # tmp338,
lea rdx, kSecret[rip+11] #,
mov rcx, r12 #, tmp236
imul r8, rbx #, len
vzeroupper
call XXH3_mergeAccs #
.LVL486:
# xxh3.h:1910: xxh_u64 const high64 = XXH3_mergeAccs(acc, secret + secretSize - sizeof(acc) - XXH_SECRET_MERGEACCS_START, ~((xxh_u64)len * PRIME64_2));
.loc 2 1910 32 view .LVU2615
lea rdx, kSecret[rip+117] #,
# xxh3.h:1910: xxh_u64 const high64 = XXH3_mergeAccs(acc, secret + secretSize - sizeof(acc) - XXH_SECRET_MERGEACCS_START, ~((xxh_u64)len * PRIME64_2));
.loc 2 1910 131 view .LVU2616
movabs r8, -4417276706812531889 # tmp340,
imul r8, rbx # tmp339, len
# xxh3.h:1909: { xxh_u64 const low64 = XXH3_mergeAccs(acc, secret + XXH_SECRET_MERGEACCS_START, (xxh_u64)len * PRIME64_1);
.loc 2 1909 31 view .LVU2617
mov rsi, rax # low64, tmp351
.LVL487:
.loc 2 1910 9 is_stmt 1 view .LVU2618
# xxh3.h:1910: xxh_u64 const high64 = XXH3_mergeAccs(acc, secret + secretSize - sizeof(acc) - XXH_SECRET_MERGEACCS_START, ~((xxh_u64)len * PRIME64_2));
.loc 2 1910 32 is_stmt 0 view .LVU2619
not r8 #
call XXH3_mergeAccs #
nop
.LVL488:
.loc 2 1911 9 is_stmt 1 view .LVU2620
.loc 2 1912 9 view .LVU2621
.LBE8818:
.LBE8827:
.LBE8836:
# xxh3.h:1924: }
.loc 2 1924 1 is_stmt 0 view .LVU2622
vmovaps xmm6, XMMWORD PTR 112[rsp] #,
.LBB8837:
.LBB8828:
.LBB8819:
# xxh3.h:1912: return h128;
.loc 2 1912 16 view .LVU2623
mov QWORD PTR 0[r13], rsi # MEM[(struct *)&<retval>], low64
mov QWORD PTR 8[r13], rax # MEM[(struct *)&<retval> + 8B], tmp352
.LVL489:
.loc 2 1912 16 view .LVU2624
.LBE8819:
.LBE8828:
.LBE8837:
# xxh3.h:1924: }
.loc 2 1924 1 view .LVU2625
mov rax, r13 #, .result_ptr
add rsp, 136 #,
.cfi_restore 23
.cfi_def_cfa_offset 40
pop rbx #
.cfi_restore 3
.cfi_def_cfa_offset 32
.LVL490:
.loc 2 1924 1 view .LVU2626
pop rsi #
.cfi_restore 4
.cfi_def_cfa_offset 24
pop r12 #
.cfi_restore 12
.cfi_def_cfa_offset 16
pop r13 #
.cfi_restore 13
.cfi_def_cfa_offset 8
.LVL491:
.loc 2 1924 1 view .LVU2627
ret
.cfi_endproc
.LFE5366:
.seh_endproc
.p2align 4
.def XXH3_hashLong_128b_withSecret; .scl 3; .type 32; .endef
.seh_proc XXH3_hashLong_128b_withSecret
XXH3_hashLong_128b_withSecret:
.LVL492:
.LFB5367:
.loc 2 1933 1 is_stmt 1 view -0
.cfi_startproc
.loc 2 1933 1 is_stmt 0 view .LVU2629
push r15 #
.seh_pushreg r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14 #
.seh_pushreg r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13 #
.seh_pushreg r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12 #
.seh_pushreg r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp #
.seh_pushreg rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rdi #
.seh_pushreg rdi
.cfi_def_cfa_offset 56
.cfi_offset 5, -56
push rsi #
.seh_pushreg rsi
.cfi_def_cfa_offset 64
.cfi_offset 4, -64
push rbx #
.seh_pushreg rbx
.cfi_def_cfa_offset 72
.cfi_offset 3, -72
sub rsp, 152 #,
.seh_stackalloc 152
.cfi_def_cfa_offset 224
vmovaps XMMWORD PTR 128[rsp], xmm6 #,
.seh_savexmm xmm6, 128
.cfi_offset 23, -96
.seh_endprologue
.loc 2 1934 5 is_stmt 1 view .LVU2630
.LBB8838:
.LBB8839:
# xxh3.h:1902: XXH_ALIGN(XXH_ACC_ALIGN) xxh_u64 acc[ACC_NB] = XXH3_INIT_ACC;
.loc 2 1902 38 is_stmt 0 view .LVU2631
mov eax, 3266489917 # tmp428,
.LBE8839:
.LBE8838:
# xxh3.h:1933: {
.loc 2 1933 1 view .LVU2632
lea r12, 79[rsp] # tmp265,
mov rbx, r8 # len, tmp388
mov rdi, rdx # input, tmp387
.LVL493:
.LBB9093:
.LBI8838:
.loc 2 1899 1 is_stmt 1 view .LVU2633
.LBB9085:
.loc 2 1902 5 view .LVU2634
xor edx, edx # tmp279
.LVL494:
.loc 2 1902 5 is_stmt 0 view .LVU2635
.LBE9085:
.LBE9093:
# xxh3.h:1933: {
.loc 2 1933 1 view .LVU2636
and r12, -32 # tmp267,
mov r13, rcx # .result_ptr, tmp386
mov rsi, r9 # secret, tmp389
.LBB9094:
.LBB9086:
# xxh3.h:1902: XXH_ALIGN(XXH_ACC_ALIGN) xxh_u64 acc[ACC_NB] = XXH3_INIT_ACC;
.loc 2 1902 38 view .LVU2637
mov QWORD PTR [r12], rax # acc, tmp428
movabs rax, -7046029288634856825 # tmp429,
mov QWORD PTR 8[r12], rax # acc, tmp429
movabs rax, -4417276706812531889 # tmp430,
mov QWORD PTR 16[r12], rax # acc, tmp430
movabs rax, 1609587929392839161 # tmp431,
mov QWORD PTR 24[r12], rax # acc, tmp431
movabs rax, -8796714831421723037 # tmp432,
mov QWORD PTR 32[r12], rax # acc, tmp432
mov eax, 2246822519 # tmp433,
mov QWORD PTR 40[r12], rax # acc, tmp433
movabs rax, 2870177450012600261 # tmp434,
mov QWORD PTR 48[r12], rax # acc, tmp434
mov eax, 2654435761 # tmp435,
mov QWORD PTR 56[r12], rax # acc, tmp435
.loc 2 1902 65 is_stmt 1 view .LVU2638
.loc 2 1904 5 view .LVU2639
.LVL495:
.LBB8840:
.LBI8840:
.loc 2 1290 1 view .LVU2640
.LBB8841:
.loc 2 1295 5 view .LVU2641
# xxh3.h:1295: size_t const nb_rounds = (secretSize - STRIPE_LEN) / XXH_SECRET_CONSUME_RATE;
.loc 2 1295 42 is_stmt 0 view .LVU2642
mov rax, QWORD PTR 256[rsp] # tmp436, secretSize
lea rbp, -64[rax] # _6,
mov rax, rbx # tmp278, len
# xxh3.h:1295: size_t const nb_rounds = (secretSize - STRIPE_LEN) / XXH_SECRET_CONSUME_RATE;
.loc 2 1295 18 view .LVU2643
shr rbp, 3 # nb_rounds,
.LVL496:
.loc 2 1296 5 is_stmt 1 view .LVU2644
# xxh3.h:1296: size_t const block_len = STRIPE_LEN * nb_rounds;
.loc 2 1296 18 is_stmt 0 view .LVU2645
mov r8, rbp # block_len, nb_rounds
.LVL497:
.loc 2 1296 18 view .LVU2646
sal r8, 6 # block_len,
.LVL498:
.loc 2 1297 5 is_stmt 1 view .LVU2647
div r8 # block_len
.LVL499:
.loc 2 1297 5 is_stmt 0 view .LVU2648
mov QWORD PTR 40[rsp], rdx # %sfp, tmp279
.LVL500:
.loc 2 1299 5 is_stmt 1 view .LVU2649
.loc 2 1301 5 view .LVU2650
.loc 2 1303 5 view .LVU2651
.loc 2 1303 17 view .LVU2652
# xxh3.h:1303: for (n = 0; n < nb_blocks; n++) {
.loc 2 1303 5 is_stmt 0 view .LVU2653
cmp rbx, r8 # len, block_len
jb .L128 #,
mov rdx, QWORD PTR 256[rsp] # tmp440, secretSize
lea r14, 32[r9] # ivtmp.458,
vmovdqa ymm3, YMMWORD PTR [r12] # acc__lsm.435, MEM[(__m256i * {ref-all})&acc]
# xxh3.h:1303: for (n = 0; n < nb_blocks; n++) {
.loc 2 1303 12 view .LVU2654
xor r11d, r11d # n
vmovdqa ymm2, YMMWORD PTR 32[r12] # acc__lsm.437, MEM[(__m256i * {ref-all})&acc + 32B]
vmovdqa ymm4, YMMWORD PTR .LC1[rip] # tmp384,
lea r10, [r14+rbp*8] # _79,
lea r15, 384[rdi] # tmp385,
vmovdqu ymm6, YMMWORD PTR -64[r9+rdx] # _26, MEM[(const __m256i_u * {ref-all})_23]
vmovdqu ymm5, YMMWORD PTR -32[r9+rdx] # _31, MEM[(const __m256i_u * {ref-all})_28]
# xxh3.h:1303: for (n = 0; n < nb_blocks; n++) {
.loc 2 1303 5 view .LVU2655
xor r9d, r9d # ivtmp.467
.LVL501:
.p2align 4,,10
.p2align 3
.L131:
.loc 2 1304 9 is_stmt 1 view .LVU2656
.LBB8842:
.LBI8842:
.loc 2 1272 1 view .LVU2657
.LBB8843:
.loc 2 1278 5 view .LVU2658
.loc 2 1279 5 view .LVU2659
.loc 2 1279 17 view .LVU2660
# xxh3.h:1279: for (n = 0; n < nbStripes; n++ ) {
.loc 2 1279 5 is_stmt 0 view .LVU2661
test rbp, rbp # nb_rounds
je .L129 #,
lea rcx, [r15+r9] # ivtmp.454,
mov rdx, r14 # ivtmp.458, ivtmp.458
.LVL502:
.p2align 4,,10
.p2align 3
.L130:
.LBB8844:
.loc 2 1280 9 is_stmt 1 view .LVU2662
.loc 2 1281 9 view .LVU2663
.LBB8845:
.LBB8846:
.LBB8847:
.LBB8848:
.LBB8849:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU2664
vmovdqu ymm1, YMMWORD PTR -32[rdx] # tmp442, MEM[base: _83, offset: -32B]
vpxor ymm0, ymm1, YMMWORD PTR -384[rcx] # tmp287, tmp442, MEM[base: _16, offset: -384B]
add rdx, 8 # ivtmp.458,
.LBE8849:
.LBE8848:
.LBE8847:
.LBE8846:
.LBE8845:
# xxh3.h:1281: XXH_PREFETCH(in + XXH_PREFETCH_DIST);
.loc 2 1281 9 view .LVU2665
prefetcht0 [rcx] # ivtmp.454
.loc 2 1282 9 is_stmt 1 view .LVU2666
.LVL503:
.LBB8896:
.LBI8845:
.loc 2 921 1 view .LVU2667
.LBE8896:
.LBE8844:
.LBE8843:
.LBE8842:
.LBE8841:
.LBE8840:
.LBE9086:
.LBE9094:
.loc 2 928 5 view .LVU2668
.LBB9095:
.LBB9087:
.LBB9077:
.LBB9072:
.LBB8900:
.LBB8899:
.LBB8898:
.LBB8897:
.LBB8895:
.loc 2 929 9 view .LVU2669
.loc 2 932 9 view .LVU2670
.loc 2 935 9 view .LVU2671
.loc 2 937 9 view .LVU2672
.loc 2 938 9 view .LVU2673
.loc 2 938 19 view .LVU2674
.LBB8893:
.loc 2 940 13 view .LVU2675
.LBB8854:
.LBI8854:
.loc 4 919 1 view .LVU2676
.LBB8855:
.loc 4 921 3 view .LVU2677
.loc 4 921 3 is_stmt 0 view .LVU2678
.LBE8855:
.LBE8854:
.loc 2 942 13 is_stmt 1 view .LVU2679
.LBB8857:
.LBI8857:
.loc 4 919 1 view .LVU2680
.LBB8858:
.loc 4 921 3 view .LVU2681
.LBE8858:
.LBE8857:
.loc 2 944 13 view .LVU2682
.LBB8860:
.LBI8848:
.loc 3 913 1 view .LVU2683
.LBB8850:
.loc 3 915 3 view .LVU2684
.loc 3 915 3 is_stmt 0 view .LVU2685
.LBE8850:
.LBE8860:
.loc 2 946 13 is_stmt 1 view .LVU2686
.LBB8861:
.LBI8861:
.loc 3 597 1 view .LVU2687
.LBB8862:
.loc 3 599 3 view .LVU2688
add rcx, 64 # ivtmp.454,
.LVL504:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 is_stmt 0 view .LVU2689
vpshufd ymm1, ymm0, 49 # tmp288, tmp287,
.LVL505:
.loc 3 599 19 view .LVU2690
.LBE8862:
.LBE8861:
.loc 2 948 13 is_stmt 1 view .LVU2691
.LBB8865:
.LBI8865:
.loc 3 567 1 view .LVU2692
.LBB8866:
.loc 3 569 3 view .LVU2693
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU2694
vpmuludq ymm0, ymm0, ymm1 # tmp290, tmp287, tmp288
.LVL506:
.loc 3 569 19 view .LVU2695
.LBE8866:
.LBE8865:
.loc 2 949 13 is_stmt 1 view .LVU2696
.LBB8868:
.loc 2 951 17 view .LVU2697
.LBB8869:
.LBI8869:
.loc 3 597 1 view .LVU2698
.LBB8870:
.loc 3 599 3 view .LVU2699
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 is_stmt 0 view .LVU2700
vpshufd ymm1, YMMWORD PTR -448[rcx], 78 # tmp291, MEM[base: _16, offset: -384B],
.LVL507:
.loc 3 599 19 view .LVU2701
.LBE8870:
.LBE8869:
.loc 2 952 17 is_stmt 1 view .LVU2702
.LBB8872:
.LBI8872:
.loc 3 126 1 view .LVU2703
.LBB8873:
.loc 3 128 3 view .LVU2704
.loc 3 128 3 is_stmt 0 view .LVU2705
.LBE8873:
.LBE8872:
.loc 2 954 17 is_stmt 1 view .LVU2706
.LBB8875:
.LBI8875:
.loc 3 126 1 view .LVU2707
.LBB8876:
.loc 3 128 3 view .LVU2708
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 is_stmt 0 view .LVU2709
vpaddq ymm0, ymm0, ymm1 # tmp293, tmp290, tmp291
.LVL508:
.loc 3 128 33 view .LVU2710
.LBE8876:
.LBE8875:
.LBE8868:
.LBB8883:
.LBB8851:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 view .LVU2711
vmovdqu ymm1, YMMWORD PTR -8[rdx] # tmp443, MEM[base: _83, offset: 0B]
.LVL509:
.loc 3 915 33 view .LVU2712
.LBE8851:
.LBE8883:
.LBB8884:
.LBB8879:
.LBB8877:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 view .LVU2713
vpaddq ymm3, ymm0, ymm3 # acc__lsm.435, tmp293, acc__lsm.435
.loc 3 128 33 view .LVU2714
.LBE8877:
.LBE8879:
.LBE8884:
.LBE8893:
.loc 2 938 51 is_stmt 1 view .LVU2715
.LVL510:
.loc 2 938 19 view .LVU2716
.LBB8894:
.loc 2 940 13 view .LVU2717
.LBB8885:
.loc 4 919 1 view .LVU2718
.LBB8856:
.loc 4 921 3 view .LVU2719
.loc 4 921 3 is_stmt 0 view .LVU2720
.LBE8856:
.LBE8885:
.loc 2 942 13 is_stmt 1 view .LVU2721
.LBB8886:
.loc 4 919 1 view .LVU2722
.LBB8859:
.loc 4 921 3 view .LVU2723
.LBE8859:
.LBE8886:
.loc 2 944 13 view .LVU2724
.LBB8887:
.loc 3 913 1 view .LVU2725
.LBB8852:
.loc 3 915 3 view .LVU2726
.loc 3 915 3 is_stmt 0 view .LVU2727
.LBE8852:
.LBE8887:
.loc 2 946 13 is_stmt 1 view .LVU2728
.LBB8888:
.loc 3 597 1 view .LVU2729
.LBB8863:
.loc 3 599 3 view .LVU2730
.LBE8863:
.LBE8888:
.LBB8889:
.LBB8853:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU2731
vpxor ymm0, ymm1, YMMWORD PTR -416[rcx] # tmp297, tmp443, MEM[base: _16, offset: -352B]
.LBE8853:
.LBE8889:
.LBB8890:
.LBB8864:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 view .LVU2732
vpshufd ymm1, ymm0, 49 # tmp298, tmp297,
.LVL511:
.loc 3 599 19 view .LVU2733
.LBE8864:
.LBE8890:
.loc 2 948 13 is_stmt 1 view .LVU2734
.LBB8891:
.loc 3 567 1 view .LVU2735
.LBB8867:
.loc 3 569 3 view .LVU2736
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU2737
vpmuludq ymm0, ymm0, ymm1 # tmp300, tmp297, tmp298
.LVL512:
.loc 3 569 19 view .LVU2738
.LBE8867:
.LBE8891:
.loc 2 949 13 is_stmt 1 view .LVU2739
.LBB8892:
.loc 2 951 17 view .LVU2740
.LBB8880:
.loc 3 597 1 view .LVU2741
.LBB8871:
.loc 3 599 3 view .LVU2742
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 is_stmt 0 view .LVU2743
vpshufd ymm1, YMMWORD PTR -416[rcx], 78 # tmp301, MEM[base: _16, offset: -352B],
.LVL513:
.loc 3 599 19 view .LVU2744
.LBE8871:
.LBE8880:
.loc 2 952 17 is_stmt 1 view .LVU2745
.LBB8881:
.loc 3 126 1 view .LVU2746
.LBB8874:
.loc 3 128 3 view .LVU2747
.loc 3 128 3 is_stmt 0 view .LVU2748
.LBE8874:
.LBE8881:
.loc 2 954 17 is_stmt 1 view .LVU2749
.LBB8882:
.loc 3 126 1 view .LVU2750
.LBB8878:
.loc 3 128 3 view .LVU2751
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 is_stmt 0 view .LVU2752
vpaddq ymm0, ymm0, ymm1 # tmp303, tmp300, tmp301
.LVL514:
.loc 3 128 33 view .LVU2753
vpaddq ymm2, ymm0, ymm2 # acc__lsm.437, tmp303, acc__lsm.437
.LVL515:
.loc 3 128 33 view .LVU2754
.LBE8878:
.LBE8882:
.LBE8892:
.LBE8894:
.loc 2 938 51 is_stmt 1 view .LVU2755
.loc 2 938 19 view .LVU2756
.loc 2 938 19 is_stmt 0 view .LVU2757
.LBE8895:
.LBE8897:
.LBE8898:
.loc 2 1279 32 is_stmt 1 view .LVU2758
.loc 2 1279 17 view .LVU2759
# xxh3.h:1279: for (n = 0; n < nbStripes; n++ ) {
.loc 2 1279 5 is_stmt 0 view .LVU2760
cmp r10, rdx # _79, ivtmp.458
jne .L130 #,
.LVL516:
.L129:
.loc 2 1279 5 view .LVU2761
.LBE8899:
.LBE8900:
.LBB8901:
.LBB8902:
.loc 2 1123 19 is_stmt 1 view .LVU2762
.LBB8903:
.loc 2 1125 13 view .LVU2763
.loc 2 1126 13 view .LVU2764
.LBB8904:
.LBI8904:
.loc 3 787 1 view .LVU2765
.LBB8905:
.loc 3 789 3 view .LVU2766
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:789: return (__m256i)__builtin_ia32_psrlqi256 ((__v4di)__A, __B);
.loc 3 789 19 is_stmt 0 view .LVU2767
vpsrlq ymm0, ymm3, 47 # tmp305, acc__lsm.435,
.LVL517:
.loc 3 789 19 view .LVU2768
.LBE8905:
.LBE8904:
.loc 2 1127 13 is_stmt 1 view .LVU2769
.LBB8907:
.LBI8907:
.loc 3 913 1 view .LVU2770
.LBB8908:
.loc 3 915 3 view .LVU2771
.loc 3 915 3 is_stmt 0 view .LVU2772
.LBE8908:
.LBE8907:
.loc 2 1129 13 is_stmt 1 view .LVU2773
.loc 2 1129 13 is_stmt 0 view .LVU2774
.LBE8903:
.LBE8902:
.LBE8901:
.LBE9072:
.LBE9077:
.LBE9087:
.LBE9095:
.loc 4 921 3 is_stmt 1 view .LVU2775
.LBB9096:
.LBB9088:
.LBB9078:
.LBB9073:
.LBB8951:
.LBB8948:
.LBB8944:
.loc 2 1130 13 view .LVU2776
.LBB8910:
.LBI8910:
.loc 3 913 1 view .LVU2777
.LBB8911:
.loc 3 915 3 view .LVU2778
.loc 3 915 3 is_stmt 0 view .LVU2779
.LBE8911:
.LBE8910:
.loc 2 1133 13 is_stmt 1 view .LVU2780
.LBB8915:
.LBI8915:
.loc 3 597 1 view .LVU2781
.LBB8916:
.loc 3 599 3 view .LVU2782
.LBE8916:
.LBE8915:
.LBE8944:
.LBE8948:
.LBE8951:
# xxh3.h:1303: for (n = 0; n < nb_blocks; n++) {
.loc 2 1303 33 is_stmt 0 view .LVU2783
add r11, 1 # n,
.LVL518:
.loc 2 1303 33 view .LVU2784
add r9, r8 # ivtmp.467, block_len
.LBB8952:
.LBB8949:
.LBB8945:
.LBB8920:
.LBB8912:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 view .LVU2785
vpxor ymm3, ymm3, ymm0 # tmp307, acc__lsm.435, tmp305
.LVL519:
.loc 3 915 33 view .LVU2786
vpxor ymm3, ymm3, ymm6 # tmp308, tmp307, _26
.LVL520:
.loc 3 915 33 view .LVU2787
.LBE8912:
.LBE8920:
.LBB8921:
.LBB8917:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 view .LVU2788
vpshufd ymm0, ymm3, 49 # tmp309, tmp308,
.LVL521:
.loc 3 599 19 view .LVU2789
.LBE8917:
.LBE8921:
.loc 2 1134 13 is_stmt 1 view .LVU2790
.LBB8922:
.LBI8922:
.loc 3 567 1 view .LVU2791
.LBB8923:
.loc 3 569 3 view .LVU2792
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU2793
vpmuludq ymm3, ymm3, ymm4 # tmp311, tmp308, tmp384
.LVL522:
.loc 3 569 19 view .LVU2794
.LBE8923:
.LBE8922:
.loc 2 1135 13 is_stmt 1 view .LVU2795
.LBB8925:
.LBI8925:
.loc 3 567 1 view .LVU2796
.LBB8926:
.loc 3 569 3 view .LVU2797
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU2798
vpmuludq ymm0, ymm0, ymm4 # tmp313, tmp309, tmp384
.LVL523:
.loc 3 569 19 view .LVU2799
.LBE8926:
.LBE8925:
.loc 2 1136 13 is_stmt 1 view .LVU2800
.LBB8928:
.LBI8928:
.loc 3 696 1 view .LVU2801
.LBB8929:
.loc 3 698 3 view .LVU2802
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:698: return (__m256i)__builtin_ia32_psllqi256 ((__v4di)__A, __B);
.loc 3 698 19 is_stmt 0 view .LVU2803
vpsllq ymm0, ymm0, 32 # tmp315, tmp313,
.LVL524:
.loc 3 698 19 view .LVU2804
.LBE8929:
.LBE8928:
.LBB8931:
.LBI8931:
.loc 3 126 1 is_stmt 1 view .LVU2805
.LBB8932:
.loc 3 128 3 view .LVU2806
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 is_stmt 0 view .LVU2807
vpaddq ymm3, ymm3, ymm0 # acc__lsm.435, tmp311, tmp315
.LVL525:
.loc 3 128 33 view .LVU2808
.LBE8932:
.LBE8931:
.LBE8945:
.loc 2 1123 51 is_stmt 1 view .LVU2809
.loc 2 1123 19 view .LVU2810
.LBB8946:
.loc 2 1125 13 view .LVU2811
.loc 2 1126 13 view .LVU2812
.LBB8934:
.loc 3 787 1 view .LVU2813
.LBB8906:
.loc 3 789 3 view .LVU2814
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:789: return (__m256i)__builtin_ia32_psrlqi256 ((__v4di)__A, __B);
.loc 3 789 19 is_stmt 0 view .LVU2815
vpsrlq ymm0, ymm2, 47 # tmp318, acc__lsm.437,
.LVL526:
.loc 3 789 19 view .LVU2816
.LBE8906:
.LBE8934:
.loc 2 1127 13 is_stmt 1 view .LVU2817
.LBB8935:
.loc 3 913 1 view .LVU2818
.LBB8909:
.loc 3 915 3 view .LVU2819
.loc 3 915 3 is_stmt 0 view .LVU2820
.LBE8909:
.LBE8935:
.loc 2 1129 13 is_stmt 1 view .LVU2821
.loc 2 1129 13 is_stmt 0 view .LVU2822
.LBE8946:
.LBE8949:
.LBE8952:
.LBE9073:
.LBE9078:
.LBE9088:
.LBE9096:
.loc 4 921 3 is_stmt 1 view .LVU2823
.LBB9097:
.LBB9089:
.LBB9079:
.LBB9074:
.LBB8953:
.LBB8950:
.LBB8947:
.loc 2 1130 13 view .LVU2824
.LBB8936:
.loc 3 913 1 view .LVU2825
.LBB8913:
.loc 3 915 3 view .LVU2826
.loc 3 915 3 is_stmt 0 view .LVU2827
.LBE8913:
.LBE8936:
.loc 2 1133 13 is_stmt 1 view .LVU2828
.LBB8937:
.loc 3 597 1 view .LVU2829
.LBB8918:
.loc 3 599 3 view .LVU2830
.LBE8918:
.LBE8937:
.LBB8938:
.LBB8914:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU2831
vpxor ymm2, ymm2, ymm0 # tmp320, acc__lsm.437, tmp318
.LVL527:
.loc 3 915 33 view .LVU2832
vpxor ymm2, ymm2, ymm5 # tmp321, tmp320, _31
.LVL528:
.loc 3 915 33 view .LVU2833
.LBE8914:
.LBE8938:
.LBB8939:
.LBB8919:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 view .LVU2834
vpshufd ymm0, ymm2, 49 # tmp322, tmp321,
.LVL529:
.loc 3 599 19 view .LVU2835
.LBE8919:
.LBE8939:
.loc 2 1134 13 is_stmt 1 view .LVU2836
.LBB8940:
.loc 3 567 1 view .LVU2837
.LBB8924:
.loc 3 569 3 view .LVU2838
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU2839
vpmuludq ymm2, ymm2, ymm4 # tmp324, tmp321, tmp384
.LVL530:
.loc 3 569 19 view .LVU2840
.LBE8924:
.LBE8940:
.loc 2 1135 13 is_stmt 1 view .LVU2841
.LBB8941:
.loc 3 567 1 view .LVU2842
.LBB8927:
.loc 3 569 3 view .LVU2843
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU2844
vpmuludq ymm0, ymm0, ymm4 # tmp326, tmp322, tmp384
.LVL531:
.loc 3 569 19 view .LVU2845
.LBE8927:
.LBE8941:
.loc 2 1136 13 is_stmt 1 view .LVU2846
.LBB8942:
.loc 3 696 1 view .LVU2847
.LBB8930:
.loc 3 698 3 view .LVU2848
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:698: return (__m256i)__builtin_ia32_psllqi256 ((__v4di)__A, __B);
.loc 3 698 19 is_stmt 0 view .LVU2849
vpsllq ymm0, ymm0, 32 # tmp328, tmp326,
.LVL532:
.loc 3 698 19 view .LVU2850
.LBE8930:
.LBE8942:
.LBB8943:
.loc 3 126 1 is_stmt 1 view .LVU2851
.LBB8933:
.loc 3 128 3 view .LVU2852
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 is_stmt 0 view .LVU2853
vpaddq ymm2, ymm2, ymm0 # acc__lsm.437, tmp324, tmp328
.LVL533:
.loc 3 128 33 view .LVU2854
.LBE8933:
.LBE8943:
.LBE8947:
.loc 2 1123 51 is_stmt 1 view .LVU2855
.loc 2 1123 19 view .LVU2856
.loc 2 1123 19 is_stmt 0 view .LVU2857
.LBE8950:
.LBE8953:
.loc 2 1303 32 is_stmt 1 view .LVU2858
.loc 2 1303 17 view .LVU2859
# xxh3.h:1303: for (n = 0; n < nb_blocks; n++) {
.loc 2 1303 5 is_stmt 0 view .LVU2860
cmp rax, r11 # tmp278, n
ja .L131 #,
vmovdqa YMMWORD PTR [r12], ymm3 # MEM[(__m256i * {ref-all})&acc], acc__lsm.435
.LVL534:
.loc 2 1303 5 view .LVU2861
vmovdqa YMMWORD PTR 32[r12], ymm2 # MEM[(__m256i * {ref-all})&acc + 32B], acc__lsm.437
.LVL535:
.L128:
.loc 2 1309 5 is_stmt 1 view .LVU2862
.LBB8954:
.loc 2 1310 9 view .LVU2863
.loc 2 1311 9 view .LVU2864
.loc 2 1312 9 view .LVU2865
.LBB8955:
.LBB8956:
# xxh3.h:1279: for (n = 0; n < nbStripes; n++ ) {
.loc 2 1279 5 is_stmt 0 view .LVU2866
mov rcx, QWORD PTR 40[rsp] # tmp279, %sfp
.LBE8956:
.LBE8955:
# xxh3.h:1310: { size_t const nbStripes = (len - (block_len * nb_blocks)) / STRIPE_LEN;
.loc 2 1310 52 view .LVU2867
imul rax, r8 # _67, block_len
.LVL536:
.LBB9013:
.LBI8955:
.loc 2 1272 1 is_stmt 1 view .LVU2868
.LBB9011:
.loc 2 1278 5 view .LVU2869
.loc 2 1279 5 view .LVU2870
.loc 2 1279 17 view .LVU2871
# xxh3.h:1279: for (n = 0; n < nbStripes; n++ ) {
.loc 2 1279 5 is_stmt 0 view .LVU2872
shr rcx, 6 # tmp279,
.LVL537:
.loc 2 1279 5 view .LVU2873
je .L132 #,
lea rdx, 384[rdi+rax] # ivtmp.443,
vmovdqa ymm3, YMMWORD PTR [r12] # acc__lsm.431, MEM[(__m256i * {ref-all})&acc]
lea rax, 32[rsi] # ivtmp.447,
.LVL538:
.loc 2 1279 5 view .LVU2874
vmovdqa ymm2, YMMWORD PTR 32[r12] # acc__lsm.433, MEM[(__m256i * {ref-all})&acc + 32B]
lea rcx, [rax+rcx*8] # _96,
.LVL539:
.p2align 4,,10
.p2align 3
.L133:
.LBB8957:
.loc 2 1280 9 is_stmt 1 view .LVU2875
.loc 2 1281 9 view .LVU2876
.LBB8958:
.LBB8959:
.LBB8960:
.LBB8961:
.LBB8962:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU2877
vmovdqu ymm5, YMMWORD PTR -32[rax] # tmp445, MEM[base: _121, offset: -32B]
vmovdqu ymm6, YMMWORD PTR [rax] # tmp446, MEM[base: _121, offset: 0B]
add rax, 8 # ivtmp.447,
.LBE8962:
.LBE8961:
.LBE8960:
.LBE8959:
.LBE8958:
# xxh3.h:1281: XXH_PREFETCH(in + XXH_PREFETCH_DIST);
.loc 2 1281 9 view .LVU2878
prefetcht0 [rdx] # ivtmp.443
.loc 2 1282 9 is_stmt 1 view .LVU2879
.LVL540:
.LBB9008:
.LBI8958:
.loc 2 921 1 view .LVU2880
.LBE9008:
.LBE8957:
.LBE9011:
.LBE9013:
.LBE8954:
.LBE9074:
.LBE9079:
.LBE9089:
.LBE9097:
.loc 2 928 5 view .LVU2881
.LBB9098:
.LBB9090:
.LBB9080:
.LBB9075:
.LBB9070:
.LBB9014:
.LBB9012:
.LBB9010:
.LBB9009:
.LBB9007:
.loc 2 929 9 view .LVU2882
.loc 2 932 9 view .LVU2883
.loc 2 935 9 view .LVU2884
.loc 2 937 9 view .LVU2885
.loc 2 938 9 view .LVU2886
.loc 2 938 19 view .LVU2887
.LBB9005:
.loc 2 940 13 view .LVU2888
.LBB8967:
.LBI8967:
.loc 4 919 1 view .LVU2889
.LBB8968:
.loc 4 921 3 view .LVU2890
.loc 4 921 3 is_stmt 0 view .LVU2891
.LBE8968:
.LBE8967:
.loc 2 942 13 is_stmt 1 view .LVU2892
.LBB8970:
.LBI8970:
.loc 4 919 1 view .LVU2893
.LBB8971:
.loc 4 921 3 view .LVU2894
.LBE8971:
.LBE8970:
.loc 2 944 13 view .LVU2895
.LBB8973:
.LBI8961:
.loc 3 913 1 view .LVU2896
.LBB8963:
.loc 3 915 3 view .LVU2897
.loc 3 915 3 is_stmt 0 view .LVU2898
.LBE8963:
.LBE8973:
.loc 2 946 13 is_stmt 1 view .LVU2899
.LBB8974:
.LBI8974:
.loc 3 597 1 view .LVU2900
.LBB8975:
.loc 3 599 3 view .LVU2901
.LBE8975:
.LBE8974:
.LBB8979:
.LBB8964:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU2902
vpxor ymm0, ymm5, YMMWORD PTR -384[rdx] # tmp336, tmp445, MEM[base: _74, offset: -384B]
add rdx, 64 # ivtmp.443,
.LVL541:
.loc 3 915 33 view .LVU2903
.LBE8964:
.LBE8979:
.LBB8980:
.LBB8976:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 view .LVU2904
vpshufd ymm1, ymm0, 49 # tmp337, tmp336,
.LVL542:
.loc 3 599 19 view .LVU2905
.LBE8976:
.LBE8980:
.loc 2 948 13 is_stmt 1 view .LVU2906
.LBB8981:
.LBI8981:
.loc 3 567 1 view .LVU2907
.LBB8982:
.loc 3 569 3 view .LVU2908
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU2909
vpmuludq ymm0, ymm0, ymm1 # tmp339, tmp336, tmp337
.LVL543:
.loc 3 569 19 view .LVU2910
.LBE8982:
.LBE8981:
.loc 2 949 13 is_stmt 1 view .LVU2911
.LBB8984:
.loc 2 951 17 view .LVU2912
.LBB8985:
.LBI8985:
.loc 3 597 1 view .LVU2913
.LBB8986:
.loc 3 599 3 view .LVU2914
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 is_stmt 0 view .LVU2915
vpshufd ymm1, YMMWORD PTR -448[rdx], 78 # tmp340, MEM[base: _74, offset: -384B],
.LVL544:
.loc 3 599 19 view .LVU2916
.LBE8986:
.LBE8985:
.loc 2 952 17 is_stmt 1 view .LVU2917
.LBB8988:
.LBI8988:
.loc 3 126 1 view .LVU2918
.LBB8989:
.loc 3 128 3 view .LVU2919
.loc 3 128 3 is_stmt 0 view .LVU2920
.LBE8989:
.LBE8988:
.loc 2 954 17 is_stmt 1 view .LVU2921
.LBB8991:
.LBI8991:
.loc 3 126 1 view .LVU2922
.LBB8992:
.loc 3 128 3 view .LVU2923
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 is_stmt 0 view .LVU2924
vpaddq ymm0, ymm0, ymm1 # tmp342, tmp339, tmp340
.LVL545:
.loc 3 128 33 view .LVU2925
vpaddq ymm3, ymm0, ymm3 # acc__lsm.431, tmp342, acc__lsm.431
.LVL546:
.loc 3 128 33 view .LVU2926
.LBE8992:
.LBE8991:
.LBE8984:
.LBE9005:
.loc 2 938 51 is_stmt 1 view .LVU2927
.loc 2 938 19 view .LVU2928
.LBB9006:
.loc 2 940 13 view .LVU2929
.LBB8997:
.loc 4 919 1 view .LVU2930
.LBB8969:
.loc 4 921 3 view .LVU2931
.loc 4 921 3 is_stmt 0 view .LVU2932
.LBE8969:
.LBE8997:
.loc 2 942 13 is_stmt 1 view .LVU2933
.LBB8998:
.loc 4 919 1 view .LVU2934
.LBB8972:
.loc 4 921 3 view .LVU2935
.LBE8972:
.LBE8998:
.loc 2 944 13 view .LVU2936
.LBB8999:
.loc 3 913 1 view .LVU2937
.LBB8965:
.loc 3 915 3 view .LVU2938
.loc 3 915 3 is_stmt 0 view .LVU2939
.LBE8965:
.LBE8999:
.loc 2 946 13 is_stmt 1 view .LVU2940
.LBB9000:
.loc 3 597 1 view .LVU2941
.LBB8977:
.loc 3 599 3 view .LVU2942
.LBE8977:
.LBE9000:
.LBB9001:
.LBB8966:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU2943
vpxor ymm0, ymm6, YMMWORD PTR -416[rdx] # tmp346, tmp446, MEM[base: _74, offset: -352B]
.LBE8966:
.LBE9001:
.LBB9002:
.LBB8978:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 view .LVU2944
vpshufd ymm1, ymm0, 49 # tmp347, tmp346,
.LVL547:
.loc 3 599 19 view .LVU2945
.LBE8978:
.LBE9002:
.loc 2 948 13 is_stmt 1 view .LVU2946
.LBB9003:
.loc 3 567 1 view .LVU2947
.LBB8983:
.loc 3 569 3 view .LVU2948
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU2949
vpmuludq ymm0, ymm0, ymm1 # tmp349, tmp346, tmp347
.LVL548:
.loc 3 569 19 view .LVU2950
.LBE8983:
.LBE9003:
.loc 2 949 13 is_stmt 1 view .LVU2951
.LBB9004:
.loc 2 951 17 view .LVU2952
.LBB8994:
.loc 3 597 1 view .LVU2953
.LBB8987:
.loc 3 599 3 view .LVU2954
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 is_stmt 0 view .LVU2955
vpshufd ymm1, YMMWORD PTR -416[rdx], 78 # tmp350, MEM[base: _74, offset: -352B],
.LVL549:
.loc 3 599 19 view .LVU2956
.LBE8987:
.LBE8994:
.loc 2 952 17 is_stmt 1 view .LVU2957
.LBB8995:
.loc 3 126 1 view .LVU2958
.LBB8990:
.loc 3 128 3 view .LVU2959
.loc 3 128 3 is_stmt 0 view .LVU2960
.LBE8990:
.LBE8995:
.loc 2 954 17 is_stmt 1 view .LVU2961
.LBB8996:
.loc 3 126 1 view .LVU2962
.LBB8993:
.loc 3 128 3 view .LVU2963
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 is_stmt 0 view .LVU2964
vpaddq ymm0, ymm0, ymm1 # tmp352, tmp349, tmp350
.LVL550:
.loc 3 128 33 view .LVU2965
vpaddq ymm2, ymm0, ymm2 # acc__lsm.433, tmp352, acc__lsm.433
.LVL551:
.loc 3 128 33 view .LVU2966
.LBE8993:
.LBE8996:
.LBE9004:
.LBE9006:
.loc 2 938 51 is_stmt 1 view .LVU2967
.loc 2 938 19 view .LVU2968
.loc 2 938 19 is_stmt 0 view .LVU2969
.LBE9007:
.LBE9009:
.LBE9010:
.loc 2 1279 32 is_stmt 1 view .LVU2970
.loc 2 1279 17 view .LVU2971
# xxh3.h:1279: for (n = 0; n < nbStripes; n++ ) {
.loc 2 1279 5 is_stmt 0 view .LVU2972
cmp rcx, rax # _96, ivtmp.447
jne .L133 #,
vmovdqa YMMWORD PTR [r12], ymm3 # MEM[(__m256i * {ref-all})&acc], acc__lsm.431
vmovdqa YMMWORD PTR 32[r12], ymm2 # MEM[(__m256i * {ref-all})&acc + 32B], acc__lsm.433
.LVL552:
.L132:
.loc 2 1279 5 view .LVU2973
.LBE9012:
.LBE9014:
.loc 2 1315 9 is_stmt 1 view .LVU2974
# xxh3.h:1315: if (len & (STRIPE_LEN - 1)) {
.loc 2 1315 12 is_stmt 0 view .LVU2975
test bl, 63 # len,
je .L134 #,
.LBB9015:
.loc 2 1316 13 is_stmt 1 view .LVU2976
.LVL553:
.loc 2 1319 13 view .LVU2977
.LBB9016:
.LBI9016:
.loc 2 921 1 view .LVU2978
.LBE9016:
.LBE9015:
.LBE9070:
.LBE9075:
.LBE9080:
.LBE9090:
.LBE9098:
.loc 2 928 5 view .LVU2979
.LBB9099:
.LBB9091:
.LBB9081:
.LBB9076:
.LBB9071:
.LBB9069:
.LBB9068:
.LBB9017:
.loc 2 929 9 view .LVU2980
.loc 2 932 9 view .LVU2981
.loc 2 935 9 view .LVU2982
.loc 2 937 9 view .LVU2983
.loc 2 938 9 view .LVU2984
.loc 2 938 19 view .LVU2985
.LBB9018:
.loc 2 940 13 view .LVU2986
.LBB9019:
.LBI9019:
.loc 4 919 1 view .LVU2987
.LBB9020:
.loc 4 921 3 view .LVU2988
.loc 4 921 3 is_stmt 0 view .LVU2989
.LBE9020:
.LBE9019:
.loc 2 942 13 is_stmt 1 view .LVU2990
.LBB9023:
.LBI9023:
.loc 4 919 1 view .LVU2991
.LBB9024:
.loc 4 921 3 view .LVU2992
.loc 4 921 3 is_stmt 0 view .LVU2993
.LBE9024:
.LBE9023:
.loc 2 944 13 is_stmt 1 view .LVU2994
.LBB9026:
.LBI9026:
.loc 3 913 1 view .LVU2995
.LBB9027:
.loc 3 915 3 view .LVU2996
.loc 3 915 3 is_stmt 0 view .LVU2997
.LBE9027:
.LBE9026:
.loc 2 946 13 is_stmt 1 view .LVU2998
.LBB9031:
.LBI9031:
.loc 3 597 1 view .LVU2999
.LBB9032:
.loc 3 599 3 view .LVU3000
.LBE9032:
.LBE9031:
.LBB9036:
.LBB9028:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU3001
mov rax, QWORD PTR 256[rsp] # tmp447, secretSize
vmovdqu ymm5, YMMWORD PTR -71[rsi+rax] # tmp448, MEM[(const __m256i_u * {ref-all})_167]
vpxor ymm0, ymm5, YMMWORD PTR -64[rdi+rbx] # tmp357, tmp448, MEM[(const __m256i_u * {ref-all})_164]
.LVL554:
.loc 3 915 33 view .LVU3002
.LBE9028:
.LBE9036:
.LBB9037:
.LBB9033:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 view .LVU3003
vpshufd ymm1, ymm0, 49 # tmp358, tmp357,
.LVL555:
.loc 3 599 19 view .LVU3004
.LBE9033:
.LBE9037:
.loc 2 948 13 is_stmt 1 view .LVU3005
.LBB9038:
.LBI9038:
.loc 3 567 1 view .LVU3006
.LBB9039:
.loc 3 569 3 view .LVU3007
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU3008
vpmuludq ymm0, ymm0, ymm1 # tmp360, tmp357, tmp358
.LVL556:
.loc 3 569 19 view .LVU3009
.LBE9039:
.LBE9038:
.loc 2 949 13 is_stmt 1 view .LVU3010
.LBB9041:
.loc 2 951 17 view .LVU3011
.LBB9042:
.LBI9042:
.loc 3 597 1 view .LVU3012
.LBB9043:
.loc 3 599 3 view .LVU3013
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 is_stmt 0 view .LVU3014
vpshufd ymm1, YMMWORD PTR -64[rdi+rbx], 78 # tmp361, MEM[(const __m256i_u * {ref-all})_164],
.LVL557:
.loc 3 599 19 view .LVU3015
.LBE9043:
.LBE9042:
.loc 2 952 17 is_stmt 1 view .LVU3016
.LBB9046:
.LBI9046:
.loc 3 126 1 view .LVU3017
.LBB9047:
.loc 3 128 3 view .LVU3018
.loc 3 128 3 is_stmt 0 view .LVU3019
.LBE9047:
.LBE9046:
.loc 2 954 17 is_stmt 1 view .LVU3020
.LBB9049:
.LBI9049:
.loc 3 126 1 view .LVU3021
.LBB9050:
.loc 3 128 3 view .LVU3022
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 is_stmt 0 view .LVU3023
vpaddq ymm0, ymm0, ymm1 # tmp363, tmp360, tmp361
.LVL558:
.loc 3 128 33 view .LVU3024
vpaddq ymm0, ymm0, YMMWORD PTR [r12] # tmp364, tmp363, MEM[(__m256i * {ref-all})&acc]
.LBE9050:
.LBE9049:
.LBE9041:
.LBB9056:
.LBB9021:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avxintrin.h:921: return *__P;
.loc 4 921 10 view .LVU3025
vmovdqu ymm1, YMMWORD PTR -32[rdi+rbx] # MEM[(const __m256i_u * {ref-all})_191], MEM[(const __m256i_u * {ref-all})_191]
.LVL559:
.loc 4 921 10 view .LVU3026
.LBE9021:
.LBE9056:
.LBB9057:
# xxh3.h:954: xacc[i] = _mm256_add_epi64(product, sum);
.loc 2 954 25 view .LVU3027
vmovdqa YMMWORD PTR [r12], ymm0 # MEM[(__m256i * {ref-all})&acc], tmp364
.loc 2 954 25 view .LVU3028
.LBE9057:
.LBE9018:
.loc 2 938 51 is_stmt 1 view .LVU3029
.LVL560:
.loc 2 938 19 view .LVU3030
.LBB9067:
.loc 2 940 13 view .LVU3031
.LBB9058:
.loc 4 919 1 view .LVU3032
.LBB9022:
.loc 4 921 3 view .LVU3033
.loc 4 921 3 is_stmt 0 view .LVU3034
.LBE9022:
.LBE9058:
.loc 2 942 13 is_stmt 1 view .LVU3035
.LBB9059:
.loc 4 919 1 view .LVU3036
.LBB9025:
.loc 4 921 3 view .LVU3037
.loc 4 921 3 is_stmt 0 view .LVU3038
.LBE9025:
.LBE9059:
.loc 2 944 13 is_stmt 1 view .LVU3039
.LBB9060:
.loc 3 913 1 view .LVU3040
.LBB9029:
.loc 3 915 3 view .LVU3041
.loc 3 915 3 is_stmt 0 view .LVU3042
.LBE9029:
.LBE9060:
.loc 2 946 13 is_stmt 1 view .LVU3043
.LBB9061:
.loc 3 597 1 view .LVU3044
.LBB9034:
.loc 3 599 3 view .LVU3045
.LBE9034:
.LBE9061:
.LBB9062:
.LBB9030:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU3046
vpxor ymm0, ymm1, YMMWORD PTR -39[rsi+rax] # tmp367, MEM[(const __m256i_u * {ref-all})_191], MEM[(const __m256i_u * {ref-all})_194]
.LVL561:
.loc 3 915 33 view .LVU3047
.LBE9030:
.LBE9062:
.LBB9063:
.LBB9052:
.LBB9044:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 view .LVU3048
vpshufd ymm1, ymm1, 78 # tmp371, MEM[(const __m256i_u * {ref-all})_191],
.LVL562:
.loc 3 599 19 view .LVU3049
.LBE9044:
.LBE9052:
.LBE9063:
.LBB9064:
.LBB9035:
vpshufd ymm2, ymm0, 49 # tmp368, tmp367,
.LVL563:
.loc 3 599 19 view .LVU3050
.LBE9035:
.LBE9064:
.loc 2 948 13 is_stmt 1 view .LVU3051
.LBB9065:
.loc 3 567 1 view .LVU3052
.LBB9040:
.loc 3 569 3 view .LVU3053
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU3054
vpmuludq ymm0, ymm0, ymm2 # tmp370, tmp367, tmp368
.LVL564:
.loc 3 569 19 view .LVU3055
.LBE9040:
.LBE9065:
.loc 2 949 13 is_stmt 1 view .LVU3056
.LBB9066:
.loc 2 951 17 view .LVU3057
.LBB9053:
.loc 3 597 1 view .LVU3058
.LBB9045:
.loc 3 599 3 view .LVU3059
.loc 3 599 3 is_stmt 0 view .LVU3060
.LBE9045:
.LBE9053:
.loc 2 952 17 is_stmt 1 view .LVU3061
.LBB9054:
.loc 3 126 1 view .LVU3062
.LBB9048:
.loc 3 128 3 view .LVU3063
.loc 3 128 3 is_stmt 0 view .LVU3064
.LBE9048:
.LBE9054:
.loc 2 954 17 is_stmt 1 view .LVU3065
.LBB9055:
.loc 3 126 1 view .LVU3066
.LBB9051:
.loc 3 128 3 view .LVU3067
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 is_stmt 0 view .LVU3068
vpaddq ymm0, ymm0, ymm1 # tmp373, tmp370, tmp371
.LVL565:
.loc 3 128 33 view .LVU3069
vpaddq ymm0, ymm0, YMMWORD PTR 32[r12] # tmp374, tmp373, MEM[(__m256i * {ref-all})&acc + 32B]
.LBE9051:
.LBE9055:
# xxh3.h:954: xacc[i] = _mm256_add_epi64(product, sum);
.loc 2 954 25 view .LVU3070
vmovdqa YMMWORD PTR 32[r12], ymm0 # MEM[(__m256i * {ref-all})&acc + 32B], tmp374
.LVL566:
.loc 2 954 25 view .LVU3071
.LBE9066:
.LBE9067:
.loc 2 938 51 is_stmt 1 view .LVU3072
.loc 2 938 19 view .LVU3073
.L134:
.loc 2 938 19 is_stmt 0 view .LVU3074
.LBE9017:
.LBE9068:
.LBE9069:
.LBE9071:
.LBE9076:
.LBE9081:
.LBB9082:
.loc 2 1907 5 is_stmt 1 view .LVU3075
.LBE9082:
.loc 2 1907 41 view .LVU3076
.loc 2 1908 5 view .LVU3077
.LBB9083:
.loc 2 1909 9 view .LVU3078
# xxh3.h:1909: { xxh_u64 const low64 = XXH3_mergeAccs(acc, secret + XXH_SECRET_MERGEACCS_START, (xxh_u64)len * PRIME64_1);
.loc 2 1909 31 is_stmt 0 view .LVU3079
movabs r8, -7046029288634856825 # tmp376,
lea rdx, 11[rsi] # tmp377,
mov rcx, r12 #, tmp267
imul r8, rbx #, len
vzeroupper
call XXH3_mergeAccs #
.LVL567:
# xxh3.h:1910: xxh_u64 const high64 = XXH3_mergeAccs(acc, secret + secretSize - sizeof(acc) - XXH_SECRET_MERGEACCS_START, ~((xxh_u64)len * PRIME64_2));
.loc 2 1910 131 view .LVU3080
movabs r8, -4417276706812531889 # tmp379,
imul r8, rbx # tmp378, len
# xxh3.h:1909: { xxh_u64 const low64 = XXH3_mergeAccs(acc, secret + XXH_SECRET_MERGEACCS_START, (xxh_u64)len * PRIME64_1);
.loc 2 1909 31 view .LVU3081
mov rdi, rax # low64, tmp390
.LVL568:
.loc 2 1910 9 is_stmt 1 view .LVU3082
# xxh3.h:1910: xxh_u64 const high64 = XXH3_mergeAccs(acc, secret + secretSize - sizeof(acc) - XXH_SECRET_MERGEACCS_START, ~((xxh_u64)len * PRIME64_2));
.loc 2 1910 32 is_stmt 0 view .LVU3083
mov rax, QWORD PTR 256[rsp] # tmp450, secretSize
.LVL569:
.loc 2 1910 32 view .LVU3084
lea rdx, -75[rsi+rax] # tmp382,
not r8 #
call XXH3_mergeAccs #
.LVL570:
.loc 2 1911 9 is_stmt 1 view .LVU3085
.loc 2 1912 9 view .LVU3086
# xxh3.h:1912: return h128;
.loc 2 1912 16 is_stmt 0 view .LVU3087
mov QWORD PTR 0[r13], rdi # MEM[(struct *)&<retval>], low64
.LBE9083:
.LBE9091:
.LBE9099:
# xxh3.h:1935: }
.loc 2 1935 1 view .LVU3088
vmovaps xmm6, XMMWORD PTR 128[rsp] #,
.LBB9100:
.LBB9092:
.LBB9084:
# xxh3.h:1912: return h128;
.loc 2 1912 16 view .LVU3089
mov QWORD PTR 8[r13], rax # MEM[(struct *)&<retval> + 8B], tmp391
.LVL571:
.loc 2 1912 16 view .LVU3090
.LBE9084:
.LBE9092:
.LBE9100:
# xxh3.h:1935: }
.loc 2 1935 1 view .LVU3091
mov rax, r13 #, .result_ptr
add rsp, 152 #,
.cfi_restore 23
.cfi_def_cfa_offset 72
pop rbx #
.cfi_restore 3
.cfi_def_cfa_offset 64
.LVL572:
.loc 2 1935 1 view .LVU3092
pop rsi #
.cfi_restore 4
.cfi_def_cfa_offset 56
.LVL573:
.loc 2 1935 1 view .LVU3093
pop rdi #
.cfi_restore 5
.cfi_def_cfa_offset 48
pop rbp #
.cfi_restore 6
.cfi_def_cfa_offset 40
pop r12 #
.cfi_restore 12
.cfi_def_cfa_offset 32
pop r13 #
.cfi_restore 13
.cfi_def_cfa_offset 24
.LVL574:
.loc 2 1935 1 view .LVU3094
pop r14 #
.cfi_restore 14
.cfi_def_cfa_offset 16
pop r15 #
.cfi_restore 15
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE5367:
.seh_endproc
.p2align 4
.def XXH3_hashLong_128b_withSeed; .scl 3; .type 32; .endef
.seh_proc XXH3_hashLong_128b_withSeed
XXH3_hashLong_128b_withSeed:
.LVL575:
.LFB5368:
.loc 2 1943 1 is_stmt 1 view -0
.cfi_startproc
.loc 2 1943 1 is_stmt 0 view .LVU3096
push r13 #
.seh_pushreg r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
push r12 #
.seh_pushreg r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
push rsi #
.seh_pushreg rsi
.cfi_def_cfa_offset 32
.cfi_offset 4, -32
push rbx #
.seh_pushreg rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
sub rsp, 328 #,
.seh_stackalloc 328
.cfi_def_cfa_offset 368
vmovaps XMMWORD PTR 304[rsp], xmm6 #,
.seh_savexmm xmm6, 304
.cfi_offset 23, -64
.seh_endprologue
.loc 2 1944 5 is_stmt 1 view .LVU3097
.loc 2 1945 5 view .LVU3098
# xxh3.h:1943: {
.loc 2 1943 1 is_stmt 0 view .LVU3099
lea r13, 255[rsp] # tmp252,
mov r12, rcx # .result_ptr, tmp376
mov r10, rdx # input, tmp377
mov rbx, r8 # len, tmp378
and r13, -32 # tmp254,
# xxh3.h:1945: if (seed == 0) return XXH3_hashLong_128b_defaultSecret(input, len);
.loc 2 1945 8 view .LVU3100
test r9, r9 # seed
je .L148 #,
lea rax, kSecret[rip] # ivtmp.529,
lea rdx, 40[rsp] # ivtmp.531,
.LVL576:
.loc 2 1945 8 view .LVU3101
movabs rcx, -4734510112055689544 # pretmp_85,
.LVL577:
.loc 2 1945 8 view .LVU3102
lea r8, 192[rax] # _197,
.LVL578:
.loc 2 1945 8 view .LVU3103
jmp .L149 #
.LVL579:
.p2align 4,,10
.p2align 3
.L170:
.loc 2 1945 8 view .LVU3104
mov rcx, QWORD PTR [rax] # pretmp_85, MEM[base: _215, offset: 0B]
.L149:
.LBB9101:
.LBB9102:
.loc 2 1402 9 is_stmt 1 view .LVU3105
.LVL580:
.loc 2 1402 9 is_stmt 0 view .LVU3106
.LBE9102:
.LBE9101:
.loc 1 1550 5 is_stmt 1 view .LVU3107
.loc 1 1492 5 view .LVU3108
.loc 1 1493 5 view .LVU3109
.loc 1 1494 5 view .LVU3110
.LBB9111:
.LBB9109:
.LBB9103:
.LBI9103:
.loc 2 1385 23 view .LVU3111
.LBB9104:
.loc 2 1387 5 view .LVU3112
.loc 2 1388 5 view .LVU3113
.LBE9104:
.LBE9103:
# xxh3.h:1402: XXH_writeLE64(customSecret + 16*i, XXH_readLE64(kSecret + 16*i) + seed64);
.loc 2 1402 9 is_stmt 0 view .LVU3114
add rcx, r9 # tmp260, seed
.LVL581:
.loc 2 1402 9 view .LVU3115
add rax, 16 # ivtmp.529,
add rdx, 16 # ivtmp.531,
.LVL582:
.loc 2 1402 9 view .LVU3116
mov QWORD PTR -24[rdx], rcx # MEM[base: _112, offset: -8B], tmp260
.LVL583:
.loc 2 1403 9 is_stmt 1 view .LVU3117
.loc 2 1403 9 is_stmt 0 view .LVU3118
.LBE9109:
.LBE9111:
.loc 1 1550 5 is_stmt 1 view .LVU3119
.loc 1 1492 5 view .LVU3120
.loc 1 1493 5 view .LVU3121
.loc 1 1494 5 view .LVU3122
.LBB9112:
.LBB9110:
.LBB9105:
.LBI9105:
.loc 2 1385 23 view .LVU3123
.LBB9106:
.loc 2 1387 5 view .LVU3124
.loc 2 1388 5 view .LVU3125
.LBE9106:
.LBE9105:
# xxh3.h:1403: XXH_writeLE64(customSecret + 16*i + 8, XXH_readLE64(kSecret + 16*i + 8) - seed64);
.loc 2 1403 9 is_stmt 0 view .LVU3126
mov rcx, QWORD PTR -8[rax] # tmp263, MEM[base: _113, offset: 8B]
sub rcx, r9 # tmp263, seed
.LBB9108:
.LBB9107:
# xxh3.h:1388: memcpy(dst, &v64, sizeof(v64));
.loc 2 1388 5 view .LVU3127
mov QWORD PTR -16[rdx], rcx # MEM[base: _112, offset: 0B], tmp263
.LBE9107:
.LBE9108:
.loc 2 1401 29 is_stmt 1 view .LVU3128
.loc 2 1401 15 view .LVU3129
# xxh3.h:1401: for (i=0; i < nbRounds; i++) {
.loc 2 1401 5 is_stmt 0 view .LVU3130
cmp rax, r8 # ivtmp.529, _197
jne .L170 #,
.LBE9110:
.LBE9112:
.loc 2 1947 5 is_stmt 1 view .LVU3131
.LVL584:
.LBB9113:
.LBI9113:
.loc 2 1899 1 view .LVU3132
.LBB9114:
.loc 2 1902 5 view .LVU3133
# xxh3.h:1902: XXH_ALIGN(XXH_ACC_ALIGN) xxh_u64 acc[ACC_NB] = XXH3_INIT_ACC;
.loc 2 1902 38 is_stmt 0 view .LVU3134
mov eax, 3266489917 # tmp383,
.LBB9115:
.LBB9116:
# xxh3.h:1303: for (n = 0; n < nb_blocks; n++) {
.loc 2 1303 5 view .LVU3135
mov r9, rbx # nb_blocks, len
.LVL585:
.loc 2 1303 5 view .LVU3136
.LBE9116:
.LBE9115:
# xxh3.h:1902: XXH_ALIGN(XXH_ACC_ALIGN) xxh_u64 acc[ACC_NB] = XXH3_INIT_ACC;
.loc 2 1902 38 view .LVU3137
mov QWORD PTR 0[r13], rax # acc, tmp383
.LBB9354:
.LBB9348:
# xxh3.h:1303: for (n = 0; n < nb_blocks; n++) {
.loc 2 1303 5 view .LVU3138
shr r9, 10 # nb_blocks,
.LBE9348:
.LBE9354:
# xxh3.h:1902: XXH_ALIGN(XXH_ACC_ALIGN) xxh_u64 acc[ACC_NB] = XXH3_INIT_ACC;
.loc 2 1902 38 view .LVU3139
movabs rax, -7046029288634856825 # tmp384,
mov QWORD PTR 8[r13], rax # acc, tmp384
movabs rax, -4417276706812531889 # tmp385,
mov QWORD PTR 16[r13], rax # acc, tmp385
movabs rax, 1609587929392839161 # tmp386,
mov QWORD PTR 24[r13], rax # acc, tmp386
movabs rax, -8796714831421723037 # tmp387,
mov QWORD PTR 32[r13], rax # acc, tmp387
mov eax, 2246822519 # tmp388,
mov QWORD PTR 40[r13], rax # acc, tmp388
movabs rax, 2870177450012600261 # tmp389,
mov QWORD PTR 48[r13], rax # acc, tmp389
mov eax, 2654435761 # tmp390,
mov QWORD PTR 56[r13], rax # acc, tmp390
.loc 2 1902 65 is_stmt 1 view .LVU3140
.loc 2 1904 5 view .LVU3141
.LVL586:
.LBB9355:
.LBI9115:
.loc 2 1290 1 view .LVU3142
.LBB9349:
.loc 2 1295 5 view .LVU3143
.loc 2 1296 5 view .LVU3144
.loc 2 1297 5 view .LVU3145
.loc 2 1299 5 view .LVU3146
.loc 2 1301 5 view .LVU3147
.loc 2 1303 5 view .LVU3148
.loc 2 1303 17 view .LVU3149
# xxh3.h:1303: for (n = 0; n < nb_blocks; n++) {
.loc 2 1303 5 is_stmt 0 view .LVU3150
je .L152 #,
vmovdqa ymm3, YMMWORD PTR 0[r13] # acc__lsm.477, MEM[(__m256i * {ref-all})&acc]
sal r9, 10 # _144,
.LVL587:
.loc 2 1303 5 view .LVU3151
vmovdqa ymm2, YMMWORD PTR 32[r13] # acc__lsm.479, MEM[(__m256i * {ref-all})&acc + 32B]
.LBB9117:
.LBB9118:
.LBB9119:
.LBB9120:
.LBB9121:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 35 view .LVU3152
xor r8d, r8d # ivtmp.512
.LBE9121:
.LBE9120:
.LBB9126:
.LBB9127:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avxintrin.h:921: return *__P;
.loc 4 921 10 view .LVU3153
vmovdqu ymm6, YMMWORD PTR 160[rsp] # _289, MEM[(const __m256i_u * {ref-all})&secret + 128B]
vmovdqa ymm4, YMMWORD PTR .LC1[rip] # tmp375,
lea rsi, 384[r10] # tmp373,
lea r11, 64[rsp] # ivtmp.503,
vmovdqu ymm5, YMMWORD PTR 192[rsp] # _314, MEM[(const __m256i_u * {ref-all})&secret + 160B]
lea rcx, 192[rsp] # _84,
.LVL588:
.p2align 4,,10
.p2align 3
.L154:
.loc 4 921 10 view .LVU3154
.LBE9127:
.LBE9126:
.LBE9119:
.LBE9118:
.LBE9117:
.loc 2 1304 9 is_stmt 1 view .LVU3155
.LBB9171:
.LBI9171:
.loc 2 1272 1 view .LVU3156
.LBB9172:
.loc 2 1278 5 view .LVU3157
.loc 2 1279 5 view .LVU3158
.loc 2 1279 17 view .LVU3159
lea rdx, [rsi+r8] # ivtmp.499,
mov rax, r11 # ivtmp.503, ivtmp.503
.LVL589:
.p2align 4,,10
.p2align 3
.L153:
.LBB9173:
.loc 2 1280 9 view .LVU3160
.loc 2 1281 9 view .LVU3161
.LBB9174:
.LBB9175:
.LBB9176:
.LBB9177:
.LBB9178:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU3162
vmovdqu ymm1, YMMWORD PTR -32[rax] # tmp392, MEM[base: _89, offset: -32B]
vpxor ymm0, ymm1, YMMWORD PTR -384[rdx] # tmp277, tmp392, MEM[base: _16, offset: -384B]
add rax, 8 # ivtmp.503,
.LBE9178:
.LBE9177:
.LBE9176:
.LBE9175:
.LBE9174:
# xxh3.h:1281: XXH_PREFETCH(in + XXH_PREFETCH_DIST);
.loc 2 1281 9 view .LVU3163
prefetcht0 [rdx] # ivtmp.499
.loc 2 1282 9 is_stmt 1 view .LVU3164
.LVL590:
.LBB9225:
.LBI9174:
.loc 2 921 1 view .LVU3165
.LBE9225:
.LBE9173:
.LBE9172:
.LBE9171:
.LBE9349:
.LBE9355:
.LBE9114:
.LBE9113:
.loc 2 928 5 view .LVU3166
.LBB9366:
.LBB9362:
.LBB9356:
.LBB9350:
.LBB9229:
.LBB9228:
.LBB9227:
.LBB9226:
.LBB9224:
.loc 2 929 9 view .LVU3167
.loc 2 932 9 view .LVU3168
.loc 2 935 9 view .LVU3169
.loc 2 937 9 view .LVU3170
.loc 2 938 9 view .LVU3171
.loc 2 938 19 view .LVU3172
.LBB9222:
.loc 2 940 13 view .LVU3173
.LBB9183:
.LBI9183:
.loc 4 919 1 view .LVU3174
.LBB9184:
.loc 4 921 3 view .LVU3175
.loc 4 921 3 is_stmt 0 view .LVU3176
.LBE9184:
.LBE9183:
.loc 2 942 13 is_stmt 1 view .LVU3177
.LBB9186:
.LBI9186:
.loc 4 919 1 view .LVU3178
.LBB9187:
.loc 4 921 3 view .LVU3179
.LBE9187:
.LBE9186:
.loc 2 944 13 view .LVU3180
.LBB9189:
.LBI9177:
.loc 3 913 1 view .LVU3181
.LBB9179:
.loc 3 915 3 view .LVU3182
.loc 3 915 3 is_stmt 0 view .LVU3183
.LBE9179:
.LBE9189:
.loc 2 946 13 is_stmt 1 view .LVU3184
.LBB9190:
.LBI9190:
.loc 3 597 1 view .LVU3185
.LBB9191:
.loc 3 599 3 view .LVU3186
add rdx, 64 # ivtmp.499,
.LVL591:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 is_stmt 0 view .LVU3187
vpshufd ymm1, ymm0, 49 # tmp278, tmp277,
.LVL592:
.loc 3 599 19 view .LVU3188
.LBE9191:
.LBE9190:
.loc 2 948 13 is_stmt 1 view .LVU3189
.LBB9194:
.LBI9194:
.loc 3 567 1 view .LVU3190
.LBB9195:
.loc 3 569 3 view .LVU3191
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU3192
vpmuludq ymm0, ymm0, ymm1 # tmp280, tmp277, tmp278
.LVL593:
.loc 3 569 19 view .LVU3193
.LBE9195:
.LBE9194:
.loc 2 949 13 is_stmt 1 view .LVU3194
.LBB9197:
.loc 2 951 17 view .LVU3195
.LBB9198:
.LBI9198:
.loc 3 597 1 view .LVU3196
.LBB9199:
.loc 3 599 3 view .LVU3197
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 is_stmt 0 view .LVU3198
vpshufd ymm1, YMMWORD PTR -448[rdx], 78 # tmp281, MEM[base: _16, offset: -384B],
.LVL594:
.loc 3 599 19 view .LVU3199
.LBE9199:
.LBE9198:
.loc 2 952 17 is_stmt 1 view .LVU3200
.LBB9201:
.LBI9201:
.loc 3 126 1 view .LVU3201
.LBB9202:
.loc 3 128 3 view .LVU3202
.loc 3 128 3 is_stmt 0 view .LVU3203
.LBE9202:
.LBE9201:
.loc 2 954 17 is_stmt 1 view .LVU3204
.LBB9204:
.LBI9204:
.loc 3 126 1 view .LVU3205
.LBB9205:
.loc 3 128 3 view .LVU3206
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 is_stmt 0 view .LVU3207
vpaddq ymm0, ymm0, ymm1 # tmp283, tmp280, tmp281
.LVL595:
.loc 3 128 33 view .LVU3208
.LBE9205:
.LBE9204:
.LBE9197:
.LBB9212:
.LBB9180:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 view .LVU3209
vmovdqu ymm1, YMMWORD PTR -8[rax] # tmp393, MEM[base: _89, offset: 0B]
.LVL596:
.loc 3 915 33 view .LVU3210
.LBE9180:
.LBE9212:
.LBB9213:
.LBB9208:
.LBB9206:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 view .LVU3211
vpaddq ymm3, ymm0, ymm3 # acc__lsm.477, tmp283, acc__lsm.477
.loc 3 128 33 view .LVU3212
.LBE9206:
.LBE9208:
.LBE9213:
.LBE9222:
.loc 2 938 51 is_stmt 1 view .LVU3213
.LVL597:
.loc 2 938 19 view .LVU3214
.LBB9223:
.loc 2 940 13 view .LVU3215
.LBB9214:
.loc 4 919 1 view .LVU3216
.LBB9185:
.loc 4 921 3 view .LVU3217
.loc 4 921 3 is_stmt 0 view .LVU3218
.LBE9185:
.LBE9214:
.loc 2 942 13 is_stmt 1 view .LVU3219
.LBB9215:
.loc 4 919 1 view .LVU3220
.LBB9188:
.loc 4 921 3 view .LVU3221
.LBE9188:
.LBE9215:
.loc 2 944 13 view .LVU3222
.LBB9216:
.loc 3 913 1 view .LVU3223
.LBB9181:
.loc 3 915 3 view .LVU3224
.loc 3 915 3 is_stmt 0 view .LVU3225
.LBE9181:
.LBE9216:
.loc 2 946 13 is_stmt 1 view .LVU3226
.LBB9217:
.loc 3 597 1 view .LVU3227
.LBB9192:
.loc 3 599 3 view .LVU3228
.LBE9192:
.LBE9217:
.LBB9218:
.LBB9182:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU3229
vpxor ymm0, ymm1, YMMWORD PTR -416[rdx] # tmp286, tmp393, MEM[base: _16, offset: -352B]
.LBE9182:
.LBE9218:
.LBB9219:
.LBB9193:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 view .LVU3230
vpshufd ymm1, ymm0, 49 # tmp287, tmp286,
.LVL598:
.loc 3 599 19 view .LVU3231
.LBE9193:
.LBE9219:
.loc 2 948 13 is_stmt 1 view .LVU3232
.LBB9220:
.loc 3 567 1 view .LVU3233
.LBB9196:
.loc 3 569 3 view .LVU3234
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU3235
vpmuludq ymm0, ymm0, ymm1 # tmp289, tmp286, tmp287
.LVL599:
.loc 3 569 19 view .LVU3236
.LBE9196:
.LBE9220:
.loc 2 949 13 is_stmt 1 view .LVU3237
.LBB9221:
.loc 2 951 17 view .LVU3238
.LBB9209:
.loc 3 597 1 view .LVU3239
.LBB9200:
.loc 3 599 3 view .LVU3240
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 is_stmt 0 view .LVU3241
vpshufd ymm1, YMMWORD PTR -416[rdx], 78 # tmp290, MEM[base: _16, offset: -352B],
.LVL600:
.loc 3 599 19 view .LVU3242
.LBE9200:
.LBE9209:
.loc 2 952 17 is_stmt 1 view .LVU3243
.LBB9210:
.loc 3 126 1 view .LVU3244
.LBB9203:
.loc 3 128 3 view .LVU3245
.loc 3 128 3 is_stmt 0 view .LVU3246
.LBE9203:
.LBE9210:
.loc 2 954 17 is_stmt 1 view .LVU3247
.LBB9211:
.loc 3 126 1 view .LVU3248
.LBB9207:
.loc 3 128 3 view .LVU3249
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 is_stmt 0 view .LVU3250
vpaddq ymm0, ymm0, ymm1 # tmp292, tmp289, tmp290
.LVL601:
.loc 3 128 33 view .LVU3251
vpaddq ymm2, ymm0, ymm2 # acc__lsm.479, tmp292, acc__lsm.479
.loc 3 128 33 view .LVU3252
.LBE9207:
.LBE9211:
.LBE9221:
.LBE9223:
.loc 2 938 51 is_stmt 1 view .LVU3253
.LVL602:
.loc 2 938 19 view .LVU3254
.loc 2 938 19 is_stmt 0 view .LVU3255
.LBE9224:
.LBE9226:
.LBE9227:
.loc 2 1279 32 is_stmt 1 view .LVU3256
.loc 2 1279 17 view .LVU3257
# xxh3.h:1279: for (n = 0; n < nbStripes; n++ ) {
.loc 2 1279 5 is_stmt 0 view .LVU3258
cmp rcx, rax # _84, ivtmp.503
jne .L153 #,
.LVL603:
.loc 2 1279 5 view .LVU3259
.LBE9228:
.LBE9229:
.LBB9230:
.LBB9170:
.loc 2 1123 19 is_stmt 1 view .LVU3260
.LBB9168:
.loc 2 1125 13 view .LVU3261
.loc 2 1126 13 view .LVU3262
.LBB9130:
.LBI9130:
.loc 3 787 1 view .LVU3263
.LBB9131:
.loc 3 789 3 view .LVU3264
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:789: return (__m256i)__builtin_ia32_psrlqi256 ((__v4di)__A, __B);
.loc 3 789 19 is_stmt 0 view .LVU3265
vpsrlq ymm0, ymm3, 47 # tmp293, acc__lsm.477,
.LVL604:
.loc 3 789 19 view .LVU3266
.LBE9131:
.LBE9130:
.loc 2 1127 13 is_stmt 1 view .LVU3267
.LBB9133:
.LBI9133:
.loc 3 913 1 view .LVU3268
.LBB9134:
.loc 3 915 3 view .LVU3269
.loc 3 915 3 is_stmt 0 view .LVU3270
.LBE9134:
.LBE9133:
.loc 2 1129 13 is_stmt 1 view .LVU3271
.LBB9136:
.LBI9126:
.loc 4 919 1 view .LVU3272
.LBB9128:
.loc 4 921 3 view .LVU3273
.loc 4 921 3 is_stmt 0 view .LVU3274
.LBE9128:
.LBE9136:
.loc 2 1130 13 is_stmt 1 view .LVU3275
.LBB9137:
.LBI9120:
.loc 3 913 1 view .LVU3276
.LBB9122:
.loc 3 915 3 view .LVU3277
.loc 3 915 3 is_stmt 0 view .LVU3278
.LBE9122:
.LBE9137:
.loc 2 1133 13 is_stmt 1 view .LVU3279
.LBB9138:
.LBI9138:
.loc 3 597 1 view .LVU3280
.LBB9139:
.loc 3 599 3 view .LVU3281
.LBE9139:
.LBE9138:
.LBB9143:
.LBB9123:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU3282
vpxor ymm3, ymm6, ymm3 # tmp295, _289, acc__lsm.477
.LVL605:
.loc 3 915 33 view .LVU3283
add r8, 1024 # ivtmp.512,
vpxor ymm3, ymm3, ymm0 # tmp296, tmp295, tmp293
.LVL606:
.loc 3 915 33 view .LVU3284
.LBE9123:
.LBE9143:
.LBB9144:
.LBB9140:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 view .LVU3285
vpshufd ymm0, ymm3, 49 # tmp297, tmp296,
.LVL607:
.loc 3 599 19 view .LVU3286
.LBE9140:
.LBE9144:
.loc 2 1134 13 is_stmt 1 view .LVU3287
.LBB9145:
.LBI9145:
.loc 3 567 1 view .LVU3288
.LBB9146:
.loc 3 569 3 view .LVU3289
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU3290
vpmuludq ymm3, ymm3, ymm4 # tmp299, tmp296, tmp375
.LVL608:
.loc 3 569 19 view .LVU3291
.LBE9146:
.LBE9145:
.loc 2 1135 13 is_stmt 1 view .LVU3292
.LBB9148:
.LBI9148:
.loc 3 567 1 view .LVU3293
.LBB9149:
.loc 3 569 3 view .LVU3294
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU3295
vpmuludq ymm0, ymm0, ymm4 # tmp301, tmp297, tmp375
.LVL609:
.loc 3 569 19 view .LVU3296
.LBE9149:
.LBE9148:
.loc 2 1136 13 is_stmt 1 view .LVU3297
.LBB9151:
.LBI9151:
.loc 3 696 1 view .LVU3298
.LBB9152:
.loc 3 698 3 view .LVU3299
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:698: return (__m256i)__builtin_ia32_psllqi256 ((__v4di)__A, __B);
.loc 3 698 19 is_stmt 0 view .LVU3300
vpsllq ymm0, ymm0, 32 # tmp303, tmp301,
.LVL610:
.loc 3 698 19 view .LVU3301
.LBE9152:
.LBE9151:
.LBB9154:
.LBI9154:
.loc 3 126 1 is_stmt 1 view .LVU3302
.LBB9155:
.loc 3 128 3 view .LVU3303
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 is_stmt 0 view .LVU3304
vpaddq ymm3, ymm3, ymm0 # acc__lsm.477, tmp299, tmp303
.LVL611:
.loc 3 128 33 view .LVU3305
.LBE9155:
.LBE9154:
.LBE9168:
.loc 2 1123 51 is_stmt 1 view .LVU3306
.loc 2 1123 19 view .LVU3307
.LBB9169:
.loc 2 1125 13 view .LVU3308
.loc 2 1126 13 view .LVU3309
.LBB9157:
.loc 3 787 1 view .LVU3310
.LBB9132:
.loc 3 789 3 view .LVU3311
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:789: return (__m256i)__builtin_ia32_psrlqi256 ((__v4di)__A, __B);
.loc 3 789 19 is_stmt 0 view .LVU3312
vpsrlq ymm0, ymm2, 47 # tmp306, acc__lsm.479,
.LVL612:
.loc 3 789 19 view .LVU3313
.LBE9132:
.LBE9157:
.loc 2 1127 13 is_stmt 1 view .LVU3314
.LBB9158:
.loc 3 913 1 view .LVU3315
.LBB9135:
.loc 3 915 3 view .LVU3316
.loc 3 915 3 is_stmt 0 view .LVU3317
.LBE9135:
.LBE9158:
.loc 2 1129 13 is_stmt 1 view .LVU3318
.LBB9159:
.loc 4 919 1 view .LVU3319
.LBB9129:
.loc 4 921 3 view .LVU3320
.loc 4 921 3 is_stmt 0 view .LVU3321
.LBE9129:
.LBE9159:
.loc 2 1130 13 is_stmt 1 view .LVU3322
.LBB9160:
.loc 3 913 1 view .LVU3323
.LBB9124:
.loc 3 915 3 view .LVU3324
.loc 3 915 3 is_stmt 0 view .LVU3325
.LBE9124:
.LBE9160:
.loc 2 1133 13 is_stmt 1 view .LVU3326
.LBB9161:
.loc 3 597 1 view .LVU3327
.LBB9141:
.loc 3 599 3 view .LVU3328
.LBE9141:
.LBE9161:
.LBB9162:
.LBB9125:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU3329
vpxor ymm2, ymm5, ymm2 # tmp308, _314, acc__lsm.479
.LVL613:
.loc 3 915 33 view .LVU3330
vpxor ymm2, ymm2, ymm0 # tmp309, tmp308, tmp306
.LVL614:
.loc 3 915 33 view .LVU3331
.LBE9125:
.LBE9162:
.LBB9163:
.LBB9142:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 view .LVU3332
vpshufd ymm0, ymm2, 49 # tmp310, tmp309,
.LVL615:
.loc 3 599 19 view .LVU3333
.LBE9142:
.LBE9163:
.loc 2 1134 13 is_stmt 1 view .LVU3334
.LBB9164:
.loc 3 567 1 view .LVU3335
.LBB9147:
.loc 3 569 3 view .LVU3336
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU3337
vpmuludq ymm2, ymm2, ymm4 # tmp312, tmp309, tmp375
.LVL616:
.loc 3 569 19 view .LVU3338
.LBE9147:
.LBE9164:
.loc 2 1135 13 is_stmt 1 view .LVU3339
.LBB9165:
.loc 3 567 1 view .LVU3340
.LBB9150:
.loc 3 569 3 view .LVU3341
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU3342
vpmuludq ymm0, ymm0, ymm4 # tmp314, tmp310, tmp375
.LVL617:
.loc 3 569 19 view .LVU3343
.LBE9150:
.LBE9165:
.loc 2 1136 13 is_stmt 1 view .LVU3344
.LBB9166:
.loc 3 696 1 view .LVU3345
.LBB9153:
.loc 3 698 3 view .LVU3346
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:698: return (__m256i)__builtin_ia32_psllqi256 ((__v4di)__A, __B);
.loc 3 698 19 is_stmt 0 view .LVU3347
vpsllq ymm0, ymm0, 32 # tmp316, tmp314,
.LVL618:
.loc 3 698 19 view .LVU3348
.LBE9153:
.LBE9166:
.LBB9167:
.loc 3 126 1 is_stmt 1 view .LVU3349
.LBB9156:
.loc 3 128 3 view .LVU3350
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 is_stmt 0 view .LVU3351
vpaddq ymm2, ymm2, ymm0 # acc__lsm.479, tmp312, tmp316
.LVL619:
.loc 3 128 33 view .LVU3352
.LBE9156:
.LBE9167:
.LBE9169:
.loc 2 1123 51 is_stmt 1 view .LVU3353
.loc 2 1123 19 view .LVU3354
.loc 2 1123 19 is_stmt 0 view .LVU3355
.LBE9170:
.LBE9230:
.loc 2 1303 32 is_stmt 1 view .LVU3356
.loc 2 1303 17 view .LVU3357
# xxh3.h:1303: for (n = 0; n < nb_blocks; n++) {
.loc 2 1303 5 is_stmt 0 view .LVU3358
cmp r8, r9 # ivtmp.512, _144
jne .L154 #,
vmovdqa YMMWORD PTR 0[r13], ymm3 # MEM[(__m256i * {ref-all})&acc], acc__lsm.477
vmovdqa YMMWORD PTR 32[r13], ymm2 # MEM[(__m256i * {ref-all})&acc + 32B], acc__lsm.479
.LVL620:
.L152:
.loc 2 1309 5 is_stmt 1 view .LVU3359
.LBB9231:
.loc 2 1310 9 view .LVU3360
# xxh3.h:1310: { size_t const nbStripes = (len - (block_len * nb_blocks)) / STRIPE_LEN;
.loc 2 1310 22 is_stmt 0 view .LVU3361
mov rax, rbx # tmp319, len
# xxh3.h:1310: { size_t const nbStripes = (len - (block_len * nb_blocks)) / STRIPE_LEN;
.loc 2 1310 52 view .LVU3362
mov rdx, rbx # _67, len
# xxh3.h:1310: { size_t const nbStripes = (len - (block_len * nb_blocks)) / STRIPE_LEN;
.loc 2 1310 22 view .LVU3363
shr rax, 6 # tmp319,
.LVL621:
.loc 2 1311 9 is_stmt 1 view .LVU3364
.loc 2 1312 9 view .LVU3365
# xxh3.h:1310: { size_t const nbStripes = (len - (block_len * nb_blocks)) / STRIPE_LEN;
.loc 2 1310 52 is_stmt 0 view .LVU3366
and rdx, -1024 # _67,
.LVL622:
.LBB9232:
.LBI9232:
.loc 2 1272 1 is_stmt 1 view .LVU3367
.LBB9233:
.loc 2 1278 5 view .LVU3368
.loc 2 1279 5 view .LVU3369
.loc 2 1279 17 view .LVU3370
# xxh3.h:1279: for (n = 0; n < nbStripes; n++ ) {
.loc 2 1279 5 is_stmt 0 view .LVU3371
and eax, 15 # tmp319,
.LVL623:
.loc 2 1279 5 view .LVU3372
mov rcx, rax # nbStripes, tmp319
je .L155 #,
lea rax, 32[rsp] # ivtmp.487,
.LVL624:
.loc 2 1279 5 view .LVU3373
vmovdqa ymm3, YMMWORD PTR 0[r13] # acc__lsm.473, MEM[(__m256i * {ref-all})&acc]
vmovdqa ymm2, YMMWORD PTR 32[r13] # acc__lsm.475, MEM[(__m256i * {ref-all})&acc + 32B]
lea rdx, 384[r10+rdx] # ivtmp.485,
.LVL625:
.loc 2 1279 5 view .LVU3374
lea rcx, [rax+rcx*8] # _308,
.LVL626:
.p2align 4,,10
.p2align 3
.L156:
.LBB9234:
.loc 2 1280 9 is_stmt 1 view .LVU3375
.loc 2 1281 9 view .LVU3376
.LBB9235:
.LBB9236:
.LBB9237:
.LBB9238:
.LBB9239:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU3377
vmovdqu ymm5, YMMWORD PTR [rax] # tmp397, MEM[base: _78, offset: 0B]
vmovdqu ymm6, YMMWORD PTR 32[rax] # tmp398, MEM[base: _78, offset: 32B]
add rax, 8 # ivtmp.487,
.LBE9239:
.LBE9238:
.LBE9237:
.LBE9236:
.LBE9235:
# xxh3.h:1281: XXH_PREFETCH(in + XXH_PREFETCH_DIST);
.loc 2 1281 9 view .LVU3378
prefetcht0 [rdx] # ivtmp.485
.loc 2 1282 9 is_stmt 1 view .LVU3379
.LVL627:
.LBB9285:
.LBI9235:
.loc 2 921 1 view .LVU3380
.LBE9285:
.LBE9234:
.LBE9233:
.LBE9232:
.LBE9231:
.LBE9350:
.LBE9356:
.LBE9362:
.LBE9366:
.loc 2 928 5 view .LVU3381
.LBB9367:
.LBB9363:
.LBB9357:
.LBB9351:
.LBB9345:
.LBB9289:
.LBB9288:
.LBB9287:
.LBB9286:
.LBB9284:
.loc 2 929 9 view .LVU3382
.loc 2 932 9 view .LVU3383
.loc 2 935 9 view .LVU3384
.loc 2 937 9 view .LVU3385
.loc 2 938 9 view .LVU3386
.loc 2 938 19 view .LVU3387
.LBB9282:
.loc 2 940 13 view .LVU3388
.LBB9244:
.LBI9244:
.loc 4 919 1 view .LVU3389
.LBB9245:
.loc 4 921 3 view .LVU3390
.loc 4 921 3 is_stmt 0 view .LVU3391
.LBE9245:
.LBE9244:
.loc 2 942 13 is_stmt 1 view .LVU3392
.LBB9247:
.LBI9247:
.loc 4 919 1 view .LVU3393
.LBB9248:
.loc 4 921 3 view .LVU3394
.LBE9248:
.LBE9247:
.loc 2 944 13 view .LVU3395
.LBB9250:
.LBI9238:
.loc 3 913 1 view .LVU3396
.LBB9240:
.loc 3 915 3 view .LVU3397
.loc 3 915 3 is_stmt 0 view .LVU3398
.LBE9240:
.LBE9250:
.loc 2 946 13 is_stmt 1 view .LVU3399
.LBB9251:
.LBI9251:
.loc 3 597 1 view .LVU3400
.LBB9252:
.loc 3 599 3 view .LVU3401
.LBE9252:
.LBE9251:
.LBB9256:
.LBB9241:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU3402
vpxor ymm0, ymm5, YMMWORD PTR -384[rdx] # tmp324, tmp397, MEM[base: _73, offset: -384B]
add rdx, 64 # ivtmp.485,
.LVL628:
.loc 3 915 33 view .LVU3403
.LBE9241:
.LBE9256:
.LBB9257:
.LBB9253:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 view .LVU3404
vpshufd ymm1, ymm0, 49 # tmp325, tmp324,
.LVL629:
.loc 3 599 19 view .LVU3405
.LBE9253:
.LBE9257:
.loc 2 948 13 is_stmt 1 view .LVU3406
.LBB9258:
.LBI9258:
.loc 3 567 1 view .LVU3407
.LBB9259:
.loc 3 569 3 view .LVU3408
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU3409
vpmuludq ymm0, ymm0, ymm1 # tmp327, tmp324, tmp325
.LVL630:
.loc 3 569 19 view .LVU3410
.LBE9259:
.LBE9258:
.loc 2 949 13 is_stmt 1 view .LVU3411
.LBB9261:
.loc 2 951 17 view .LVU3412
.LBB9262:
.LBI9262:
.loc 3 597 1 view .LVU3413
.LBB9263:
.loc 3 599 3 view .LVU3414
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 is_stmt 0 view .LVU3415
vpshufd ymm1, YMMWORD PTR -448[rdx], 78 # tmp328, MEM[base: _73, offset: -384B],
.LVL631:
.loc 3 599 19 view .LVU3416
.LBE9263:
.LBE9262:
.loc 2 952 17 is_stmt 1 view .LVU3417
.LBB9265:
.LBI9265:
.loc 3 126 1 view .LVU3418
.LBB9266:
.loc 3 128 3 view .LVU3419
.loc 3 128 3 is_stmt 0 view .LVU3420
.LBE9266:
.LBE9265:
.loc 2 954 17 is_stmt 1 view .LVU3421
.LBB9268:
.LBI9268:
.loc 3 126 1 view .LVU3422
.LBB9269:
.loc 3 128 3 view .LVU3423
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 is_stmt 0 view .LVU3424
vpaddq ymm0, ymm0, ymm1 # tmp330, tmp327, tmp328
.LVL632:
.loc 3 128 33 view .LVU3425
vpaddq ymm3, ymm0, ymm3 # acc__lsm.473, tmp330, acc__lsm.473
.LVL633:
.loc 3 128 33 view .LVU3426
.LBE9269:
.LBE9268:
.LBE9261:
.LBE9282:
.loc 2 938 51 is_stmt 1 view .LVU3427
.loc 2 938 19 view .LVU3428
.LBB9283:
.loc 2 940 13 view .LVU3429
.LBB9274:
.loc 4 919 1 view .LVU3430
.LBB9246:
.loc 4 921 3 view .LVU3431
.loc 4 921 3 is_stmt 0 view .LVU3432
.LBE9246:
.LBE9274:
.loc 2 942 13 is_stmt 1 view .LVU3433
.LBB9275:
.loc 4 919 1 view .LVU3434
.LBB9249:
.loc 4 921 3 view .LVU3435
.LBE9249:
.LBE9275:
.loc 2 944 13 view .LVU3436
.LBB9276:
.loc 3 913 1 view .LVU3437
.LBB9242:
.loc 3 915 3 view .LVU3438
.loc 3 915 3 is_stmt 0 view .LVU3439
.LBE9242:
.LBE9276:
.loc 2 946 13 is_stmt 1 view .LVU3440
.LBB9277:
.loc 3 597 1 view .LVU3441
.LBB9254:
.loc 3 599 3 view .LVU3442
.LBE9254:
.LBE9277:
.LBB9278:
.LBB9243:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU3443
vpxor ymm0, ymm6, YMMWORD PTR -416[rdx] # tmp334, tmp398, MEM[base: _73, offset: -352B]
.LBE9243:
.LBE9278:
.LBB9279:
.LBB9255:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 view .LVU3444
vpshufd ymm1, ymm0, 49 # tmp335, tmp334,
.LVL634:
.loc 3 599 19 view .LVU3445
.LBE9255:
.LBE9279:
.loc 2 948 13 is_stmt 1 view .LVU3446
.LBB9280:
.loc 3 567 1 view .LVU3447
.LBB9260:
.loc 3 569 3 view .LVU3448
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU3449
vpmuludq ymm0, ymm0, ymm1 # tmp337, tmp334, tmp335
.LVL635:
.loc 3 569 19 view .LVU3450
.LBE9260:
.LBE9280:
.loc 2 949 13 is_stmt 1 view .LVU3451
.LBB9281:
.loc 2 951 17 view .LVU3452
.LBB9271:
.loc 3 597 1 view .LVU3453
.LBB9264:
.loc 3 599 3 view .LVU3454
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 is_stmt 0 view .LVU3455
vpshufd ymm1, YMMWORD PTR -416[rdx], 78 # tmp338, MEM[base: _73, offset: -352B],
.LVL636:
.loc 3 599 19 view .LVU3456
.LBE9264:
.LBE9271:
.loc 2 952 17 is_stmt 1 view .LVU3457
.LBB9272:
.loc 3 126 1 view .LVU3458
.LBB9267:
.loc 3 128 3 view .LVU3459
.loc 3 128 3 is_stmt 0 view .LVU3460
.LBE9267:
.LBE9272:
.loc 2 954 17 is_stmt 1 view .LVU3461
.LBB9273:
.loc 3 126 1 view .LVU3462
.LBB9270:
.loc 3 128 3 view .LVU3463
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 is_stmt 0 view .LVU3464
vpaddq ymm0, ymm0, ymm1 # tmp340, tmp337, tmp338
.LVL637:
.loc 3 128 33 view .LVU3465
vpaddq ymm2, ymm0, ymm2 # acc__lsm.475, tmp340, acc__lsm.475
.LVL638:
.loc 3 128 33 view .LVU3466
.LBE9270:
.LBE9273:
.LBE9281:
.LBE9283:
.loc 2 938 51 is_stmt 1 view .LVU3467
.loc 2 938 19 view .LVU3468
.loc 2 938 19 is_stmt 0 view .LVU3469
.LBE9284:
.LBE9286:
.LBE9287:
.loc 2 1279 32 is_stmt 1 view .LVU3470
.loc 2 1279 17 view .LVU3471
# xxh3.h:1279: for (n = 0; n < nbStripes; n++ ) {
.loc 2 1279 5 is_stmt 0 view .LVU3472
cmp rax, rcx # ivtmp.487, _308
jne .L156 #,
vmovdqa YMMWORD PTR 0[r13], ymm3 # MEM[(__m256i * {ref-all})&acc], acc__lsm.473
vmovdqa YMMWORD PTR 32[r13], ymm2 # MEM[(__m256i * {ref-all})&acc + 32B], acc__lsm.475
.LVL639:
.L155:
.loc 2 1279 5 view .LVU3473
.LBE9288:
.LBE9289:
.loc 2 1315 9 is_stmt 1 view .LVU3474
# xxh3.h:1315: if (len & (STRIPE_LEN - 1)) {
.loc 2 1315 12 is_stmt 0 view .LVU3475
test bl, 63 # len,
jne .L171 #,
.L157:
.LVL640:
.loc 2 1315 12 view .LVU3476
.LBE9345:
.LBE9351:
.LBE9357:
.LBB9358:
.loc 2 1907 5 is_stmt 1 view .LVU3477
.LBE9358:
.loc 2 1907 41 view .LVU3478
.loc 2 1908 5 view .LVU3479
.LBB9359:
.loc 2 1909 9 view .LVU3480
# xxh3.h:1909: { xxh_u64 const low64 = XXH3_mergeAccs(acc, secret + XXH_SECRET_MERGEACCS_START, (xxh_u64)len * PRIME64_1);
.loc 2 1909 31 is_stmt 0 view .LVU3481
movabs r8, -7046029288634856825 # tmp364,
lea rdx, 43[rsp] # tmp366,
mov rcx, r13 #, tmp254
imul r8, rbx #, len
vzeroupper
call XXH3_mergeAccs #
.LVL641:
# xxh3.h:1910: xxh_u64 const high64 = XXH3_mergeAccs(acc, secret + secretSize - sizeof(acc) - XXH_SECRET_MERGEACCS_START, ~((xxh_u64)len * PRIME64_2));
.loc 2 1910 32 view .LVU3482
lea rdx, 149[rsp] # tmp371,
# xxh3.h:1910: xxh_u64 const high64 = XXH3_mergeAccs(acc, secret + secretSize - sizeof(acc) - XXH_SECRET_MERGEACCS_START, ~((xxh_u64)len * PRIME64_2));
.loc 2 1910 131 view .LVU3483
movabs r8, -4417276706812531889 # tmp368,
imul r8, rbx # tmp367, len
# xxh3.h:1909: { xxh_u64 const low64 = XXH3_mergeAccs(acc, secret + XXH_SECRET_MERGEACCS_START, (xxh_u64)len * PRIME64_1);
.loc 2 1909 31 view .LVU3484
mov rsi, rax # low64, tmp380
.LVL642:
.loc 2 1910 9 is_stmt 1 view .LVU3485
# xxh3.h:1910: xxh_u64 const high64 = XXH3_mergeAccs(acc, secret + secretSize - sizeof(acc) - XXH_SECRET_MERGEACCS_START, ~((xxh_u64)len * PRIME64_2));
.loc 2 1910 32 is_stmt 0 view .LVU3486
not r8 #
call XXH3_mergeAccs #
.LVL643:
.loc 2 1911 9 is_stmt 1 view .LVU3487
.loc 2 1912 9 view .LVU3488
# xxh3.h:1912: return h128;
.loc 2 1912 16 is_stmt 0 view .LVU3489
mov QWORD PTR [r12], rsi # MEM[(struct *)&<retval>], low64
mov QWORD PTR 8[r12], rax # MEM[(struct *)&<retval> + 8B], tmp381
.LVL644:
.L147:
.loc 2 1912 16 view .LVU3490
.LBE9359:
.LBE9363:
.LBE9367:
# xxh3.h:1948: }
.loc 2 1948 1 view .LVU3491
vmovaps xmm6, XMMWORD PTR 304[rsp] #,
mov rax, r12 #, .result_ptr
add rsp, 328 #,
.cfi_remember_state
.cfi_restore 23
.cfi_def_cfa_offset 40
pop rbx #
.cfi_restore 3
.cfi_def_cfa_offset 32
.LVL645:
.loc 2 1948 1 view .LVU3492
pop rsi #
.cfi_restore 4
.cfi_def_cfa_offset 24
pop r12 #
.cfi_restore 12
.cfi_def_cfa_offset 16
.LVL646:
.loc 2 1948 1 view .LVU3493
pop r13 #
.cfi_restore 13
.cfi_def_cfa_offset 8
ret
.LVL647:
.L171:
.cfi_restore_state
.LBB9368:
.LBB9364:
.LBB9360:
.LBB9352:
.LBB9346:
.LBB9290:
.loc 2 1316 13 is_stmt 1 view .LVU3494
.loc 2 1319 13 view .LVU3495
.LBB9291:
.LBI9291:
.loc 2 921 1 view .LVU3496
.LBE9291:
.LBE9290:
.LBE9346:
.LBE9352:
.LBE9360:
.LBE9364:
.LBE9368:
.loc 2 928 5 view .LVU3497
.LBB9369:
.LBB9365:
.LBB9361:
.LBB9353:
.LBB9347:
.LBB9344:
.LBB9343:
.LBB9292:
.loc 2 929 9 view .LVU3498
.loc 2 932 9 view .LVU3499
.loc 2 935 9 view .LVU3500
.loc 2 937 9 view .LVU3501
.loc 2 938 9 view .LVU3502
.loc 2 938 19 view .LVU3503
.LBB9293:
.loc 2 940 13 view .LVU3504
.LBB9294:
.LBI9294:
.loc 4 919 1 view .LVU3505
.LBB9295:
.loc 4 921 3 view .LVU3506
.loc 4 921 3 is_stmt 0 view .LVU3507
.LBE9295:
.LBE9294:
.loc 2 942 13 is_stmt 1 view .LVU3508
.LBB9298:
.LBI9298:
.loc 4 919 1 view .LVU3509
.LBB9299:
.loc 4 921 3 view .LVU3510
.loc 4 921 3 is_stmt 0 view .LVU3511
.LBE9299:
.LBE9298:
.loc 2 944 13 is_stmt 1 view .LVU3512
.LBB9301:
.LBI9301:
.loc 3 913 1 view .LVU3513
.LBB9302:
.loc 3 915 3 view .LVU3514
.loc 3 915 3 is_stmt 0 view .LVU3515
.LBE9302:
.LBE9301:
.loc 2 946 13 is_stmt 1 view .LVU3516
.LBB9306:
.LBI9306:
.loc 3 597 1 view .LVU3517
.LBB9307:
.loc 3 599 3 view .LVU3518
.LBE9307:
.LBE9306:
.LBB9311:
.LBB9303:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU3519
vmovdqu ymm5, YMMWORD PTR 153[rsp] # tmp399, MEM[(const __m256i_u * {ref-all})&secret + 121B]
vpxor ymm0, ymm5, YMMWORD PTR -64[r10+rbx] # tmp345, tmp399, MEM[(const __m256i_u * {ref-all})_175]
.LVL648:
.loc 3 915 33 view .LVU3520
.LBE9303:
.LBE9311:
.LBB9312:
.LBB9308:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 view .LVU3521
vpshufd ymm1, ymm0, 49 # tmp346, tmp345,
.LVL649:
.loc 3 599 19 view .LVU3522
.LBE9308:
.LBE9312:
.loc 2 948 13 is_stmt 1 view .LVU3523
.LBB9313:
.LBI9313:
.loc 3 567 1 view .LVU3524
.LBB9314:
.loc 3 569 3 view .LVU3525
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU3526
vpmuludq ymm0, ymm0, ymm1 # tmp348, tmp345, tmp346
.LVL650:
.loc 3 569 19 view .LVU3527
.LBE9314:
.LBE9313:
.loc 2 949 13 is_stmt 1 view .LVU3528
.LBB9316:
.loc 2 951 17 view .LVU3529
.LBB9317:
.LBI9317:
.loc 3 597 1 view .LVU3530
.LBB9318:
.loc 3 599 3 view .LVU3531
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 is_stmt 0 view .LVU3532
vpshufd ymm1, YMMWORD PTR -64[r10+rbx], 78 # tmp349, MEM[(const __m256i_u * {ref-all})_175],
.LVL651:
.loc 3 599 19 view .LVU3533
.LBE9318:
.LBE9317:
.loc 2 952 17 is_stmt 1 view .LVU3534
.LBB9321:
.LBI9321:
.loc 3 126 1 view .LVU3535
.LBB9322:
.loc 3 128 3 view .LVU3536
.loc 3 128 3 is_stmt 0 view .LVU3537
.LBE9322:
.LBE9321:
.loc 2 954 17 is_stmt 1 view .LVU3538
.LBB9324:
.LBI9324:
.loc 3 126 1 view .LVU3539
.LBB9325:
.loc 3 128 3 view .LVU3540
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 is_stmt 0 view .LVU3541
vpaddq ymm0, ymm0, ymm1 # tmp351, tmp348, tmp349
.LVL652:
.loc 3 128 33 view .LVU3542
vpaddq ymm0, ymm0, YMMWORD PTR 0[r13] # tmp352, tmp351, MEM[(__m256i * {ref-all})&acc]
.LBE9325:
.LBE9324:
.LBE9316:
.LBB9331:
.LBB9296:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avxintrin.h:921: return *__P;
.loc 4 921 10 view .LVU3543
vmovdqu ymm1, YMMWORD PTR -32[r10+rbx] # MEM[(const __m256i_u * {ref-all})_202], MEM[(const __m256i_u * {ref-all})_202]
.LVL653:
.loc 4 921 10 view .LVU3544
.LBE9296:
.LBE9331:
.LBB9332:
# xxh3.h:954: xacc[i] = _mm256_add_epi64(product, sum);
.loc 2 954 25 view .LVU3545
vmovdqa YMMWORD PTR 0[r13], ymm0 # MEM[(__m256i * {ref-all})&acc], tmp352
.loc 2 954 25 view .LVU3546
.LBE9332:
.LBE9293:
.loc 2 938 51 is_stmt 1 view .LVU3547
.LVL654:
.loc 2 938 19 view .LVU3548
.LBB9342:
.loc 2 940 13 view .LVU3549
.LBB9333:
.loc 4 919 1 view .LVU3550
.LBB9297:
.loc 4 921 3 view .LVU3551
.loc 4 921 3 is_stmt 0 view .LVU3552
.LBE9297:
.LBE9333:
.loc 2 942 13 is_stmt 1 view .LVU3553
.LBB9334:
.loc 4 919 1 view .LVU3554
.LBB9300:
.loc 4 921 3 view .LVU3555
.loc 4 921 3 is_stmt 0 view .LVU3556
.LBE9300:
.LBE9334:
.loc 2 944 13 is_stmt 1 view .LVU3557
.LBB9335:
.loc 3 913 1 view .LVU3558
.LBB9304:
.loc 3 915 3 view .LVU3559
.loc 3 915 3 is_stmt 0 view .LVU3560
.LBE9304:
.LBE9335:
.loc 2 946 13 is_stmt 1 view .LVU3561
.LBB9336:
.loc 3 597 1 view .LVU3562
.LBB9309:
.loc 3 599 3 view .LVU3563
.LBE9309:
.LBE9336:
.LBB9337:
.LBB9305:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:915: return (__m256i) ((__v4du)__A ^ (__v4du)__B);
.loc 3 915 33 is_stmt 0 view .LVU3564
vpxor ymm0, ymm1, YMMWORD PTR 185[rsp] # tmp355, MEM[(const __m256i_u * {ref-all})_202], MEM[(const __m256i_u * {ref-all})&secret + 153B]
.LVL655:
.loc 3 915 33 view .LVU3565
.LBE9305:
.LBE9337:
.LBB9338:
.LBB9327:
.LBB9319:
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:599: return (__m256i)__builtin_ia32_pshufd256 ((__v8si)__A, __mask);
.loc 3 599 19 view .LVU3566
vpshufd ymm1, ymm1, 78 # tmp359, MEM[(const __m256i_u * {ref-all})_202],
.LVL656:
.loc 3 599 19 view .LVU3567
.LBE9319:
.LBE9327:
.LBE9338:
.LBB9339:
.LBB9310:
vpshufd ymm2, ymm0, 49 # tmp356, tmp355,
.LVL657:
.loc 3 599 19 view .LVU3568
.LBE9310:
.LBE9339:
.loc 2 948 13 is_stmt 1 view .LVU3569
.LBB9340:
.loc 3 567 1 view .LVU3570
.LBB9315:
.loc 3 569 3 view .LVU3571
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:569: return (__m256i)__builtin_ia32_pmuludq256 ((__v8si)__A, (__v8si)__B);
.loc 3 569 19 is_stmt 0 view .LVU3572
vpmuludq ymm0, ymm0, ymm2 # tmp358, tmp355, tmp356
.LVL658:
.loc 3 569 19 view .LVU3573
.LBE9315:
.LBE9340:
.loc 2 949 13 is_stmt 1 view .LVU3574
.LBB9341:
.loc 2 951 17 view .LVU3575
.LBB9328:
.loc 3 597 1 view .LVU3576
.LBB9320:
.loc 3 599 3 view .LVU3577
.loc 3 599 3 is_stmt 0 view .LVU3578
.LBE9320:
.LBE9328:
.loc 2 952 17 is_stmt 1 view .LVU3579
.LBB9329:
.loc 3 126 1 view .LVU3580
.LBB9323:
.loc 3 128 3 view .LVU3581
.loc 3 128 3 is_stmt 0 view .LVU3582
.LBE9323:
.LBE9329:
.loc 2 954 17 is_stmt 1 view .LVU3583
.LBB9330:
.loc 3 126 1 view .LVU3584
.LBB9326:
.loc 3 128 3 view .LVU3585
# C:/msys64/mingw64/lib/gcc/x86_64-w64-mingw32/9.2.0/include/avx2intrin.h:128: return (__m256i) ((__v4du)__A + (__v4du)__B);
.loc 3 128 33 is_stmt 0 view .LVU3586
vpaddq ymm0, ymm0, ymm1 # tmp361, tmp358, tmp359
.LVL659:
.loc 3 128 33 view .LVU3587
vpaddq ymm0, ymm0, YMMWORD PTR 32[r13] # tmp362, tmp361, MEM[(__m256i * {ref-all})&acc + 32B]
.LBE9326:
.LBE9330:
# xxh3.h:954: xacc[i] = _mm256_add_epi64(product, sum);
.loc 2 954 25 view .LVU3588
vmovdqa YMMWORD PTR 32[r13], ymm0 # MEM[(__m256i * {ref-all})&acc + 32B], tmp362
.LVL660:
.loc 2 954 25 view .LVU3589
.LBE9341:
.LBE9342:
.loc 2 938 51 is_stmt 1 view .LVU3590
.loc 2 938 19 view .LVU3591
jmp .L157 #
.LVL661:
.L148:
.loc 2 938 19 is_stmt 0 view .LVU3592
.LBE9292:
.LBE9343:
.LBE9344:
.LBE9347:
.LBE9353:
.LBE9361:
.LBE9365:
.LBE9369:
.loc 2 1945 20 is_stmt 1 discriminator 1 view .LVU3593
# xxh3.h:1945: if (seed == 0) return XXH3_hashLong_128b_defaultSecret(input, len);
.loc 2 1945 27 is_stmt 0 discriminator 1 view .LVU3594
call XXH3_hashLong_128b_defaultSecret #
.LVL662:
.loc 2 1945 27 discriminator 1 view .LVU3595
jmp .L147 #
.cfi_endproc
.LFE5368:
.seh_endproc
.p2align 4
.def XXH3_len_129to240_64b.isra.0; .scl 3; .type 32; .endef
.seh_proc XXH3_len_129to240_64b.isra.0
XXH3_len_129to240_64b.isra.0:
.LVL663:
.LFB5383:
.loc 2 837 1 is_stmt 1 view -0
.cfi_startproc
.loc 2 837 1 is_stmt 0 view .LVU3597
push r15 #
.seh_pushreg r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14 #
.seh_pushreg r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push rdi #
.seh_pushreg rdi
.cfi_def_cfa_offset 32
.cfi_offset 5, -32
push rsi #
.seh_pushreg rsi
.cfi_def_cfa_offset 40
.cfi_offset 4, -40
push rbx #
.seh_pushreg rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
.seh_endprologue
.LVL664:
.loc 2 841 5 is_stmt 1 view .LVU3598
.loc 2 841 53 view .LVU3599
.loc 2 842 5 view .LVU3600
.LBB9370:
.loc 2 847 9 view .LVU3601
# xxh3.h:847: { xxh_u64 acc = len * PRIME64_1;
.loc 2 847 17 is_stmt 0 view .LVU3602
movabs rsi, -7046029288634856825 # tmp144,
imul rsi, rdx # acc, len
.LVL665:
.loc 2 848 9 is_stmt 1 view .LVU3603
# xxh3.h:848: int const nbRounds = (int)len / 16;
.loc 2 848 19 is_stmt 0 view .LVU3604
lea ebx, 15[rdx] # tmp146,
test edx, edx # len
.LBE9370:
# xxh3.h:837: XXH3_len_129to240_64b(const xxh_u8* XXH_RESTRICT input, size_t len,
.loc 2 837 1 view .LVU3605
mov r11, rdx # len, tmp189
.LBB9439:
# xxh3.h:848: int const nbRounds = (int)len / 16;
.loc 2 848 19 view .LVU3606
cmovns ebx, edx # tmp146,, _3, len
xor r10d, r10d # ivtmp.564
sar ebx, 4 # tmp147,
.LVL666:
.loc 2 849 9 is_stmt 1 view .LVU3607
.loc 2 850 9 view .LVU3608
.loc 2 850 19 view .LVU3609
.p2align 4,,10
.p2align 3
.L173:
.loc 2 851 13 view .LVU3610
.LBB9371:
.LBI9371:
.loc 2 773 26 view .LVU3611
.LBB9372:
.loc 2 796 9 view .LVU3612
.loc 2 796 9 is_stmt 0 view .LVU3613
.LBE9372:
.LBE9371:
.LBE9439:
.loc 1 1550 5 is_stmt 1 view .LVU3614
.loc 1 1492 5 view .LVU3615
.loc 1 1493 5 view .LVU3616
.loc 1 1494 5 view .LVU3617
.LBB9440:
.LBB9384:
.LBB9381:
.loc 2 797 9 view .LVU3618
.loc 2 797 9 is_stmt 0 view .LVU3619
.LBE9381:
.LBE9384:
.LBE9440:
.loc 1 1550 5 is_stmt 1 view .LVU3620
.loc 1 1492 5 view .LVU3621
.loc 1 1493 5 view .LVU3622
.loc 1 1494 5 view .LVU3623
.LBB9441:
.LBB9385:
.LBB9382:
.loc 2 798 9 view .LVU3624
.loc 2 798 9 is_stmt 0 view .LVU3625
.LBE9382:
.LBE9385:
.LBE9441:
.loc 1 1550 5 is_stmt 1 view .LVU3626
.loc 1 1492 5 view .LVU3627
.loc 1 1493 5 view .LVU3628
.loc 1 1494 5 view .LVU3629
.loc 1 1550 5 view .LVU3630
.loc 1 1492 5 view .LVU3631
.loc 1 1493 5 view .LVU3632
.loc 1 1494 5 view .LVU3633
.LBB9442:
.LBB9386:
.LBB9383:
.LBB9373:
.LBI9373:
.loc 2 616 1 view .LVU3634
.LBB9374:
.loc 2 618 5 view .LVU3635
.LBB9375:
.LBI9375:
.loc 2 507 1 view .LVU3636
.LBB9376:
.loc 2 528 5 view .LVU3637
.LBE9376:
.LBE9375:
.LBE9374:
.LBE9373:
# xxh3.h:799: input_lo ^ (XXH_readLE64(secret) + seed64),
.loc 2 799 48 is_stmt 0 view .LVU3638
mov rax, QWORD PTR [r8+r10] # tmp148, MEM[base: secret_8(D), index: ivtmp.564_187, offset: 0B]
add rax, r9 # tmp148, seed
# xxh3.h:798: return XXH3_mul128_fold64(
.loc 2 798 16 view .LVU3639
xor rax, QWORD PTR [rcx+r10] # tmp148, MEM[base: input_10(D), index: ivtmp.564_187, offset: 0B]
.LVL667:
.loc 2 798 16 view .LVU3640
mov rdi, rax # tmp150, tmp148
# xxh3.h:800: input_hi ^ (XXH_readLE64(secret+8) - seed64)
.loc 2 800 48 view .LVU3641
mov rax, QWORD PTR 8[r8+r10] # tmp151, MEM[base: secret_8(D), index: ivtmp.564_187, offset: 8B]
.LVL668:
.loc 2 800 48 view .LVU3642
sub rax, r9 # tmp151, seed
# xxh3.h:798: return XXH3_mul128_fold64(
.loc 2 798 16 view .LVU3643
xor rax, QWORD PTR 8[rcx+r10] # tmp151, MEM[base: input_10(D), index: ivtmp.564_187, offset: 8B]
add r10, 16 # ivtmp.564,
.LVL669:
.LBB9380:
.LBB9379:
.LBB9378:
.LBB9377:
# xxh3.h:528: __uint128_t product = (__uint128_t)lhs * (__uint128_t)rhs;
.loc 2 528 17 view .LVU3644
mul rdi # tmp150
.loc 2 529 5 is_stmt 1 view .LVU3645
.LVL670:
.loc 2 530 5 view .LVU3646
.loc 2 530 5 is_stmt 0 view .LVU3647
.LBE9377:
.LBE9378:
.loc 2 619 5 is_stmt 1 view .LVU3648
# xxh3.h:619: return product.low64 ^ product.high64;
.loc 2 619 26 is_stmt 0 view .LVU3649
xor rax, rdx # tmp155, tmp182
.LVL671:
.loc 2 619 26 view .LVU3650
.LBE9379:
.LBE9380:
.LBE9383:
.LBE9386:
# xxh3.h:851: acc += XXH3_mix16B(input+(16*i), secret+(16*i), seed);
.loc 2 851 17 view .LVU3651
add rsi, rax # acc, tmp155
.LVL672:
.loc 2 850 24 is_stmt 1 view .LVU3652
.loc 2 850 19 view .LVU3653
# xxh3.h:850: for (i=0; i<8; i++) {
.loc 2 850 9 is_stmt 0 view .LVU3654
cmp r10, 128 # ivtmp.564,
jne .L173 #,
.loc 2 853 9 is_stmt 1 view .LVU3655
.LVL673:
.LBB9387:
.LBI9387:
.loc 2 634 21 view .LVU3656
.LBB9388:
.loc 2 636 5 view .LVU3657
.LBB9389:
.LBI9389:
.loc 2 623 26 view .LVU3658
.LBB9390:
.loc 2 625 5 view .LVU3659
.loc 2 626 5 view .LVU3660
.loc 2 626 5 is_stmt 0 view .LVU3661
.LBE9390:
.LBE9389:
.loc 2 637 5 is_stmt 1 view .LVU3662
.LBB9392:
.LBB9391:
# xxh3.h:626: return v64 ^ (v64 >> shift);
.loc 2 626 23 is_stmt 0 view .LVU3663
mov rdi, rsi # tmp156, acc
shr rdi, 37 # tmp156,
# xxh3.h:626: return v64 ^ (v64 >> shift);
.loc 2 626 16 view .LVU3664
xor rsi, rdi # tmp157, tmp156
.LVL674:
.loc 2 626 16 view .LVU3665
.LBE9391:
.LBE9392:
# xxh3.h:637: h64 *= 0x165667919E3779F9ULL;
.loc 2 637 9 view .LVU3666
movabs rdi, 1609587791953885689 # tmp158,
imul rsi, rdi # h64, tmp158
.LVL675:
.loc 2 638 5 is_stmt 1 view .LVU3667
.LBB9393:
.LBI9393:
.loc 2 623 26 view .LVU3668
.LBB9394:
.loc 2 625 5 view .LVU3669
.loc 2 626 5 view .LVU3670
# xxh3.h:626: return v64 ^ (v64 >> shift);
.loc 2 626 23 is_stmt 0 view .LVU3671
mov rdi, rsi # tmp159, h64
shr rdi, 32 # tmp159,
# xxh3.h:626: return v64 ^ (v64 >> shift);
.loc 2 626 16 view .LVU3672
xor rdi, rsi # acc, h64
.LVL676:
.loc 2 626 16 view .LVU3673
.LBE9394:
.LBE9393:
.loc 2 639 5 is_stmt 1 view .LVU3674
.loc 2 639 5 is_stmt 0 view .LVU3675
.LBE9388:
.LBE9387:
.loc 2 854 9 is_stmt 1 view .LVU3676
.loc 2 880 9 view .LVU3677
.loc 2 880 20 view .LVU3678
# xxh3.h:880: for (i=8 ; i < nbRounds; i++) {
.loc 2 880 9 is_stmt 0 view .LVU3679
cmp r11d, 143 # len,
jle .L174 #,
xor r10d, r10d # ivtmp.553
.LVL677:
# xxh3.h:880: for (i=8 ; i < nbRounds; i++) {
.loc 2 880 15 view .LVU3680
mov esi, 8 # i,
.LVL678:
.p2align 4,,10
.p2align 3
.L175:
.loc 2 881 13 is_stmt 1 view .LVU3681
.LBB9395:
.LBI9395:
.loc 2 773 26 view .LVU3682
.LBB9396:
.loc 2 796 9 view .LVU3683
.loc 2 796 9 is_stmt 0 view .LVU3684
.LBE9396:
.LBE9395:
.LBE9442:
.loc 1 1550 5 is_stmt 1 view .LVU3685
.loc 1 1492 5 view .LVU3686
.loc 1 1493 5 view .LVU3687
.loc 1 1494 5 view .LVU3688
.LBB9443:
.LBB9409:
.LBB9405:
.loc 2 797 9 view .LVU3689
.loc 2 797 9 is_stmt 0 view .LVU3690
.LBE9405:
.LBE9409:
.LBE9443:
.loc 1 1550 5 is_stmt 1 view .LVU3691
.loc 1 1492 5 view .LVU3692
.loc 1 1493 5 view .LVU3693
.loc 1 1494 5 view .LVU3694
.LBB9444:
.LBB9410:
.LBB9406:
.loc 2 798 9 view .LVU3695
.loc 2 798 9 is_stmt 0 view .LVU3696
.LBE9406:
.LBE9410:
.LBE9444:
.loc 1 1550 5 is_stmt 1 view .LVU3697
.loc 1 1492 5 view .LVU3698
.loc 1 1493 5 view .LVU3699
.loc 1 1494 5 view .LVU3700
.loc 1 1550 5 view .LVU3701
.loc 1 1492 5 view .LVU3702
.loc 1 1493 5 view .LVU3703
.loc 1 1494 5 view .LVU3704
.LBB9445:
.LBB9411:
.LBB9407:
.LBB9397:
.LBI9397:
.loc 2 616 1 view .LVU3705
.LBB9398:
.loc 2 618 5 view .LVU3706
.LBB9399:
.LBI9399:
.loc 2 507 1 view .LVU3707
.LBB9400:
.loc 2 528 5 view .LVU3708
.LBE9400:
.LBE9399:
.LBE9398:
.LBE9397:
# xxh3.h:799: input_lo ^ (XXH_readLE64(secret) + seed64),
.loc 2 799 48 is_stmt 0 view .LVU3709
mov rax, QWORD PTR 3[r8+r10] # tmp160, MEM[base: secret_8(D), index: ivtmp.553_189, offset: 3B]
.LBE9407:
.LBE9411:
# xxh3.h:880: for (i=8 ; i < nbRounds; i++) {
.loc 2 880 35 view .LVU3710
add esi, 1 # i,
.LVL679:
.LBB9412:
.LBB9408:
# xxh3.h:799: input_lo ^ (XXH_readLE64(secret) + seed64),
.loc 2 799 48 view .LVU3711
add rax, r9 # tmp160, seed
# xxh3.h:798: return XXH3_mul128_fold64(
.loc 2 798 16 view .LVU3712
xor rax, QWORD PTR 128[rcx+r10] # tmp160, MEM[base: input_10(D), index: ivtmp.553_189, offset: 128B]
mov r15, rax # tmp162, tmp160
# xxh3.h:800: input_hi ^ (XXH_readLE64(secret+8) - seed64)
.loc 2 800 48 view .LVU3713
mov rax, QWORD PTR 11[r8+r10] # tmp163, MEM[base: secret_8(D), index: ivtmp.553_189, offset: 11B]
sub rax, r9 # tmp163, seed
# xxh3.h:798: return XXH3_mul128_fold64(
.loc 2 798 16 view .LVU3714
xor rax, QWORD PTR 136[rcx+r10] # tmp163, MEM[base: input_10(D), index: ivtmp.553_189, offset: 136B]
add r10, 16 # ivtmp.553,
.LVL680:
.LBB9404:
.LBB9403:
.LBB9402:
.LBB9401:
# xxh3.h:528: __uint128_t product = (__uint128_t)lhs * (__uint128_t)rhs;
.loc 2 528 17 view .LVU3715
mul r15 # tmp162
.loc 2 529 5 is_stmt 1 view .LVU3716
.LVL681:
.loc 2 530 5 view .LVU3717
.loc 2 530 5 is_stmt 0 view .LVU3718
.LBE9401:
.LBE9402:
.loc 2 619 5 is_stmt 1 view .LVU3719
# xxh3.h:619: return product.low64 ^ product.high64;
.loc 2 619 26 is_stmt 0 view .LVU3720
xor rax, rdx # tmp167, tmp184
.LVL682:
.loc 2 619 26 view .LVU3721
.LBE9403:
.LBE9404:
.LBE9408:
.LBE9412:
# xxh3.h:881: acc += XXH3_mix16B(input+(16*i), secret+(16*(i-8)) + XXH3_MIDSIZE_STARTOFFSET, seed);
.loc 2 881 17 view .LVU3722
add rdi, rax # acc, tmp167
.LVL683:
.loc 2 880 34 is_stmt 1 view .LVU3723
.loc 2 880 20 view .LVU3724
# xxh3.h:880: for (i=8 ; i < nbRounds; i++) {
.loc 2 880 9 is_stmt 0 view .LVU3725
cmp ebx, esi # tmp147, i
jg .L175 #,
.LVL684:
.L174:
.loc 2 884 9 is_stmt 1 view .LVU3726
# xxh3.h:884: acc += XXH3_mix16B(input + len - 16, secret + XXH3_SECRET_SIZE_MIN - XXH3_MIDSIZE_LASTOFFSET, seed);
.loc 2 884 16 is_stmt 0 view .LVU3727
lea rcx, -16[rcx+r11] # _65,
.LVL685:
.LBB9413:
.LBI9413:
.loc 2 773 26 is_stmt 1 view .LVU3728
.LBB9414:
.loc 2 796 9 view .LVU3729
.loc 2 796 9 is_stmt 0 view .LVU3730
.LBE9414:
.LBE9413:
.LBE9445:
.loc 1 1550 5 is_stmt 1 view .LVU3731
.loc 1 1492 5 view .LVU3732
.loc 1 1493 5 view .LVU3733
.loc 1 1494 5 view .LVU3734
.LBB9446:
.LBB9426:
.LBB9423:
.loc 2 797 9 view .LVU3735
.loc 2 797 9 is_stmt 0 view .LVU3736
.LBE9423:
.LBE9426:
.LBE9446:
.loc 1 1550 5 is_stmt 1 view .LVU3737
.loc 1 1492 5 view .LVU3738
.loc 1 1493 5 view .LVU3739
.loc 1 1494 5 view .LVU3740
.LBB9447:
.LBB9427:
.LBB9424:
.loc 2 798 9 view .LVU3741
.loc 2 798 9 is_stmt 0 view .LVU3742
.LBE9424:
.LBE9427:
.LBE9447:
.loc 1 1550 5 is_stmt 1 view .LVU3743
.loc 1 1492 5 view .LVU3744
.loc 1 1493 5 view .LVU3745
.loc 1 1494 5 view .LVU3746
.loc 1 1550 5 view .LVU3747
.loc 1 1492 5 view .LVU3748
.loc 1 1493 5 view .LVU3749
.loc 1 1494 5 view .LVU3750
.LBB9448:
.LBB9428:
.LBB9425:
.LBB9415:
.LBI9415:
.loc 2 616 1 view .LVU3751
.LBB9416:
.loc 2 618 5 view .LVU3752
.LBB9417:
.LBI9417:
.loc 2 507 1 view .LVU3753
.LBB9418:
.loc 2 528 5 view .LVU3754
.LBE9418:
.LBE9417:
.LBE9416:
.LBE9415:
# xxh3.h:799: input_lo ^ (XXH_readLE64(secret) + seed64),
.loc 2 799 48 is_stmt 0 view .LVU3755
mov rdx, QWORD PTR 119[r8] # tmp169, MEM[(char * {ref-all})secret_8(D) + 119B]
.LVL686:
# xxh3.h:800: input_hi ^ (XXH_readLE64(secret+8) - seed64)
.loc 2 800 48 view .LVU3756
mov rax, QWORD PTR 127[r8] # MEM[(char * {ref-all})secret_8(D) + 127B], MEM[(char * {ref-all})secret_8(D) + 127B]
# xxh3.h:798: return XXH3_mul128_fold64(
.loc 2 798 16 view .LVU3757
mov rbx, QWORD PTR [rcx] # tmp169, MEM[(char * {ref-all})_65]
.LVL687:
# xxh3.h:799: input_lo ^ (XXH_readLE64(secret) + seed64),
.loc 2 799 48 view .LVU3758
add rdx, r9 # tmp169, seed
# xxh3.h:800: input_hi ^ (XXH_readLE64(secret+8) - seed64)
.loc 2 800 48 view .LVU3759
sub rax, r9 # tmp172, seed
# xxh3.h:798: return XXH3_mul128_fold64(
.loc 2 798 16 view .LVU3760
xor rax, QWORD PTR 8[rcx] # tmp172, MEM[(char * {ref-all})_65 + 8B]
.LVL688:
.loc 2 798 16 view .LVU3761
xor rbx, rdx # tmp169, tmp169
.LVL689:
.LBB9422:
.LBB9421:
.LBB9420:
.LBB9419:
# xxh3.h:528: __uint128_t product = (__uint128_t)lhs * (__uint128_t)rhs;
.loc 2 528 17 view .LVU3762
mul rbx # tmp171
.LVL690:
.loc 2 529 5 is_stmt 1 view .LVU3763
.loc 2 530 5 view .LVU3764
.loc 2 530 5 is_stmt 0 view .LVU3765
.LBE9419:
.LBE9420:
.loc 2 619 5 is_stmt 1 view .LVU3766
# xxh3.h:619: return product.low64 ^ product.high64;
.loc 2 619 26 is_stmt 0 view .LVU3767
xor rdx, rax # tmp176, product
.LVL691:
.loc 2 619 26 view .LVU3768
.LBE9421:
.LBE9422:
.LBE9425:
.LBE9428:
# xxh3.h:884: acc += XXH3_mix16B(input + len - 16, secret + XXH3_SECRET_SIZE_MIN - XXH3_MIDSIZE_LASTOFFSET, seed);
.loc 2 884 13 view .LVU3769
add rdi, rdx # acc, tmp176
.LVL692:
.loc 2 885 9 is_stmt 1 view .LVU3770
.LBB9429:
.LBI9429:
.loc 2 634 21 view .LVU3771
.LBB9430:
.loc 2 636 5 view .LVU3772
.LBB9431:
.LBI9431:
.loc 2 623 26 view .LVU3773
.LBB9432:
.loc 2 625 5 view .LVU3774
.loc 2 626 5 view .LVU3775
.loc 2 626 5 is_stmt 0 view .LVU3776
.LBE9432:
.LBE9431:
.loc 2 637 5 is_stmt 1 view .LVU3777
.LBB9434:
.LBB9433:
# xxh3.h:626: return v64 ^ (v64 >> shift);
.loc 2 626 23 is_stmt 0 view .LVU3778
mov rax, rdi # tmp177, acc
.LVL693:
.loc 2 626 23 view .LVU3779
shr rax, 37 # tmp177,
# xxh3.h:626: return v64 ^ (v64 >> shift);
.loc 2 626 16 view .LVU3780
xor rax, rdi # tmp178, acc
.LVL694:
.loc 2 626 16 view .LVU3781
.LBE9433:
.LBE9434:
# xxh3.h:637: h64 *= 0x165667919E3779F9ULL;
.loc 2 637 9 view .LVU3782
movabs rdi, 1609587791953885689 # tmp179,
.LVL695:
.loc 2 637 9 view .LVU3783
imul rax, rdi # h64, tmp179
.LVL696:
.loc 2 638 5 is_stmt 1 view .LVU3784
.LBB9435:
.LBI9435:
.loc 2 623 26 view .LVU3785
.LBB9436:
.loc 2 625 5 view .LVU3786
.loc 2 626 5 view .LVU3787
.loc 2 626 5 is_stmt 0 view .LVU3788
.LBE9436:
.LBE9435:
.loc 2 639 5 is_stmt 1 view .LVU3789
.LBB9438:
.LBB9437:
# xxh3.h:626: return v64 ^ (v64 >> shift);
.loc 2 626 23 is_stmt 0 view .LVU3790
mov rdi, rax # tmp181, h64
shr rdi, 32 # tmp181,
# xxh3.h:626: return v64 ^ (v64 >> shift);
.loc 2 626 16 view .LVU3791
xor rax, rdi # tmp180, tmp181
.LBE9437:
.LBE9438:
.LBE9430:
.LBE9429:
.LBE9448:
# xxh3.h:887: }
.loc 2 887 1 view .LVU3792
pop rbx #
.cfi_restore 3
.cfi_def_cfa_offset 40
pop rsi #
.cfi_restore 4
.cfi_def_cfa_offset 32
pop rdi #
.cfi_restore 5
.cfi_def_cfa_offset 24
pop r14 #
.cfi_restore 14
.cfi_def_cfa_offset 16
pop r15 #
.cfi_restore 15
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE5383:
.seh_endproc
.p2align 4
.def XXH3_len_129to240_128b.isra.0; .scl 3; .type 32; .endef
.seh_proc XXH3_len_129to240_128b.isra.0
XXH3_len_129to240_128b.isra.0:
.LVL697:
.LFB5384:
.loc 2 1866 1 is_stmt 1 view -0
.cfi_startproc
.loc 2 1866 1 is_stmt 0 view .LVU3794
push r15 #
.seh_pushreg r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14 #
.seh_pushreg r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13 #
.seh_pushreg r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12 #
.seh_pushreg r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp #
.seh_pushreg rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rdi #
.seh_pushreg rdi
.cfi_def_cfa_offset 56
.cfi_offset 5, -56
push rsi #
.seh_pushreg rsi
.cfi_def_cfa_offset 64
.cfi_offset 4, -64
push rbx #
.seh_pushreg rbx
.cfi_def_cfa_offset 72
.cfi_offset 3, -72
sub rsp, 24 #,
.seh_stackalloc 24
.cfi_def_cfa_offset 96
.seh_endprologue
.LVL698:
.loc 2 1870 5 is_stmt 1 view .LVU3795
.loc 2 1870 53 view .LVU3796
.loc 2 1871 5 view .LVU3797
.LBB9449:
.loc 2 1873 9 view .LVU3798
.loc 2 1874 9 view .LVU3799
# xxh3.h:1876: acc.low64 = len * PRIME64_1;
.loc 2 1876 25 is_stmt 0 view .LVU3800
movabs r10, -7046029288634856825 # tmp230,
.LBE9449:
# xxh3.h:1866: XXH3_len_129to240_128b(const xxh_u8* XXH_RESTRICT input, size_t len,
.loc 2 1866 1 view .LVU3801
mov r11, QWORD PTR 128[rsp] # seed, seed
.LBB9751:
# xxh3.h:1874: int const nbRounds = (int)len / 32;
.loc 2 1874 19 view .LVU3802
test r8d, r8d # len
lea r13d, 31[r8] # tmp228,
.LBE9751:
# xxh3.h:1866: XXH3_len_129to240_128b(const xxh_u8* XXH_RESTRICT input, size_t len,
.loc 2 1866 1 view .LVU3803
mov QWORD PTR 96[rsp], rcx # .result_ptr, tmp332
mov rsi, rdx # ivtmp.585, tmp333
.LBB9752:
# xxh3.h:1874: int const nbRounds = (int)len / 32;
.loc 2 1874 19 view .LVU3804
cmovns r13d, r8d # tmp228,, _2, len
# xxh3.h:1876: acc.low64 = len * PRIME64_1;
.loc 2 1876 25 view .LVU3805
imul r10, r8 # _35, len
mov rdi, r9 # ivtmp.586, secret
# xxh3.h:1877: acc.high64 = 0;
.loc 2 1877 20 view .LVU3806
xor ebx, ebx # _52
.LBE9752:
# xxh3.h:1866: XXH3_len_129to240_128b(const xxh_u8* XXH_RESTRICT input, size_t len,
.loc 2 1866 1 view .LVU3807
mov QWORD PTR 104[rsp], rdx # input, tmp333
lea r14, 128[rdx] # _390,
.LBB9753:
# xxh3.h:1874: int const nbRounds = (int)len / 32;
.loc 2 1874 19 view .LVU3808
sar r13d, 5 # tmp229,
.LVL699:
.loc 2 1875 9 is_stmt 1 view .LVU3809
.loc 2 1876 9 view .LVU3810
.loc 2 1877 9 view .LVU3811
.loc 2 1878 9 view .LVU3812
.loc 2 1878 19 view .LVU3813
.L179:
.loc 2 1879 13 view .LVU3814
.LBB9450:
.LBI9450:
.loc 2 1826 1 view .LVU3815
.LBB9451:
.loc 2 1828 5 view .LVU3816
.LBB9452:
.LBI9452:
.loc 2 773 26 view .LVU3817
.LBB9453:
.loc 2 796 9 view .LVU3818
.loc 2 796 9 is_stmt 0 view .LVU3819
.LBE9453:
.LBE9452:
.LBE9451:
.LBE9450:
.LBE9753:
.loc 1 1550 5 is_stmt 1 view .LVU3820
.loc 1 1492 5 view .LVU3821
.loc 1 1493 5 view .LVU3822
.LBB9754:
.LBB9511:
.LBB9502:
.LBB9472:
.LBB9466:
# xxh3.h:799: input_lo ^ (XXH_readLE64(secret) + seed64),
.loc 2 799 48 is_stmt 0 view .LVU3823
mov rax, QWORD PTR [rdi] # tmp231, MEM[base: _394, offset: 0B]
mov rcx, QWORD PTR [rsi] # _14, MEM[base: _399, offset: 0B]
.LVL700:
.loc 2 799 48 view .LVU3824
.LBE9466:
.LBE9472:
.LBE9502:
.LBE9511:
.LBE9754:
.loc 1 1494 5 is_stmt 1 view .LVU3825
.LBB9755:
.LBB9512:
.LBB9503:
.LBB9473:
.LBB9467:
.loc 2 797 9 view .LVU3826
.loc 2 797 9 is_stmt 0 view .LVU3827
.LBE9467:
.LBE9473:
.LBE9503:
.LBE9512:
.LBE9755:
.loc 1 1550 5 is_stmt 1 view .LVU3828
.loc 1 1492 5 view .LVU3829
.loc 1 1493 5 view .LVU3830
add rsi, 32 # ivtmp.585,
.LVL701:
.loc 1 1493 5 is_stmt 0 view .LVU3831
add rdi, 32 # ivtmp.586,
mov rbp, QWORD PTR -24[rsi] # _15, MEM[base: _399, offset: 8B]
.LVL702:
.loc 1 1494 5 is_stmt 1 view .LVU3832
.LBB9756:
.LBB9513:
.LBB9504:
.LBB9474:
.LBB9468:
.loc 2 798 9 view .LVU3833
.loc 2 798 9 is_stmt 0 view .LVU3834
.LBE9468:
.LBE9474:
.LBE9504:
.LBE9513:
.LBE9756:
.loc 1 1550 5 is_stmt 1 view .LVU3835
.loc 1 1492 5 view .LVU3836
.loc 1 1493 5 view .LVU3837
.loc 1 1494 5 view .LVU3838
.loc 1 1550 5 view .LVU3839
.loc 1 1492 5 view .LVU3840
.loc 1 1493 5 view .LVU3841
.loc 1 1494 5 view .LVU3842
.LBB9757:
.LBB9514:
.LBB9505:
.LBB9475:
.LBB9469:
.LBB9454:
.LBI9454:
.loc 2 616 1 view .LVU3843
.LBB9455:
.loc 2 618 5 view .LVU3844
.LBB9456:
.LBI9456:
.loc 2 507 1 view .LVU3845
.LBB9457:
.loc 2 528 5 view .LVU3846
mov r12, QWORD PTR -8[rsi] # _33, MEM[base: _399, offset: 24B]
.LBE9457:
.LBE9456:
.LBE9455:
.LBE9454:
# xxh3.h:799: input_lo ^ (XXH_readLE64(secret) + seed64),
.loc 2 799 48 is_stmt 0 view .LVU3847
add rax, r11 # tmp231, seed
# xxh3.h:798: return XXH3_mul128_fold64(
.loc 2 798 16 view .LVU3848
xor rax, rcx # tmp231, _14
.LBE9469:
.LBE9475:
# xxh3.h:1831: acc.high64 ^= XXH_readLE64(input_1) + XXH_readLE64(input_1 + 8);
.loc 2 1831 41 view .LVU3849
add rcx, rbp # tmp250, _15
.LVL703:
.LBB9476:
.LBB9470:
# xxh3.h:798: return XXH3_mul128_fold64(
.loc 2 798 16 view .LVU3850
mov r15, rax # tmp233, tmp231
# xxh3.h:800: input_hi ^ (XXH_readLE64(secret+8) - seed64)
.loc 2 800 48 view .LVU3851
mov rax, QWORD PTR -24[rdi] # tmp234, MEM[base: _394, offset: 8B]
sub rax, r11 # tmp234, seed
# xxh3.h:798: return XXH3_mul128_fold64(
.loc 2 798 16 view .LVU3852
xor rax, rbp # tmp234, _15
.LBB9464:
.LBB9462:
.LBB9460:
.LBB9458:
# xxh3.h:528: __uint128_t product = (__uint128_t)lhs * (__uint128_t)rhs;
.loc 2 528 17 view .LVU3853
mul r15 # tmp233
.LVL704:
.loc 2 529 5 is_stmt 1 view .LVU3854
.loc 2 530 5 view .LVU3855
.loc 2 530 5 is_stmt 0 view .LVU3856
.LBE9458:
.LBE9460:
.loc 2 619 5 is_stmt 1 view .LVU3857
.loc 2 619 5 is_stmt 0 view .LVU3858
.LBE9462:
.LBE9464:
.LBE9470:
.LBE9476:
.loc 2 1829 5 is_stmt 1 view .LVU3859
.loc 2 1829 5 is_stmt 0 view .LVU3860
.LBE9505:
.LBE9514:
.LBE9757:
.loc 1 1550 5 is_stmt 1 view .LVU3861
.loc 1 1492 5 view .LVU3862
.loc 1 1493 5 view .LVU3863
mov r15, QWORD PTR -16[rsi] # _32, MEM[base: _399, offset: 16B]
.LVL705:
.loc 1 1494 5 view .LVU3864
.loc 1 1550 5 view .LVU3865
.loc 1 1492 5 view .LVU3866
.loc 1 1493 5 view .LVU3867
.loc 1 1494 5 view .LVU3868
.LBB9758:
.LBB9515:
.LBB9506:
.LBB9477:
.LBB9471:
.LBB9465:
.LBB9463:
.LBB9461:
.LBB9459:
# xxh3.h:529: XXH128_hash_t const r128 = { (xxh_u64)(product), (xxh_u64)(product >> 64) };
.loc 2 529 72 is_stmt 0 view .LVU3869
mov QWORD PTR [rsp], rax # %sfp, product
.LBE9459:
.LBE9461:
# xxh3.h:619: return product.low64 ^ product.high64;
.loc 2 619 26 view .LVU3870
mov rax, QWORD PTR [rsp] # tmp238, %sfp
.loc 2 619 26 view .LVU3871
xor rax, rdx # tmp238, tmp320
.LVL706:
.loc 2 619 26 view .LVU3872
.LBE9463:
.LBE9465:
.LBE9471:
.LBE9477:
# xxh3.h:1828: acc.low64 += XXH3_mix16B (input_1, secret+0, seed);
.loc 2 1828 16 view .LVU3873
add r10, rax # tmp239, tmp238
.LVL707:
# xxh3.h:1829: acc.low64 ^= XXH_readLE64(input_2) + XXH_readLE64(input_2 + 8);
.loc 2 1829 41 view .LVU3874
lea rax, [r15+r12] # tmp240,
# xxh3.h:1829: acc.low64 ^= XXH_readLE64(input_2) + XXH_readLE64(input_2 + 8);
.loc 2 1829 16 view .LVU3875
xor r10, rax # _35, tmp240
.LVL708:
.loc 2 1830 5 is_stmt 1 view .LVU3876
.LBB9478:
.LBI9478:
.loc 2 773 26 view .LVU3877
.LBB9479:
.loc 2 796 9 view .LVU3878
.loc 2 796 9 is_stmt 0 view .LVU3879
.LBE9479:
.LBE9478:
.LBE9506:
.LBE9515:
.LBE9758:
.loc 1 1550 5 is_stmt 1 view .LVU3880
.LBB9759:
.LBB9516:
.LBB9507:
.LBB9498:
.LBB9494:
.loc 2 797 9 view .LVU3881
.loc 2 797 9 is_stmt 0 view .LVU3882
.LBE9494:
.LBE9498:
.LBE9507:
.LBE9516:
.LBE9759:
.loc 1 1550 5 is_stmt 1 view .LVU3883
.LBB9760:
.LBB9517:
.LBB9508:
.LBB9499:
.LBB9495:
.loc 2 798 9 view .LVU3884
.loc 2 798 9 is_stmt 0 view .LVU3885
.LBE9495:
.LBE9499:
.LBE9508:
.LBE9517:
.LBE9760:
.loc 1 1550 5 is_stmt 1 view .LVU3886
.loc 1 1492 5 view .LVU3887
.loc 1 1493 5 view .LVU3888
.loc 1 1494 5 view .LVU3889
.loc 1 1550 5 view .LVU3890
.loc 1 1492 5 view .LVU3891
.loc 1 1493 5 view .LVU3892
.loc 1 1494 5 view .LVU3893
.LBB9761:
.LBB9518:
.LBB9509:
.LBB9500:
.LBB9496:
.LBB9480:
.LBI9480:
.loc 2 616 1 view .LVU3894
.LBB9481:
.loc 2 618 5 view .LVU3895
.LBB9482:
.LBI9482:
.loc 2 507 1 view .LVU3896
.LBB9483:
.loc 2 528 5 view .LVU3897
.LBE9483:
.LBE9482:
.LBE9481:
.LBE9480:
# xxh3.h:799: input_lo ^ (XXH_readLE64(secret) + seed64),
.loc 2 799 48 is_stmt 0 view .LVU3898
mov rax, QWORD PTR -16[rdi] # tmp241, MEM[base: _394, offset: 16B]
add rax, r11 # tmp241, seed
# xxh3.h:798: return XXH3_mul128_fold64(
.loc 2 798 16 view .LVU3899
xor r15, rax # tmp243, tmp241
.LVL709:
# xxh3.h:800: input_hi ^ (XXH_readLE64(secret+8) - seed64)
.loc 2 800 48 view .LVU3900
mov rax, QWORD PTR -8[rdi] # tmp244, MEM[base: _394, offset: 24B]
sub rax, r11 # tmp244, seed
# xxh3.h:798: return XXH3_mul128_fold64(
.loc 2 798 16 view .LVU3901
xor r12, rax # tmp246, tmp244
.LVL710:
.LBB9492:
.LBB9490:
.LBB9487:
.LBB9484:
# xxh3.h:528: __uint128_t product = (__uint128_t)lhs * (__uint128_t)rhs;
.loc 2 528 17 view .LVU3902
mov rax, r12 # product, tmp246
mul r15 # tmp243
.LVL711:
.loc 2 529 5 is_stmt 1 view .LVU3903
.loc 2 530 5 view .LVU3904
.loc 2 530 5 is_stmt 0 view .LVU3905
.LBE9484:
.LBE9487:
.loc 2 619 5 is_stmt 1 view .LVU3906
.loc 2 619 5 is_stmt 0 view .LVU3907
.LBE9490:
.LBE9492:
.LBE9496:
.LBE9500:
.loc 2 1831 5 is_stmt 1 view .LVU3908
.loc 2 1831 5 is_stmt 0 view .LVU3909
.LBE9509:
.LBE9518:
.LBE9761:
.loc 1 1550 5 is_stmt 1 view .LVU3910
.loc 1 1550 5 view .LVU3911
.LBB9762:
.LBB9519:
.LBB9510:
.LBB9501:
.LBB9497:
.LBB9493:
.LBB9491:
.LBB9488:
.LBB9485:
# xxh3.h:529: XXH128_hash_t const r128 = { (xxh_u64)(product), (xxh_u64)(product >> 64) };
.loc 2 529 72 is_stmt 0 view .LVU3912
mov QWORD PTR [rsp], rax # %sfp, product
.LBE9485:
.LBE9488:
# xxh3.h:619: return product.low64 ^ product.high64;
.loc 2 619 26 view .LVU3913
mov rax, QWORD PTR [rsp] # tmp248, %sfp
.LBB9489:
.LBB9486:
# xxh3.h:529: XXH128_hash_t const r128 = { (xxh_u64)(product), (xxh_u64)(product >> 64) };
.loc 2 529 72 view .LVU3914
mov QWORD PTR 8[rsp], rdx # %sfp, product
.LBE9486:
.LBE9489:
# xxh3.h:619: return product.low64 ^ product.high64;
.loc 2 619 26 view .LVU3915
xor rax, rdx # tmp248, tmp322
.LVL712:
.loc 2 619 26 view .LVU3916
.LBE9491:
.LBE9493:
.LBE9497:
.LBE9501:
# xxh3.h:1830: acc.high64 += XXH3_mix16B (input_2, secret+16, seed);
.loc 2 1830 16 view .LVU3917
add rbx, rax # tmp249, tmp248
.LVL713:
# xxh3.h:1831: acc.high64 ^= XXH_readLE64(input_1) + XXH_readLE64(input_1 + 8);
.loc 2 1831 16 view .LVU3918
xor rbx, rcx # _52, tmp250
.LVL714:
.loc 2 1832 5 is_stmt 1 view .LVU3919
.loc 2 1832 5 is_stmt 0 view .LVU3920
.LBE9510:
.LBE9519:
.loc 2 1878 24 is_stmt 1 view .LVU3921
.loc 2 1878 19 view .LVU3922
# xxh3.h:1878: for (i=0; i<4; i++) {
.loc 2 1878 9 is_stmt 0 view .LVU3923
cmp r14, rsi # _390, ivtmp.585
jne .L179 #,
.loc 2 1881 9 is_stmt 1 view .LVU3924
.LVL715:
.LBB9520:
.LBI9520:
.loc 2 634 21 view .LVU3925
.LBB9521:
.loc 2 636 5 view .LVU3926
.LBB9522:
.LBI9522:
.loc 2 623 26 view .LVU3927
.LBB9523:
.loc 2 625 5 view .LVU3928
.loc 2 626 5 view .LVU3929
.loc 2 626 5 is_stmt 0 view .LVU3930
.LBE9523:
.LBE9522:
.loc 2 637 5 is_stmt 1 view .LVU3931
.LBB9527:
.LBB9524:
# xxh3.h:626: return v64 ^ (v64 >> shift);
.loc 2 626 23 is_stmt 0 view .LVU3932
mov rax, r10 # tmp251, _35
.LBE9524:
.LBE9527:
.LBE9521:
.LBE9520:
.LBB9544:
.LBB9545:
.LBB9546:
.LBB9547:
mov rcx, rbx # tmp255, _52
.LBE9547:
.LBE9546:
.LBE9545:
.LBE9544:
.LBB9566:
.LBB9538:
.LBB9528:
.LBB9525:
shr rax, 37 # tmp251,
.LBE9525:
.LBE9528:
.LBE9538:
.LBE9566:
.LBB9567:
.LBB9560:
.LBB9551:
.LBB9548:
shr rcx, 37 # tmp255,
.LBE9548:
.LBE9551:
.LBE9560:
.LBE9567:
.LBB9568:
.LBB9539:
.LBB9529:
.LBB9526:
# xxh3.h:626: return v64 ^ (v64 >> shift);
.loc 2 626 16 view .LVU3933
xor r10, rax # tmp252, tmp251
.LVL716:
.loc 2 626 16 view .LVU3934
.LBE9526:
.LBE9529:
.LBE9539:
.LBE9568:
.LBB9569:
.LBB9561:
.LBB9552:
.LBB9549:
xor rbx, rcx # tmp256, tmp255
.LVL717:
.loc 2 626 16 view .LVU3935
.LBE9549:
.LBE9552:
.LBE9561:
.LBE9569:
.LBB9570:
.LBB9540:
# xxh3.h:637: h64 *= 0x165667919E3779F9ULL;
.loc 2 637 9 view .LVU3936
movabs rax, 1609587791953885689 # tmp253,
imul r10, rax # h64, tmp253
.LVL718:
.loc 2 638 5 is_stmt 1 view .LVU3937
.LBB9530:
.LBI9530:
.loc 2 623 26 view .LVU3938
.LBB9531:
.loc 2 625 5 view .LVU3939
.loc 2 626 5 view .LVU3940
.LBE9531:
.LBE9530:
.LBE9540:
.LBE9570:
.LBB9571:
.LBB9562:
# xxh3.h:637: h64 *= 0x165667919E3779F9ULL;
.loc 2 637 9 is_stmt 0 view .LVU3941
imul rbx, rax # h64, tmp253
.LBE9562:
.LBE9571:
.LBB9572:
.LBB9541:
.LBB9535:
.LBB9532:
# xxh3.h:626: return v64 ^ (v64 >> shift);
.loc 2 626 23 view .LVU3942
mov rdx, r10 # tmp254, h64
.LVL719:
.loc 2 626 23 view .LVU3943
.LBE9532:
.LBE9535:
.LBE9541:
.LBE9572:
.LBB9573:
.LBB9563:
.LBB9553:
.LBB9554:
mov rcx, rbx # tmp258, h64
.LBE9554:
.LBE9553:
.LBE9563:
.LBE9573:
.LBB9574:
.LBB9542:
.LBB9536:
.LBB9533:
shr rdx, 32 # tmp254,
.LBE9533:
.LBE9536:
.LBE9542:
.LBE9574:
.LBB9575:
.LBB9564:
.LBB9557:
.LBB9555:
shr rcx, 32 # tmp258,
.LBE9555:
.LBE9557:
.LBE9564:
.LBE9575:
.LBB9576:
.LBB9543:
.LBB9537:
.LBB9534:
# xxh3.h:626: return v64 ^ (v64 >> shift);
.loc 2 626 16 view .LVU3944
xor r10, rdx # acc, tmp254
.LVL720:
.loc 2 626 16 view .LVU3945
.LBE9534:
.LBE9537:
.loc 2 639 5 is_stmt 1 view .LVU3946
.loc 2 639 5 is_stmt 0 view .LVU3947
.LBE9543:
.LBE9576:
.loc 2 1882 9 is_stmt 1 view .LVU3948
.LBB9577:
.LBI9544:
.loc 2 634 21 view .LVU3949
.LBB9565:
.loc 2 636 5 view .LVU3950
.LBB9558:
.LBI9546:
.loc 2 623 26 view .LVU3951
.LBB9550:
.loc 2 625 5 view .LVU3952
.loc 2 626 5 view .LVU3953
.loc 2 626 5 is_stmt 0 view .LVU3954
.LBE9550:
.LBE9558:
.loc 2 637 5 is_stmt 1 view .LVU3955
.loc 2 638 5 view .LVU3956
.LBB9559:
.LBI9553:
.loc 2 623 26 view .LVU3957
.LBB9556:
.loc 2 625 5 view .LVU3958
.loc 2 626 5 view .LVU3959
# xxh3.h:626: return v64 ^ (v64 >> shift);
.loc 2 626 16 is_stmt 0 view .LVU3960
xor rcx, rbx # acc$high64, h64
.LVL721:
.loc 2 626 16 view .LVU3961
.LBE9556:
.LBE9559:
.loc 2 639 5 is_stmt 1 view .LVU3962
.loc 2 639 5 is_stmt 0 view .LVU3963
.LBE9565:
.LBE9577:
.loc 2 1883 9 is_stmt 1 view .LVU3964
.loc 2 1884 9 view .LVU3965
.loc 2 1884 20 view .LVU3966
# xxh3.h:1884: for (i=4 ; i < nbRounds; i++) {
.loc 2 1884 9 is_stmt 0 view .LVU3967
cmp r8d, 159 # len,
jle .L180 #,
mov rax, QWORD PTR 104[rsp] # tmp364, input
lea rbx, 3[r9] # ivtmp.575,
# xxh3.h:1884: for (i=4 ; i < nbRounds; i++) {
.loc 2 1884 15 view .LVU3968
mov ebp, 4 # i,
.LVL722:
.loc 2 1884 15 view .LVU3969
lea rsi, 128[rax] # ivtmp.573,
.LVL723:
.p2align 4,,10
.p2align 3
.L181:
.loc 2 1885 13 is_stmt 1 view .LVU3970
.LBB9578:
.LBI9578:
.loc 2 1826 1 view .LVU3971
.LBB9579:
.loc 2 1828 5 view .LVU3972
.LBB9580:
.LBI9580:
.loc 2 773 26 view .LVU3973
.LBB9581:
.loc 2 796 9 view .LVU3974
.loc 2 796 9 is_stmt 0 view .LVU3975
.LBE9581:
.LBE9580:
.LBE9579:
.LBE9578:
.LBE9762:
.loc 1 1550 5 is_stmt 1 view .LVU3976
.loc 1 1492 5 view .LVU3977
.loc 1 1493 5 view .LVU3978
.LBB9763:
.LBB9637:
.LBB9628:
.LBB9602:
.LBB9596:
# xxh3.h:799: input_lo ^ (XXH_readLE64(secret) + seed64),
.loc 2 799 48 is_stmt 0 view .LVU3979
mov rax, QWORD PTR [rbx] # tmp259, MEM[base: _408, offset: 0B]
mov rdi, QWORD PTR [rsi] # _77, MEM[base: _413, offset: 0B]
.LVL724:
.loc 2 799 48 view .LVU3980
.LBE9596:
.LBE9602:
.LBE9628:
.LBE9637:
.LBE9763:
.loc 1 1494 5 is_stmt 1 view .LVU3981
.LBB9764:
.LBB9638:
.LBB9629:
.LBB9603:
.LBB9597:
.loc 2 797 9 view .LVU3982
.loc 2 797 9 is_stmt 0 view .LVU3983
.LBE9597:
.LBE9603:
.LBE9629:
.LBE9638:
.LBE9764:
.loc 1 1550 5 is_stmt 1 view .LVU3984
.loc 1 1492 5 view .LVU3985
.loc 1 1493 5 view .LVU3986
.LBB9765:
# xxh3.h:1884: for (i=4 ; i < nbRounds; i++) {
.loc 2 1884 35 is_stmt 0 view .LVU3987
add ebp, 1 # i,
.LVL725:
.loc 2 1884 35 view .LVU3988
add rsi, 32 # ivtmp.573,
.LVL726:
.loc 2 1884 35 view .LVU3989
mov r12, QWORD PTR -24[rsi] # _78, MEM[base: _413, offset: 8B]
.LVL727:
.loc 2 1884 35 view .LVU3990
.LBE9765:
.loc 1 1494 5 is_stmt 1 view .LVU3991
.LBB9766:
.LBB9639:
.LBB9630:
.LBB9604:
.LBB9598:
.loc 2 798 9 view .LVU3992
.loc 2 798 9 is_stmt 0 view .LVU3993
.LBE9598:
.LBE9604:
.LBE9630:
.LBE9639:
.LBE9766:
.loc 1 1550 5 is_stmt 1 view .LVU3994
.loc 1 1492 5 view .LVU3995
.loc 1 1493 5 view .LVU3996
.loc 1 1494 5 view .LVU3997
.loc 1 1550 5 view .LVU3998
.loc 1 1492 5 view .LVU3999
.loc 1 1493 5 view .LVU4000
.loc 1 1494 5 view .LVU4001
.LBB9767:
.LBB9640:
.LBB9631:
.LBB9605:
.LBB9599:
.LBB9582:
.LBI9582:
.loc 2 616 1 view .LVU4002
.LBB9583:
.loc 2 618 5 view .LVU4003
.LBB9584:
.LBI9584:
.loc 2 507 1 view .LVU4004
.LBB9585:
.loc 2 528 5 view .LVU4005
mov r15, QWORD PTR -16[rsi] # _94, MEM[base: _413, offset: 16B]
add rbx, 32 # ivtmp.575,
.LVL728:
.loc 2 528 5 is_stmt 0 view .LVU4006
.LBE9585:
.LBE9584:
.LBE9583:
.LBE9582:
# xxh3.h:799: input_lo ^ (XXH_readLE64(secret) + seed64),
.loc 2 799 48 view .LVU4007
add rax, r11 # tmp259, seed
.LVL729:
# xxh3.h:798: return XXH3_mul128_fold64(
.loc 2 798 16 view .LVU4008
xor rax, rdi # tmp259, _77
.LVL730:
.loc 2 798 16 view .LVU4009
.LBE9599:
.LBE9605:
# xxh3.h:1831: acc.high64 ^= XXH_readLE64(input_1) + XXH_readLE64(input_1 + 8);
.loc 2 1831 41 view .LVU4010
add rdi, r12 # tmp278, _78
.LVL731:
.LBB9606:
.LBB9600:
# xxh3.h:798: return XXH3_mul128_fold64(
.loc 2 798 16 view .LVU4011
mov r14, rax # tmp261, tmp259
# xxh3.h:800: input_hi ^ (XXH_readLE64(secret+8) - seed64)
.loc 2 800 48 view .LVU4012
mov rax, QWORD PTR -24[rbx] # tmp262, MEM[base: _408, offset: 8B]
.LVL732:
.loc 2 800 48 view .LVU4013
sub rax, r11 # tmp262, seed
# xxh3.h:798: return XXH3_mul128_fold64(
.loc 2 798 16 view .LVU4014
xor rax, r12 # tmp262, _78
.LBB9594:
.LBB9592:
.LBB9589:
.LBB9586:
# xxh3.h:528: __uint128_t product = (__uint128_t)lhs * (__uint128_t)rhs;
.loc 2 528 17 view .LVU4015
mul r14 # tmp261
.LVL733:
.loc 2 529 5 is_stmt 1 view .LVU4016
.loc 2 530 5 view .LVU4017
.loc 2 530 5 is_stmt 0 view .LVU4018
.LBE9586:
.LBE9589:
.loc 2 619 5 is_stmt 1 view .LVU4019
.loc 2 619 5 is_stmt 0 view .LVU4020
.LBE9592:
.LBE9594:
.LBE9600:
.LBE9606:
.loc 2 1829 5 is_stmt 1 view .LVU4021
.loc 2 1829 5 is_stmt 0 view .LVU4022
.LBE9631:
.LBE9640:
.LBE9767:
.loc 1 1550 5 is_stmt 1 view .LVU4023
.loc 1 1492 5 view .LVU4024
.loc 1 1493 5 view .LVU4025
.loc 1 1494 5 view .LVU4026
.loc 1 1550 5 view .LVU4027
.loc 1 1492 5 view .LVU4028
.loc 1 1493 5 view .LVU4029
mov r14, QWORD PTR -8[rsi] # _95, MEM[base: _413, offset: 24B]
.LVL734:
.loc 1 1494 5 view .LVU4030
.LBB9768:
.LBB9641:
.LBB9632:
.LBB9607:
.LBB9601:
.LBB9595:
.LBB9593:
.LBB9590:
.LBB9587:
# xxh3.h:529: XXH128_hash_t const r128 = { (xxh_u64)(product), (xxh_u64)(product >> 64) };
.loc 2 529 72 is_stmt 0 view .LVU4031
mov QWORD PTR [rsp], rax # %sfp, product
.LBE9587:
.LBE9590:
# xxh3.h:619: return product.low64 ^ product.high64;
.loc 2 619 26 view .LVU4032
mov rax, QWORD PTR [rsp] # tmp266, %sfp
.LBB9591:
.LBB9588:
# xxh3.h:529: XXH128_hash_t const r128 = { (xxh_u64)(product), (xxh_u64)(product >> 64) };
.loc 2 529 72 view .LVU4033
mov QWORD PTR 8[rsp], rdx # %sfp, product
.LBE9588:
.LBE9591:
# xxh3.h:619: return product.low64 ^ product.high64;
.loc 2 619 26 view .LVU4034
xor rax, rdx # tmp266, tmp324
.LVL735:
.loc 2 619 26 view .LVU4035
.LBE9593:
.LBE9595:
.LBE9601:
.LBE9607:
# xxh3.h:1828: acc.low64 += XXH3_mix16B (input_1, secret+0, seed);
.loc 2 1828 16 view .LVU4036
add r10, rax # tmp267, tmp266
.LVL736:
# xxh3.h:1829: acc.low64 ^= XXH_readLE64(input_2) + XXH_readLE64(input_2 + 8);
.loc 2 1829 41 view .LVU4037
lea rax, [r15+r14] # tmp268,
# xxh3.h:1829: acc.low64 ^= XXH_readLE64(input_2) + XXH_readLE64(input_2 + 8);
.loc 2 1829 16 view .LVU4038
xor r10, rax # acc, tmp268
.LVL737:
.loc 2 1830 5 is_stmt 1 view .LVU4039
.LBB9608:
.LBI9608:
.loc 2 773 26 view .LVU4040
.LBB9609:
.loc 2 796 9 view .LVU4041
.loc 2 796 9 is_stmt 0 view .LVU4042
.LBE9609:
.LBE9608:
.LBE9632:
.LBE9641:
.LBE9768:
.loc 1 1550 5 is_stmt 1 view .LVU4043
.LBB9769:
.LBB9642:
.LBB9633:
.LBB9624:
.LBB9620:
.loc 2 797 9 view .LVU4044
.loc 2 797 9 is_stmt 0 view .LVU4045
.LBE9620:
.LBE9624:
.LBE9633:
.LBE9642:
.LBE9769:
.loc 1 1550 5 is_stmt 1 view .LVU4046
.LBB9770:
.LBB9643:
.LBB9634:
.LBB9625:
.LBB9621:
.loc 2 798 9 view .LVU4047
.loc 2 798 9 is_stmt 0 view .LVU4048
.LBE9621:
.LBE9625:
.LBE9634:
.LBE9643:
.LBE9770:
.loc 1 1550 5 is_stmt 1 view .LVU4049
.loc 1 1492 5 view .LVU4050
.loc 1 1493 5 view .LVU4051
.loc 1 1494 5 view .LVU4052
.loc 1 1550 5 view .LVU4053
.loc 1 1492 5 view .LVU4054
.loc 1 1493 5 view .LVU4055
.loc 1 1494 5 view .LVU4056
.LBB9771:
.LBB9644:
.LBB9635:
.LBB9626:
.LBB9622:
.LBB9610:
.LBI9610:
.loc 2 616 1 view .LVU4057
.LBB9611:
.loc 2 618 5 view .LVU4058
.LBB9612:
.LBI9612:
.loc 2 507 1 view .LVU4059
.LBB9613:
.loc 2 528 5 view .LVU4060
.LBE9613:
.LBE9612:
.LBE9611:
.LBE9610:
# xxh3.h:799: input_lo ^ (XXH_readLE64(secret) + seed64),
.loc 2 799 48 is_stmt 0 view .LVU4061
mov rax, QWORD PTR -16[rbx] # tmp269, MEM[base: _408, offset: 16B]
add rax, r11 # tmp269, seed
# xxh3.h:798: return XXH3_mul128_fold64(
.loc 2 798 16 view .LVU4062
xor r15, rax # tmp271, tmp269
.LVL738:
# xxh3.h:800: input_hi ^ (XXH_readLE64(secret+8) - seed64)
.loc 2 800 48 view .LVU4063
mov rax, QWORD PTR -8[rbx] # tmp272, MEM[base: _408, offset: 24B]
sub rax, r11 # tmp272, seed
# xxh3.h:798: return XXH3_mul128_fold64(
.loc 2 798 16 view .LVU4064
xor r14, rax # tmp274, tmp272
.LVL739:
.LBB9618:
.LBB9616:
.LBB9615:
.LBB9614:
# xxh3.h:528: __uint128_t product = (__uint128_t)lhs * (__uint128_t)rhs;
.loc 2 528 17 view .LVU4065
mov rax, r14 # product, tmp274
mul r15 # tmp271
.loc 2 529 5 is_stmt 1 view .LVU4066
.LVL740:
.loc 2 530 5 view .LVU4067
.loc 2 530 5 is_stmt 0 view .LVU4068
.LBE9614:
.LBE9615:
.loc 2 619 5 is_stmt 1 view .LVU4069
.loc 2 619 5 is_stmt 0 view .LVU4070
.LBE9616:
.LBE9618:
.LBE9622:
.LBE9626:
.loc 2 1831 5 is_stmt 1 view .LVU4071
.loc 2 1831 5 is_stmt 0 view .LVU4072
.LBE9635:
.LBE9644:
.LBE9771:
.loc 1 1550 5 is_stmt 1 view .LVU4073
.loc 1 1550 5 view .LVU4074
.LBB9772:
.LBB9645:
.LBB9636:
.LBB9627:
.LBB9623:
.LBB9619:
.LBB9617:
# xxh3.h:619: return product.low64 ^ product.high64;
.loc 2 619 26 is_stmt 0 view .LVU4075
xor rax, rdx # tmp276, tmp326
.LVL741:
.loc 2 619 26 view .LVU4076
.LBE9617:
.LBE9619:
.LBE9623:
.LBE9627:
# xxh3.h:1830: acc.high64 += XXH3_mix16B (input_2, secret+16, seed);
.loc 2 1830 16 view .LVU4077
add rcx, rax # tmp277, tmp276
.LVL742:
# xxh3.h:1831: acc.high64 ^= XXH_readLE64(input_1) + XXH_readLE64(input_1 + 8);
.loc 2 1831 16 view .LVU4078
xor rcx, rdi # acc$high64, tmp278
.LVL743:
.loc 2 1832 5 is_stmt 1 view .LVU4079
.loc 2 1832 5 is_stmt 0 view .LVU4080
.LBE9636:
.LBE9645:
.loc 2 1884 34 is_stmt 1 view .LVU4081
.loc 2 1884 20 view .LVU4082
# xxh3.h:1884: for (i=4 ; i < nbRounds; i++) {
.loc 2 1884 9 is_stmt 0 view .LVU4083
cmp r13d, ebp # tmp229, i
jg .L181 #,
.LVL744:
.L180:
.loc 2 1888 9 is_stmt 1 view .LVU4084
# xxh3.h:1888: acc = XXH128_mix32B(acc, input + len - 16, input + len - 32, secret + XXH3_SECRET_SIZE_MIN - XXH3_MIDSIZE_LASTOFFSET - 16, 0ULL - seed);
.loc 2 1888 15 is_stmt 0 view .LVU4085
mov rax, QWORD PTR 104[rsp] # tmp370, input
.LBB9646:
.LBB9647:
.LBB9648:
.LBB9649:
# xxh3.h:800: input_hi ^ (XXH_readLE64(secret+8) - seed64)
.loc 2 800 48 view .LVU4086
mov rdx, QWORD PTR 111[r9] # tmp284, MEM[(char * {ref-all})secret_8(D) + 111B]
.LBE9649:
.LBE9648:
.LBE9647:
.LBE9646:
# xxh3.h:1888: acc = XXH128_mix32B(acc, input + len - 16, input + len - 32, secret + XXH3_SECRET_SIZE_MIN - XXH3_MIDSIZE_LASTOFFSET - 16, 0ULL - seed);
.loc 2 1888 15 view .LVU4087
lea rdi, -32[rax+r8] # _117,
lea rax, -16[rax+r8] # _119,
.LVL745:
.LBB9707:
.LBI9646:
.loc 2 1826 1 is_stmt 1 view .LVU4088
.LBB9696:
.loc 2 1828 5 view .LVU4089
.LBB9667:
.LBI9648:
.loc 2 773 26 view .LVU4090
.LBB9660:
.loc 2 796 9 view .LVU4091
.loc 2 796 9 is_stmt 0 view .LVU4092
.LBE9660:
.LBE9667:
.LBE9696:
.LBE9707:
.LBE9772:
.loc 1 1550 5 is_stmt 1 view .LVU4093
.loc 1 1492 5 view .LVU4094
.loc 1 1493 5 view .LVU4095
.LBB9773:
.LBB9708:
.LBB9697:
.LBB9668:
.LBB9661:
# xxh3.h:800: input_hi ^ (XXH_readLE64(secret+8) - seed64)
.loc 2 800 48 is_stmt 0 view .LVU4096
add rdx, r11 # tmp284, seed
.LBE9661:
.LBE9668:
.LBE9697:
.LBE9708:
.LBB9709:
# xxh3.h:1891: xxh_u64 const high64 = (acc.low64 * PRIME64_1) + (acc.high64 * PRIME64_4) + ((len - seed) * PRIME64_2);
.loc 2 1891 95 view .LVU4097
sub r8, r11 # tmp306, seed
.LVL746:
.loc 2 1891 95 view .LVU4098
mov rbx, QWORD PTR [rax] # _120, MEM[(char * {ref-all})_119]
.LVL747:
.loc 2 1891 95 view .LVU4099
.LBE9709:
.LBE9773:
.loc 1 1494 5 is_stmt 1 view .LVU4100
.LBB9774:
.LBB9740:
.LBB9698:
.LBB9669:
.LBB9662:
.loc 2 797 9 view .LVU4101
.loc 2 797 9 is_stmt 0 view .LVU4102
.LBE9662:
.LBE9669:
.LBE9698:
.LBE9740:
.LBE9774:
.loc 1 1550 5 is_stmt 1 view .LVU4103
.loc 1 1492 5 view .LVU4104
.loc 1 1493 5 view .LVU4105
mov rsi, QWORD PTR 8[rax] # _121, MEM[(char * {ref-all})_119 + 8B]
.LVL748:
.loc 1 1494 5 view .LVU4106
.LBB9775:
.LBB9741:
.LBB9699:
.LBB9670:
.LBB9663:
.loc 2 798 9 view .LVU4107
.loc 2 798 9 is_stmt 0 view .LVU4108
.LBE9663:
.LBE9670:
.LBE9699:
.LBE9741:
.LBE9775:
.loc 1 1550 5 is_stmt 1 view .LVU4109
.loc 1 1492 5 view .LVU4110
.loc 1 1493 5 view .LVU4111
.loc 1 1494 5 view .LVU4112
.loc 1 1550 5 view .LVU4113
.loc 1 1492 5 view .LVU4114
.loc 1 1493 5 view .LVU4115
.loc 1 1494 5 view .LVU4116
.LBB9776:
.LBB9742:
.LBB9700:
.LBB9671:
.LBB9664:
.LBB9650:
.LBI9650:
.loc 2 616 1 view .LVU4117
.LBB9651:
.loc 2 618 5 view .LVU4118
.LBB9652:
.LBI9652:
.loc 2 507 1 view .LVU4119
.LBB9653:
.loc 2 528 5 view .LVU4120
.LBE9653:
.LBE9652:
.LBE9651:
.LBE9650:
# xxh3.h:798: return XXH3_mul128_fold64(
.loc 2 798 16 is_stmt 0 view .LVU4121
mov rax, QWORD PTR 103[r9] # tmp281, MEM[(char * {ref-all})secret_8(D) + 103B]
.LVL749:
.loc 2 798 16 view .LVU4122
mov r12, QWORD PTR [rdi] # _137, MEM[(char * {ref-all})_117]
xor rdx, rsi # tmp286, _121
.LVL750:
.loc 2 798 16 view .LVU4123
mov rbp, QWORD PTR 8[rdi] # _138, MEM[(char * {ref-all})_117 + 8B]
sub rax, r11 # tmp281, seed
xor rax, rbx # tmp283, _120
.LVL751:
.loc 2 798 16 view .LVU4124
.LBE9664:
.LBE9671:
# xxh3.h:1831: acc.high64 ^= XXH_readLE64(input_1) + XXH_readLE64(input_1 + 8);
.loc 2 1831 41 view .LVU4125
add rbx, rsi # tmp300, _121
.LVL752:
.LBB9672:
.LBB9665:
.LBB9658:
.LBB9656:
.LBB9655:
.LBB9654:
# xxh3.h:528: __uint128_t product = (__uint128_t)lhs * (__uint128_t)rhs;
.loc 2 528 17 view .LVU4126
mul rdx # tmp286
.LVL753:
.loc 2 529 5 is_stmt 1 view .LVU4127
.loc 2 530 5 view .LVU4128
.loc 2 530 5 is_stmt 0 view .LVU4129
.LBE9654:
.LBE9655:
.loc 2 619 5 is_stmt 1 view .LVU4130
.loc 2 619 5 is_stmt 0 view .LVU4131
.LBE9656:
.LBE9658:
.LBE9665:
.LBE9672:
.loc 2 1829 5 is_stmt 1 view .LVU4132
.loc 2 1829 5 is_stmt 0 view .LVU4133
.LBE9700:
.LBE9742:
.LBE9776:
.loc 1 1550 5 is_stmt 1 view .LVU4134
.loc 1 1492 5 view .LVU4135
.loc 1 1493 5 view .LVU4136
.loc 1 1494 5 view .LVU4137
.loc 1 1550 5 view .LVU4138
.loc 1 1492 5 view .LVU4139
.loc 1 1493 5 view .LVU4140
.loc 1 1494 5 view .LVU4141
.LBB9777:
.LBB9743:
.LBB9701:
.LBB9673:
.LBB9666:
.LBB9659:
.LBB9657:
# xxh3.h:619: return product.low64 ^ product.high64;
.loc 2 619 26 is_stmt 0 view .LVU4142
xor rax, rdx # tmp288, tmp328
.LVL754:
.loc 2 619 26 view .LVU4143
.LBE9657:
.LBE9659:
.LBE9666:
.LBE9673:
.LBB9674:
.LBB9675:
# xxh3.h:800: input_hi ^ (XXH_readLE64(secret+8) - seed64)
.loc 2 800 48 view .LVU4144
mov rdx, QWORD PTR 127[r9] # tmp294, MEM[(char * {ref-all})secret_8(D) + 127B]
.LVL755:
.loc 2 800 48 view .LVU4145
.LBE9675:
.LBE9674:
# xxh3.h:1828: acc.low64 += XXH3_mix16B (input_1, secret+0, seed);
.loc 2 1828 16 view .LVU4146
add r10, rax # tmp289, tmp288
.LVL756:
# xxh3.h:1829: acc.low64 ^= XXH_readLE64(input_2) + XXH_readLE64(input_2 + 8);
.loc 2 1829 41 view .LVU4147
lea rax, [r12+rbp] # tmp290,
# xxh3.h:1829: acc.low64 ^= XXH_readLE64(input_2) + XXH_readLE64(input_2 + 8);
.loc 2 1829 16 view .LVU4148
xor r10, rax # _140, tmp290
.LVL757:
.loc 2 1830 5 is_stmt 1 view .LVU4149
.LBB9691:
.LBI9674:
.loc 2 773 26 view .LVU4150
.LBB9686:
.loc 2 796 9 view .LVU4151
.loc 2 796 9 is_stmt 0 view .LVU4152
.LBE9686:
.LBE9691:
.LBE9701:
.LBE9743:
.LBE9777:
.loc 1 1550 5 is_stmt 1 view .LVU4153
.LBB9778:
.LBB9744:
.LBB9702:
.LBB9692:
.LBB9687:
.loc 2 797 9 view .LVU4154
.loc 2 797 9 is_stmt 0 view .LVU4155
.LBE9687:
.LBE9692:
.LBE9702:
.LBE9744:
.LBE9778:
.loc 1 1550 5 is_stmt 1 view .LVU4156
.LBB9779:
.LBB9745:
.LBB9703:
.LBB9693:
.LBB9688:
.loc 2 798 9 view .LVU4157
.loc 2 798 9 is_stmt 0 view .LVU4158
.LBE9688:
.LBE9693:
.LBE9703:
.LBE9745:
.LBE9779:
.loc 1 1550 5 is_stmt 1 view .LVU4159
.loc 1 1492 5 view .LVU4160
.loc 1 1493 5 view .LVU4161
.loc 1 1494 5 view .LVU4162
.loc 1 1550 5 view .LVU4163
.loc 1 1492 5 view .LVU4164
.loc 1 1493 5 view .LVU4165
.loc 1 1494 5 view .LVU4166
.LBB9780:
.LBB9746:
.LBB9704:
.LBB9694:
.LBB9689:
.LBB9676:
.LBI9676:
.loc 2 616 1 view .LVU4167
.LBB9677:
.loc 2 618 5 view .LVU4168
.LBB9678:
.LBI9678:
.loc 2 507 1 view .LVU4169
.LBB9679:
.loc 2 528 5 view .LVU4170
.LBE9679:
.LBE9678:
.LBE9677:
.LBE9676:
# xxh3.h:798: return XXH3_mul128_fold64(
.loc 2 798 16 is_stmt 0 view .LVU4171
mov rax, QWORD PTR 119[r9] # tmp291, MEM[(char * {ref-all})secret_8(D) + 119B]
# xxh3.h:800: input_hi ^ (XXH_readLE64(secret+8) - seed64)
.loc 2 800 48 view .LVU4172
add rdx, r11 # tmp294, seed
.LVL758:
# xxh3.h:798: return XXH3_mul128_fold64(
.loc 2 798 16 view .LVU4173
xor rbp, rdx # tmp296, tmp294
.LVL759:
.loc 2 798 16 view .LVU4174
sub rax, r11 # tmp291, seed
xor rax, r12 # tmp291, _137
.LVL760:
.LBB9684:
.LBB9682:
.LBB9681:
.LBB9680:
# xxh3.h:528: __uint128_t product = (__uint128_t)lhs * (__uint128_t)rhs;
.loc 2 528 17 view .LVU4175
mul rbp # tmp296
.LVL761:
.loc 2 529 5 is_stmt 1 view .LVU4176
.loc 2 530 5 view .LVU4177
.loc 2 530 5 is_stmt 0 view .LVU4178
.LBE9680:
.LBE9681:
.loc 2 619 5 is_stmt 1 view .LVU4179
.loc 2 619 5 is_stmt 0 view .LVU4180
.LBE9682:
.LBE9684:
.LBE9689:
.LBE9694:
.loc 2 1831 5 is_stmt 1 view .LVU4181
.loc 2 1831 5 is_stmt 0 view .LVU4182
.LBE9704:
.LBE9746:
.LBE9780:
.loc 1 1550 5 is_stmt 1 view .LVU4183
.loc 1 1550 5 view .LVU4184
.LBB9781:
.LBB9747:
.LBB9705:
.LBB9695:
.LBB9690:
.LBB9685:
.LBB9683:
# xxh3.h:619: return product.low64 ^ product.high64;
.loc 2 619 26 is_stmt 0 view .LVU4185
xor rax, rdx # tmp298, tmp330
.LVL762:
.loc 2 619 26 view .LVU4186
.LBE9683:
.LBE9685:
.LBE9690:
.LBE9695:
# xxh3.h:1830: acc.high64 += XXH3_mix16B (input_2, secret+16, seed);
.loc 2 1830 16 view .LVU4187
add rcx, rax # tmp299, tmp298
.LVL763:
.loc 2 1830 16 view .LVU4188
.LBE9705:
.LBE9747:
.LBB9748:
# xxh3.h:1891: xxh_u64 const high64 = (acc.low64 * PRIME64_1) + (acc.high64 * PRIME64_4) + ((len - seed) * PRIME64_2);
.loc 2 1891 47 view .LVU4189
movabs rax, -7046029288634856825 # tmp302,
.LBE9748:
.LBB9749:
.LBB9706:
# xxh3.h:1831: acc.high64 ^= XXH_readLE64(input_1) + XXH_readLE64(input_1 + 8);
.loc 2 1831 16 view .LVU4190
xor rcx, rbx # _157, tmp300
.LVL764:
.loc 2 1832 5 is_stmt 1 view .LVU4191
.loc 2 1832 5 is_stmt 0 view .LVU4192
.LBE9706:
.LBE9749:
.LBB9750:
.loc 2 1890 13 is_stmt 1 view .LVU4193
# xxh3.h:1890: { xxh_u64 const low64 = acc.low64 + acc.high64;
.loc 2 1890 27 is_stmt 0 view .LVU4194
lea rdx, [r10+rcx] # low64,
.LVL765:
.loc 2 1891 13 is_stmt 1 view .LVU4195
# xxh3.h:1891: xxh_u64 const high64 = (acc.low64 * PRIME64_1) + (acc.high64 * PRIME64_4) + ((len - seed) * PRIME64_2);
.loc 2 1891 47 is_stmt 0 view .LVU4196
imul r10, rax # tmp301, tmp302
.LVL766:
# xxh3.h:1891: xxh_u64 const high64 = (acc.low64 * PRIME64_1) + (acc.high64 * PRIME64_4) + ((len - seed) * PRIME64_2);
.loc 2 1891 74 view .LVU4197
movabs rax, -8796714831421723037 # tmp304,
imul rcx, rax # tmp303, tmp304
.LVL767:
# xxh3.h:1891: xxh_u64 const high64 = (acc.low64 * PRIME64_1) + (acc.high64 * PRIME64_4) + ((len - seed) * PRIME64_2);
.loc 2 1891 103 view .LVU4198
movabs rax, -4417276706812531889 # tmp308,
imul r8, rax # tmp307, tmp308
.LBB9710:
.LBB9711:
.LBB9712:
.LBB9713:
# xxh3.h:626: return v64 ^ (v64 >> shift);
.loc 2 626 23 view .LVU4199
mov rax, rdx # tmp309, low64
shr rax, 37 # tmp309,
.LBE9713:
.LBE9712:
.LBE9711:
.LBE9710:
# xxh3.h:1891: xxh_u64 const high64 = (acc.low64 * PRIME64_1) + (acc.high64 * PRIME64_4) + ((len - seed) * PRIME64_2);
.loc 2 1891 60 view .LVU4200
add rcx, r10 # tmp305, tmp301
.LBB9725:
.LBB9722:
.LBB9716:
.LBB9714:
# xxh3.h:626: return v64 ^ (v64 >> shift);
.loc 2 626 16 view .LVU4201
xor rax, rdx # tmp310, low64
.LBE9714:
.LBE9716:
# xxh3.h:637: h64 *= 0x165667919E3779F9ULL;
.loc 2 637 9 view .LVU4202
movabs rdx, 1609587791953885689 # tmp311,
.LVL768:
.loc 2 637 9 view .LVU4203
.LBE9722:
.LBE9725:
# xxh3.h:1891: xxh_u64 const high64 = (acc.low64 * PRIME64_1) + (acc.high64 * PRIME64_4) + ((len - seed) * PRIME64_2);
.loc 2 1891 27 view .LVU4204
add r8, rcx # high64, tmp305
.LVL769:
.loc 2 1892 13 is_stmt 1 view .LVU4205
.LBB9726:
.LBI9710:
.loc 2 634 21 view .LVU4206
.LBB9723:
.loc 2 636 5 view .LVU4207
.LBB9717:
.LBI9712:
.loc 2 623 26 view .LVU4208
.LBB9715:
.loc 2 625 5 view .LVU4209
.loc 2 626 5 view .LVU4210
.loc 2 626 5 is_stmt 0 view .LVU4211
.LBE9715:
.LBE9717:
.loc 2 637 5 is_stmt 1 view .LVU4212
# xxh3.h:637: h64 *= 0x165667919E3779F9ULL;
.loc 2 637 9 is_stmt 0 view .LVU4213
imul rax, rdx # h64, tmp311
.LVL770:
.loc 2 638 5 is_stmt 1 view .LVU4214
.LBB9718:
.LBI9718:
.loc 2 623 26 view .LVU4215
.LBB9719:
.loc 2 625 5 view .LVU4216
.loc 2 626 5 view .LVU4217
.loc 2 626 5 is_stmt 0 view .LVU4218
.LBE9719:
.LBE9718:
.loc 2 639 5 is_stmt 1 view .LVU4219
.loc 2 639 5 is_stmt 0 view .LVU4220
.LBE9723:
.LBE9726:
.LBB9727:
.LBI9727:
.loc 2 634 21 is_stmt 1 view .LVU4221
.LBB9728:
.loc 2 636 5 view .LVU4222
.LBB9729:
.LBI9729:
.loc 2 623 26 view .LVU4223
.LBB9730:
.loc 2 625 5 view .LVU4224
.loc 2 626 5 view .LVU4225
.loc 2 626 5 is_stmt 0 view .LVU4226
.LBE9730:
.LBE9729:
.loc 2 637 5 is_stmt 1 view .LVU4227
.LBB9732:
.LBB9731:
# xxh3.h:626: return v64 ^ (v64 >> shift);
.loc 2 626 23 is_stmt 0 view .LVU4228
mov rcx, r8 # tmp312, high64
shr rcx, 37 # tmp312,
# xxh3.h:626: return v64 ^ (v64 >> shift);
.loc 2 626 16 view .LVU4229
xor r8, rcx # tmp313, tmp312
.LVL771:
.loc 2 626 16 view .LVU4230
.LBE9731:
.LBE9732:
# xxh3.h:637: h64 *= 0x165667919E3779F9ULL;
.loc 2 637 9 view .LVU4231
imul r8, rdx # h64, tmp311
.LVL772:
.loc 2 638 5 is_stmt 1 view .LVU4232
.LBB9733:
.LBI9733:
.loc 2 623 26 view .LVU4233
.LBB9734:
.loc 2 625 5 view .LVU4234
.loc 2 626 5 view .LVU4235
.loc 2 626 5 is_stmt 0 view .LVU4236
.LBE9734:
.LBE9733:
.loc 2 639 5 is_stmt 1 view .LVU4237
.loc 2 639 5 is_stmt 0 view .LVU4238
.LBE9728:
.LBE9727:
.loc 2 1893 13 is_stmt 1 view .LVU4239
.LBB9738:
.LBB9724:
.LBB9721:
.LBB9720:
# xxh3.h:626: return v64 ^ (v64 >> shift);
.loc 2 626 23 is_stmt 0 view .LVU4240
mov rdx, rax # tmp315, h64
shr rdx, 32 # tmp315,
# xxh3.h:626: return v64 ^ (v64 >> shift);
.loc 2 626 16 view .LVU4241
xor rax, rdx # tmp316, tmp315
.LVL773:
.loc 2 626 16 view .LVU4242
mov rdx, QWORD PTR 96[rsp] # tmp379, .result_ptr
mov QWORD PTR [rdx], rax # MEM[(struct *)&<retval>], tmp316
.LBE9720:
.LBE9721:
.LBE9724:
.LBE9738:
.LBB9739:
.LBB9737:
.LBB9736:
.LBB9735:
# xxh3.h:626: return v64 ^ (v64 >> shift);
.loc 2 626 23 view .LVU4243
mov rax, r8 # tmp317, h64
.LVL774:
.loc 2 626 23 view .LVU4244
shr rax, 32 # tmp317,
# xxh3.h:626: return v64 ^ (v64 >> shift);
.loc 2 626 16 view .LVU4245
xor r8, rax # tmp318, tmp317
.LVL775:
.loc 2 626 16 view .LVU4246
.LBE9735:
.LBE9736:
.LBE9737:
.LBE9739:
# xxh3.h:1892: XXH128_hash_t const h128 = { XXH3_avalanche(low64), (XXH64_hash_t)0 - XXH3_avalanche(high64) };
.loc 2 1892 81 view .LVU4247
mov rax, rdx # tmp381, tmp379
neg r8 # tmp319
.LVL776:
.loc 2 1892 81 view .LVU4248
mov QWORD PTR 8[rdx], r8 # MEM[(struct *)&<retval> + 8B], tmp319
.LVL777:
.loc 2 1892 81 view .LVU4249
.LBE9750:
.LBE9781:
# xxh3.h:1896: }
.loc 2 1896 1 view .LVU4250
add rsp, 24 #,
.cfi_def_cfa_offset 72
pop rbx #
.cfi_restore 3
.cfi_def_cfa_offset 64
pop rsi #
.cfi_restore 4
.cfi_def_cfa_offset 56
.LVL778:
.loc 2 1896 1 view .LVU4251
pop rdi #
.cfi_restore 5
.cfi_def_cfa_offset 48
.LVL779:
.loc 2 1896 1 view .LVU4252
pop rbp #
.cfi_restore 6
.cfi_def_cfa_offset 40
pop r12 #
.cfi_restore 12
.cfi_def_cfa_offset 32
.LVL780:
.loc 2 1896 1 view .LVU4253
pop r13 #
.cfi_restore 13
.cfi_def_cfa_offset 24
.LVL781:
.loc 2 1896 1 view .LVU4254
pop r14 #
.cfi_restore 14
.cfi_def_cfa_offset 16
pop r15 #
.cfi_restore 15
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE5384:
.seh_endproc
.p2align 4
.globl XXH_versionNumber
.def XXH_versionNumber; .scl 2; .type 32; .endef
.seh_proc XXH_versionNumber
XXH_versionNumber:
.LFB22:
.loc 1 1070 50 is_stmt 1 view -0
.cfi_startproc
.seh_endprologue
.loc 1 1070 52 view .LVU4256
# xxhash.h:1070: XXH_PUBLIC_API unsigned XXH_versionNumber (void) { return XXH_VERSION_NUMBER; }
.loc 1 1070 1 is_stmt 0 view .LVU4257
mov eax, 703 #,
ret
.cfi_endproc
.LFE22:
.seh_endproc
.p2align 4
.globl XXH32
.def XXH32; .scl 2; .type 32; .endef
.seh_proc XXH32
XXH32:
.LVL782:
.LFB27:
.loc 1 1260 1 is_stmt 1 view -0
.cfi_startproc
.loc 1 1260 1 is_stmt 0 view .LVU4259
push rsi #
.seh_pushreg rsi
.cfi_def_cfa_offset 16
.cfi_offset 4, -16
push rbx #
.seh_pushreg rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
.seh_endprologue
.loc 1 1270 5 is_stmt 1 view .LVU4260
.loc 1 1275 5 view .LVU4261
.LVL783:
.LBB9827:
.LBI9827:
.loc 1 1221 1 view .LVU4262
.LBB9828:
.loc 1 1223 5 view .LVU4263
.loc 1 1224 5 view .LVU4264
.loc 1 1233 5 view .LVU4265
# xxhash.h:1250: h32 = seed + PRIME32_5;
.loc 1 1250 14 is_stmt 0 view .LVU4266
lea r9d, 374761393[r8] # h32,
# xxhash.h:1233: if (len>=16) {
.loc 1 1233 8 view .LVU4267
cmp rdx, 15 # len,
jbe .L188 #,
.LBB9829:
.loc 1 1234 9 is_stmt 1 view .LVU4268
# xxhash.h:1234: const xxh_u8* const limit = bEnd - 15;
.loc 1 1234 29 is_stmt 0 view .LVU4269
lea rsi, -15[rcx+rdx] # limit,
.LVL784:
.loc 1 1235 9 is_stmt 1 view .LVU4270
# xxhash.h:1235: xxh_u32 v1 = seed + PRIME32_1 + PRIME32_2;
.loc 1 1235 17 is_stmt 0 view .LVU4271
lea eax, 606290984[r8] # v1,
.LVL785:
.loc 1 1236 9 is_stmt 1 view .LVU4272
# xxhash.h:1238: xxh_u32 v4 = seed - PRIME32_1;
.loc 1 1238 17 is_stmt 0 view .LVU4273
mov r11, rcx # input, input
# xxhash.h:1236: xxh_u32 v2 = seed + PRIME32_2;
.loc 1 1236 17 view .LVU4274
lea r10d, -2048144777[r8] # v2,
.LVL786:
.loc 1 1237 9 is_stmt 1 view .LVU4275
.loc 1 1238 9 view .LVU4276
# xxhash.h:1238: xxh_u32 v4 = seed - PRIME32_1;
.loc 1 1238 17 is_stmt 0 view .LVU4277
lea r9d, 1640531535[r8] # v4,
.LVL787:
.p2align 4,,10
.p2align 3
.L187:
.loc 1 1240 9 is_stmt 1 view .LVU4278
.loc 1 1241 13 view .LVU4279
.loc 1 1241 13 is_stmt 0 view .LVU4280
.LBE9829:
.LBE9828:
.LBE9827:
.loc 1 1059 5 is_stmt 1 view .LVU4281
.loc 1 1060 9 view .LVU4282
.loc 1 1047 5 view .LVU4283
.loc 1 929 5 view .LVU4284
.loc 1 930 5 view .LVU4285
.loc 1 931 5 view .LVU4286
.LBB9918:
.LBB9900:
.LBB9858:
.LBB9830:
.LBI9830:
.loc 1 1082 16 view .LVU4287
.LBB9831:
.loc 1 1084 5 view .LVU4288
# xxhash.h:1084: acc += input * PRIME32_2;
.loc 1 1084 18 is_stmt 0 view .LVU4289
imul ebx, DWORD PTR [r11], -2048144777 # tmp242, MEM[base: input_10, offset: 0B],
add r11, 16 # input,
.LVL788:
# xxhash.h:1084: acc += input * PRIME32_2;
.loc 1 1084 9 view .LVU4290
add eax, ebx # acc, tmp242
.LVL789:
.loc 1 1085 5 is_stmt 1 view .LVU4291
.LBE9831:
.LBE9830:
.LBB9834:
.LBB9835:
# xxhash.h:1084: acc += input * PRIME32_2;
.loc 1 1084 18 is_stmt 0 view .LVU4292
imul ebx, DWORD PTR -12[r11], -2048144777 # tmp245, MEM[base: input_10, offset: 4B],
.LBE9835:
.LBE9834:
.LBB9839:
.LBB9832:
# xxhash.h:1085: acc = XXH_rotl32(acc, 13);
.loc 1 1085 10 view .LVU4293
rol eax, 13 # acc,
.LVL790:
.loc 1 1086 5 is_stmt 1 view .LVU4294
# xxhash.h:1086: acc *= PRIME32_1;
.loc 1 1086 9 is_stmt 0 view .LVU4295
imul eax, eax, -1640531535 # v1, acc,
.LVL791:
.loc 1 1133 5 is_stmt 1 view .LVU4296
.LBE9832:
.LBE9839:
.LBB9840:
.LBB9836:
# xxhash.h:1084: acc += input * PRIME32_2;
.loc 1 1084 9 is_stmt 0 view .LVU4297
add r10d, ebx # acc, tmp245
.LVL792:
.loc 1 1084 9 view .LVU4298
.LBE9836:
.LBE9840:
.LBB9841:
.LBB9842:
# xxhash.h:1084: acc += input * PRIME32_2;
.loc 1 1084 18 view .LVU4299
imul ebx, DWORD PTR -8[r11], -2048144777 # tmp248, MEM[base: input_10, offset: 8B],
.LBE9842:
.LBE9841:
.LBB9846:
.LBB9837:
# xxhash.h:1085: acc = XXH_rotl32(acc, 13);
.loc 1 1085 10 view .LVU4300
rol r10d, 13 # acc,
# xxhash.h:1086: acc *= PRIME32_1;
.loc 1 1086 9 view .LVU4301
imul r10d, r10d, -1640531535 # v2, acc,
.LBE9837:
.LBE9846:
.LBB9847:
.LBB9843:
# xxhash.h:1084: acc += input * PRIME32_2;
.loc 1 1084 9 view .LVU4302
add r8d, ebx # acc, tmp248
.LVL793:
.loc 1 1084 9 view .LVU4303
.LBE9843:
.LBE9847:
.LBB9848:
.LBB9849:
# xxhash.h:1084: acc += input * PRIME32_2;
.loc 1 1084 18 view .LVU4304
imul ebx, DWORD PTR -4[r11], -2048144777 # tmp251, MEM[base: input_10, offset: 12B],
.LBE9849:
.LBE9848:
.LBB9852:
.LBB9844:
# xxhash.h:1085: acc = XXH_rotl32(acc, 13);
.loc 1 1085 10 view .LVU4305
rol r8d, 13 # acc,
# xxhash.h:1086: acc *= PRIME32_1;
.loc 1 1086 9 view .LVU4306
imul r8d, r8d, -1640531535 # seed, acc,
.LBE9844:
.LBE9852:
.LBB9853:
.LBB9850:
# xxhash.h:1084: acc += input * PRIME32_2;
.loc 1 1084 9 view .LVU4307
add r9d, ebx # acc, tmp251
.LVL794:
# xxhash.h:1085: acc = XXH_rotl32(acc, 13);
.loc 1 1085 10 view .LVU4308
rol r9d, 13 # acc,
# xxhash.h:1086: acc *= PRIME32_1;
.loc 1 1086 9 view .LVU4309
imul r9d, r9d, -1640531535 # v4, acc,
.LBE9850:
.LBE9853:
.LBB9854:
.LBB9833:
# xxhash.h:1133: __asm__("" : "+r" (acc));
.loc 1 1133 5 view .LVU4310
.LVL795:
.loc 1 1135 5 is_stmt 1 view .LVU4311
.loc 1 1135 5 is_stmt 0 view .LVU4312
.LBE9833:
.LBE9854:
.loc 1 1241 57 is_stmt 1 view .LVU4313
.loc 1 1242 13 view .LVU4314
.loc 1 1242 13 is_stmt 0 view .LVU4315
.LBE9858:
.LBE9900:
.LBE9918:
.loc 1 1059 5 is_stmt 1 view .LVU4316
.loc 1 1060 9 view .LVU4317
.loc 1 1047 5 view .LVU4318
.loc 1 929 5 view .LVU4319
.loc 1 930 5 view .LVU4320
.loc 1 931 5 view .LVU4321
.LBB9919:
.LBB9901:
.LBB9859:
.LBB9855:
.LBI9834:
.loc 1 1082 16 view .LVU4322
.LBB9838:
.loc 1 1084 5 view .LVU4323
.loc 1 1085 5 view .LVU4324
.loc 1 1086 5 view .LVU4325
.loc 1 1133 5 view .LVU4326
.LVL796:
.loc 1 1135 5 view .LVU4327
.loc 1 1135 5 is_stmt 0 view .LVU4328
.LBE9838:
.LBE9855:
.loc 1 1242 57 is_stmt 1 view .LVU4329
.loc 1 1243 13 view .LVU4330
.loc 1 1243 13 is_stmt 0 view .LVU4331
.LBE9859:
.LBE9901:
.LBE9919:
.loc 1 1059 5 is_stmt 1 view .LVU4332
.loc 1 1060 9 view .LVU4333
.loc 1 1047 5 view .LVU4334
.loc 1 929 5 view .LVU4335
.loc 1 930 5 view .LVU4336
.loc 1 931 5 view .LVU4337
.LBB9920:
.LBB9902:
.LBB9860:
.LBB9856:
.LBI9841:
.loc 1 1082 16 view .LVU4338
.LBB9845:
.loc 1 1084 5 view .LVU4339
.loc 1 1085 5 view .LVU4340
.loc 1 1086 5 view .LVU4341
.loc 1 1133 5 view .LVU4342
.LVL797:
.loc 1 1135 5 view .LVU4343
.loc 1 1135 5 is_stmt 0 view .LVU4344
.LBE9845:
.LBE9856:
.loc 1 1243 57 is_stmt 1 view .LVU4345
.loc 1 1244 13 view .LVU4346
.loc 1 1244 13 is_stmt 0 view .LVU4347
.LBE9860:
.LBE9902:
.LBE9920:
.loc 1 1059 5 is_stmt 1 view .LVU4348
.loc 1 1060 9 view .LVU4349
.loc 1 1047 5 view .LVU4350
.loc 1 929 5 view .LVU4351
.loc 1 930 5 view .LVU4352
.loc 1 931 5 view .LVU4353
.LBB9921:
.LBB9903:
.LBB9861:
.LBB9857:
.LBI9848:
.loc 1 1082 16 view .LVU4354
.LBB9851:
.loc 1 1084 5 view .LVU4355
.loc 1 1085 5 view .LVU4356
.loc 1 1086 5 view .LVU4357
.loc 1 1133 5 view .LVU4358
.LVL798:
.loc 1 1135 5 view .LVU4359
.loc 1 1135 5 is_stmt 0 view .LVU4360
.LBE9851:
.LBE9857:
.loc 1 1244 57 is_stmt 1 view .LVU4361
.loc 1 1245 17 view .LVU4362
# xxhash.h:1245: } while (input < limit);
.loc 1 1245 9 is_stmt 0 view .LVU4363
cmp rsi, r11 # limit, input
ja .L187 #,
lea r11, -16[rdx] # tmp255,
.LVL799:
.loc 1 1245 9 view .LVU4364
lea rbx, 1[rcx] # tmp258,
and r11, -16 # tmp257,
add r11, 16 # tmp254,
cmp rsi, rbx # limit, tmp258
mov ebx, 16 # tmp259,
cmovb r11, rbx # tmp254,, tmp254, tmp259
# xxhash.h:1247: h32 = XXH_rotl32(v1, 1) + XXH_rotl32(v2, 7)
.loc 1 1247 15 view .LVU4365
rol eax # tmp260
.LVL800:
# xxhash.h:1247: h32 = XXH_rotl32(v1, 1) + XXH_rotl32(v2, 7)
.loc 1 1247 36 view .LVU4366
rol r10d, 7 # tmp261,
.LVL801:
# xxhash.h:1248: + XXH_rotl32(v3, 12) + XXH_rotl32(v4, 18);
.loc 1 1248 15 view .LVU4367
rol r8d, 12 # tmp263,
.LVL802:
# xxhash.h:1247: h32 = XXH_rotl32(v1, 1) + XXH_rotl32(v2, 7)
.loc 1 1247 34 view .LVU4368
add eax, r10d # tmp262, tmp261
# xxhash.h:1248: + XXH_rotl32(v3, 12) + XXH_rotl32(v4, 18);
.loc 1 1248 36 view .LVU4369
ror r9d, 14 # tmp265,
.LVL803:
.loc 1 1248 36 view .LVU4370
add rcx, r11 # input, tmp254
.LVL804:
.loc 1 1247 9 is_stmt 1 view .LVU4371
# xxhash.h:1248: + XXH_rotl32(v3, 12) + XXH_rotl32(v4, 18);
.loc 1 1248 13 is_stmt 0 view .LVU4372
add r8d, eax # tmp264, tmp262
# xxhash.h:1247: h32 = XXH_rotl32(v1, 1) + XXH_rotl32(v2, 7)
.loc 1 1247 13 view .LVU4373
add r9d, r8d # h32, tmp264
.LVL805:
.L188:
.loc 1 1247 13 view .LVU4374
.LBE9861:
.loc 1 1253 5 is_stmt 1 view .LVU4375
lea r8, .L191[rip] # tmp267,
# xxhash.h:1253: h32 += (xxh_u32)len;
.loc 1 1253 9 is_stmt 0 view .LVU4376
add r9d, edx # h32, len
.LVL806:
.loc 1 1255 5 is_stmt 1 view .LVU4377
.LBB9862:
.LBI9862:
.loc 1 1152 1 view .LVU4378
.LBB9863:
.loc 1 1164 5 view .LVU4379
.loc 1 1176 10 view .LVU4380
.LBE9863:
.LBE9862:
# xxhash.h:1255: return XXH32_finalize(h32, input, len&15, align);
.loc 1 1255 12 is_stmt 0 view .LVU4381
and edx, 15 # tmp266,
.LVL807:
.loc 1 1255 12 view .LVU4382
movsx rax, DWORD PTR [r8+rdx*4] # tmp269,
add rax, r8 # tmp270, tmp267
jmp rax # tmp270
.section .rdata,"dr"
.align 4
.L191:
.long .L189-.L191
.long .L205-.L191
.long .L207-.L191
.long .L203-.L191
.long .L202-.L191
.long .L201-.L191
.long .L200-.L191
.long .L199-.L191
.long .L198-.L191
.long .L197-.L191
.long .L196-.L191
.long .L195-.L191
.long .L194-.L191
.long .L193-.L191
.long .L192-.L191
.long .L190-.L191
.text
.p2align 4,,10
.p2align 3
.L190:
.LBB9885:
.LBB9870:
.loc 1 1201 26 is_stmt 1 view .LVU4383
.LVL808:
.loc 1 1201 26 is_stmt 0 view .LVU4384
.LBE9870:
.LBE9885:
.LBE9903:
.LBE9921:
.loc 1 1059 5 is_stmt 1 view .LVU4385
.loc 1 1060 9 view .LVU4386
.loc 1 1047 5 view .LVU4387
.loc 1 929 5 view .LVU4388
.loc 1 930 5 view .LVU4389
.loc 1 931 5 view .LVU4390
.LBB9922:
.LBB9904:
.LBB9886:
.LBB9871:
# xxhash.h:1201: case 15: PROCESS4;
.loc 1 1201 26 is_stmt 0 view .LVU4391
imul eax, DWORD PTR [rcx], -1028477379 # tmp305, MEM[(char * {ref-all})input_32],
add rcx, 4 # input,
.LVL809:
.loc 1 1201 26 view .LVU4392
add r9d, eax # h32, tmp305
.LVL810:
.loc 1 1201 26 is_stmt 1 view .LVU4393
.loc 1 1201 26 view .LVU4394
ror r9d, 15 # _189,
.LVL811:
.loc 1 1201 26 is_stmt 0 view .LVU4395
imul r9d, r9d, 668265263 # h32, _189,
.LVL812:
.L195:
.loc 1 1201 34 is_stmt 1 view .LVU4396
.loc 1 1203 26 view .LVU4397
.loc 1 1203 26 is_stmt 0 view .LVU4398
.LBE9871:
.LBE9886:
.LBE9904:
.LBE9922:
.loc 1 1059 5 is_stmt 1 view .LVU4399
.loc 1 1060 9 view .LVU4400
.loc 1 1047 5 view .LVU4401
.loc 1 929 5 view .LVU4402
.loc 1 930 5 view .LVU4403
.loc 1 931 5 view .LVU4404
.LBB9923:
.LBB9905:
.LBB9887:
.LBB9872:
# xxhash.h:1203: case 11: PROCESS4;
.loc 1 1203 26 is_stmt 0 view .LVU4405
imul eax, DWORD PTR [rcx], -1028477379 # tmp307, MEM[(char * {ref-all})ptr_191],
add rcx, 4 # input,
.LVL813:
.loc 1 1203 26 view .LVU4406
add r9d, eax # h32, tmp307
.LVL814:
.loc 1 1203 26 is_stmt 1 view .LVU4407
.loc 1 1203 26 view .LVU4408
ror r9d, 15 # _199,
.LVL815:
.loc 1 1203 26 is_stmt 0 view .LVU4409
imul r9d, r9d, 668265263 # h32, _199,
.LVL816:
.L199:
.loc 1 1203 34 is_stmt 1 view .LVU4410
.loc 1 1205 26 view .LVU4411
.loc 1 1205 26 is_stmt 0 view .LVU4412
.LBE9872:
.LBE9887:
.LBE9905:
.LBE9923:
.loc 1 1059 5 is_stmt 1 view .LVU4413
.loc 1 1060 9 view .LVU4414
.loc 1 1047 5 view .LVU4415
.loc 1 929 5 view .LVU4416
.loc 1 930 5 view .LVU4417
.loc 1 931 5 view .LVU4418
.LBB9924:
.LBB9906:
.LBB9888:
.LBB9873:
# xxhash.h:1205: case 7: PROCESS4;
.loc 1 1205 26 is_stmt 0 view .LVU4419
imul eax, DWORD PTR [rcx], -1028477379 # tmp309, MEM[(char * {ref-all})ptr_201],
add rcx, 4 # input,
.LVL817:
.loc 1 1205 26 view .LVU4420
add r9d, eax # h32, tmp309
.LVL818:
.loc 1 1205 26 is_stmt 1 view .LVU4421
.loc 1 1205 26 view .LVU4422
ror r9d, 15 # _209,
.LVL819:
.loc 1 1205 26 is_stmt 0 view .LVU4423
imul r9d, r9d, 668265263 # h32, _209,
.LVL820:
.L203:
.loc 1 1205 34 is_stmt 1 view .LVU4424
.loc 1 1207 26 view .LVU4425
movzx eax, BYTE PTR [rcx] # *ptr_211, *ptr_211
lea rdx, 1[rcx] # ptr,
.LVL821:
.loc 1 1207 26 view .LVU4426
imul eax, eax, 374761393 # tmp312, *ptr_211,
add r9d, eax # h32, tmp312
.LVL822:
.loc 1 1207 26 is_stmt 0 view .LVU4427
rol r9d, 11 # _218,
.LVL823:
.loc 1 1207 26 view .LVU4428
imul r9d, r9d, -1640531535 # h32, _218,
.LVL824:
.L204:
.loc 1 1207 34 is_stmt 1 view .LVU4429
.loc 1 1209 26 view .LVU4430
movzx eax, BYTE PTR [rdx] # *ptr_220, *ptr_220
lea rcx, 1[rdx] # input,
.LVL825:
.loc 1 1209 26 view .LVU4431
imul eax, eax, 374761393 # tmp315, *ptr_220,
add r9d, eax # h32, tmp315
.LVL826:
.loc 1 1209 26 is_stmt 0 view .LVU4432
rol r9d, 11 # _227,
.LVL827:
.loc 1 1209 26 view .LVU4433
imul r9d, r9d, -1640531535 # h32, _227,
.LVL828:
.L205:
.loc 1 1209 34 is_stmt 1 view .LVU4434
.loc 1 1211 26 view .LVU4435
.loc 1 1211 26 view .LVU4436
movzx eax, BYTE PTR [rcx] # *ptr_229, *ptr_229
imul eax, eax, 374761393 # tmp318, *ptr_229,
add r9d, eax # h32, tmp318
.LVL829:
.loc 1 1211 26 is_stmt 0 view .LVU4437
rol r9d, 11 # _235,
.LVL830:
.loc 1 1211 26 view .LVU4438
imul r9d, r9d, -1640531535 # h32, _235,
.LVL831:
.L189:
.loc 1 1211 34 is_stmt 1 view .LVU4439
.loc 1 1213 26 view .LVU4440
.LBB9864:
.LBI9864:
.loc 1 1139 16 view .LVU4441
.LBB9865:
.loc 1 1141 5 view .LVU4442
# xxhash.h:1141: h32 ^= h32 >> 15;
.loc 1 1141 16 is_stmt 0 view .LVU4443
mov eax, r9d # tmp320, h32
shr eax, 15 # tmp320,
# xxhash.h:1141: h32 ^= h32 >> 15;
.loc 1 1141 9 view .LVU4444
xor r9d, eax # h32, tmp320
.LVL832:
.loc 1 1142 5 is_stmt 1 view .LVU4445
# xxhash.h:1142: h32 *= PRIME32_2;
.loc 1 1142 9 is_stmt 0 view .LVU4446
imul eax, r9d, -2048144777 # h32, h32,
.LVL833:
.loc 1 1143 5 is_stmt 1 view .LVU4447
# xxhash.h:1143: h32 ^= h32 >> 13;
.loc 1 1143 16 is_stmt 0 view .LVU4448
mov r9d, eax # _241, h32
shr r9d, 13 # _241,
# xxhash.h:1143: h32 ^= h32 >> 13;
.loc 1 1143 9 view .LVU4449
xor eax, r9d # h32, _241
.LVL834:
.loc 1 1144 5 is_stmt 1 view .LVU4450
# xxhash.h:1144: h32 *= PRIME32_3;
.loc 1 1144 9 is_stmt 0 view .LVU4451
imul eax, eax, -1028477379 # h32, h32,
.LVL835:
.loc 1 1145 5 is_stmt 1 view .LVU4452
# xxhash.h:1145: h32 ^= h32 >> 16;
.loc 1 1145 16 is_stmt 0 view .LVU4453
mov edx, eax # _244, h32
shr edx, 16 # _244,
# xxhash.h:1145: h32 ^= h32 >> 16;
.loc 1 1145 9 view .LVU4454
xor eax, edx # <retval>, _244
.LVL836:
.loc 1 1146 5 is_stmt 1 view .LVU4455
.loc 1 1146 5 is_stmt 0 view .LVU4456
.LBE9865:
.LBE9864:
.LBE9873:
.LBE9888:
.LBE9906:
.LBE9924:
# xxhash.h:1277: }
.loc 1 1277 1 view .LVU4457
pop rbx #
.cfi_remember_state
.cfi_restore 3
.cfi_def_cfa_offset 16
pop rsi #
.cfi_restore 4
.cfi_def_cfa_offset 8
ret
.LVL837:
.p2align 4,,10
.p2align 3
.L193:
.cfi_restore_state
.LBB9925:
.LBB9907:
.LBB9889:
.LBB9874:
.loc 1 1184 26 is_stmt 1 view .LVU4458
.loc 1 1184 26 is_stmt 0 view .LVU4459
.LBE9874:
.LBE9889:
.LBE9907:
.LBE9925:
.loc 1 1059 5 is_stmt 1 view .LVU4460
.loc 1 1060 9 view .LVU4461
.loc 1 1047 5 view .LVU4462
.loc 1 929 5 view .LVU4463
.loc 1 930 5 view .LVU4464
.loc 1 931 5 view .LVU4465
.LBB9926:
.LBB9908:
.LBB9890:
.LBB9875:
# xxhash.h:1184: case 13: PROCESS4;
.loc 1 1184 26 is_stmt 0 view .LVU4466
imul eax, DWORD PTR [rcx], -1028477379 # tmp280, MEM[(char * {ref-all})input_32],
add rcx, 4 # input,
.LVL838:
.loc 1 1184 26 view .LVU4467
add r9d, eax # h32, tmp280
.LVL839:
.loc 1 1184 26 is_stmt 1 view .LVU4468
.loc 1 1184 26 view .LVU4469
ror r9d, 15 # _101,
.LVL840:
.loc 1 1184 26 is_stmt 0 view .LVU4470
imul r9d, r9d, 668265263 # h32, _101,
.LVL841:
.L197:
.loc 1 1184 34 is_stmt 1 view .LVU4471
.loc 1 1186 26 view .LVU4472
.loc 1 1186 26 is_stmt 0 view .LVU4473
.LBE9875:
.LBE9890:
.LBE9908:
.LBE9926:
.loc 1 1059 5 is_stmt 1 view .LVU4474
.loc 1 1060 9 view .LVU4475
.loc 1 1047 5 view .LVU4476
.loc 1 929 5 view .LVU4477
.loc 1 930 5 view .LVU4478
.loc 1 931 5 view .LVU4479
.LBB9927:
.LBB9909:
.LBB9891:
.LBB9876:
# xxhash.h:1186: case 9: PROCESS4;
.loc 1 1186 26 is_stmt 0 view .LVU4480
imul eax, DWORD PTR [rcx], -1028477379 # tmp282, MEM[(char * {ref-all})ptr_103],
add rcx, 4 # input,
.LVL842:
.loc 1 1186 26 view .LVU4481
add r9d, eax # h32, tmp282
.LVL843:
.loc 1 1186 26 is_stmt 1 view .LVU4482
.loc 1 1186 26 view .LVU4483
ror r9d, 15 # _111,
.LVL844:
.loc 1 1186 26 is_stmt 0 view .LVU4484
imul r9d, r9d, 668265263 # h32, _111,
.LVL845:
.L201:
.loc 1 1186 34 is_stmt 1 view .LVU4485
.loc 1 1188 26 view .LVU4486
.loc 1 1188 26 is_stmt 0 view .LVU4487
.LBE9876:
.LBE9891:
.LBE9909:
.LBE9927:
.loc 1 1059 5 is_stmt 1 view .LVU4488
.loc 1 1060 9 view .LVU4489
.loc 1 1047 5 view .LVU4490
.loc 1 929 5 view .LVU4491
.loc 1 930 5 view .LVU4492
.loc 1 931 5 view .LVU4493
.LBB9928:
.LBB9910:
.LBB9892:
.LBB9877:
.loc 1 1188 26 view .LVU4494
.loc 1 1188 26 view .LVU4495
imul edx, DWORD PTR [rcx], -1028477379 # tmp284, MEM[(char * {ref-all})ptr_113],
.LVL846:
# xxhash.h:1189: PROCESS1;
.loc 1 1189 26 is_stmt 0 view .LVU4496
movzx eax, BYTE PTR 4[rcx] # MEM[(const xxh_u8 *)ptr_113 + 4B], MEM[(const xxh_u8 *)ptr_113 + 4B]
# xxhash.h:1188: case 5: PROCESS4;
.loc 1 1188 26 view .LVU4497
add r9d, edx # h32, tmp284
.LVL847:
.loc 1 1188 26 view .LVU4498
ror r9d, 15 # _120,
.LVL848:
.loc 1 1188 26 view .LVU4499
imul edx, r9d, 668265263 # h32, _120,
.LVL849:
.loc 1 1188 34 is_stmt 1 view .LVU4500
.loc 1 1189 26 view .LVU4501
.loc 1 1189 26 view .LVU4502
.L211:
.loc 1 1189 26 is_stmt 0 view .LVU4503
imul eax, eax, 374761393 # tmp288, MEM[(const xxh_u8 *)ptr_113 + 4B],
add eax, edx # h32, h32
rol eax, 11 # _126,
imul edx, eax, -1640531535 # h32, _126,
.L210:
.LVL850:
.loc 1 1189 34 is_stmt 1 view .LVU4504
.loc 1 1190 26 view .LVU4505
.LBB9866:
.LBI9866:
.loc 1 1139 16 view .LVU4506
.LBB9867:
.loc 1 1141 5 view .LVU4507
# xxhash.h:1141: h32 ^= h32 >> 15;
.loc 1 1141 16 is_stmt 0 view .LVU4508
mov eax, edx # tmp290, h32
shr eax, 15 # tmp290,
# xxhash.h:1141: h32 ^= h32 >> 15;
.loc 1 1141 9 view .LVU4509
xor eax, edx # h32, h32
.LVL851:
.loc 1 1142 5 is_stmt 1 view .LVU4510
# xxhash.h:1142: h32 *= PRIME32_2;
.loc 1 1142 9 is_stmt 0 view .LVU4511
imul eax, eax, -2048144777 # h32, h32,
.LVL852:
.loc 1 1143 5 is_stmt 1 view .LVU4512
# xxhash.h:1143: h32 ^= h32 >> 13;
.loc 1 1143 16 is_stmt 0 view .LVU4513
mov edx, eax # _131, h32
.LVL853:
.loc 1 1143 16 view .LVU4514
shr edx, 13 # _131,
# xxhash.h:1143: h32 ^= h32 >> 13;
.loc 1 1143 9 view .LVU4515
xor eax, edx # h32, _131
.LVL854:
.loc 1 1144 5 is_stmt 1 view .LVU4516
# xxhash.h:1144: h32 *= PRIME32_3;
.loc 1 1144 9 is_stmt 0 view .LVU4517
imul eax, eax, -1028477379 # h32, h32,
.LVL855:
.loc 1 1145 5 is_stmt 1 view .LVU4518
# xxhash.h:1145: h32 ^= h32 >> 16;
.loc 1 1145 16 is_stmt 0 view .LVU4519
mov edx, eax # _134, h32
shr edx, 16 # _134,
# xxhash.h:1145: h32 ^= h32 >> 16;
.loc 1 1145 9 view .LVU4520
xor eax, edx # <retval>, _134
.LVL856:
.loc 1 1146 5 is_stmt 1 view .LVU4521
.loc 1 1146 5 is_stmt 0 view .LVU4522
.LBE9867:
.LBE9866:
.LBE9877:
.LBE9892:
.LBE9910:
.LBE9928:
# xxhash.h:1277: }
.loc 1 1277 1 view .LVU4523
pop rbx #
.cfi_remember_state
.cfi_restore 3
.cfi_def_cfa_offset 16
pop rsi #
.cfi_restore 4
.cfi_def_cfa_offset 8
ret
.LVL857:
.p2align 4,,10
.p2align 3
.L192:
.cfi_restore_state
.LBB9929:
.LBB9911:
.LBB9893:
.LBB9878:
.loc 1 1192 26 is_stmt 1 view .LVU4524
.loc 1 1192 26 is_stmt 0 view .LVU4525
.LBE9878:
.LBE9893:
.LBE9911:
.LBE9929:
.loc 1 1059 5 is_stmt 1 view .LVU4526
.loc 1 1060 9 view .LVU4527
.loc 1 1047 5 view .LVU4528
.loc 1 929 5 view .LVU4529
.loc 1 930 5 view .LVU4530
.loc 1 931 5 view .LVU4531
.LBB9930:
.LBB9912:
.LBB9894:
.LBB9879:
# xxhash.h:1192: case 14: PROCESS4;
.loc 1 1192 26 is_stmt 0 view .LVU4532
imul eax, DWORD PTR [rcx], -1028477379 # tmp291, MEM[(char * {ref-all})input_32],
add rcx, 4 # input,
.LVL858:
.loc 1 1192 26 view .LVU4533
add r9d, eax # h32, tmp291
.LVL859:
.loc 1 1192 26 is_stmt 1 view .LVU4534
.loc 1 1192 26 view .LVU4535
ror r9d, 15 # _142,
.LVL860:
.loc 1 1192 26 is_stmt 0 view .LVU4536
imul r9d, r9d, 668265263 # h32, _142,
.LVL861:
.L196:
.loc 1 1192 34 is_stmt 1 view .LVU4537
.loc 1 1194 26 view .LVU4538
.loc 1 1194 26 is_stmt 0 view .LVU4539
.LBE9879:
.LBE9894:
.LBE9912:
.LBE9930:
.loc 1 1059 5 is_stmt 1 view .LVU4540
.loc 1 1060 9 view .LVU4541
.loc 1 1047 5 view .LVU4542
.loc 1 929 5 view .LVU4543
.loc 1 930 5 view .LVU4544
.loc 1 931 5 view .LVU4545
.LBB9931:
.LBB9913:
.LBB9895:
.LBB9880:
# xxhash.h:1194: case 10: PROCESS4;
.loc 1 1194 26 is_stmt 0 view .LVU4546
imul eax, DWORD PTR [rcx], -1028477379 # tmp293, MEM[(char * {ref-all})ptr_144],
add rcx, 4 # input,
.LVL862:
.loc 1 1194 26 view .LVU4547
add r9d, eax # h32, tmp293
.LVL863:
.loc 1 1194 26 is_stmt 1 view .LVU4548
.loc 1 1194 26 view .LVU4549
ror r9d, 15 # _152,
.LVL864:
.loc 1 1194 26 is_stmt 0 view .LVU4550
imul r9d, r9d, 668265263 # h32, _152,
.LVL865:
.L200:
.loc 1 1194 34 is_stmt 1 view .LVU4551
.loc 1 1196 26 view .LVU4552
.loc 1 1196 26 is_stmt 0 view .LVU4553
.LBE9880:
.LBE9895:
.LBE9913:
.LBE9931:
.loc 1 1059 5 is_stmt 1 view .LVU4554
.loc 1 1060 9 view .LVU4555
.loc 1 1047 5 view .LVU4556
.loc 1 929 5 view .LVU4557
.loc 1 930 5 view .LVU4558
.loc 1 931 5 view .LVU4559
.LBB9932:
.LBB9914:
.LBB9896:
.LBB9881:
.loc 1 1196 26 view .LVU4560
.loc 1 1196 26 view .LVU4561
imul edx, DWORD PTR [rcx], -1028477379 # tmp295, MEM[(char * {ref-all})ptr_154],
.LVL866:
# xxhash.h:1197: PROCESS1;
.loc 1 1197 26 is_stmt 0 view .LVU4562
movzx eax, BYTE PTR 4[rcx] # MEM[(const xxh_u8 *)ptr_154 + 4B], MEM[(const xxh_u8 *)ptr_154 + 4B]
imul eax, eax, 374761393 # tmp299, MEM[(const xxh_u8 *)ptr_154 + 4B],
# xxhash.h:1196: case 6: PROCESS4;
.loc 1 1196 26 view .LVU4563
add r9d, edx # h32, tmp295
.LVL867:
.loc 1 1196 26 view .LVU4564
ror r9d, 15 # _161,
.LVL868:
.loc 1 1196 26 view .LVU4565
imul edx, r9d, 668265263 # h32, _161,
.LVL869:
.loc 1 1196 34 is_stmt 1 view .LVU4566
.loc 1 1197 26 view .LVU4567
.loc 1 1197 26 view .LVU4568
add eax, edx # h32, h32
rol eax, 11 # _167,
imul edx, eax, -1640531535 # h32, _167,
.LVL870:
.loc 1 1197 34 view .LVU4569
.loc 1 1198 26 view .LVU4570
.loc 1 1198 26 view .LVU4571
movzx eax, BYTE PTR 5[rcx] # MEM[(const xxh_u8 *)ptr_154 + 5B], MEM[(const xxh_u8 *)ptr_154 + 5B]
jmp .L211 #
.LVL871:
.p2align 4,,10
.p2align 3
.L194:
.loc 1 1177 26 view .LVU4572
.loc 1 1177 26 is_stmt 0 view .LVU4573
.LBE9881:
.LBE9896:
.LBE9914:
.LBE9932:
.loc 1 1059 5 is_stmt 1 view .LVU4574
.loc 1 1060 9 view .LVU4575
.loc 1 1047 5 view .LVU4576
.loc 1 929 5 view .LVU4577
.loc 1 930 5 view .LVU4578
.loc 1 931 5 view .LVU4579
.LBB9933:
.LBB9915:
.LBB9897:
.LBB9882:
# xxhash.h:1177: case 12: PROCESS4;
.loc 1 1177 26 is_stmt 0 view .LVU4580
imul eax, DWORD PTR [rcx], -1028477379 # tmp272, MEM[(char * {ref-all})input_32],
add rcx, 4 # input,
.LVL872:
.loc 1 1177 26 view .LVU4581
add r9d, eax # h32, tmp272
.LVL873:
.loc 1 1177 26 is_stmt 1 view .LVU4582
.loc 1 1177 26 view .LVU4583
ror r9d, 15 # _66,
.LVL874:
.loc 1 1177 26 is_stmt 0 view .LVU4584
imul r9d, r9d, 668265263 # h32, _66,
.LVL875:
.L198:
.loc 1 1177 34 is_stmt 1 view .LVU4585
.loc 1 1179 26 view .LVU4586
.loc 1 1179 26 is_stmt 0 view .LVU4587
.LBE9882:
.LBE9897:
.LBE9915:
.LBE9933:
.loc 1 1059 5 is_stmt 1 view .LVU4588
.loc 1 1060 9 view .LVU4589
.loc 1 1047 5 view .LVU4590
.loc 1 929 5 view .LVU4591
.loc 1 930 5 view .LVU4592
.loc 1 931 5 view .LVU4593
.LBB9934:
.LBB9916:
.LBB9898:
.LBB9883:
# xxhash.h:1179: case 8: PROCESS4;
.loc 1 1179 26 is_stmt 0 view .LVU4594
imul eax, DWORD PTR [rcx], -1028477379 # tmp274, MEM[(char * {ref-all})ptr_68],
add rcx, 4 # input,
.LVL876:
.loc 1 1179 26 view .LVU4595
add r9d, eax # h32, tmp274
.LVL877:
.loc 1 1179 26 is_stmt 1 view .LVU4596
.loc 1 1179 26 view .LVU4597
ror r9d, 15 # _76,
.LVL878:
.loc 1 1179 26 is_stmt 0 view .LVU4598
imul r9d, r9d, 668265263 # h32, _76,
.LVL879:
.L202:
.loc 1 1179 34 is_stmt 1 view .LVU4599
.loc 1 1181 26 view .LVU4600
.loc 1 1181 26 is_stmt 0 view .LVU4601
.LBE9883:
.LBE9898:
.LBE9916:
.LBE9934:
.loc 1 1059 5 is_stmt 1 view .LVU4602
.loc 1 1060 9 view .LVU4603
.loc 1 1047 5 view .LVU4604
.loc 1 929 5 view .LVU4605
.loc 1 930 5 view .LVU4606
.loc 1 931 5 view .LVU4607
.LBB9935:
.LBB9917:
.LBB9899:
.LBB9884:
.loc 1 1181 26 view .LVU4608
.loc 1 1181 26 view .LVU4609
imul edx, DWORD PTR [rcx], -1028477379 # tmp276, MEM[(char * {ref-all})ptr_78],
.LVL880:
.loc 1 1181 26 is_stmt 0 view .LVU4610
add r9d, edx # h32, tmp276
.LVL881:
.loc 1 1181 26 view .LVU4611
ror r9d, 15 # _85,
.LVL882:
.loc 1 1181 26 view .LVU4612
imul edx, r9d, 668265263 # h32, _85,
.LVL883:
.loc 1 1181 34 is_stmt 1 view .LVU4613
.loc 1 1182 26 view .LVU4614
.LBB9868:
.LBI9868:
.loc 1 1139 16 view .LVU4615
.LBB9869:
.loc 1 1141 5 view .LVU4616
jmp .L210 #
.LVL884:
.p2align 4,,10
.p2align 3
.L207:
.loc 1 1141 5 is_stmt 0 view .LVU4617
.LBE9869:
.LBE9868:
.LBE9884:
.LBE9899:
# xxhash.h:1255: return XXH32_finalize(h32, input, len&15, align);
.loc 1 1255 12 view .LVU4618
mov rdx, rcx # ptr, input
.LVL885:
.loc 1 1255 12 view .LVU4619
jmp .L204 #
.LBE9917:
.LBE9935:
.cfi_endproc
.LFE27:
.seh_endproc
.p2align 4
.globl XXH32_createState
.def XXH32_createState; .scl 2; .type 32; .endef
.seh_proc XXH32_createState
XXH32_createState:
.LFB28:
.loc 1 1284 1 is_stmt 1 view -0
.cfi_startproc
.seh_endprologue
.loc 1 1285 5 view .LVU4621
.LVL886:
.LBB9936:
.LBI9936:
.loc 1 816 14 view .LVU4622
.LBB9937:
.loc 1 816 37 view .LVU4623
# xxhash.h:816: static void* XXH_malloc(size_t s) { return malloc(s); }
.loc 1 816 44 is_stmt 0 view .LVU4624
mov ecx, 48 #,
.LBE9937:
.LBE9936:
# xxhash.h:1286: }
.loc 1 1286 1 view .LVU4625
.LBB9939:
.LBB9938:
# xxhash.h:816: static void* XXH_malloc(size_t s) { return malloc(s); }
.loc 1 816 44 view .LVU4626
jmp malloc #
.LVL887:
.LBE9938:
.LBE9939:
.cfi_endproc
.LFE28:
.seh_endproc
.p2align 4
.globl XXH32_freeState
.def XXH32_freeState; .scl 2; .type 32; .endef
.seh_proc XXH32_freeState
XXH32_freeState:
.LVL888:
.LFB29:
.loc 1 1288 1 is_stmt 1 view -0
.cfi_startproc
.loc 1 1288 1 is_stmt 0 view .LVU4628
sub rsp, 40 #,
.seh_stackalloc 40
.cfi_def_cfa_offset 48
.seh_endprologue
.loc 1 1289 5 is_stmt 1 view .LVU4629
.LVL889:
.LBB9940:
.LBI9940:
.loc 1 817 14 view .LVU4630
.LBB9941:
.loc 1 817 37 view .LVU4631
call free #
.LVL890:
.loc 1 817 37 is_stmt 0 view .LVU4632
.LBE9941:
.LBE9940:
.loc 1 1290 5 is_stmt 1 view .LVU4633
# xxhash.h:1291: }
.loc 1 1291 1 is_stmt 0 view .LVU4634
xor eax, eax #
add rsp, 40 #,
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE29:
.seh_endproc
.p2align 4
.globl XXH32_copyState
.def XXH32_copyState; .scl 2; .type 32; .endef
.seh_proc XXH32_copyState
XXH32_copyState:
.LVL891:
.LFB30:
.loc 1 1294 1 is_stmt 1 view -0
.cfi_startproc
.loc 1 1294 1 is_stmt 0 view .LVU4636
.seh_endprologue
.loc 1 1295 5 is_stmt 1 view .LVU4637
vmovdqu xmm0, XMMWORD PTR [rdx] # tmp89, MEM[(void *)srcState_3(D)]
vmovups XMMWORD PTR [rcx], xmm0 # MEM[(void *)dstState_2(D)], tmp89
vmovdqu xmm1, XMMWORD PTR 16[rdx] # tmp90, MEM[(void *)srcState_3(D)]
vmovups XMMWORD PTR 16[rcx], xmm1 # MEM[(void *)dstState_2(D)], tmp90
mov rax, QWORD PTR 32[rdx] # MEM[(void *)srcState_3(D)], MEM[(void *)srcState_3(D)]
mov rdx, QWORD PTR 40[rdx] # MEM[(void *)srcState_3(D)], MEM[(void *)srcState_3(D)]
.LVL892:
.loc 1 1295 5 is_stmt 0 view .LVU4638
mov QWORD PTR 32[rcx], rax # MEM[(void *)dstState_2(D)], MEM[(void *)srcState_3(D)]
mov QWORD PTR 40[rcx], rdx # MEM[(void *)dstState_2(D)], MEM[(void *)srcState_3(D)]
# xxhash.h:1296: }
.loc 1 1296 1 view .LVU4639
ret
.cfi_endproc
.LFE30:
.seh_endproc
.p2align 4
.globl XXH32_reset
.def XXH32_reset; .scl 2; .type 32; .endef
.seh_proc XXH32_reset
XXH32_reset:
.LVL893:
.LFB31:
.loc 1 1299 1 is_stmt 1 view -0
.cfi_startproc
.loc 1 1299 1 is_stmt 0 view .LVU4641
sub rsp, 56 #,
.seh_stackalloc 56
.cfi_def_cfa_offset 64
.seh_endprologue
.loc 1 1300 5 is_stmt 1 view .LVU4642
.loc 1 1301 5 view .LVU4643
# xxhash.h:1302: state.v1 = seed + PRIME32_1 + PRIME32_2;
.loc 1 1302 33 is_stmt 0 view .LVU4644
lea eax, 606290984[rdx] # tmp89,
# xxhash.h:1304: state.v3 = seed + 0;
.loc 1 1304 14 view .LVU4645
mov DWORD PTR 16[rsp], edx # state.v3, seed
# xxhash.h:1302: state.v1 = seed + PRIME32_1 + PRIME32_2;
.loc 1 1302 33 view .LVU4646
mov DWORD PTR 8[rsp], eax # state.v1, tmp89
# xxhash.h:1303: state.v2 = seed + PRIME32_2;
.loc 1 1303 21 view .LVU4647
lea eax, -2048144777[rdx] # tmp90,
# xxhash.h:1305: state.v4 = seed - PRIME32_1;
.loc 1 1305 21 view .LVU4648
add edx, 1640531535 # tmp91,
.LVL894:
# xxhash.h:1303: state.v2 = seed + PRIME32_2;
.loc 1 1303 21 view .LVU4649
mov DWORD PTR 12[rsp], eax # state.v2, tmp90
# xxhash.h:1301: memset(&state, 0, sizeof(state));
.loc 1 1301 5 view .LVU4650
mov QWORD PTR 40[rsp], 0 # MEM[(void *)&state],
.loc 1 1302 5 is_stmt 1 view .LVU4651
.loc 1 1303 5 view .LVU4652
.loc 1 1304 5 view .LVU4653
.loc 1 1305 5 view .LVU4654
# xxhash.h:1307: memcpy(statePtr, &state, sizeof(state) - sizeof(state.reserved));
.loc 1 1307 5 is_stmt 0 view .LVU4655
mov eax, DWORD PTR 40[rsp] # MEM[(void *)&state], MEM[(void *)&state]
# xxhash.h:1301: memset(&state, 0, sizeof(state));
.loc 1 1301 5 view .LVU4656
mov QWORD PTR [rsp], 0 # MEM[(void *)&state],
# xxhash.h:1307: memcpy(statePtr, &state, sizeof(state) - sizeof(state.reserved));
.loc 1 1307 5 view .LVU4657
vmovdqa xmm0, XMMWORD PTR [rsp] # tmp101, MEM[(void *)&state]
# xxhash.h:1301: memset(&state, 0, sizeof(state));
.loc 1 1301 5 view .LVU4658
mov QWORD PTR 24[rsp], 0 # MEM[(void *)&state],
# xxhash.h:1305: state.v4 = seed - PRIME32_1;
.loc 1 1305 21 view .LVU4659
mov DWORD PTR 20[rsp], edx # state.v4, tmp91
.loc 1 1307 5 is_stmt 1 view .LVU4660
vmovdqa xmm1, XMMWORD PTR 16[rsp] # tmp102, MEM[(void *)&state]
mov DWORD PTR 40[rcx], eax # MEM[(void *)statePtr_11(D)], MEM[(void *)&state]
.loc 1 1308 5 view .LVU4661
# xxhash.h:1309: }
.loc 1 1309 1 is_stmt 0 view .LVU4662
xor eax, eax #
# xxhash.h:1301: memset(&state, 0, sizeof(state));
.loc 1 1301 5 view .LVU4663
mov QWORD PTR 32[rsp], 0 # MEM[(void *)&state],
# xxhash.h:1307: memcpy(statePtr, &state, sizeof(state) - sizeof(state.reserved));
.loc 1 1307 5 view .LVU4664
mov QWORD PTR 32[rcx], 0 # MEM[(void *)statePtr_11(D)],
vmovups XMMWORD PTR [rcx], xmm0 # MEM[(void *)statePtr_11(D)], tmp101
vmovups XMMWORD PTR 16[rcx], xmm1 # MEM[(void *)statePtr_11(D)], tmp102
# xxhash.h:1309: }
.loc 1 1309 1 view .LVU4665
add rsp, 56 #,
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE31:
.seh_endproc
.p2align 4
.globl XXH32_update
.def XXH32_update; .scl 2; .type 32; .endef
.seh_proc XXH32_update
XXH32_update:
.LVL895:
.LFB32:
.loc 1 1314 1 is_stmt 1 view -0
.cfi_startproc
.loc 1 1314 1 is_stmt 0 view .LVU4667
push r13 #
.seh_pushreg r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
push r12 #
.seh_pushreg r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
push rdi #
.seh_pushreg rdi
.cfi_def_cfa_offset 32
.cfi_offset 5, -32
push rsi #
.seh_pushreg rsi
.cfi_def_cfa_offset 40
.cfi_offset 4, -40
push rbx #
.seh_pushreg rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
sub rsp, 32 #,
.seh_stackalloc 32
.cfi_def_cfa_offset 80
.seh_endprologue
.loc 1 1315 5 is_stmt 1 view .LVU4668
# xxhash.h:1314: {
.loc 1 1314 1 is_stmt 0 view .LVU4669
mov rsi, rcx # state, tmp241
mov r12, rdx # input, tmp242
# xxhash.h:1315: if (input==NULL)
.loc 1 1315 8 view .LVU4670
test rdx, rdx # input
je .L222 #,
.LBB9942:
.loc 1 1322 9 is_stmt 1 view .LVU4671
.LVL896:
.loc 1 1323 9 view .LVU4672
# xxhash.h:1323: const xxh_u8* const bEnd = p + len;
.loc 1 1323 29 is_stmt 0 view .LVU4673
lea rdi, [rdx+r8] # bEnd,
.LVL897:
.loc 1 1325 9 is_stmt 1 view .LVU4674
# xxhash.h:1325: state->total_len_32 += (XXH32_hash_t)len;
.loc 1 1325 29 is_stmt 0 view .LVU4675
mov edx, DWORD PTR [rcx] # _3, state_54(D)->total_len_32
.LVL898:
.loc 1 1325 29 view .LVU4676
add edx, r8d # _3, len
# xxhash.h:1326: state->large_len |= (XXH32_hash_t)((len>=16) | (state->total_len_32>=16));
.loc 1 1326 54 view .LVU4677
cmp r8, 15 # len,
seta al #, tmp172
cmp edx, 15 # _3,
# xxhash.h:1325: state->total_len_32 += (XXH32_hash_t)len;
.loc 1 1325 29 view .LVU4678
mov DWORD PTR [rcx], edx # state_54(D)->total_len_32, _3
.loc 1 1326 9 is_stmt 1 view .LVU4679
# xxhash.h:1326: state->large_len |= (XXH32_hash_t)((len>=16) | (state->total_len_32>=16));
.loc 1 1326 54 is_stmt 0 view .LVU4680
seta dl #, tmp174
or eax, edx # tmp175, tmp174
# xxhash.h:1328: if (state->memsize + len < 16) { /* fill in tmp buffer */
.loc 1 1328 18 view .LVU4681
mov edx, DWORD PTR 40[rcx] #, state_54(D)->memsize
# xxhash.h:1326: state->large_len |= (XXH32_hash_t)((len>=16) | (state->total_len_32>=16));
.loc 1 1326 29 view .LVU4682
movzx eax, al # tmp176, tmp175
# xxhash.h:1326: state->large_len |= (XXH32_hash_t)((len>=16) | (state->total_len_32>=16));
.loc 1 1326 26 view .LVU4683
or DWORD PTR 4[rcx], eax # state_54(D)->large_len, tmp176
.loc 1 1328 9 is_stmt 1 view .LVU4684
# xxhash.h:1328: if (state->memsize + len < 16) { /* fill in tmp buffer */
.loc 1 1328 28 is_stmt 0 view .LVU4685
lea rcx, [rdx+r8] # tmp177,
.LVL899:
# xxhash.h:1328: if (state->memsize + len < 16) { /* fill in tmp buffer */
.loc 1 1328 12 view .LVU4686
cmp rcx, 15 # tmp177,
jbe .L228 #,
.loc 1 1334 9 is_stmt 1 view .LVU4687
# xxhash.h:1334: if (state->memsize) { /* some data left from previous update */
.loc 1 1334 12 is_stmt 0 view .LVU4688
test edx, edx # _11
jne .L229 #,
.loc 1 1346 9 is_stmt 1 view .LVU4689
# xxhash.h:1346: if (p <= bEnd-16) {
.loc 1 1346 22 is_stmt 0 view .LVU4690
lea r8, -16[rdi] # tmp240,
.LVL900:
# xxhash.h:1346: if (p <= bEnd-16) {
.loc 1 1346 12 view .LVU4691
cmp r8, r12 # tmp240, input
jb .L220 #,
.LVL901:
.L231:
.LBB9943:
.loc 1 1347 13 is_stmt 1 view .LVU4692
.loc 1 1348 13 view .LVU4693
# xxhash.h:1348: xxh_u32 v1 = state->v1;
.loc 1 1348 21 is_stmt 0 view .LVU4694
mov eax, DWORD PTR 8[rsi] # v1, state_54(D)->v1
.LVL902:
.loc 1 1349 13 is_stmt 1 view .LVU4695
# xxhash.h:1349: xxh_u32 v2 = state->v2;
.loc 1 1349 21 is_stmt 0 view .LVU4696
mov r9d, DWORD PTR 12[rsi] # v2, state_54(D)->v2
.LVL903:
.loc 1 1350 13 is_stmt 1 view .LVU4697
# xxhash.h:1351: xxh_u32 v4 = state->v4;
.loc 1 1351 21 is_stmt 0 view .LVU4698
mov r11, r12 # p, input
# xxhash.h:1350: xxh_u32 v3 = state->v3;
.loc 1 1350 21 view .LVU4699
mov ecx, DWORD PTR 16[rsi] # v3, state_54(D)->v3
.LVL904:
.loc 1 1351 13 is_stmt 1 view .LVU4700
# xxhash.h:1351: xxh_u32 v4 = state->v4;
.loc 1 1351 21 is_stmt 0 view .LVU4701
mov r10d, DWORD PTR 20[rsi] # v4, state_54(D)->v4
.LVL905:
.p2align 4,,10
.p2align 3
.L221:
.loc 1 1353 13 is_stmt 1 discriminator 1 view .LVU4702
.loc 1 1354 17 discriminator 1 view .LVU4703
.loc 1 1354 17 is_stmt 0 discriminator 1 view .LVU4704
.LBE9943:
.LBE9942:
.loc 1 1047 5 is_stmt 1 discriminator 1 view .LVU4705
.loc 1 929 5 discriminator 1 view .LVU4706
.loc 1 930 5 discriminator 1 view .LVU4707
.loc 1 931 5 discriminator 1 view .LVU4708
.LBB10018:
.LBB9980:
.LBB9944:
.LBI9944:
.loc 1 1082 16 discriminator 1 view .LVU4709
.LBB9945:
.loc 1 1084 5 discriminator 1 view .LVU4710
# xxhash.h:1084: acc += input * PRIME32_2;
.loc 1 1084 18 is_stmt 0 discriminator 1 view .LVU4711
imul edx, DWORD PTR [r11], -2048144777 # tmp214, MEM[base: p_39, offset: 0B],
add r11, 16 # p,
.LVL906:
.loc 1 1084 18 discriminator 1 view .LVU4712
.LBE9945:
.LBE9944:
.LBB9950:
.LBB9951:
imul ebx, DWORD PTR -4[r11], -2048144777 # tmp223, MEM[base: p_39, offset: 12B],
.LBE9951:
.LBE9950:
.LBB9956:
.LBB9946:
# xxhash.h:1084: acc += input * PRIME32_2;
.loc 1 1084 9 discriminator 1 view .LVU4713
add eax, edx # acc, tmp214
.LVL907:
.loc 1 1085 5 is_stmt 1 discriminator 1 view .LVU4714
.LBE9946:
.LBE9956:
.LBB9957:
.LBB9958:
# xxhash.h:1084: acc += input * PRIME32_2;
.loc 1 1084 18 is_stmt 0 discriminator 1 view .LVU4715
imul edx, DWORD PTR -12[r11], -2048144777 # tmp217, MEM[base: p_39, offset: 4B],
.LBE9958:
.LBE9957:
.LBB9963:
.LBB9952:
# xxhash.h:1084: acc += input * PRIME32_2;
.loc 1 1084 9 discriminator 1 view .LVU4716
add r10d, ebx # acc, tmp223
.LVL908:
.loc 1 1084 9 discriminator 1 view .LVU4717
.LBE9952:
.LBE9963:
.LBB9964:
.LBB9947:
# xxhash.h:1085: acc = XXH_rotl32(acc, 13);
.loc 1 1085 10 discriminator 1 view .LVU4718
rol eax, 13 # acc,
.LVL909:
.loc 1 1086 5 is_stmt 1 discriminator 1 view .LVU4719
.LBE9947:
.LBE9964:
.LBB9965:
.LBB9953:
# xxhash.h:1085: acc = XXH_rotl32(acc, 13);
.loc 1 1085 10 is_stmt 0 discriminator 1 view .LVU4720
rol r10d, 13 # acc,
.LBE9953:
.LBE9965:
.LBB9966:
.LBB9948:
# xxhash.h:1086: acc *= PRIME32_1;
.loc 1 1086 9 discriminator 1 view .LVU4721
imul eax, eax, -1640531535 # v1, acc,
.LVL910:
.loc 1 1133 5 is_stmt 1 discriminator 1 view .LVU4722
.LBE9948:
.LBE9966:
.LBB9967:
.LBB9959:
# xxhash.h:1084: acc += input * PRIME32_2;
.loc 1 1084 9 is_stmt 0 discriminator 1 view .LVU4723
add r9d, edx # acc, tmp217
.LVL911:
.loc 1 1084 9 discriminator 1 view .LVU4724
.LBE9959:
.LBE9967:
.LBB9968:
.LBB9969:
# xxhash.h:1084: acc += input * PRIME32_2;
.loc 1 1084 18 discriminator 1 view .LVU4725
imul edx, DWORD PTR -8[r11], -2048144777 # tmp220, MEM[base: p_39, offset: 8B],
.LBE9969:
.LBE9968:
.LBB9972:
.LBB9960:
# xxhash.h:1085: acc = XXH_rotl32(acc, 13);
.loc 1 1085 10 discriminator 1 view .LVU4726
rol r9d, 13 # acc,
.LBE9960:
.LBE9972:
.LBB9973:
.LBB9954:
# xxhash.h:1086: acc *= PRIME32_1;
.loc 1 1086 9 discriminator 1 view .LVU4727
imul r10d, r10d, -1640531535 # v4, acc,
.LBE9954:
.LBE9973:
.LBB9974:
.LBB9961:
imul r9d, r9d, -1640531535 # v2, acc,
.LBE9961:
.LBE9974:
.LBB9975:
.LBB9970:
# xxhash.h:1084: acc += input * PRIME32_2;
.loc 1 1084 9 discriminator 1 view .LVU4728
add ecx, edx # acc, tmp220
.LVL912:
# xxhash.h:1085: acc = XXH_rotl32(acc, 13);
.loc 1 1085 10 discriminator 1 view .LVU4729
rol ecx, 13 # acc,
# xxhash.h:1086: acc *= PRIME32_1;
.loc 1 1086 9 discriminator 1 view .LVU4730
imul ecx, ecx, -1640531535 # v3, acc,
.LBE9970:
.LBE9975:
.LBB9976:
.LBB9949:
# xxhash.h:1133: __asm__("" : "+r" (acc));
.loc 1 1133 5 discriminator 1 view .LVU4731
.LVL913:
.loc 1 1135 5 is_stmt 1 discriminator 1 view .LVU4732
.loc 1 1135 5 is_stmt 0 discriminator 1 view .LVU4733
.LBE9949:
.LBE9976:
.loc 1 1354 56 is_stmt 1 discriminator 1 view .LVU4734
.loc 1 1355 17 discriminator 1 view .LVU4735
.loc 1 1355 17 is_stmt 0 discriminator 1 view .LVU4736
.LBE9980:
.LBE10018:
.loc 1 1047 5 is_stmt 1 discriminator 1 view .LVU4737
.loc 1 929 5 discriminator 1 view .LVU4738
.loc 1 930 5 discriminator 1 view .LVU4739
.loc 1 931 5 discriminator 1 view .LVU4740
.LBB10019:
.LBB9981:
.LBB9977:
.LBI9957:
.loc 1 1082 16 discriminator 1 view .LVU4741
.LBB9962:
.loc 1 1084 5 discriminator 1 view .LVU4742
.loc 1 1085 5 discriminator 1 view .LVU4743
.loc 1 1086 5 discriminator 1 view .LVU4744
.loc 1 1133 5 discriminator 1 view .LVU4745
.LVL914:
.loc 1 1135 5 discriminator 1 view .LVU4746
.loc 1 1135 5 is_stmt 0 discriminator 1 view .LVU4747
.LBE9962:
.LBE9977:
.loc 1 1355 56 is_stmt 1 discriminator 1 view .LVU4748
.loc 1 1356 17 discriminator 1 view .LVU4749
.loc 1 1356 17 is_stmt 0 discriminator 1 view .LVU4750
.LBE9981:
.LBE10019:
.loc 1 1047 5 is_stmt 1 discriminator 1 view .LVU4751
.loc 1 929 5 discriminator 1 view .LVU4752
.loc 1 930 5 discriminator 1 view .LVU4753
.loc 1 931 5 discriminator 1 view .LVU4754
.LBB10020:
.LBB9982:
.LBB9978:
.LBI9968:
.loc 1 1082 16 discriminator 1 view .LVU4755
.LBB9971:
.loc 1 1084 5 discriminator 1 view .LVU4756
.loc 1 1085 5 discriminator 1 view .LVU4757
.loc 1 1086 5 discriminator 1 view .LVU4758
.loc 1 1133 5 discriminator 1 view .LVU4759
.LVL915:
.loc 1 1135 5 discriminator 1 view .LVU4760
.loc 1 1135 5 is_stmt 0 discriminator 1 view .LVU4761
.LBE9971:
.LBE9978:
.loc 1 1356 56 is_stmt 1 discriminator 1 view .LVU4762
.loc 1 1357 17 discriminator 1 view .LVU4763
.loc 1 1357 17 is_stmt 0 discriminator 1 view .LVU4764
.LBE9982:
.LBE10020:
.loc 1 1047 5 is_stmt 1 discriminator 1 view .LVU4765
.loc 1 929 5 discriminator 1 view .LVU4766
.loc 1 930 5 discriminator 1 view .LVU4767
.loc 1 931 5 discriminator 1 view .LVU4768
.LBB10021:
.LBB9983:
.LBB9979:
.LBI9950:
.loc 1 1082 16 discriminator 1 view .LVU4769
.LBB9955:
.loc 1 1084 5 discriminator 1 view .LVU4770
.loc 1 1085 5 discriminator 1 view .LVU4771
.loc 1 1086 5 discriminator 1 view .LVU4772
.loc 1 1133 5 discriminator 1 view .LVU4773
.LVL916:
.loc 1 1135 5 discriminator 1 view .LVU4774
.loc 1 1135 5 is_stmt 0 discriminator 1 view .LVU4775
.LBE9955:
.LBE9979:
.loc 1 1357 56 is_stmt 1 discriminator 1 view .LVU4776
.loc 1 1358 21 discriminator 1 view .LVU4777
# xxhash.h:1358: } while (p<=limit);
.loc 1 1358 13 is_stmt 0 discriminator 1 view .LVU4778
cmp r8, r11 # tmp240, p
jnb .L221 #,
# xxhash.h:1360: state->v1 = v1;
.loc 1 1360 23 view .LVU4779
vmovd xmm2, ecx # v3, v3
vmovd xmm3, eax # v1, v1
sub r8, r12 # tmp227, input
.LVL917:
.loc 1 1360 23 view .LVU4780
vpinsrd xmm1, xmm2, r10d, 1 # tmp231, v3, v4
vpinsrd xmm0, xmm3, r9d, 1 # tmp232, v1, v2
and r8, -16 # tmp229,
vpunpcklqdq xmm0, xmm0, xmm1 # tmp230, tmp232, tmp231
lea r12, 16[r12+r8] # input,
.loc 1 1360 13 is_stmt 1 view .LVU4781
.loc 1 1361 13 view .LVU4782
.loc 1 1362 13 view .LVU4783
.loc 1 1363 13 view .LVU4784
# xxhash.h:1360: state->v1 = v1;
.loc 1 1360 23 is_stmt 0 view .LVU4785
vmovups XMMWORD PTR 8[rsi], xmm0 # MEM[(unsigned int *)state_54(D) + 8B], tmp230
.LVL918:
.L220:
.loc 1 1360 23 view .LVU4786
.LBE9983:
.loc 1 1366 9 is_stmt 1 view .LVU4787
.LBE10021:
# xxhash.h:1372: return XXH_OK;
.loc 1 1372 12 is_stmt 0 view .LVU4788
xor r13d, r13d # <retval>
.LBB10022:
# xxhash.h:1366: if (p < bEnd) {
.loc 1 1366 12 view .LVU4789
cmp r12, rdi # input, bEnd
jb .L230 #,
.LBE10022:
# xxhash.h:1373: }
.loc 1 1373 1 view .LVU4790
mov eax, r13d #, <retval>
add rsp, 32 #,
.cfi_remember_state
.cfi_def_cfa_offset 48
pop rbx #
.cfi_restore 3
.cfi_def_cfa_offset 40
pop rsi #
.cfi_restore 4
.cfi_def_cfa_offset 32
.LVL919:
.loc 1 1373 1 view .LVU4791
pop rdi #
.cfi_restore 5
.cfi_def_cfa_offset 24
.LVL920:
.loc 1 1373 1 view .LVU4792
pop r12 #
.cfi_restore 12
.cfi_def_cfa_offset 16
.LVL921:
.loc 1 1373 1 view .LVU4793
pop r13 #
.cfi_restore 13
.cfi_def_cfa_offset 8
ret
.LVL922:
.p2align 4,,10
.p2align 3
.L229:
.cfi_restore_state
.LBB10023:
.loc 1 1335 13 is_stmt 1 view .LVU4794
.LBB9984:
.LBI9984:
.loc 1 820 14 view .LVU4795
.LBB9985:
.loc 1 822 5 view .LVU4796
.LBE9985:
.LBE9984:
# xxhash.h:1335: XXH_memcpy((xxh_u8*)(state->mem32) + state->memsize, input, 16-state->memsize);
.loc 1 1335 75 is_stmt 0 view .LVU4797
mov ebx, 16 # tmp188,
# xxhash.h:1335: XXH_memcpy((xxh_u8*)(state->mem32) + state->memsize, input, 16-state->memsize);
.loc 1 1335 13 view .LVU4798
lea rcx, 24[rsi+rdx] # tmp186,
.LVL923:
.LBB9987:
.LBB9986:
# xxhash.h:822: return memcpy(dest,src,size);
.loc 1 822 12 view .LVU4799
mov r8d, ebx # tmp245, tmp188
.LVL924:
.loc 1 822 12 view .LVU4800
sub r8d, edx # tmp245, _11
.LVL925:
.loc 1 822 12 view .LVU4801
mov rdx, r12 #, input
call memcpy #
.LVL926:
.loc 1 822 12 view .LVU4802
.LBE9986:
.LBE9987:
.LBB9988:
.loc 1 1336 17 is_stmt 1 view .LVU4803
.loc 1 1337 17 view .LVU4804
.loc 1 1337 17 is_stmt 0 view .LVU4805
.LBE9988:
.LBE10023:
.loc 1 1047 5 is_stmt 1 view .LVU4806
.loc 1 929 5 view .LVU4807
.loc 1 930 5 view .LVU4808
.loc 1 931 5 view .LVU4809
.LBB10024:
.LBB10003:
.LBB9989:
.LBI9989:
.loc 1 1082 16 view .LVU4810
.LBB9990:
.loc 1 1084 5 view .LVU4811
# xxhash.h:1084: acc += input * PRIME32_2;
.loc 1 1084 18 is_stmt 0 view .LVU4812
imul eax, DWORD PTR 24[rsi], -2048144777 # tmp195, MEM[(char * {ref-all})state_54(D) + 24B],
# xxhash.h:1084: acc += input * PRIME32_2;
.loc 1 1084 9 view .LVU4813
add eax, DWORD PTR 8[rsi] # acc, state_54(D)->v1
.LVL927:
.loc 1 1085 5 is_stmt 1 view .LVU4814
.LBE9990:
.LBE9989:
.LBE10003:
# xxhash.h:1346: if (p <= bEnd-16) {
.loc 1 1346 22 is_stmt 0 view .LVU4815
lea r8, -16[rdi] # tmp240,
.LBB10004:
.LBB9994:
.LBB9991:
# xxhash.h:1085: acc = XXH_rotl32(acc, 13);
.loc 1 1085 10 view .LVU4816
rol eax, 13 # acc,
.LVL928:
.loc 1 1086 5 is_stmt 1 view .LVU4817
.LBE9991:
.LBE9994:
.LBE10004:
# xxhash.h:1342: p += 16-state->memsize;
.loc 1 1342 20 is_stmt 0 view .LVU4818
sub ebx, DWORD PTR 40[rsi] # tmp213, state_54(D)->memsize
# xxhash.h:1343: state->memsize = 0;
.loc 1 1343 28 view .LVU4819
mov DWORD PTR 40[rsi], 0 # state_54(D)->memsize,
.LBB10005:
.LBB9995:
.LBB9992:
# xxhash.h:1086: acc *= PRIME32_1;
.loc 1 1086 9 view .LVU4820
imul eax, eax, -1640531535 # acc, acc,
.LVL929:
.loc 1 1133 5 is_stmt 1 view .LVU4821
.LBE9992:
.LBE9995:
.LBE10005:
# xxhash.h:1342: p += 16-state->memsize;
.loc 1 1342 15 is_stmt 0 view .LVU4822
add r12, rbx # input, tmp213
.LVL930:
.LBB10006:
.LBB9996:
.LBB9993:
# xxhash.h:1133: __asm__("" : "+r" (acc));
.loc 1 1133 5 view .LVU4823
.LVL931:
.loc 1 1135 5 is_stmt 1 view .LVU4824
.loc 1 1135 5 is_stmt 0 view .LVU4825
.LBE9993:
.LBE9996:
# xxhash.h:1337: state->v1 = XXH32_round(state->v1, XXH_readLE32(p32)); p32++;
.loc 1 1337 27 view .LVU4826
mov DWORD PTR 8[rsi], eax # state_54(D)->v1, acc
.loc 1 1337 72 is_stmt 1 view .LVU4827
.LVL932:
.loc 1 1338 17 view .LVU4828
.loc 1 1338 17 is_stmt 0 view .LVU4829
.LBE10006:
.LBE10024:
.loc 1 1047 5 is_stmt 1 view .LVU4830
.loc 1 929 5 view .LVU4831
.loc 1 930 5 view .LVU4832
.loc 1 931 5 view .LVU4833
.LBB10025:
.LBB10007:
.LBB9997:
.LBI9997:
.loc 1 1082 16 view .LVU4834
.LBB9998:
.loc 1 1084 5 view .LVU4835
# xxhash.h:1084: acc += input * PRIME32_2;
.loc 1 1084 18 is_stmt 0 view .LVU4836
imul eax, DWORD PTR 28[rsi], -2048144777 # tmp199, MEM[(char * {ref-all})state_54(D) + 28B],
# xxhash.h:1084: acc += input * PRIME32_2;
.loc 1 1084 9 view .LVU4837
add eax, DWORD PTR 12[rsi] # acc, state_54(D)->v2
.LVL933:
.loc 1 1085 5 is_stmt 1 view .LVU4838
# xxhash.h:1085: acc = XXH_rotl32(acc, 13);
.loc 1 1085 10 is_stmt 0 view .LVU4839
rol eax, 13 # acc,
.LVL934:
.loc 1 1086 5 is_stmt 1 view .LVU4840
# xxhash.h:1086: acc *= PRIME32_1;
.loc 1 1086 9 is_stmt 0 view .LVU4841
imul eax, eax, -1640531535 # acc, acc,
.LVL935:
.loc 1 1133 5 is_stmt 1 view .LVU4842
.LVL936:
.loc 1 1135 5 view .LVU4843
.loc 1 1135 5 is_stmt 0 view .LVU4844
.LBE9998:
.LBE9997:
# xxhash.h:1338: state->v2 = XXH32_round(state->v2, XXH_readLE32(p32)); p32++;
.loc 1 1338 27 view .LVU4845
mov DWORD PTR 12[rsi], eax # state_54(D)->v2, acc
.loc 1 1338 72 is_stmt 1 view .LVU4846
.LVL937:
.loc 1 1339 17 view .LVU4847
.loc 1 1339 17 is_stmt 0 view .LVU4848
.LBE10007:
.LBE10025:
.loc 1 1047 5 is_stmt 1 view .LVU4849
.loc 1 929 5 view .LVU4850
.loc 1 930 5 view .LVU4851
.loc 1 931 5 view .LVU4852
.LBB10026:
.LBB10008:
.LBB9999:
.LBI9999:
.loc 1 1082 16 view .LVU4853
.LBB10000:
.loc 1 1084 5 view .LVU4854
# xxhash.h:1084: acc += input * PRIME32_2;
.loc 1 1084 18 is_stmt 0 view .LVU4855
imul eax, DWORD PTR 32[rsi], -2048144777 # tmp203, MEM[(char * {ref-all})state_54(D) + 32B],
# xxhash.h:1084: acc += input * PRIME32_2;
.loc 1 1084 9 view .LVU4856
add eax, DWORD PTR 16[rsi] # acc, state_54(D)->v3
.LVL938:
.loc 1 1085 5 is_stmt 1 view .LVU4857
# xxhash.h:1085: acc = XXH_rotl32(acc, 13);
.loc 1 1085 10 is_stmt 0 view .LVU4858
rol eax, 13 # acc,
.LVL939:
.loc 1 1086 5 is_stmt 1 view .LVU4859
# xxhash.h:1086: acc *= PRIME32_1;
.loc 1 1086 9 is_stmt 0 view .LVU4860
imul eax, eax, -1640531535 # acc, acc,
.LVL940:
.loc 1 1133 5 is_stmt 1 view .LVU4861
.LVL941:
.loc 1 1135 5 view .LVU4862
.loc 1 1135 5 is_stmt 0 view .LVU4863
.LBE10000:
.LBE9999:
# xxhash.h:1339: state->v3 = XXH32_round(state->v3, XXH_readLE32(p32)); p32++;
.loc 1 1339 27 view .LVU4864
mov DWORD PTR 16[rsi], eax # state_54(D)->v3, acc
.loc 1 1339 72 is_stmt 1 view .LVU4865
.LVL942:
.loc 1 1340 17 view .LVU4866
.loc 1 1340 17 is_stmt 0 view .LVU4867
.LBE10008:
.LBE10026:
.loc 1 1047 5 is_stmt 1 view .LVU4868
.loc 1 929 5 view .LVU4869
.loc 1 930 5 view .LVU4870
.loc 1 931 5 view .LVU4871
.LBB10027:
.LBB10009:
.LBB10001:
.LBI10001:
.loc 1 1082 16 view .LVU4872
.LBB10002:
.loc 1 1084 5 view .LVU4873
# xxhash.h:1084: acc += input * PRIME32_2;
.loc 1 1084 18 is_stmt 0 view .LVU4874
imul eax, DWORD PTR 36[rsi], -2048144777 # tmp207, MEM[(char * {ref-all})state_54(D) + 36B],
# xxhash.h:1084: acc += input * PRIME32_2;
.loc 1 1084 9 view .LVU4875
add eax, DWORD PTR 20[rsi] # acc, state_54(D)->v4
.LVL943:
.loc 1 1085 5 is_stmt 1 view .LVU4876
# xxhash.h:1085: acc = XXH_rotl32(acc, 13);
.loc 1 1085 10 is_stmt 0 view .LVU4877
rol eax, 13 # acc,
.LVL944:
.loc 1 1086 5 is_stmt 1 view .LVU4878
# xxhash.h:1086: acc *= PRIME32_1;
.loc 1 1086 9 is_stmt 0 view .LVU4879
imul eax, eax, -1640531535 # acc, acc,
.LVL945:
.loc 1 1133 5 is_stmt 1 view .LVU4880
.LVL946:
.loc 1 1135 5 view .LVU4881
.loc 1 1135 5 is_stmt 0 view .LVU4882
.LBE10002:
.LBE10001:
# xxhash.h:1340: state->v4 = XXH32_round(state->v4, XXH_readLE32(p32));
.loc 1 1340 27 view .LVU4883
mov DWORD PTR 20[rsi], eax # state_54(D)->v4, acc
.LBE10009:
.loc 1 1342 13 is_stmt 1 view .LVU4884
.LVL947:
.loc 1 1343 13 view .LVU4885
.loc 1 1346 9 view .LVU4886
# xxhash.h:1346: if (p <= bEnd-16) {
.loc 1 1346 12 is_stmt 0 view .LVU4887
cmp r8, r12 # tmp240, input
jb .L220 #,
jmp .L231 #
.LVL948:
.p2align 4,,10
.p2align 3
.L230:
.loc 1 1367 13 is_stmt 1 view .LVU4888
# xxhash.h:1367: XXH_memcpy(state->mem32, p, (size_t)(bEnd-p));
.loc 1 1367 54 is_stmt 0 view .LVU4889
sub rdi, r12 # _34, input
.LVL949:
.LBB10010:
.LBI10010:
.loc 1 820 14 is_stmt 1 view .LVU4890
.LBB10011:
.loc 1 822 5 view .LVU4891
# xxhash.h:822: return memcpy(dest,src,size);
.loc 1 822 12 is_stmt 0 view .LVU4892
lea rcx, 24[rsi] # tmp233,
.LVL950:
.loc 1 822 12 view .LVU4893
mov rdx, r12 #, input
mov r8, rdi #, _34
call memcpy #
.LVL951:
.loc 1 822 12 view .LVU4894
.LBE10011:
.LBE10010:
.loc 1 1368 13 is_stmt 1 view .LVU4895
.LBE10027:
# xxhash.h:1373: }
.loc 1 1373 1 is_stmt 0 view .LVU4896
mov eax, r13d #, <retval>
.LBB10028:
# xxhash.h:1368: state->memsize = (unsigned)(bEnd-p);
.loc 1 1368 30 view .LVU4897
mov DWORD PTR 40[rsi], edi # state_54(D)->memsize, _34
.LBE10028:
# xxhash.h:1373: }
.loc 1 1373 1 view .LVU4898
add rsp, 32 #,
.cfi_remember_state
.cfi_def_cfa_offset 48
pop rbx #
.cfi_restore 3
.cfi_def_cfa_offset 40
pop rsi #
.cfi_restore 4
.cfi_def_cfa_offset 32
.LVL952:
.loc 1 1373 1 view .LVU4899
pop rdi #
.cfi_restore 5
.cfi_def_cfa_offset 24
pop r12 #
.cfi_restore 12
.cfi_def_cfa_offset 16
.LVL953:
.loc 1 1373 1 view .LVU4900
pop r13 #
.cfi_restore 13
.cfi_def_cfa_offset 8
ret
.LVL954:
.p2align 4,,10
.p2align 3
.L222:
.cfi_restore_state
# xxhash.h:1319: return XXH_ERROR;
.loc 1 1319 16 view .LVU4901
mov r13d, 1 # <retval>,
# xxhash.h:1373: }
.loc 1 1373 1 view .LVU4902
mov eax, r13d #, <retval>
add rsp, 32 #,
.cfi_remember_state
.cfi_def_cfa_offset 48
pop rbx #
.cfi_restore 3
.cfi_def_cfa_offset 40
pop rsi #
.cfi_restore 4
.cfi_def_cfa_offset 32
pop rdi #
.cfi_restore 5
.cfi_def_cfa_offset 24
pop r12 #
.cfi_restore 12
.cfi_def_cfa_offset 16
pop r13 #
.cfi_restore 13
.cfi_def_cfa_offset 8
ret
.LVL955:
.p2align 4,,10
.p2align 3
.L228:
.cfi_restore_state
.LBB10029:
.loc 1 1329 13 is_stmt 1 view .LVU4903
.LBB10012:
.LBI10012:
.loc 1 820 14 view .LVU4904
.LBB10013:
.loc 1 822 5 view .LVU4905
.LBE10013:
.LBE10012:
# xxhash.h:1329: XXH_memcpy((xxh_u8*)(state->mem32) + state->memsize, input, len);
.loc 1 1329 13 is_stmt 0 view .LVU4906
lea rcx, 24[rsi+rdx] # tmp179,
.LVL956:
.LBB10016:
.LBB10014:
# xxhash.h:822: return memcpy(dest,src,size);
.loc 1 822 12 view .LVU4907
mov rdx, r12 #, input
mov QWORD PTR 96[rsp], r8 # len, len
.LBE10014:
.LBE10016:
# xxhash.h:1331: return XXH_OK;
.loc 1 1331 20 view .LVU4908
xor r13d, r13d # <retval>
.LBB10017:
.LBB10015:
# xxhash.h:822: return memcpy(dest,src,size);
.loc 1 822 12 view .LVU4909
call memcpy #
.LVL957:
.loc 1 822 12 view .LVU4910
.LBE10015:
.LBE10017:
.loc 1 1330 13 is_stmt 1 view .LVU4911
# xxhash.h:1330: state->memsize += (XXH32_hash_t)len;
.loc 1 1330 28 is_stmt 0 view .LVU4912
mov r8, QWORD PTR 96[rsp] # len, len
add DWORD PTR 40[rsi], r8d # state_54(D)->memsize, len
.loc 1 1331 13 is_stmt 1 view .LVU4913
.LBE10029:
# xxhash.h:1373: }
.loc 1 1373 1 is_stmt 0 view .LVU4914
mov eax, r13d #, <retval>
add rsp, 32 #,
.cfi_def_cfa_offset 48
pop rbx #
.cfi_restore 3
.cfi_def_cfa_offset 40
pop rsi #
.cfi_restore 4
.cfi_def_cfa_offset 32
.LVL958:
.loc 1 1373 1 view .LVU4915
pop rdi #
.cfi_restore 5
.cfi_def_cfa_offset 24
.LVL959:
.loc 1 1373 1 view .LVU4916
pop r12 #
.cfi_restore 12
.cfi_def_cfa_offset 16
.LVL960:
.loc 1 1373 1 view .LVU4917
pop r13 #
.cfi_restore 13
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE32:
.seh_endproc
.p2align 4
.globl XXH32_digest
.def XXH32_digest; .scl 2; .type 32; .endef
.seh_proc XXH32_digest
XXH32_digest:
.LVL961:
.LFB33:
.loc 1 1377 1 is_stmt 1 view -0
.cfi_startproc
.loc 1 1377 1 is_stmt 0 view .LVU4919
.seh_endprologue
.loc 1 1378 5 is_stmt 1 view .LVU4920
.loc 1 1380 5 view .LVU4921
mov edx, DWORD PTR 16[rcx] # pretmp_544, state_19(D)->v3
# xxhash.h:1380: if (state->large_len) {
.loc 1 1380 8 is_stmt 0 view .LVU4922
mov r8d, DWORD PTR 4[rcx] #, state_19(D)->large_len
# xxhash.h:1386: h32 = state->v3 /* == seed */ + PRIME32_5;
.loc 1 1386 13 view .LVU4923
lea eax, 374761393[rdx] # h32,
# xxhash.h:1380: if (state->large_len) {
.loc 1 1380 8 view .LVU4924
test r8d, r8d #
je .L234 #,
.loc 1 1381 9 is_stmt 1 view .LVU4925
# xxhash.h:1381: h32 = XXH_rotl32(state->v1, 1)
.loc 1 1381 15 is_stmt 0 view .LVU4926
mov r8d, DWORD PTR 8[rcx] # tmp214, state_19(D)->v1
# xxhash.h:1382: + XXH_rotl32(state->v2, 7)
.loc 1 1382 15 view .LVU4927
mov eax, DWORD PTR 12[rcx] # tmp216, state_19(D)->v2
# xxhash.h:1383: + XXH_rotl32(state->v3, 12)
.loc 1 1383 15 view .LVU4928
rol edx, 12 # tmp219,
# xxhash.h:1382: + XXH_rotl32(state->v2, 7)
.loc 1 1382 15 view .LVU4929
rol eax, 7 # tmp216,
# xxhash.h:1381: h32 = XXH_rotl32(state->v1, 1)
.loc 1 1381 15 view .LVU4930
rol r8d # tmp214
# xxhash.h:1382: + XXH_rotl32(state->v2, 7)
.loc 1 1382 13 view .LVU4931
add r8d, eax # tmp218, tmp216
# xxhash.h:1383: + XXH_rotl32(state->v3, 12)
.loc 1 1383 13 view .LVU4932
lea eax, [r8+rdx] # tmp220,
# xxhash.h:1384: + XXH_rotl32(state->v4, 18);
.loc 1 1384 15 view .LVU4933
mov edx, DWORD PTR 20[rcx] # tmp221, state_19(D)->v4
ror edx, 14 # tmp221,
# xxhash.h:1381: h32 = XXH_rotl32(state->v1, 1)
.loc 1 1381 13 view .LVU4934
add eax, edx # h32, tmp221
.LVL962:
.L234:
.loc 1 1389 5 is_stmt 1 view .LVU4935
mov r9d, DWORD PTR 40[rcx] # state_19(D)->memsize, state_19(D)->memsize
# xxhash.h:1389: h32 += state->total_len_32;
.loc 1 1389 9 is_stmt 0 view .LVU4936
add eax, DWORD PTR [rcx] # h32, state_19(D)->total_len_32
.LVL963:
.loc 1 1389 9 view .LVU4937
lea r10, .L237[rip] # tmp227,
# xxhash.h:1391: return XXH32_finalize(h32, (const xxh_u8*)state->mem32, state->memsize, XXH_aligned);
.loc 1 1391 47 view .LVU4938
lea r8, 24[rcx] # _16,
# xxhash.h:1389: h32 += state->total_len_32;
.loc 1 1389 9 view .LVU4939
mov edx, eax # h32, h32
.LVL964:
.loc 1 1391 5 is_stmt 1 view .LVU4940
.LBB10064:
.LBI10064:
.loc 1 1152 1 view .LVU4941
.LBB10065:
.loc 1 1164 5 view .LVU4942
.loc 1 1176 10 view .LVU4943
and r9d, 15 # tmp226,
.LVL965:
.loc 1 1176 10 is_stmt 0 view .LVU4944
movsx rax, DWORD PTR [r10+r9*4] # tmp229,
.LVL966:
.loc 1 1176 10 view .LVU4945
add rax, r10 # tmp230, tmp227
jmp rax # tmp230
.section .rdata,"dr"
.align 4
.L237:
.long .L235-.L237
.long .L251-.L237
.long .L253-.L237
.long .L249-.L237
.long .L248-.L237
.long .L247-.L237
.long .L246-.L237
.long .L245-.L237
.long .L244-.L237
.long .L243-.L237
.long .L242-.L237
.long .L241-.L237
.long .L240-.L237
.long .L239-.L237
.long .L238-.L237
.long .L236-.L237
.text
.p2align 4,,10
.p2align 3
.L236:
.loc 1 1201 26 is_stmt 1 view .LVU4946
.LVL967:
.LBB10066:
.LBI10066:
.loc 1 1057 1 view .LVU4947
.LBB10067:
.loc 1 1059 5 view .LVU4948
.loc 1 1062 9 view .LVU4949
.loc 1 1062 9 is_stmt 0 view .LVU4950
.LBE10067:
.LBE10066:
.loc 1 1201 26 is_stmt 1 view .LVU4951
.loc 1 1201 26 is_stmt 0 view .LVU4952
imul eax, DWORD PTR 24[rcx], -1028477379 # tmp268, MEM[(const xxh_u32 *)state_19(D) + 24B],
lea r8, 28[rcx] # _16,
.LVL968:
.loc 1 1201 26 is_stmt 1 view .LVU4953
add eax, edx # h32, h32
.LVL969:
.loc 1 1201 26 is_stmt 0 view .LVU4954
ror eax, 15 # _154,
.LVL970:
.loc 1 1201 26 view .LVU4955
imul edx, eax, 668265263 # h32, _154,
.LVL971:
.L241:
.loc 1 1201 34 is_stmt 1 view .LVU4956
.loc 1 1203 26 view .LVU4957
.LBB10068:
.LBI10068:
.loc 1 1057 1 view .LVU4958
.LBB10069:
.loc 1 1059 5 view .LVU4959
.loc 1 1062 9 view .LVU4960
.loc 1 1062 9 is_stmt 0 view .LVU4961
.LBE10069:
.LBE10068:
# xxhash.h:1203: case 11: PROCESS4;
.loc 1 1203 26 view .LVU4962
imul eax, DWORD PTR [r8], -1028477379 # tmp271, MEM[(const xxh_u32 *)ptr_156],
add r8, 4 # _16,
.LVL972:
.loc 1 1203 26 view .LVU4963
add eax, edx # h32, h32
.LVL973:
.loc 1 1203 26 is_stmt 1 view .LVU4964
.loc 1 1203 26 view .LVU4965
ror eax, 15 # _164,
.LVL974:
.loc 1 1203 26 is_stmt 0 view .LVU4966
imul edx, eax, 668265263 # h32, _164,
.LVL975:
.L245:
.loc 1 1203 34 is_stmt 1 view .LVU4967
.loc 1 1205 26 view .LVU4968
.LBB10070:
.LBI10070:
.loc 1 1057 1 view .LVU4969
.LBB10071:
.loc 1 1059 5 view .LVU4970
.loc 1 1062 9 view .LVU4971
.loc 1 1062 9 is_stmt 0 view .LVU4972
.LBE10071:
.LBE10070:
# xxhash.h:1205: case 7: PROCESS4;
.loc 1 1205 26 view .LVU4973
imul eax, DWORD PTR [r8], -1028477379 # tmp273, MEM[(const xxh_u32 *)ptr_166],
add r8, 4 # _16,
add eax, edx # h32, h32
.LVL976:
.loc 1 1205 26 is_stmt 1 view .LVU4974
.loc 1 1205 26 view .LVU4975
ror eax, 15 # _174,
.LVL977:
.loc 1 1205 26 is_stmt 0 view .LVU4976
imul edx, eax, 668265263 # h32, _174,
.LVL978:
.L249:
.loc 1 1205 34 is_stmt 1 view .LVU4977
.loc 1 1207 26 view .LVU4978
movzx eax, BYTE PTR [r8] # *ptr_176, *ptr_176
lea rcx, 1[r8] # ptr,
.LVL979:
.loc 1 1207 26 view .LVU4979
imul eax, eax, 374761393 # tmp276, *ptr_176,
add eax, edx # h32, h32
rol eax, 11 # _183,
imul edx, eax, -1640531535 # h32, _183,
.LVL980:
.L250:
.loc 1 1207 34 view .LVU4980
.loc 1 1209 26 view .LVU4981
movzx eax, BYTE PTR [rcx] # *ptr_185, *ptr_185
lea r8, 1[rcx] # _16,
.LVL981:
.loc 1 1209 26 view .LVU4982
imul eax, eax, 374761393 # tmp279, *ptr_185,
add eax, edx # h32, h32
.LVL982:
.loc 1 1209 26 is_stmt 0 view .LVU4983
rol eax, 11 # _192,
.LVL983:
.loc 1 1209 26 view .LVU4984
imul edx, eax, -1640531535 # h32, _192,
.LVL984:
.L251:
.loc 1 1209 34 is_stmt 1 view .LVU4985
.loc 1 1211 26 view .LVU4986
.loc 1 1211 26 view .LVU4987
movzx eax, BYTE PTR [r8] # *ptr_194, *ptr_194
imul eax, eax, 374761393 # tmp282, *ptr_194,
add eax, edx # h32, h32
rol eax, 11 # _200,
imul edx, eax, -1640531535 # h32, _200,
.LVL985:
.L235:
.loc 1 1211 34 view .LVU4988
.loc 1 1213 26 view .LVU4989
.LBB10072:
.LBI10072:
.loc 1 1139 16 view .LVU4990
.LBB10073:
.loc 1 1141 5 view .LVU4991
# xxhash.h:1141: h32 ^= h32 >> 15;
.loc 1 1141 16 is_stmt 0 view .LVU4992
mov eax, edx # tmp284, h32
shr eax, 15 # tmp284,
# xxhash.h:1141: h32 ^= h32 >> 15;
.loc 1 1141 9 view .LVU4993
xor eax, edx # h32, h32
.LVL986:
.loc 1 1142 5 is_stmt 1 view .LVU4994
# xxhash.h:1142: h32 *= PRIME32_2;
.loc 1 1142 9 is_stmt 0 view .LVU4995
imul eax, eax, -2048144777 # h32, h32,
.LVL987:
.loc 1 1143 5 is_stmt 1 view .LVU4996
# xxhash.h:1143: h32 ^= h32 >> 13;
.loc 1 1143 16 is_stmt 0 view .LVU4997
mov edx, eax # _206, h32
.LVL988:
.loc 1 1143 16 view .LVU4998
shr edx, 13 # _206,
# xxhash.h:1143: h32 ^= h32 >> 13;
.loc 1 1143 9 view .LVU4999
xor eax, edx # h32, _206
.LVL989:
.loc 1 1144 5 is_stmt 1 view .LVU5000
# xxhash.h:1144: h32 *= PRIME32_3;
.loc 1 1144 9 is_stmt 0 view .LVU5001
imul eax, eax, -1028477379 # h32, h32,
.LVL990:
.loc 1 1145 5 is_stmt 1 view .LVU5002
# xxhash.h:1145: h32 ^= h32 >> 16;
.loc 1 1145 16 is_stmt 0 view .LVU5003
mov edx, eax # _209, h32
shr edx, 16 # _209,
# xxhash.h:1145: h32 ^= h32 >> 16;
.loc 1 1145 9 view .LVU5004
xor eax, edx # <retval>, _209
.LVL991:
.loc 1 1146 5 is_stmt 1 view .LVU5005
.loc 1 1146 5 is_stmt 0 view .LVU5006
.LBE10073:
.LBE10072:
.LBE10065:
.LBE10064:
# xxhash.h:1392: }
.loc 1 1392 1 view .LVU5007
ret
.LVL992:
.p2align 4,,10
.p2align 3
.L239:
.LBB10098:
.LBB10096:
.loc 1 1184 26 is_stmt 1 view .LVU5008
.LBB10074:
.LBI10074:
.loc 1 1057 1 view .LVU5009
.LBB10075:
.loc 1 1059 5 view .LVU5010
.loc 1 1062 9 view .LVU5011
.loc 1 1062 9 is_stmt 0 view .LVU5012
.LBE10075:
.LBE10074:
.loc 1 1184 26 is_stmt 1 view .LVU5013
.loc 1 1184 26 is_stmt 0 view .LVU5014
imul eax, DWORD PTR 24[rcx], -1028477379 # tmp241, MEM[(const xxh_u32 *)state_19(D) + 24B],
lea r8, 28[rcx] # _16,
.LVL993:
.loc 1 1184 26 is_stmt 1 view .LVU5015
add eax, edx # h32, h32
.LVL994:
.loc 1 1184 26 is_stmt 0 view .LVU5016
ror eax, 15 # _66,
.LVL995:
.loc 1 1184 26 view .LVU5017
imul edx, eax, 668265263 # h32, _66,
.LVL996:
.L243:
.loc 1 1184 34 is_stmt 1 view .LVU5018
.loc 1 1186 26 view .LVU5019
.LBB10076:
.LBI10076:
.loc 1 1057 1 view .LVU5020
.LBB10077:
.loc 1 1059 5 view .LVU5021
.loc 1 1062 9 view .LVU5022
.loc 1 1062 9 is_stmt 0 view .LVU5023
.LBE10077:
.LBE10076:
# xxhash.h:1186: case 9: PROCESS4;
.loc 1 1186 26 view .LVU5024
imul eax, DWORD PTR [r8], -1028477379 # tmp244, MEM[(const xxh_u32 *)ptr_68],
add r8, 4 # _16,
.LVL997:
.loc 1 1186 26 view .LVU5025
add eax, edx # h32, h32
.LVL998:
.loc 1 1186 26 is_stmt 1 view .LVU5026
.loc 1 1186 26 view .LVU5027
ror eax, 15 # _76,
.LVL999:
.loc 1 1186 26 is_stmt 0 view .LVU5028
imul edx, eax, 668265263 # h32, _76,
.LVL1000:
.L247:
.loc 1 1186 34 is_stmt 1 view .LVU5029
.loc 1 1188 26 view .LVU5030
.LBB10078:
.LBI10078:
.loc 1 1057 1 view .LVU5031
.LBB10079:
.loc 1 1059 5 view .LVU5032
.loc 1 1062 9 view .LVU5033
.loc 1 1062 9 is_stmt 0 view .LVU5034
.LBE10079:
.LBE10078:
.loc 1 1188 26 is_stmt 1 view .LVU5035
.loc 1 1188 26 view .LVU5036
imul eax, DWORD PTR [r8], -1028477379 # tmp246, MEM[(const xxh_u32 *)ptr_78],
add eax, edx # h32, h32
ror eax, 15 # _85,
imul edx, eax, 668265263 # h32, _85,
.LVL1001:
.loc 1 1188 34 view .LVU5037
.loc 1 1189 26 view .LVU5038
.loc 1 1189 26 view .LVU5039
movzx eax, BYTE PTR 4[r8] # MEM[(const xxh_u8 *)ptr_78 + 4B], MEM[(const xxh_u8 *)ptr_78 + 4B]
.L256:
.loc 1 1189 26 is_stmt 0 view .LVU5040
imul eax, eax, 374761393 # tmp250, MEM[(const xxh_u8 *)ptr_78 + 4B],
add eax, edx # h32, h32
rol eax, 11 # _91,
imul edx, eax, -1640531535 # h32, _91,
.L255:
.LVL1002:
.loc 1 1189 34 is_stmt 1 view .LVU5041
.loc 1 1190 26 view .LVU5042
.LBB10080:
.LBI10080:
.loc 1 1139 16 view .LVU5043
.LBB10081:
.loc 1 1141 5 view .LVU5044
# xxhash.h:1141: h32 ^= h32 >> 15;
.loc 1 1141 16 is_stmt 0 view .LVU5045
mov eax, edx # tmp252, h32
shr eax, 15 # tmp252,
# xxhash.h:1141: h32 ^= h32 >> 15;
.loc 1 1141 9 view .LVU5046
xor eax, edx # h32, h32
.LVL1003:
.loc 1 1142 5 is_stmt 1 view .LVU5047
# xxhash.h:1142: h32 *= PRIME32_2;
.loc 1 1142 9 is_stmt 0 view .LVU5048
imul eax, eax, -2048144777 # h32, h32,
.LVL1004:
.loc 1 1143 5 is_stmt 1 view .LVU5049
# xxhash.h:1143: h32 ^= h32 >> 13;
.loc 1 1143 16 is_stmt 0 view .LVU5050
mov edx, eax # _96, h32
.LVL1005:
.loc 1 1143 16 view .LVU5051
shr edx, 13 # _96,
# xxhash.h:1143: h32 ^= h32 >> 13;
.loc 1 1143 9 view .LVU5052
xor eax, edx # h32, _96
.LVL1006:
.loc 1 1144 5 is_stmt 1 view .LVU5053
# xxhash.h:1144: h32 *= PRIME32_3;
.loc 1 1144 9 is_stmt 0 view .LVU5054
imul eax, eax, -1028477379 # h32, h32,
.LVL1007:
.loc 1 1145 5 is_stmt 1 view .LVU5055
# xxhash.h:1145: h32 ^= h32 >> 16;
.loc 1 1145 16 is_stmt 0 view .LVU5056
mov edx, eax # _99, h32
shr edx, 16 # _99,
# xxhash.h:1145: h32 ^= h32 >> 16;
.loc 1 1145 9 view .LVU5057
xor eax, edx # <retval>, _99
.LVL1008:
.loc 1 1146 5 is_stmt 1 view .LVU5058
.loc 1 1146 5 is_stmt 0 view .LVU5059
.LBE10081:
.LBE10080:
.LBE10096:
.LBE10098:
# xxhash.h:1392: }
.loc 1 1392 1 view .LVU5060
ret
.LVL1009:
.p2align 4,,10
.p2align 3
.L238:
.LBB10099:
.LBB10097:
.loc 1 1192 26 is_stmt 1 view .LVU5061
.LBB10082:
.LBI10082:
.loc 1 1057 1 view .LVU5062
.LBB10083:
.loc 1 1059 5 view .LVU5063
.loc 1 1062 9 view .LVU5064
.loc 1 1062 9 is_stmt 0 view .LVU5065
.LBE10083:
.LBE10082:
.loc 1 1192 26 is_stmt 1 view .LVU5066
.loc 1 1192 26 is_stmt 0 view .LVU5067
imul eax, DWORD PTR 24[rcx], -1028477379 # tmp253, MEM[(const xxh_u32 *)state_19(D) + 24B],
lea r8, 28[rcx] # _16,
.LVL1010:
.loc 1 1192 26 is_stmt 1 view .LVU5068
add eax, edx # h32, h32
.LVL1011:
.loc 1 1192 26 is_stmt 0 view .LVU5069
ror eax, 15 # _107,
.LVL1012:
.loc 1 1192 26 view .LVU5070
imul edx, eax, 668265263 # h32, _107,
.LVL1013:
.L242:
.loc 1 1192 34 is_stmt 1 view .LVU5071
.loc 1 1194 26 view .LVU5072
.LBB10084:
.LBI10084:
.loc 1 1057 1 view .LVU5073
.LBB10085:
.loc 1 1059 5 view .LVU5074
.loc 1 1062 9 view .LVU5075
.loc 1 1062 9 is_stmt 0 view .LVU5076
.LBE10085:
.LBE10084:
# xxhash.h:1194: case 10: PROCESS4;
.loc 1 1194 26 view .LVU5077
imul eax, DWORD PTR [r8], -1028477379 # tmp256, MEM[(const xxh_u32 *)ptr_109],
add r8, 4 # _16,
.LVL1014:
.loc 1 1194 26 view .LVU5078
add eax, edx # h32, h32
.LVL1015:
.loc 1 1194 26 is_stmt 1 view .LVU5079
.loc 1 1194 26 view .LVU5080
ror eax, 15 # _117,
.LVL1016:
.loc 1 1194 26 is_stmt 0 view .LVU5081
imul edx, eax, 668265263 # h32, _117,
.LVL1017:
.L246:
.loc 1 1194 34 is_stmt 1 view .LVU5082
.loc 1 1196 26 view .LVU5083
.LBB10086:
.LBI10086:
.loc 1 1057 1 view .LVU5084
.LBB10087:
.loc 1 1059 5 view .LVU5085
.loc 1 1062 9 view .LVU5086
.loc 1 1062 9 is_stmt 0 view .LVU5087
.LBE10087:
.LBE10086:
.loc 1 1196 26 is_stmt 1 view .LVU5088
.loc 1 1196 26 view .LVU5089
imul eax, DWORD PTR [r8], -1028477379 # tmp258, MEM[(const xxh_u32 *)ptr_119],
add eax, edx # h32, h32
ror eax, 15 # _126,
imul edx, eax, 668265263 # h32, _126,
.LVL1018:
.loc 1 1196 34 view .LVU5090
.loc 1 1197 26 view .LVU5091
.loc 1 1197 26 view .LVU5092
movzx eax, BYTE PTR 4[r8] # MEM[(const xxh_u8 *)ptr_119 + 4B], MEM[(const xxh_u8 *)ptr_119 + 4B]
imul eax, eax, 374761393 # tmp262, MEM[(const xxh_u8 *)ptr_119 + 4B],
add eax, edx # h32, h32
rol eax, 11 # _132,
imul edx, eax, -1640531535 # h32, _132,
.LVL1019:
.loc 1 1197 34 view .LVU5093
.loc 1 1198 26 view .LVU5094
.loc 1 1198 26 view .LVU5095
movzx eax, BYTE PTR 5[r8] # MEM[(const xxh_u8 *)ptr_119 + 5B], MEM[(const xxh_u8 *)ptr_119 + 5B]
jmp .L256 #
.LVL1020:
.p2align 4,,10
.p2align 3
.L240:
.loc 1 1177 26 view .LVU5096
.LBB10088:
.LBI10088:
.loc 1 1057 1 view .LVU5097
.LBB10089:
.loc 1 1059 5 view .LVU5098
.loc 1 1062 9 view .LVU5099
.loc 1 1062 9 is_stmt 0 view .LVU5100
.LBE10089:
.LBE10088:
.loc 1 1177 26 is_stmt 1 view .LVU5101
.loc 1 1177 26 is_stmt 0 view .LVU5102
imul eax, DWORD PTR 24[rcx], -1028477379 # tmp232, MEM[(const xxh_u32 *)state_19(D) + 24B],
lea r8, 28[rcx] # _16,
.LVL1021:
.loc 1 1177 26 is_stmt 1 view .LVU5103
add eax, edx # h32, h32
.LVL1022:
.loc 1 1177 26 is_stmt 0 view .LVU5104
ror eax, 15 # _31,
.LVL1023:
.loc 1 1177 26 view .LVU5105
imul edx, eax, 668265263 # h32, _31,
.LVL1024:
.L244:
.loc 1 1177 34 is_stmt 1 view .LVU5106
.loc 1 1179 26 view .LVU5107
.LBB10090:
.LBI10090:
.loc 1 1057 1 view .LVU5108
.LBB10091:
.loc 1 1059 5 view .LVU5109
.loc 1 1062 9 view .LVU5110
.loc 1 1062 9 is_stmt 0 view .LVU5111
.LBE10091:
.LBE10090:
# xxhash.h:1179: case 8: PROCESS4;
.loc 1 1179 26 view .LVU5112
imul eax, DWORD PTR [r8], -1028477379 # tmp235, MEM[(const xxh_u32 *)ptr_33],
add r8, 4 # _16,
.LVL1025:
.loc 1 1179 26 view .LVU5113
add eax, edx # h32, h32
.LVL1026:
.loc 1 1179 26 is_stmt 1 view .LVU5114
.loc 1 1179 26 view .LVU5115
ror eax, 15 # _41,
.LVL1027:
.loc 1 1179 26 is_stmt 0 view .LVU5116
imul edx, eax, 668265263 # h32, _41,
.LVL1028:
.L248:
.loc 1 1179 34 is_stmt 1 view .LVU5117
.loc 1 1181 26 view .LVU5118
.LBB10092:
.LBI10092:
.loc 1 1057 1 view .LVU5119
.LBB10093:
.loc 1 1059 5 view .LVU5120
.loc 1 1062 9 view .LVU5121
.loc 1 1062 9 is_stmt 0 view .LVU5122
.LBE10093:
.LBE10092:
.loc 1 1181 26 is_stmt 1 view .LVU5123
.loc 1 1181 26 view .LVU5124
imul eax, DWORD PTR [r8], -1028477379 # tmp237, MEM[(const xxh_u32 *)ptr_43],
add eax, edx # h32, h32
ror eax, 15 # _50,
imul edx, eax, 668265263 # h32, _50,
.LVL1029:
.loc 1 1181 34 view .LVU5125
.loc 1 1182 26 view .LVU5126
.LBB10094:
.LBI10094:
.loc 1 1139 16 view .LVU5127
.LBB10095:
.loc 1 1141 5 view .LVU5128
jmp .L255 #
.LVL1030:
.p2align 4,,10
.p2align 3
.L253:
.loc 1 1141 5 is_stmt 0 view .LVU5129
.LBE10095:
.LBE10094:
.LBE10097:
.LBE10099:
# xxhash.h:1391: return XXH32_finalize(h32, (const xxh_u8*)state->mem32, state->memsize, XXH_aligned);
.loc 1 1391 47 view .LVU5130
mov rcx, r8 # ptr, _16
.LVL1031:
.loc 1 1391 47 view .LVU5131
jmp .L250 #
.cfi_endproc
.LFE33:
.seh_endproc
.p2align 4
.globl XXH32_canonicalFromHash
.def XXH32_canonicalFromHash; .scl 2; .type 32; .endef
.seh_proc XXH32_canonicalFromHash
XXH32_canonicalFromHash:
.LVL1032:
.LFB34:
.loc 1 1411 1 is_stmt 1 view -0
.cfi_startproc
.loc 1 1411 1 is_stmt 0 view .LVU5133
.seh_endprologue
.LBB10100:
.loc 1 1412 5 is_stmt 1 view .LVU5134
.LBE10100:
.loc 1 1412 73 view .LVU5135
.loc 1 1413 5 view .LVU5136
.loc 1 1413 32 view .LVU5137
# xxhash.h:1413: if (XXH_CPU_LITTLE_ENDIAN) hash = XXH_swap32(hash);
.loc 1 1413 39 is_stmt 0 view .LVU5138
bswap edx # _1
.LVL1033:
.loc 1 1414 5 is_stmt 1 view .LVU5139
mov DWORD PTR [rcx], edx # MEM[(char * {ref-all})dst_3(D)], _1
# xxhash.h:1415: }
.loc 1 1415 1 is_stmt 0 view .LVU5140
ret
.cfi_endproc
.LFE34:
.seh_endproc
.p2align 4
.globl XXH32_hashFromCanonical
.def XXH32_hashFromCanonical; .scl 2; .type 32; .endef
.seh_proc XXH32_hashFromCanonical
XXH32_hashFromCanonical:
.LVL1034:
.LFB35:
.loc 1 1418 1 is_stmt 1 view -0
.cfi_startproc
.loc 1 1418 1 is_stmt 0 view .LVU5142
.seh_endprologue
.loc 1 1419 5 is_stmt 1 view .LVU5143
.LVL1035:
.LBB10101:
.LBI10101:
.loc 1 1050 16 view .LVU5144
.LBB10102:
.loc 1 1052 5 view .LVU5145
.loc 1 1052 5 is_stmt 0 view .LVU5146
.LBE10102:
.LBE10101:
.loc 1 929 5 is_stmt 1 view .LVU5147
.loc 1 930 5 view .LVU5148
.loc 1 931 5 view .LVU5149
.LBB10104:
.LBB10103:
# xxhash.h:1052: return XXH_CPU_LITTLE_ENDIAN ? XXH_swap32(XXH_read32(ptr)) : XXH_read32(ptr);
.loc 1 1052 64 is_stmt 0 view .LVU5150
mov eax, DWORD PTR [rcx] # MEM[(char * {ref-all})src_2(D)], MEM[(char * {ref-all})src_2(D)]
bswap eax # <retval>
.LVL1036:
.loc 1 1052 64 view .LVU5151
.LBE10103:
.LBE10104:
# xxhash.h:1420: }
.loc 1 1420 1 view .LVU5152
ret
.cfi_endproc
.LFE35:
.seh_endproc
.p2align 4
.globl XXH64
.def XXH64; .scl 2; .type 32; .endef
.seh_proc XXH64
XXH64:
.LVL1037:
.LFB45:
.loc 1 1773 1 is_stmt 1 view -0
.cfi_startproc
.loc 1 1773 1 is_stmt 0 view .LVU5154
push r15 #
.seh_pushreg r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14 #
.seh_pushreg r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13 #
.seh_pushreg r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12 #
.seh_pushreg r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp #
.seh_pushreg rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rdi #
.seh_pushreg rdi
.cfi_def_cfa_offset 56
.cfi_offset 5, -56
push rsi #
.seh_pushreg rsi
.cfi_def_cfa_offset 64
.cfi_offset 4, -64
push rbx #
.seh_pushreg rbx
.cfi_def_cfa_offset 72
.cfi_offset 3, -72
.seh_endprologue
.LBB10105:
.LBB10106:
# xxhash.h:1763: h64 = seed + PRIME64_5;
.loc 1 1763 14 view .LVU5155
movabs rax, 2870177450012600261 # tmp213,
.LBE10106:
.LBE10105:
# xxhash.h:1773: {
.loc 1 1773 1 view .LVU5156
mov r10, rcx # input, tmp215
.loc 1 1783 5 is_stmt 1 view .LVU5157
.loc 1 1788 5 view .LVU5158
.LVL1038:
.LBB10236:
.LBI10105:
.loc 1 1730 1 view .LVU5159
.LBB10230:
.loc 1 1732 5 view .LVU5160
.loc 1 1733 5 view .LVU5161
.loc 1 1742 5 view .LVU5162
# xxhash.h:1763: h64 = seed + PRIME64_5;
.loc 1 1763 14 is_stmt 0 view .LVU5163
add rax, r8 # h64, seed
# xxhash.h:1742: if (len>=32) {
.loc 1 1742 8 view .LVU5164
cmp rdx, 31 # len,
jbe .L262 #,
.LBB10107:
.loc 1 1743 9 is_stmt 1 view .LVU5165
# xxhash.h:1744: xxh_u64 v1 = seed + PRIME64_1 + PRIME64_2;
.loc 1 1744 17 is_stmt 0 view .LVU5166
movabs rbp, 6983438078262162902 # tmp150,
lea r14, -32[rdx] # _5,
# xxhash.h:1745: xxh_u64 v2 = seed + PRIME64_2;
.loc 1 1745 17 view .LVU5167
movabs rdi, -4417276706812531889 # tmp151,
# xxhash.h:1747: xxh_u64 v4 = seed - PRIME64_1;
.loc 1 1747 17 view .LVU5168
movabs rax, 7046029288634856825 # tmp152,
# xxhash.h:1743: const xxh_u8* const limit = bEnd - 32;
.loc 1 1743 29 view .LVU5169
lea r13, [rcx+r14] # limit,
.LVL1039:
.loc 1 1744 9 is_stmt 1 view .LVU5170
# xxhash.h:1744: xxh_u64 v1 = seed + PRIME64_1 + PRIME64_2;
.loc 1 1744 17 is_stmt 0 view .LVU5171
add rbp, r8 # v1, seed
.LVL1040:
.loc 1 1745 9 is_stmt 1 view .LVU5172
# xxhash.h:1745: xxh_u64 v2 = seed + PRIME64_2;
.loc 1 1745 17 is_stmt 0 view .LVU5173
lea r12, [r8+rdi] # v2,
.LVL1041:
.loc 1 1746 9 is_stmt 1 view .LVU5174
.loc 1 1747 9 view .LVU5175
.LBB10108:
.LBB10109:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 is_stmt 0 view .LVU5176
movabs rsi, -7046029288634856825 # tmp156,
.LBE10109:
.LBE10108:
# xxhash.h:1747: xxh_u64 v4 = seed - PRIME64_1;
.loc 1 1747 17 view .LVU5177
lea r15, [r8+rax] # v4,
.LVL1042:
.p2align 4,,10
.p2align 3
.L261:
.loc 1 1749 9 is_stmt 1 view .LVU5178
.loc 1 1750 13 view .LVU5179
.loc 1 1750 13 is_stmt 0 view .LVU5180
.LBE10107:
.LBE10230:
.LBE10236:
.loc 1 1562 5 is_stmt 1 view .LVU5181
.loc 1 1563 9 view .LVU5182
.loc 1 1550 5 view .LVU5183
.loc 1 1492 5 view .LVU5184
.loc 1 1493 5 view .LVU5185
.loc 1 1494 5 view .LVU5186
.LBB10237:
.LBB10231:
.LBB10226:
.LBB10116:
.LBI10108:
.loc 1 1577 16 view .LVU5187
.LBB10110:
.loc 1 1579 5 view .LVU5188
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 is_stmt 0 view .LVU5189
mov rbx, QWORD PTR [rcx] # tmp153, MEM[base: input_10, offset: 0B]
.LBE10110:
.LBE10116:
.LBB10117:
.LBB10118:
mov r11, QWORD PTR 8[rcx] # tmp157, MEM[base: input_10, offset: 8B]
add rcx, 32 # input,
.LVL1043:
.loc 1 1579 18 view .LVU5190
.LBE10118:
.LBE10117:
.LBB10124:
.LBB10125:
mov r9, QWORD PTR -16[rcx] # tmp161, MEM[base: input_10, offset: 16B]
.LBE10125:
.LBE10124:
.LBB10131:
.LBB10132:
mov rax, QWORD PTR -8[rcx] # tmp165, MEM[base: input_10, offset: 24B]
.LBE10132:
.LBE10131:
.LBB10138:
.LBB10111:
imul rbx, rdi # tmp153, tmp155
.LVL1044:
.loc 1 1579 18 view .LVU5191
.LBE10111:
.LBE10138:
.LBB10139:
.LBB10119:
imul r11, rdi # tmp157, tmp155
.LBE10119:
.LBE10139:
.LBB10140:
.LBB10126:
imul r9, rdi # tmp161, tmp155
.LBE10126:
.LBE10140:
.LBB10141:
.LBB10133:
imul rax, rdi # tmp165, tmp155
.LBE10133:
.LBE10141:
.LBB10142:
.LBB10112:
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 9 view .LVU5192
add rbx, rbp # acc, v1
.LVL1045:
.loc 1 1580 5 is_stmt 1 view .LVU5193
.LBE10112:
.LBE10142:
.LBB10143:
.LBB10120:
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 9 is_stmt 0 view .LVU5194
add r11, r12 # acc, v2
.LBE10120:
.LBE10143:
.LBB10144:
.LBB10113:
# xxhash.h:1580: acc = XXH_rotl64(acc, 31);
.loc 1 1580 10 view .LVU5195
rol rbx, 31 # acc,
.LVL1046:
.loc 1 1581 5 is_stmt 1 view .LVU5196
.LBE10113:
.LBE10144:
.LBB10145:
.LBB10127:
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 9 is_stmt 0 view .LVU5197
add r9, r8 # acc, seed
.LBE10127:
.LBE10145:
.LBB10146:
.LBB10121:
# xxhash.h:1580: acc = XXH_rotl64(acc, 31);
.loc 1 1580 10 view .LVU5198
rol r11, 31 # acc,
.LBE10121:
.LBE10146:
.LBB10147:
.LBB10114:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 view .LVU5199
mov rbp, rbx # v1, acc
.LVL1047:
.loc 1 1581 9 view .LVU5200
.LBE10114:
.LBE10147:
.LBB10148:
.LBB10134:
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 9 view .LVU5201
add rax, r15 # acc, v4
.LBE10134:
.LBE10148:
.LBB10149:
.LBB10128:
# xxhash.h:1580: acc = XXH_rotl64(acc, 31);
.loc 1 1580 10 view .LVU5202
rol r9, 31 # acc,
.LBE10128:
.LBE10149:
.LBB10150:
.LBB10115:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 view .LVU5203
imul rbp, rsi # v1, tmp156
.LVL1048:
.loc 1 1582 5 is_stmt 1 view .LVU5204
.loc 1 1582 5 is_stmt 0 view .LVU5205
.LBE10115:
.LBE10150:
.loc 1 1750 57 is_stmt 1 view .LVU5206
.loc 1 1751 13 view .LVU5207
.loc 1 1751 13 is_stmt 0 view .LVU5208
.LBE10226:
.LBE10231:
.LBE10237:
.loc 1 1562 5 is_stmt 1 view .LVU5209
.loc 1 1563 9 view .LVU5210
.loc 1 1550 5 view .LVU5211
.loc 1 1492 5 view .LVU5212
.loc 1 1493 5 view .LVU5213
.loc 1 1494 5 view .LVU5214
.LBB10238:
.LBB10232:
.LBB10227:
.LBB10151:
.LBI10117:
.loc 1 1577 16 view .LVU5215
.LBB10122:
.loc 1 1579 5 view .LVU5216
.loc 1 1580 5 view .LVU5217
.loc 1 1581 5 view .LVU5218
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 is_stmt 0 view .LVU5219
mov r12, r11 # v2, acc
.LBE10122:
.LBE10151:
.LBB10152:
.LBB10135:
# xxhash.h:1580: acc = XXH_rotl64(acc, 31);
.loc 1 1580 10 view .LVU5220
rol rax, 31 # acc,
.LBE10135:
.LBE10152:
.LBB10153:
.LBB10123:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 view .LVU5221
imul r12, rsi # v2, tmp156
.LVL1049:
.loc 1 1582 5 is_stmt 1 view .LVU5222
.loc 1 1582 5 is_stmt 0 view .LVU5223
.LBE10123:
.LBE10153:
.loc 1 1751 57 is_stmt 1 view .LVU5224
.loc 1 1752 13 view .LVU5225
.loc 1 1752 13 is_stmt 0 view .LVU5226
.LBE10227:
.LBE10232:
.LBE10238:
.loc 1 1562 5 is_stmt 1 view .LVU5227
.loc 1 1563 9 view .LVU5228
.loc 1 1550 5 view .LVU5229
.loc 1 1492 5 view .LVU5230
.loc 1 1493 5 view .LVU5231
.loc 1 1494 5 view .LVU5232
.LBB10239:
.LBB10233:
.LBB10228:
.LBB10154:
.LBI10124:
.loc 1 1577 16 view .LVU5233
.LBB10129:
.loc 1 1579 5 view .LVU5234
.loc 1 1580 5 view .LVU5235
.loc 1 1581 5 view .LVU5236
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 is_stmt 0 view .LVU5237
mov r8, r9 # seed, acc
.LBE10129:
.LBE10154:
.LBB10155:
.LBB10136:
mov r15, rax # v4, acc
.LBE10136:
.LBE10155:
.LBB10156:
.LBB10130:
imul r8, rsi # seed, tmp156
.LVL1050:
.loc 1 1582 5 is_stmt 1 view .LVU5238
.loc 1 1582 5 is_stmt 0 view .LVU5239
.LBE10130:
.LBE10156:
.loc 1 1752 57 is_stmt 1 view .LVU5240
.loc 1 1753 13 view .LVU5241
.loc 1 1753 13 is_stmt 0 view .LVU5242
.LBE10228:
.LBE10233:
.LBE10239:
.loc 1 1562 5 is_stmt 1 view .LVU5243
.loc 1 1563 9 view .LVU5244
.loc 1 1550 5 view .LVU5245
.loc 1 1492 5 view .LVU5246
.loc 1 1493 5 view .LVU5247
.loc 1 1494 5 view .LVU5248
.LBB10240:
.LBB10234:
.LBB10229:
.LBB10157:
.LBI10131:
.loc 1 1577 16 view .LVU5249
.LBB10137:
.loc 1 1579 5 view .LVU5250
.loc 1 1580 5 view .LVU5251
.loc 1 1581 5 view .LVU5252
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 is_stmt 0 view .LVU5253
imul r15, rsi # v4, tmp156
.LVL1051:
.loc 1 1582 5 is_stmt 1 view .LVU5254
.loc 1 1582 5 is_stmt 0 view .LVU5255
.LBE10137:
.LBE10157:
.loc 1 1753 57 is_stmt 1 view .LVU5256
.loc 1 1754 17 view .LVU5257
# xxhash.h:1754: } while (input<=limit);
.loc 1 1754 9 is_stmt 0 view .LVU5258
cmp r13, rcx # limit, input
jnb .L261 #,
lea rdi, 1[r10] # tmp173,
and r14, -32 # tmp171,
add r13, 1 # tmp172,
.LVL1052:
.loc 1 1754 9 view .LVU5259
cmp r13, rdi # tmp172, tmp173
lea rcx, 32[r14] # tmp169,
.LVL1053:
.loc 1 1754 9 view .LVU5260
mov edi, 32 # tmp174,
cmovb rcx, rdi # tmp169,, tmp169, tmp174
# xxhash.h:1756: h64 = XXH_rotl64(v1, 1) + XXH_rotl64(v2, 7) + XXH_rotl64(v3, 12) + XXH_rotl64(v4, 18);
.loc 1 1756 15 view .LVU5261
rol rbp # tmp177
.LVL1054:
.LBB10158:
.LBB10159:
.LBB10160:
.LBB10161:
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 view .LVU5262
movabs rdi, -2381459717836149591 # tmp176,
imul rbx, rdi # tmp175, tmp176
.LVL1055:
.loc 1 1579 18 view .LVU5263
.LBE10161:
.LBE10160:
.LBE10159:
.LBE10158:
# xxhash.h:1756: h64 = XXH_rotl64(v1, 1) + XXH_rotl64(v2, 7) + XXH_rotl64(v3, 12) + XXH_rotl64(v4, 18);
.loc 1 1756 35 view .LVU5264
rol r12, 7 # tmp178,
# xxhash.h:1756: h64 = XXH_rotl64(v1, 1) + XXH_rotl64(v2, 7) + XXH_rotl64(v3, 12) + XXH_rotl64(v4, 18);
.loc 1 1756 55 view .LVU5265
rol r8, 12 # tmp180,
# xxhash.h:1756: h64 = XXH_rotl64(v1, 1) + XXH_rotl64(v2, 7) + XXH_rotl64(v3, 12) + XXH_rotl64(v4, 18);
.loc 1 1756 33 view .LVU5266
add rbp, r12 # tmp179, tmp178
# xxhash.h:1756: h64 = XXH_rotl64(v1, 1) + XXH_rotl64(v2, 7) + XXH_rotl64(v3, 12) + XXH_rotl64(v4, 18);
.loc 1 1756 76 view .LVU5267
rol r15, 18 # tmp182,
add r10, rcx # input, tmp169
.LVL1056:
.loc 1 1756 9 is_stmt 1 view .LVU5268
.loc 1 1757 9 view .LVU5269
.LBB10174:
.LBI10158:
.loc 1 1585 16 view .LVU5270
.LBB10168:
.loc 1 1587 5 view .LVU5271
.LBB10165:
.LBI10160:
.loc 1 1577 16 view .LVU5272
.LBB10162:
.loc 1 1579 5 view .LVU5273
.loc 1 1580 5 view .LVU5274
.LBE10162:
.LBE10165:
.LBE10168:
.LBE10174:
# xxhash.h:1756: h64 = XXH_rotl64(v1, 1) + XXH_rotl64(v2, 7) + XXH_rotl64(v3, 12) + XXH_rotl64(v4, 18);
.loc 1 1756 53 is_stmt 0 view .LVU5275
add rbp, r8 # tmp181, tmp180
.LBB10175:
.LBB10176:
.LBB10177:
.LBB10178:
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 view .LVU5276
imul rax, rdi # tmp204, tmp176
.LVL1057:
.loc 1 1579 18 view .LVU5277
.LBE10178:
.LBE10177:
.LBE10176:
.LBE10175:
.LBB10186:
.LBB10169:
.LBB10166:
.LBB10163:
# xxhash.h:1580: acc = XXH_rotl64(acc, 31);
.loc 1 1580 10 view .LVU5278
rol rbx, 31 # acc,
.LVL1058:
.loc 1 1581 5 is_stmt 1 view .LVU5279
.loc 1 1582 5 view .LVU5280
.loc 1 1582 5 is_stmt 0 view .LVU5281
.LBE10163:
.LBE10166:
.loc 1 1588 5 is_stmt 1 view .LVU5282
.loc 1 1589 5 view .LVU5283
.LBE10169:
.LBE10186:
# xxhash.h:1756: h64 = XXH_rotl64(v1, 1) + XXH_rotl64(v2, 7) + XXH_rotl64(v3, 12) + XXH_rotl64(v4, 18);
.loc 1 1756 13 is_stmt 0 view .LVU5284
lea r8, 0[rbp+r15] # h64,
.LBB10187:
.LBB10170:
.LBB10167:
.LBB10164:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 view .LVU5285
imul rbx, rsi # acc, tmp156
.LVL1059:
.loc 1 1581 9 view .LVU5286
.LBE10164:
.LBE10167:
.LBE10170:
.LBE10187:
.LBB10188:
.LBB10183:
.LBB10181:
.LBB10179:
# xxhash.h:1580: acc = XXH_rotl64(acc, 31);
.loc 1 1580 10 view .LVU5287
rol rax, 31 # acc,
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 view .LVU5288
imul rax, rsi # acc, tmp156
.LBE10179:
.LBE10181:
.LBE10183:
.LBE10188:
.LBB10189:
.LBB10171:
# xxhash.h:1588: acc ^= val;
.loc 1 1588 9 view .LVU5289
xor r8, rbx # acc, acc
# xxhash.h:1589: acc = acc * PRIME64_1 + PRIME64_4;
.loc 1 1589 10 view .LVU5290
movabs rbx, -8796714831421723037 # tmp193,
# xxhash.h:1589: acc = acc * PRIME64_1 + PRIME64_4;
.loc 1 1589 16 view .LVU5291
mov r15, r8 # acc, acc
.LBE10171:
.LBE10189:
.LBB10190:
.LBB10191:
.LBB10192:
.LBB10193:
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 view .LVU5292
mov r8, r11 # acc, acc
imul r8, rdi # acc, tmp176
.LBE10193:
.LBE10192:
.LBE10191:
.LBE10190:
.LBB10204:
.LBB10172:
# xxhash.h:1589: acc = acc * PRIME64_1 + PRIME64_4;
.loc 1 1589 16 view .LVU5293
imul r15, rsi # acc, tmp156
.LVL1060:
.loc 1 1590 5 is_stmt 1 view .LVU5294
.loc 1 1590 5 is_stmt 0 view .LVU5295
.LBE10172:
.LBE10204:
.loc 1 1758 9 is_stmt 1 view .LVU5296
.LBB10205:
.LBI10190:
.loc 1 1585 16 view .LVU5297
.LBB10200:
.loc 1 1587 5 view .LVU5298
.LBB10197:
.LBI10192:
.loc 1 1577 16 view .LVU5299
.LBB10194:
.loc 1 1579 5 view .LVU5300
.loc 1 1580 5 view .LVU5301
# xxhash.h:1580: acc = XXH_rotl64(acc, 31);
.loc 1 1580 10 is_stmt 0 view .LVU5302
rol r8, 31 # acc,
.LVL1061:
.loc 1 1581 5 is_stmt 1 view .LVU5303
.loc 1 1582 5 view .LVU5304
.loc 1 1582 5 is_stmt 0 view .LVU5305
.LBE10194:
.LBE10197:
.loc 1 1588 5 is_stmt 1 view .LVU5306
.loc 1 1589 5 view .LVU5307
.LBB10198:
.LBB10195:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 is_stmt 0 view .LVU5308
mov rcx, r8 # acc, acc
.LBE10195:
.LBE10198:
.LBE10200:
.LBE10205:
.LBB10206:
.LBB10173:
# xxhash.h:1589: acc = acc * PRIME64_1 + PRIME64_4;
.loc 1 1589 10 view .LVU5309
lea r8, [r15+rbx] # acc,
.LVL1062:
.loc 1 1589 10 view .LVU5310
.LBE10173:
.LBE10206:
.LBB10207:
.LBB10201:
.LBB10199:
.LBB10196:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 view .LVU5311
imul rcx, rsi # acc, tmp156
.LVL1063:
.loc 1 1581 9 view .LVU5312
.LBE10196:
.LBE10199:
# xxhash.h:1588: acc ^= val;
.loc 1 1588 9 view .LVU5313
xor r8, rcx # acc, acc
.LVL1064:
.loc 1 1588 9 view .LVU5314
.LBE10201:
.LBE10207:
.LBB10208:
.LBB10209:
.LBB10210:
.LBB10211:
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 view .LVU5315
mov rcx, r9 # acc, acc
imul rcx, rdi # acc, tmp176
.LBE10211:
.LBE10210:
.LBE10209:
.LBE10208:
.LBB10219:
.LBB10202:
# xxhash.h:1589: acc = acc * PRIME64_1 + PRIME64_4;
.loc 1 1589 16 view .LVU5316
imul r8, rsi # _70, tmp156
.LVL1065:
.loc 1 1590 5 is_stmt 1 view .LVU5317
.loc 1 1590 5 is_stmt 0 view .LVU5318
.LBE10202:
.LBE10219:
.loc 1 1759 9 is_stmt 1 view .LVU5319
.LBB10220:
.LBI10208:
.loc 1 1585 16 view .LVU5320
.LBB10216:
.loc 1 1587 5 view .LVU5321
.LBB10214:
.LBI10210:
.loc 1 1577 16 view .LVU5322
.LBB10212:
.loc 1 1579 5 view .LVU5323
.loc 1 1580 5 view .LVU5324
# xxhash.h:1580: acc = XXH_rotl64(acc, 31);
.loc 1 1580 10 is_stmt 0 view .LVU5325
rol rcx, 31 # acc,
.LVL1066:
.loc 1 1581 5 is_stmt 1 view .LVU5326
.loc 1 1582 5 view .LVU5327
.loc 1 1582 5 is_stmt 0 view .LVU5328
.LBE10212:
.LBE10214:
.loc 1 1588 5 is_stmt 1 view .LVU5329
.loc 1 1589 5 view .LVU5330
.LBB10215:
.LBB10213:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 is_stmt 0 view .LVU5331
imul rcx, rsi # acc, tmp156
.LVL1067:
.loc 1 1581 9 view .LVU5332
.LBE10213:
.LBE10215:
.LBE10216:
.LBE10220:
.LBB10221:
.LBB10203:
# xxhash.h:1589: acc = acc * PRIME64_1 + PRIME64_4;
.loc 1 1589 10 view .LVU5333
add r8, rbx # acc, tmp193
.LVL1068:
.loc 1 1589 10 view .LVU5334
.LBE10203:
.LBE10221:
.LBB10222:
.LBB10217:
# xxhash.h:1588: acc ^= val;
.loc 1 1588 9 view .LVU5335
xor rcx, r8 # acc, acc
# xxhash.h:1589: acc = acc * PRIME64_1 + PRIME64_4;
.loc 1 1589 16 view .LVU5336
imul rcx, rsi # _64, tmp156
.LVL1069:
.loc 1 1590 5 is_stmt 1 view .LVU5337
.loc 1 1590 5 is_stmt 0 view .LVU5338
.LBE10217:
.LBE10222:
.loc 1 1760 9 is_stmt 1 view .LVU5339
.LBB10223:
.LBI10175:
.loc 1 1585 16 view .LVU5340
.LBB10184:
.loc 1 1587 5 view .LVU5341
.LBB10182:
.LBI10177:
.loc 1 1577 16 view .LVU5342
.LBB10180:
.loc 1 1579 5 view .LVU5343
.loc 1 1580 5 view .LVU5344
.loc 1 1581 5 view .LVU5345
.loc 1 1582 5 view .LVU5346
.loc 1 1582 5 is_stmt 0 view .LVU5347
.LBE10180:
.LBE10182:
.loc 1 1588 5 is_stmt 1 view .LVU5348
.loc 1 1589 5 view .LVU5349
.LBE10184:
.LBE10223:
.LBB10224:
.LBB10218:
# xxhash.h:1589: acc = acc * PRIME64_1 + PRIME64_4;
.loc 1 1589 10 is_stmt 0 view .LVU5350
add rcx, rbx # acc, tmp193
.LVL1070:
.loc 1 1589 10 view .LVU5351
.LBE10218:
.LBE10224:
.LBB10225:
.LBB10185:
# xxhash.h:1588: acc ^= val;
.loc 1 1588 9 view .LVU5352
xor rax, rcx # acc, acc
# xxhash.h:1589: acc = acc * PRIME64_1 + PRIME64_4;
.loc 1 1589 16 view .LVU5353
imul rax, rsi # _58, tmp156
# xxhash.h:1589: acc = acc * PRIME64_1 + PRIME64_4;
.loc 1 1589 10 view .LVU5354
add rax, rbx # h64, tmp193
.LVL1071:
.loc 1 1590 5 is_stmt 1 view .LVU5355
.L262:
.loc 1 1590 5 is_stmt 0 view .LVU5356
.LBE10185:
.LBE10225:
.LBE10229:
.loc 1 1766 5 is_stmt 1 view .LVU5357
.loc 1 1768 5 view .LVU5358
# xxhash.h:1766: h64 += (xxh_u64) len;
.loc 1 1766 9 is_stmt 0 view .LVU5359
lea rcx, [rdx+rax] # h64,
.LVL1072:
# xxhash.h:1768: return XXH64_finalize(h64, input, len, align);
.loc 1 1768 12 view .LVU5360
mov r8, rdx #, len
mov r9d, 1 #,
mov rdx, r10 #, input
.LVL1073:
.loc 1 1768 12 view .LVU5361
.LBE10234:
.LBE10240:
# xxhash.h:1791: }
.loc 1 1791 1 view .LVU5362
pop rbx #
.cfi_restore 3
.cfi_def_cfa_offset 64
pop rsi #
.cfi_restore 4
.cfi_def_cfa_offset 56
pop rdi #
.cfi_restore 5
.cfi_def_cfa_offset 48
pop rbp #
.cfi_restore 6
.cfi_def_cfa_offset 40
pop r12 #
.cfi_restore 12
.cfi_def_cfa_offset 32
pop r13 #
.cfi_restore 13
.cfi_def_cfa_offset 24
pop r14 #
.cfi_restore 14
.cfi_def_cfa_offset 16
pop r15 #
.cfi_restore 15
.cfi_def_cfa_offset 8
.LBB10241:
.LBB10235:
# xxhash.h:1768: return XXH64_finalize(h64, input, len, align);
.loc 1 1768 12 view .LVU5363
jmp XXH64_finalize #
.LVL1074:
.loc 1 1768 12 view .LVU5364
.LBE10235:
.LBE10241:
.cfi_endproc
.LFE45:
.seh_endproc
.p2align 4
.globl XXH64_createState
.def XXH64_createState; .scl 2; .type 32; .endef
.seh_proc XXH64_createState
XXH64_createState:
.LFB46:
.loc 1 1796 1 is_stmt 1 view -0
.cfi_startproc
.seh_endprologue
.loc 1 1797 5 view .LVU5366
.LVL1075:
.LBB10242:
.LBI10242:
.loc 1 816 14 view .LVU5367
.LBB10243:
.loc 1 816 37 view .LVU5368
# xxhash.h:816: static void* XXH_malloc(size_t s) { return malloc(s); }
.loc 1 816 44 is_stmt 0 view .LVU5369
mov ecx, 88 #,
.LBE10243:
.LBE10242:
# xxhash.h:1798: }
.loc 1 1798 1 view .LVU5370
.LBB10245:
.LBB10244:
# xxhash.h:816: static void* XXH_malloc(size_t s) { return malloc(s); }
.loc 1 816 44 view .LVU5371
jmp malloc #
.LVL1076:
.LBE10244:
.LBE10245:
.cfi_endproc
.LFE46:
.seh_endproc
.p2align 4
.globl XXH64_freeState
.def XXH64_freeState; .scl 2; .type 32; .endef
.seh_proc XXH64_freeState
XXH64_freeState:
.LVL1077:
.LFB47:
.loc 1 1800 1 is_stmt 1 view -0
.cfi_startproc
.loc 1 1800 1 is_stmt 0 view .LVU5373
sub rsp, 40 #,
.seh_stackalloc 40
.cfi_def_cfa_offset 48
.seh_endprologue
.loc 1 1801 5 is_stmt 1 view .LVU5374
.LVL1078:
.LBB10246:
.LBI10246:
.loc 1 817 14 view .LVU5375
.LBB10247:
.loc 1 817 37 view .LVU5376
call free #
.LVL1079:
.loc 1 817 37 is_stmt 0 view .LVU5377
.LBE10247:
.LBE10246:
.loc 1 1802 5 is_stmt 1 view .LVU5378
# xxhash.h:1803: }
.loc 1 1803 1 is_stmt 0 view .LVU5379
xor eax, eax #
add rsp, 40 #,
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE47:
.seh_endproc
.p2align 4
.globl XXH64_copyState
.def XXH64_copyState; .scl 2; .type 32; .endef
.seh_proc XXH64_copyState
XXH64_copyState:
.LVL1080:
.LFB48:
.loc 1 1806 1 is_stmt 1 view -0
.cfi_startproc
.loc 1 1806 1 is_stmt 0 view .LVU5381
.seh_endprologue
.loc 1 1807 5 is_stmt 1 view .LVU5382
vmovdqu xmm0, XMMWORD PTR [rdx] # tmp92, MEM[(void *)srcState_3(D)]
vmovups XMMWORD PTR [rcx], xmm0 # MEM[(void *)dstState_2(D)], tmp92
vmovdqu xmm1, XMMWORD PTR 16[rdx] # tmp93, MEM[(void *)srcState_3(D)]
vmovups XMMWORD PTR 16[rcx], xmm1 # MEM[(void *)dstState_2(D)], tmp93
vmovdqu xmm2, XMMWORD PTR 32[rdx] # tmp94, MEM[(void *)srcState_3(D)]
vmovups XMMWORD PTR 32[rcx], xmm2 # MEM[(void *)dstState_2(D)], tmp94
vmovdqu xmm3, XMMWORD PTR 48[rdx] # tmp95, MEM[(void *)srcState_3(D)]
vmovups XMMWORD PTR 48[rcx], xmm3 # MEM[(void *)dstState_2(D)], tmp95
vmovdqu xmm4, XMMWORD PTR 64[rdx] # tmp96, MEM[(void *)srcState_3(D)]
vmovups XMMWORD PTR 64[rcx], xmm4 # MEM[(void *)dstState_2(D)], tmp96
mov rax, QWORD PTR 80[rdx] # MEM[(void *)srcState_3(D)], MEM[(void *)srcState_3(D)]
mov QWORD PTR 80[rcx], rax # MEM[(void *)dstState_2(D)], MEM[(void *)srcState_3(D)]
# xxhash.h:1808: }
.loc 1 1808 1 is_stmt 0 view .LVU5383
ret
.cfi_endproc
.LFE48:
.seh_endproc
.p2align 4
.globl XXH64_reset
.def XXH64_reset; .scl 2; .type 32; .endef
.seh_proc XXH64_reset
XXH64_reset:
.LVL1081:
.LFB49:
.loc 1 1811 1 is_stmt 1 view -0
.cfi_startproc
.loc 1 1811 1 is_stmt 0 view .LVU5385
push rdi #
.seh_pushreg rdi
.cfi_def_cfa_offset 16
.cfi_offset 5, -16
sub rsp, 96 #,
.seh_stackalloc 96
.cfi_def_cfa_offset 112
.seh_endprologue
.loc 1 1812 5 is_stmt 1 view .LVU5386
.loc 1 1813 5 view .LVU5387
xor eax, eax # tmp90
mov r9, rsp # tmp88,
# xxhash.h:1811: {
.loc 1 1811 1 is_stmt 0 view .LVU5388
mov r8, rcx # statePtr, tmp104
# xxhash.h:1814: state.v1 = seed + PRIME64_1 + PRIME64_2;
.loc 1 1814 33 view .LVU5389
vmovq xmm1, rdx # seed, seed
# xxhash.h:1813: memset(&state, 0, sizeof(state));
.loc 1 1813 5 view .LVU5390
mov ecx, 11 # tmp91,
.LVL1082:
.loc 1 1813 5 view .LVU5391
mov rdi, r9 # tmp88, tmp88
# xxhash.h:1814: state.v1 = seed + PRIME64_1 + PRIME64_2;
.loc 1 1814 33 view .LVU5392
vpunpcklqdq xmm0, xmm1, xmm1 # tmp92, seed
vpaddq xmm0, xmm0, XMMWORD PTR .LC5[rip] # vect__1.635, tmp92,
# xxhash.h:1813: memset(&state, 0, sizeof(state));
.loc 1 1813 5 view .LVU5393
rep stosq
.loc 1 1814 5 is_stmt 1 view .LVU5394
.loc 1 1815 5 view .LVU5395
# xxhash.h:1816: state.v3 = seed + 0;
.loc 1 1816 14 is_stmt 0 view .LVU5396
mov QWORD PTR 24[rsp], rdx # state.v3, seed
# xxhash.h:1817: state.v4 = seed - PRIME64_1;
.loc 1 1817 21 view .LVU5397
movabs rax, 7046029288634856825 # tmp95,
add rdx, rax # tmp96, tmp95
.LVL1083:
# xxhash.h:1814: state.v1 = seed + PRIME64_1 + PRIME64_2;
.loc 1 1814 14 view .LVU5398
vmovups XMMWORD PTR 8[rsp], xmm0 # MEM[(long long unsigned int *)&state + 8B], vect__1.635
.loc 1 1816 5 is_stmt 1 view .LVU5399
.loc 1 1817 5 view .LVU5400
# xxhash.h:1821: }
.loc 1 1821 1 is_stmt 0 view .LVU5401
xor eax, eax #
# xxhash.h:1819: memcpy(statePtr, &state, sizeof(state) - sizeof(state.reserved64));
.loc 1 1819 5 view .LVU5402
vmovdqa xmm2, XMMWORD PTR [rsp] # tmp108, MEM[(void *)&state]
# xxhash.h:1817: state.v4 = seed - PRIME64_1;
.loc 1 1817 21 view .LVU5403
mov QWORD PTR 32[rsp], rdx # state.v4, tmp96
.loc 1 1819 5 is_stmt 1 view .LVU5404
vmovdqa xmm3, XMMWORD PTR 16[rsp] # tmp109, MEM[(void *)&state]
vmovdqa xmm4, XMMWORD PTR 32[rsp] # tmp110, MEM[(void *)&state]
vmovdqa xmm5, XMMWORD PTR 48[rsp] # tmp111, MEM[(void *)&state]
vmovdqa xmm1, XMMWORD PTR 64[rsp] # tmp112, MEM[(void *)&state]
.LVL1084:
.loc 1 1819 5 is_stmt 0 view .LVU5405
vmovups XMMWORD PTR [r8], xmm2 # MEM[(void *)statePtr_11(D)], tmp108
vmovups XMMWORD PTR 16[r8], xmm3 # MEM[(void *)statePtr_11(D)], tmp109
vmovups XMMWORD PTR 32[r8], xmm4 # MEM[(void *)statePtr_11(D)], tmp110
vmovups XMMWORD PTR 48[r8], xmm5 # MEM[(void *)statePtr_11(D)], tmp111
vmovups XMMWORD PTR 64[r8], xmm1 # MEM[(void *)statePtr_11(D)], tmp112
.loc 1 1820 5 is_stmt 1 view .LVU5406
# xxhash.h:1821: }
.loc 1 1821 1 is_stmt 0 view .LVU5407
add rsp, 96 #,
.cfi_def_cfa_offset 16
pop rdi #
.cfi_restore 5
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE49:
.seh_endproc
.p2align 4
.globl XXH64_update
.def XXH64_update; .scl 2; .type 32; .endef
.seh_proc XXH64_update
XXH64_update:
.LVL1085:
.LFB50:
.loc 1 1825 1 is_stmt 1 view -0
.cfi_startproc
.loc 1 1825 1 is_stmt 0 view .LVU5409
push r13 #
.seh_pushreg r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
push r12 #
.seh_pushreg r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
push rbp #
.seh_pushreg rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
push rdi #
.seh_pushreg rdi
.cfi_def_cfa_offset 40
.cfi_offset 5, -40
push rsi #
.seh_pushreg rsi
.cfi_def_cfa_offset 48
.cfi_offset 4, -48
push rbx #
.seh_pushreg rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 40 #,
.seh_stackalloc 40
.cfi_def_cfa_offset 96
.seh_endprologue
.loc 1 1826 5 is_stmt 1 view .LVU5410
# xxhash.h:1825: {
.loc 1 1825 1 is_stmt 0 view .LVU5411
mov rsi, rcx # state, tmp242
mov r12, rdx # input, tmp243
# xxhash.h:1826: if (input==NULL)
.loc 1 1826 8 view .LVU5412
test rdx, rdx # input
je .L274 #,
.LBB10248:
.loc 1 1833 9 is_stmt 1 view .LVU5413
.LVL1086:
.loc 1 1834 9 view .LVU5414
# xxhash.h:1834: const xxh_u8* const bEnd = p + len;
.loc 1 1834 29 is_stmt 0 view .LVU5415
lea rdi, [rdx+r8] # bEnd,
.LVL1087:
.loc 1 1836 9 is_stmt 1 view .LVU5416
# xxhash.h:1838: if (state->memsize + len < 32) { /* fill in tmp buffer */
.loc 1 1838 18 is_stmt 0 view .LVU5417
mov edx, DWORD PTR 72[rcx] #, state_48(D)->memsize
.LVL1088:
# xxhash.h:1836: state->total_len += len;
.loc 1 1836 26 view .LVU5418
add QWORD PTR [rcx], r8 # state_48(D)->total_len, len
.loc 1 1838 9 is_stmt 1 view .LVU5419
# xxhash.h:1838: if (state->memsize + len < 32) { /* fill in tmp buffer */
.loc 1 1838 28 is_stmt 0 view .LVU5420
lea rcx, [rdx+r8] # tmp165,
.LVL1089:
# xxhash.h:1838: if (state->memsize + len < 32) { /* fill in tmp buffer */
.loc 1 1838 12 view .LVU5421
cmp rcx, 31 # tmp165,
jbe .L280 #,
.loc 1 1844 9 is_stmt 1 view .LVU5422
# xxhash.h:1844: if (state->memsize) { /* tmp buffer is full */
.loc 1 1844 12 is_stmt 0 view .LVU5423
test edx, edx # _3
jne .L281 #,
.loc 1 1854 9 is_stmt 1 view .LVU5424
# xxhash.h:1854: if (p+32 <= bEnd) {
.loc 1 1854 14 is_stmt 0 view .LVU5425
lea rax, 32[r12] # tmp210,
# xxhash.h:1854: if (p+32 <= bEnd) {
.loc 1 1854 12 view .LVU5426
cmp rdi, rax # bEnd, tmp210
jb .L272 #,
.LVL1090:
.L283:
.LBB10249:
.loc 1 1855 13 is_stmt 1 view .LVU5427
# xxhash.h:1856: xxh_u64 v1 = state->v1;
.loc 1 1856 21 is_stmt 0 view .LVU5428
mov rdx, QWORD PTR 8[rsi] # v1, state_48(D)->v1
# xxhash.h:1857: xxh_u64 v2 = state->v2;
.loc 1 1857 21 view .LVU5429
mov r8, QWORD PTR 16[rsi] # v2, state_48(D)->v2
# xxhash.h:1855: const xxh_u8* const limit = bEnd - 32;
.loc 1 1855 33 view .LVU5430
lea rbp, -32[rdi] # tmp241,
.LVL1091:
.loc 1 1856 13 is_stmt 1 view .LVU5431
.loc 1 1857 13 view .LVU5432
.loc 1 1858 13 view .LVU5433
# xxhash.h:1859: xxh_u64 v4 = state->v4;
.loc 1 1859 21 is_stmt 0 view .LVU5434
mov rax, r12 # p, input
# xxhash.h:1858: xxh_u64 v3 = state->v3;
.loc 1 1858 21 view .LVU5435
mov r13, QWORD PTR 24[rsi] # v3, state_48(D)->v3
.LVL1092:
.loc 1 1859 13 is_stmt 1 view .LVU5436
# xxhash.h:1859: xxh_u64 v4 = state->v4;
.loc 1 1859 21 is_stmt 0 view .LVU5437
mov rcx, QWORD PTR 32[rsi] # v4, state_48(D)->v4
.LVL1093:
.LBB10250:
.LBB10251:
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 view .LVU5438
movabs rbx, -4417276706812531889 # tmp213,
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 view .LVU5439
movabs r11, -7046029288634856825 # tmp214,
.LVL1094:
.p2align 4,,10
.p2align 3
.L273:
.loc 1 1581 9 view .LVU5440
.LBE10251:
.LBE10250:
.loc 1 1861 13 is_stmt 1 discriminator 1 view .LVU5441
.loc 1 1862 17 discriminator 1 view .LVU5442
.loc 1 1862 17 is_stmt 0 discriminator 1 view .LVU5443
.LBE10249:
.LBE10248:
.loc 1 1550 5 is_stmt 1 discriminator 1 view .LVU5444
.loc 1 1492 5 discriminator 1 view .LVU5445
.loc 1 1493 5 discriminator 1 view .LVU5446
.loc 1 1494 5 discriminator 1 view .LVU5447
.LBB10322:
.LBB10284:
.LBB10257:
.LBI10250:
.loc 1 1577 16 discriminator 1 view .LVU5448
.LBB10252:
.loc 1 1579 5 discriminator 1 view .LVU5449
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 is_stmt 0 discriminator 1 view .LVU5450
mov r9, QWORD PTR [rax] # tmp211, MEM[base: p_33, offset: 0B]
.LBE10252:
.LBE10257:
.LBB10258:
.LBB10259:
mov r10, QWORD PTR 16[rax] # tmp219, MEM[base: p_33, offset: 16B]
add rax, 32 # p,
.LVL1095:
.loc 1 1579 18 discriminator 1 view .LVU5451
.LBE10259:
.LBE10258:
.LBB10264:
.LBB10253:
imul r9, rbx # tmp211, tmp213
.LVL1096:
.loc 1 1579 18 discriminator 1 view .LVU5452
.LBE10253:
.LBE10264:
.LBB10265:
.LBB10260:
imul r10, rbx # tmp219, tmp213
.LBE10260:
.LBE10265:
.LBB10266:
.LBB10254:
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 9 discriminator 1 view .LVU5453
add rdx, r9 # acc, tmp211
.LVL1097:
.loc 1 1580 5 is_stmt 1 discriminator 1 view .LVU5454
.LBE10254:
.LBE10266:
.LBB10267:
.LBB10268:
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 is_stmt 0 discriminator 1 view .LVU5455
mov r9, QWORD PTR -24[rax] # tmp215, MEM[base: p_33, offset: 8B]
.LBE10268:
.LBE10267:
.LBB10273:
.LBB10255:
# xxhash.h:1580: acc = XXH_rotl64(acc, 31);
.loc 1 1580 10 discriminator 1 view .LVU5456
rol rdx, 31 # acc,
.LVL1098:
.loc 1 1581 5 is_stmt 1 discriminator 1 view .LVU5457
.LBE10255:
.LBE10273:
.LBB10274:
.LBB10269:
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 is_stmt 0 discriminator 1 view .LVU5458
imul r9, rbx # tmp215, tmp213
.LBE10269:
.LBE10274:
.LBB10275:
.LBB10256:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 discriminator 1 view .LVU5459
imul rdx, r11 # v1, tmp214
.LVL1099:
.loc 1 1582 5 is_stmt 1 discriminator 1 view .LVU5460
.loc 1 1582 5 is_stmt 0 discriminator 1 view .LVU5461
.LBE10256:
.LBE10275:
.loc 1 1862 56 is_stmt 1 discriminator 1 view .LVU5462
.loc 1 1863 17 discriminator 1 view .LVU5463
.loc 1 1863 17 is_stmt 0 discriminator 1 view .LVU5464
.LBE10284:
.LBE10322:
.loc 1 1550 5 is_stmt 1 discriminator 1 view .LVU5465
.loc 1 1492 5 discriminator 1 view .LVU5466
.loc 1 1493 5 discriminator 1 view .LVU5467
.loc 1 1494 5 discriminator 1 view .LVU5468
.LBB10323:
.LBB10285:
.LBB10276:
.LBI10267:
.loc 1 1577 16 discriminator 1 view .LVU5469
.LBB10270:
.loc 1 1579 5 discriminator 1 view .LVU5470
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 9 is_stmt 0 discriminator 1 view .LVU5471
add r8, r9 # acc, tmp215
.LVL1100:
.loc 1 1580 5 is_stmt 1 discriminator 1 view .LVU5472
.LBE10270:
.LBE10276:
.LBB10277:
.LBB10261:
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 9 is_stmt 0 discriminator 1 view .LVU5473
lea r9, [r10+r13] # acc,
# xxhash.h:1580: acc = XXH_rotl64(acc, 31);
.loc 1 1580 10 discriminator 1 view .LVU5474
rol r9, 31 # acc,
.LBE10261:
.LBE10277:
.LBB10278:
.LBB10271:
rol r8, 31 # acc,
.LVL1101:
.loc 1 1581 5 is_stmt 1 discriminator 1 view .LVU5475
.LBE10271:
.LBE10278:
.LBB10279:
.LBB10262:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 is_stmt 0 discriminator 1 view .LVU5476
imul r9, r11 # acc, tmp214
.LBE10262:
.LBE10279:
.LBB10280:
.LBB10272:
imul r8, r11 # v2, tmp214
.LVL1102:
.loc 1 1582 5 is_stmt 1 discriminator 1 view .LVU5477
.loc 1 1582 5 is_stmt 0 discriminator 1 view .LVU5478
.LBE10272:
.LBE10280:
.loc 1 1863 56 is_stmt 1 discriminator 1 view .LVU5479
.loc 1 1864 17 discriminator 1 view .LVU5480
.loc 1 1864 17 is_stmt 0 discriminator 1 view .LVU5481
.LBE10285:
.LBE10323:
.loc 1 1550 5 is_stmt 1 discriminator 1 view .LVU5482
.loc 1 1492 5 discriminator 1 view .LVU5483
.loc 1 1493 5 discriminator 1 view .LVU5484
.loc 1 1494 5 discriminator 1 view .LVU5485
.LBB10324:
.LBB10286:
.LBB10281:
.LBI10258:
.loc 1 1577 16 discriminator 1 view .LVU5486
.LBB10263:
.loc 1 1579 5 discriminator 1 view .LVU5487
.loc 1 1580 5 discriminator 1 view .LVU5488
.loc 1 1581 5 discriminator 1 view .LVU5489
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 is_stmt 0 discriminator 1 view .LVU5490
mov r13, r9 # v3, acc
.LVL1103:
.loc 1 1582 5 is_stmt 1 discriminator 1 view .LVU5491
.loc 1 1582 5 is_stmt 0 discriminator 1 view .LVU5492
.LBE10263:
.LBE10281:
.loc 1 1864 56 is_stmt 1 discriminator 1 view .LVU5493
.loc 1 1865 17 discriminator 1 view .LVU5494
.loc 1 1865 17 is_stmt 0 discriminator 1 view .LVU5495
.LBE10286:
.LBE10324:
.loc 1 1550 5 is_stmt 1 discriminator 1 view .LVU5496
.loc 1 1492 5 discriminator 1 view .LVU5497
.loc 1 1493 5 discriminator 1 view .LVU5498
.loc 1 1494 5 discriminator 1 view .LVU5499
.LBB10325:
.LBB10287:
.LBB10282:
.LBI10282:
.loc 1 1577 16 discriminator 1 view .LVU5500
.LBB10283:
.loc 1 1579 5 discriminator 1 view .LVU5501
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 is_stmt 0 discriminator 1 view .LVU5502
mov r9, QWORD PTR -8[rax] # tmp223, MEM[base: p_33, offset: 24B]
.LVL1104:
.loc 1 1579 18 discriminator 1 view .LVU5503
imul r9, rbx # tmp223, tmp213
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 9 discriminator 1 view .LVU5504
add rcx, r9 # acc, tmp223
.LVL1105:
.loc 1 1580 5 is_stmt 1 discriminator 1 view .LVU5505
# xxhash.h:1580: acc = XXH_rotl64(acc, 31);
.loc 1 1580 10 is_stmt 0 discriminator 1 view .LVU5506
rol rcx, 31 # acc,
.LVL1106:
.loc 1 1581 5 is_stmt 1 discriminator 1 view .LVU5507
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 is_stmt 0 discriminator 1 view .LVU5508
imul rcx, r11 # v4, tmp214
.LVL1107:
.loc 1 1582 5 is_stmt 1 discriminator 1 view .LVU5509
.loc 1 1582 5 is_stmt 0 discriminator 1 view .LVU5510
.LBE10283:
.LBE10282:
.loc 1 1865 56 is_stmt 1 discriminator 1 view .LVU5511
.loc 1 1866 21 discriminator 1 view .LVU5512
# xxhash.h:1866: } while (p<=limit);
.loc 1 1866 13 is_stmt 0 discriminator 1 view .LVU5513
cmp rbp, rax # tmp241, p
jnb .L273 #,
sub rbp, r12 # tmp228, input
.LVL1108:
# xxhash.h:1868: state->v1 = v1;
.loc 1 1868 23 view .LVU5514
vmovq xmm2, r13 # v3, v3
vmovq xmm3, rdx # v1, v1
and rbp, -32 # tmp230,
vpinsrq xmm1, xmm2, rcx, 1 # tmp232, v3, v4
vpinsrq xmm0, xmm3, r8, 1 # tmp233, v1, v2
vinserti128 ymm0, ymm0, xmm1, 0x1 # tmp231, tmp233, tmp232
lea r12, 32[r12+rbp] # input,
.loc 1 1868 13 is_stmt 1 view .LVU5515
.loc 1 1869 13 view .LVU5516
.loc 1 1870 13 view .LVU5517
.loc 1 1871 13 view .LVU5518
# xxhash.h:1868: state->v1 = v1;
.loc 1 1868 23 is_stmt 0 view .LVU5519
vmovups XMMWORD PTR 8[rsi], xmm0 # MEM[(long long unsigned int *)state_48(D) + 8B], tmp231
vextracti128 XMMWORD PTR 24[rsi], ymm0, 0x1 # MEM[(long long unsigned int *)state_48(D) + 8B], tmp231
vzeroupper
.LVL1109:
.L272:
.loc 1 1868 23 view .LVU5520
.LBE10287:
.loc 1 1874 9 is_stmt 1 view .LVU5521
.LBE10325:
# xxhash.h:1880: return XXH_OK;
.loc 1 1880 12 is_stmt 0 view .LVU5522
xor r13d, r13d # <retval>
.LBB10326:
# xxhash.h:1874: if (p < bEnd) {
.loc 1 1874 12 view .LVU5523
cmp r12, rdi # input, bEnd
jb .L282 #,
.LBE10326:
# xxhash.h:1881: }
.loc 1 1881 1 view .LVU5524
mov eax, r13d #, <retval>
add rsp, 40 #,
.cfi_remember_state
.cfi_def_cfa_offset 56
pop rbx #
.cfi_restore 3
.cfi_def_cfa_offset 48
pop rsi #
.cfi_restore 4
.cfi_def_cfa_offset 40
.LVL1110:
.loc 1 1881 1 view .LVU5525
pop rdi #
.cfi_restore 5
.cfi_def_cfa_offset 32
.LVL1111:
.loc 1 1881 1 view .LVU5526
pop rbp #
.cfi_restore 6
.cfi_def_cfa_offset 24
pop r12 #
.cfi_restore 12
.cfi_def_cfa_offset 16
.LVL1112:
.loc 1 1881 1 view .LVU5527
pop r13 #
.cfi_restore 13
.cfi_def_cfa_offset 8
ret
.LVL1113:
.p2align 4,,10
.p2align 3
.L281:
.cfi_restore_state
.LBB10327:
.loc 1 1845 13 is_stmt 1 view .LVU5528
.LBB10288:
.LBI10288:
.loc 1 820 14 view .LVU5529
.LBB10289:
.loc 1 822 5 view .LVU5530
.LBE10289:
.LBE10288:
# xxhash.h:1845: XXH_memcpy(((xxh_u8*)state->mem64) + state->memsize, input, 32-state->memsize);
.loc 1 1845 75 is_stmt 0 view .LVU5531
mov ebx, 32 # tmp176,
# xxhash.h:1845: XXH_memcpy(((xxh_u8*)state->mem64) + state->memsize, input, 32-state->memsize);
.loc 1 1845 13 view .LVU5532
lea rcx, 40[rsi+rdx] # tmp174,
.LVL1114:
.LBB10291:
.LBB10290:
# xxhash.h:822: return memcpy(dest,src,size);
.loc 1 822 12 view .LVU5533
mov r8d, ebx # tmp245, tmp176
.LVL1115:
.loc 1 822 12 view .LVU5534
sub r8d, edx # tmp245, _3
.LVL1116:
.loc 1 822 12 view .LVU5535
mov rdx, r12 #, input
call memcpy #
.LVL1117:
.loc 1 822 12 view .LVU5536
.LBE10290:
.LBE10291:
.loc 1 1846 13 is_stmt 1 view .LVU5537
.loc 1 1846 13 is_stmt 0 view .LVU5538
.LBE10327:
.loc 1 1550 5 is_stmt 1 view .LVU5539
.loc 1 1492 5 view .LVU5540
.loc 1 1493 5 view .LVU5541
.loc 1 1494 5 view .LVU5542
.LBB10328:
.LBB10292:
.LBI10292:
.loc 1 1577 16 view .LVU5543
.LBB10293:
.loc 1 1579 5 view .LVU5544
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 is_stmt 0 view .LVU5545
mov rdx, QWORD PTR 40[rsi] # tmp183, MEM[(char * {ref-all})state_48(D) + 40B]
.LBE10293:
.LBE10292:
# xxhash.h:1850: p += 32-state->memsize;
.loc 1 1850 20 view .LVU5546
sub ebx, DWORD PTR 72[rsi] # tmp209, state_48(D)->memsize
.LBB10296:
.LBB10294:
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 view .LVU5547
movabs rax, -4417276706812531889 # tmp185,
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 view .LVU5548
movabs rcx, -7046029288634856825 # tmp188,
.LBE10294:
.LBE10296:
# xxhash.h:1850: p += 32-state->memsize;
.loc 1 1850 15 view .LVU5549
add r12, rbx # input, tmp209
.LVL1118:
# xxhash.h:1851: state->memsize = 0;
.loc 1 1851 28 view .LVU5550
mov DWORD PTR 72[rsi], 0 # state_48(D)->memsize,
.LBB10297:
.LBB10295:
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 view .LVU5551
imul rdx, rax # tmp183, tmp185
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 9 view .LVU5552
add rdx, QWORD PTR 8[rsi] # acc, state_48(D)->v1
.LVL1119:
.loc 1 1580 5 is_stmt 1 view .LVU5553
# xxhash.h:1580: acc = XXH_rotl64(acc, 31);
.loc 1 1580 10 is_stmt 0 view .LVU5554
rol rdx, 31 # acc,
.LVL1120:
.loc 1 1581 5 is_stmt 1 view .LVU5555
.loc 1 1582 5 view .LVU5556
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 is_stmt 0 view .LVU5557
imul rdx, rcx # acc, tmp188
.LBE10295:
.LBE10297:
# xxhash.h:1846: state->v1 = XXH64_round(state->v1, XXH_readLE64(state->mem64+0));
.loc 1 1846 23 view .LVU5558
mov QWORD PTR 8[rsi], rdx # state_48(D)->v1, acc
.loc 1 1847 13 is_stmt 1 view .LVU5559
.LVL1121:
.loc 1 1847 13 is_stmt 0 view .LVU5560
.LBE10328:
.loc 1 1550 5 is_stmt 1 view .LVU5561
.loc 1 1492 5 view .LVU5562
.loc 1 1493 5 view .LVU5563
.loc 1 1494 5 view .LVU5564
.LBB10329:
.LBB10298:
.LBI10298:
.loc 1 1577 16 view .LVU5565
.LBB10299:
.loc 1 1579 5 view .LVU5566
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 is_stmt 0 view .LVU5567
mov rdx, QWORD PTR 48[rsi] # tmp189, MEM[(char * {ref-all})state_48(D) + 48B]
imul rdx, rax # tmp189, tmp185
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 9 view .LVU5568
add rdx, QWORD PTR 16[rsi] # acc, state_48(D)->v2
.LVL1122:
.loc 1 1580 5 is_stmt 1 view .LVU5569
# xxhash.h:1580: acc = XXH_rotl64(acc, 31);
.loc 1 1580 10 is_stmt 0 view .LVU5570
rol rdx, 31 # acc,
.LVL1123:
.loc 1 1581 5 is_stmt 1 view .LVU5571
.loc 1 1582 5 view .LVU5572
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 is_stmt 0 view .LVU5573
imul rdx, rcx # acc, tmp188
.LBE10299:
.LBE10298:
# xxhash.h:1847: state->v2 = XXH64_round(state->v2, XXH_readLE64(state->mem64+1));
.loc 1 1847 23 view .LVU5574
mov QWORD PTR 16[rsi], rdx # state_48(D)->v2, acc
.loc 1 1848 13 is_stmt 1 view .LVU5575
.LVL1124:
.loc 1 1848 13 is_stmt 0 view .LVU5576
.LBE10329:
.loc 1 1550 5 is_stmt 1 view .LVU5577
.loc 1 1492 5 view .LVU5578
.loc 1 1493 5 view .LVU5579
.loc 1 1494 5 view .LVU5580
.LBB10330:
.LBB10300:
.LBI10300:
.loc 1 1577 16 view .LVU5581
.LBB10301:
.loc 1 1579 5 view .LVU5582
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 is_stmt 0 view .LVU5583
mov rdx, QWORD PTR 56[rsi] # tmp195, MEM[(char * {ref-all})state_48(D) + 56B]
imul rdx, rax # tmp195, tmp185
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 9 view .LVU5584
add rdx, QWORD PTR 24[rsi] # acc, state_48(D)->v3
.LVL1125:
.loc 1 1580 5 is_stmt 1 view .LVU5585
.LBE10301:
.LBE10300:
.LBB10304:
.LBB10305:
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 is_stmt 0 view .LVU5586
imul rax, QWORD PTR 64[rsi] # tmp201, MEM[(char * {ref-all})state_48(D) + 64B]
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 9 view .LVU5587
add rax, QWORD PTR 32[rsi] # acc, state_48(D)->v4
.LBE10305:
.LBE10304:
.LBB10309:
.LBB10302:
# xxhash.h:1580: acc = XXH_rotl64(acc, 31);
.loc 1 1580 10 view .LVU5588
rol rdx, 31 # acc,
.LVL1126:
.loc 1 1581 5 is_stmt 1 view .LVU5589
.loc 1 1582 5 view .LVU5590
.loc 1 1582 5 is_stmt 0 view .LVU5591
.LBE10302:
.LBE10309:
.LBB10310:
.LBB10306:
# xxhash.h:1580: acc = XXH_rotl64(acc, 31);
.loc 1 1580 10 view .LVU5592
rol rax, 31 # acc,
.LBE10306:
.LBE10310:
.LBB10311:
.LBB10303:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 view .LVU5593
imul rdx, rcx # acc, tmp188
.LBE10303:
.LBE10311:
.LBB10312:
.LBB10307:
imul rax, rcx # acc, tmp188
.LBE10307:
.LBE10312:
# xxhash.h:1848: state->v3 = XXH64_round(state->v3, XXH_readLE64(state->mem64+2));
.loc 1 1848 23 view .LVU5594
mov QWORD PTR 24[rsi], rdx # state_48(D)->v3, acc
.loc 1 1849 13 is_stmt 1 view .LVU5595
.LVL1127:
.loc 1 1849 13 is_stmt 0 view .LVU5596
.LBE10330:
.loc 1 1550 5 is_stmt 1 view .LVU5597
.loc 1 1492 5 view .LVU5598
.loc 1 1493 5 view .LVU5599
.loc 1 1494 5 view .LVU5600
.LBB10331:
.LBB10313:
.LBI10304:
.loc 1 1577 16 view .LVU5601
.LBB10308:
.loc 1 1579 5 view .LVU5602
.loc 1 1580 5 view .LVU5603
.loc 1 1581 5 view .LVU5604
.loc 1 1582 5 view .LVU5605
.loc 1 1582 5 is_stmt 0 view .LVU5606
.LBE10308:
.LBE10313:
# xxhash.h:1849: state->v4 = XXH64_round(state->v4, XXH_readLE64(state->mem64+3));
.loc 1 1849 23 view .LVU5607
mov QWORD PTR 32[rsi], rax # state_48(D)->v4, acc
.loc 1 1850 13 is_stmt 1 view .LVU5608
.LVL1128:
.loc 1 1851 13 view .LVU5609
.loc 1 1854 9 view .LVU5610
# xxhash.h:1854: if (p+32 <= bEnd) {
.loc 1 1854 14 is_stmt 0 view .LVU5611
lea rax, 32[r12] # tmp210,
# xxhash.h:1854: if (p+32 <= bEnd) {
.loc 1 1854 12 view .LVU5612
cmp rdi, rax # bEnd, tmp210
jb .L272 #,
jmp .L283 #
.p2align 4,,10
.p2align 3
.L282:
.loc 1 1875 13 is_stmt 1 view .LVU5613
# xxhash.h:1875: XXH_memcpy(state->mem64, p, (size_t)(bEnd-p));
.loc 1 1875 54 is_stmt 0 view .LVU5614
sub rdi, r12 # _27, input
.LVL1129:
.LBB10314:
.LBI10314:
.loc 1 820 14 is_stmt 1 view .LVU5615
.LBB10315:
.loc 1 822 5 view .LVU5616
# xxhash.h:822: return memcpy(dest,src,size);
.loc 1 822 12 is_stmt 0 view .LVU5617
lea rcx, 40[rsi] # tmp234,
.LVL1130:
.loc 1 822 12 view .LVU5618
mov rdx, r12 #, input
mov r8, rdi #, _27
call memcpy #
.LVL1131:
.loc 1 822 12 view .LVU5619
.LBE10315:
.LBE10314:
.loc 1 1876 13 is_stmt 1 view .LVU5620
.LBE10331:
# xxhash.h:1881: }
.loc 1 1881 1 is_stmt 0 view .LVU5621
mov eax, r13d #, <retval>
.LBB10332:
# xxhash.h:1876: state->memsize = (unsigned)(bEnd-p);
.loc 1 1876 30 view .LVU5622
mov DWORD PTR 72[rsi], edi # state_48(D)->memsize, _27
.LBE10332:
# xxhash.h:1881: }
.loc 1 1881 1 view .LVU5623
add rsp, 40 #,
.cfi_remember_state
.cfi_def_cfa_offset 56
pop rbx #
.cfi_restore 3
.cfi_def_cfa_offset 48
pop rsi #
.cfi_restore 4
.cfi_def_cfa_offset 40
.LVL1132:
.loc 1 1881 1 view .LVU5624
pop rdi #
.cfi_restore 5
.cfi_def_cfa_offset 32
pop rbp #
.cfi_restore 6
.cfi_def_cfa_offset 24
pop r12 #
.cfi_restore 12
.cfi_def_cfa_offset 16
.LVL1133:
.loc 1 1881 1 view .LVU5625
pop r13 #
.cfi_restore 13
.cfi_def_cfa_offset 8
ret
.LVL1134:
.p2align 4,,10
.p2align 3
.L274:
.cfi_restore_state
# xxhash.h:1830: return XXH_ERROR;
.loc 1 1830 16 view .LVU5626
mov r13d, 1 # <retval>,
# xxhash.h:1881: }
.loc 1 1881 1 view .LVU5627
mov eax, r13d #, <retval>
add rsp, 40 #,
.cfi_remember_state
.cfi_def_cfa_offset 56
pop rbx #
.cfi_restore 3
.cfi_def_cfa_offset 48
pop rsi #
.cfi_restore 4
.cfi_def_cfa_offset 40
pop rdi #
.cfi_restore 5
.cfi_def_cfa_offset 32
pop rbp #
.cfi_restore 6
.cfi_def_cfa_offset 24
pop r12 #
.cfi_restore 12
.cfi_def_cfa_offset 16
pop r13 #
.cfi_restore 13
.cfi_def_cfa_offset 8
ret
.LVL1135:
.p2align 4,,10
.p2align 3
.L280:
.cfi_restore_state
.LBB10333:
.loc 1 1839 13 is_stmt 1 view .LVU5628
.LBB10316:
.LBI10316:
.loc 1 820 14 view .LVU5629
.LBB10317:
.loc 1 822 5 view .LVU5630
.LBE10317:
.LBE10316:
# xxhash.h:1839: XXH_memcpy(((xxh_u8*)state->mem64) + state->memsize, input, len);
.loc 1 1839 13 is_stmt 0 view .LVU5631
lea rcx, 40[rsi+rdx] # tmp167,
.LVL1136:
.LBB10320:
.LBB10318:
# xxhash.h:822: return memcpy(dest,src,size);
.loc 1 822 12 view .LVU5632
mov rdx, r12 #, input
mov QWORD PTR 112[rsp], r8 # len, len
.LBE10318:
.LBE10320:
# xxhash.h:1841: return XXH_OK;
.loc 1 1841 20 view .LVU5633
xor r13d, r13d # <retval>
.LBB10321:
.LBB10319:
# xxhash.h:822: return memcpy(dest,src,size);
.loc 1 822 12 view .LVU5634
call memcpy #
.LVL1137:
.loc 1 822 12 view .LVU5635
.LBE10319:
.LBE10321:
.loc 1 1840 13 is_stmt 1 view .LVU5636
# xxhash.h:1840: state->memsize += (xxh_u32)len;
.loc 1 1840 28 is_stmt 0 view .LVU5637
mov r8, QWORD PTR 112[rsp] # len, len
add DWORD PTR 72[rsi], r8d # state_48(D)->memsize, len
.loc 1 1841 13 is_stmt 1 view .LVU5638
.LBE10333:
# xxhash.h:1881: }
.loc 1 1881 1 is_stmt 0 view .LVU5639
mov eax, r13d #, <retval>
add rsp, 40 #,
.cfi_def_cfa_offset 56
pop rbx #
.cfi_restore 3
.cfi_def_cfa_offset 48
pop rsi #
.cfi_restore 4
.cfi_def_cfa_offset 40
.LVL1138:
.loc 1 1881 1 view .LVU5640
pop rdi #
.cfi_restore 5
.cfi_def_cfa_offset 32
.LVL1139:
.loc 1 1881 1 view .LVU5641
pop rbp #
.cfi_restore 6
.cfi_def_cfa_offset 24
pop r12 #
.cfi_restore 12
.cfi_def_cfa_offset 16
.LVL1140:
.loc 1 1881 1 view .LVU5642
pop r13 #
.cfi_restore 13
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE50:
.seh_endproc
.p2align 4
.globl XXH64_digest
.def XXH64_digest; .scl 2; .type 32; .endef
.seh_proc XXH64_digest
XXH64_digest:
.LVL1141:
.LFB51:
.loc 1 1885 1 is_stmt 1 view -0
.cfi_startproc
.loc 1 1885 1 is_stmt 0 view .LVU5644
push rdi #
.seh_pushreg rdi
.cfi_def_cfa_offset 16
.cfi_offset 5, -16
push rsi #
.seh_pushreg rsi
.cfi_def_cfa_offset 24
.cfi_offset 4, -24
push rbx #
.seh_pushreg rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
.seh_endprologue
.loc 1 1886 5 is_stmt 1 view .LVU5645
.loc 1 1888 5 view .LVU5646
# xxhash.h:1900: h64 = state->v3 /*seed*/ + PRIME64_5;
.loc 1 1900 14 is_stmt 0 view .LVU5647
movabs rax, 2870177450012600261 # tmp160,
mov rdx, QWORD PTR 24[rcx] # pretmp_45, state_12(D)->v3
# xxhash.h:1888: if (state->total_len >= 32) {
.loc 1 1888 14 view .LVU5648
mov r8, QWORD PTR [rcx] # _1, state_12(D)->total_len
# xxhash.h:1900: h64 = state->v3 /*seed*/ + PRIME64_5;
.loc 1 1900 14 view .LVU5649
add rax, rdx # h64, pretmp_45
# xxhash.h:1888: if (state->total_len >= 32) {
.loc 1 1888 8 view .LVU5650
cmp r8, 31 # _1,
jbe .L286 #,
.LBB10334:
.loc 1 1889 9 is_stmt 1 view .LVU5651
# xxhash.h:1889: xxh_u64 const v1 = state->v1;
.loc 1 1889 23 is_stmt 0 view .LVU5652
mov r10, QWORD PTR 8[rcx] # v1, state_12(D)->v1
.LVL1142:
.loc 1 1890 9 is_stmt 1 view .LVU5653
# xxhash.h:1890: xxh_u64 const v2 = state->v2;
.loc 1 1890 23 is_stmt 0 view .LVU5654
mov rdi, QWORD PTR 16[rcx] # v2, state_12(D)->v2
.LVL1143:
.loc 1 1891 9 is_stmt 1 view .LVU5655
.loc 1 1892 9 view .LVU5656
.LBB10335:
.LBB10336:
.LBB10337:
.LBB10338:
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 is_stmt 0 view .LVU5657
movabs rax, -4417276706812531889 # tmp123,
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 view .LVU5658
movabs r11, -7046029288634856825 # tmp132,
.LBE10338:
.LBE10337:
.LBE10336:
.LBE10335:
# xxhash.h:1892: xxh_u64 const v4 = state->v4;
.loc 1 1892 23 view .LVU5659
mov r9, QWORD PTR 32[rcx] # v4, state_12(D)->v4
.LVL1144:
.loc 1 1894 9 is_stmt 1 view .LVU5660
.loc 1 1895 9 view .LVU5661
.LBB10355:
.LBI10335:
.loc 1 1585 16 view .LVU5662
.LBB10347:
.loc 1 1587 5 view .LVU5663
.LBB10343:
.LBI10337:
.loc 1 1577 16 view .LVU5664
.LBB10339:
.loc 1 1579 5 view .LVU5665
.loc 1 1580 5 view .LVU5666
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 is_stmt 0 view .LVU5667
mov rsi, r10 # tmp122, v1
.LBE10339:
.LBE10343:
.LBE10347:
.LBE10355:
# xxhash.h:1894: h64 = XXH_rotl64(v1, 1) + XXH_rotl64(v2, 7) + XXH_rotl64(v3, 12) + XXH_rotl64(v4, 18);
.loc 1 1894 35 view .LVU5668
mov rbx, rdi # tmp125, v2
# xxhash.h:1894: h64 = XXH_rotl64(v1, 1) + XXH_rotl64(v2, 7) + XXH_rotl64(v3, 12) + XXH_rotl64(v4, 18);
.loc 1 1894 15 view .LVU5669
rol r10 # tmp124
.LVL1145:
.LBB10356:
.LBB10348:
.LBB10344:
.LBB10340:
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 view .LVU5670
imul rsi, rax # tmp122, tmp123
.LVL1146:
.loc 1 1579 18 view .LVU5671
.LBE10340:
.LBE10344:
.LBE10348:
.LBE10356:
# xxhash.h:1894: h64 = XXH_rotl64(v1, 1) + XXH_rotl64(v2, 7) + XXH_rotl64(v3, 12) + XXH_rotl64(v4, 18);
.loc 1 1894 35 view .LVU5672
rol rbx, 7 # tmp125,
# xxhash.h:1894: h64 = XXH_rotl64(v1, 1) + XXH_rotl64(v2, 7) + XXH_rotl64(v3, 12) + XXH_rotl64(v4, 18);
.loc 1 1894 33 view .LVU5673
add r10, rbx # tmp126, tmp125
.LBB10357:
.LBB10358:
.LBB10359:
.LBB10360:
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 view .LVU5674
imul rdi, rax # tmp135, tmp123
.LVL1147:
.loc 1 1579 18 view .LVU5675
.LBE10360:
.LBE10359:
.LBE10358:
.LBE10357:
# xxhash.h:1894: h64 = XXH_rotl64(v1, 1) + XXH_rotl64(v2, 7) + XXH_rotl64(v3, 12) + XXH_rotl64(v4, 18);
.loc 1 1894 55 view .LVU5676
mov rbx, rdx # tmp127, pretmp_45
rol rbx, 12 # tmp127,
.LBB10372:
.LBB10373:
.LBB10374:
.LBB10375:
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 view .LVU5677
imul rdx, rax # tmp143, tmp123
.LVL1148:
.loc 1 1579 18 view .LVU5678
.LBE10375:
.LBE10374:
.LBE10373:
.LBE10372:
.LBB10387:
.LBB10349:
.LBB10345:
.LBB10341:
# xxhash.h:1580: acc = XXH_rotl64(acc, 31);
.loc 1 1580 10 view .LVU5679
rol rsi, 31 # acc,
.LVL1149:
.loc 1 1581 5 is_stmt 1 view .LVU5680
.loc 1 1582 5 view .LVU5681
.loc 1 1582 5 is_stmt 0 view .LVU5682
.LBE10341:
.LBE10345:
.loc 1 1588 5 is_stmt 1 view .LVU5683
.loc 1 1589 5 view .LVU5684
.LBE10349:
.LBE10387:
.LBB10388:
.LBB10389:
.LBB10390:
.LBB10391:
# xxhash.h:1579: acc += input * PRIME64_2;
.loc 1 1579 18 is_stmt 0 view .LVU5685
imul rax, r9 # tmp151, v4
.LBE10391:
.LBE10390:
.LBE10389:
.LBE10388:
# xxhash.h:1894: h64 = XXH_rotl64(v1, 1) + XXH_rotl64(v2, 7) + XXH_rotl64(v3, 12) + XXH_rotl64(v4, 18);
.loc 1 1894 53 view .LVU5686
add r10, rbx # tmp128, tmp127
# xxhash.h:1894: h64 = XXH_rotl64(v1, 1) + XXH_rotl64(v2, 7) + XXH_rotl64(v3, 12) + XXH_rotl64(v4, 18);
.loc 1 1894 76 view .LVU5687
mov rbx, r9 # tmp129, v4
.LBB10402:
.LBB10350:
.LBB10346:
.LBB10342:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 view .LVU5688
imul rsi, r11 # acc, tmp132
.LVL1150:
.loc 1 1581 9 view .LVU5689
.LBE10342:
.LBE10346:
.LBE10350:
.LBE10402:
# xxhash.h:1894: h64 = XXH_rotl64(v1, 1) + XXH_rotl64(v2, 7) + XXH_rotl64(v3, 12) + XXH_rotl64(v4, 18);
.loc 1 1894 76 view .LVU5690
rol rbx, 18 # tmp129,
.LBB10403:
.LBB10367:
.LBB10364:
.LBB10361:
# xxhash.h:1580: acc = XXH_rotl64(acc, 31);
.loc 1 1580 10 view .LVU5691
rol rdi, 31 # tmp135,
.LBE10361:
.LBE10364:
.LBE10367:
.LBE10403:
# xxhash.h:1894: h64 = XXH_rotl64(v1, 1) + XXH_rotl64(v2, 7) + XXH_rotl64(v3, 12) + XXH_rotl64(v4, 18);
.loc 1 1894 13 view .LVU5692
add rbx, r10 # h64, tmp128
.LBB10404:
.LBB10368:
.LBB10365:
.LBB10362:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 view .LVU5693
imul rdi, r11 # acc, tmp132
.LBE10362:
.LBE10365:
.LBE10368:
.LBE10404:
.LBB10405:
.LBB10382:
.LBB10379:
.LBB10376:
# xxhash.h:1580: acc = XXH_rotl64(acc, 31);
.loc 1 1580 10 view .LVU5694
rol rdx, 31 # acc,
.LBE10376:
.LBE10379:
.LBE10382:
.LBE10405:
.LBB10406:
.LBB10351:
# xxhash.h:1589: acc = acc * PRIME64_1 + PRIME64_4;
.loc 1 1589 10 view .LVU5695
movabs r10, -8796714831421723037 # tmp140,
.LBE10351:
.LBE10406:
.LBB10407:
.LBB10383:
.LBB10380:
.LBB10377:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 view .LVU5696
imul rdx, r11 # acc, tmp132
.LBE10377:
.LBE10380:
.LBE10383:
.LBE10407:
.LBB10408:
.LBB10398:
.LBB10395:
.LBB10392:
# xxhash.h:1580: acc = XXH_rotl64(acc, 31);
.loc 1 1580 10 view .LVU5697
rol rax, 31 # acc,
.LBE10392:
.LBE10395:
.LBE10398:
.LBE10408:
.LBB10409:
.LBB10352:
# xxhash.h:1588: acc ^= val;
.loc 1 1588 9 view .LVU5698
xor rbx, rsi # acc, acc
.LBE10352:
.LBE10409:
.LBB10410:
.LBB10399:
.LBB10396:
.LBB10393:
# xxhash.h:1581: acc *= PRIME64_1;
.loc 1 1581 9 view .LVU5699
imul rax, r11 # acc, tmp132
.LBE10393:
.LBE10396:
.LBE10399:
.LBE10410:
.LBB10411:
.LBB10353:
# xxhash.h:1589: acc = acc * PRIME64_1 + PRIME64_4;
.loc 1 1589 16 view .LVU5700
mov rsi, rbx # acc, acc
.LVL1151:
.loc 1 1589 16 view .LVU5701
imul rsi, r11 # acc, tmp132
.LVL1152:
.loc 1 1590 5 is_stmt 1 view .LVU5702
.loc 1 1590 5 is_stmt 0 view .LVU5703
.LBE10353:
.LBE10411:
.loc 1 1896 9 is_stmt 1 view .LVU5704
.LBB10412:
.LBI10357:
.loc 1 1585 16 view .LVU5705
.LBB10369:
.loc 1 1587 5 view .LVU5706
.LBB10366:
.LBI10359:
.loc 1 1577 16 view .LVU5707
.LBB10363:
.loc 1 1579 5 view .LVU5708
.loc 1 1580 5 view .LVU5709
.loc 1 1581 5 view .LVU5710
.loc 1 1582 5 view .LVU5711
.loc 1 1582 5 is_stmt 0 view .LVU5712
.LBE10363:
.LBE10366:
.loc 1 1588 5 is_stmt 1 view .LVU5713
.loc 1 1589 5 view .LVU5714
.LBE10369:
.LBE10412:
.LBB10413:
.LBB10354:
# xxhash.h:1589: acc = acc * PRIME64_1 + PRIME64_4;
.loc 1 1589 10 is_stmt 0 view .LVU5715
lea rbx, [rsi+r10] # acc,
.LVL1153:
.loc 1 1589 10 view .LVU5716
.LBE10354:
.LBE10413:
.LBB10414:
.LBB10370:
# xxhash.h:1588: acc ^= val;
.loc 1 1588 9 view .LVU5717
xor rbx, rdi # acc, acc
.LVL1154:
# xxhash.h:1589: acc = acc * PRIME64_1 + PRIME64_4;
.loc 1 1589 16 view .LVU5718
imul rbx, r11 # _37, tmp132
.LVL1155:
.loc 1 1590 5 is_stmt 1 view .LVU5719
.loc 1 1590 5 is_stmt 0 view .LVU5720
.LBE10370:
.LBE10414:
.loc 1 1897 9 is_stmt 1 view .LVU5721
.LBB10415:
.LBI10372:
.loc 1 1585 16 view .LVU5722
.LBB10384:
.loc 1 1587 5 view .LVU5723
.LBB10381:
.LBI10374:
.loc 1 1577 16 view .LVU5724
.LBB10378:
.loc 1 1579 5 view .LVU5725
.loc 1 1580 5 view .LVU5726
.loc 1 1581 5 view .LVU5727
.loc 1 1582 5 view .LVU5728
.loc 1 1582 5 is_stmt 0 view .LVU5729
.LBE10378:
.LBE10381:
.loc 1 1588 5 is_stmt 1 view .LVU5730
.loc 1 1589 5 view .LVU5731
.LBE10384:
.LBE10415:
.LBB10416:
.LBB10371:
# xxhash.h:1589: acc = acc * PRIME64_1 + PRIME64_4;
.loc 1 1589 10 is_stmt 0 view .LVU5732
add rbx, r10 # acc, tmp140
.LVL1156:
.loc 1 1589 10 view .LVU5733
.LBE10371:
.LBE10416:
.LBB10417:
.LBB10385:
# xxhash.h:1588: acc ^= val;
.loc 1 1588 9 view .LVU5734
xor rdx, rbx # acc, acc
# xxhash.h:1589: acc = acc * PRIME64_1 + PRIME64_4;
.loc 1 1589 16 view .LVU5735
imul rdx, r11 # _31, tmp132
.LVL1157:
.loc 1 1590 5 is_stmt 1 view .LVU5736
.loc 1 1590 5 is_stmt 0 view .LVU5737
.LBE10385:
.LBE10417:
.loc 1 1898 9 is_stmt 1 view .LVU5738
.LBB10418:
.LBI10388:
.loc 1 1585 16 view .LVU5739
.LBB10400:
.loc 1 1587 5 view .LVU5740
.LBB10397:
.LBI10390:
.loc 1 1577 16 view .LVU5741
.LBB10394:
.loc 1 1579 5 view .LVU5742
.loc 1 1580 5 view .LVU5743
.loc 1 1581 5 view .LVU5744
.loc 1 1582 5 view .LVU5745
.loc 1 1582 5 is_stmt 0 view .LVU5746
.LBE10394:
.LBE10397:
.loc 1 1588 5 is_stmt 1 view .LVU5747
.loc 1 1589 5 view .LVU5748
.LBE10400:
.LBE10418:
.LBB10419:
.LBB10386:
# xxhash.h:1589: acc = acc * PRIME64_1 + PRIME64_4;
.loc 1 1589 10 is_stmt 0 view .LVU5749
lea r9, [rdx+r10] # acc,
.LVL1158:
.loc 1 1589 10 view .LVU5750
.LBE10386:
.LBE10419:
.LBB10420:
.LBB10401:
# xxhash.h:1588: acc ^= val;
.loc 1 1588 9 view .LVU5751
xor rax, r9 # acc, acc
# xxhash.h:1589: acc = acc * PRIME64_1 + PRIME64_4;
.loc 1 1589 16 view .LVU5752
imul rax, r11 # _19, tmp132
# xxhash.h:1589: acc = acc * PRIME64_1 + PRIME64_4;
.loc 1 1589 10 view .LVU5753
add rax, r10 # h64, tmp140
.LVL1159:
.loc 1 1590 5 is_stmt 1 view .LVU5754
.L286:
.loc 1 1590 5 is_stmt 0 view .LVU5755
.LBE10401:
.LBE10420:
.LBE10334:
.loc 1 1903 5 is_stmt 1 view .LVU5756
.loc 1 1905 5 view .LVU5757
# xxhash.h:1905: return XXH64_finalize(h64, (const xxh_u8*)state->mem64, (size_t)state->total_len, XXH_aligned);
.loc 1 1905 47 is_stmt 0 view .LVU5758
lea rdx, 40[rcx] # tmp161,
# xxhash.h:1905: return XXH64_finalize(h64, (const xxh_u8*)state->mem64, (size_t)state->total_len, XXH_aligned);
.loc 1 1905 12 view .LVU5759
xor r9d, r9d #
# xxhash.h:1903: h64 += (xxh_u64) state->total_len;
.loc 1 1903 9 view .LVU5760
lea rcx, [r8+rax] # h64,
.LVL1160:
# xxhash.h:1906: }
.loc 1 1906 1 view .LVU5761
pop rbx #
.cfi_restore 3
.cfi_def_cfa_offset 24
pop rsi #
.cfi_restore 4
.cfi_def_cfa_offset 16
pop rdi #
.cfi_restore 5
.cfi_def_cfa_offset 8
# xxhash.h:1905: return XXH64_finalize(h64, (const xxh_u8*)state->mem64, (size_t)state->total_len, XXH_aligned);
.loc 1 1905 12 view .LVU5762
jmp XXH64_finalize #
.LVL1161:
.loc 1 1905 12 view .LVU5763
.cfi_endproc
.LFE51:
.seh_endproc
.p2align 4
.globl XXH64_canonicalFromHash
.def XXH64_canonicalFromHash; .scl 2; .type 32; .endef
.seh_proc XXH64_canonicalFromHash
XXH64_canonicalFromHash:
.LVL1162:
.LFB52:
.loc 1 1912 1 is_stmt 1 view -0
.cfi_startproc
.loc 1 1912 1 is_stmt 0 view .LVU5765
.seh_endprologue
.LBB10421:
.loc 1 1913 5 is_stmt 1 view .LVU5766
.LBE10421:
.loc 1 1913 73 view .LVU5767
.loc 1 1914 5 view .LVU5768
.loc 1 1914 32 view .LVU5769
# xxhash.h:1914: if (XXH_CPU_LITTLE_ENDIAN) hash = XXH_swap64(hash);
.loc 1 1914 39 is_stmt 0 view .LVU5770
bswap rdx # _1
.LVL1163:
.loc 1 1915 5 is_stmt 1 view .LVU5771
mov QWORD PTR [rcx], rdx # MEM[(char * {ref-all})dst_3(D)], _1
# xxhash.h:1916: }
.loc 1 1916 1 is_stmt 0 view .LVU5772
ret
.cfi_endproc
.LFE52:
.seh_endproc
.p2align 4
.globl XXH64_hashFromCanonical
.def XXH64_hashFromCanonical; .scl 2; .type 32; .endef
.seh_proc XXH64_hashFromCanonical
XXH64_hashFromCanonical:
.LVL1164:
.LFB53:
.loc 1 1919 1 is_stmt 1 view -0
.cfi_startproc
.loc 1 1919 1 is_stmt 0 view .LVU5774
.seh_endprologue
.loc 1 1920 5 is_stmt 1 view .LVU5775
.LVL1165:
.LBB10422:
.LBI10422:
.loc 1 1553 16 view .LVU5776
.LBB10423:
.loc 1 1555 5 view .LVU5777
.loc 1 1555 5 is_stmt 0 view .LVU5778
.LBE10423:
.LBE10422:
.loc 1 1492 5 is_stmt 1 view .LVU5779
.loc 1 1493 5 view .LVU5780
.loc 1 1494 5 view .LVU5781
.LBB10425:
.LBB10424:
# xxhash.h:1555: return XXH_CPU_LITTLE_ENDIAN ? XXH_swap64(XXH_read64(ptr)) : XXH_read64(ptr);
.loc 1 1555 64 is_stmt 0 view .LVU5782
mov rax, QWORD PTR [rcx] # MEM[(char * {ref-all})src_2(D)], MEM[(char * {ref-all})src_2(D)]
bswap rax # <retval>
.LVL1166:
.loc 1 1555 64 view .LVU5783
.LBE10424:
.LBE10425:
# xxhash.h:1921: }
.loc 1 1921 1 view .LVU5784
ret
.cfi_endproc
.LFE53:
.seh_endproc
.p2align 4
.globl XXH3_64bits
.def XXH3_64bits; .scl 2; .type 32; .endef
.seh_proc XXH3_64bits
XXH3_64bits:
.LVL1167:
.LFB5343:
.loc 2 1431 1 is_stmt 1 view -0
.cfi_startproc
.loc 2 1431 1 is_stmt 0 view .LVU5786
push rsi #
.seh_pushreg rsi
.cfi_def_cfa_offset 16
.cfi_offset 4, -16
push rbx #
.seh_pushreg rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
.seh_endprologue
.loc 2 1432 5 is_stmt 1 view .LVU5787
# xxh3.h:1431: {
.loc 2 1431 1 is_stmt 0 view .LVU5788
mov r10, rdx # len, tmp355
# xxh3.h:1432: if (len <= 16) return XXH3_len_0to16_64b((const xxh_u8*)input, len, kSecret, 0);
.loc 2 1432 8 view .LVU5789
cmp rdx, 16 # len,
jbe .L303 #,
.loc 2 1433 5 is_stmt 1 view .LVU5790
# xxh3.h:1433: if (len <= 128) return XXH3_len_17to128_64b((const xxh_u8*)input, len, kSecret, sizeof(kSecret), 0);
.loc 2 1433 8 is_stmt 0 view .LVU5791
cmp rdx, 128 # len,
jbe .L304 #,
.loc 2 1434 5 is_stmt 1 view .LVU5792
# xxh3.h:1434: if (len <= XXH3_MIDSIZE_MAX) return XXH3_len_129to240_64b((const xxh_u8*)input, len, kSecret, sizeof(kSecret), 0);
.loc 2 1434 8 is_stmt 0 view .LVU5793
cmp rdx, 240 # len,
ja .L298 #,
.loc 2 1434 34 is_stmt 1 discriminator 1 view .LVU5794
# xxh3.h:1434: if (len <= XXH3_MIDSIZE_MAX) return XXH3_len_129to240_64b((const xxh_u8*)input, len, kSecret, sizeof(kSecret), 0);
.loc 2 1434 41 is_stmt 0 discriminator 1 view .LVU5795
xor r9d, r9d #
lea r8, kSecret[rip] #,
# xxh3.h:1436: }
.loc 2 1436 1 discriminator 1 view .LVU5796
pop rbx #
.cfi_remember_state
.cfi_restore 3
.cfi_def_cfa_offset 16
pop rsi #
.cfi_restore 4
.cfi_def_cfa_offset 8
# xxh3.h:1434: if (len <= XXH3_MIDSIZE_MAX) return XXH3_len_129to240_64b((const xxh_u8*)input, len, kSecret, sizeof(kSecret), 0);
.loc 2 1434 41 discriminator 1 view .LVU5797
jmp XXH3_len_129to240_64b.isra.0 #
.LVL1168:
.p2align 4,,10
.p2align 3
.L304:
.cfi_restore_state
.loc 2 1433 21 is_stmt 1 view .LVU5798
.LBB10426:
.LBI10426:
.loc 2 807 1 view .LVU5799
.LBE10426:
.loc 2 811 5 view .LVU5800
.loc 2 811 53 view .LVU5801
.loc 2 812 5 view .LVU5802
.LBB10619:
.LBB10427:
.loc 2 814 9 view .LVU5803
# xxh3.h:814: { xxh_u64 acc = len * PRIME64_1;
.loc 2 814 17 is_stmt 0 view .LVU5804
movabs rax, -7046029288634856825 # tmp275,
imul rax, rdx # tmp275, len
mov r11, rax # acc, tmp275
.LVL1169:
.loc 2 815 9 is_stmt 1 view .LVU5805
# xxh3.h:815: if (len > 32) {
.loc 2 815 12 is_stmt 0 view .LVU5806
cmp rdx, 32 # len,
ja .L305 #,
.LVL1170:
.L295:
.loc 2 827 9 is_stmt 1 view .LVU5807
.LBB10428:
.LBI10428:
.loc 2 773 26 view .LVU5808
.LBB10429:
.loc 2 796 9 view .LVU5809
.loc 2 796 9 is_stmt 0 view .LVU5810
.LBE10429:
.LBE10428:
.LBE10427:
.LBE10619:
.loc 1 1550 5 is_stmt 1 view .LVU5811
.loc 1 1492 5 view .LVU5812
.loc 1 1493 5 view .LVU5813
.loc 1 1494 5 view .LVU5814
.LBB10620:
.LBB10594:
.LBB10449:
.LBB10444:
.loc 2 797 9 view .LVU5815
.loc 2 797 9 is_stmt 0 view .LVU5816
.LBE10444:
.LBE10449:
.LBE10594:
.LBE10620:
.loc 1 1550 5 is_stmt 1 view .LVU5817
.loc 1 1492 5 view .LVU5818
.loc 1 1493 5 view .LVU5819
.loc 1 1494 5 view .LVU5820
.LBB10621:
.LBB10595:
.LBB10450:
.LBB10445:
.loc 2 798 9 view .LVU5821
.loc 2 798 9 is_stmt 0 view .LVU5822
.LBE10445:
.LBE10450:
.LBE10595:
.LBE10621:
.loc 1 1550 5 is_stmt 1 view .LVU5823
.loc 1 1492 5 view .LVU5824
.loc 1 1493 5 view .LVU5825
.loc 1 1494 5 view .LVU5826
.loc 1 1550 5 view .LVU5827
.loc 1 1492 5 view .LVU5828
.loc 1 1493 5 view .LVU5829
.loc 1 1494 5 view .LVU5830
.LBB10622:
.LBB10596:
.LBB10451:
.LBB10446:
.LBB10430:
.LBI10430:
.loc 2 616 1 view .LVU5831
.LBB10431:
.loc 2 618 5 view .LVU5832
.LBB10432:
.LBI10432:
.loc 2 507 1 view .LVU5833
.LBB10433:
.loc 2 528 5 view .LVU5834
.LBE10433:
.LBE10432:
.LBE10431:
.LBE10430:
# xxh3.h:798: return XXH3_mul128_fold64(
.loc 2 798 16 is_stmt 0 view .LVU5835
movabs r8, -4734510112055689544 # tmp318,
xor r8, QWORD PTR [rcx] # tmp317, MEM[(char * {ref-all})input_4(D)]
.LVL1171:
.loc 2 798 16 view .LVU5836
movabs rax, 2066345149520216444 # tmp320,
xor rax, QWORD PTR 8[rcx] # tmp320, MEM[(char * {ref-all})input_4(D) + 8B]
.LVL1172:
.LBB10441:
.LBB10438:
.LBB10436:
.LBB10434:
# xxh3.h:528: __uint128_t product = (__uint128_t)lhs * (__uint128_t)rhs;
.loc 2 528 17 view .LVU5837
mul r8 # tmp317
.LVL1173:
.loc 2 528 17 view .LVU5838
.LBE10434:
.LBE10436:
.LBE10438:
.LBE10441:
.LBE10446:
.LBE10451:
# xxh3.h:828: acc += XXH3_mix16B(input+len-16, secret+16, seed);
.loc 2 828 16 view .LVU5839
lea rcx, -16[rcx+r10] # _91,
.LVL1174:
.LBB10452:
.LBB10453:
# xxh3.h:798: return XXH3_mul128_fold64(
.loc 2 798 16 view .LVU5840
mov rbx, QWORD PTR 8[rcx] # tmp325, MEM[(char * {ref-all})_91 + 8B]
.LBE10453:
.LBE10452:
.LBB10467:
.LBB10447:
.LBB10442:
.LBB10439:
.LBB10437:
.LBB10435:
# xxh3.h:528: __uint128_t product = (__uint128_t)lhs * (__uint128_t)rhs;
.loc 2 528 17 view .LVU5841
mov r9, rdx # product, product
mov r8, rax # product, product
.LVL1175:
.loc 2 529 5 is_stmt 1 view .LVU5842
.loc 2 530 5 view .LVU5843
.loc 2 530 5 is_stmt 0 view .LVU5844
.LBE10435:
.LBE10437:
.loc 2 619 5 is_stmt 1 view .LVU5845
.loc 2 619 5 is_stmt 0 view .LVU5846
.LBE10439:
.LBE10442:
.LBE10447:
.LBE10467:
.loc 2 828 9 is_stmt 1 view .LVU5847
.LBB10468:
.LBI10452:
.loc 2 773 26 view .LVU5848
.LBB10462:
.loc 2 796 9 view .LVU5849
.loc 2 796 9 is_stmt 0 view .LVU5850
.LBE10462:
.LBE10468:
.LBE10596:
.LBE10622:
.loc 1 1550 5 is_stmt 1 view .LVU5851
.loc 1 1492 5 view .LVU5852
.loc 1 1493 5 view .LVU5853
.loc 1 1494 5 view .LVU5854
.LBB10623:
.LBB10597:
.LBB10469:
.LBB10463:
.loc 2 797 9 view .LVU5855
.loc 2 797 9 is_stmt 0 view .LVU5856
.LBE10463:
.LBE10469:
.LBE10597:
.LBE10623:
.loc 1 1550 5 is_stmt 1 view .LVU5857
.loc 1 1492 5 view .LVU5858
.loc 1 1493 5 view .LVU5859
.loc 1 1494 5 view .LVU5860
.LBB10624:
.LBB10598:
.LBB10470:
.LBB10464:
.loc 2 798 9 view .LVU5861
.LBE10464:
.LBE10470:
.LBE10598:
.LBE10624:
.loc 1 1550 5 view .LVU5862
.loc 1 1492 5 view .LVU5863
.loc 1 1493 5 view .LVU5864
.loc 1 1494 5 view .LVU5865
.loc 1 1550 5 view .LVU5866
.loc 1 1492 5 view .LVU5867
.loc 1 1493 5 view .LVU5868
.loc 1 1494 5 view .LVU5869
.LBB10625:
.LBB10599:
.LBB10471:
.LBB10465:
.LBB10454:
.LBI10454:
.loc 2 616 1 view .LVU5870
.LBB10455:
.loc 2 618 5 view .LVU5871
.LBB10456:
.LBI10456:
.loc 2 507 1 view .LVU5872
.LBB10457:
.loc 2 528 5 view .LVU5873
.LBE10457:
.LBE10456:
.LBE10455:
.LBE10454:
# xxh3.h:798: return XXH3_mul128_fold64(
.loc 2 798 16 is_stmt 0 view .LVU5874
movabs rdx, 2262974939099578482 # tmp325,
.LVL1176:
.loc 2 798 16 view .LVU5875
movabs rax, -2623469361688619810 # tmp323,
.LVL1177:
.loc 2 798 16 view .LVU5876
xor rbx, rdx # tmp325, tmp325
.LVL1178:
.loc 2 798 16 view .LVU5877
xor rax, QWORD PTR [rcx] # tmp323, MEM[(char * {ref-all})_91]
.LVL1179:
.loc 2 798 16 view .LVU5878
.LBE10465:
.LBE10471:
.LBB10472:
.LBB10448:
.LBB10443:
.LBB10440:
# xxh3.h:619: return product.low64 ^ product.high64;
.loc 2 619 26 view .LVU5879
xor r8, r9 # tmp329, tmp352
.LVL1180:
.loc 2 619 26 view .LVU5880
.LBE10440:
.LBE10443:
.LBE10448:
.LBE10472:
.LBB10473:
.LBB10466:
.LBB10461:
.LBB10460:
.LBB10459:
.LBB10458:
# xxh3.h:528: __uint128_t product = (__uint128_t)lhs * (__uint128_t)rhs;
.loc 2 528 17 view .LVU5881
mul rbx # tmp324
.LVL1181:
.loc 2 529 5 is_stmt 1 view .LVU5882
.loc 2 530 5 view .LVU5883
.loc 2 530 5 is_stmt 0 view .LVU5884
.LBE10458:
.LBE10459:
.loc 2 619 5 is_stmt 1 view .LVU5885
# xxh3.h:619: return product.low64 ^ product.high64;
.loc 2 619 26 is_stmt 0 view .LVU5886
xor rdx, rax # tmp327, product
.LVL1182:
.loc 2 619 26 view .LVU5887
.LBE10460:
.LBE10461:
.LBE10466:
.LBE10473:
# xxh3.h:828: acc += XXH3_mix16B(input+len-16, secret+16, seed);
.loc 2 828 13 view .LVU5888
lea rax, [rdx+r8] # tmp330,
.LVL1183:
.loc 2 828 13 view .LVU5889
add rax, r11 # acc, acc
.LVL1184:
.L302:
.loc 2 830 9 is_stmt 1 view .LVU5890
.LBB10474:
.LBI10474:
.loc 2 634 21 view .LVU5891
.LBB10475:
.loc 2 636 5 view .LVU5892
.LBB10476:
.LBI10476:
.loc 2 623 26 view .LVU5893
.LBB10477:
.loc 2 625 5 view .LVU5894
.loc 2 626 5 view .LVU5895
.loc 2 626 5 is_stmt 0 view .LVU5896
.LBE10477:
.LBE10476:
.loc 2 637 5 is_stmt 1 view .LVU5897
.LBB10479:
.LBB10478:
# xxh3.h:626: return v64 ^ (v64 >> shift);
.loc 2 626 23 is_stmt 0 view .LVU5898
mov rdx, rax # tmp331, acc
shr rdx, 37 # tmp331,
# xxh3.h:626: return v64 ^ (v64 >> shift);
.loc 2 626 16 view .LVU5899
xor rax, rdx # tmp332, tmp331
.LVL1185:
.loc 2 626 16 view .LVU5900
.LBE10478:
.LBE10479:
# xxh3.h:637: h64 *= 0x165667919E3779F9ULL;
.loc 2 637 9 view .LVU5901
movabs rdx, 1609587791953885689 # tmp333,
imul rdx, rax # h64, tmp332
.LVL1186:
.loc 2 638 5 is_stmt 1 view .LVU5902
.LBB10480:
.LBI10480:
.loc 2 623 26 view .LVU5903
.LBB10481:
.loc 2 625 5 view .LVU5904
.loc 2 626 5 view .LVU5905
# xxh3.h:626: return v64 ^ (v64 >> shift);
.loc 2 626 23 is_stmt 0 view .LVU5906
mov rax, rdx # tmp334, h64
shr rax, 32 # tmp334,
# xxh3.h:626: return v64 ^ (v64 >> shift);
.loc 2 626 16 view .LVU5907
xor rax, rdx # <retval>, h64
.LVL1187:
.loc 2 626 16 view .LVU5908
.LBE10481:
.LBE10480:
.loc 2 639 5 is_stmt 1 view .LVU5909
.L301:
.loc 2 639 5 is_stmt 0 view .LVU5910
.LBE10475:
.LBE10474:
.LBE10599:
.LBE10625:
# xxh3.h:1436: }
.loc 2 1436 1 view .LVU5911
pop rbx #
.cfi_remember_state
.cfi_restore 3
.cfi_def_cfa_offset 16
pop rsi #
.cfi_restore 4
.cfi_def_cfa_offset 8
ret
.LVL1188:
.p2align 4,,10
.p2align 3
.L303:
.cfi_restore_state
.loc 2 1432 20 is_stmt 1 view .LVU5912
.LBB10626:
.LBI10626:
.loc 2 737 1 view .LVU5913
.LBB10627:
.loc 2 739 5 view .LVU5914
.loc 2 740 9 view .LVU5915
# xxh3.h:740: { if (XXH_likely(len > 8)) return XXH3_len_9to16_64b(input, len, secret, seed);
.loc 2 740 12 is_stmt 0 view .LVU5916
cmp rdx, 8 # len,
jbe .L291 #,
.loc 2 740 35 is_stmt 1 view .LVU5917
.LVL1189:
.LBB10628:
.LBI10628:
.loc 2 720 1 view .LVU5918
.LBE10628:
.LBE10627:
.LBE10626:
.loc 2 722 5 view .LVU5919
.loc 2 723 5 view .LVU5920
.loc 2 724 5 view .LVU5921
.LBB10687:
.LBB10675:
.LBB10650:
.LBB10629:
.loc 2 725 9 view .LVU5922
.loc 2 725 9 is_stmt 0 view .LVU5923
.LBE10629:
.LBE10650:
.LBE10675:
.LBE10687:
.loc 1 1550 5 is_stmt 1 view .LVU5924
.loc 1 1492 5 view .LVU5925
.loc 1 1493 5 view .LVU5926
.loc 1 1494 5 view .LVU5927
.loc 1 1550 5 view .LVU5928
.loc 1 1492 5 view .LVU5929
.loc 1 1493 5 view .LVU5930
.loc 1 1494 5 view .LVU5931
.LBB10688:
.LBB10676:
.LBB10651:
.LBB10646:
.loc 2 726 9 view .LVU5932
.loc 2 726 9 is_stmt 0 view .LVU5933
.LBE10646:
.LBE10651:
.LBE10676:
.LBE10688:
.loc 1 1550 5 is_stmt 1 view .LVU5934
.loc 1 1492 5 view .LVU5935
.loc 1 1493 5 view .LVU5936
.loc 1 1494 5 view .LVU5937
.loc 1 1550 5 view .LVU5938
.loc 1 1492 5 view .LVU5939
.loc 1 1493 5 view .LVU5940
.loc 1 1494 5 view .LVU5941
.LBB10689:
.LBB10677:
.LBB10652:
.LBB10647:
.loc 2 727 9 view .LVU5942
.loc 2 727 9 is_stmt 0 view .LVU5943
.LBE10647:
.LBE10652:
.LBE10677:
.LBE10689:
.loc 1 1550 5 is_stmt 1 view .LVU5944
.loc 1 1492 5 view .LVU5945
.loc 1 1493 5 view .LVU5946
.loc 1 1494 5 view .LVU5947
.LBB10690:
.LBB10678:
.LBB10653:
.LBB10648:
# xxh3.h:727: xxh_u64 const input_lo = XXH_readLE64(input) ^ bitflip1;
.loc 2 727 23 is_stmt 0 view .LVU5948
movabs rax, 7458650908927343033 # tmp237,
xor rax, QWORD PTR [rcx] # tmp237, MEM[(char * {ref-all})input_4(D)]
.LVL1190:
.loc 2 728 9 is_stmt 1 view .LVU5949
.loc 2 728 9 is_stmt 0 view .LVU5950
.LBE10648:
.LBE10653:
.LBE10678:
.LBE10690:
.loc 1 1550 5 is_stmt 1 view .LVU5951
.loc 1 1492 5 view .LVU5952
.loc 1 1493 5 view .LVU5953
.loc 1 1494 5 view .LVU5954
.LBB10691:
.LBB10679:
.LBB10654:
.LBB10649:
# xxh3.h:728: xxh_u64 const input_hi = XXH_readLE64(input + len - 8) ^ bitflip2;
.loc 2 728 23 is_stmt 0 view .LVU5955
movabs rdx, -5812251307325107654 # tmp238,
.LVL1191:
.loc 2 728 23 view .LVU5956
xor rdx, QWORD PTR -8[rcx+r10] # tmp238, MEM[(char * {ref-all})_12]
mov rcx, rdx # input_hi, tmp238
.LVL1192:
.loc 2 729 9 is_stmt 1 view .LVU5957
# xxh3.h:730: + XXH_swap64(input_lo) + input_hi
.loc 2 730 29 is_stmt 0 view .LVU5958
mov r8, rax # _14, input_lo
.LBB10630:
.LBB10631:
.LBB10632:
.LBB10633:
# xxh3.h:528: __uint128_t product = (__uint128_t)lhs * (__uint128_t)rhs;
.loc 2 528 17 view .LVU5959
mul rdx # input_hi
.LVL1193:
.loc 2 528 17 view .LVU5960
.LBE10633:
.LBE10632:
.LBE10631:
.LBE10630:
# xxh3.h:730: + XXH_swap64(input_lo) + input_hi
.loc 2 730 29 view .LVU5961
bswap r8 # _14
.LVL1194:
.LBB10637:
.LBI10630:
.loc 2 616 1 is_stmt 1 view .LVU5962
.LBB10636:
.loc 2 618 5 view .LVU5963
.LBB10635:
.LBI10632:
.loc 2 507 1 view .LVU5964
.LBB10634:
.loc 2 528 5 view .LVU5965
.loc 2 529 5 view .LVU5966
.loc 2 530 5 view .LVU5967
.loc 2 530 5 is_stmt 0 view .LVU5968
.LBE10634:
.LBE10635:
.loc 2 619 5 is_stmt 1 view .LVU5969
# xxh3.h:619: return product.low64 ^ product.high64;
.loc 2 619 26 is_stmt 0 view .LVU5970
xor rdx, rax # tmp240, product
.LVL1195:
.loc 2 619 26 view .LVU5971
.LBE10636:
.LBE10637:
# xxh3.h:729: xxh_u64 const acc = len
.loc 2 729 23 view .LVU5972
lea rax, [r10+rcx] # tmp241,
.LVL1196:
.loc 2 729 23 view .LVU5973
add rax, rdx # tmp242, tmp240
add rax, r8 # acc, _14
.LVL1197:
.loc 2 732 9 is_stmt 1 view .LVU5974
.LBB10638:
.LBI10638:
.loc 2 634 21 view .LVU5975
.LBB10639:
.loc 2 636 5 view .LVU5976
.LBB10640:
.LBI10640:
.loc 2 623 26 view .LVU5977
.LBB10641:
.loc 2 625 5 view .LVU5978
.loc 2 626 5 view .LVU5979
.loc 2 626 5 is_stmt 0 view .LVU5980
.LBE10641:
.LBE10640:
.loc 2 637 5 is_stmt 1 view .LVU5981
.LBB10643:
.LBB10642:
# xxh3.h:626: return v64 ^ (v64 >> shift);
.loc 2 626 23 is_stmt 0 view .LVU5982
mov r10, rax # tmp243, acc
.LVL1198:
.loc 2 626 23 view .LVU5983
shr r10, 37 # tmp243,
# xxh3.h:626: return v64 ^ (v64 >> shift);
.loc 2 626 16 view .LVU5984
xor rax, r10 # tmp244, tmp243
.LVL1199:
.loc 2 626 16 view .LVU5985
.LBE10642:
.LBE10643:
# xxh3.h:637: h64 *= 0x165667919E3779F9ULL;
.loc 2 637 9 view .LVU5986
movabs r10, 1609587791953885689 # tmp245,
imul r10, rax # h64, tmp244
.LVL1200:
.loc 2 638 5 is_stmt 1 view .LVU5987
.LBB10644:
.LBI10644:
.loc 2 623 26 view .LVU5988
.LBB10645:
.loc 2 625 5 view .LVU5989
.loc 2 626 5 view .LVU5990
# xxh3.h:626: return v64 ^ (v64 >> shift);
.loc 2 626 23 is_stmt 0 view .LVU5991
mov rax, r10 # tmp246, h64
shr rax, 32 # tmp246,
# xxh3.h:626: return v64 ^ (v64 >> shift);
.loc 2 626 16 view .LVU5992
xor rax, r10 # <retval>, h64
.LVL1201:
.loc 2 626 16 view .LVU5993
.LBE10645:
.LBE10644:
.loc 2 639 5 is_stmt 1 view .LVU5994
.loc 2 639 5 is_stmt 0 view .LVU5995
.LBE10639:
.LBE10638:
.LBE10649:
.LBE10654:
.LBE10679:
.LBE10691:
# xxh3.h:1436: }
.loc 2 1436 1 view .LVU5996
pop rbx #
.cfi_remember_state
.cfi_restore 3
.cfi_def_cfa_offset 16
pop rsi #
.cfi_restore 4
.cfi_def_cfa_offset 8
ret
.LVL1202:
.p2align 4,,10
.p2align 3
.L298:
.cfi_restore_state
.loc 2 1435 5 is_stmt 1 view .LVU5997
# xxh3.h:1436: }
.loc 2 1436 1 is_stmt 0 view .LVU5998
pop rbx #
.cfi_remember_state
.cfi_restore 3
.cfi_def_cfa_offset 16
pop rsi #
.cfi_restore 4
.cfi_def_cfa_offset 8
# xxh3.h:1435: return XXH3_hashLong_64b_defaultSecret((const xxh_u8*)input, len);
.loc 2 1435 12 view .LVU5999
jmp XXH3_hashLong_64b_defaultSecret #
.LVL1203:
.p2align 4,,10
.p2align 3
.L305:
.cfi_restore_state
.LBB10692:
.LBB10600:
.loc 2 816 13 is_stmt 1 view .LVU6000
# xxh3.h:816: if (len > 64) {
.loc 2 816 16 is_stmt 0 view .LVU6001
cmp rdx, 64 # len,
jbe .L296 #,
.loc 2 817 17 is_stmt 1 view .LVU6002
# xxh3.h:817: if (len > 96) {
.loc 2 817 20 is_stmt 0 view .LVU6003
cmp rdx, 96 # len,
ja .L306 #,
.LVL1204:
.L297:
.loc 2 821 17 is_stmt 1 view .LVU6004
.LBB10482:
.LBI10482:
.loc 2 773 26 view .LVU6005
.LBB10483:
.loc 2 796 9 view .LVU6006
.loc 2 796 9 is_stmt 0 view .LVU6007
.LBE10483:
.LBE10482:
.LBE10600:
.LBE10692:
.loc 1 1550 5 is_stmt 1 view .LVU6008
.loc 1 1492 5 view .LVU6009
.loc 1 1493 5 view .LVU6010
.loc 1 1494 5 view .LVU6011
.LBB10693:
.LBB10601:
.LBB10499:
.LBB10494:
.loc 2 797 9 view .LVU6012
.loc 2 797 9 is_stmt 0 view .LVU6013
.LBE10494:
.LBE10499:
.LBE10601:
.LBE10693:
.loc 1 1550 5 is_stmt 1 view .LVU6014
.loc 1 1492 5 view .LVU6015
.loc 1 1493 5 view .LVU6016
.loc 1 1494 5 view .LVU6017
.LBB10694:
.LBB10602:
.LBB10500:
.LBB10495:
.loc 2 798 9 view .LVU6018
.LBE10495:
.LBE10500:
.LBE10602:
.LBE10694:
.loc 1 1550 5 view .LVU6019
.loc 1 1492 5 view .LVU6020
.loc 1 1493 5 view .LVU6021
.loc 1 1494 5 view .LVU6022
.loc 1 1550 5 view .LVU6023
.loc 1 1492 5 view .LVU6024
.loc 1 1493 5 view .LVU6025
.loc 1 1494 5 view .LVU6026
.LBB10695:
.LBB10603:
.LBB10501:
.LBB10496:
.LBB10484:
.LBI10484:
.loc 2 616 1 view .LVU6027
.LBB10485:
.loc 2 618 5 view .LVU6028
.LBB10486:
.LBI10486:
.loc 2 507 1 view .LVU6029
.LBB10487:
.loc 2 528 5 view .LVU6030
.LBE10487:
.LBE10486:
.LBE10485:
.LBE10484:
# xxh3.h:798: return XXH3_mul128_fold64(
.loc 2 798 16 is_stmt 0 view .LVU6031
movabs r8, -3818837453329782724 # tmp290,
xor r8, QWORD PTR 32[rcx] # tmp289, MEM[(char * {ref-all})input_4(D) + 32B]
.LVL1205:
.loc 2 798 16 view .LVU6032
.LBE10496:
.LBE10501:
# xxh3.h:822: acc += XXH3_mix16B(input+len-48, secret+80, seed);
.loc 2 822 24 view .LVU6033
lea rbx, -48[rcx+r10] # _73,
.LBB10502:
.LBB10497:
# xxh3.h:798: return XXH3_mul128_fold64(
.loc 2 798 16 view .LVU6034
movabs rax, -6688317018830679928 # tmp292,
xor rax, QWORD PTR 40[rcx] # tmp292, MEM[(char * {ref-all})input_4(D) + 40B]
.LVL1206:
.LBB10492:
.LBB10490:
.LBB10489:
.LBB10488:
# xxh3.h:528: __uint128_t product = (__uint128_t)lhs * (__uint128_t)rhs;
.loc 2 528 17 view .LVU6035
mul r8 # tmp289
.LVL1207:
.loc 2 528 17 view .LVU6036
mov r8, rax # product, product
.LVL1208:
.loc 2 528 17 view .LVU6037
mov r9, rdx # product, product
.LVL1209:
.loc 2 529 5 is_stmt 1 view .LVU6038
.loc 2 530 5 view .LVU6039
.loc 2 530 5 is_stmt 0 view .LVU6040
.LBE10488:
.LBE10489:
.loc 2 619 5 is_stmt 1 view .LVU6041
.loc 2 619 5 is_stmt 0 view .LVU6042
.LBE10490:
.LBE10492:
.LBE10497:
.LBE10502:
.loc 2 822 17 is_stmt 1 view .LVU6043
.LBB10503:
.LBI10503:
.loc 2 773 26 view .LVU6044
.LBB10504:
.loc 2 796 9 view .LVU6045
.loc 2 796 9 is_stmt 0 view .LVU6046
.LBE10504:
.LBE10503:
.LBE10603:
.LBE10695:
.loc 1 1550 5 is_stmt 1 view .LVU6047
.loc 1 1492 5 view .LVU6048
.loc 1 1493 5 view .LVU6049
.loc 1 1494 5 view .LVU6050
.LBB10696:
.LBB10604:
.LBB10517:
.LBB10513:
.loc 2 797 9 view .LVU6051
.loc 2 797 9 is_stmt 0 view .LVU6052
.LBE10513:
.LBE10517:
.LBE10604:
.LBE10696:
.loc 1 1550 5 is_stmt 1 view .LVU6053
.loc 1 1492 5 view .LVU6054
.loc 1 1493 5 view .LVU6055
.loc 1 1494 5 view .LVU6056
.LBB10697:
.LBB10605:
.LBB10518:
.LBB10514:
.loc 2 798 9 view .LVU6057
.LBE10514:
.LBE10518:
.LBE10605:
.LBE10697:
.loc 1 1550 5 view .LVU6058
.loc 1 1492 5 view .LVU6059
.loc 1 1493 5 view .LVU6060
.loc 1 1494 5 view .LVU6061
.loc 1 1550 5 view .LVU6062
.loc 1 1492 5 view .LVU6063
.loc 1 1493 5 view .LVU6064
.loc 1 1494 5 view .LVU6065
.LBB10698:
.LBB10606:
.LBB10519:
.LBB10515:
.LBB10505:
.LBI10505:
.loc 2 616 1 view .LVU6066
.LBB10506:
.loc 2 618 5 view .LVU6067
.LBB10507:
.LBI10507:
.loc 2 507 1 view .LVU6068
.LBB10508:
.loc 2 528 5 view .LVU6069
.LBE10508:
.LBE10507:
.LBE10506:
.LBE10505:
# xxh3.h:798: return XXH3_mul128_fold64(
.loc 2 798 16 is_stmt 0 view .LVU6070
movabs rax, 5690594596133299313 # tmp295,
.LVL1210:
.loc 2 798 16 view .LVU6071
xor rax, QWORD PTR [rbx] # tmp295, MEM[(char * {ref-all})_73]
.LVL1211:
.loc 2 798 16 view .LVU6072
movabs rdx, -2833645246901970632 # tmp297,
.LVL1212:
.loc 2 798 16 view .LVU6073
xor rdx, QWORD PTR 8[rbx] # tmp297, MEM[(char * {ref-all})_73 + 8B]
.LVL1213:
.loc 2 798 16 view .LVU6074
.LBE10515:
.LBE10519:
.LBB10520:
.LBB10498:
.LBB10493:
.LBB10491:
# xxh3.h:619: return product.low64 ^ product.high64;
.loc 2 619 26 view .LVU6075
xor r8, r9 # tmp301, tmp344
.LVL1214:
.loc 2 619 26 view .LVU6076
.LBE10491:
.LBE10493:
.LBE10498:
.LBE10520:
.LBB10521:
.LBB10516:
.LBB10512:
.LBB10511:
.LBB10510:
.LBB10509:
# xxh3.h:528: __uint128_t product = (__uint128_t)lhs * (__uint128_t)rhs;
.loc 2 528 17 view .LVU6077
mul rdx # tmp296
.LVL1215:
.loc 2 529 5 is_stmt 1 view .LVU6078
.loc 2 530 5 view .LVU6079
.loc 2 530 5 is_stmt 0 view .LVU6080
.LBE10509:
.LBE10510:
.loc 2 619 5 is_stmt 1 view .LVU6081
# xxh3.h:619: return product.low64 ^ product.high64;
.loc 2 619 26 is_stmt 0 view .LVU6082
xor rax, rdx # tmp299, tmp342
.LVL1216:
.loc 2 619 26 view .LVU6083
.LBE10511:
.LBE10512:
.LBE10516:
.LBE10521:
# xxh3.h:822: acc += XXH3_mix16B(input+len-48, secret+80, seed);
.loc 2 822 21 view .LVU6084
add rax, r8 # tmp302, tmp301
add r11, rax # acc, tmp302
.LVL1217:
.L296:
.loc 2 824 13 is_stmt 1 view .LVU6085
.LBB10522:
.LBI10522:
.loc 2 773 26 view .LVU6086
.LBB10523:
.loc 2 796 9 view .LVU6087
.loc 2 796 9 is_stmt 0 view .LVU6088
.LBE10523:
.LBE10522:
.LBE10606:
.LBE10698:
.loc 1 1550 5 is_stmt 1 view .LVU6089
.loc 1 1492 5 view .LVU6090
.loc 1 1493 5 view .LVU6091
.loc 1 1494 5 view .LVU6092
.LBB10699:
.LBB10607:
.LBB10539:
.LBB10534:
.loc 2 797 9 view .LVU6093
.loc 2 797 9 is_stmt 0 view .LVU6094
.LBE10534:
.LBE10539:
.LBE10607:
.LBE10699:
.loc 1 1550 5 is_stmt 1 view .LVU6095
.loc 1 1492 5 view .LVU6096
.loc 1 1493 5 view .LVU6097
.loc 1 1494 5 view .LVU6098
.LBB10700:
.LBB10608:
.LBB10540:
.LBB10535:
.loc 2 798 9 view .LVU6099
.LBE10535:
.LBE10540:
.LBE10608:
.LBE10700:
.loc 1 1550 5 view .LVU6100
.loc 1 1492 5 view .LVU6101
.loc 1 1493 5 view .LVU6102
.loc 1 1494 5 view .LVU6103
.loc 1 1550 5 view .LVU6104
.loc 1 1492 5 view .LVU6105
.loc 1 1493 5 view .LVU6106
.loc 1 1494 5 view .LVU6107
.LBB10701:
.LBB10609:
.LBB10541:
.LBB10536:
.LBB10524:
.LBI10524:
.loc 2 616 1 view .LVU6108
.LBB10525:
.loc 2 618 5 view .LVU6109
.LBB10526:
.LBI10526:
.loc 2 507 1 view .LVU6110
.LBB10527:
.loc 2 528 5 view .LVU6111
.LBE10527:
.LBE10526:
.LBE10525:
.LBE10524:
# xxh3.h:798: return XXH3_mul128_fold64(
.loc 2 798 16 is_stmt 0 view .LVU6112
movabs r8, 8711581037947681227 # tmp304,
xor r8, QWORD PTR 16[rcx] # tmp303, MEM[(char * {ref-all})input_4(D) + 16B]
.LVL1218:
.loc 2 798 16 view .LVU6113
.LBE10536:
.LBE10541:
# xxh3.h:825: acc += XXH3_mix16B(input+len-32, secret+48, seed);
.loc 2 825 20 view .LVU6114
lea rbx, -32[rcx+r10] # _82,
.LBB10542:
.LBB10537:
# xxh3.h:798: return XXH3_mul128_fold64(
.loc 2 798 16 view .LVU6115
movabs rax, 2410270004345854594 # tmp306,
xor rax, QWORD PTR 24[rcx] # tmp306, MEM[(char * {ref-all})input_4(D) + 24B]
.LVL1219:
.LBB10532:
.LBB10530:
.LBB10529:
.LBB10528:
# xxh3.h:528: __uint128_t product = (__uint128_t)lhs * (__uint128_t)rhs;
.loc 2 528 17 view .LVU6116
mul r8 # tmp303
.LVL1220:
.loc 2 528 17 view .LVU6117
mov r8, rax # product, product
.LVL1221:
.loc 2 528 17 view .LVU6118
mov r9, rdx # product, product
.LVL1222:
.loc 2 529 5 is_stmt 1 view .LVU6119
.loc 2 530 5 view .LVU6120
.loc 2 530 5 is_stmt 0 view .LVU6121
.LBE10528:
.LBE10529:
.loc 2 619 5 is_stmt 1 view .LVU6122
.loc 2 619 5 is_stmt 0 view .LVU6123
.LBE10530:
.LBE10532:
.LBE10537:
.LBE10542:
.loc 2 825 13 is_stmt 1 view .LVU6124
.LBB10543:
.LBI10543:
.loc 2 773 26 view .LVU6125
.LBB10544:
.loc 2 796 9 view .LVU6126
.loc 2 796 9 is_stmt 0 view .LVU6127
.LBE10544:
.LBE10543:
.LBE10609:
.LBE10701:
.loc 1 1550 5 is_stmt 1 view .LVU6128
.loc 1 1492 5 view .LVU6129
.loc 1 1493 5 view .LVU6130
.loc 1 1494 5 view .LVU6131
.LBB10702:
.LBB10610:
.LBB10557:
.LBB10553:
.loc 2 797 9 view .LVU6132
.loc 2 797 9 is_stmt 0 view .LVU6133
.LBE10553:
.LBE10557:
.LBE10610:
.LBE10702:
.loc 1 1550 5 is_stmt 1 view .LVU6134
.loc 1 1492 5 view .LVU6135
.loc 1 1493 5 view .LVU6136
.loc 1 1494 5 view .LVU6137
.LBB10703:
.LBB10611:
.LBB10558:
.LBB10554:
.loc 2 798 9 view .LVU6138
.LBE10554:
.LBE10558:
.LBE10611:
.LBE10703:
.loc 1 1550 5 view .LVU6139
.loc 1 1492 5 view .LVU6140
.loc 1 1493 5 view .LVU6141
.loc 1 1494 5 view .LVU6142
.loc 1 1550 5 view .LVU6143
.loc 1 1492 5 view .LVU6144
.loc 1 1493 5 view .LVU6145
.loc 1 1494 5 view .LVU6146
.LBB10704:
.LBB10612:
.LBB10559:
.LBB10555:
.LBB10545:
.LBI10545:
.loc 2 616 1 view .LVU6147
.LBB10546:
.loc 2 618 5 view .LVU6148
.LBB10547:
.LBI10547:
.loc 2 507 1 view .LVU6149
.LBB10548:
.loc 2 528 5 view .LVU6150
.LBE10548:
.LBE10547:
.LBE10546:
.LBE10545:
# xxh3.h:798: return XXH3_mul128_fold64(
.loc 2 798 16 is_stmt 0 view .LVU6151
movabs rax, -8204357891075471176 # tmp309,
.LVL1223:
.loc 2 798 16 view .LVU6152
xor rax, QWORD PTR [rbx] # tmp309, MEM[(char * {ref-all})_82]
.LVL1224:
.loc 2 798 16 view .LVU6153
movabs rdx, 5487137525590930912 # tmp311,
.LVL1225:
.loc 2 798 16 view .LVU6154
xor rdx, QWORD PTR 8[rbx] # tmp311, MEM[(char * {ref-all})_82 + 8B]
.LVL1226:
.loc 2 798 16 view .LVU6155
.LBE10555:
.LBE10559:
.LBB10560:
.LBB10538:
.LBB10533:
.LBB10531:
# xxh3.h:619: return product.low64 ^ product.high64;
.loc 2 619 26 view .LVU6156
xor r8, r9 # tmp315, tmp348
.LVL1227:
.loc 2 619 26 view .LVU6157
.LBE10531:
.LBE10533:
.LBE10538:
.LBE10560:
.LBB10561:
.LBB10556:
.LBB10552:
.LBB10551:
.LBB10550:
.LBB10549:
# xxh3.h:528: __uint128_t product = (__uint128_t)lhs * (__uint128_t)rhs;
.loc 2 528 17 view .LVU6158
mul rdx # tmp310
.LVL1228:
.loc 2 529 5 is_stmt 1 view .LVU6159
.loc 2 530 5 view .LVU6160
.loc 2 530 5 is_stmt 0 view .LVU6161
.LBE10549:
.LBE10550:
.loc 2 619 5 is_stmt 1 view .LVU6162
# xxh3.h:619: return product.low64 ^ product.high64;
.loc 2 619 26 is_stmt 0 view .LVU6163
xor rax, rdx # tmp313, tmp346
.LVL1229:
.loc 2 619 26 view .LVU6164
.LBE10551:
.LBE10552:
.LBE10556:
.LBE10561:
# xxh3.h:825: acc += XXH3_mix16B(input+len-32, secret+48, seed);
.loc 2 825 17 view .LVU6165
add rax, r8 # tmp316, tmp315
add r11, rax # acc, tmp316
.LVL1230:
.loc 2 825 17 view .LVU6166
jmp .L295 #
.LVL1231:
.p2align 4,,10
.p2align 3
.L306:
.loc 2 818 21 is_stmt 1 view .LVU6167
.LBB10562:
.LBI10562:
.loc 2 773 26 view .LVU6168
.LBB10563:
.loc 2 796 9 view .LVU6169
.loc 2 796 9 is_stmt 0 view .LVU6170
.LBE10563:
.LBE10562:
.LBE10612:
.LBE10704:
.loc 1 1550 5 is_stmt 1 view .LVU6171
.loc 1 1492 5 view .LVU6172
.loc 1 1493 5 view .LVU6173
.loc 1 1494 5 view .LVU6174
.LBB10705:
.LBB10613:
.LBB10575:
.LBB10572:
.loc 2 797 9 view .LVU6175
.loc 2 797 9 is_stmt 0 view .LVU6176
.LBE10572:
.LBE10575:
.LBE10613:
.LBE10705:
.loc 1 1550 5 is_stmt 1 view .LVU6177
.loc 1 1492 5 view .LVU6178
.loc 1 1493 5 view .LVU6179
.loc 1 1494 5 view .LVU6180
.LBB10706:
.LBB10614:
.LBB10576:
.LBB10573:
.loc 2 798 9 view .LVU6181
.LBE10573:
.LBE10576:
.LBE10614:
.LBE10706:
.loc 1 1550 5 view .LVU6182
.loc 1 1492 5 view .LVU6183
.loc 1 1493 5 view .LVU6184
.loc 1 1494 5 view .LVU6185
.loc 1 1550 5 view .LVU6186
.loc 1 1492 5 view .LVU6187
.loc 1 1493 5 view .LVU6188
.loc 1 1494 5 view .LVU6189
.LBB10707:
.LBB10615:
.LBB10577:
.LBB10574:
.LBB10564:
.LBI10564:
.loc 2 616 1 view .LVU6190
.LBB10565:
.loc 2 618 5 view .LVU6191
.LBB10566:
.LBI10566:
.loc 2 507 1 view .LVU6192
.LBB10567:
.loc 2 528 5 view .LVU6193
.LBE10567:
.LBE10566:
.LBE10565:
.LBE10564:
# xxh3.h:798: return XXH3_mul128_fold64(
.loc 2 798 16 is_stmt 0 view .LVU6194
movabs rax, 4554437623014685352 # tmp277,
.LVL1232:
.loc 2 798 16 view .LVU6195
xor rax, QWORD PTR 48[rcx] # tmp276, MEM[(char * {ref-all})input_4(D) + 48B]
.LVL1233:
.loc 2 798 16 view .LVU6196
movabs rdx, 2111919702937427193 # tmp279,
.LVL1234:
.loc 2 798 16 view .LVU6197
xor rdx, QWORD PTR 56[rcx] # tmp278, MEM[(char * {ref-all})input_4(D) + 56B]
.LVL1235:
.LBB10571:
.LBB10570:
.LBB10569:
.LBB10568:
# xxh3.h:528: __uint128_t product = (__uint128_t)lhs * (__uint128_t)rhs;
.loc 2 528 17 view .LVU6198
mul rdx # tmp278
.LVL1236:
.loc 2 529 5 is_stmt 1 view .LVU6199
.loc 2 530 5 view .LVU6200
.loc 2 530 5 is_stmt 0 view .LVU6201
.LBE10568:
.LBE10569:
.loc 2 619 5 is_stmt 1 view .LVU6202
# xxh3.h:619: return product.low64 ^ product.high64;
.loc 2 619 26 is_stmt 0 view .LVU6203
xor rax, rdx # tmp281, tmp338
.LVL1237:
.loc 2 619 26 view .LVU6204
.LBE10570:
.LBE10571:
.LBE10574:
.LBE10577:
# xxh3.h:819: acc += XXH3_mix16B(input+len-64, secret+112, seed);
.loc 2 819 28 view .LVU6205
lea rdx, -64[rcx+r10] # _64,
.LVL1238:
# xxh3.h:818: acc += XXH3_mix16B(input+48, secret+96, seed);
.loc 2 818 25 view .LVU6206
lea r8, [rax+r11] # acc,
.LVL1239:
.loc 2 819 21 is_stmt 1 view .LVU6207
.LBB10578:
.LBI10578:
.loc 2 773 26 view .LVU6208
.LBB10579:
.loc 2 796 9 view .LVU6209
.loc 2 796 9 is_stmt 0 view .LVU6210
.LBE10579:
.LBE10578:
.LBE10615:
.LBE10707:
.loc 1 1550 5 is_stmt 1 view .LVU6211
.loc 1 1492 5 view .LVU6212
.loc 1 1493 5 view .LVU6213
.loc 1 1494 5 view .LVU6214
.LBB10708:
.LBB10616:
.LBB10591:
.LBB10588:
.loc 2 797 9 view .LVU6215
.loc 2 797 9 is_stmt 0 view .LVU6216
.LBE10588:
.LBE10591:
.LBE10616:
.LBE10708:
.loc 1 1550 5 is_stmt 1 view .LVU6217
.loc 1 1492 5 view .LVU6218
.loc 1 1493 5 view .LVU6219
.loc 1 1494 5 view .LVU6220
.LBB10709:
.LBB10617:
.LBB10592:
.LBB10589:
.loc 2 798 9 view .LVU6221
.LBE10589:
.LBE10592:
.LBE10617:
.LBE10709:
.loc 1 1550 5 view .LVU6222
.loc 1 1492 5 view .LVU6223
.loc 1 1493 5 view .LVU6224
.loc 1 1494 5 view .LVU6225
.loc 1 1550 5 view .LVU6226
.loc 1 1492 5 view .LVU6227
.loc 1 1493 5 view .LVU6228
.loc 1 1494 5 view .LVU6229
.LBB10710:
.LBB10618:
.LBB10593:
.LBB10590:
.LBB10580:
.LBI10580:
.loc 2 616 1 view .LVU6230
.LBB10581:
.loc 2 618 5 view .LVU6231
.LBB10582:
.LBI10582:
.loc 2 507 1 view .LVU6232
.LBB10583:
.loc 2 528 5 view .LVU6233
.LBE10583:
.LBE10582:
.LBE10581:
.LBE10580:
# xxh3.h:798: return XXH3_mul128_fold64(
.loc 2 798 16 is_stmt 0 view .LVU6234
movabs rax, 3556072174620004746 # tmp284,
xor rax, QWORD PTR [rdx] # tmp283, MEM[(char * {ref-all})_64]
.LVL1240:
.loc 2 798 16 view .LVU6235
movabs r11, 7238261902898274248 # tmp286,
xor r11, QWORD PTR 8[rdx] # tmp285, MEM[(char * {ref-all})_64 + 8B]
.LVL1241:
.LBB10587:
.LBB10586:
.LBB10585:
.LBB10584:
# xxh3.h:528: __uint128_t product = (__uint128_t)lhs * (__uint128_t)rhs;
.loc 2 528 17 view .LVU6236
mul r11 # tmp285
.LVL1242:
.loc 2 529 5 is_stmt 1 view .LVU6237
.loc 2 530 5 view .LVU6238
.loc 2 530 5 is_stmt 0 view .LVU6239
.LBE10584:
.LBE10585:
.loc 2 619 5 is_stmt 1 view .LVU6240
# xxh3.h:619: return product.low64 ^ product.high64;
.loc 2 619 26 is_stmt 0 view .LVU6241
xor rax, rdx # tmp288, tmp340
.LVL1243:
.loc 2 619 26 view .LVU6242
.LBE10586:
.LBE10587:
.LBE10590:
.LBE10593:
# xxh3.h:819: acc += XXH3_mix16B(input+len-64, secret+112, seed);
.loc 2 819 25 view .LVU6243
lea r11, [rax+r8] # acc,
.LVL1244:
.loc 2 819 25 view .LVU6244
jmp .L297 #
.LVL1245:
.p2align 4,,10
.p2align 3
.L291:
.loc 2 819 25 view .LVU6245
.LBE10618:
.LBE10710:
.LBB10711:
.LBB10680:
.loc 2 741 9 is_stmt 1 view .LVU6246
# xxh3.h:741: if (XXH_likely(len >= 4)) return XXH3_len_4to8_64b(input, len, secret, seed);
.loc 2 741 12 is_stmt 0 view .LVU6247
cmp rdx, 3 # len,
jbe .L293 #,
.loc 2 741 35 is_stmt 1 view .LVU6248
.LVL1246:
.LBB10655:
.LBI10655:
.loc 2 699 1 view .LVU6249
.LBE10655:
.LBE10680:
.LBE10711:
.loc 2 701 5 view .LVU6250
.loc 2 702 5 view .LVU6251
.loc 2 703 5 view .LVU6252
.loc 2 704 5 view .LVU6253
.LBB10712:
.LBB10681:
.LBB10662:
.LBB10656:
.loc 2 705 9 view .LVU6254
.loc 2 705 9 is_stmt 0 view .LVU6255
.LBE10656:
.LBE10662:
.LBE10681:
.LBE10712:
.loc 1 1047 5 is_stmt 1 view .LVU6256
.loc 1 929 5 view .LVU6257
.loc 1 930 5 view .LVU6258
.loc 1 931 5 view .LVU6259
.LBB10713:
.LBB10682:
.LBB10663:
.LBB10659:
.loc 2 706 9 view .LVU6260
.loc 2 706 9 is_stmt 0 view .LVU6261
.LBE10659:
.LBE10663:
.LBE10682:
.LBE10713:
.loc 1 1047 5 is_stmt 1 view .LVU6262
.loc 1 929 5 view .LVU6263
.loc 1 930 5 view .LVU6264
.loc 1 931 5 view .LVU6265
.LBB10714:
.LBB10683:
.LBB10664:
.LBB10660:
.loc 2 707 9 view .LVU6266
.loc 2 707 9 is_stmt 0 view .LVU6267
.LBE10660:
.LBE10664:
.LBE10683:
.LBE10714:
.loc 1 1550 5 is_stmt 1 view .LVU6268
.loc 1 1492 5 view .LVU6269
.loc 1 1493 5 view .LVU6270
.loc 1 1494 5 view .LVU6271
.loc 1 1550 5 view .LVU6272
.loc 1 1492 5 view .LVU6273
.loc 1 1493 5 view .LVU6274
.loc 1 1494 5 view .LVU6275
.LBB10715:
.LBB10684:
.LBB10665:
.LBB10661:
.loc 2 708 9 view .LVU6276
.loc 2 709 9 view .LVU6277
# xxh3.h:708: xxh_u64 const input64 = input2 + (((xxh_u64)input1) << 32);
.loc 2 708 44 is_stmt 0 view .LVU6278
mov eax, DWORD PTR [rcx] # MEM[(char * {ref-all})input_4(D)], MEM[(char * {ref-all})input_4(D)]
# xxh3.h:708: xxh_u64 const input64 = input2 + (((xxh_u64)input1) << 32);
.loc 2 708 40 view .LVU6279
mov edx, DWORD PTR -4[rcx+rdx] # MEM[(char * {ref-all})_22], MEM[(char * {ref-all})_22]
.LVL1247:
# xxh3.h:708: xxh_u64 const input64 = input2 + (((xxh_u64)input1) << 32);
.loc 2 708 61 view .LVU6280
sal rax, 32 # tmp249,
# xxh3.h:708: xxh_u64 const input64 = input2 + (((xxh_u64)input1) << 32);
.loc 2 708 23 view .LVU6281
add rax, rdx # input64, MEM[(char * {ref-all})_22]
# xxh3.h:709: xxh_u64 x = input64 ^ bitflip;
.loc 2 709 17 view .LVU6282
movabs rdx, -4090762196417718878 # tmp251,
xor rax, rdx # x, tmp251
.LVL1248:
.loc 2 711 9 is_stmt 1 view .LVU6283
# xxh3.h:711: x ^= XXH_rotl64(x, 49) ^ XXH_rotl64(x, 24);
.loc 2 711 14 is_stmt 0 view .LVU6284
mov rdx, rax # tmp252, x
# xxh3.h:711: x ^= XXH_rotl64(x, 49) ^ XXH_rotl64(x, 24);
.loc 2 711 34 view .LVU6285
mov rcx, rax # tmp253, x
.LVL1249:
.loc 2 711 34 view .LVU6286
rol rcx, 24 # tmp253,
# xxh3.h:711: x ^= XXH_rotl64(x, 49) ^ XXH_rotl64(x, 24);
.loc 2 711 14 view .LVU6287
ror rdx, 15 # tmp252,
# xxh3.h:711: x ^= XXH_rotl64(x, 49) ^ XXH_rotl64(x, 24);
.loc 2 711 32 view .LVU6288
xor rdx, rcx # _30, tmp253
# xxh3.h:712: x *= 0x9FB21C651E98DF25ULL;
.loc 2 712 11 view .LVU6289
movabs rcx, -6939452855193903323 # tmp254,
# xxh3.h:711: x ^= XXH_rotl64(x, 49) ^ XXH_rotl64(x, 24);
.loc 2 711 11 view .LVU6290
xor rax, rdx # x, _30
.LVL1250:
.loc 2 712 9 is_stmt 1 view .LVU6291
# xxh3.h:712: x *= 0x9FB21C651E98DF25ULL;
.loc 2 712 11 is_stmt 0 view .LVU6292
imul rax, rcx # x, tmp254
.LVL1251:
.loc 2 713 9 is_stmt 1 view .LVU6293
# xxh3.h:713: x ^= (x >> 35) + len ;
.loc 2 713 17 is_stmt 0 view .LVU6294
mov rdx, rax # tmp255, x
shr rdx, 35 # tmp255,
# xxh3.h:713: x ^= (x >> 35) + len ;
.loc 2 713 24 view .LVU6295
add r10, rdx # _34, tmp255
.LVL1252:
# xxh3.h:713: x ^= (x >> 35) + len ;
.loc 2 713 11 view .LVU6296
xor rax, r10 # x, _34
.LVL1253:
.loc 2 714 9 is_stmt 1 view .LVU6297
# xxh3.h:714: x *= 0x9FB21C651E98DF25ULL;
.loc 2 714 11 is_stmt 0 view .LVU6298
imul rax, rcx # x, tmp254
.LVL1254:
.loc 2 714 11 view .LVU6299
mov r10, rax # x, x
.LVL1255:
.loc 2 715 9 is_stmt 1 view .LVU6300
.LBB10657:
.LBI10657:
.loc 2 623 26 view .LVU6301
.LBB10658:
.loc 2 625 5 view .LVU6302
.loc 2 626 5 view .LVU6303
# xxh3.h:626: return v64 ^ (v64 >> shift);
.loc 2 626 23 is_stmt 0 view .LVU6304
shr rax, 28 # tmp257,
.LVL1256:
# xxh3.h:626: return v64 ^ (v64 >> shift);
.loc 2 626 16 view .LVU6305
xor rax, r10 # <retval>, x
.LVL1257:
.loc 2 626 16 view .LVU6306
.LBE10658:
.LBE10657:
.LBE10661:
.LBE10665:
# xxh3.h:741: if (XXH_likely(len >= 4)) return XXH3_len_4to8_64b(input, len, secret, seed);
.loc 2 741 42 view .LVU6307
jmp .L301 #
.LVL1258:
.L293:
.loc 2 742 9 is_stmt 1 view .LVU6308
# xxh3.h:743: return XXH3_avalanche((PRIME64_1 + seed) ^ (XXH_readLE64(secret+56) ^ XXH_readLE64(secret+64)));
.loc 2 743 16 is_stmt 0 view .LVU6309
movabs rax, 8606060009869906325 # <retval>,
# xxh3.h:742: if (len) return XXH3_len_1to3_64b(input, len, secret, seed);
.loc 2 742 12 view .LVU6310
test rdx, rdx # len
je .L301 #,
.loc 2 742 18 is_stmt 1 view .LVU6311
.LVL1259:
.LBB10666:
.LBI10666:
.loc 2 677 1 view .LVU6312
.LBE10666:
.LBE10684:
.LBE10715:
.loc 2 679 5 view .LVU6313
.loc 2 680 5 view .LVU6314
.loc 2 681 5 view .LVU6315
.LBB10716:
.LBB10685:
.LBB10673:
.LBB10667:
.loc 2 687 9 view .LVU6316
.loc 2 688 9 view .LVU6317
.loc 2 689 9 view .LVU6318
.loc 2 690 9 view .LVU6319
.loc 2 691 9 view .LVU6320
.LBE10667:
.LBE10673:
.LBE10685:
.LBE10716: