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| /dts-v1/; | |
| // version: 17 | |
| // last_comp_version: 16 | |
| // boot_cpuid_phys: 0x0 | |
| / { | |
| channel-id-map = "acg", "amxbr", "amxpr", "amxmx", "amxcl", "amxar", "amxla", "amxpe", "amxco", "tefbr", "tefmx", "tefar", "tefcl", "tefpe", "tefco", "perar", "entcl", "iusmx", "niibr", "niicl", "niimx", "niipe", "oibr", "timbr", "tigco", "retbr", "retar", "retla", "retcl", "tefla", "retla1st", "tefunl", "tigca", "tigca1st", "retmx", "attmx", "womcl", "avaco", "retpe", "openla", "opencl", "openmx", "altmx", "openpe", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "reteu", "retgb", "retfr", "retes", "retie", "retde", "vfgb", "vfde", "vffr", "o2gb", "o2de", "orafr", "bouyfr", "eegb", "tescogb", "yoigo", "oraes", "retapac", "retmea", "vfit", "vfes", "vfeu", "3gb", "tescoie", "altfr", "3ie", "altpt", "timit", "retma", "windit", "vfhu", "vfro", "telhu", "playpl", "oraeu", "dteu", "teleu", "pluspl", "dtpl", "tefes", "altice", "vipeu", "veoneu", "openeu", "reteu2", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "retca", "bwaca", "tkpca", "vzw", "att", "tmo", "sprint", "repw", "attpre", "cricket", "cc", "usc", "tracfone", "retus", "metropcs", "rcica", "wndca", "dmc", "bby", "amz", "acg", "lra", "comcast", "fi", "vzwpre", "boost", "spectrum", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "retin", "retcn", "telstra", "vfau", "amzin", "jioin", "airin", "retid", "cmcc", "ctcn", "cucn", "retmm", "gt4gtw", "retth", "retru", "trueth", "smarthk", "mobilpk", "retsea", "retjp", "softbank", "optus", "retkr", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined", "undefined"; | |
| compatible = "qcom,cape-mtp", "qcom,cape", "qcom,mtp", "moto,eqs"; | |
| model = "eqs"; | |
| qcom,board-id = <0x41 0xC1A0>; | |
| qcom,msm-id = <0x213 0x10000 0x21C 0x10000 0x212 0x10000>; | |
| qcom,pmic-id = <0x2F 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x41 0x41>; | |
| qcom,pmic-id-size = <0xA>; | |
| }; | |
| &L1D { | |
| qcom,init-voltage = <0x124F80>; | |
| regulator-max-microvolt = <0x124F80>; | |
| regulator-min-microvolt = <0x124F80>; | |
| }; | |
| &L3C { | |
| qcom,init-voltage = <0x2F4D60>; | |
| regulator-max-microvolt = <0x2F4D60>; | |
| regulator-min-microvolt = <0x2F4D60>; | |
| }; | |
| &L9C { | |
| qcom,init-voltage = <0x325AA0>; | |
| regulator-max-microvolt = <0x325AA0>; | |
| status = "ok"; | |
| }; | |
| &aliases { | |
| i2c0 = "/soc/i2c@990000"; | |
| }; | |
| &apps_rsc { | |
| rpmh-regulator-ldoc11 { | |
| compatible = "qcom,rpmh-vrm-regulator"; | |
| qcom,mode-threshold-currents = <0x0 0x2710>; | |
| qcom,regulator-type = "pmic5-ldo"; | |
| qcom,resource-name = "ldoc11"; | |
| qcom,supported-modes = <0x2 0x4>; | |
| L11C: pm8350c_l11: regulator-pm8350c-l11 { | |
| qcom,init-mode = <0x4>; | |
| qcom,init-voltage = <0x2DC6C0>; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x2DC6C0>; | |
| regulator-min-microvolt = <0x2DC6C0>; | |
| regulator-name = "pm8350c_l11"; | |
| }; | |
| }; | |
| rpmh-regulator-ldoi2 { | |
| compatible = "qcom,rpmh-vrm-regulator"; | |
| qcom,mode-threshold-currents = <0x0 0x7530>; | |
| qcom,regulator-type = "pmic5-ldo"; | |
| qcom,resource-name = "ldoi2"; | |
| qcom,supported-modes = <0x2 0x4>; | |
| L2I: pm8010i_l2: regulator-pm8010i-l2 { | |
| qcom,init-mode = <0x4>; | |
| qcom,init-voltage = <0x101D00>; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x101D00>; | |
| regulator-min-microvolt = <0x101D00>; | |
| regulator-name = "pm8010i_l2"; | |
| }; | |
| }; | |
| rpmh-regulator-ldoi3 { | |
| compatible = "qcom,rpmh-vrm-regulator"; | |
| qcom,regulator-type = "pmic5-ldo"; | |
| qcom,resource-name = "ldoi3"; | |
| L3I: pm8010i_l3: regulator-pm8010i-l3 { | |
| qcom,init-voltage = <0x2C4FC0>; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x2C4FC0>; | |
| regulator-min-microvolt = <0x2C4FC0>; | |
| regulator-name = "pm8010i_l3"; | |
| }; | |
| }; | |
| rpmh-regulator-ldoi4 { | |
| compatible = "qcom,rpmh-vrm-regulator"; | |
| qcom,regulator-type = "pmic5-ldo"; | |
| qcom,resource-name = "ldoi4"; | |
| L4I: pm8010i_l4: regulator-pm8010i-l4 { | |
| qcom,init-voltage = <0x2AB980>; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x2AB980>; | |
| regulator-min-microvolt = <0x2AB980>; | |
| regulator-name = "pm8010i_l4"; | |
| }; | |
| }; | |
| rpmh-regulator-ldoi6 { | |
| compatible = "qcom,rpmh-vrm-regulator"; | |
| qcom,regulator-type = "pmic5-ldo"; | |
| qcom,resource-name = "ldoi6"; | |
| L6I: pm8010i_l6: regulator-pm8010i-l6 { | |
| qcom,init-voltage = <0x2AB980>; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x2AB980>; | |
| regulator-min-microvolt = <0x2AB980>; | |
| regulator-name = "pm8010i_l6"; | |
| }; | |
| }; | |
| rpmh-regulator-ldoi7 { | |
| compatible = "qcom,rpmh-vrm-regulator"; | |
| qcom,regulator-type = "pmic5-ldo"; | |
| qcom,resource-name = "ldoi7"; | |
| L7I: pm8010i_l7: regulator-pm8010i-l7 { | |
| qcom,init-voltage = <0x2D2A80>; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x2D2A80>; | |
| regulator-min-microvolt = <0x2D2A80>; | |
| regulator-name = "pm8010i_l7"; | |
| }; | |
| }; | |
| rpmh-regulator-ldoj1 { | |
| compatible = "qcom,rpmh-vrm-regulator"; | |
| qcom,mode-threshold-currents = <0x0 0x7530>; | |
| qcom,regulator-type = "pmic5-ldo"; | |
| qcom,resource-name = "ldoj1"; | |
| qcom,supported-modes = <0x2 0x4>; | |
| L1J: pm8010j_l1: regulator-pm8010j-l1 { | |
| qcom,init-mode = <0x4>; | |
| qcom,init-voltage = <0x10D880>; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x10D880>; | |
| regulator-min-microvolt = <0x10D880>; | |
| regulator-name = "pm8010j_l1"; | |
| }; | |
| }; | |
| rpmh-regulator-ldoj2 { | |
| compatible = "qcom,rpmh-vrm-regulator"; | |
| qcom,mode-threshold-currents = <0x0 0x7530>; | |
| qcom,regulator-type = "pmic5-ldo"; | |
| qcom,resource-name = "ldoj2"; | |
| qcom,supported-modes = <0x2 0x4>; | |
| L2J: pm8010j_l2: regulator-pm8010j-l2 { | |
| qcom,init-mode = <0x4>; | |
| qcom,init-voltage = <0x101D00>; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x101D00>; | |
| regulator-min-microvolt = <0x101D00>; | |
| regulator-name = "pm8010j_l2"; | |
| }; | |
| }; | |
| rpmh-regulator-ldoj3 { | |
| compatible = "qcom,rpmh-vrm-regulator"; | |
| qcom,regulator-type = "pmic5-ldo"; | |
| qcom,resource-name = "ldoj3"; | |
| L3J: pm8010j_l3: regulator-pm8010j-l3 { | |
| qcom,init-voltage = <0x1B7740>; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x1B7740>; | |
| regulator-min-microvolt = <0x1B7740>; | |
| regulator-name = "pm8010j_l3"; | |
| }; | |
| }; | |
| rpmh-regulator-ldoj4 { | |
| compatible = "qcom,rpmh-vrm-regulator"; | |
| qcom,regulator-type = "pmic5-ldo"; | |
| qcom,resource-name = "ldoj4"; | |
| L4J: pm8010j_l4: regulator-pm8010j-l4 { | |
| qcom,init-voltage = <0x1B7740>; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x1B7740>; | |
| regulator-min-microvolt = <0x1B7740>; | |
| regulator-name = "pm8010j_l4"; | |
| }; | |
| }; | |
| rpmh-regulator-ldoj5 { | |
| compatible = "qcom,rpmh-vrm-regulator"; | |
| qcom,regulator-type = "pmic5-ldo"; | |
| qcom,resource-name = "ldoj5"; | |
| L5J: pm8010j_l5: regulator-pm8010j-l5 { | |
| qcom,init-voltage = <0x2AB980>; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x2AB980>; | |
| regulator-min-microvolt = <0x2AB980>; | |
| regulator-name = "pm8010j_l5"; | |
| }; | |
| }; | |
| rpmh-regulator-ldoj6 { | |
| compatible = "qcom,rpmh-vrm-regulator"; | |
| qcom,regulator-type = "pmic5-ldo"; | |
| qcom,resource-name = "ldoj6"; | |
| L6J: pm8010j_l6: regulator-pm8010j-l6 { | |
| qcom,init-voltage = <0x2AB980>; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x2AB980>; | |
| regulator-min-microvolt = <0x2AB980>; | |
| regulator-name = "pm8010j_l6"; | |
| }; | |
| }; | |
| rpmh-regulator-ldoj7 { | |
| compatible = "qcom,rpmh-vrm-regulator"; | |
| qcom,regulator-type = "pmic5-ldo"; | |
| qcom,resource-name = "ldoj7"; | |
| L7J: pm8010j_l7: regulator-pm8010j-l7 { | |
| qcom,init-voltage = <0x326A40>; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x326A40>; | |
| regulator-min-microvolt = <0x326A40>; | |
| regulator-name = "pm8010j_l7"; | |
| }; | |
| }; | |
| }; | |
| &battery_charger { | |
| qcom,thermal-mitigation = <0x15EF3C0 0x112A880 0xF42400 0xB71B00 0x989680 0x7A1200 0x5B8D80 0x3D0900 0x2DC6C0 0x16E360 0xF4240 0x493E0>; | |
| qcom,wireless-fw-name = "cps4035.bin"; | |
| }; | |
| &cam_cci0 { | |
| actuator_rear_main: qcom,actuator0 { | |
| cam_vaf-supply = <&camera_ldo7>; | |
| cam_vio-supply = <&camera_ldo5>; | |
| cci-master = <0x0>; | |
| cell-index = <0x0>; | |
| compatible = "qcom,actuator"; | |
| regulator-names = "cam_vaf", "cam_vio"; | |
| rgltr-cntrl-support; | |
| rgltr-load-current = <0x1D0D8 0x0>; | |
| rgltr-max-voltage = <0x2F5D00 0x1B7740>; | |
| rgltr-min-voltage = <0x2F4D60 0x1B7740>; | |
| }; | |
| actuator_rear_tele: qcom,actuator3 { | |
| cam_vaf-supply = <&cam_afvdd_tele>; | |
| cam_vio-supply = <&camera_ldo5>; | |
| cci-master = <0x1>; | |
| cell-index = <0x3>; | |
| compatible = "qcom,actuator"; | |
| regulator-names = "cam_vaf", "cam_vio"; | |
| rgltr-cntrl-support; | |
| rgltr-load-current = <0x23E38 0x0>; | |
| rgltr-max-voltage = <0x2DD660 0x1B7740>; | |
| rgltr-min-voltage = <0x2DC6C0 0x1B7740>; | |
| }; | |
| rear_main: qcom,cam-sensor0 { | |
| actuator-src = <&actuator_rear_main>; | |
| cam_clk-supply = <&cam_cc_titan_top_gdsc>; | |
| cam_v_custom1-supply = <&L3C>; | |
| cam_vaf-supply = <&camera_ldo7>; | |
| cam_vana-supply = <&camera_ldo3>; | |
| cam_vdig-supply = <&camera_ldo1>; | |
| cam_vio-supply = <&camera_ldo5>; | |
| cci-master = <0x0>; | |
| cell-index = <0x0>; | |
| clock-cntl-level = "nominal"; | |
| clock-names = "cam_clk"; | |
| clock-rates = <0x124F800>; | |
| clocks = <&clock_camcc 0x50>; | |
| compatible = "qcom,cam-sensor"; | |
| csiphy-sd-index = <0x2>; | |
| eeprom-src = <&eeprom_rear_main>; | |
| gpio-no-mux = <0x0>; | |
| gpio-req-tbl-flags = <0x1 0x0>; | |
| gpio-req-tbl-label = "CAMIF_MCLK2", "CAM_RESET2"; | |
| gpio-req-tbl-num = <0x0 0x1>; | |
| gpio-reset = <0x1>; | |
| gpios = <&tlmm 0x66 0x0 &tlmm 0x75 0x0>; | |
| led-flash-src = <&led_flash_rear>; | |
| ois-src = <&ois_rear_main>; | |
| pinctrl-0 = <&cam_sensor_mclk2_active &cam_sensor_active_rst2>; | |
| pinctrl-1 = <&cam_sensor_mclk2_suspend &cam_sensor_suspend_rst2>; | |
| pinctrl-names = "cam_default", "cam_suspend"; | |
| regulator-names = "cam_vio", "cam_vdig", "cam_clk", "cam_vana", "cam_vaf", "cam_v_custom1"; | |
| rgltr-cntrl-support; | |
| rgltr-load-current = <0xBB8 0xA4CB8 0x0 0x1B580 0x3A98 0x3A98>; | |
| rgltr-max-voltage = <0x1B7740 0xF4240 0x0 0x2191C0 0x2F5D00 0x2F5D00>; | |
| rgltr-min-voltage = <0x1B7740 0xF4240 0x0 0x2191C0 0x2F4D60 0x2F4D60>; | |
| sensor-position-pitch = <0x0>; | |
| sensor-position-roll = <0x5A>; | |
| sensor-position-yaw = <0xB4>; | |
| status = "ok"; | |
| }; | |
| rear_tele: qcom,cam-sensor3 { | |
| actuator-src = <&actuator_rear_tele>; | |
| cam_clk-supply = <&cam_cc_titan_top_gdsc>; | |
| cam_vana-supply = <&cam_avdd_tele>; | |
| cam_vdig-supply = <&camera_ldo2>; | |
| cam_vio-supply = <&camera_ldo5>; | |
| cci-master = <0x1>; | |
| cell-index = <0x3>; | |
| clock-cntl-level = "nominal"; | |
| clock-names = "cam_clk"; | |
| clock-rates = <0x124F800>; | |
| clocks = <&clock_camcc 0x4E>; | |
| compatible = "qcom,cam-sensor"; | |
| csiphy-sd-index = <0x1>; | |
| eeprom-src = <&eeprom_rear_tele>; | |
| gpio-no-mux = <0x0>; | |
| gpio-req-tbl-flags = <0x1 0x0>; | |
| gpio-req-tbl-label = "CAMIF_MCLK1", "CAM_RESET1"; | |
| gpio-req-tbl-num = <0x0 0x1>; | |
| gpio-reset = <0x1>; | |
| gpios = <&tlmm 0x65 0x0 &tlmm 0x18 0x0>; | |
| led-flash-src = <&led_flash_tele>; | |
| pinctrl-0 = <&cam_sensor_mclk1_active &cam_sensor_active_rst1>; | |
| pinctrl-1 = <&cam_sensor_mclk1_suspend &cam_sensor_suspend_rst1>; | |
| pinctrl-names = "cam_default", "cam_suspend"; | |
| regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk"; | |
| rgltr-cntrl-support; | |
| rgltr-load-current = <0xCE4 0x26D18 0x13498 0x0>; | |
| rgltr-max-voltage = <0x1B7740 0x2AB980 0x101D00 0x0>; | |
| rgltr-min-voltage = <0x1B7740 0x2AB980 0x101D00 0x0>; | |
| sensor-position-pitch = <0x0>; | |
| sensor-position-roll = <0x5A>; | |
| sensor-position-yaw = <0xB4>; | |
| status = "ok"; | |
| }; | |
| eeprom_rear_main: qcom,eeprom@0 { | |
| cam_clk-supply = <&cam_cc_titan_top_gdsc>; | |
| cam_vana-supply = <&camera_ldo3>; | |
| cam_vdig-supply = <&camera_ldo1>; | |
| cam_vio-supply = <&camera_ldo5>; | |
| cci-master = <0x0>; | |
| cell-index = <0x0>; | |
| clock-cntl-level = "nominal"; | |
| clock-names = "cam_clk"; | |
| clock-rates = <0x124F800>; | |
| clocks = <&clock_camcc 0x50>; | |
| compatible = "qcom,eeprom"; | |
| gpio-no-mux = <0x0>; | |
| gpio-req-tbl-flags = <0x1 0x0>; | |
| gpio-req-tbl-label = "CAMIF_MCLK2", "CAM_RESET2"; | |
| gpio-req-tbl-num = <0x0 0x1>; | |
| gpio-reset = <0x1>; | |
| gpios = <&tlmm 0x66 0x0 &tlmm 0x75 0x0>; | |
| pinctrl-0 = <&cam_sensor_mclk2_active &cam_sensor_active_rst2>; | |
| pinctrl-1 = <&cam_sensor_mclk2_suspend &cam_sensor_suspend_rst2>; | |
| pinctrl-names = "cam_default", "cam_suspend"; | |
| reg = <0x0>; | |
| regulator-names = "cam_vio", "cam_vdig", "cam_clk", "cam_vana"; | |
| rgltr-cntrl-support; | |
| rgltr-load-current = <0xBB8 0xA4CB8 0x0 0x1B580>; | |
| rgltr-max-voltage = <0x1B7740 0xF4240 0x0 0x2191C0>; | |
| rgltr-min-voltage = <0x1B7740 0xF4240 0x0 0x2191C0>; | |
| status = "ok"; | |
| }; | |
| eeprom_rear_tele: qcom,eeprom@3 { | |
| cam_vio-supply = <&camera_ldo5>; | |
| cci-master = <0x1>; | |
| cell-index = <0x3>; | |
| compatible = "qcom,eeprom"; | |
| reg = <0x3>; | |
| regulator-names = "cam_vio"; | |
| rgltr-cntrl-support; | |
| rgltr-load-current = <0x0>; | |
| rgltr-max-voltage = <0x1B7740>; | |
| rgltr-min-voltage = <0x1B7740>; | |
| }; | |
| i2c_freq_400Khz_cci0: qcom,i2c_fast_mode { | |
| hw-scl-stretch-en = <0x1>; | |
| }; | |
| i2c_freq_1Mhz_cci0: qcom,i2c_fast_plus_mode { | |
| hw-scl-stretch-en = <0x1>; | |
| }; | |
| i2c_freq_100Khz_cci0: qcom,i2c_standard_mode { | |
| hw-scl-stretch-en = <0x1>; | |
| }; | |
| ois_rear_main: qcom,ois0 { | |
| cam_v_custom1-supply = <&L3C>; | |
| cam_vaf-supply = <&camera_ldo7>; | |
| cam_vio-supply = <&camera_ldo5>; | |
| cci-master = <0x0>; | |
| cell-index = <0x0>; | |
| compatible = "qcom,ois"; | |
| reg = <0x0>; | |
| regulator-names = "cam_vio", "cam_vaf", "cam_v_custom1"; | |
| rgltr-cntrl-support; | |
| rgltr-load-current = <0x36B0 0x3A98 0x3A98>; | |
| rgltr-max-voltage = <0x1B7740 0x2F5D00 0x2F5D00>; | |
| rgltr-min-voltage = <0x1B7740 0x2F4D60 0x2F4D60>; | |
| status = "ok"; | |
| }; | |
| }; | |
| &cam_cci1 { | |
| actuator_rear_uw: qcom,actuator2 { | |
| cam_vaf-supply = <&camera_ldo6>; | |
| cam_vio-supply = <&camera_ldo5>; | |
| cci-master = <0x0>; | |
| cell-index = <0x2>; | |
| compatible = "qcom,actuator"; | |
| regulator-names = "cam_vaf", "cam_vio"; | |
| rgltr-cntrl-support; | |
| rgltr-load-current = <0x1D0D8 0x0>; | |
| rgltr-max-voltage = <0x2AB980 0x1B7740>; | |
| rgltr-min-voltage = <0x2AB980 0x1B7740>; | |
| }; | |
| front_main: qcom,cam-sensor1 { | |
| cam_clk-supply = <&cam_cc_titan_top_gdsc>; | |
| cam_vana-supply = <&cam_avdd_front>; | |
| cam_vdig-supply = <&cam_dvdd_front>; | |
| cam_vio-supply = <&camera_ldo5>; | |
| cci-master = <0x1>; | |
| cell-index = <0x1>; | |
| clock-cntl-level = "nominal"; | |
| clock-names = "cam_clk"; | |
| clock-rates = <0x16E3600>; | |
| clocks = <&clock_camcc 0x54>; | |
| compatible = "qcom,cam-sensor"; | |
| csiphy-sd-index = <0x4>; | |
| eeprom-src = <&eeprom_front>; | |
| gpio-no-mux = <0x0>; | |
| gpio-req-tbl-flags = <0x1 0x0>; | |
| gpio-req-tbl-label = "CAMIF_MCLK4", "CAM_RESET4"; | |
| gpio-req-tbl-num = <0x0 0x1>; | |
| gpio-reset = <0x1>; | |
| gpios = <&tlmm 0x68 0x0 &tlmm 0x6C 0x0>; | |
| pinctrl-0 = <&cam_sensor_mclk4_active &cam_sensor_active_rst6>; | |
| pinctrl-1 = <&cam_sensor_mclk4_suspend &cam_sensor_suspend_rst6>; | |
| pinctrl-names = "cam_default", "cam_suspend"; | |
| regulator-names = "cam_vio", "cam_vdig", "cam_clk", "cam_vana"; | |
| rgltr-cntrl-support; | |
| rgltr-load-current = <0xBB8 0x1E848 0x0 0x17318>; | |
| rgltr-max-voltage = <0x1B7740 0x10C8E0 0x0 0x2AB980>; | |
| rgltr-min-voltage = <0x1B7740 0x10C8E0 0x0 0x2AB980>; | |
| sensor-position-pitch = <0x0>; | |
| sensor-position-roll = <0x10E>; | |
| sensor-position-yaw = <0x0>; | |
| status = "ok"; | |
| }; | |
| rear_uw: qcom,cam-sensor2 { | |
| actuator-src = <&actuator_rear_uw>; | |
| cam_clk-supply = <&cam_cc_titan_top_gdsc>; | |
| cam_vana-supply = <&camera_ldo4>; | |
| cam_vdig-supply = <&camera_ldo2>; | |
| cam_vio-supply = <&camera_ldo5>; | |
| cci-master = <0x0>; | |
| cell-index = <0x2>; | |
| clock-cntl-level = "nominal"; | |
| clock-names = "cam_clk"; | |
| clock-rates = <0x16E3600>; | |
| clocks = <&clock_camcc 0x52>; | |
| compatible = "qcom,cam-sensor"; | |
| csiphy-sd-index = <0x3>; | |
| eeprom-src = <&eeprom_rear_uw>; | |
| gpio-no-mux = <0x0>; | |
| gpio-req-tbl-flags = <0x1 0x0>; | |
| gpio-req-tbl-label = "CAMIF_MCLK3", "CAM_RESET3"; | |
| gpio-req-tbl-num = <0x0 0x1>; | |
| gpio-reset = <0x1>; | |
| gpios = <&tlmm 0x67 0x0 &tlmm 0x78 0x0>; | |
| led-flash-src = <&led_flash_uw>; | |
| pinctrl-0 = <&cam_sensor_mclk3_active &cam_sensor_active_rst3>; | |
| pinctrl-1 = <&cam_sensor_mclk3_suspend &cam_sensor_suspend_rst3>; | |
| pinctrl-names = "cam_default", "cam_suspend"; | |
| regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk"; | |
| rgltr-cntrl-support; | |
| rgltr-load-current = <0xBB8 0x24220 0x33C20 0x0>; | |
| rgltr-max-voltage = <0x1B7740 0x2AB980 0x101D00 0x0>; | |
| rgltr-min-voltage = <0x1B7740 0x2AB980 0x101D00 0x0>; | |
| sensor-position-pitch = <0x0>; | |
| sensor-position-roll = <0x5A>; | |
| sensor-position-yaw = <0xB4>; | |
| status = "ok"; | |
| }; | |
| eeprom_front: qcom,eeprom@1 { | |
| cam_vio-supply = <&camera_ldo5>; | |
| cci-master = <0x1>; | |
| cell-index = <0x1>; | |
| compatible = "qcom,eeprom"; | |
| reg = <0x1>; | |
| regulator-names = "cam_vio"; | |
| rgltr-cntrl-support; | |
| rgltr-load-current = <0x0>; | |
| rgltr-max-voltage = <0x1B7740>; | |
| rgltr-min-voltage = <0x1B7740>; | |
| }; | |
| eeprom_rear_uw: qcom,eeprom@2 { | |
| cam_vio-supply = <&camera_ldo5>; | |
| cci-master = <0x0>; | |
| cell-index = <0x2>; | |
| compatible = "qcom,eeprom"; | |
| reg = <0x2>; | |
| regulator-names = "cam_vio"; | |
| rgltr-cntrl-support; | |
| rgltr-load-current = <0x0>; | |
| rgltr-max-voltage = <0x1B7740>; | |
| rgltr-min-voltage = <0x1B7740>; | |
| }; | |
| }; | |
| &clock_gcc { | |
| qcom,critical-devices = <&qupv3_se5_i2c>; | |
| }; | |
| &eusb2_phy0 { | |
| dummy-supply = <&nxp_eusb2_repeater>; | |
| usb-repeater = <&nxp_eusb2_repeater>; | |
| }; | |
| &fsa4480 { | |
| status = "disabled"; | |
| }; | |
| &hw { | |
| compatible = "mmi,utags"; | |
| mmi,dir-name = "hw"; | |
| mmi,main-utags = "/dev/block/bootdevice/by-name/hw"; | |
| }; | |
| &lpass_cdc { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| qcom,lpass-cdc-version = <0x6>; | |
| qcom,num-macros = <0x4>; | |
| lpass-cdc-clk-rsc-mngr { | |
| clock-names = "tx_core_clk", "rx_core_clk", "wsa_core_clk", "va_core_clk", "wsa2_core_clk", "rx_tx_core_clk", "wsa_tx_core_clk", "wsa2_tx_core_clk"; | |
| clocks = <&clock_audio_tx_1 0x0 &clock_audio_rx_1 0x0 &clock_audio_wsa_1 0x0 &clock_audio_va_1 0x0 &clock_audio_wsa_2 0x0 &clock_audio_rx_tx 0x0 &clock_audio_wsa_tx 0x0 &clock_audio_wsa2_tx 0x0>; | |
| compatible = "qcom,lpass-cdc-clk-rsc-mngr"; | |
| qcom,fs-gen-sequence = <0x3000 0x1 0x1 0x3004 0x3 0x3 0x3004 0x3 0x1 0x3080 0x2 0x2>; | |
| qcom,rx_mclk_mode_muxsel = <0x33A40D8>; | |
| qcom,va_mclk_mode_muxsel = <0x3420000>; | |
| qcom,wsa_mclk_mode_muxsel = <0x33A20E0>; | |
| }; | |
| rx_macro: rx-macro@3200000 { | |
| clock-names = "rx_mclk2_2x_clk"; | |
| clocks = <&clock_audio_rx_mclk2_2x_clk 0x0>; | |
| compatible = "qcom,lpass-cdc-rx-macro"; | |
| qcom,default-clk-id = <0x5>; | |
| qcom,rx-bcl-pmic-params = [00 03 48]; | |
| qcom,rx-swr-gpios = <&rx_swr_gpios>; | |
| qcom,rx_mclk_mode_muxsel = <0x33A40D8>; | |
| reg = <0x3200000 0x0>; | |
| swr1: rx_swr_master { | |
| #address-cells = <0x2>; | |
| #size-cells = <0x0>; | |
| clock-names = "lpass_core_hw_vote", "lpass_audio_hw_vote"; | |
| clocks = <&lpass_core_hw_vote 0x0 &lpass_audio_hw_vote 0x0>; | |
| compatible = "qcom,swr-mstr"; | |
| interrupt-names = "swr_master_irq"; | |
| interrupts = <0x0 0x9B 0x4>; | |
| qcom,mipi-sdw-block-packing-mode = <0x1>; | |
| qcom,swr-clock-stop-mode0 = <0x1>; | |
| qcom,swr-num-dev = <0x2>; | |
| qcom,swr-num-ports = <0x6>; | |
| qcom,swr-port-mapping = <0x1 0x9 0x1 0x1 0xA 0x2 0x2 0xD 0x1 0x3 0xB 0x1 0x3 0xC 0x2 0x4 0xE 0x1 0x5 0xF 0x1 0x5 0x10 0x2 0x6 0x21 0x1>; | |
| qcom,swr_master_id = <0x2>; | |
| swrm-io-base = <0x3210000 0x0>; | |
| swr_haptics: swr_haptics@f0170220 { | |
| compatible = "qcom,pm8350b-swr-haptics"; | |
| qcom,rx_swr_ch_map = <0x0 0x1 0x1 0x0 0x21>; | |
| reg = <0x1 0xF0170220>; | |
| swr-slave-supply = <&hap_swr_slave_reg>; | |
| }; | |
| wcd938x_rx_slave: wcd938x-rx-slave { | |
| compatible = "qcom,wcd938x-slave"; | |
| reg = <0xD 0x1170224>; | |
| }; | |
| }; | |
| }; | |
| tx_macro: tx-macro@3220000 { | |
| compatible = "qcom,lpass-cdc-tx-macro"; | |
| qcom,default-clk-id = <0x0>; | |
| qcom,is-used-swr-gpio = <0x0>; | |
| qcom,tx-dmic-sample-rate = <0x249F00>; | |
| reg = <0x3220000 0x0>; | |
| }; | |
| va_macro: va-macro@33F0000 { | |
| clock-names = "lpass_audio_hw_vote"; | |
| clocks = <&lpass_audio_hw_vote 0x0>; | |
| compatible = "qcom,lpass-cdc-va-macro"; | |
| qcom,default-clk-id = <0x0>; | |
| qcom,is-used-swr-gpio = <0x1>; | |
| qcom,va-clk-mux-select = <0x1>; | |
| qcom,va-dmic-sample-rate = <0x927C0>; | |
| qcom,va-island-mode-muxsel = <0x3420000>; | |
| qcom,va-swr-gpios = <&va_swr_gpios>; | |
| reg = <0x33F0000 0x0>; | |
| swr2: va_swr_master { | |
| #address-cells = <0x2>; | |
| #size-cells = <0x0>; | |
| clock-names = "lpass_core_hw_vote", "lpass_audio_hw_vote"; | |
| clocks = <&lpass_core_hw_vote 0x0 &lpass_audio_hw_vote 0x0>; | |
| compatible = "qcom,swr-mstr"; | |
| interrupt-names = "swr_master_irq", "swr_wake_irq"; | |
| interrupts = <0x0 0x1F0 0x4 0x0 0x208 0x4>; | |
| qcom,is-always-on = <0x1>; | |
| qcom,mipi-sdw-block-packing-mode = <0x1>; | |
| qcom,swr-clock-stop-mode0 = <0x1>; | |
| qcom,swr-mstr-irq-wakeup-capable = <0x1>; | |
| qcom,swr-num-dev = <0x5>; | |
| qcom,swr-num-ports = <0x3>; | |
| qcom,swr-port-mapping = <0x1 0x22 0x1 0x1 0x23 0x2 0x1 0x24 0x4 0x1 0x25 0x8 0x2 0x26 0x1 0x2 0x27 0x2 0x2 0x28 0x4 0x2 0x29 0x8 0x3 0x2A 0x1 0x3 0x2B 0x2 0x3 0x2C 0x4 0x3 0x2D 0x8>; | |
| qcom,swr-wakeup-required = <0x1>; | |
| qcom,swr_master_id = <0x3>; | |
| swrm-io-base = <0x33B0000 0x0>; | |
| swr_dmic_01: dmic_swr@58350220 { | |
| compatible = "qcom,swr-dmic"; | |
| qcom,codec-name = "swr-dmic.01"; | |
| qcom,swr-dmic-supply = <0x3>; | |
| qcom,wcd-handle = <&wcd938x_codec>; | |
| reg = <0x8 0x58350220>; | |
| sound-name-prefix = "SWR_MIC0"; | |
| status = "disabled"; | |
| }; | |
| swr_dmic_02: dmic_swr@58350221 { | |
| compatible = "qcom,swr-dmic"; | |
| qcom,codec-name = "swr-dmic.02"; | |
| qcom,swr-dmic-supply = <0x1>; | |
| qcom,wcd-handle = <&wcd938x_codec>; | |
| reg = <0x8 0x58350221>; | |
| sound-name-prefix = "SWR_MIC1"; | |
| status = "disabled"; | |
| }; | |
| swr_dmic_03: dmic_swr@58350222 { | |
| compatible = "qcom,swr-dmic"; | |
| qcom,codec-name = "swr-dmic.03"; | |
| qcom,swr-dmic-supply = <0x1>; | |
| qcom,wcd-handle = <&wcd938x_codec>; | |
| reg = <0x8 0x58350222>; | |
| sound-name-prefix = "SWR_MIC2"; | |
| status = "disabled"; | |
| }; | |
| swr_dmic_04: dmic_swr@58350223 { | |
| compatible = "qcom,swr-dmic"; | |
| qcom,codec-name = "swr-dmic.04"; | |
| qcom,swr-dmic-supply = <0x3>; | |
| qcom,wcd-handle = <&wcd938x_codec>; | |
| reg = <0x8 0x58350223>; | |
| sound-name-prefix = "SWR_MIC3"; | |
| status = "disabled"; | |
| }; | |
| wcd938x_tx_slave: wcd938x-tx-slave { | |
| compatible = "qcom,wcd938x-slave"; | |
| reg = <0xD 0x1170223>; | |
| status = "disabled"; | |
| }; | |
| }; | |
| }; | |
| wcd938x_codec: wcd938x-codec { | |
| cdc-vdd-buck-supply = <&S10B>; | |
| cdc-vdd-mic-bias-supply = <&BOB>; | |
| cdc-vdd-rxtx-supply = <&S10B>; | |
| cdc-vddio-supply = <&S10B>; | |
| compatible = "qcom,wcd938x-codec"; | |
| qcom,cdc-micbias1-mv = <0x708>; | |
| qcom,cdc-micbias2-mv = <0x708>; | |
| qcom,cdc-micbias3-mv = <0x708>; | |
| qcom,cdc-micbias4-mv = <0x708>; | |
| qcom,cdc-static-supplies = "cdc-vdd-rxtx", "cdc-vddio", "cdc-vdd-buck", "cdc-vdd-mic-bias"; | |
| qcom,cdc-vdd-buck-current = <0x9EB10>; | |
| qcom,cdc-vdd-buck-voltage = <0x1B7740 0x1B7740>; | |
| qcom,cdc-vdd-mic-bias-current = <0x7530>; | |
| qcom,cdc-vdd-mic-bias-voltage = <0x324B00 0x324B00>; | |
| qcom,cdc-vdd-rxtx-current = <0x7530>; | |
| qcom,cdc-vdd-rxtx-voltage = <0x1B7740 0x1B7740>; | |
| qcom,cdc-vddio-current = <0x7530>; | |
| qcom,cdc-vddio-voltage = <0x1B7740 0x1B7740>; | |
| qcom,rx-slave = <&wcd938x_rx_slave>; | |
| qcom,rx_swr_ch_map = <0x0 0x9 0x1 0x0 0x9 0x0 0xA 0x2 0x0 0xA 0x1 0xD 0x1 0x0 0xD 0x2 0xB 0x1 0x0 0xB 0x2 0xC 0x2 0x0 0xC 0x3 0xE 0x1 0x0 0xE 0x4 0xF 0x1 0x0 0xF 0x4 0x10 0x2 0x0 0x10>; | |
| qcom,split-codec = <0x1>; | |
| qcom,swr-tx-port-params = <0x0 0x1 0x0 0x2 0x1 0x0 0x1 0x0 0x0 0x1 0x1 0x0 0x1 0x0 0x1 0x0 0x0 0x1 0x2 0x0 0x1 0x0 0x2 0x0 0x1 0x0 0x1 0x0 0x1 0x0 0x1 0x0>; | |
| qcom,tx-slave = <&wcd938x_tx_slave>; | |
| qcom,tx_swr_ch_map = <0x0 0x12 0x1 0x0 0x22 0x0 0x13 0x2 0x0 0x23 0x1 0x14 0x1 0x0 0x24 0x1 0x15 0x2 0x0 0x25 0x2 0x16 0x1 0x0 0x26 0x2 0x17 0x2 0x0 0x27 0x2 0x11 0x4 0x0 0x28 0x2 0x18 0x4 0x0 0x28 0x2 0x19 0x8 0x0 0x29 0x3 0x1A 0x1 0x0 0x2A 0x3 0x1B 0x2 0x0 0x2B 0x3 0x1C 0x4 0x0 0x2C 0x3 0x1D 0x8 0x0 0x2D>; | |
| qcom,wcd-rst-gpio-node = <&wcd938x_rst_gpio>; | |
| status = "disabled"; | |
| }; | |
| wsa_macro: wsa-macro@3240000 { | |
| #cooling-cells = <0x2>; | |
| compatible = "qcom,lpass-cdc-wsa-macro"; | |
| qcom,default-clk-id = <0x6>; | |
| qcom,thermal-max-state = <0xB>; | |
| qcom,wsa-bcl-pmic-params = [00 03 48]; | |
| qcom,wsa-swr-gpios = <&wsa_swr_gpios>; | |
| reg = <0x3240000 0x0>; | |
| swr0: wsa_swr_master { | |
| #address-cells = <0x2>; | |
| #size-cells = <0x0>; | |
| clock-names = "lpass_core_hw_vote", "lpass_audio_hw_vote"; | |
| clocks = <&lpass_core_hw_vote 0x0 &lpass_audio_hw_vote 0x0>; | |
| compatible = "qcom,swr-mstr"; | |
| interrupt-names = "swr_master_irq"; | |
| interrupts = <0x0 0xAA 0x4>; | |
| qcom,dynamic-port-map-supported = <0x0>; | |
| qcom,mipi-sdw-block-packing-mode = <0x0>; | |
| qcom,swr-clock-stop-mode0 = <0x1>; | |
| qcom,swr-num-dev = <0x2>; | |
| qcom,swr-num-ports = <0x8>; | |
| qcom,swr-port-mapping = <0x1 0x1 0x1 0x2 0x2 0xF 0x3 0x3 0x3 0x4 0x5 0x1 0x5 0x6 0xF 0x6 0x7 0x3 0x7 0x4 0x3 0x8 0x8 0x3>; | |
| qcom,swr_master_id = <0x1>; | |
| swrm-io-base = <0x3250000 0x0>; | |
| wsa883x_0221: wsa883x@02170221 { | |
| cdc-vdd-1p8-supply = <&S10B>; | |
| compatible = "qcom,wsa883x"; | |
| qcom,cdc-static-supplies = "cdc-vdd-1p8"; | |
| qcom,cdc-vdd-1p8-current = <0x4E20>; | |
| qcom,cdc-vdd-1p8-voltage = <0x1B7740 0x1B7740>; | |
| qcom,lpass-cdc-handle = <&lpass_cdc>; | |
| qcom,spkr-sd-n-node = <&wsa_spkr_en1>; | |
| reg = <0x2 0x2170221>; | |
| sound-name-prefix = "SpkrLeft"; | |
| }; | |
| wsa883x_0222: wsa883x@02170222 { | |
| cdc-vdd-1p8-supply = <&S10B>; | |
| compatible = "qcom,wsa883x"; | |
| qcom,cdc-static-supplies = "cdc-vdd-1p8"; | |
| qcom,cdc-vdd-1p8-current = <0x4E20>; | |
| qcom,cdc-vdd-1p8-voltage = <0x1B7740 0x1B7740>; | |
| qcom,lpass-cdc-handle = <&lpass_cdc>; | |
| qcom,spkr-sd-n-node = <&wsa_spkr_en2>; | |
| reg = <0x2 0x2170222>; | |
| sound-name-prefix = "SpkrRight"; | |
| }; | |
| }; | |
| }; | |
| wsa2_macro: wsa2-macro@31E0000 { | |
| #cooling-cells = <0x2>; | |
| compatible = "qcom,lpass-cdc-wsa2-macro"; | |
| qcom,default-clk-id = <0x7>; | |
| qcom,thermal-max-state = <0xB>; | |
| qcom,wsa2-bcl-pmic-params = [00 03 48]; | |
| qcom,wsa2-swr-gpios = <&wsa2_swr_gpios>; | |
| reg = <0x31E0000 0x0>; | |
| status = "disabled"; | |
| swr3: wsa2_swr_master { | |
| #address-cells = <0x2>; | |
| #size-cells = <0x0>; | |
| clock-names = "lpass_core_hw_vote", "lpass_audio_hw_vote"; | |
| clocks = <&lpass_core_hw_vote 0x0 &lpass_audio_hw_vote 0x0>; | |
| compatible = "qcom,swr-mstr"; | |
| interrupt-names = "swr_master_irq"; | |
| interrupts = <0x0 0xAB 0x4>; | |
| qcom,dynamic-port-map-supported = <0x0>; | |
| qcom,mipi-sdw-block-packing-mode = <0x0>; | |
| qcom,swr-clock-stop-mode0 = <0x1>; | |
| qcom,swr-num-dev = <0x2>; | |
| qcom,swr-num-ports = <0x8>; | |
| qcom,swr-port-mapping = <0x1 0x1 0x1 0x2 0x2 0xF 0x3 0x3 0x3 0x4 0x5 0x1 0x5 0x6 0xF 0x6 0x7 0x3 0x7 0x4 0x3 0x8 0x8 0x3>; | |
| qcom,swr_master_id = <0x4>; | |
| swrm-io-base = <0x31F0000 0x0>; | |
| wsa883x_2_0221: wsa883x@02170221 { | |
| cdc-vdd-1p8-supply = <&S10B>; | |
| compatible = "qcom,wsa883x_2"; | |
| qcom,cdc-static-supplies = "cdc-vdd-1p8"; | |
| qcom,cdc-vdd-1p8-current = <0x4E20>; | |
| qcom,cdc-vdd-1p8-voltage = <0x1B7740 0x1B7740>; | |
| qcom,lpass-cdc-handle = <&lpass_cdc>; | |
| qcom,spkr-sd-n-node = <&wsa2_spkr_en1>; | |
| reg = <0x2 0x2170221>; | |
| sound-name-prefix = "Spkr2Left"; | |
| }; | |
| wsa883x_2_0222: wsa883x@02170222 { | |
| cdc-vdd-1p8-supply = <&S10B>; | |
| compatible = "qcom,wsa883x_2"; | |
| qcom,cdc-static-supplies = "cdc-vdd-1p8"; | |
| qcom,cdc-vdd-1p8-current = <0x4E20>; | |
| qcom,cdc-vdd-1p8-voltage = <0x1B7740 0x1B7740>; | |
| qcom,lpass-cdc-handle = <&lpass_cdc>; | |
| qcom,spkr-sd-n-node = <&wsa2_spkr_en2>; | |
| reg = <0x2 0x2170222>; | |
| sound-name-prefix = "Spkr2Right"; | |
| }; | |
| }; | |
| }; | |
| }; | |
| &lpi_tlmm { | |
| cdc_dmic01_clk_active: dmic01_clk_active { | |
| config { | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio6"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio6"; | |
| }; | |
| }; | |
| cdc_dmic01_clk_sleep: dmic01_clk_sleep { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x2>; | |
| output-low; | |
| pins = "gpio6"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio6"; | |
| }; | |
| }; | |
| cdc_dmic01_data_active: dmic01_data_active { | |
| config { | |
| drive-strength = <0x8>; | |
| input-enable; | |
| pins = "gpio7"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio7"; | |
| }; | |
| }; | |
| cdc_dmic01_data_sleep: dmic01_data_sleep { | |
| config { | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio7"; | |
| pull-down; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio7"; | |
| }; | |
| }; | |
| cdc_dmic23_clk_active: dmic23_clk_active { | |
| config { | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio8"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio8"; | |
| }; | |
| }; | |
| cdc_dmic23_clk_sleep: dmic23_clk_sleep { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x2>; | |
| output-low; | |
| pins = "gpio8"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio8"; | |
| }; | |
| }; | |
| cdc_dmic23_data_active: dmic23_data_active { | |
| config { | |
| drive-strength = <0x8>; | |
| input-enable; | |
| pins = "gpio9"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio9"; | |
| }; | |
| }; | |
| cdc_dmic23_data_sleep: dmic23_data_sleep { | |
| config { | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio9"; | |
| pull-down; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio9"; | |
| }; | |
| }; | |
| cdc_dmic45_clk_active: dmic45_clk_active { | |
| config { | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio12"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio12"; | |
| }; | |
| }; | |
| cdc_dmic45_clk_sleep: dmic45_clk_sleep { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x2>; | |
| output-low; | |
| pins = "gpio12"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio12"; | |
| }; | |
| }; | |
| cdc_dmic45_data_active: dmic45_data_active { | |
| config { | |
| drive-strength = <0x8>; | |
| input-enable; | |
| pins = "gpio13"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio13"; | |
| }; | |
| }; | |
| cdc_dmic45_data_sleep: dmic45_data_sleep { | |
| config { | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio13"; | |
| pull-down; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio13"; | |
| }; | |
| }; | |
| cdc_dmic67_clk_active: dmic67_clk_active { | |
| config { | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio17"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio17"; | |
| }; | |
| }; | |
| cdc_dmic67_clk_sleep: dmic67_clk_sleep { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x2>; | |
| output-low; | |
| pins = "gpio17"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio17"; | |
| }; | |
| }; | |
| cdc_dmic67_data_active: dmic67_data_active { | |
| config { | |
| drive-strength = <0x8>; | |
| input-enable; | |
| pins = "gpio18"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio18"; | |
| }; | |
| }; | |
| cdc_dmic67_data_sleep: dmic67_data_sleep { | |
| config { | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio18"; | |
| pull-down; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio18"; | |
| }; | |
| }; | |
| lpi_aux1_sck { | |
| lpi_aux1_sck_active: lpi_aux1_sck_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio6"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio6"; | |
| }; | |
| }; | |
| lpi_aux1_sck_sleep: lpi_aux1_sck_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio6"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio6"; | |
| }; | |
| }; | |
| }; | |
| lpi_aux1_sd0 { | |
| lpi_aux1_sd0_active: lpi_aux1_sd0_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio8"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio8"; | |
| }; | |
| }; | |
| lpi_aux1_sd0_sleep: lpi_aux1_sd0_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio8"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio8"; | |
| }; | |
| }; | |
| }; | |
| lpi_aux1_sd1 { | |
| lpi_aux1_sd1_active: lpi_aux1_sd1_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio9"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio9"; | |
| }; | |
| }; | |
| lpi_aux1_sd1_sleep: lpi_aux1_sd1_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio9"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio9"; | |
| }; | |
| }; | |
| }; | |
| lpi_aux1_ws { | |
| lpi_aux1_ws_active: lpi_aux1_ws_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio7"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio7"; | |
| }; | |
| }; | |
| lpi_aux1_ws_sleep: lpi_aux1_ws_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio7"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio7"; | |
| }; | |
| }; | |
| }; | |
| lpi_aux2_sck { | |
| lpi_aux2_sck_active: lpi_aux2_sck_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio10"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio10"; | |
| }; | |
| }; | |
| lpi_aux2_sck_sleep: lpi_aux2_sck_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio10"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio10"; | |
| }; | |
| }; | |
| }; | |
| lpi_aux2_sd0 { | |
| lpi_aux2_sd0_active: lpi_aux2_sd0_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio15"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio15"; | |
| }; | |
| }; | |
| lpi_aux2_sd0_sleep: lpi_aux2_sd0_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio15"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio15"; | |
| }; | |
| }; | |
| }; | |
| lpi_aux2_sd1 { | |
| lpi_aux2_sd1_active: lpi_aux2_sd1_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio16"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio16"; | |
| }; | |
| }; | |
| lpi_aux2_sd1_sleep: lpi_aux2_sd1_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio16"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio16"; | |
| }; | |
| }; | |
| }; | |
| lpi_aux2_ws { | |
| lpi_aux2_ws_active: lpi_aux2_ws_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio11"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio11"; | |
| }; | |
| }; | |
| lpi_aux2_ws_sleep: lpi_aux2_ws_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio11"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio11"; | |
| }; | |
| }; | |
| }; | |
| lpi_aux3_sck { | |
| lpi_aux3_sck_active: lpi_aux3_sck_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio19"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio19"; | |
| }; | |
| }; | |
| lpi_aux3_sck_sleep: lpi_aux3_sck_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio19"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio19"; | |
| }; | |
| }; | |
| }; | |
| lpi_aux3_sd0 { | |
| lpi_aux3_sd0_active: lpi_aux3_sd0_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio21"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio21"; | |
| }; | |
| }; | |
| lpi_aux3_sd0_sleep: lpi_aux3_sd0_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio21"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio21"; | |
| }; | |
| }; | |
| }; | |
| lpi_aux3_sd1 { | |
| lpi_aux3_sd1_active: lpi_aux3_sd1_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio22"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio22"; | |
| }; | |
| }; | |
| lpi_aux3_sd1_sleep: lpi_aux3_sd1_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio22"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio22"; | |
| }; | |
| }; | |
| }; | |
| lpi_aux3_ws { | |
| lpi_aux3_ws_active: lpi_aux3_ws_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio20"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio20"; | |
| }; | |
| }; | |
| lpi_aux3_ws_sleep: lpi_aux3_ws_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio20"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio20"; | |
| }; | |
| }; | |
| }; | |
| lpi_i2s1_sck { | |
| lpi_i2s1_sck_active: lpi_i2s1_sck_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio6"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio6"; | |
| }; | |
| }; | |
| lpi_i2s1_sck_sleep: lpi_i2s1_sck_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio6"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio6"; | |
| }; | |
| }; | |
| }; | |
| lpi_i2s1_sd0 { | |
| lpi_i2s1_sd0_active: lpi_i2s1_sd0_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio8"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio8"; | |
| }; | |
| }; | |
| lpi_i2s1_sd0_sleep: lpi_i2s1_sd0_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio8"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio8"; | |
| }; | |
| }; | |
| }; | |
| lpi_i2s1_sd1 { | |
| lpi_i2s1_sd1_active: lpi_i2s1_sd1_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio9"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio9"; | |
| }; | |
| }; | |
| lpi_i2s1_sd1_sleep: lpi_i2s1_sd1_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio9"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio9"; | |
| }; | |
| }; | |
| }; | |
| lpi_i2s1_ws { | |
| lpi_i2s1_ws_active: lpi_i2s1_ws_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio7"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio7"; | |
| }; | |
| }; | |
| lpi_i2s1_ws_sleep: lpi_i2s1_ws_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio7"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio7"; | |
| }; | |
| }; | |
| }; | |
| lpi_i2s2_sck { | |
| lpi_i2s2_sck_active: lpi_i2s2_sck_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio10"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio10"; | |
| }; | |
| }; | |
| lpi_i2s2_sck_sleep: lpi_i2s2_sck_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio10"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio10"; | |
| }; | |
| }; | |
| }; | |
| lpi_i2s2_sd0 { | |
| lpi_i2s2_sd0_active: lpi_i2s2_sd0_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio15"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio15"; | |
| }; | |
| }; | |
| lpi_i2s2_sd0_sleep: lpi_i2s2_sd0_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio15"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio15"; | |
| }; | |
| }; | |
| }; | |
| lpi_i2s2_sd1 { | |
| lpi_i2s2_sd1_active: lpi_i2s2_sd1_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio16"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio16"; | |
| }; | |
| }; | |
| lpi_i2s2_sd1_sleep: lpi_i2s2_sd1_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio16"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio16"; | |
| }; | |
| }; | |
| }; | |
| lpi_i2s2_ws { | |
| lpi_i2s2_ws_active: lpi_i2s2_ws_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio11"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio11"; | |
| }; | |
| }; | |
| lpi_i2s2_ws_sleep: lpi_i2s2_ws_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio11"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio11"; | |
| }; | |
| }; | |
| }; | |
| lpi_i2s3_sck { | |
| lpi_i2s3_sck_active: lpi_i2s3_sck_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio19"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio19"; | |
| }; | |
| }; | |
| lpi_i2s3_sck_sleep: lpi_i2s3_sck_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio19"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio19"; | |
| }; | |
| }; | |
| }; | |
| lpi_i2s3_sd0 { | |
| lpi_i2s3_sd0_active: lpi_i2s3_sd0_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio21"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio21"; | |
| }; | |
| }; | |
| lpi_i2s3_sd0_sleep: lpi_i2s3_sd0_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio21"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio21"; | |
| }; | |
| }; | |
| }; | |
| lpi_i2s3_sd1 { | |
| lpi_i2s3_sd1_active: lpi_i2s3_sd1_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio22"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio22"; | |
| }; | |
| }; | |
| lpi_i2s3_sd1_sleep: lpi_i2s3_sd1_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio22"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio22"; | |
| }; | |
| }; | |
| }; | |
| lpi_i2s3_ws { | |
| lpi_i2s3_ws_active: lpi_i2s3_ws_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio20"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio20"; | |
| }; | |
| }; | |
| lpi_i2s3_ws_sleep: lpi_i2s3_ws_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio20"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio20"; | |
| }; | |
| }; | |
| }; | |
| lpi_tdm1_sck { | |
| lpi_tdm1_sck_active: lpi_tdm1_sck_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio6"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio6"; | |
| }; | |
| }; | |
| lpi_tdm1_sck_sleep: lpi_tdm1_sck_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio6"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio6"; | |
| }; | |
| }; | |
| }; | |
| lpi_tdm1_sd0 { | |
| lpi_tdm1_sd0_active: lpi_tdm1_sd0_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio8"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio8"; | |
| }; | |
| }; | |
| lpi_tdm1_sd0_sleep: lpi_tdm1_sd0_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio8"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio8"; | |
| }; | |
| }; | |
| }; | |
| lpi_tdm1_sd1 { | |
| lpi_tdm1_sd1_active: lpi_tdm1_sd1_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio9"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio9"; | |
| }; | |
| }; | |
| lpi_tdm1_sd1_sleep: lpi_tdm1_sd1_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio9"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio9"; | |
| }; | |
| }; | |
| }; | |
| lpi_tdm1_ws { | |
| lpi_tdm1_ws_active: lpi_tdm1_ws_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio7"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio7"; | |
| }; | |
| }; | |
| lpi_tdm1_ws_sleep: lpi_tdm1_ws_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio7"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio7"; | |
| }; | |
| }; | |
| }; | |
| lpi_tdm2_sck { | |
| lpi_tdm2_sck_active: lpi_tdm2_sck_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio10"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio10"; | |
| }; | |
| }; | |
| lpi_tdm2_sck_sleep: lpi_tdm2_sck_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio10"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio10"; | |
| }; | |
| }; | |
| }; | |
| lpi_tdm2_sd0 { | |
| lpi_tdm2_sd0_active: lpi_tdm2_sd0_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio15"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio15"; | |
| }; | |
| }; | |
| lpi_tdm2_sd0_sleep: lpi_tdm2_sd0_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio15"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio15"; | |
| }; | |
| }; | |
| }; | |
| lpi_tdm2_sd1 { | |
| lpi_tdm2_sd1_active: lpi_tdm2_sd1_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio16"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio16"; | |
| }; | |
| }; | |
| lpi_tdm2_sd1_sleep: lpi_tdm2_sd1_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio16"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio16"; | |
| }; | |
| }; | |
| }; | |
| lpi_tdm2_ws { | |
| lpi_tdm2_ws_active: lpi_tdm2_ws_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio11"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio11"; | |
| }; | |
| }; | |
| lpi_tdm2_ws_sleep: lpi_tdm2_ws_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio11"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio11"; | |
| }; | |
| }; | |
| }; | |
| lpi_tdm3_sck { | |
| lpi_tdm3_sck_active: lpi_tdm3_sck_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio19"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio19"; | |
| }; | |
| }; | |
| lpi_tdm3_sck_sleep: lpi_tdm3_sck_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio19"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio19"; | |
| }; | |
| }; | |
| }; | |
| lpi_tdm3_sd0 { | |
| lpi_tdm3_sd0_active: lpi_tdm3_sd0_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio21"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio21"; | |
| }; | |
| }; | |
| lpi_tdm3_sd0_sleep: lpi_tdm3_sd0_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio21"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio21"; | |
| }; | |
| }; | |
| }; | |
| lpi_tdm3_sd1 { | |
| lpi_tdm3_sd1_active: lpi_tdm3_sd1_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio22"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio22"; | |
| }; | |
| }; | |
| lpi_tdm3_sd1_sleep: lpi_tdm3_sd1_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio22"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio22"; | |
| }; | |
| }; | |
| }; | |
| lpi_tdm3_ws { | |
| lpi_tdm3_ws_active: lpi_tdm3_ws_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio20"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio20"; | |
| }; | |
| }; | |
| lpi_tdm3_ws_sleep: lpi_tdm3_ws_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio20"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio20"; | |
| }; | |
| }; | |
| }; | |
| quat_aux_sck { | |
| quat_aux_sck_active: quat_aux_sck_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio0"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio0"; | |
| }; | |
| }; | |
| quat_aux_sck_sleep: quat_aux_sck_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio0"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio0"; | |
| }; | |
| }; | |
| }; | |
| quat_aux_sd0 { | |
| quat_aux_sd0_active: quat_aux_sd0_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio2"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio2"; | |
| }; | |
| }; | |
| quat_aux_sd0_sleep: quat_aux_sd0_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio2"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio2"; | |
| }; | |
| }; | |
| }; | |
| quat_aux_sd1 { | |
| quat_aux_sd1_active: quat_aux_sd1_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio3"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio3"; | |
| }; | |
| }; | |
| quat_aux_sd1_sleep: quat_aux_sd1_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio3"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio3"; | |
| }; | |
| }; | |
| }; | |
| quat_aux_sd2 { | |
| quat_aux_sd2_active: quat_aux_sd2_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio4"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio4"; | |
| }; | |
| }; | |
| quat_aux_sd2_sleep: quat_aux_sd2_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio4"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio4"; | |
| }; | |
| }; | |
| }; | |
| quat_aux_sd3 { | |
| quat_aux_sd3_active: quat_aux_sd3_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio5"; | |
| }; | |
| mux { | |
| function = "func3"; | |
| pins = "gpio5"; | |
| }; | |
| }; | |
| quat_aux_sd3_sleep: quat_aux_sd3_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio5"; | |
| }; | |
| mux { | |
| function = "func3"; | |
| pins = "gpio5"; | |
| }; | |
| }; | |
| }; | |
| quat_aux_ws { | |
| quat_aux_ws_active: quat_aux_ws_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio1"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio1"; | |
| }; | |
| }; | |
| quat_aux_ws_sleep: quat_aux_ws_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio1"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio1"; | |
| }; | |
| }; | |
| }; | |
| quat_mi2s_sck { | |
| quat_mi2s_sck_active: quat_mi2s_sck_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio0"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio0"; | |
| }; | |
| }; | |
| quat_mi2s_sck_sleep: quat_mi2s_sck_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio0"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio0"; | |
| }; | |
| }; | |
| }; | |
| quat_mi2s_sd0 { | |
| quat_mi2s_sd0_active: quat_mi2s_sd0_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio2"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio2"; | |
| }; | |
| }; | |
| quat_mi2s_sd0_sleep: quat_mi2s_sd0_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio2"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio2"; | |
| }; | |
| }; | |
| }; | |
| quat_mi2s_sd1 { | |
| quat_mi2s_sd1_active: quat_mi2s_sd1_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio3"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio3"; | |
| }; | |
| }; | |
| quat_mi2s_sd1_sleep: quat_mi2s_sd1_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio3"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio3"; | |
| }; | |
| }; | |
| }; | |
| quat_mi2s_sd2 { | |
| quat_mi2s_sd2_active: quat_mi2s_sd2_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio4"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio4"; | |
| }; | |
| }; | |
| quat_mi2s_sd2_sleep: quat_mi2s_sd2_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio4"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio4"; | |
| }; | |
| }; | |
| }; | |
| quat_mi2s_sd3 { | |
| quat_mi2s_sd3_active: quat_mi2s_sd3_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio5"; | |
| }; | |
| mux { | |
| function = "func3"; | |
| pins = "gpio5"; | |
| }; | |
| }; | |
| quat_mi2s_sd3_sleep: quat_mi2s_sd3_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio5"; | |
| }; | |
| mux { | |
| function = "func3"; | |
| pins = "gpio5"; | |
| }; | |
| }; | |
| }; | |
| quat_mi2s_ws { | |
| quat_mi2s_ws_active: quat_mi2s_ws_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio1"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio1"; | |
| }; | |
| }; | |
| quat_mi2s_ws_sleep: quat_mi2s_ws_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio1"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio1"; | |
| }; | |
| }; | |
| }; | |
| quat_tdm_sck { | |
| quat_tdm_sck_active: quat_tdm_sck_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio0"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio0"; | |
| }; | |
| }; | |
| quat_tdm_sck_sleep: quat_tdm_sck_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio0"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio0"; | |
| }; | |
| }; | |
| }; | |
| quat_tdm_sd0 { | |
| quat_tdm_sd0_active: quat_tdm_sd0_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio2"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio2"; | |
| }; | |
| }; | |
| quat_tdm_sd0_sleep: quat_tdm_sd0_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio2"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio2"; | |
| }; | |
| }; | |
| }; | |
| quat_tdm_sd1 { | |
| quat_tdm_sd1_active: quat_tdm_sd1_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio3"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio3"; | |
| }; | |
| }; | |
| quat_tdm_sd1_sleep: quat_tdm_sd1_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio3"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio3"; | |
| }; | |
| }; | |
| }; | |
| quat_tdm_sd2 { | |
| quat_tdm_sd2_active: quat_tdm_sd2_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio4"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio4"; | |
| }; | |
| }; | |
| quat_tdm_sd2_sleep: quat_tdm_sd2_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio4"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio4"; | |
| }; | |
| }; | |
| }; | |
| quat_tdm_sd3 { | |
| quat_tdm_sd3_active: quat_tdm_sd3_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio5"; | |
| }; | |
| mux { | |
| function = "func3"; | |
| pins = "gpio5"; | |
| }; | |
| }; | |
| quat_tdm_sd3_sleep: quat_tdm_sd3_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio5"; | |
| }; | |
| mux { | |
| function = "func3"; | |
| pins = "gpio5"; | |
| }; | |
| }; | |
| }; | |
| quat_tdm_ws { | |
| quat_tdm_ws_active: quat_tdm_ws_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio1"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio1"; | |
| }; | |
| }; | |
| quat_tdm_ws_sleep: quat_tdm_ws_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio1"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio1"; | |
| }; | |
| }; | |
| }; | |
| rx_swr_clk_active: rx_swr_clk_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x2>; | |
| pins = "gpio3"; | |
| slew-rate = <0x1>; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio3"; | |
| }; | |
| }; | |
| rx_swr_clk_sleep: rx_swr_clk_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio3"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio3"; | |
| }; | |
| }; | |
| rx_swr_data1_active: rx_swr_data1_active { | |
| config { | |
| bias-bus-hold; | |
| drive-strength = <0x2>; | |
| pins = "gpio5"; | |
| slew-rate = <0x1>; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio5"; | |
| }; | |
| }; | |
| rx_swr_data1_sleep: rx_swr_data1_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio5"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio5"; | |
| }; | |
| }; | |
| rx_swr_data_active: rx_swr_data_active { | |
| config { | |
| bias-bus-hold; | |
| drive-strength = <0x2>; | |
| pins = "gpio4"; | |
| slew-rate = <0x1>; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio4"; | |
| }; | |
| }; | |
| rx_swr_data_sleep: rx_swr_data_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio4"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio4"; | |
| }; | |
| }; | |
| tx_swr_clk_active: tx_swr_clk_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x4>; | |
| pins = "gpio0"; | |
| slew-rate = <0x1>; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio0"; | |
| }; | |
| }; | |
| tx_swr_clk_sleep: tx_swr_clk_sleep { | |
| config { | |
| drive-strength = <0x2>; | |
| pins = "gpio0"; | |
| }; | |
| mux { | |
| bias-pull-down; | |
| function = "func1"; | |
| input-enable; | |
| pins = "gpio0"; | |
| }; | |
| }; | |
| tx_swr_data0_active: tx_swr_data0_active { | |
| config { | |
| bias-bus-hold; | |
| drive-strength = <0x4>; | |
| pins = "gpio1"; | |
| slew-rate = <0x1>; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio1"; | |
| }; | |
| }; | |
| tx_swr_data0_sleep: tx_swr_data0_sleep { | |
| config { | |
| bias-bus-hold; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio1"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio1"; | |
| }; | |
| }; | |
| tx_swr_data1_active: tx_swr_data1_active { | |
| config { | |
| bias-bus-hold; | |
| drive-strength = <0x4>; | |
| pins = "gpio2"; | |
| slew-rate = <0x1>; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio2"; | |
| }; | |
| }; | |
| tx_swr_data1_sleep: tx_swr_data1_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio2"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio2"; | |
| }; | |
| }; | |
| tx_swr_data2_active: tx_swr_data2_active { | |
| config { | |
| bias-bus-hold; | |
| drive-strength = <0x4>; | |
| pins = "gpio14"; | |
| slew-rate = <0x1>; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio14"; | |
| }; | |
| }; | |
| tx_swr_data2_sleep: tx_swr_data2_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio14"; | |
| }; | |
| mux { | |
| function = "func1"; | |
| pins = "gpio14"; | |
| }; | |
| }; | |
| wsa2_swr_clk_pin { | |
| wsa2_swr_clk_active: wsa2_swr_clk_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x2>; | |
| pins = "gpio15"; | |
| slew-rate = <0x1>; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio15"; | |
| }; | |
| }; | |
| wsa2_swr_clk_sleep: wsa2_swr_clk_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio15"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio15"; | |
| }; | |
| }; | |
| }; | |
| wsa2_swr_data_pin { | |
| wsa2_swr_data_active: wsa2_swr_data_active { | |
| config { | |
| bias-bus-hold; | |
| drive-strength = <0x2>; | |
| pins = "gpio16"; | |
| slew-rate = <0x1>; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio16"; | |
| }; | |
| }; | |
| wsa2_swr_data_sleep: wsa2_swr_data_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio16"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio16"; | |
| }; | |
| }; | |
| }; | |
| wsa_swr_clk_pin { | |
| wsa_swr_clk_active: wsa_swr_clk_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x2>; | |
| pins = "gpio10"; | |
| slew-rate = <0x1>; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio10"; | |
| }; | |
| }; | |
| wsa_swr_clk_sleep: wsa_swr_clk_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio10"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio10"; | |
| }; | |
| }; | |
| }; | |
| wsa_swr_data_pin { | |
| wsa_swr_data_active: wsa_swr_data_active { | |
| config { | |
| bias-bus-hold; | |
| drive-strength = <0x2>; | |
| pins = "gpio11"; | |
| slew-rate = <0x1>; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio11"; | |
| }; | |
| }; | |
| wsa_swr_data_sleep: wsa_swr_data_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio11"; | |
| }; | |
| mux { | |
| function = "func2"; | |
| pins = "gpio11"; | |
| }; | |
| }; | |
| }; | |
| }; | |
| &mdss_mdp { | |
| connectors = <&sde_dsi &smmu_sde_unsec &smmu_sde_sec &sde_wb &sde_dp &sde_rscc>; | |
| delete-cooling-cells; | |
| mot_csot_ili7838A_667_1080x2400_dsc_cmd: qcom,mdss_dsi_mot_csot_ili7838A_667_1080x2400_dsc_cmd { | |
| compatible = "qcom,mdss-dsi-panel"; | |
| qcom,bl-dsc-cmd-state = "dsi_hs_mode"; | |
| qcom,delect_dc_onoff; | |
| qcom,dsi-ctrl-num = <0x0>; | |
| qcom,dsi-phy-num = <0x0>; | |
| qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0"; | |
| qcom,esd-check-enabled; | |
| qcom,mdss-brightness-max-level = <0x7FF>; | |
| qcom,mdss-dsi-bl-inverted-dbv; | |
| qcom,mdss-dsi-bl-is-exponent; | |
| qcom,mdss-dsi-bl-max-level = <0x7FF>; | |
| qcom,mdss-dsi-bl-min-level = <0x9>; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-border-color = <0x0>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-dc-off-command = [39 00 00 40 00 00 04 FF 78 38 0A 39 00 00 40 00 00 02 2F 20 39 00 00 40 00 00 04 FF 78 38 0C 39 00 00 40 00 00 02 24 12 39 00 00 40 00 00 02 25 00 39 00 00 40 00 00 02 26 12 39 00 00 40 00 00 02 27 50 39 00 00 40 00 00 02 28 00 39 00 00 40 00 00 02 29 A3 39 00 00 40 00 00 02 2A EE 39 00 00 40 00 00 02 2B 11 39 00 00 40 00 00 02 2C 30 39 00 00 40 00 00 02 2D 6A 39 00 00 40 00 00 02 2E 12 39 00 00 40 00 00 02 2F C8 39 00 00 40 00 00 02 30 07 39 00 00 40 00 00 02 31 22 39 00 00 40 00 00 02 32 26 39 00 00 40 00 00 02 33 39 39 00 00 40 00 00 02 85 06 39 00 00 40 00 00 02 86 06 39 00 00 40 00 00 02 87 06 39 00 00 40 00 00 02 88 06 39 00 00 40 00 00 02 89 06 39 00 00 40 00 00 02 8A 06 39 00 00 40 00 00 02 8B 06 39 00 00 40 00 00 02 8C 06 39 00 00 40 00 00 02 8D 06 39 00 00 40 00 00 02 8E 06 39 00 00 40 00 00 02 BF D0 39 00 00 00 00 00 04 FF 78 38 00]; | |
| qcom,mdss-dsi-dc-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-dc-on-command = [39 00 00 40 00 00 04 FF 78 38 0A 39 00 00 40 00 00 02 2F 35 39 00 00 40 00 00 04 FF 78 38 0C 39 00 00 40 00 00 02 24 06 39 00 00 40 00 00 02 25 00 39 00 00 40 00 00 02 26 06 39 00 00 40 00 00 02 27 06 39 00 00 40 00 00 02 28 00 39 00 00 40 00 00 02 29 06 39 00 00 40 00 00 02 2A 06 39 00 00 40 00 00 02 2B 00 39 00 00 40 00 00 02 2C 06 39 00 00 40 00 00 02 2D 06 39 00 00 40 00 00 02 2E 00 39 00 00 40 00 00 02 2F 06 39 00 00 40 00 00 02 30 06 39 00 00 40 00 00 02 31 00 39 00 00 40 00 00 02 32 06 39 00 00 40 00 00 02 33 06 39 00 00 40 00 00 02 85 01 39 00 00 40 00 00 02 86 01 39 00 00 40 00 00 02 87 01 39 00 00 40 00 00 02 88 01 39 00 00 40 00 00 02 89 01 39 00 00 40 00 00 02 8A 01 39 00 00 40 00 00 02 8B 01 39 00 00 40 00 00 02 8C 01 39 00 00 40 00 00 02 8D 01 39 00 00 40 00 00 02 8E 01 39 00 00 40 00 00 02 BF 00 39 00 00 00 00 00 04 FF 78 38 00]; | |
| qcom,mdss-dsi-dc-on-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-hbm-off-command = [39 00 00 40 00 00 04 FF 78 38 0C 39 00 00 40 00 00 02 BF D0 39 00 00 40 00 00 02 CC 00 39 00 00 40 00 00 02 CD 00 39 00 00 00 00 00 04 FF 78 38 00]; | |
| qcom,mdss-dsi-hbm-off-dc-on-command = [39 00 00 40 00 00 04 FF 78 38 0C 39 00 00 40 00 00 02 BF 00 39 00 00 40 00 00 02 CC 00 39 00 00 40 00 00 02 CD 00 39 00 00 00 00 00 04 FF 78 38 00]; | |
| qcom,mdss-dsi-hbm-on-command = [39 00 00 40 78 00 03 51 07 FF 39 00 00 40 00 00 04 FF 78 38 00 39 00 00 40 00 00 02 53 20 39 00 00 40 00 00 04 FF 78 38 0C 39 00 00 40 00 00 02 BF 00 39 00 00 40 00 00 02 DA 37 39 00 00 40 00 00 02 DB 2D 39 00 00 40 00 00 02 CC 07 39 00 00 40 00 00 02 CD FF 39 00 00 00 00 00 04 FF 78 38 00]; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-lp11-init; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-no-panel-on-read-support; | |
| qcom,mdss-dsi-panel-blackness-level = <0x64>; | |
| qcom,mdss-dsi-panel-hdr-color-primaries = <0x3A66 0x3D86 0x84D0 0x3E80 0x32C8 0x8AAC 0x1B58 0x9C4>; | |
| qcom,mdss-dsi-panel-hdr-enabled; | |
| qcom,mdss-dsi-panel-name = "mipi_mot_cmd_csot_ili_1080p_dsc_667"; | |
| qcom,mdss-dsi-panel-param-num = <0x5>; | |
| qcom,mdss-dsi-panel-param-verision = <0x1D971>; | |
| qcom,mdss-dsi-panel-peak-brightness = <0x4C4B40>; | |
| qcom,mdss-dsi-panel-status-check-mode = "reg_read"; | |
| qcom,mdss-dsi-panel-status-command = <0x6010001 0x10A>; | |
| qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-status-read-length = <0x1>; | |
| qcom,mdss-dsi-panel-status-value = <0x9C>; | |
| qcom,mdss-dsi-panel-supplier = "csot"; | |
| qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; | |
| qcom,mdss-dsi-reset-sequence = <0x0 0xB 0x1 0x1 0x0 0x1 0x1 0xB>; | |
| qcom,mdss-dsi-stream = <0x0>; | |
| qcom,mdss-dsi-te-dcs-command = <0x1>; | |
| qcom,mdss-dsi-te-pin-select = <0x1>; | |
| qcom,mdss-dsi-te-using-te-pin; | |
| qcom,mdss-dsi-traffic-mode = "burst_mode"; | |
| qcom,mdss-dsi-tx-eot-append; | |
| qcom,mdss-dsi-underflow-color = <0xFF>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x0>; | |
| qcom,mdss-pan-physical-height-dimension = <0x9A>; | |
| qcom,mdss-pan-physical-width-dimension = <0x45>; | |
| qcom,panel-supply-entries = <&dsi_panel_pwr_supply_ili>; | |
| qcom,platform-reset-gpio = <&tlmm 0x0 0x0>; | |
| qcom,mdss-dsi-display-timings { | |
| timing@0 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = [39 01 00 00 00 00 04 FF 78 38 00 05 01 00 00 16 00 01 28 05 01 00 00 78 00 01 10]; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = [39 01 00 00 00 00 04 FF 78 38 08 39 01 00 00 00 00 02 45 4C 39 01 00 00 00 00 04 FF 78 38 07 39 01 00 00 00 00 02 29 01 39 01 00 00 00 00 04 FF 78 38 0D 39 01 00 00 00 00 02 03 4E 39 01 00 00 00 00 02 04 52 39 01 00 00 00 00 02 05 50 39 01 00 00 00 00 02 06 1F 39 01 00 00 00 00 02 0E 16 39 01 00 00 00 00 02 0F 69 39 01 00 00 00 00 02 10 81 39 01 00 00 00 00 02 11 01 39 01 00 00 00 00 02 12 01 39 01 00 00 00 00 02 13 44 39 01 00 00 00 00 02 14 33 39 01 00 00 00 00 02 15 00 39 01 00 00 00 00 04 FF 78 38 06 39 01 00 00 00 00 02 C7 00 39 01 00 00 00 00 04 FF 78 38 0F 39 01 00 00 00 00 02 C8 78 39 01 00 00 00 00 02 C9 46 39 01 00 00 00 00 04 FF 78 38 02 39 01 00 00 00 00 02 38 23 39 01 00 00 00 00 02 44 90 39 01 00 00 00 00 02 45 09 39 01 00 00 00 00 04 FF 78 38 05 39 01 00 00 00 00 02 1D 68 39 01 00 00 00 00 04 FF 78 38 0C 39 01 00 00 00 00 02 E3 01 39 01 00 00 00 00 04 FF 78 38 3A 39 01 00 00 00 00 07 00 00 00 00 00 00 00 39 01 00 00 00 00 04 FF 78 38 0C 39 01 00 00 00 00 02 E3 00 39 01 00 00 00 00 04 FF 78 38 00 39 01 00 00 00 00 02 53 20 39 01 00 00 00 00 03 51 00 00 15 01 00 00 00 00 02 35 00 05 01 00 00 78 00 01 11 05 01 00 00 16 00 01 29]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x3C>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 10 03 03 11 1E 04 04 03 02 04 00 0E 08]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = [39 00 00 40 00 00 04 FF 78 38 02 39 00 00 40 00 00 02 38 23 39 00 00 40 00 00 02 44 90 39 00 00 40 00 00 02 45 09 39 00 00 00 10 00 04 FF 78 38 00]; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| timing@1 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = [39 01 00 00 00 00 04 FF 78 38 00 05 01 00 00 16 00 01 28 05 01 00 00 78 00 01 10]; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = [39 01 00 00 00 00 04 FF 78 38 08 39 01 00 00 00 00 02 45 4C 39 01 00 00 00 00 04 FF 78 38 07 39 01 00 00 00 00 02 29 01 39 01 00 00 00 00 04 FF 78 38 0D 39 01 00 00 00 00 02 03 4E 39 01 00 00 00 00 02 04 52 39 01 00 00 00 00 02 05 50 39 01 00 00 00 00 02 06 1F 39 01 00 00 00 00 02 0E 16 39 01 00 00 00 00 02 0F 69 39 01 00 00 00 00 02 10 81 39 01 00 00 00 00 02 11 01 39 01 00 00 00 00 02 12 01 39 01 00 00 00 00 02 13 44 39 01 00 00 00 00 02 14 33 39 01 00 00 00 00 02 15 00 39 01 00 00 00 00 04 FF 78 38 06 39 01 00 00 00 00 02 C7 00 39 01 00 00 00 00 04 FF 78 38 0F 39 01 00 00 00 00 02 C8 78 39 01 00 00 00 00 02 C9 46 39 01 00 00 00 00 04 FF 78 38 02 39 01 00 00 00 00 02 38 22 39 01 00 00 00 00 02 42 30 39 01 00 00 00 00 02 43 03 39 01 00 00 00 00 04 FF 78 38 05 39 01 00 00 00 00 02 1D 68 39 01 00 00 00 00 04 FF 78 38 0C 39 01 00 00 00 00 02 E3 01 39 01 00 00 00 00 04 FF 78 38 3A 39 01 00 00 00 00 07 00 00 00 00 00 00 00 39 01 00 00 00 00 04 FF 78 38 0C 39 01 00 00 00 00 02 E3 00 39 01 00 00 00 00 04 FF 78 38 00 39 01 00 00 00 00 02 53 20 39 01 00 00 00 00 03 51 00 00 15 01 00 00 00 00 02 35 00 05 01 00 00 78 00 01 11 05 01 00 00 16 00 01 29]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x5A>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 16 05 05 14 1F 06 06 06 02 04 00 13 0A]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = [39 00 00 40 00 00 04 FF 78 38 02 39 00 00 40 00 00 02 38 22 39 00 00 40 00 00 02 42 30 39 00 00 40 00 00 02 43 03 39 00 00 00 11 00 04 FF 78 38 00]; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| timing@2 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = [39 01 00 00 00 00 04 FF 78 38 00 05 01 00 00 16 00 01 28 05 01 00 00 78 00 01 10]; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = [39 01 00 00 00 00 04 FF 78 38 08 39 01 00 00 00 00 02 45 4C 39 01 00 00 00 00 04 FF 78 38 07 39 01 00 00 00 00 02 29 01 39 01 00 00 00 00 04 FF 78 38 0D 39 01 00 00 00 00 02 03 4E 39 01 00 00 00 00 02 04 52 39 01 00 00 00 00 02 05 50 39 01 00 00 00 00 02 06 1F 39 01 00 00 00 00 02 0E 16 39 01 00 00 00 00 02 0F 69 39 01 00 00 00 00 02 10 81 39 01 00 00 00 00 02 11 01 39 01 00 00 00 00 02 12 01 39 01 00 00 00 00 02 13 44 39 01 00 00 00 00 02 14 33 39 01 00 00 00 00 02 15 00 39 01 00 00 00 00 04 FF 78 38 06 39 01 00 00 00 00 02 C7 00 39 01 00 00 00 00 04 FF 78 38 0F 39 01 00 00 00 00 02 C8 78 39 01 00 00 00 00 02 C9 46 39 01 00 00 00 00 04 FF 78 38 02 39 01 00 00 00 00 02 38 22 39 01 00 00 00 00 02 42 00 39 01 00 00 00 00 02 43 00 39 01 00 00 00 00 04 FF 78 38 05 39 01 00 00 00 00 02 1D 68 39 01 00 00 00 00 04 FF 78 38 0C 39 01 00 00 00 00 02 E3 01 39 01 00 00 00 00 04 FF 78 38 3A 39 01 00 00 00 00 07 00 00 00 00 00 00 00 39 01 00 00 00 00 04 FF 78 38 0C 39 01 00 00 00 00 02 E3 00 39 01 00 00 00 00 04 FF 78 38 00 39 01 00 00 00 00 02 53 20 39 01 00 00 00 00 03 51 00 00 15 01 00 00 00 00 02 35 00 05 01 00 00 78 00 01 11 05 01 00 00 16 00 01 29]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x78>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 1C 07 07 17 15 07 07 08 02 04 00 18 0C]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = [39 00 00 40 00 00 04 FF 78 38 02 39 00 00 40 00 00 02 38 22 39 00 00 40 00 00 02 42 00 39 00 00 40 00 00 02 43 00 39 00 00 00 08 00 04 FF 78 38 00]; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| timing@3 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = [39 01 00 00 00 00 04 FF 78 38 00 05 01 00 00 16 00 01 28 05 01 00 00 78 00 01 10]; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = <0x39010000 0x4FF 0x78380839 0x1000000 0x2454C 0x39010000 0x4FF 0x78380739 0x1000000 0x22901 0x39010000 0x4FF 0x78380D39 0x1000000 0x2034E 0x39010000 0x204 0x52390100 0x2 0x5503901 0x0 0x2061F39 0x1000000 0x20E16 0x39010000 0x20F 0x69390100 0x2 0x10813901 0x0 0x2110139 0x1000000 0x21201 0x39010000 0x213 0x44390100 0x2 0x14333901 0x0 0x2150039 0x1000000 0x4FF78 0x38063901 0x0 0x2C70039 0x1000000 0x4FF78 0x380F3901 0x0 0x2C87839 0x1000000 0x2C946 0x39010000 0x4FF 0x78380239 0x1000000 0x23821 0x39010000 0x4FF 0x78380539 0x1000000 0x21D68 0x39010000 0x4FF 0x78380C39 0x1000000 0x2E301 0x39010000 0x4FF 0x78383A39 0x1000000 0x70000 0x0 0x390100 0x4 0xFF78380C 0x39010000 0x2E3 0x390100 0x4 0xFF783800 0x39010000 0x253 0x20390100 0x3 0x51000015 0x1000000 0x23500 0x5010000 0x78000111 0x5010000 0x16000129>; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x90>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 20 08 08 18 23 08 08 08 02 04 00 1B 0D]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = [39 00 00 40 00 00 04 FF 78 38 02 39 00 00 40 00 00 02 38 21 39 00 00 00 06 00 04 FF 78 38 00]; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| timing@4 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = [39 01 00 00 00 00 04 FF 78 38 00 05 01 00 00 16 00 01 28 05 01 00 00 78 00 01 10]; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = [39 01 00 00 00 00 04 FF 78 38 08 39 01 00 00 00 00 02 45 4C 39 01 00 00 00 00 04 FF 78 38 07 39 01 00 00 00 00 02 29 01 39 01 00 00 00 00 04 FF 78 38 0D 39 01 00 00 00 00 02 03 4E 39 01 00 00 00 00 02 04 52 39 01 00 00 00 00 02 05 50 39 01 00 00 00 00 02 06 1F 39 01 00 00 00 00 02 0E 16 39 01 00 00 00 00 02 0F 69 39 01 00 00 00 00 02 10 81 39 01 00 00 00 00 02 11 01 39 01 00 00 00 00 02 12 01 39 01 00 00 00 00 02 13 44 39 01 00 00 00 00 02 14 33 39 01 00 00 00 00 02 15 00 39 01 00 00 00 00 04 FF 78 38 06 39 01 00 00 00 00 02 C7 00 39 01 00 00 00 00 04 FF 78 38 0F 39 01 00 00 00 00 02 C8 78 39 01 00 00 00 00 02 C9 46 39 01 00 00 00 00 04 FF 78 38 02 39 01 00 00 00 00 02 38 23 39 01 00 00 00 00 02 44 58 39 01 00 00 00 00 02 45 0E 39 01 00 00 00 00 04 FF 78 38 05 39 01 00 00 00 00 02 1D 68 39 01 00 00 00 00 04 FF 78 38 0C 39 01 00 00 00 00 02 E3 01 39 01 00 00 00 00 04 FF 78 38 3A 39 01 00 00 00 00 07 00 00 00 00 00 00 00 39 01 00 00 00 00 04 FF 78 38 0C 39 01 00 00 00 00 02 E3 00 39 01 00 00 00 00 04 FF 78 38 00 39 01 00 00 00 00 02 53 20 39 01 00 00 00 00 03 51 00 00 15 01 00 00 00 00 02 35 00 05 01 00 00 78 00 01 11 05 01 00 00 16 00 01 29]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x30>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 0D 03 03 10 1D 04 03 02 02 04 00 0C 08]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = [39 00 00 40 00 00 04 FF 78 38 02 39 00 00 40 00 00 02 38 23 39 00 00 40 00 00 02 44 58 39 00 00 40 00 00 02 45 0E 39 00 00 00 14 00 04 FF 78 38 00]; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| }; | |
| }; | |
| mot_csot_nt37701A_667_curve_1080x2400_dsc_cmd: qcom,mdss_dsi_mot_csot_nt37701A_667_curve_1080x2400_dsc_cmd { | |
| compatible = "qcom,mdss-dsi-panel"; | |
| qcom,bl-dsc-cmd-state = "dsi_hs_mode"; | |
| qcom,dsi-ctrl-num = <0x0>; | |
| qcom,dsi-phy-num = <0x0>; | |
| qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0"; | |
| qcom,mdss-brightness-max-level = <0xDBB>; | |
| qcom,mdss-dsi-bl-inverted-dbv; | |
| qcom,mdss-dsi-bl-is-exponent; | |
| qcom,mdss-dsi-bl-max-level = <0xDBB>; | |
| qcom,mdss-dsi-bl-min-level = <0x9>; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-border-color = <0x0>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-dc-off-command = <0x39000000 0x6F0 0x55AA5208 0x390000 0x40000002 0xB2183900 0x400000 0x26F0F39 0x4000 0x9B260 0x5065E985 0xE92FFF39 0x0 0x25B300 0x1015901 0x59021A02 0x1A030A03 0xA040004 0x5E905 0xE905EA05 0xEA090809 0x80DBB0D 0xBB0FFF39 0x0 0x25800>; | |
| qcom,mdss-dsi-dc-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-dc-on-command = <0x39000000 0x6F0 0x55AA5208 0x390000 0x40000002 0xB2983900 0x400000 0x26F0F39 0x4000 0x9B260 0x50600080 0x2FFF39 0x0 0x25B300 0x0 0x0 0x0 0x0 0x0 0x5 0xEA090809 0x80DBB0D 0xBB0FFF39 0x0 0x25801>; | |
| qcom,mdss-dsi-dc-on-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-hbm-off-command = [39 00 00 00 00 00 03 51 0D BB]; | |
| qcom,mdss-dsi-hbm-on-command = [39 00 00 00 00 00 03 51 0F FF]; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-lp11-init; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-no-panel-on-read-support; | |
| qcom,mdss-dsi-panel-blackness-level = <0x64>; | |
| qcom,mdss-dsi-panel-hdr-color-primaries = <0x3A66 0x3D86 0x84D0 0x3E80 0x32C8 0x8AAC 0x1B58 0x9C4>; | |
| qcom,mdss-dsi-panel-hdr-enabled; | |
| qcom,mdss-dsi-panel-name = "mipi_mot_cmd_csot_1080p_dsc_667"; | |
| qcom,mdss-dsi-panel-param-num = <0x5>; | |
| qcom,mdss-dsi-panel-param-verision = <0x1D971>; | |
| qcom,mdss-dsi-panel-peak-brightness = <0x4C4B40>; | |
| qcom,mdss-dsi-panel-status-check-mode = "reg_read"; | |
| qcom,mdss-dsi-panel-status-command = <0x6010001 0x10A>; | |
| qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-status-read-length = <0x1>; | |
| qcom,mdss-dsi-panel-status-value = <0x9C>; | |
| qcom,mdss-dsi-panel-supplier = "csot"; | |
| qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; | |
| qcom,mdss-dsi-reset-sequence = <0x0 0xB 0x1 0x1 0x0 0x1 0x1 0xB>; | |
| qcom,mdss-dsi-stream = <0x0>; | |
| qcom,mdss-dsi-te-dcs-command = <0x1>; | |
| qcom,mdss-dsi-te-pin-select = <0x1>; | |
| qcom,mdss-dsi-te-using-te-pin; | |
| qcom,mdss-dsi-traffic-mode = "burst_mode"; | |
| qcom,mdss-dsi-tx-eot-append; | |
| qcom,mdss-dsi-underflow-color = <0xFF>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x0>; | |
| qcom,mdss-pan-physical-height-dimension = <0x9A>; | |
| qcom,mdss-pan-physical-width-dimension = <0x45>; | |
| qcom,mot_nt37701A_read_cellid; | |
| qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; | |
| qcom,platform-reset-gpio = <&tlmm 0x0 0x0>; | |
| qcom,mdss-dsi-display-timings { | |
| timing@0 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = <0x5010000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = [39 01 00 00 00 00 06 F0 55 AA 52 08 00 39 01 00 00 00 00 02 6F 1C 39 01 00 00 00 00 06 C0 03 14 25 A9 78 39 01 00 00 00 00 06 F0 55 AA 52 08 00 39 01 00 00 00 00 02 6F 06 39 01 00 00 00 00 04 B5 2B 1C 32 39 01 00 00 00 00 02 6F 10 39 01 00 00 00 00 06 B5 1C 1C 1C 1C 1C 39 01 00 00 00 00 05 FF AA 55 A5 80 39 01 00 00 00 00 02 6F 1D 39 01 00 00 00 00 02 F2 05 39 01 00 00 00 00 02 03 01 39 01 00 00 00 00 02 90 01 39 01 00 00 00 00 13 91 AB 28 00 0C C2 00 03 1C 01 7E 00 0F 08 BB 04 3D 10 F0 39 01 00 00 00 00 01 2C 39 01 00 00 00 00 03 51 00 00 39 01 00 00 00 00 02 53 20 05 01 00 00 00 00 01 35 39 01 00 00 00 00 05 2A 00 00 04 37 39 01 00 00 00 00 05 2B 00 00 09 5F 39 01 00 00 00 00 02 2F 03 05 01 00 00 78 00 01 11 05 01 00 00 00 00 01 29 39 00 00 00 00 00 06 F0 55 AA 52 08 04 39 00 00 00 00 00 02 6F 0A 39 00 00 00 00 00 07 E7 5B 54 50 40 40 40 39 00 00 00 00 00 02 6F 23 39 00 00 00 00 00 07 E7 60 58 55 40 40 66 39 00 00 00 00 00 02 6F 3C 39 00 00 00 00 00 07 E7 48 3A 3A 3A 40 40]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x3C>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 10 03 03 11 1E 04 04 03 02 04 00 0E 08]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = [15 01 00 00 10 00 02 2F 03]; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| timing@1 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = <0x5010000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = [39 01 00 00 00 00 06 F0 55 AA 52 08 00 39 01 00 00 00 00 02 6F 1C 39 01 00 00 00 00 06 C0 03 14 25 A9 78 39 01 00 00 00 00 06 F0 55 AA 52 08 00 39 01 00 00 00 00 02 6F 06 39 01 00 00 00 00 04 B5 2B 1C 32 39 01 00 00 00 00 02 6F 10 39 01 00 00 00 00 06 B5 1C 1C 1C 1C 1C 39 01 00 00 00 00 05 FF AA 55 A5 80 39 01 00 00 00 00 02 6F 1D 39 01 00 00 00 00 02 F2 05 39 01 00 00 00 00 02 03 01 39 01 00 00 00 00 02 90 01 39 01 00 00 00 00 13 91 AB 28 00 0C C2 00 03 1C 01 7E 00 0F 08 BB 04 3D 10 F0 39 01 00 00 00 00 01 2C 39 01 00 00 00 00 03 51 00 00 39 01 00 00 00 00 02 53 20 05 01 00 00 00 00 01 35 39 01 00 00 00 00 05 2A 00 00 04 37 39 01 00 00 00 00 05 2B 00 00 09 5F 39 01 00 00 00 00 02 2F 07 05 01 00 00 78 00 01 11 05 01 00 00 00 00 01 29 39 00 00 00 00 00 06 F0 55 AA 52 08 04 39 00 00 00 00 00 02 6F 0A 39 00 00 00 00 00 07 E7 5B 54 50 40 40 40 39 00 00 00 00 00 02 6F 23 39 00 00 00 00 00 07 E7 60 58 55 40 40 66 39 00 00 00 00 00 02 6F 3C 39 00 00 00 00 00 07 E7 48 3A 3A 3A 40 40]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x5A>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 16 05 05 14 1F 06 06 06 02 04 00 13 0A]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = [15 01 00 00 10 00 02 2F 07]; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| timing@2 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = <0x5010000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = [39 01 00 00 00 00 06 F0 55 AA 52 08 00 39 01 00 00 00 00 02 6F 1C 39 01 00 00 00 00 06 C0 03 14 25 A9 78 39 01 00 00 00 00 06 F0 55 AA 52 08 00 39 01 00 00 00 00 02 6F 06 39 01 00 00 00 00 04 B5 2B 1C 32 39 01 00 00 00 00 02 6F 10 39 01 00 00 00 00 06 B5 1C 1C 1C 1C 1C 39 01 00 00 00 00 05 FF AA 55 A5 80 39 01 00 00 00 00 02 6F 1D 39 01 00 00 00 00 02 F2 05 39 01 00 00 00 00 02 03 01 39 01 00 00 00 00 02 90 01 39 01 00 00 00 00 13 91 AB 28 00 0C C2 00 03 1C 01 7E 00 0F 08 BB 04 3D 10 F0 39 01 00 00 00 00 01 2C 39 01 00 00 00 00 03 51 00 00 39 01 00 00 00 00 02 53 20 05 01 00 00 00 00 01 35 39 01 00 00 00 00 05 2A 00 00 04 37 39 01 00 00 00 00 05 2B 00 00 09 5F 39 01 00 00 00 00 02 2F 02 05 01 00 00 78 00 01 11 05 01 00 00 00 00 01 29 39 00 00 00 00 00 06 F0 55 AA 52 08 04 39 00 00 00 00 00 02 6F 0A 39 00 00 00 00 00 07 E7 5B 54 50 40 40 40 39 00 00 00 00 00 02 6F 23 39 00 00 00 00 00 07 E7 60 58 55 40 40 66 39 00 00 00 00 00 02 6F 3C 39 00 00 00 00 00 07 E7 48 3A 3A 3A 40 40]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x78>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 1C 07 07 17 15 07 07 08 02 04 00 18 0C]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = [15 01 00 00 10 00 02 2F 02]; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| timing@3 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = <0x5010000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = [39 01 00 00 00 00 06 F0 55 AA 52 08 00 39 01 00 00 00 00 02 6F 1C 39 01 00 00 00 00 06 C0 03 14 25 A9 78 39 01 00 00 00 00 06 F0 55 AA 52 08 00 39 01 00 00 00 00 02 6F 06 39 01 00 00 00 00 04 B5 2B 1C 32 39 01 00 00 00 00 02 6F 10 39 01 00 00 00 00 06 B5 1C 1C 1C 1C 1C 39 01 00 00 00 00 05 FF AA 55 A5 80 39 01 00 00 00 00 02 6F 1D 39 01 00 00 00 00 02 F2 05 39 01 00 00 00 00 02 03 01 39 01 00 00 00 00 02 90 01 39 01 00 00 00 00 13 91 AB 28 00 0C C2 00 03 1C 01 7E 00 0F 08 BB 04 3D 10 F0 39 01 00 00 00 00 01 2C 39 01 00 00 00 00 03 51 00 00 39 01 00 00 00 00 02 53 20 05 01 00 00 00 00 01 35 39 01 00 00 00 00 05 2A 00 00 04 37 39 01 00 00 00 00 05 2B 00 00 09 5F 39 01 00 00 00 00 02 2F 04 05 01 00 00 78 00 01 11 05 01 00 00 00 00 01 29 39 00 00 00 00 00 06 F0 55 AA 52 08 04 39 00 00 00 00 00 02 6F 0A 39 00 00 00 00 00 07 E7 5B 54 50 40 40 40 39 00 00 00 00 00 02 6F 23 39 00 00 00 00 00 07 E7 60 58 55 40 40 66 39 00 00 00 00 00 02 6F 3C 39 00 00 00 00 00 07 E7 48 3A 3A 3A 40 40]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x90>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 20 08 08 18 23 08 08 08 02 04 00 1B 0D]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = [15 01 00 00 10 00 02 2F 04]; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| timing@4 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = <0x5010000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = [39 01 00 00 00 00 06 F0 55 AA 52 08 00 39 01 00 00 00 00 02 6F 1C 39 01 00 00 00 00 06 C0 03 14 25 A9 78 39 01 00 00 00 00 06 F0 55 AA 52 08 00 39 01 00 00 00 00 02 6F 06 39 01 00 00 00 00 04 B5 2B 1C 32 39 01 00 00 00 00 02 6F 10 39 01 00 00 00 00 06 B5 1C 1C 1C 1C 1C 39 01 00 00 00 00 05 FF AA 55 A5 80 39 01 00 00 00 00 02 6F 1D 39 01 00 00 00 00 02 F2 05 39 01 00 00 00 00 02 03 01 39 01 00 00 00 00 02 90 01 39 01 00 00 00 00 13 91 AB 28 00 0C C2 00 03 1C 01 7E 00 0F 08 BB 04 3D 10 F0 39 01 00 00 00 00 01 2C 39 01 00 00 00 00 03 51 00 00 39 01 00 00 00 00 02 53 20 05 01 00 00 00 00 01 35 39 01 00 00 00 00 05 2A 00 00 04 37 39 01 00 00 00 00 05 2B 00 00 09 5F 39 01 00 00 00 00 02 2F 08 05 01 00 00 78 00 01 11 05 01 00 00 00 00 01 29 39 00 00 00 00 00 06 F0 55 AA 52 08 04 39 00 00 00 00 00 02 6F 0A 39 00 00 00 00 00 07 E7 5B 54 50 40 40 40 39 00 00 00 00 00 02 6F 23 39 00 00 00 00 00 07 E7 60 58 55 40 40 66 39 00 00 00 00 00 02 6F 3C 39 00 00 00 00 00 07 E7 48 3A 3A 3A 40 40]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x30>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 0D 03 03 10 1D 04 03 02 02 04 00 0C 08]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = [15 01 00 00 10 00 02 2F 08]; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| }; | |
| }; | |
| mot_csot_nt37701A_667_curve_1080x2400_dsc_cmd_v1: qcom,mdss_dsi_mot_csot_nt37701A_667_curve_1080x2400_dsc_cmd_v1 { | |
| compatible = "qcom,mdss-dsi-panel"; | |
| qcom,bl-dsc-cmd-state = "dsi_hs_mode"; | |
| qcom,dsi-ctrl-num = <0x0>; | |
| qcom,dsi-phy-num = <0x0>; | |
| qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0"; | |
| qcom,mdss-brightness-max-level = <0xDBB>; | |
| qcom,mdss-dsi-bl-inverted-dbv; | |
| qcom,mdss-dsi-bl-is-exponent; | |
| qcom,mdss-dsi-bl-max-level = <0xDBB>; | |
| qcom,mdss-dsi-bl-min-level = <0x9>; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-border-color = <0x0>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-dc-off-command = <0x39000000 0x6F0 0x55AA5208 0x390000 0x40000002 0xB2183900 0x400000 0x26F0F39 0x4000 0x9B260 0x5065E985 0xE92FFF39 0x0 0x25B300 0x1015901 0x59021A02 0x1A030A03 0xA040004 0x5E905 0xE905EA05 0xEA090809 0x80DBB0D 0xBB0FFF39 0x0 0x25800>; | |
| qcom,mdss-dsi-dc-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-dc-on-command = <0x39000000 0x6F0 0x55AA5208 0x390000 0x40000002 0xB2983900 0x400000 0x26F0F39 0x4000 0x9B260 0x50600080 0x2FFF39 0x0 0x25B300 0x0 0x0 0x0 0x0 0x0 0x5 0xEA090809 0x80DBB0D 0xBB0FFF39 0x0 0x25801>; | |
| qcom,mdss-dsi-dc-on-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-hbm-fod; | |
| qcom,mdss-dsi-hbm-fod-on-command = <0x39000040 0x6F0 0x55AA5208 0x2390000 0x40000003 0x510FFF39 0x4000 0x3871F 0xFF390000 0x40000002 0x88013900 0x400000 0x26F0139 0x4000 0x58802 0x1C086839 0x0 0x28501>; | |
| qcom,mdss-dsi-hbm-off-command = <0x39000000 0x387 0xFFF1500 0x0 0x2880115 0x0 0x28601>; | |
| qcom,mdss-dsi-hbm-on-command = [39 00 00 00 00 00 03 51 0F FF 39 00 00 00 00 00 03 87 0F FF 15 00 00 00 00 00 02 88 01 15 01 00 00 00 00 02 86 01]; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-lp11-init; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-no-panel-on-read-support; | |
| qcom,mdss-dsi-panel-blackness-level = <0x64>; | |
| qcom,mdss-dsi-panel-hdr-color-primaries = <0x3A66 0x3D86 0x84D0 0x3E80 0x32C8 0x8AAC 0x1B58 0x9C4>; | |
| qcom,mdss-dsi-panel-hdr-enabled; | |
| qcom,mdss-dsi-panel-local-hbm-alpha-register = <0x87>; | |
| qcom,mdss-dsi-panel-local-hbm-alpha-size = <0x1000>; | |
| qcom,mdss-dsi-panel-local-hbm-alpha-table = <0x111D 0x111D 0x111D 0x111D 0x111D 0x111D 0x111D 0x111D 0x111D 0x111D 0x111D 0x111D 0x111D 0x111D 0x111D 0x111D 0x111D 0x111D 0x111D 0x111E 0x111E 0x111E 0x111E 0x111E 0x111E 0x111E 0x111E 0x111E 0x111E 0x111E 0x111E 0x111E 0x111E 0x111E 0x111E 0x111E 0x111F 0x111F 0x111F 0x111F 0x111F 0x111F 0x111F 0x111F 0x111F 0x111F 0x111F 0x1120 0x1120 0x1120 0x1120 0x1120 0x1120 0x1120 0x1120 0x1121 0x1121 0x1121 0x1121 0x1121 0x1121 0x1121 0x1122 0x1122 0x1122 0x1122 0x1122 0x1122 0x1123 0x1123 0x1123 0x1123 0x1123 0x1123 0x1124 0x1124 0x1124 0x1124 0x1124 0x1125 0x1125 0x1125 0x1125 0x1125 0x1126 0x1126 0x1126 0x1126 0x1127 0x1127 0x1127 0x1127 0x1127 0x1128 0x1128 0x1128 0x1128 0x1129 0x1129 0x1129 0x112A 0x112A 0x112A 0x112A 0x112B 0x112B 0x112B 0x112B 0x112C 0x112C 0x112C 0x112D 0x112D 0x112D 0x112E 0x112E 0x112E 0x112E 0x112F 0x112F 0x112F 0x1130 0x1130 0x1130 0x1131 0x1131 0x1131 0x1132 0x1132 0x1132 0x1133 0x1133 0x1134 0x1134 0x1134 0x1135 0x1135 0x1135 0x1136 0x1136 0x1136 0x1137 0x1137 0x1138 0x1138 0x1138 0x1139 0x1139 0x113A 0x113A 0x113A 0x113B 0x113B 0x113C 0x113C 0x113C 0x113D 0x113D 0x113E 0x113E 0x113F 0x113F 0x113F 0x1140 0x1140 0x1141 0x1141 0x1142 0x1142 0x1143 0x1143 0x1143 0x1144 0x1144 0x1145 0x1145 0x1146 0x1146 0x1147 0x1147 0x1148 0x1148 0x1149 0x1149 0x114A 0x114A 0x114B 0x114B 0x114C 0x114C 0x114D 0x114D 0x114E 0x114E 0x114F 0x114F 0x1150 0x1150 0x1151 0x1151 0x1152 0x1152 0x1153 0x1153 0x1154 0x1155 0x1155 0x1156 0x1156 0x1157 0x1157 0x1158 0x1158 0x1159 0x1159 0x115A 0x115B 0x115B 0x115C 0x115C 0x115D 0x115D 0x115E 0x115F 0x115F 0x1160 0x1160 0x1161 0x1161 0x1162 0x1163 0x1163 0x1164 0x1164 0x1165 0x1166 0x1166 0x1167 0x1167 0x1168 0x1169 0x1169 0x116A 0x116A 0x116B 0x116C 0x116C 0x116D 0x116E 0x116E 0x116F 0x116F 0x1170 0x1171 0x1171 0x1172 0x1173 0x1173 0x1174 0x1175 0x1175 0x1176 0x1176 0x1177 0x1178 0x1178 0x1179 0x117A 0x117A 0x117B 0x117C 0x117C 0x117D 0x117E 0x117E 0x117F 0x1180 0x1180 0x1181 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0x1F0F 0x1F10 0x1F11 0x1F12 0x1F13 0x1F14 0x1F15 0x1F16 0x1F17 0x1F18 0x1F19 0x1F1A 0x1F1B 0x1F1C 0x1F1D 0x1F1E 0x1F1F 0x1F20 0x1F21 0x1F22 0x1F23 0x1F24 0x1F25 0x1F26 0x1F27 0x1F28 0x1F29 0x1F2A 0x1F2B 0x1F2C 0x1F2D 0x1F2E 0x1F2F 0x1F30 0x1F31 0x1F32 0x1F33 0x1F34 0x1F35 0x1F36 0x1F37 0x1F38 0x1F39 0x1F3A 0x1F3B 0x1F3C 0x1F3D 0x1F3E 0x1F3F 0x1F40 0x1F41 0x1F42 0x1F43 0x1F44 0x1F45 0x1F46 0x1F47 0x1F48 0x1F49 0x1F4A 0x1F4B 0x1F4C 0x1F4D 0x1F4E 0x1F4F 0x1F50 0x1F51 0x1F52 0x1F53 0x1F54 0x1F55 0x1F56 0x1F57 0x1F58 0x1F59 0x1F5A 0x1F5B 0x1F5C 0x1F5D 0x1F5E 0x1F5F 0x1F60 0x1F61 0x1F62 0x1F63 0x1F64 0x1F65 0x1F66 0x1F67 0x1F68 0x1F69 0x1F6A 0x1F6B 0x1F6C 0x1F6D 0x1F6E 0x1F6F 0x1F70 0x1F71 0x1F72 0x1F73 0x1F74 0x1F75 0x1F76 0x1F77 0x1F78 0x1F79 0x1F7A 0x1F7B 0x1F7C 0x1F7D 0x1F7E 0x1F7F 0x1F80 0x1F81 0x1F82 0x1F83 0x1F84 0x1F85 0x1F86 0x1F87 0x1F88 0x1F89 0x1F8A 0x1F8B 0x1F8C 0x1F8D 0x1F8E 0x1F8F 0x1F90 0x1F91 0x1F92 0x1F93 0x1F94 0x1F95 0x1F96 0x1F97 0x1F98 0x1F99 0x1F9A 0x1F9B 0x1F9C 0x1F9D 0x1F9E 0x1F9F 0x1FA0 0x1FA1 0x1FA2 0x1FA3 0x1FA4 0x1FA5 0x1FA6 0x1FA7 0x1FA8 0x1FA9 0x1FAA 0x1FAB 0x1FAC 0x1FAD 0x1FAE 0x1FAF 0x1FB0 0x1FB1 0x1FB2 0x1FB3 0x1FB4 0x1FB5 0x1FB6 0x1FB7 0x1FB8 0x1FB9 0x1FBA 0x1FBB 0x1FBC 0x1FBD 0x1FBE 0x1FBF 0x1FC0 0x1FC1 0x1FC2 0x1FC3 0x1FC4 0x1FC5 0x1FC6 0x1FC7 0x1FC8 0x1FC9 0x1FCA 0x1FCB 0x1FCC 0x1FCD 0x1FCE 0x1FCF 0x1FD0 0x1FD1 0x1FD2 0x1FD3 0x1FD4 0x1FD5 0x1FD6 0x1FD7 0x1FD8 0x1FD9 0x1FDA 0x1FDB 0x1FDC 0x1FDD 0x1FDE 0x1FDF 0x1FE0 0x1FE1 0x1FE2 0x1FE3 0x1FE4 0x1FE5 0x1FE6 0x1FE7 0x1FE8 0x1FE9 0x1FEA 0x1FEB 0x1FEC 0x1FED 0x1FEE 0x1FEF 0x1FF0 0x1FF1 0x1FF2 0x1FF3 0x1FF4 0x1FF5 0x1FF6 0x1FF7 0x1FF8 0x1FF9 0x1FFA 0x1FFB 0x1FFC 0x1FFD 0x1FFE 0x1FFF 0x1FFF>; | |
| qcom,mdss-dsi-panel-local-hbm-enabled; | |
| qcom,mdss-dsi-panel-name = "mipi_mot_cmd_csot_1080p_dsc_667"; | |
| qcom,mdss-dsi-panel-param-num = <0x5>; | |
| qcom,mdss-dsi-panel-param-verision = <0x1D971>; | |
| qcom,mdss-dsi-panel-peak-brightness = <0x4C4B40>; | |
| qcom,mdss-dsi-panel-status-check-mode = "reg_read"; | |
| qcom,mdss-dsi-panel-status-command = <0x6010001 0x10A>; | |
| qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-status-read-length = <0x1>; | |
| qcom,mdss-dsi-panel-status-value = <0x9C>; | |
| qcom,mdss-dsi-panel-supplier = "csot"; | |
| qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; | |
| qcom,mdss-dsi-reset-sequence = <0x0 0xB 0x1 0x1 0x0 0x1 0x1 0xB>; | |
| qcom,mdss-dsi-stream = <0x0>; | |
| qcom,mdss-dsi-te-dcs-command = <0x1>; | |
| qcom,mdss-dsi-te-pin-select = <0x1>; | |
| qcom,mdss-dsi-te-using-te-pin; | |
| qcom,mdss-dsi-traffic-mode = "burst_mode"; | |
| qcom,mdss-dsi-tx-eot-append; | |
| qcom,mdss-dsi-underflow-color = <0xFF>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x0>; | |
| qcom,mdss-pan-physical-height-dimension = <0x9A>; | |
| qcom,mdss-pan-physical-width-dimension = <0x45>; | |
| qcom,mot_nt37701A_read_cellid; | |
| qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; | |
| qcom,platform-reset-gpio = <&tlmm 0x0 0x0>; | |
| qcom,mdss-dsi-display-timings { | |
| timing@0 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = <0x5010000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = [39 01 00 00 00 00 06 F0 55 AA 52 08 00 39 01 00 00 00 00 02 6F 1C 39 01 00 00 00 00 06 C0 03 14 25 A9 78 39 01 00 00 00 00 06 F0 55 AA 52 08 00 39 01 00 00 00 00 02 6F 06 39 01 00 00 00 00 04 B5 2B 1C 32 39 01 00 00 00 00 02 6F 10 39 01 00 00 00 00 06 B5 1C 1C 1C 1C 1C 39 01 00 00 00 00 05 FF AA 55 A5 80 39 01 00 00 00 00 02 6F 1D 39 01 00 00 00 00 02 F2 05 39 01 00 00 00 00 02 03 01 39 01 00 00 00 00 02 90 01 39 01 00 00 00 00 13 91 AB 28 00 0C C2 00 03 1C 01 7E 00 0F 08 BB 04 3D 10 F0 39 01 00 00 00 00 01 2C 15 00 00 00 00 00 02 6F 01 39 01 00 00 00 00 05 88 02 1C 08 68 39 01 00 00 00 00 03 51 00 00 39 01 00 00 00 00 02 53 20 05 01 00 00 00 00 01 35 39 01 00 00 00 00 05 2A 00 00 04 37 39 01 00 00 00 00 05 2B 00 00 09 5F 39 01 00 00 00 00 02 2F 03 05 01 00 00 78 00 01 11 05 01 00 00 00 00 01 29 39 00 00 00 00 00 06 F0 55 AA 52 08 04 39 00 00 00 00 00 02 6F 0A 39 00 00 00 00 00 07 E7 5B 54 50 40 40 40 39 00 00 00 00 00 02 6F 23 39 00 00 00 00 00 07 E7 60 58 55 40 40 66 39 00 00 00 00 00 02 6F 3C 39 00 00 00 00 00 07 E7 48 3A 3A 3A 40 40]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x3C>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 10 03 03 11 1E 04 04 03 02 04 00 0E 08]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = [15 01 00 00 10 00 02 2F 03]; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| timing@1 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = <0x5010000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = [39 01 00 00 00 00 06 F0 55 AA 52 08 00 39 01 00 00 00 00 02 6F 1C 39 01 00 00 00 00 06 C0 03 14 25 A9 78 39 01 00 00 00 00 06 F0 55 AA 52 08 00 39 01 00 00 00 00 02 6F 06 39 01 00 00 00 00 04 B5 2B 1C 32 39 01 00 00 00 00 02 6F 10 39 01 00 00 00 00 06 B5 1C 1C 1C 1C 1C 39 01 00 00 00 00 05 FF AA 55 A5 80 39 01 00 00 00 00 02 6F 1D 39 01 00 00 00 00 02 F2 05 39 01 00 00 00 00 02 03 01 39 01 00 00 00 00 02 90 01 39 01 00 00 00 00 13 91 AB 28 00 0C C2 00 03 1C 01 7E 00 0F 08 BB 04 3D 10 F0 39 01 00 00 00 00 01 2C 15 00 00 00 00 00 02 6F 01 39 01 00 00 00 00 05 88 02 1C 08 68 39 01 00 00 00 00 03 51 00 00 39 01 00 00 00 00 02 53 20 05 01 00 00 00 00 01 35 39 01 00 00 00 00 05 2A 00 00 04 37 39 01 00 00 00 00 05 2B 00 00 09 5F 39 01 00 00 00 00 02 2F 07 05 01 00 00 78 00 01 11 05 01 00 00 00 00 01 29 39 00 00 00 00 00 06 F0 55 AA 52 08 04 39 00 00 00 00 00 02 6F 0A 39 00 00 00 00 00 07 E7 5B 54 50 40 40 40 39 00 00 00 00 00 02 6F 23 39 00 00 00 00 00 07 E7 60 58 55 40 40 66 39 00 00 00 00 00 02 6F 3C 39 00 00 00 00 00 07 E7 48 3A 3A 3A 40 40]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x5A>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 16 05 05 14 1F 06 06 06 02 04 00 13 0A]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = [15 01 00 00 10 00 02 2F 07]; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| timing@2 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = <0x5010000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = [39 01 00 00 00 00 06 F0 55 AA 52 08 00 39 01 00 00 00 00 02 6F 1C 39 01 00 00 00 00 06 C0 03 14 25 A9 78 39 01 00 00 00 00 06 F0 55 AA 52 08 00 39 01 00 00 00 00 02 6F 06 39 01 00 00 00 00 04 B5 2B 1C 32 39 01 00 00 00 00 02 6F 10 39 01 00 00 00 00 06 B5 1C 1C 1C 1C 1C 39 01 00 00 00 00 05 FF AA 55 A5 80 39 01 00 00 00 00 02 6F 1D 39 01 00 00 00 00 02 F2 05 39 01 00 00 00 00 02 03 01 39 01 00 00 00 00 02 90 01 39 01 00 00 00 00 13 91 AB 28 00 0C C2 00 03 1C 01 7E 00 0F 08 BB 04 3D 10 F0 39 01 00 00 00 00 01 2C 15 00 00 00 00 00 02 6F 01 39 01 00 00 00 00 05 88 02 1C 08 68 39 01 00 00 00 00 03 51 00 00 39 01 00 00 00 00 02 53 20 05 01 00 00 00 00 01 35 39 01 00 00 00 00 05 2A 00 00 04 37 39 01 00 00 00 00 05 2B 00 00 09 5F 39 01 00 00 00 00 02 2F 02 05 01 00 00 78 00 01 11 05 01 00 00 00 00 01 29 39 00 00 00 00 00 06 F0 55 AA 52 08 04 39 00 00 00 00 00 02 6F 0A 39 00 00 00 00 00 07 E7 5B 54 50 40 40 40 39 00 00 00 00 00 02 6F 23 39 00 00 00 00 00 07 E7 60 58 55 40 40 66 39 00 00 00 00 00 02 6F 3C 39 00 00 00 00 00 07 E7 48 3A 3A 3A 40 40]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x78>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 1C 07 07 17 15 07 07 08 02 04 00 18 0C]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = [15 01 00 00 10 00 02 2F 02]; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| timing@3 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = <0x5010000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = [39 01 00 00 00 00 06 F0 55 AA 52 08 00 39 01 00 00 00 00 02 6F 1C 39 01 00 00 00 00 06 C0 03 14 25 A9 78 39 01 00 00 00 00 06 F0 55 AA 52 08 00 39 01 00 00 00 00 02 6F 06 39 01 00 00 00 00 04 B5 2B 1C 32 39 01 00 00 00 00 02 6F 10 39 01 00 00 00 00 06 B5 1C 1C 1C 1C 1C 39 01 00 00 00 00 05 FF AA 55 A5 80 39 01 00 00 00 00 02 6F 1D 39 01 00 00 00 00 02 F2 05 39 01 00 00 00 00 02 03 01 39 01 00 00 00 00 02 90 01 39 01 00 00 00 00 13 91 AB 28 00 0C C2 00 03 1C 01 7E 00 0F 08 BB 04 3D 10 F0 39 01 00 00 00 00 01 2C 15 00 00 00 00 00 02 6F 01 39 01 00 00 00 00 05 88 02 1C 08 68 39 01 00 00 00 00 03 51 00 00 39 01 00 00 00 00 02 53 20 05 01 00 00 00 00 01 35 39 01 00 00 00 00 05 2A 00 00 04 37 39 01 00 00 00 00 05 2B 00 00 09 5F 39 01 00 00 00 00 02 2F 04 05 01 00 00 78 00 01 11 05 01 00 00 00 00 01 29 39 00 00 00 00 00 06 F0 55 AA 52 08 04 39 00 00 00 00 00 02 6F 0A 39 00 00 00 00 00 07 E7 5B 54 50 40 40 40 39 00 00 00 00 00 02 6F 23 39 00 00 00 00 00 07 E7 60 58 55 40 40 66 39 00 00 00 00 00 02 6F 3C 39 00 00 00 00 00 07 E7 48 3A 3A 3A 40 40]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x90>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 20 08 08 18 23 08 08 08 02 04 00 1B 0D]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = [15 01 00 00 10 00 02 2F 04]; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| timing@4 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = <0x5010000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = [39 01 00 00 00 00 06 F0 55 AA 52 08 00 39 01 00 00 00 00 02 6F 1C 39 01 00 00 00 00 06 C0 03 14 25 A9 78 39 01 00 00 00 00 06 F0 55 AA 52 08 00 39 01 00 00 00 00 02 6F 06 39 01 00 00 00 00 04 B5 2B 1C 32 39 01 00 00 00 00 02 6F 10 39 01 00 00 00 00 06 B5 1C 1C 1C 1C 1C 39 01 00 00 00 00 05 FF AA 55 A5 80 39 01 00 00 00 00 02 6F 1D 39 01 00 00 00 00 02 F2 05 39 01 00 00 00 00 02 03 01 39 01 00 00 00 00 02 90 01 39 01 00 00 00 00 13 91 AB 28 00 0C C2 00 03 1C 01 7E 00 0F 08 BB 04 3D 10 F0 39 01 00 00 00 00 01 2C 15 00 00 00 00 00 02 6F 01 39 01 00 00 00 00 05 88 02 1C 08 68 39 01 00 00 00 00 03 51 00 00 39 01 00 00 00 00 02 53 20 05 01 00 00 00 00 01 35 39 01 00 00 00 00 05 2A 00 00 04 37 39 01 00 00 00 00 05 2B 00 00 09 5F 39 01 00 00 00 00 02 2F 08 05 01 00 00 78 00 01 11 05 01 00 00 00 00 01 29 39 00 00 00 00 00 06 F0 55 AA 52 08 04 39 00 00 00 00 00 02 6F 0A 39 00 00 00 00 00 07 E7 5B 54 50 40 40 40 39 00 00 00 00 00 02 6F 23 39 00 00 00 00 00 07 E7 60 58 55 40 40 66 39 00 00 00 00 00 02 6F 3C 39 00 00 00 00 00 07 E7 48 3A 3A 3A 40 40]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x30>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 0D 03 03 10 1D 04 03 02 02 04 00 0C 08]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = [15 01 00 00 10 00 02 2F 08]; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| }; | |
| }; | |
| mot_csot_nt37701A_667_curve_1080x2400_dsc_cmd_v2: qcom,mdss_dsi_mot_csot_nt37701A_667_curve_1080x2400_dsc_cmd_v2 { | |
| compatible = "qcom,mdss-dsi-panel"; | |
| qcom,bl-dsc-cmd-state = "dsi_hs_mode"; | |
| qcom,dsi-ctrl-num = <0x0>; | |
| qcom,dsi-phy-num = <0x0>; | |
| qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0"; | |
| qcom,mdss-brightness-max-level = <0xDBB>; | |
| qcom,mdss-dsi-bl-inverted-dbv; | |
| qcom,mdss-dsi-bl-is-exponent; | |
| qcom,mdss-dsi-bl-max-level = <0xDBB>; | |
| qcom,mdss-dsi-bl-min-level = <0x9>; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-border-color = <0x0>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-dc-off-command = [39 00 00 00 00 00 06 F0 55 AA 52 08 00 39 00 00 40 00 00 02 B2 18 39 00 00 40 00 00 02 6F 0F 39 00 00 40 00 00 09 B2 60 50 66 8E 86 8E 2F FF 39 00 00 40 00 00 0D B3 00 01 01 59 01 59 02 1A 02 1A 03 0A 39 00 00 40 00 00 02 6F 0C 39 00 00 40 00 00 0D B3 03 0A 04 44 04 44 06 8E 06 8E 06 8F 39 00 00 40 00 00 02 6F 18 39 00 00 00 00 00 0D B3 06 8F 09 08 09 08 0D BB 0D BB 0F FF 39 00 00 00 00 00 02 58 00]; | |
| qcom,mdss-dsi-dc-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-dc-on-command = <0x39000000 0x6F0 0x55AA5208 0x390000 0x40000002 0xB2983900 0x400000 0x26F0F39 0x4000 0x9B260 0x50600080 0x2FFF39 0x4000 0x26FAC 0x39000040 0x15B2 0x2B3 0x419059D 0x7B20A8C 0xFFB0FFF 0xFFF0FFF 0x39000040 0x26F 0xC0390000 0x40000015 0xB20FFF0F 0xFF0FFF0F 0xFF0FFF0F 0xFF0FFF0F 0xFF0FFF0F 0xFF390000 0x40000002 0x6FD43900 0x400000 0x15B20FFF 0xFFF0FFF 0xFFF0FFF 0xFFF0FFF 0xFFF0FFF 0xFFF3900 0x400000 0x26FE839 0x4000 0xBB20F 0xFF0FFF0F 0xFF0FFF0F 0xFF390000 0x40000002 0x6F523900 0x400000 0x15B30001 0x159021A 0x30A0444 0x68E068F 0x68F068F 0x68F3900 0x400000 0x26F6639 0x4000 0x15B306 0x8F068F06 0x8F068F06 0x8F068F06 0x8F068F06 0x8F068F39 0x4000 0x26F7A 0x39000040 0x15B3 0x68F068F 0x68F068F 0x68F068F 0x68F068F 0x68F068F 0x39000040 0x26F 0x8E390000 0x40000009 0xB3068F06 0x8F068F06 0x8F390000 0x4000000D 0xB3000000 0x0 0x0 0x390000 0x40000002 0x6F0C3900 0x400000 0xDB30000 0x0 0x0 0x3900 0x400000 0x26F1839 0x0 0xDB306 0x8F090809 0x80DBB0D 0xBB0FFF39 0x0 0x25801>; | |
| qcom,mdss-dsi-dc-on-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-hbm-fod; | |
| qcom,mdss-dsi-hbm-fod-on-command = <0x39000040 0x6F0 0x55AA5208 0x2390000 0x40000003 0x510FFF39 0x4000 0x3871F 0xFF390000 0x40000002 0x88013900 0x400000 0x26F0139 0x4000 0x58802 0x1C086839 0x0 0x28501>; | |
| qcom,mdss-dsi-hbm-off-command = <0x39000000 0x387 0xFFF1500 0x0 0x2880115 0x0 0x28601>; | |
| qcom,mdss-dsi-hbm-on-command = [39 00 00 00 00 00 03 51 0F FF 39 00 00 00 00 00 03 87 0F FF 15 00 00 00 00 00 02 88 01 15 01 00 00 00 00 02 86 01]; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-lp11-init; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-no-panel-on-read-support; | |
| qcom,mdss-dsi-panel-blackness-level = <0x64>; | |
| qcom,mdss-dsi-panel-hdr-color-primaries = <0x3A66 0x3D86 0x84D0 0x3E80 0x32C8 0x8AAC 0x1B58 0x9C4>; | |
| qcom,mdss-dsi-panel-hdr-enabled; | |
| qcom,mdss-dsi-panel-local-hbm-alpha-register = <0x87>; | |
| qcom,mdss-dsi-panel-local-hbm-alpha-size = <0x1000>; | |
| qcom,mdss-dsi-panel-local-hbm-alpha-table = <0x10F2 0x10F2 0x10F2 0x10F2 0x10F2 0x10F2 0x10F2 0x10F2 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F4 0x10F4 0x10F4 0x10F4 0x10F4 0x10F4 0x10F4 0x10F4 0x10F4 0x10F4 0x10F4 0x10F4 0x10F5 0x10F5 0x10F5 0x10F5 0x10F5 0x10F5 0x10F5 0x10F5 0x10F5 0x10F6 0x10F6 0x10F6 0x10F6 0x10F6 0x10F6 0x10F6 0x10F6 0x10F7 0x10F7 0x10F7 0x10F7 0x10F7 0x10F7 0x10F7 0x10F8 0x10F8 0x10F8 0x10F8 0x10F8 0x10F8 0x10F9 0x10F9 0x10F9 0x10F9 0x10F9 0x10F9 0x10FA 0x10FA 0x10FA 0x10FA 0x10FA 0x10FB 0x10FB 0x10FB 0x10FB 0x10FB 0x10FC 0x10FC 0x10FC 0x10FC 0x10FC 0x10FD 0x10FD 0x10FD 0x10FD 0x10FE 0x10FE 0x10FE 0x10FE 0x10FF 0x10FF 0x10FF 0x10FF 0x1100 0x1100 0x1100 0x1100 0x1101 0x1101 0x1101 0x1101 0x1102 0x1102 0x1102 0x1102 0x1103 0x1103 0x1103 0x1104 0x1104 0x1104 0x1105 0x1105 0x1105 0x1105 0x1106 0x1106 0x1106 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0x1DF2 0x1DF3 0x1DF4 0x1DF5 0x1DF6 0x1DF7 0x1DF8 0x1DF9 0x1DFA 0x1DFB 0x1DFC 0x1DFD 0x1DFE 0x1DFF 0x1E00 0x1E01 0x1E02 0x1E03 0x1E04 0x1E05 0x1E06 0x1E07 0x1E08 0x1E09 0x1E0A 0x1E0B 0x1E0C 0x1E0D 0x1E0E 0x1E0F 0x1E10 0x1E11 0x1E12 0x1E13 0x1E14 0x1E15 0x1E16 0x1E17 0x1E18 0x1E19 0x1E1A 0x1E1B 0x1E1C 0x1E1D 0x1E1E 0x1E1F 0x1E20 0x1E21 0x1E22 0x1E23 0x1E24 0x1E25 0x1E26 0x1E27 0x1E28 0x1E29 0x1E2A 0x1E2B 0x1E2C 0x1E2D 0x1E2E 0x1E2F 0x1E30 0x1E31 0x1E32 0x1E33 0x1E34 0x1E35 0x1E36 0x1E37 0x1E38 0x1E39 0x1E3A 0x1E3B 0x1E3C 0x1E3D 0x1E3E 0x1E3F 0x1E40 0x1E41 0x1E42 0x1E43 0x1E44 0x1E45 0x1E46 0x1E47 0x1E48 0x1E49 0x1E4A 0x1E4B 0x1E4C 0x1E4D 0x1E4E 0x1E4F 0x1E50 0x1E51 0x1E52 0x1E53 0x1E54 0x1E55 0x1E56 0x1E57 0x1E58 0x1E59 0x1E5A 0x1E5B 0x1E5C 0x1E5D 0x1E5E 0x1E5F 0x1E60 0x1E61 0x1E62 0x1E63 0x1E64 0x1E65 0x1E66 0x1E67 0x1E68 0x1E69 0x1E6A 0x1E6B 0x1E6C 0x1E6D 0x1E6E 0x1E6F 0x1E70 0x1E71 0x1E72 0x1E73 0x1E74 0x1E75 0x1E76 0x1E77 0x1E78 0x1E79 0x1E79 0x1E7A 0x1E7B 0x1E7C 0x1E7D 0x1E7E 0x1E7F 0x1E80 0x1E81 0x1E82 0x1E83 0x1E84 0x1E85 0x1E86 0x1E87 0x1E88 0x1E89 0x1E8A 0x1E8B 0x1E8C 0x1E8D 0x1E8E 0x1E8F 0x1E90 0x1E91 0x1E92 0x1E93 0x1E94 0x1E95 0x1E96 0x1E97 0x1E98 0x1E99 0x1E9A 0x1E9B 0x1E9C 0x1E9D 0x1E9E 0x1E9F 0x1EA0 0x1EA1 0x1EA2 0x1EA3 0x1EA4 0x1EA5 0x1EA6 0x1EA7 0x1EA8 0x1EA9 0x1EAA 0x1EAB 0x1EAC 0x1EAD 0x1EAE 0x1EAF 0x1EB0 0x1EB1 0x1EB2 0x1EB3 0x1EB4 0x1EB5 0x1EB6 0x1EB7 0x1EB8 0x1EB9 0x1EBA 0x1EBB 0x1EBC 0x1EBD 0x1EBE 0x1EBF 0x1EC0 0x1EC1 0x1EC2 0x1EC3 0x1EC4 0x1EC5 0x1EC6 0x1EC7 0x1EC8 0x1EC9 0x1ECA 0x1ECB 0x1ECC 0x1ECD 0x1ECE 0x1ECF 0x1ED0 0x1ED1 0x1ED2 0x1ED3 0x1ED4 0x1ED5 0x1ED6 0x1ED7 0x1ED8 0x1ED9 0x1EDA 0x1EDB 0x1EDC 0x1EDD 0x1EDE 0x1EDF 0x1EE0 0x1EE1 0x1EE2 0x1EE3 0x1EE4 0x1EE5 0x1EE6 0x1EE7 0x1EE8 0x1EE9 0x1EEA 0x1EEB 0x1EEC 0x1EED 0x1EEE 0x1EEF 0x1EF0 0x1EF1 0x1EF2 0x1EF3 0x1EF4 0x1EF5 0x1EF6 0x1EF7 0x1EF8 0x1EF9 0x1EFA 0x1EFB 0x1EFC 0x1EFD 0x1EFE 0x1EFF 0x1F00 0x1F01 0x1F02 0x1F03 0x1F04 0x1F05 0x1F06 0x1F07 0x1F08 0x1F09 0x1F0A 0x1F0B 0x1F0C 0x1F0D 0x1F0E 0x1F0F 0x1F10 0x1F11 0x1F12 0x1F13 0x1F14 0x1F15 0x1F16 0x1F17 0x1F18 0x1F19 0x1F1A 0x1F1B 0x1F1C 0x1F1D 0x1F1E 0x1F1F 0x1F20 0x1F21 0x1F22 0x1F23 0x1F24 0x1F25 0x1F26 0x1F27 0x1F28 0x1F29 0x1F2A 0x1F2B 0x1F2C 0x1F2D 0x1F2E 0x1F2F 0x1F30 0x1F31 0x1F32 0x1F33 0x1F34 0x1F35 0x1F36 0x1F37 0x1F38 0x1F39 0x1F3A 0x1F3B 0x1F3C 0x1F3D 0x1F3E 0x1F3F 0x1F40 0x1F41 0x1F42 0x1F43 0x1F44 0x1F45 0x1F46 0x1F47 0x1F48 0x1F49 0x1F4A 0x1F4B 0x1F4C 0x1F4D 0x1F4E 0x1F4F 0x1F50 0x1F51 0x1F52 0x1F53 0x1F54 0x1F55 0x1F56 0x1F57 0x1F58 0x1F59 0x1F5A 0x1F5B 0x1F5C 0x1F5D 0x1F5E 0x1F5F 0x1F60 0x1F61 0x1F62 0x1F63 0x1F64 0x1F65 0x1F66 0x1F67 0x1F68 0x1F69 0x1F6A 0x1F6B 0x1F6C 0x1F6D 0x1F6E 0x1F6F 0x1F70 0x1F71 0x1F72 0x1F73 0x1F74 0x1F75 0x1F76 0x1F77 0x1F78 0x1F79 0x1F7A 0x1F7B 0x1F7C 0x1F7D 0x1F7E 0x1F7F 0x1F80 0x1F81 0x1F82 0x1F83 0x1F84 0x1F85 0x1F86 0x1F87 0x1F88 0x1F89 0x1F8A 0x1F8B 0x1F8C 0x1F8D 0x1F8E 0x1F8F 0x1F90 0x1F91 0x1F92 0x1F93 0x1F94 0x1F95 0x1F96 0x1F97 0x1F98 0x1F99 0x1F9A 0x1F9B 0x1F9C 0x1F9D 0x1F9E 0x1F9F 0x1FA0 0x1FA1 0x1FA2 0x1FA3 0x1FA4 0x1FA5 0x1FA6 0x1FA7 0x1FA8 0x1FA9 0x1FAA 0x1FAB 0x1FAC 0x1FAD 0x1FAE 0x1FAF 0x1FB0 0x1FB1 0x1FB2 0x1FB3 0x1FB4 0x1FB5 0x1FB6 0x1FB7 0x1FB8 0x1FB9 0x1FBA 0x1FBB 0x1FBC 0x1FBD 0x1FBE 0x1FBF 0x1FC0 0x1FC1 0x1FC2 0x1FC3 0x1FC4 0x1FC5 0x1FC6 0x1FC7 0x1FC8 0x1FC9 0x1FCA 0x1FCB 0x1FCC 0x1FCD 0x1FCE 0x1FCF 0x1FD0 0x1FD1 0x1FD2 0x1FD3 0x1FD4 0x1FD5 0x1FD6 0x1FD7 0x1FD8 0x1FD9 0x1FDA 0x1FDB 0x1FDC 0x1FDD 0x1FDE 0x1FDF 0x1FE0 0x1FE1 0x1FE2 0x1FE3 0x1FE4 0x1FE5 0x1FE6 0x1FE7 0x1FE8 0x1FE9 0x1FEA 0x1FEB 0x1FEC 0x1FED 0x1FEE 0x1FEF 0x1FF0 0x1FF1 0x1FF2 0x1FF3 0x1FF4 0x1FF5 0x1FF6 0x1FF7 0x1FF8 0x1FF9 0x1FFA 0x1FFB 0x1FFC 0x1FFD 0x1FFE 0x1FFF 0x1FFF>; | |
| qcom,mdss-dsi-panel-local-hbm-enabled; | |
| qcom,mdss-dsi-panel-name = "mipi_mot_cmd_csot_1080p_dsc_667"; | |
| qcom,mdss-dsi-panel-param-num = <0x5>; | |
| qcom,mdss-dsi-panel-param-verision = <0x1D971>; | |
| qcom,mdss-dsi-panel-peak-brightness = <0x4C4B40>; | |
| qcom,mdss-dsi-panel-status-check-mode = "reg_read"; | |
| qcom,mdss-dsi-panel-status-command = <0x6010001 0x10A>; | |
| qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-status-read-length = <0x1>; | |
| qcom,mdss-dsi-panel-status-value = <0x9C>; | |
| qcom,mdss-dsi-panel-supplier = "csot"; | |
| qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; | |
| qcom,mdss-dsi-reset-sequence = <0x0 0xB 0x1 0x1 0x0 0x1 0x1 0xB>; | |
| qcom,mdss-dsi-stream = <0x0>; | |
| qcom,mdss-dsi-te-dcs-command = <0x1>; | |
| qcom,mdss-dsi-te-pin-select = <0x1>; | |
| qcom,mdss-dsi-te-using-te-pin; | |
| qcom,mdss-dsi-traffic-mode = "burst_mode"; | |
| qcom,mdss-dsi-tx-eot-append; | |
| qcom,mdss-dsi-underflow-color = <0xFF>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x0>; | |
| qcom,mdss-pan-physical-height-dimension = <0x9A>; | |
| qcom,mdss-pan-physical-width-dimension = <0x45>; | |
| qcom,mot_nt37701A_read_cellid; | |
| qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; | |
| qcom,platform-reset-gpio = <&tlmm 0x0 0x0>; | |
| qcom,mdss-dsi-display-timings { | |
| timing@0 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = <0x5010000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = <0x39010000 0x6F0 0x55AA5208 0x390100 0x2 0x6F1C3901 0x0 0x6C00314 0x25A97839 0x1000000 0x6F055 0xAA520800 0x39010000 0x26F 0x6390100 0x4 0xB52B1C32 0x39010000 0x26F 0x10390100 0x6 0xB51C1C1C 0x1C1C3901 0x0 0x5FFAA55 0xA5803901 0x0 0x26F1D39 0x1000000 0x2F205 0x39010000 0x203 0x1390100 0x2 0x90013901 0x0 0x1391AB28 0xCC200 0x31C017E 0xF08BB 0x43D10F0 0x39010000 0x12C 0x15000000 0x26F 0x1390100 0x5 0x88021C08 0x68390100 0x3 0x51000039 0x1000000 0x25F80 0x39010000 0x253 0x20050100 0x1 0x35390100 0x5 0x2A000004 0x37390100 0x5 0x2B000009 0x5F390100 0x2 0x2F030501 0x7800 0x1110501 0x0 0x1293900 0x0 0x6F055AA 0x52080439 0x0 0x26F0A 0x39000000 0x7E7 0x5B545040 0x40403900 0x0 0x26F2339 0x0 0x7E760 0x58554040 0x66390000 0x2 0x6F3C3900 0x0 0x7E7483A 0x3A3A4040>; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x3C>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 10 03 03 11 1E 04 04 03 02 04 00 0E 08]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = [15 01 00 00 10 00 02 2F 03]; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| timing@1 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = <0x5010000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = <0x39010000 0x6F0 0x55AA5208 0x390100 0x2 0x6F1C3901 0x0 0x6C00314 0x25A97839 0x1000000 0x6F055 0xAA520800 0x39010000 0x26F 0x6390100 0x4 0xB52B1C32 0x39010000 0x26F 0x10390100 0x6 0xB51C1C1C 0x1C1C3901 0x0 0x5FFAA55 0xA5803901 0x0 0x26F1D39 0x1000000 0x2F205 0x39010000 0x203 0x1390100 0x2 0x90013901 0x0 0x1391AB28 0xCC200 0x31C017E 0xF08BB 0x43D10F0 0x39010000 0x12C 0x15000000 0x26F 0x1390100 0x5 0x88021C08 0x68390100 0x3 0x51000039 0x1000000 0x25F80 0x39010000 0x253 0x20050100 0x1 0x35390100 0x5 0x2A000004 0x37390100 0x5 0x2B000009 0x5F390100 0x2 0x2F070501 0x7800 0x1110501 0x0 0x1293900 0x0 0x6F055AA 0x52080439 0x0 0x26F0A 0x39000000 0x7E7 0x5B545040 0x40403900 0x0 0x26F2339 0x0 0x7E760 0x58554040 0x66390000 0x2 0x6F3C3900 0x0 0x7E7483A 0x3A3A4040>; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x5A>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 16 05 05 14 1F 06 06 06 02 04 00 13 0A]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = [15 01 00 00 10 00 02 2F 07]; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| timing@2 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = <0x5010000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = <0x39010000 0x6F0 0x55AA5208 0x390100 0x2 0x6F1C3901 0x0 0x6C00314 0x25A97839 0x1000000 0x6F055 0xAA520800 0x39010000 0x26F 0x6390100 0x4 0xB52B1C32 0x39010000 0x26F 0x10390100 0x6 0xB51C1C1C 0x1C1C3901 0x0 0x5FFAA55 0xA5803901 0x0 0x26F1D39 0x1000000 0x2F205 0x39010000 0x203 0x1390100 0x2 0x90013901 0x0 0x1391AB28 0xCC200 0x31C017E 0xF08BB 0x43D10F0 0x39010000 0x12C 0x15000000 0x26F 0x1390100 0x5 0x88021C08 0x68390100 0x3 0x51000039 0x1000000 0x25F80 0x39010000 0x253 0x20050100 0x1 0x35390100 0x5 0x2A000004 0x37390100 0x5 0x2B000009 0x5F390100 0x2 0x2F020501 0x7800 0x1110501 0x0 0x1293900 0x0 0x6F055AA 0x52080439 0x0 0x26F0A 0x39000000 0x7E7 0x5B545040 0x40403900 0x0 0x26F2339 0x0 0x7E760 0x58554040 0x66390000 0x2 0x6F3C3900 0x0 0x7E7483A 0x3A3A4040>; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x78>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 1C 07 07 17 15 07 07 08 02 04 00 18 0C]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = [15 01 00 00 10 00 02 2F 02]; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| timing@3 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = <0x5010000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = <0x39010000 0x6F0 0x55AA5208 0x390100 0x2 0x6F1C3901 0x0 0x6C00314 0x25A97839 0x1000000 0x6F055 0xAA520800 0x39010000 0x26F 0x6390100 0x4 0xB52B1C32 0x39010000 0x26F 0x10390100 0x6 0xB51C1C1C 0x1C1C3901 0x0 0x5FFAA55 0xA5803901 0x0 0x26F1D39 0x1000000 0x2F205 0x39010000 0x203 0x1390100 0x2 0x90013901 0x0 0x1391AB28 0xCC200 0x31C017E 0xF08BB 0x43D10F0 0x39010000 0x12C 0x15000000 0x26F 0x1390100 0x5 0x88021C08 0x68390100 0x3 0x51000039 0x1000000 0x25F80 0x39010000 0x253 0x20050100 0x1 0x35390100 0x5 0x2A000004 0x37390100 0x5 0x2B000009 0x5F390100 0x2 0x2F040501 0x7800 0x1110501 0x0 0x1293900 0x0 0x6F055AA 0x52080439 0x0 0x26F0A 0x39000000 0x7E7 0x5B545040 0x40403900 0x0 0x26F2339 0x0 0x7E760 0x58554040 0x66390000 0x2 0x6F3C3900 0x0 0x7E7483A 0x3A3A4040>; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x90>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 20 08 08 18 23 08 08 08 02 04 00 1B 0D]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = [15 01 00 00 10 00 02 2F 04]; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| timing@4 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = <0x5010000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = <0x39010000 0x6F0 0x55AA5208 0x390100 0x2 0x6F1C3901 0x0 0x6C00314 0x25A97839 0x1000000 0x6F055 0xAA520800 0x39010000 0x26F 0x6390100 0x4 0xB52B1C32 0x39010000 0x26F 0x10390100 0x6 0xB51C1C1C 0x1C1C3901 0x0 0x5FFAA55 0xA5803901 0x0 0x26F1D39 0x1000000 0x2F205 0x39010000 0x203 0x1390100 0x2 0x90013901 0x0 0x1391AB28 0xCC200 0x31C017E 0xF08BB 0x43D10F0 0x39010000 0x12C 0x15000000 0x26F 0x1390100 0x5 0x88021C08 0x68390100 0x3 0x51000039 0x1000000 0x25F80 0x39010000 0x253 0x20050100 0x1 0x35390100 0x5 0x2A000004 0x37390100 0x5 0x2B000009 0x5F390100 0x2 0x2F080501 0x7800 0x1110501 0x0 0x1293900 0x0 0x6F055AA 0x52080439 0x0 0x26F0A 0x39000000 0x7E7 0x5B545040 0x40403900 0x0 0x26F2339 0x0 0x7E760 0x58554040 0x66390000 0x2 0x6F3C3900 0x0 0x7E7483A 0x3A3A4040>; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x30>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 0D 03 03 10 1D 04 03 02 02 04 00 0C 08]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = [15 01 00 00 10 00 02 2F 08]; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| }; | |
| }; | |
| mot_csot_nt37701A_667_curve_1080x2400_dsc_cmd_v3: qcom,mdss_dsi_mot_csot_nt37701A_667_curve_1080x2400_dsc_cmd_v3 { | |
| compatible = "qcom,mdss-dsi-panel"; | |
| qcom,bl-dsc-cmd-state = "dsi_hs_mode"; | |
| qcom,dsi-ctrl-num = <0x0>; | |
| qcom,dsi-phy-num = <0x0>; | |
| qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0"; | |
| qcom,mdss-brightness-max-level = <0xDBB>; | |
| qcom,mdss-dsi-bl-inverted-dbv; | |
| qcom,mdss-dsi-bl-is-exponent; | |
| qcom,mdss-dsi-bl-max-level = <0xDBB>; | |
| qcom,mdss-dsi-bl-min-level = <0x9>; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-border-color = <0x0>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-dc-off-command = [39 00 00 00 00 00 06 F0 55 AA 52 08 00 39 00 00 40 00 00 02 B2 18 39 00 00 40 00 00 02 6F 0F 39 00 00 40 00 00 09 B2 60 50 66 8E 86 8E 2F FF 39 00 00 40 00 00 0D B3 00 01 01 59 01 59 02 1A 02 1A 03 0A 39 00 00 40 00 00 02 6F 0C 39 00 00 40 00 00 0D B3 03 0A 04 44 04 44 06 8E 06 8E 06 8F 39 00 00 40 00 00 02 6F 18 39 00 00 00 00 00 0D B3 06 8F 09 08 09 08 0D BB 0D BB 0F FF 39 00 00 00 00 00 02 58 00]; | |
| qcom,mdss-dsi-dc-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-dc-on-command = <0x39000000 0x6F0 0x55AA5208 0x390000 0x40000002 0xB2983900 0x400000 0x26F0F39 0x4000 0x9B260 0x50600080 0x2FFF39 0x4000 0x26FAC 0x39000040 0x15B2 0x2B3 0x419059D 0x7B20A8C 0xFFB0FFF 0xFFF0FFF 0x39000040 0x26F 0xC0390000 0x40000015 0xB20FFF0F 0xFF0FFF0F 0xFF0FFF0F 0xFF0FFF0F 0xFF0FFF0F 0xFF390000 0x40000002 0x6FD43900 0x400000 0x15B20FFF 0xFFF0FFF 0xFFF0FFF 0xFFF0FFF 0xFFF0FFF 0xFFF3900 0x400000 0x26FE839 0x4000 0xBB20F 0xFF0FFF0F 0xFF0FFF0F 0xFF390000 0x40000002 0x6F523900 0x400000 0x15B30001 0x159021A 0x30A0444 0x68E068F 0x68F068F 0x68F3900 0x400000 0x26F6639 0x4000 0x15B306 0x8F068F06 0x8F068F06 0x8F068F06 0x8F068F06 0x8F068F39 0x4000 0x26F7A 0x39000040 0x15B3 0x68F068F 0x68F068F 0x68F068F 0x68F068F 0x68F068F 0x39000040 0x26F 0x8E390000 0x40000009 0xB3068F06 0x8F068F06 0x8F390000 0x4000000D 0xB3000000 0x0 0x0 0x390000 0x40000002 0x6F0C3900 0x400000 0xDB30000 0x0 0x0 0x3900 0x400000 0x26F1839 0x0 0xDB306 0x8F090809 0x80DBB0D 0xBB0FFF39 0x0 0x25801>; | |
| qcom,mdss-dsi-dc-on-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-hbm-fod; | |
| qcom,mdss-dsi-hbm-fod-on-command = <0x39000040 0x6F0 0x55AA5208 0x2390000 0x40000003 0x510FFF39 0x4000 0x3871F 0xFF390000 0x40000002 0x88013900 0x400000 0x26F0139 0x4000 0x58802 0x1C086839 0x0 0x28501>; | |
| qcom,mdss-dsi-hbm-off-command = <0x39000000 0x387 0xFFF1500 0x0 0x2880115 0x0 0x28601>; | |
| qcom,mdss-dsi-hbm-on-command = [39 00 00 00 00 00 03 51 0F FF 39 00 00 00 00 00 03 87 0F FF 15 00 00 00 00 00 02 88 01 15 01 00 00 00 00 02 86 01]; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-lp11-init; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-no-panel-on-read-support; | |
| qcom,mdss-dsi-panel-blackness-level = <0x64>; | |
| qcom,mdss-dsi-panel-hdr-color-primaries = <0x3A66 0x3D86 0x84D0 0x3E80 0x32C8 0x8AAC 0x1B58 0x9C4>; | |
| qcom,mdss-dsi-panel-hdr-enabled; | |
| qcom,mdss-dsi-panel-local-hbm-alpha-register = <0x87>; | |
| qcom,mdss-dsi-panel-local-hbm-alpha-size = <0x1000>; | |
| qcom,mdss-dsi-panel-local-hbm-alpha-table = <0x10F2 0x10F2 0x10F2 0x10F2 0x10F2 0x10F2 0x10F2 0x10F2 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F4 0x10F4 0x10F4 0x10F4 0x10F4 0x10F4 0x10F4 0x10F4 0x10F4 0x10F4 0x10F4 0x10F4 0x10F5 0x10F5 0x10F5 0x10F5 0x10F5 0x10F5 0x10F5 0x10F5 0x10F5 0x10F6 0x10F6 0x10F6 0x10F6 0x10F6 0x10F6 0x10F6 0x10F6 0x10F7 0x10F7 0x10F7 0x10F7 0x10F7 0x10F7 0x10F7 0x10F8 0x10F8 0x10F8 0x10F8 0x10F8 0x10F8 0x10F9 0x10F9 0x10F9 0x10F9 0x10F9 0x10F9 0x10FA 0x10FA 0x10FA 0x10FA 0x10FA 0x10FB 0x10FB 0x10FB 0x10FB 0x10FB 0x10FC 0x10FC 0x10FC 0x10FC 0x10FC 0x10FD 0x10FD 0x10FD 0x10FD 0x10FE 0x10FE 0x10FE 0x10FE 0x10FF 0x10FF 0x10FF 0x10FF 0x1100 0x1100 0x1100 0x1100 0x1101 0x1101 0x1101 0x1101 0x1102 0x1102 0x1102 0x1102 0x1103 0x1103 0x1103 0x1104 0x1104 0x1104 0x1105 0x1105 0x1105 0x1105 0x1106 0x1106 0x1106 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0x1F0F 0x1F10 0x1F11 0x1F12 0x1F13 0x1F14 0x1F15 0x1F16 0x1F17 0x1F18 0x1F19 0x1F1A 0x1F1B 0x1F1C 0x1F1D 0x1F1E 0x1F1F 0x1F20 0x1F21 0x1F22 0x1F23 0x1F24 0x1F25 0x1F26 0x1F27 0x1F28 0x1F29 0x1F2A 0x1F2B 0x1F2C 0x1F2D 0x1F2E 0x1F2F 0x1F30 0x1F31 0x1F32 0x1F33 0x1F34 0x1F35 0x1F36 0x1F37 0x1F38 0x1F39 0x1F3A 0x1F3B 0x1F3C 0x1F3D 0x1F3E 0x1F3F 0x1F40 0x1F41 0x1F42 0x1F43 0x1F44 0x1F45 0x1F46 0x1F47 0x1F48 0x1F49 0x1F4A 0x1F4B 0x1F4C 0x1F4D 0x1F4E 0x1F4F 0x1F50 0x1F51 0x1F52 0x1F53 0x1F54 0x1F55 0x1F56 0x1F57 0x1F58 0x1F59 0x1F5A 0x1F5B 0x1F5C 0x1F5D 0x1F5E 0x1F5F 0x1F60 0x1F61 0x1F62 0x1F63 0x1F64 0x1F65 0x1F66 0x1F67 0x1F68 0x1F69 0x1F6A 0x1F6B 0x1F6C 0x1F6D 0x1F6E 0x1F6F 0x1F70 0x1F71 0x1F72 0x1F73 0x1F74 0x1F75 0x1F76 0x1F77 0x1F78 0x1F79 0x1F7A 0x1F7B 0x1F7C 0x1F7D 0x1F7E 0x1F7F 0x1F80 0x1F81 0x1F82 0x1F83 0x1F84 0x1F85 0x1F86 0x1F87 0x1F88 0x1F89 0x1F8A 0x1F8B 0x1F8C 0x1F8D 0x1F8E 0x1F8F 0x1F90 0x1F91 0x1F92 0x1F93 0x1F94 0x1F95 0x1F96 0x1F97 0x1F98 0x1F99 0x1F9A 0x1F9B 0x1F9C 0x1F9D 0x1F9E 0x1F9F 0x1FA0 0x1FA1 0x1FA2 0x1FA3 0x1FA4 0x1FA5 0x1FA6 0x1FA7 0x1FA8 0x1FA9 0x1FAA 0x1FAB 0x1FAC 0x1FAD 0x1FAE 0x1FAF 0x1FB0 0x1FB1 0x1FB2 0x1FB3 0x1FB4 0x1FB5 0x1FB6 0x1FB7 0x1FB8 0x1FB9 0x1FBA 0x1FBB 0x1FBC 0x1FBD 0x1FBE 0x1FBF 0x1FC0 0x1FC1 0x1FC2 0x1FC3 0x1FC4 0x1FC5 0x1FC6 0x1FC7 0x1FC8 0x1FC9 0x1FCA 0x1FCB 0x1FCC 0x1FCD 0x1FCE 0x1FCF 0x1FD0 0x1FD1 0x1FD2 0x1FD3 0x1FD4 0x1FD5 0x1FD6 0x1FD7 0x1FD8 0x1FD9 0x1FDA 0x1FDB 0x1FDC 0x1FDD 0x1FDE 0x1FDF 0x1FE0 0x1FE1 0x1FE2 0x1FE3 0x1FE4 0x1FE5 0x1FE6 0x1FE7 0x1FE8 0x1FE9 0x1FEA 0x1FEB 0x1FEC 0x1FED 0x1FEE 0x1FEF 0x1FF0 0x1FF1 0x1FF2 0x1FF3 0x1FF4 0x1FF5 0x1FF6 0x1FF7 0x1FF8 0x1FF9 0x1FFA 0x1FFB 0x1FFC 0x1FFD 0x1FFE 0x1FFF 0x1FFF>; | |
| qcom,mdss-dsi-panel-local-hbm-enabled; | |
| qcom,mdss-dsi-panel-name = "mipi_mot_cmd_csot_1080p_dsc_667_c6"; | |
| qcom,mdss-dsi-panel-param-num = <0x5>; | |
| qcom,mdss-dsi-panel-param-verision = <0x1D971>; | |
| qcom,mdss-dsi-panel-peak-brightness = <0x4C4B40>; | |
| qcom,mdss-dsi-panel-status-check-mode = "reg_read"; | |
| qcom,mdss-dsi-panel-status-command = <0x6010001 0x10A>; | |
| qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-status-read-length = <0x1>; | |
| qcom,mdss-dsi-panel-status-value = <0x9C>; | |
| qcom,mdss-dsi-panel-supplier = "csot"; | |
| qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; | |
| qcom,mdss-dsi-reset-sequence = <0x0 0xB 0x1 0x1 0x0 0x1 0x1 0xB>; | |
| qcom,mdss-dsi-stream = <0x0>; | |
| qcom,mdss-dsi-te-dcs-command = <0x1>; | |
| qcom,mdss-dsi-te-pin-select = <0x1>; | |
| qcom,mdss-dsi-te-using-te-pin; | |
| qcom,mdss-dsi-traffic-mode = "burst_mode"; | |
| qcom,mdss-dsi-tx-eot-append; | |
| qcom,mdss-dsi-underflow-color = <0xFF>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x0>; | |
| qcom,mdss-pan-physical-height-dimension = <0x9A>; | |
| qcom,mdss-pan-physical-width-dimension = <0x45>; | |
| qcom,mot_nt37701A_read_cellid; | |
| qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; | |
| qcom,platform-reset-gpio = <&tlmm 0x0 0x0>; | |
| qcom,mdss-dsi-display-timings { | |
| timing@0 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = <0x5010000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = [39 01 00 00 00 00 06 F0 55 AA 52 08 00 39 01 00 00 00 00 02 6F 1C 39 01 00 00 00 00 06 C0 03 14 25 A9 78 39 01 00 00 00 00 06 F0 55 AA 52 08 00 39 01 00 00 00 00 02 6F 06 39 01 00 00 00 00 04 B5 2B 1C 32 39 01 00 00 00 00 02 6F 10 39 01 00 00 00 00 06 B5 1C 1C 1C 1C 1C 39 01 00 00 00 00 05 FF AA 55 A5 80 39 01 00 00 00 00 02 6F 1D 39 01 00 00 00 00 02 F2 05 39 01 00 00 00 00 02 03 01 39 01 00 00 00 00 02 90 01 39 01 00 00 00 00 13 91 AB 28 00 0C C2 00 03 1C 01 7E 00 0F 08 BB 04 3D 10 F0 39 01 00 00 00 00 01 2C 15 00 00 00 00 00 02 6F 01 39 01 00 00 00 00 05 88 02 1C 08 68 39 01 00 00 00 00 03 51 00 00 39 01 00 00 00 00 02 5F 80 39 01 00 00 00 00 02 53 20 05 01 00 00 00 00 01 35 39 01 00 00 00 00 05 2A 00 00 04 37 39 01 00 00 00 00 05 2B 00 00 09 5F 39 01 00 00 00 00 02 2F 03 05 01 00 00 78 00 01 11 05 01 00 00 00 00 01 29]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x3C>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 10 03 03 11 1E 04 04 03 02 04 00 0E 08]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = [15 01 00 00 10 00 02 2F 03]; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| timing@1 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = <0x5010000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = [39 01 00 00 00 00 06 F0 55 AA 52 08 00 39 01 00 00 00 00 02 6F 1C 39 01 00 00 00 00 06 C0 03 14 25 A9 78 39 01 00 00 00 00 06 F0 55 AA 52 08 00 39 01 00 00 00 00 02 6F 06 39 01 00 00 00 00 04 B5 2B 1C 32 39 01 00 00 00 00 02 6F 10 39 01 00 00 00 00 06 B5 1C 1C 1C 1C 1C 39 01 00 00 00 00 05 FF AA 55 A5 80 39 01 00 00 00 00 02 6F 1D 39 01 00 00 00 00 02 F2 05 39 01 00 00 00 00 02 03 01 39 01 00 00 00 00 02 90 01 39 01 00 00 00 00 13 91 AB 28 00 0C C2 00 03 1C 01 7E 00 0F 08 BB 04 3D 10 F0 39 01 00 00 00 00 01 2C 15 00 00 00 00 00 02 6F 01 39 01 00 00 00 00 05 88 02 1C 08 68 39 01 00 00 00 00 03 51 00 00 39 01 00 00 00 00 02 5F 80 39 01 00 00 00 00 02 53 20 05 01 00 00 00 00 01 35 39 01 00 00 00 00 05 2A 00 00 04 37 39 01 00 00 00 00 05 2B 00 00 09 5F 39 01 00 00 00 00 02 2F 07 05 01 00 00 78 00 01 11 05 01 00 00 00 00 01 29]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x5A>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 16 05 05 14 1F 06 06 06 02 04 00 13 0A]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = [15 01 00 00 10 00 02 2F 07]; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| timing@2 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = <0x5010000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = [39 01 00 00 00 00 06 F0 55 AA 52 08 00 39 01 00 00 00 00 02 6F 1C 39 01 00 00 00 00 06 C0 03 14 25 A9 78 39 01 00 00 00 00 06 F0 55 AA 52 08 00 39 01 00 00 00 00 02 6F 06 39 01 00 00 00 00 04 B5 2B 1C 32 39 01 00 00 00 00 02 6F 10 39 01 00 00 00 00 06 B5 1C 1C 1C 1C 1C 39 01 00 00 00 00 05 FF AA 55 A5 80 39 01 00 00 00 00 02 6F 1D 39 01 00 00 00 00 02 F2 05 39 01 00 00 00 00 02 03 01 39 01 00 00 00 00 02 90 01 39 01 00 00 00 00 13 91 AB 28 00 0C C2 00 03 1C 01 7E 00 0F 08 BB 04 3D 10 F0 39 01 00 00 00 00 01 2C 15 00 00 00 00 00 02 6F 01 39 01 00 00 00 00 05 88 02 1C 08 68 39 01 00 00 00 00 03 51 00 00 39 01 00 00 00 00 02 5F 80 39 01 00 00 00 00 02 53 20 05 01 00 00 00 00 01 35 39 01 00 00 00 00 05 2A 00 00 04 37 39 01 00 00 00 00 05 2B 00 00 09 5F 39 01 00 00 00 00 02 2F 02 05 01 00 00 78 00 01 11 05 01 00 00 00 00 01 29]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x78>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 1C 07 07 17 15 07 07 08 02 04 00 18 0C]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = [15 01 00 00 10 00 02 2F 02]; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| timing@3 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = <0x5010000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = [39 01 00 00 00 00 06 F0 55 AA 52 08 00 39 01 00 00 00 00 02 6F 1C 39 01 00 00 00 00 06 C0 03 14 25 A9 78 39 01 00 00 00 00 06 F0 55 AA 52 08 00 39 01 00 00 00 00 02 6F 06 39 01 00 00 00 00 04 B5 2B 1C 32 39 01 00 00 00 00 02 6F 10 39 01 00 00 00 00 06 B5 1C 1C 1C 1C 1C 39 01 00 00 00 00 05 FF AA 55 A5 80 39 01 00 00 00 00 02 6F 1D 39 01 00 00 00 00 02 F2 05 39 01 00 00 00 00 02 03 01 39 01 00 00 00 00 02 90 01 39 01 00 00 00 00 13 91 AB 28 00 0C C2 00 03 1C 01 7E 00 0F 08 BB 04 3D 10 F0 39 01 00 00 00 00 01 2C 15 00 00 00 00 00 02 6F 01 39 01 00 00 00 00 05 88 02 1C 08 68 39 01 00 00 00 00 03 51 00 00 39 01 00 00 00 00 02 5F 80 39 01 00 00 00 00 02 53 20 05 01 00 00 00 00 01 35 39 01 00 00 00 00 05 2A 00 00 04 37 39 01 00 00 00 00 05 2B 00 00 09 5F 39 01 00 00 00 00 02 2F 04 05 01 00 00 78 00 01 11 05 01 00 00 00 00 01 29]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x90>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 20 08 08 18 23 08 08 08 02 04 00 1B 0D]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = [15 01 00 00 10 00 02 2F 04]; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| timing@4 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = <0x5010000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = [39 01 00 00 00 00 06 F0 55 AA 52 08 00 39 01 00 00 00 00 02 6F 1C 39 01 00 00 00 00 06 C0 03 14 25 A9 78 39 01 00 00 00 00 06 F0 55 AA 52 08 00 39 01 00 00 00 00 02 6F 06 39 01 00 00 00 00 04 B5 2B 1C 32 39 01 00 00 00 00 02 6F 10 39 01 00 00 00 00 06 B5 1C 1C 1C 1C 1C 39 01 00 00 00 00 05 FF AA 55 A5 80 39 01 00 00 00 00 02 6F 1D 39 01 00 00 00 00 02 F2 05 39 01 00 00 00 00 02 03 01 39 01 00 00 00 00 02 90 01 39 01 00 00 00 00 13 91 AB 28 00 0C C2 00 03 1C 01 7E 00 0F 08 BB 04 3D 10 F0 39 01 00 00 00 00 01 2C 15 00 00 00 00 00 02 6F 01 39 01 00 00 00 00 05 88 02 1C 08 68 39 01 00 00 00 00 03 51 00 00 39 01 00 00 00 00 02 5F 80 39 01 00 00 00 00 02 53 20 05 01 00 00 00 00 01 35 39 01 00 00 00 00 05 2A 00 00 04 37 39 01 00 00 00 00 05 2B 00 00 09 5F 39 01 00 00 00 00 02 2F 08 05 01 00 00 78 00 01 11 05 01 00 00 00 00 01 29]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x30>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 0D 03 03 10 1D 04 03 02 02 04 00 0C 08]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = [15 01 00 00 10 00 02 2F 08]; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| }; | |
| }; | |
| mot_csot_nt37701_667_1080x2400_camera_cmd: qcom,mdss_dsi_mot_csot_nt37701_667_1080x2400_cam_cmd { | |
| compatible = "qcom,mdss-dsi-panel"; | |
| qcom,bl-dsc-cmd-state = "dsi_hs_mode"; | |
| qcom,dsi-ctrl-num = <0x0>; | |
| qcom,dsi-phy-num = <0x0>; | |
| qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0"; | |
| qcom,esd-check-enabled; | |
| qcom,mdss-brightness-max-level = <0x7FF>; | |
| qcom,mdss-dsi-bl-inverted-dbv; | |
| qcom,mdss-dsi-bl-max-level = <0x7FF>; | |
| qcom,mdss-dsi-bl-min-level = <0x9>; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-border-color = <0x0>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-color-game-command = [15 01 00 00 00 00 02 55 80]; | |
| qcom,mdss-dsi-color-game-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-color-none-command = [15 01 00 00 00 00 02 55 90]; | |
| qcom,mdss-dsi-color-none-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-color-std-command = [15 01 00 00 00 00 02 55 90]; | |
| qcom,mdss-dsi-color-std-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-color-vbt-command = [15 01 00 00 00 00 02 55 90]; | |
| qcom,mdss-dsi-color-vbt-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-hbm-off-command = [39 01 00 00 00 00 03 51 07 FF]; | |
| qcom,mdss-dsi-hbm-on-command = [39 01 00 00 00 00 03 51 0F FF]; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-lp11-init; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-no-panel-on-read-support; | |
| qcom,mdss-dsi-panel-blackness-level = <0x64>; | |
| qcom,mdss-dsi-panel-hdr-color-primaries = <0x3A66 0x3D86 0x84D0 0x3E80 0x32C8 0x8AAC 0x1B58 0x9C4>; | |
| qcom,mdss-dsi-panel-hdr-enabled; | |
| qcom,mdss-dsi-panel-name = "mipi_mot_cmd_csot_1080p_dsc_667"; | |
| qcom,mdss-dsi-panel-param-num = <0x5>; | |
| qcom,mdss-dsi-panel-param-verision = <0x1D971>; | |
| qcom,mdss-dsi-panel-peak-brightness = <0x4C4B40>; | |
| qcom,mdss-dsi-panel-status-check-mode = "reg_read"; | |
| qcom,mdss-dsi-panel-status-command = <0x6010001 0x10A>; | |
| qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-status-read-length = <0x1>; | |
| qcom,mdss-dsi-panel-status-value = <0x9C>; | |
| qcom,mdss-dsi-panel-supplier = "csot"; | |
| qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; | |
| qcom,mdss-dsi-reset-sequence = <0x0 0xB 0x1 0x1 0x0 0x1 0x1 0xB>; | |
| qcom,mdss-dsi-stream = <0x0>; | |
| qcom,mdss-dsi-te-dcs-command = <0x1>; | |
| qcom,mdss-dsi-te-pin-select = <0x1>; | |
| qcom,mdss-dsi-te-using-te-pin; | |
| qcom,mdss-dsi-traffic-mode = "burst_mode"; | |
| qcom,mdss-dsi-tx-eot-append; | |
| qcom,mdss-dsi-underflow-color = <0xFF>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x0>; | |
| qcom,mdss-pan-physical-height-dimension = <0x9A>; | |
| qcom,mdss-pan-physical-width-dimension = <0x45>; | |
| qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; | |
| qcom,platform-reset-gpio = <&tlmm 0x0 0x0>; | |
| qcom,mdss-dsi-display-timings { | |
| timing@0 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = <0x5010000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = [39 01 00 00 00 00 06 F0 55 AA 52 08 00 15 01 00 00 00 00 02 6F 06 39 01 00 00 00 00 04 B5 4E 19 50 15 01 00 00 00 00 02 6F 0D 15 01 00 00 00 00 02 B5 50 15 01 00 00 00 00 02 6F 10 39 01 00 00 00 00 06 B5 19 19 19 19 19 15 01 00 00 00 00 02 99 10 15 01 00 00 00 00 02 90 01 39 01 00 00 00 00 13 91 89 28 00 0C C2 00 03 1C 01 7E 00 0F 08 BB 04 3D 10 F0 15 01 00 00 00 00 02 03 01 05 01 00 00 00 00 01 2C 39 01 00 00 00 00 03 51 00 00 05 01 00 00 00 00 01 35 15 01 00 00 00 00 02 53 20 39 01 00 00 00 00 05 2A 00 00 04 37 39 01 00 00 00 00 05 2B 00 00 09 5F 39 01 00 00 00 00 06 F0 55 AA 52 08 02 15 01 00 00 00 00 02 6F 03 15 01 00 00 00 00 02 BF 02 15 01 00 00 00 00 02 2F 01 39 01 00 00 00 00 06 F0 55 AA 52 08 02 15 01 00 00 00 00 02 6F 03 15 01 00 00 00 00 02 BF 02 15 01 00 00 00 00 02 2F 01 05 01 00 00 6E 00 01 11 05 01 00 00 00 00 01 29]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x3C>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 10 03 03 11 1E 04 04 03 02 04 00 0E 08]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = <0x39010000 0x6F0 0x55AA5208 0x2150100 0x2 0x6F031501 0x0 0x2BF0215 0x1000000 0x22F01>; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| timing@1 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = <0x5010000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = [39 01 00 00 00 00 06 F0 55 AA 52 08 00 15 01 00 00 00 00 02 6F 06 39 01 00 00 00 00 04 B5 4E 19 50 15 01 00 00 00 00 02 6F 0D 15 01 00 00 00 00 02 B5 50 15 01 00 00 00 00 02 6F 10 39 01 00 00 00 00 06 B5 19 19 19 19 19 15 01 00 00 00 00 02 99 10 15 01 00 00 00 00 02 90 01 39 01 00 00 00 00 13 91 89 28 00 0C C2 00 03 1C 01 7E 00 0F 08 BB 04 3D 10 F0 15 01 00 00 00 00 02 03 01 05 01 00 00 00 00 01 2C 39 01 00 00 00 00 03 51 00 00 05 01 00 00 00 00 01 35 15 01 00 00 00 00 02 53 20 39 01 00 00 00 00 05 2A 00 00 04 37 39 01 00 00 00 00 05 2B 00 00 09 5F 39 01 00 00 00 00 06 F0 55 AA 52 08 02 15 01 00 00 00 00 02 6F 03 15 01 00 00 00 00 02 BF 02 15 01 00 00 00 00 02 2F 01 39 01 00 00 00 00 06 F0 55 AA 52 08 02 15 01 00 00 00 00 02 6F 03 15 01 00 00 00 00 02 BF 05 15 01 00 00 00 00 02 2F 02 05 01 00 00 6E 00 01 11 05 01 00 00 00 00 01 29]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x5A>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 16 05 05 14 1F 06 06 06 02 04 00 13 0A]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = <0x39010000 0x6F0 0x55AA5208 0x2150100 0x2 0x6F031501 0x0 0x2BF0515 0x1000000 0x22F02>; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| timing@2 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = <0x5010000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = [39 01 00 00 00 00 06 F0 55 AA 52 08 00 15 01 00 00 00 00 02 6F 06 39 01 00 00 00 00 04 B5 4E 19 50 15 01 00 00 00 00 02 6F 0D 15 01 00 00 00 00 02 B5 50 15 01 00 00 00 00 02 6F 10 39 01 00 00 00 00 06 B5 19 19 19 19 19 15 01 00 00 00 00 02 99 10 15 01 00 00 00 00 02 90 01 39 01 00 00 00 00 13 91 89 28 00 0C C2 00 03 1C 01 7E 00 0F 08 BB 04 3D 10 F0 15 01 00 00 00 00 02 03 01 05 01 00 00 00 00 01 2C 39 01 00 00 00 00 03 51 00 00 05 01 00 00 00 00 01 35 15 01 00 00 00 00 02 53 20 39 01 00 00 00 00 05 2A 00 00 04 37 39 01 00 00 00 00 05 2B 00 00 09 5F 39 01 00 00 00 00 06 F0 55 AA 52 08 02 15 01 00 00 00 00 02 6F 03 15 01 00 00 00 00 02 BF 02 15 01 00 00 00 00 02 2F 01 39 01 00 00 00 00 06 F0 55 AA 52 08 02 15 01 00 00 00 00 02 6F 03 15 01 00 00 00 00 02 BF 03 15 01 00 00 00 00 02 2F 03 05 01 00 00 6E 00 01 11 05 01 00 00 00 00 01 29]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x78>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 1C 07 07 17 15 07 07 08 02 04 00 18 0C]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = <0x39010000 0x6F0 0x55AA5208 0x2150100 0x2 0x6F031501 0x0 0x2BF0315 0x1000000 0x22F03>; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| }; | |
| }; | |
| mot_csot_nt37701_667_1080x2400_camera_gdx_cmd: qcom,mdss_dsi_mot_csot_nt37701_667_1080x2400_cam_gdx_cmd { | |
| compatible = "qcom,mdss-dsi-panel"; | |
| qcom,bl-dsc-cmd-state = "dsi_hs_mode"; | |
| qcom,dsi-ctrl-num = <0x0>; | |
| qcom,dsi-phy-num = <0x0>; | |
| qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0"; | |
| qcom,esd-check-enabled; | |
| qcom,mdss-brightness-max-level = <0x7FF>; | |
| qcom,mdss-dsi-bl-inverted-dbv; | |
| qcom,mdss-dsi-bl-max-level = <0x7FF>; | |
| qcom,mdss-dsi-bl-min-level = <0x9>; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-border-color = <0x0>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-dc-off-command = [39 00 00 00 00 00 06 F0 55 AA 52 08 00 39 00 00 40 00 00 02 B2 18 39 00 00 00 00 00 25 B3 00 08 00 3C 00 3C 00 52 00 52 00 7A 00 7A 00 C2 00 C2 01 42 01 42 02 32 02 32 03 33 03 33 03 33 07 FF 0F FF 39 00 00 40 00 00 02 6F 0F 39 00 00 40 00 00 04 B2 30 80 23 39 00 00 40 00 00 02 6F AC 39 00 00 40 00 00 47 B2 0A 8C 0A 8C 0A C2 0A F7 0B 2C 0B 5F 0B 90 0B C1 0B F1 0C 21 0C 4F 0C 7C 0C A9 0C D5 0D 00 0D 2B 0D 55 0D 7E 0D A7 0D CF 0D F7 0E 1E 0E 45 0E 6B 0E 91 0E B6 0E DB 0E FF 0F 23 0F 47 0F 6A 0F 8D 0F AF 0F D2 0F FF 39 00 00 40 00 00 02 6F 52 39 00 00 00 00 00 45 B3 03 33 03 58 03 7D 03 A2 03 C7 03 EC 04 11 04 36 04 5B 04 80 04 A5 04 CA 04 EF 05 14 05 39 05 5E 05 83 05 A8 05 CD 05 F2 06 17 06 3C 06 61 06 86 06 AB 06 D0 06 F5 07 1A 07 3F 07 64 07 89 07 AE 07 D3 07 FF]; | |
| qcom,mdss-dsi-dc-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-dc-on-command = [39 00 00 00 00 00 06 F0 55 AA 52 08 00 39 00 00 40 00 00 02 B2 98 39 00 00 40 00 00 02 6F 0F 39 00 00 40 00 00 04 B2 00 00 03 39 00 00 40 00 00 25 B3 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 07 FF 0F FF 39 00 00 40 00 00 02 6F AC 39 00 00 40 00 00 47 B2 00 00 01 0A 01 6C 01 B6 01 F3 02 28 02 58 02 84 02 AC 02 D2 02 F5 03 17 03 37 04 E0 06 09 06 FA 07 C9 08 81 09 28 09 C1 0A 51 0A D7 0B 56 0B CF 0C 42 0C B0 0D 1A 0D 80 0D E3 0E 42 0E 9F 0E F9 0F 50 0F A5 0F FF 39 00 00 40 00 00 02 6F 52 39 00 00 00 00 00 45 B3 00 05 00 0A 00 0F 00 14 00 19 00 1E 00 23 00 28 00 2D 00 32 00 37 00 3C 00 96 00 F0 01 4A 01 A4 01 FE 02 58 02 B2 03 0C 03 66 03 C0 04 1A 04 74 04 CE 05 28 05 82 05 DC 06 36 06 90 06 EA 07 44 07 9E 07 FF]; | |
| qcom,mdss-dsi-dc-on-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-hbm-off-command = [39 01 00 00 00 00 03 51 07 FF]; | |
| qcom,mdss-dsi-hbm-on-command = [39 01 00 00 00 00 03 51 0F FF]; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-lp11-init; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-no-panel-on-read-support; | |
| qcom,mdss-dsi-panel-blackness-level = <0x64>; | |
| qcom,mdss-dsi-panel-hdr-color-primaries = <0x3A66 0x3D86 0x84D0 0x3E80 0x32C8 0x8AAC 0x1B58 0x9C4>; | |
| qcom,mdss-dsi-panel-hdr-enabled; | |
| qcom,mdss-dsi-panel-name = "mipi_mot_cmd_csot_1080p_dsc_667"; | |
| qcom,mdss-dsi-panel-param-num = <0x5>; | |
| qcom,mdss-dsi-panel-param-verision = <0x1D971>; | |
| qcom,mdss-dsi-panel-peak-brightness = <0x4C4B40>; | |
| qcom,mdss-dsi-panel-status-check-mode = "reg_read"; | |
| qcom,mdss-dsi-panel-status-command = <0x6010001 0x10A>; | |
| qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-status-read-length = <0x1>; | |
| qcom,mdss-dsi-panel-status-value = <0x9C>; | |
| qcom,mdss-dsi-panel-supplier = "csot"; | |
| qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; | |
| qcom,mdss-dsi-reset-sequence = <0x0 0xB 0x1 0x1 0x0 0x1 0x1 0xB>; | |
| qcom,mdss-dsi-stream = <0x0>; | |
| qcom,mdss-dsi-te-dcs-command = <0x1>; | |
| qcom,mdss-dsi-te-pin-select = <0x1>; | |
| qcom,mdss-dsi-te-using-te-pin; | |
| qcom,mdss-dsi-traffic-mode = "burst_mode"; | |
| qcom,mdss-dsi-tx-eot-append; | |
| qcom,mdss-dsi-underflow-color = <0xFF>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x0>; | |
| qcom,mdss-pan-physical-height-dimension = <0x9A>; | |
| qcom,mdss-pan-physical-width-dimension = <0x45>; | |
| qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; | |
| qcom,platform-reset-gpio = <&tlmm 0x0 0x0>; | |
| qcom,mdss-dsi-display-timings { | |
| timing@0 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = <0x5010000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = <0x39010000 0x6F0 0x55AA5208 0x390100 0x4 0xC04EF321 0x39010000 0x6F0 0x55AA5208 0x4390100 0x2 0xC2143901 0x0 0x2B10339 0x1000000 0x2B240 0x39010000 0x4B8 0xF000039 0x1000000 0x26F03 0x39010000 0x4B8 0x7700039 0x1000000 0x26F01 0x39010000 0x2C7 0xFF390100 0x4 0xB7C14004 0x39010000 0x26F 0xB390100 0x2 0xCAFF3901 0x0 0x6F055AA 0x52080839 0x1000000 0x7C1A7 0x3B8190 0x1E390100 0x2 0x6F063901 0x0 0x8C16489 0xA4BBCFE1 0xF1390100 0x10 0xC2880000 0x88000088 0x8800 0x880000 0x39010000 0xDC3 0x88000088 0x8800 0x880000 0x39010000 0xCC4 0x44000044 0x4400 0x40039 0x1000000 0xAC588 0x8800 0x880000 0x39010000 0x2C6 0x11390100 0x9 0xC7505060 0x70708080 0x80390100 0x9 0xC8505060 0x708080A0 0xA0390100 0x9 0xC9202030 0x405070B0 0xB0390100 0xF 0xCA001427 0x4E9D21 0x3B74B8B0 0x3E0FFF39 0x1000000 0xFCB00 0x1325004A 0x95212952 0xA842940F 0xFF390100 0xF 0xCD000F1F 0x3D7A10 0xF5EACB5C 0x690FFF39 0x1000000 0x10CE22 0x2200 0x220000 0x22000022 0x3901 0x0 0x26F0F39 0x1000000 0xDCE22 0x2200 0x220000 0x22000039 0x1000000 0x26F1B 0x39010000 0x1CCE 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFF39 0x1000000 0x15CFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFF 0xFFFFFFFF 0xFFFFFF39 0x1000000 0x26F22 0x39010000 0xAD0 0x0 0x0 0x390100 0x3 0xD2000139 0x1000000 0x26F02 0x39010000 0xAD2 0x10008700 0x2C000000 0x390100 0x6 0xF055AA52 0x8003901 0x0 0x26F0639 0x1000000 0x4B54E 0x19503901 0x0 0x26F0D39 0x1000000 0x2B550 0x39010000 0x26F 0x10390100 0x6 0xB5191919 0x19193901 0x0 0x2991039 0x1000000 0x29001 0x39010000 0x1391 0xAB28000C 0xC200031C 0x17E000F 0x8BB043D 0x10F03901 0x0 0x2030139 0x1000000 0x22C00 0x39010000 0x351 0x3901 0x0 0x2350039 0x1000000 0x25320 0x39010000 0x52A 0x437 0x39010000 0x52B 0x95F 0x39010000 0x6F0 0x55AA5208 0x2390100 0x2 0x6F033901 0x0 0x2BF0239 0x1000000 0x22F01 0x5010000 0x6E000111 0x5010000 0x129>; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x3C>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 10 03 03 11 1E 04 04 03 02 04 00 0E 08]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = <0x39010000 0x6F0 0x55AA5208 0x2390100 0x2 0x6F033901 0x0 0x2BF0239 0x1000010 0x22F01>; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| timing@1 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = <0x5010000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = [39 01 00 00 00 00 06 F0 55 AA 52 08 00 39 01 00 00 00 00 03 C0 4E F3 39 01 00 00 00 00 02 6F 02 39 01 00 00 00 00 02 C0 21 39 01 00 00 00 00 06 F0 55 AA 52 08 04 39 01 00 00 00 00 02 C2 14 39 01 00 00 00 00 02 B1 03 39 01 00 00 00 00 02 B2 40 39 01 00 00 00 00 04 B8 0F 00 00 39 01 00 00 00 00 02 6F 03 39 01 00 00 00 00 04 B8 07 70 00 39 01 00 00 00 00 02 6F 01 39 01 00 00 00 00 02 C7 FF 39 01 00 00 00 00 04 B7 C1 40 04 39 01 00 00 00 00 02 6F 0B 39 01 00 00 00 00 02 CA FF 39 01 00 00 00 00 06 F0 55 AA 52 08 08 39 01 00 00 00 00 07 C1 A7 00 3B 81 90 1E 39 01 00 00 00 00 02 6F 06 39 01 00 00 00 00 08 C1 64 89 A4 BB CF E1 F1 39 01 00 00 00 00 10 C2 88 00 00 88 00 00 88 00 00 88 00 00 88 00 00 39 01 00 00 00 00 0D C3 88 00 00 88 00 00 88 00 00 88 00 00 39 01 00 00 00 00 0C C4 44 00 00 44 00 00 44 00 00 04 00 39 01 00 00 00 00 0A C5 88 00 00 88 00 00 88 00 00 39 01 00 00 00 00 02 C6 11 39 01 00 00 00 00 09 C7 50 50 60 70 70 80 80 80 39 01 00 00 00 00 09 C8 50 50 60 70 80 80 A0 A0 39 01 00 00 00 00 09 C9 20 20 30 40 50 70 B0 B0 39 01 00 00 00 00 0F CA 00 14 27 00 4E 9D 21 3B 74 B8 B0 3E 0F FF 39 01 00 00 00 00 0F CB 00 13 25 00 4A 95 21 29 52 A8 42 94 0F FF 39 01 00 00 00 00 0F CD 00 0F 1F 00 3D 7A 10 F5 EA CB 5C 69 0F FF 39 01 00 00 00 00 10 CE 22 00 00 22 00 00 22 00 00 22 00 00 22 00 00 39 01 00 00 00 00 02 6F 0F 39 01 00 00 00 00 0D CE 22 00 00 22 00 00 22 00 00 22 00 00 39 01 00 00 00 00 02 6F 1B 39 01 00 00 00 00 1C CE FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF 39 01 00 00 00 00 15 CF FF FF FF FF FF FF FF FF FF 0F FF FF FF FF FF FF FF FF FF FF 39 01 00 00 00 00 02 6F 22 39 01 00 00 00 00 0A D0 00 00 00 00 00 00 00 00 00 39 01 00 00 00 00 03 D2 00 01 39 01 00 00 00 00 02 6F 02 39 01 00 00 00 00 0A D2 10 00 87 00 2C 00 00 00 00 39 01 00 00 00 00 06 F0 55 AA 52 08 00 39 01 00 00 00 00 02 6F 06 39 01 00 00 00 00 04 B5 4E 19 50 39 01 00 00 00 00 02 6F 0D 39 01 00 00 00 00 02 B5 50 39 01 00 00 00 00 02 6F 10 39 01 00 00 00 00 06 B5 19 19 19 19 19 39 01 00 00 00 00 02 99 10 39 01 00 00 00 00 02 90 01 39 01 00 00 00 00 13 91 AB 28 00 0C C2 00 03 1C 01 7E 00 0F 08 BB 04 3D 10 F0 39 01 00 00 00 00 02 03 01 39 01 00 00 00 00 02 2C 00 39 01 00 00 00 00 03 51 00 00 39 01 00 00 00 00 02 35 00 39 01 00 00 00 00 02 53 20 39 01 00 00 00 00 05 2A 00 00 04 37 39 01 00 00 00 00 05 2B 00 00 09 5F 39 01 00 00 00 00 06 F0 55 AA 52 08 02 39 01 00 00 00 00 02 6F 03 39 01 00 00 00 00 02 BF 05 39 01 00 00 00 00 02 2F 02 05 01 00 00 6E 00 01 11 05 01 00 00 00 00 01 29]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x5A>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 16 05 05 14 1F 06 06 06 02 04 00 13 0A]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = <0x39010000 0x6F0 0x55AA5208 0x2390100 0x2 0x6F033901 0x0 0x2BF0539 0x1000010 0x22F02>; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| timing@2 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = <0x5010000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = [39 01 00 00 00 00 06 F0 55 AA 52 08 00 39 01 00 00 00 00 03 C0 4E F3 39 01 00 00 00 00 02 6F 02 39 01 00 00 00 00 02 C0 21 39 01 00 00 00 00 06 F0 55 AA 52 08 04 39 01 00 00 00 00 02 C2 14 39 01 00 00 00 00 02 B1 03 39 01 00 00 00 00 02 B2 40 39 01 00 00 00 00 04 B8 0F 00 00 39 01 00 00 00 00 02 6F 03 39 01 00 00 00 00 04 B8 07 70 00 39 01 00 00 00 00 02 6F 01 39 01 00 00 00 00 02 C7 FF 39 01 00 00 00 00 04 B7 C1 40 04 39 01 00 00 00 00 02 6F 0B 39 01 00 00 00 00 02 CA FF 39 01 00 00 00 00 06 F0 55 AA 52 08 08 39 01 00 00 00 00 07 C1 A7 00 3B 81 90 1E 39 01 00 00 00 00 02 6F 06 39 01 00 00 00 00 08 C1 64 89 A4 BB CF E1 F1 39 01 00 00 00 00 10 C2 88 00 00 88 00 00 88 00 00 88 00 00 88 00 00 39 01 00 00 00 00 0D C3 88 00 00 88 00 00 88 00 00 88 00 00 39 01 00 00 00 00 0C C4 44 00 00 44 00 00 44 00 00 04 00 39 01 00 00 00 00 0A C5 88 00 00 88 00 00 88 00 00 39 01 00 00 00 00 02 C6 11 39 01 00 00 00 00 09 C7 50 50 60 70 70 80 80 80 39 01 00 00 00 00 09 C8 50 50 60 70 80 80 A0 A0 39 01 00 00 00 00 09 C9 20 20 30 40 50 70 B0 B0 39 01 00 00 00 00 0F CA 00 14 27 00 4E 9D 21 3B 74 B8 B0 3E 0F FF 39 01 00 00 00 00 0F CB 00 13 25 00 4A 95 21 29 52 A8 42 94 0F FF 39 01 00 00 00 00 0F CD 00 0F 1F 00 3D 7A 10 F5 EA CB 5C 69 0F FF 39 01 00 00 00 00 10 CE 22 00 00 22 00 00 22 00 00 22 00 00 22 00 00 39 01 00 00 00 00 02 6F 0F 39 01 00 00 00 00 0D CE 22 00 00 22 00 00 22 00 00 22 00 00 39 01 00 00 00 00 02 6F 1B 39 01 00 00 00 00 1C CE FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF 39 01 00 00 00 00 15 CF FF FF FF FF FF FF FF FF FF 0F FF FF FF FF FF FF FF FF FF FF 39 01 00 00 00 00 02 6F 22 39 01 00 00 00 00 0A D0 00 00 00 00 00 00 00 00 00 39 01 00 00 00 00 03 D2 00 01 39 01 00 00 00 00 02 6F 02 39 01 00 00 00 00 0A D2 10 00 87 00 2C 00 00 00 00 39 01 00 00 00 00 06 F0 55 AA 52 08 00 39 01 00 00 00 00 02 6F 06 39 01 00 00 00 00 04 B5 4E 19 50 39 01 00 00 00 00 02 6F 0D 39 01 00 00 00 00 02 B5 50 39 01 00 00 00 00 02 6F 10 39 01 00 00 00 00 06 B5 19 19 19 19 19 39 01 00 00 00 00 02 99 10 39 01 00 00 00 00 02 90 01 39 01 00 00 00 00 13 91 AB 28 00 0C C2 00 03 1C 01 7E 00 0F 08 BB 04 3D 10 F0 39 01 00 00 00 00 02 03 01 39 01 00 00 00 00 02 2C 00 39 01 00 00 00 00 03 51 00 00 39 01 00 00 00 00 02 35 00 39 01 00 00 00 00 02 53 20 39 01 00 00 00 00 05 2A 00 00 04 37 39 01 00 00 00 00 05 2B 00 00 09 5F 39 01 00 00 00 00 06 F0 55 AA 52 08 02 39 01 00 00 00 00 02 6F 03 39 01 00 00 00 00 02 BF 03 39 01 00 00 00 00 02 2F 03 05 01 00 00 6E 00 01 11 05 01 00 00 00 00 01 29]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x78>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 1C 07 07 17 15 07 07 08 02 04 00 18 0C]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = <0x39010000 0x6F0 0x55AA5208 0x2390100 0x2 0x6F033901 0x0 0x2BF0339 0x1000010 0x22F03>; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| }; | |
| }; | |
| mot_csot_nt37701_667_1080x2400_camera_gdx_cmd_v1: qcom,mdss_dsi_mot_csot_nt37701_667_1080x2400_cam_gdx_cmd_v1 { | |
| compatible = "qcom,mdss-dsi-panel"; | |
| qcom,bl-dsc-cmd-state = "dsi_hs_mode"; | |
| qcom,dsi-ctrl-num = <0x0>; | |
| qcom,dsi-phy-num = <0x0>; | |
| qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0"; | |
| qcom,esd-check-enabled; | |
| qcom,mdss-brightness-max-level = <0x7FF>; | |
| qcom,mdss-dsi-bl-inverted-dbv; | |
| qcom,mdss-dsi-bl-max-level = <0x7FF>; | |
| qcom,mdss-dsi-bl-min-level = <0x9>; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-border-color = <0x0>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-color-game-command = [15 01 00 00 00 00 02 55 80]; | |
| qcom,mdss-dsi-color-game-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-color-none-command = [15 01 00 00 00 00 02 55 90]; | |
| qcom,mdss-dsi-color-none-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-color-std-command = [15 01 00 00 00 00 02 55 90]; | |
| qcom,mdss-dsi-color-std-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-color-vbt-command = [15 01 00 00 00 00 02 55 90]; | |
| qcom,mdss-dsi-color-vbt-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-hbm-off-command = [39 01 00 00 00 00 03 51 07 FF]; | |
| qcom,mdss-dsi-hbm-on-command = [39 01 00 00 00 00 03 51 0F FF]; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-lp11-init; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-no-panel-on-read-support; | |
| qcom,mdss-dsi-panel-blackness-level = <0x64>; | |
| qcom,mdss-dsi-panel-hdr-color-primaries = <0x3A66 0x3D86 0x84D0 0x3E80 0x32C8 0x8AAC 0x1B58 0x9C4>; | |
| qcom,mdss-dsi-panel-hdr-enabled; | |
| qcom,mdss-dsi-panel-name = "mipi_mot_cmd_csot_1080p_dsc_667"; | |
| qcom,mdss-dsi-panel-param-num = <0x5>; | |
| qcom,mdss-dsi-panel-param-verision = <0x1D971>; | |
| qcom,mdss-dsi-panel-peak-brightness = <0x4C4B40>; | |
| qcom,mdss-dsi-panel-status-check-mode = "reg_read"; | |
| qcom,mdss-dsi-panel-status-command = <0x6010001 0x10A>; | |
| qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-status-read-length = <0x1>; | |
| qcom,mdss-dsi-panel-status-value = <0x9C>; | |
| qcom,mdss-dsi-panel-supplier = "csot"; | |
| qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; | |
| qcom,mdss-dsi-reset-sequence = <0x0 0xB 0x1 0x1 0x0 0x1 0x1 0xB>; | |
| qcom,mdss-dsi-stream = <0x0>; | |
| qcom,mdss-dsi-te-dcs-command = <0x1>; | |
| qcom,mdss-dsi-te-pin-select = <0x1>; | |
| qcom,mdss-dsi-te-using-te-pin; | |
| qcom,mdss-dsi-traffic-mode = "burst_mode"; | |
| qcom,mdss-dsi-tx-eot-append; | |
| qcom,mdss-dsi-underflow-color = <0xFF>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x0>; | |
| qcom,mdss-pan-physical-height-dimension = <0x9A>; | |
| qcom,mdss-pan-physical-width-dimension = <0x45>; | |
| qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; | |
| qcom,platform-reset-gpio = <&tlmm 0x0 0x0>; | |
| qcom,mdss-dsi-display-timings { | |
| timing@0 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = <0x5010000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = [39 01 00 00 00 00 06 F0 55 AA 52 08 00 15 01 00 00 00 00 02 6F 06 39 01 00 00 00 00 04 B5 4E 19 50 15 01 00 00 00 00 02 6F 0D 15 01 00 00 00 00 02 B5 50 15 01 00 00 00 00 02 6F 10 39 01 00 00 00 00 06 B5 19 19 19 19 19 15 01 00 00 00 00 02 99 10 15 01 00 00 00 00 02 90 01 39 01 00 00 00 00 13 91 89 28 00 0C C2 00 03 1C 01 7E 00 0F 08 BB 04 3D 10 F0 15 01 00 00 00 00 02 03 01 05 01 00 00 00 00 01 2C 39 01 00 00 00 00 03 51 00 00 05 01 00 00 00 00 01 35 15 01 00 00 00 00 02 53 20 39 01 00 00 00 00 05 2A 00 00 04 37 39 01 00 00 00 00 05 2B 00 00 09 5F 39 01 00 00 00 00 06 F0 55 AA 52 08 02 15 01 00 00 00 00 02 6F 03 15 01 00 00 00 00 02 BF 02 15 01 00 00 00 00 02 2F 01 05 01 00 00 6E 00 01 11 05 01 00 00 00 00 01 29]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x3C>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 10 03 03 11 1E 04 04 03 02 04 00 0E 08]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = <0x39010000 0x6F0 0x55AA5208 0x2150100 0x2 0x6F031501 0x0 0x2BF0215 0x1000010 0x22F01>; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| timing@1 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = <0x5010000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = [39 01 00 00 00 00 06 F0 55 AA 52 08 00 15 01 00 00 00 00 02 6F 06 39 01 00 00 00 00 04 B5 4E 19 50 15 01 00 00 00 00 02 6F 0D 15 01 00 00 00 00 02 B5 50 15 01 00 00 00 00 02 6F 10 39 01 00 00 00 00 06 B5 19 19 19 19 19 15 01 00 00 00 00 02 99 10 15 01 00 00 00 00 02 90 01 39 01 00 00 00 00 13 91 89 28 00 0C C2 00 03 1C 01 7E 00 0F 08 BB 04 3D 10 F0 15 01 00 00 00 00 02 03 01 05 01 00 00 00 00 01 2C 39 01 00 00 00 00 03 51 00 00 05 01 00 00 00 00 01 35 15 01 00 00 00 00 02 53 20 39 01 00 00 00 00 05 2A 00 00 04 37 39 01 00 00 00 00 05 2B 00 00 09 5F 39 01 00 00 00 00 06 F0 55 AA 52 08 02 15 01 00 00 00 00 02 6F 03 15 01 00 00 00 00 02 BF 05 15 01 00 00 00 00 02 2F 02 05 01 00 00 6E 00 01 11 05 01 00 00 00 00 01 29]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x78>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 1C 07 07 17 15 07 07 08 02 04 00 18 0C]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = <0x39010000 0x6F0 0x55AA5208 0x2150100 0x2 0x6F031501 0x0 0x2BF0515 0x1000010 0x22F02>; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| timing@2 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = <0x5010000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = [39 01 00 00 00 00 06 F0 55 AA 52 08 00 15 01 00 00 00 00 02 6F 06 39 01 00 00 00 00 04 B5 4E 19 50 15 01 00 00 00 00 02 6F 0D 15 01 00 00 00 00 02 B5 50 15 01 00 00 00 00 02 6F 10 39 01 00 00 00 00 06 B5 19 19 19 19 19 15 01 00 00 00 00 02 99 10 15 01 00 00 00 00 02 90 01 39 01 00 00 00 00 13 91 89 28 00 0C C2 00 03 1C 01 7E 00 0F 08 BB 04 3D 10 F0 15 01 00 00 00 00 02 03 01 05 01 00 00 00 00 01 2C 39 01 00 00 00 00 03 51 00 00 05 01 00 00 00 00 01 35 15 01 00 00 00 00 02 53 20 39 01 00 00 00 00 05 2A 00 00 04 37 39 01 00 00 00 00 05 2B 00 00 09 5F 39 01 00 00 00 00 06 F0 55 AA 52 08 02 15 01 00 00 00 00 02 6F 03 15 01 00 00 00 00 02 BF 03 15 01 00 00 00 00 02 2F 03 05 01 00 00 6E 00 01 11 05 01 00 00 00 00 01 29]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x90>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 20 08 08 18 23 08 08 08 02 04 00 1B 0D]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = <0x39010000 0x6F0 0x55AA5208 0x2150100 0x2 0x6F031501 0x0 0x2BF0315 0x1000010 0x22F03>; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| }; | |
| }; | |
| mot_csot_nt37701_667_1080x2400_dsc_cmd: qcom,mdss_dsi_mot_csot_nt37701_667_1080x2400_dsc_cmd { | |
| compatible = "qcom,mdss-dsi-panel"; | |
| qcom,bl-dsc-cmd-state = "dsi_hs_mode"; | |
| qcom,dsi-ctrl-num = <0x0>; | |
| qcom,dsi-phy-num = <0x0>; | |
| qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0"; | |
| qcom,esd-check-enabled; | |
| qcom,mdss-brightness-max-level = <0x7FF>; | |
| qcom,mdss-dsi-bl-inverted-dbv; | |
| qcom,mdss-dsi-bl-max-level = <0x7FF>; | |
| qcom,mdss-dsi-bl-min-level = <0x9>; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-border-color = <0x0>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-color-game-command = [15 00 00 00 00 00 02 55 80]; | |
| qcom,mdss-dsi-color-game-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-color-none-command = [15 00 00 00 00 00 02 55 90]; | |
| qcom,mdss-dsi-color-none-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-color-std-command = [15 00 00 00 00 00 02 55 90]; | |
| qcom,mdss-dsi-color-std-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-color-vbt-command = [15 00 00 00 00 00 02 55 90]; | |
| qcom,mdss-dsi-color-vbt-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-dc-off-command = <0x39000000 0x6F0 0x55AA5208 0x390000 0x40000002 0xB2183900 0x0 0x25B30008 0x200020 0x480048 0x800080 0xF000F0 0x1C101C1 0x1C201C2 0x3330333 0x7FF07FF 0xFFF3900 0x0 0x6F055AA 0x52080439 0x0 0x4CD220 0x201A0A04 0x20161010 0x8401510 0x10082015 0x10140620 0x10101003 0xFF40301B 0x8A03424 0x18144028 0x22181840 0x26262412 0x40242220 0x720201A 0xA042016 0x10120820 0x15101008 0x20151014 0x6201010 0x10033900 0x0 0x4CD44028 0x20100550 0x2512120A 0x40201009 0x840200B 0x10063018 0xB0606FF 0x5040200B 0xA0402016 0x1080301F 0x1210602F 0x1F200B50 0x2818100B 0x40282010 0x5502512 0x60A4020 0x10090840 0x200B1006 0x30180B06 0x6390000 0x4C 0xD9883020 0x1004482A 0x180A0848 0x21100808 0x60151010 0x5601510 0x805FF60 0x4420088F 0x50301212 0x8F422512 0x12602020 0x20106020 0x1F101088 0x30201004 0x482A180A 0x8482110 0x8084015 0x8100540 0x15100805>; | |
| qcom,mdss-dsi-dc-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-dc-on-command = <0x39000000 0x6F0 0x55AA5208 0x390000 0x40000002 0xB2983900 0x0 0x25B30000 0x0 0x0 0x0 0x0 0x1C1 0x1C201C2 0x3330333 0x7FF07FF 0xFFF3900 0x0 0x6F055AA 0x52080439 0x0 0x4CD21A 0x1A1A0A04 0x10101010 0x8101010 0x10081010 0x10080610 0x10100403 0x3030301B 0x8242424 0x18142222 0x22181824 0x24242412 0x20202020 0x71A1A1A 0xA041010 0x10120810 0x10101008 0x14141414 0x6101010 0x10033900 0x0 0x4CD42020 0x20100512 0x1212120A 0x10101009 0x8101010 0x10060606 0x6060640 0x4040200B 0x20202016 0x101F1F1F 0x12102020 0x20200B10 0x1010100B 0x20202010 0x5121212 0x60A1010 0x10090810 0x10101006 0x6060606 0x6390000 0x4C 0xD9202020 0x10041818 0x180A0810 0x10100808 0x10101010 0x5080808 0x8054444 0x44200830 0x30301212 0x25252512 0x12202020 0x20101010 0x10101020 0x20201004 0x1818180A 0x8101010 0x8081010 0x10100508 0x8080805>; | |
| qcom,mdss-dsi-dc-on-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-hbm-off-command = [39 00 00 00 00 00 03 51 07 FF]; | |
| qcom,mdss-dsi-hbm-on-command = [39 00 00 00 00 00 03 51 0F FF]; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-lp11-init; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-no-panel-on-read-support; | |
| qcom,mdss-dsi-panel-blackness-level = <0x64>; | |
| qcom,mdss-dsi-panel-hdr-color-primaries = <0x3A66 0x3D86 0x84D0 0x3E80 0x32C8 0x8AAC 0x1B58 0x9C4>; | |
| qcom,mdss-dsi-panel-hdr-enabled; | |
| qcom,mdss-dsi-panel-name = "mipi_mot_cmd_csot_1080p_dsc_667"; | |
| qcom,mdss-dsi-panel-param-num = <0x5>; | |
| qcom,mdss-dsi-panel-param-verision = <0x1D971>; | |
| qcom,mdss-dsi-panel-peak-brightness = <0x4C4B40>; | |
| qcom,mdss-dsi-panel-status-check-mode = "reg_read"; | |
| qcom,mdss-dsi-panel-status-command = <0x6010001 0x10A>; | |
| qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-status-read-length = <0x1>; | |
| qcom,mdss-dsi-panel-status-value = <0x9C>; | |
| qcom,mdss-dsi-panel-supplier = "csot"; | |
| qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; | |
| qcom,mdss-dsi-reset-sequence = <0x0 0xB 0x1 0x1 0x0 0x1 0x1 0xB>; | |
| qcom,mdss-dsi-stream = <0x0>; | |
| qcom,mdss-dsi-te-dcs-command = <0x1>; | |
| qcom,mdss-dsi-te-pin-select = <0x1>; | |
| qcom,mdss-dsi-te-using-te-pin; | |
| qcom,mdss-dsi-traffic-mode = "burst_mode"; | |
| qcom,mdss-dsi-tx-eot-append; | |
| qcom,mdss-dsi-underflow-color = <0xFF>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x0>; | |
| qcom,mdss-pan-physical-height-dimension = <0x9A>; | |
| qcom,mdss-pan-physical-width-dimension = <0x45>; | |
| qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; | |
| qcom,platform-reset-gpio = <&tlmm 0x0 0x0>; | |
| qcom,mdss-dsi-display-timings { | |
| timing@0 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = <0x5010000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = <0x39010000 0x6F0 0x55AA5208 0x390100 0x2 0x6F063901 0x0 0x4B54E1F 0x50390100 0x2 0x6F0D3901 0x0 0x2B55039 0x1000000 0x26F10 0x39010000 0x6B5 0x1F1F1F1F 0x1F390100 0x6 0xF055AA52 0x8073901 0x0 0x26F0039 0x1000000 0x16C521 0x34903 0x4900003F 0xFF41763F 0xFF417600 0xACAD1 0x39010000 0x26F 0x15390100 0x10 0xC501FE15 0x21B3233 0x8003490F 0xE3E30000 0x39010000 0x26F 0x24390100 0x8 0xC5000000 0x0 0x39010000 0x26F 0x390100 0x16 0xC6270003 0x49034900 0x0 0x3FFF41 0x76000000 0x3901 0x0 0x26F1539 0x1000000 0x10C602 0x1C150239 0x32338000 0x31DE3 0x3901 0x0 0x26F2439 0x1000000 0x8C600 0x0 0x3901 0x0 0x26F0039 0x1000000 0x16C72D 0x38403 0x4900003F 0xFF341800 0x80 0x0 0x39010000 0x26F 0x15390100 0x10 0xC701FE33 0x21B5133 0x5000000C 0xE21D0000 0x39010000 0x26F 0x24390100 0x8 0xC7000000 0x0 0x39010000 0x26F 0x390100 0x16 0xC82B0003 0x84034900 0x0 0x0 0xFFFFF4 0x735C3901 0x0 0x26F1539 0x1000000 0x10C802 0x1C330239 0x51335FFC 0x9A001E1D 0x3901 0x0 0x26F2439 0x1000000 0x8C800 0x0 0x3901 0x0 0x6F055AA 0x52080039 0x1000000 0x26F02 0x39010000 0x3EC 0x81C23901 0x0 0x6F055AA 0x52080039 0x1000000 0x19CC40 0x545A6066 0x6A6C6C68 0x625B534D 0x48444140 0x50607058 0x68747439 0x1000000 0x12CD40 0x40404040 0x40404040 0x45494C4B 0x48444140 0x39010000 0x13CE 0x404040 0x40404040 0x40404040 0x40404040 0x40403901 0x0 0x12CF4040 0x40404040 0x40404040 0x40404040 0x40404039 0x1000000 0x7D000 0xFC740C 0x1D390100 0x2E 0xD1505050 0x50505050 0x50505050 0x50505050 0x50505050 0x50505050 0x50000000 0x0 0x0 0x60C 0x3090F68 0x88003901 0x0 0x7D33052 0x74745010 0x39010000 0x1AD4 0xF77740F 0x140F18 0x1F050D14 0x3070AA0 0x75FA1044 0x12000080 0x390100 0x14 0xD7304040 0x40404040 0x40404040 0x40404040 0x40404040 0x39010000 0x255 0x90390100 0x6 0xF055AA52 0x8073901 0x0 0x3C0010F 0x39010000 0x6F0 0x55AA5208 0x1390100 0x2 0x6F013901 0x0 0x2CD8139 0x1000000 0x6F055 0xAA520808 0x39010000 0x3C0 0xF7E1501 0x0 0x2030115 0x1000000 0x29001 0x39010000 0x1391 0xAB28000C 0xC200031C 0x17E000F 0x8BB043D 0x10F01501 0x0 0x22C0039 0x1000000 0x35100 0x150100 0x2 0x53201501 0x0 0x2350039 0x1000000 0x52A00 0x43739 0x1000000 0x52B00 0x95F39 0x1000000 0x6F055 0xAA520804 0x15000000 0x26F 0x390000 0x1A 0xD220201A 0xA042016 0x10100840 0x15101008 0x20151014 0x6201010 0x10031500 0x0 0x26F1939 0x0 0x1AD2FF 0x40301B08 0xA0342418 0x14402822 0x18184026 0x26241240 0x24222007 0x15000000 0x26F 0x32390100 0x1A 0xD220201A 0xA042016 0x10120820 0x15101008 0x20151014 0x6201010 0x10031500 0x0 0x26F0039 0x0 0x1AD440 0x28201005 0x50251212 0xA402010 0x9084020 0xB100630 0x180B0606 0x15000000 0x26F 0x19390000 0x1A 0xD4FF5040 0x200BA040 0x20161080 0x301F1210 0x602F1F20 0xB502818 0x100B1500 0x0 0x26F3239 0x1000000 0x1AD440 0x28201005 0x50251206 0xA402010 0x9084020 0xB100630 0x180B0606 0x15000000 0x26F 0x390000 0x1A 0xD9883020 0x1004482A 0x180A0848 0x21100808 0x60151010 0x5601510 0x8051500 0x0 0x26F1939 0x0 0x1AD9FF 0x60442008 0x8F503012 0x128F4225 0x12126020 0x20201060 0x201F1010 0x15000000 0x26F 0x32390100 0x1A 0xD9883020 0x1004482A 0x180A0848 0x21100808 0x40150810 0x5401510 0x8051501 0x0 0x22F0115 0x1000000 0x28B00 0x5010000 0x6E000111 0x5010000 0x129>; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x3C>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 10 03 03 11 1E 04 04 03 02 04 00 0E 08]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = [15 01 00 00 10 00 02 2F 01 15 01 00 00 00 00 02 8B 00]; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| timing@1 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = <0x5010000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = <0x39010000 0x6F0 0x55AA5208 0x390100 0x2 0x6F063901 0x0 0x4B54E1F 0x50390100 0x2 0x6F0D3901 0x0 0x2B55039 0x1000000 0x26F10 0x39010000 0x6B5 0x1F1F1F1F 0x1F390100 0x6 0xF055AA52 0x8073901 0x0 0x26F0039 0x1000000 0x16C521 0x34903 0x4900003F 0xFF41763F 0xFF417600 0xACAD1 0x39010000 0x26F 0x15390100 0x10 0xC501FE15 0x21B3233 0x8003490F 0xE3E30000 0x39010000 0x26F 0x24390100 0x8 0xC5000000 0x0 0x39010000 0x26F 0x390100 0x16 0xC6270003 0x49034900 0x0 0x3FFF41 0x76000000 0x3901 0x0 0x26F1539 0x1000000 0x10C602 0x1C150239 0x32338000 0x31DE3 0x3901 0x0 0x26F2439 0x1000000 0x8C600 0x0 0x3901 0x0 0x26F0039 0x1000000 0x16C72D 0x38403 0x4900003F 0xFF341800 0x80 0x0 0x39010000 0x26F 0x15390100 0x10 0xC701FE33 0x21B5133 0x5000000C 0xE21D0000 0x39010000 0x26F 0x24390100 0x8 0xC7000000 0x0 0x39010000 0x26F 0x390100 0x16 0xC82B0003 0x84034900 0x0 0x0 0xFFFFF4 0x735C3901 0x0 0x26F1539 0x1000000 0x10C802 0x1C330239 0x51335FFC 0x9A001E1D 0x3901 0x0 0x26F2439 0x1000000 0x8C800 0x0 0x3901 0x0 0x6F055AA 0x52080039 0x1000000 0x26F02 0x39010000 0x3EC 0x81C23901 0x0 0x6F055AA 0x52080039 0x1000000 0x19CC40 0x545A6066 0x6A6C6C68 0x625B534D 0x48444140 0x50607058 0x68747439 0x1000000 0x12CD40 0x40404040 0x40404040 0x45494C4B 0x48444140 0x39010000 0x13CE 0x404040 0x40404040 0x40404040 0x40404040 0x40403901 0x0 0x12CF4040 0x40404040 0x40404040 0x40404040 0x40404039 0x1000000 0x7D000 0xFC740C 0x1D390100 0x2E 0xD1505050 0x50505050 0x50505050 0x50505050 0x50505050 0x50505050 0x50000000 0x0 0x0 0x60C 0x3090F68 0x88003901 0x0 0x7D33052 0x74745010 0x39010000 0x1AD4 0xF77740F 0x140F18 0x1F050D14 0x3070AA0 0x75FA1044 0x12000080 0x390100 0x14 0xD7304040 0x40404040 0x40404040 0x40404040 0x40404040 0x39010000 0x255 0x90390100 0x6 0xF055AA52 0x8073901 0x0 0x3C0010F 0x39010000 0x6F0 0x55AA5208 0x1390100 0x2 0x6F013901 0x0 0x2CD8139 0x1000000 0x6F055 0xAA520808 0x39010000 0x3C0 0xF7E1501 0x0 0x2030115 0x1000000 0x29001 0x39010000 0x1391 0xAB28000C 0xC200031C 0x17E000F 0x8BB043D 0x10F01501 0x0 0x22C0039 0x1000000 0x35100 0x150100 0x2 0x53201501 0x0 0x2350039 0x1000000 0x52A00 0x43739 0x1000000 0x52B00 0x95F39 0x1000000 0x6F055 0xAA520804 0x15000000 0x26F 0x390000 0x1A 0xD220201A 0xA042016 0x10100840 0x15101008 0x20151014 0x6201010 0x10031500 0x0 0x26F1939 0x0 0x1AD2FF 0x40301B08 0xA0342418 0x14402822 0x18184026 0x26241240 0x24222007 0x15000000 0x26F 0x32390100 0x1A 0xD220201A 0xA042016 0x10120820 0x15101008 0x20151014 0x6201010 0x10031500 0x0 0x26F0039 0x0 0x1AD440 0x28201005 0x50251212 0xA402010 0x9084020 0xB100630 0x180B0606 0x15000000 0x26F 0x19390000 0x1A 0xD4FF5040 0x200BA040 0x20161080 0x301F1210 0x602F1F20 0xB502818 0x100B1500 0x0 0x26F3239 0x1000000 0x1AD440 0x28201005 0x50251206 0xA402010 0x9084020 0xB100630 0x180B0606 0x15000000 0x26F 0x390000 0x1A 0xD9883020 0x1004482A 0x180A0848 0x21100808 0x60151010 0x5601510 0x8051500 0x0 0x26F1939 0x0 0x1AD9FF 0x60442008 0x8F503012 0x128F4225 0x12126020 0x20201060 0x201F1010 0x15000000 0x26F 0x32390100 0x1A 0xD9883020 0x1004482A 0x180A0848 0x21100808 0x40150810 0x5401510 0x8051501 0x0 0x22F0315 0x1000000 0x28B00 0x5010000 0x56000111 0x5010000 0x129>; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x5A>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 16 05 05 14 1F 06 06 06 02 04 00 13 0A]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = [15 01 00 00 0B 00 02 2F 03 15 01 00 00 00 00 02 8B 00]; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| timing@2 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = <0x5010000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = <0x39010000 0x6F0 0x55AA5208 0x390100 0x2 0x6F063901 0x0 0x4B54E1F 0x50390100 0x2 0x6F0D3901 0x0 0x2B55039 0x1000000 0x26F10 0x39010000 0x6B5 0x1F1F1F1F 0x1F390100 0x6 0xF055AA52 0x8073901 0x0 0x26F0039 0x1000000 0x16C521 0x34903 0x4900003F 0xFF41763F 0xFF417600 0xACAD1 0x39010000 0x26F 0x15390100 0x10 0xC501FE15 0x21B3233 0x8003490F 0xE3E30000 0x39010000 0x26F 0x24390100 0x8 0xC5000000 0x0 0x39010000 0x26F 0x390100 0x16 0xC6270003 0x49034900 0x0 0x3FFF41 0x76000000 0x3901 0x0 0x26F1539 0x1000000 0x10C602 0x1C150239 0x32338000 0x31DE3 0x3901 0x0 0x26F2439 0x1000000 0x8C600 0x0 0x3901 0x0 0x26F0039 0x1000000 0x16C72D 0x38403 0x4900003F 0xFF341800 0x80 0x0 0x39010000 0x26F 0x15390100 0x10 0xC701FE33 0x21B5133 0x5000000C 0xE21D0000 0x39010000 0x26F 0x24390100 0x8 0xC7000000 0x0 0x39010000 0x26F 0x390100 0x16 0xC82B0003 0x84034900 0x0 0x0 0xFFFFF4 0x735C3901 0x0 0x26F1539 0x1000000 0x10C802 0x1C330239 0x51335FFC 0x9A001E1D 0x3901 0x0 0x26F2439 0x1000000 0x8C800 0x0 0x3901 0x0 0x6F055AA 0x52080039 0x1000000 0x26F02 0x39010000 0x3EC 0x81C23901 0x0 0x6F055AA 0x52080039 0x1000000 0x19CC40 0x545A6066 0x6A6C6C68 0x625B534D 0x48444140 0x50607058 0x68747439 0x1000000 0x12CD40 0x40404040 0x40404040 0x45494C4B 0x48444140 0x39010000 0x13CE 0x404040 0x40404040 0x40404040 0x40404040 0x40403901 0x0 0x12CF4040 0x40404040 0x40404040 0x40404040 0x40404039 0x1000000 0x7D000 0xFC740C 0x1D390100 0x2E 0xD1505050 0x50505050 0x50505050 0x50505050 0x50505050 0x50505050 0x50000000 0x0 0x0 0x60C 0x3090F68 0x88003901 0x0 0x7D33052 0x74745010 0x39010000 0x1AD4 0xF77740F 0x140F18 0x1F050D14 0x3070AA0 0x75FA1044 0x12000080 0x390100 0x14 0xD7304040 0x40404040 0x40404040 0x40404040 0x40404040 0x39010000 0x255 0x90390100 0x6 0xF055AA52 0x8073901 0x0 0x3C0010F 0x39010000 0x6F0 0x55AA5208 0x1390100 0x2 0x6F013901 0x0 0x2CD8139 0x1000000 0x6F055 0xAA520808 0x39010000 0x3C0 0xF7E1501 0x0 0x2030115 0x1000000 0x29001 0x39010000 0x1391 0xAB28000C 0xC200031C 0x17E000F 0x8BB043D 0x10F01501 0x0 0x22C0039 0x1000000 0x35100 0x150100 0x2 0x53201501 0x0 0x2350039 0x1000000 0x52A00 0x43739 0x1000000 0x52B00 0x95F39 0x1000000 0x6F055 0xAA520804 0x15000000 0x26F 0x390000 0x1A 0xD220201A 0xA042016 0x10100840 0x15101008 0x20151014 0x6201010 0x10031500 0x0 0x26F1939 0x0 0x1AD2FF 0x40301B08 0xA0342418 0x14402822 0x18184026 0x26241240 0x24222007 0x15000000 0x26F 0x32390100 0x1A 0xD220201A 0xA042016 0x10120820 0x15101008 0x20151014 0x6201010 0x10031500 0x0 0x26F0039 0x0 0x1AD440 0x28201005 0x50251212 0xA402010 0x9084020 0xB100630 0x180B0606 0x15000000 0x26F 0x19390000 0x1A 0xD4FF5040 0x200BA040 0x20161080 0x301F1210 0x602F1F20 0xB502818 0x100B1500 0x0 0x26F3239 0x1000000 0x1AD440 0x28201005 0x50251206 0xA402010 0x9084020 0xB100630 0x180B0606 0x15000000 0x26F 0x390000 0x1A 0xD9883020 0x1004482A 0x180A0848 0x21100808 0x60151010 0x5601510 0x8051500 0x0 0x26F1939 0x0 0x1AD9FF 0x60442008 0x8F503012 0x128F4225 0x12126020 0x20201060 0x201F1010 0x15000000 0x26F 0x32390100 0x1A 0xD9883020 0x1004482A 0x180A0848 0x21100808 0x40150810 0x5401510 0x8051501 0x0 0x22F0215 0x1000000 0x28B00 0x5010000 0x56000111 0x5010000 0x129>; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x78>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 1C 07 07 17 15 07 07 08 02 04 00 18 0C]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = [15 01 00 00 08 00 02 2F 02 15 01 00 00 00 00 02 8B 00]; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| timing@3 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = <0x5010000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = <0x39010000 0x6F0 0x55AA5208 0x390100 0x2 0x6F063901 0x0 0x4B54E1F 0x50390100 0x2 0x6F0D3901 0x0 0x2B55039 0x1000000 0x26F10 0x39010000 0x6B5 0x1F1F1F1F 0x1F390100 0x6 0xF055AA52 0x8073901 0x0 0x26F0039 0x1000000 0x16C521 0x34903 0x4900003F 0xFF41763F 0xFF417600 0xACAD1 0x39010000 0x26F 0x15390100 0x10 0xC501FE15 0x21B3233 0x8003490F 0xE3E30000 0x39010000 0x26F 0x24390100 0x8 0xC5000000 0x0 0x39010000 0x26F 0x390100 0x16 0xC6270003 0x49034900 0x0 0x3FFF41 0x76000000 0x3901 0x0 0x26F1539 0x1000000 0x10C602 0x1C150239 0x32338000 0x31DE3 0x3901 0x0 0x26F2439 0x1000000 0x8C600 0x0 0x3901 0x0 0x26F0039 0x1000000 0x16C72D 0x38403 0x4900003F 0xFF341800 0x80 0x0 0x39010000 0x26F 0x15390100 0x10 0xC701FE33 0x21B5133 0x5000000C 0xE21D0000 0x39010000 0x26F 0x24390100 0x8 0xC7000000 0x0 0x39010000 0x26F 0x390100 0x16 0xC82B0003 0x84034900 0x0 0x0 0xFFFFF4 0x735C3901 0x0 0x26F1539 0x1000000 0x10C802 0x1C330239 0x51335FFC 0x9A001E1D 0x3901 0x0 0x26F2439 0x1000000 0x8C800 0x0 0x3901 0x0 0x6F055AA 0x52080039 0x1000000 0x26F02 0x39010000 0x3EC 0x81C23901 0x0 0x6F055AA 0x52080039 0x1000000 0x19CC40 0x545A6066 0x6A6C6C68 0x625B534D 0x48444140 0x50607058 0x68747439 0x1000000 0x12CD40 0x40404040 0x40404040 0x45494C4B 0x48444140 0x39010000 0x13CE 0x404040 0x40404040 0x40404040 0x40404040 0x40403901 0x0 0x12CF4040 0x40404040 0x40404040 0x40404040 0x40404039 0x1000000 0x7D000 0xFC740C 0x1D390100 0x2E 0xD1505050 0x50505050 0x50505050 0x50505050 0x50505050 0x50505050 0x50000000 0x0 0x0 0x60C 0x3090F68 0x88003901 0x0 0x7D33052 0x74745010 0x39010000 0x1AD4 0xF77740F 0x140F18 0x1F050D14 0x3070AA0 0x75FA1044 0x12000080 0x390100 0x14 0xD7304040 0x40404040 0x40404040 0x40404040 0x40404040 0x39010000 0x255 0x90390100 0x6 0xF055AA52 0x8073901 0x0 0x3C0010F 0x39010000 0x6F0 0x55AA5208 0x1390100 0x2 0x6F013901 0x0 0x2CD8139 0x1000000 0x6F055 0xAA520808 0x39010000 0x3C0 0xF7E1501 0x0 0x2030115 0x1000000 0x29001 0x39010000 0x1391 0xAB28000C 0xC200031C 0x17E000F 0x8BB043D 0x10F01501 0x0 0x22C0039 0x1000000 0x35100 0x150100 0x2 0x53201501 0x0 0x2350039 0x1000000 0x52A00 0x43739 0x1000000 0x52B00 0x95F39 0x1000000 0x6F055 0xAA520804 0x15000000 0x26F 0x390000 0x1A 0xD220201A 0xA042016 0x10100840 0x15101008 0x20151014 0x6201010 0x10031500 0x0 0x26F1939 0x0 0x1AD2FF 0x40301B08 0xA0342418 0x14402822 0x18184026 0x26241240 0x24222007 0x15000000 0x26F 0x32390100 0x1A 0xD220201A 0xA042016 0x10120820 0x15101008 0x20151014 0x6201010 0x10031500 0x0 0x26F0039 0x0 0x1AD440 0x28201005 0x50251212 0xA402010 0x9084020 0xB100630 0x180B0606 0x15000000 0x26F 0x19390000 0x1A 0xD4FF5040 0x200BA040 0x20161080 0x301F1210 0x602F1F20 0xB502818 0x100B1500 0x0 0x26F3239 0x1000000 0x1AD440 0x28201005 0x50251206 0xA402010 0x9084020 0xB100630 0x180B0606 0x15000000 0x26F 0x390000 0x1A 0xD9883020 0x1004482A 0x180A0848 0x21100808 0x60151010 0x5601510 0x8051500 0x0 0x26F1939 0x0 0x1AD9FF 0x60442008 0x8F503012 0x128F4225 0x12126020 0x20201060 0x201F1010 0x15000000 0x26F 0x32390100 0x1A 0xD9883020 0x1004482A 0x180A0848 0x21100808 0x40150810 0x5401510 0x8051501 0x0 0x22F0415 0x1000000 0x28B10 0x5010000 0x56000111 0x5010000 0x129>; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x90>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 20 08 08 18 23 08 08 08 02 04 00 1B 0D]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = [15 01 00 00 06 00 02 2F 04 15 01 00 00 00 00 02 8B 10]; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| timing@4 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = <0x5010000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = <0x39010000 0x6F0 0x55AA5208 0x390100 0x2 0x6F063901 0x0 0x4B54E1F 0x50390100 0x2 0x6F0D3901 0x0 0x2B55039 0x1000000 0x26F10 0x39010000 0x6B5 0x1F1F1F1F 0x1F390100 0x6 0xF055AA52 0x8073901 0x0 0x26F0039 0x1000000 0x16C521 0x34903 0x4900003F 0xFF41763F 0xFF417600 0xACAD1 0x39010000 0x26F 0x15390100 0x10 0xC501FE15 0x21B3233 0x8003490F 0xE3E30000 0x39010000 0x26F 0x24390100 0x8 0xC5000000 0x0 0x39010000 0x26F 0x390100 0x16 0xC6270003 0x49034900 0x0 0x3FFF41 0x76000000 0x3901 0x0 0x26F1539 0x1000000 0x10C602 0x1C150239 0x32338000 0x31DE3 0x3901 0x0 0x26F2439 0x1000000 0x8C600 0x0 0x3901 0x0 0x26F0039 0x1000000 0x16C72D 0x38403 0x4900003F 0xFF341800 0x80 0x0 0x39010000 0x26F 0x15390100 0x10 0xC701FE33 0x21B5133 0x5000000C 0xE21D0000 0x39010000 0x26F 0x24390100 0x8 0xC7000000 0x0 0x39010000 0x26F 0x390100 0x16 0xC82B0003 0x84034900 0x0 0x0 0xFFFFF4 0x735C3901 0x0 0x26F1539 0x1000000 0x10C802 0x1C330239 0x51335FFC 0x9A001E1D 0x3901 0x0 0x26F2439 0x1000000 0x8C800 0x0 0x3901 0x0 0x6F055AA 0x52080039 0x1000000 0x26F02 0x39010000 0x3EC 0x81C23901 0x0 0x6F055AA 0x52080039 0x1000000 0x19CC40 0x545A6066 0x6A6C6C68 0x625B534D 0x48444140 0x50607058 0x68747439 0x1000000 0x12CD40 0x40404040 0x40404040 0x45494C4B 0x48444140 0x39010000 0x13CE 0x404040 0x40404040 0x40404040 0x40404040 0x40403901 0x0 0x12CF4040 0x40404040 0x40404040 0x40404040 0x40404039 0x1000000 0x7D000 0xFC740C 0x1D390100 0x2E 0xD1505050 0x50505050 0x50505050 0x50505050 0x50505050 0x50505050 0x50000000 0x0 0x0 0x60C 0x3090F68 0x88003901 0x0 0x7D33052 0x74745010 0x39010000 0x1AD4 0xF77740F 0x140F18 0x1F050D14 0x3070AA0 0x75FA1044 0x12000080 0x390100 0x14 0xD7304040 0x40404040 0x40404040 0x40404040 0x40404040 0x39010000 0x255 0x90390100 0x6 0xF055AA52 0x8073901 0x0 0x3C0010F 0x39010000 0x6F0 0x55AA5208 0x1390100 0x2 0x6F013901 0x0 0x2CD8139 0x1000000 0x6F055 0xAA520808 0x39010000 0x3C0 0xF7E1501 0x0 0x2030115 0x1000000 0x29001 0x39010000 0x1391 0xAB28000C 0xC200031C 0x17E000F 0x8BB043D 0x10F01501 0x0 0x22C0039 0x1000000 0x35100 0x150100 0x2 0x53201501 0x0 0x2350039 0x1000000 0x52A00 0x43739 0x1000000 0x52B00 0x95F39 0x1000000 0x6F055 0xAA520804 0x15000000 0x26F 0x390000 0x1A 0xD220201A 0xA042016 0x10100840 0x15101008 0x20151014 0x6201010 0x10031500 0x0 0x26F1939 0x0 0x1AD2FF 0x40301B08 0xA0342418 0x14402822 0x18184026 0x26241240 0x24222007 0x15000000 0x26F 0x32390100 0x1A 0xD220201A 0xA042016 0x10120820 0x15101008 0x20151014 0x6201010 0x10031500 0x0 0x26F0039 0x0 0x1AD440 0x28201005 0x50251212 0xA402010 0x9084020 0xB100630 0x180B0606 0x15000000 0x26F 0x19390000 0x1A 0xD4FF5040 0x200BA040 0x20161080 0x301F1210 0x602F1F20 0xB502818 0x100B1500 0x0 0x26F3239 0x1000000 0x1AD440 0x28201005 0x50251206 0xA402010 0x9084020 0xB100630 0x180B0606 0x15000000 0x26F 0x390000 0x1A 0xD9883020 0x1004482A 0x180A0848 0x21100808 0x60151010 0x5601510 0x8051500 0x0 0x26F1939 0x0 0x1AD9FF 0x60442008 0x8F503012 0x128F4225 0x12126020 0x20201060 0x201F1010 0x15000000 0x26F 0x32390100 0x1A 0xD9883020 0x1004482A 0x180A0848 0x21100808 0x40150810 0x5401510 0x8051501 0x0 0x22F0815 0x1000000 0x28B00 0x5010000 0xC8000111 0x5010000 0x129>; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x30>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 0D 03 03 10 1D 04 03 02 02 04 00 0C 08]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = [15 01 00 00 14 00 02 2F 08 15 01 00 00 00 00 02 8B 00]; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| }; | |
| }; | |
| mot_dummy_vid_qhd: qcom,mdss_dsi_mot_dummy_qhd_video { | |
| qcom,dsi-ctrl-num = <0x0>; | |
| qcom,dsi-phy-num = <0x0>; | |
| qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0"; | |
| qcom,mdss-dsi-bl-max-level = <0xFF>; | |
| qcom,mdss-dsi-bl-min-level = <0x1>; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dummy"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-border-color = <0x0>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-no-panel-on-read-support; | |
| qcom,mdss-dsi-panel-name = "mipi_mot_video_dummy_qhd"; | |
| qcom,mdss-dsi-panel-supplier = "video_dummy"; | |
| qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| qcom,mdss-dsi-reset-sequence = <0x1 0x0>; | |
| qcom,mdss-dsi-stream = <0x0>; | |
| qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; | |
| qcom,mdss-dsi-tx-eot-append; | |
| qcom,mdss-dsi-underflow-color = <0xFF>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x0>; | |
| qcom,mdss-pan-physical-height-dimension = <0x5F>; | |
| qcom,mdss-pan-physical-width-dimension = <0x36>; | |
| qcom,platform-reset-gpio = <&tlmm 0x0 0x0>; | |
| qcom,mdss-dsi-display-timings { | |
| timing@0 { | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x0 0x1>; | |
| qcom,mdss-dsi-h-back-porch = <0x4>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x20>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = <0x5010000 0x23000128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = <0x5010000 0xA000111 0x5010000 0x129>; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x3C>; | |
| qcom,mdss-dsi-panel-height = <0x3C0>; | |
| qcom,mdss-dsi-panel-width = <0x21C>; | |
| qcom,mdss-dsi-v-back-porch = <0x10>; | |
| qcom,mdss-dsi-v-front-porch = <0xF>; | |
| qcom,mdss-dsi-v-pulse-width = <0x1>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| }; | |
| qcom,panel-supply-entries { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| qcom,panel-supply-entry@0 { | |
| qcom,supply-disable-load = <0x50>; | |
| qcom,supply-enable-load = <0xF230>; | |
| qcom,supply-max-voltage = <0x1B7740>; | |
| qcom,supply-min-voltage = <0x1B7740>; | |
| qcom,supply-name = "vddio"; | |
| qcom,supply-post-on-sleep = <0x14>; | |
| reg = <0x0>; | |
| }; | |
| qcom,panel-supply-entry@1 { | |
| qcom,supply-disable-load = <0x64>; | |
| qcom,supply-enable-load = <0x493E0>; | |
| qcom,supply-max-voltage = <0x2DC6C0>; | |
| qcom,supply-min-voltage = <0x2DC6C0>; | |
| qcom,supply-name = "vci"; | |
| qcom,supply-post-off-sleep = <0x0>; | |
| qcom,supply-post-on-sleep = <0x0>; | |
| qcom,supply-pre-off-sleep = <0x0>; | |
| qcom,supply-pre-on-sleep = <0x0>; | |
| reg = <0x1>; | |
| }; | |
| }; | |
| }; | |
| mot_tianma_nt37701A_667_1080x2400_dsc_cmd: qcom,mdss_dsi_mot_tianma_nt37701A_667_1080x2400_dsc_cmd { | |
| compatible = "qcom,mdss-dsi-panel"; | |
| qcom,bl-dsc-cmd-state = "dsi_hs_mode"; | |
| qcom,dsi-ctrl-num = <0x0>; | |
| qcom,dsi-phy-num = <0x0>; | |
| qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0"; | |
| qcom,esd-check-enabled; | |
| qcom,mdss-brightness-max-level = <0xDBB>; | |
| qcom,mdss-dsi-bl-inverted-dbv; | |
| qcom,mdss-dsi-bl-is-exponent; | |
| qcom,mdss-dsi-bl-max-level = <0xDBB>; | |
| qcom,mdss-dsi-bl-min-level = <0x9>; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-border-color = <0x0>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-dc-off-command = [39 00 00 00 00 00 06 F0 55 AA 52 08 00 39 00 00 40 00 00 02 B2 11 39 00 00 00 00 00 25 B3 00 09 00 E1 00 E1 01 EF 01 EF 02 D2 02 D2 04 3B 04 3B 05 08 05 08 05 09 05 09 07 B1 07 B1 0C 7D 0C 7D 0F FF 39 00 00 40 00 00 02 6F 0F 39 00 00 00 00 00 07 B2 30 20 85 08 25 08 39 00 00 00 00 00 06 F0 55 AA 52 08 04 39 00 00 00 00 00 4C D2 40 21 35 16 20 50 3F 39 28 15 A8 48 2A 35 25 A0 58 55 48 38 90 6B 68 50 10 40 21 35 16 20 50 3F 39 28 15 A8 48 2A 35 25 A0 58 55 48 38 90 6B 68 50 10 40 21 35 16 20 50 3F 39 28 15 A8 48 2A 35 25 A0 58 55 48 38 90 6B 68 50 10 39 00 00 00 00 00 02 58 00]; | |
| qcom,mdss-dsi-dc-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-dc-on-command = [39 00 00 00 00 00 06 F0 55 AA 52 08 00 39 00 00 40 00 00 02 B2 91 39 00 00 40 00 00 02 6F 0F 39 00 00 40 00 00 07 B2 00 20 00 00 00 00 39 00 00 00 00 00 25 B3 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 05 09 07 B1 07 B1 0C 7D 0C 7D 0F FF 39 00 00 00 00 00 06 F0 55 AA 52 08 04 39 00 00 00 00 00 4C D2 35 35 35 16 20 39 39 39 28 15 2A 2A 2A 35 25 55 55 55 48 38 68 68 68 50 10 35 35 35 16 20 39 39 39 28 15 2A 2A 2A 35 25 55 55 55 48 38 68 68 68 50 10 35 35 35 16 20 39 39 39 28 15 2A 2A 2A 35 25 55 55 55 48 38 68 68 68 50 10 39 00 00 00 00 00 02 58 01]; | |
| qcom,mdss-dsi-dc-on-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-hbm-off-command = [39 01 00 00 00 00 03 51 0C 7D]; | |
| qcom,mdss-dsi-hbm-on-command = [39 01 00 00 00 00 03 51 0F FF]; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-lp11-init; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-no-panel-on-read-support; | |
| qcom,mdss-dsi-panel-blackness-level = <0x64>; | |
| qcom,mdss-dsi-panel-hdr-color-primaries = <0x3A66 0x3D86 0x84D0 0x3E80 0x32C8 0x8AAC 0x1B58 0x9C4>; | |
| qcom,mdss-dsi-panel-hdr-enabled; | |
| qcom,mdss-dsi-panel-name = "mipi_mot_cmd_tianma_1080p_667"; | |
| qcom,mdss-dsi-panel-param-num = <0x5>; | |
| qcom,mdss-dsi-panel-param-verision = <0x1D971>; | |
| qcom,mdss-dsi-panel-peak-brightness = <0x4C4B40>; | |
| qcom,mdss-dsi-panel-status-check-mode = "reg_read"; | |
| qcom,mdss-dsi-panel-status-command = <0x6010001 0x10A>; | |
| qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-status-read-length = <0x1>; | |
| qcom,mdss-dsi-panel-status-value = <0x9C>; | |
| qcom,mdss-dsi-panel-supplier = "tianma"; | |
| qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; | |
| qcom,mdss-dsi-reset-sequence = <0x0 0xB 0x1 0x1 0x0 0x1 0x1 0xB>; | |
| qcom,mdss-dsi-stream = <0x0>; | |
| qcom,mdss-dsi-te-dcs-command = <0x1>; | |
| qcom,mdss-dsi-te-pin-select = <0x1>; | |
| qcom,mdss-dsi-te-using-te-pin; | |
| qcom,mdss-dsi-traffic-mode = "burst_mode"; | |
| qcom,mdss-dsi-tx-eot-append; | |
| qcom,mdss-dsi-underflow-color = <0xFF>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x0>; | |
| qcom,mdss-pan-physical-height-dimension = <0x9A>; | |
| qcom,mdss-pan-physical-width-dimension = <0x45>; | |
| qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; | |
| qcom,platform-reset-gpio = <&tlmm 0x0 0x0>; | |
| qcom,mdss-dsi-display-timings { | |
| timing@0 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = <0x5010000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = [39 01 00 00 00 00 06 F0 55 AA 52 08 00 39 01 00 00 00 00 02 6F 05 39 01 00 00 00 00 05 B5 7F 49 20 50 39 01 00 00 00 00 02 6F 10 39 01 00 00 00 00 06 B5 20 20 20 20 20 39 01 00 00 00 00 02 6F 1C 39 01 00 00 00 00 06 C0 15 27 38 00 49 39 01 00 00 00 00 02 6F 2C 39 01 00 00 00 00 03 B3 09 A0 39 01 00 00 00 00 02 5F 80 39 01 00 00 00 00 05 3B 00 10 00 04 39 01 00 00 00 00 02 90 01 39 01 00 00 00 00 13 91 89 28 00 0C C2 00 03 1C 01 7E 00 0F 08 BB 04 3D 10 F0 39 01 00 00 00 00 02 03 01 39 01 00 00 00 00 03 51 00 00 39 01 00 00 00 00 02 53 20 39 01 00 00 00 00 02 35 00 39 01 00 00 00 00 05 2A 00 00 04 37 39 01 00 00 00 00 05 2B 00 00 09 5F 39 01 00 00 00 00 02 2F 01 05 01 00 00 78 00 01 11 05 01 00 00 00 00 01 29]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x3C>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 10 03 03 11 1E 04 04 03 02 04 00 0E 08]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = [15 01 00 00 10 00 02 2F 01]; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| timing@1 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = <0x5010000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = [39 01 00 00 00 00 06 F0 55 AA 52 08 00 39 01 00 00 00 00 02 6F 05 39 01 00 00 00 00 05 B5 7F 49 20 50 39 01 00 00 00 00 02 6F 10 39 01 00 00 00 00 06 B5 20 20 20 20 20 39 01 00 00 00 00 02 6F 1C 39 01 00 00 00 00 06 C0 15 27 38 00 49 39 01 00 00 00 00 02 6F 2C 39 01 00 00 00 00 03 B3 09 A0 39 01 00 00 00 00 02 5F 80 39 01 00 00 00 00 05 3B 00 10 00 04 39 01 00 00 00 00 02 90 01 39 01 00 00 00 00 13 91 89 28 00 0C C2 00 03 1C 01 7E 00 0F 08 BB 04 3D 10 F0 39 01 00 00 00 00 02 03 01 39 01 00 00 00 00 03 51 00 00 39 01 00 00 00 00 02 53 20 39 01 00 00 00 00 02 35 00 39 01 00 00 00 00 05 2A 00 00 04 37 39 01 00 00 00 00 05 2B 00 00 09 5F 39 01 00 00 00 00 02 2F 03 05 01 00 00 78 00 01 11 05 01 00 00 00 00 01 29]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x5A>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 16 05 05 14 1F 06 06 06 02 04 00 13 0A]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = [15 01 00 00 10 00 02 2F 03]; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| timing@2 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = <0x5010000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = [39 00 00 00 00 00 06 F0 55 AA 52 08 00 39 00 00 00 00 00 02 6F 05 39 00 00 00 00 00 05 B5 7F 49 20 50 39 00 00 00 00 00 02 6F 10 39 00 00 00 00 00 06 B5 20 20 20 20 20 39 01 00 00 00 00 02 6F 1C 39 01 00 00 00 00 06 C0 15 27 38 00 49 39 01 00 00 00 00 02 6F 2C 39 01 00 00 00 00 03 B3 09 A0 39 01 00 00 00 00 02 5F 80 39 01 00 00 00 00 05 3B 00 10 00 04 39 01 00 00 00 00 02 90 01 39 01 00 00 00 00 13 91 89 28 00 0C C2 00 03 1C 01 7E 00 0F 08 BB 04 3D 10 F0 39 01 00 00 00 00 02 03 01 39 01 00 00 00 00 03 51 00 00 39 01 00 00 00 00 02 53 20 39 01 00 00 00 00 02 35 00 39 01 00 00 00 00 05 2A 00 00 04 37 39 01 00 00 00 00 05 2B 00 00 09 5F 39 01 00 00 00 00 02 2F 02 05 01 00 00 78 00 01 11 05 01 00 00 00 00 01 29]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x78>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 1C 07 07 17 15 07 07 08 02 04 00 18 0C]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = [15 01 00 00 10 00 02 2F 02]; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| timing@3 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = <0x5010000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = [39 01 00 00 00 00 06 F0 55 AA 52 08 00 39 01 00 00 00 00 02 6F 05 39 01 00 00 00 00 05 B5 7F 49 20 50 39 01 00 00 00 00 02 6F 10 39 01 00 00 00 00 06 B5 20 20 20 20 20 39 01 00 00 00 00 02 6F 1C 39 01 00 00 00 00 06 C0 15 27 38 00 49 39 01 00 00 00 00 02 6F 2C 39 01 00 00 00 00 03 B3 09 A0 39 01 00 00 00 00 02 5F 80 39 01 00 00 00 00 05 3B 00 10 00 04 39 01 00 00 00 00 02 90 01 39 01 00 00 00 00 13 91 89 28 00 0C C2 00 03 1C 01 7E 00 0F 08 BB 04 3D 10 F0 39 01 00 00 00 00 02 03 01 39 01 00 00 00 00 03 51 00 00 39 01 00 00 00 00 02 53 20 39 01 00 00 00 00 02 35 00 39 01 00 00 00 00 05 2A 00 00 04 37 39 01 00 00 00 00 05 2B 00 00 09 5F 39 01 00 00 00 00 02 2F 04 05 01 00 00 78 00 01 11 05 01 00 00 00 00 01 29]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x90>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 20 08 08 18 23 08 08 08 02 04 00 1B 0D]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = [15 01 00 00 10 00 02 2F 04]; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| timing@4 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = <0x5010000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = [39 01 00 00 00 00 06 F0 55 AA 52 08 00 39 01 00 00 00 00 02 6F 05 39 01 00 00 00 00 05 B5 7F 49 20 50 39 01 00 00 00 00 02 6F 10 39 01 00 00 00 00 06 B5 20 20 20 20 20 39 01 00 00 00 00 02 6F 1C 39 01 00 00 00 00 06 C0 15 27 38 00 49 39 01 00 00 00 00 02 6F 2C 39 01 00 00 00 00 03 B3 09 A0 39 01 00 00 00 00 02 5F 80 39 01 00 00 00 00 05 3B 00 10 00 04 39 01 00 00 00 00 02 90 01 39 01 00 00 00 00 13 91 89 28 00 0C C2 00 03 1C 01 7E 00 0F 08 BB 04 3D 10 F0 39 01 00 00 00 00 02 03 01 39 01 00 00 00 00 03 51 00 00 39 01 00 00 00 00 02 53 20 39 01 00 00 00 00 02 35 00 39 01 00 00 00 00 05 2A 00 00 04 37 39 01 00 00 00 00 05 2B 00 00 09 5F 39 01 00 00 00 00 02 2F 08 05 01 00 00 78 00 01 11 05 01 00 00 00 00 01 29]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x30>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 0D 03 03 10 1D 04 03 02 02 04 00 0C 08]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = [15 01 00 00 10 00 02 2F 08]; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| }; | |
| }; | |
| mot_tianma_nt37701A_667_curve_1080x2400_dsc_cmd: qcom,mdss_dsi_mot_tianma_nt37701A_667_curve_1080x2400_dsc_cmd { | |
| compatible = "qcom,mdss-dsi-panel"; | |
| qcom,backlight_map_type = <0x2>; | |
| qcom,bl-dsc-cmd-state = "dsi_hs_mode"; | |
| qcom,dsi-ctrl-num = <0x0>; | |
| qcom,dsi-phy-num = <0x0>; | |
| qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0"; | |
| qcom,esd-check-enabled; | |
| qcom,mdss-brightness-max-level = <0xDBB>; | |
| qcom,mdss-dsi-bl-inverted-dbv; | |
| qcom,mdss-dsi-bl-is-exponent; | |
| qcom,mdss-dsi-bl-max-level = <0xDBB>; | |
| qcom,mdss-dsi-bl-min-level = <0x9>; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-border-color = <0x0>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-dc-off-command = <0x39000000 0x258 0x390000 0x40000006 0xF055AA52 0x8003900 0x400000 0x2B21139 0x4000 0x26F0F 0x39000040 0x9B2 0x60503584 0x85842584 0x39000000 0x25B3 0x100EF 0xEF0219 0x2190305 0x30504A1 0x4A10584 0x5840585 0x5850874 0x8740DBB 0xDBB0FFF>; | |
| qcom,mdss-dsi-dc-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-dc-on-command = <0x39000000 0x258 0x1390000 0x40000006 0xF055AA52 0x8003900 0x400000 0x2B29039 0x4000 0x26F0F 0x39000040 0x9B2 0x60503000 0x80002000 0x39000000 0x25B3 0x0 0x0 0x0 0x0 0x0 0x585 0x5850874 0x8740DBB 0xDBB0FFF>; | |
| qcom,mdss-dsi-dc-on-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-hbm-fod; | |
| qcom,mdss-dsi-hbm-fod-on-command = [39 00 00 40 00 00 03 51 0F FF 39 00 00 40 00 00 03 87 1F FF 39 00 00 40 00 00 06 88 01 02 1C 08 68 15 00 00 00 00 00 01 85]; | |
| qcom,mdss-dsi-hbm-fod-on-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-hbm-off-command = [39 00 00 00 00 00 03 87 0F FF 15 01 00 00 00 00 01 86]; | |
| qcom,mdss-dsi-hbm-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-hbm-on-command = <0x39000040 0x351 0xFFF3900 0x400000 0x3870FFF 0x15000000 0x186>; | |
| qcom,mdss-dsi-hbm-on-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-lp11-init; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-no-panel-on-read-support; | |
| qcom,mdss-dsi-panel-blackness-level = <0x64>; | |
| qcom,mdss-dsi-panel-hdr-color-primaries = <0x3A66 0x3D86 0x84D0 0x3E80 0x32C8 0x8AAC 0x1B58 0x9C4>; | |
| qcom,mdss-dsi-panel-hdr-enabled; | |
| qcom,mdss-dsi-panel-local-hbm-alpha-register = <0x87>; | |
| qcom,mdss-dsi-panel-local-hbm-alpha-size = <0x1000>; | |
| qcom,mdss-dsi-panel-local-hbm-alpha-table = <0x10F2 0x10F2 0x10F2 0x10F2 0x10F2 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F3 0x10F4 0x10F4 0x10F4 0x10F4 0x10F4 0x10F4 0x10F4 0x10F5 0x10F5 0x10F5 0x10F5 0x10F5 0x10F5 0x10F6 0x10F6 0x10F6 0x10F6 0x10F6 0x10F7 0x10F7 0x10F7 0x10F7 0x10F8 0x10F8 0x10F8 0x10F8 0x10F9 0x10F9 0x10F9 0x10FA 0x10FA 0x10FA 0x10FA 0x10FB 0x10FB 0x10FB 0x10FC 0x10FC 0x10FC 0x10FD 0x10FD 0x10FD 0x10FE 0x10FE 0x10FE 0x10FF 0x10FF 0x1100 0x1100 0x1100 0x1101 0x1101 0x1102 0x1102 0x1102 0x1103 0x1103 0x1104 0x1104 0x1104 0x1105 0x1105 0x1106 0x1106 0x1107 0x1107 0x1108 0x1108 0x1109 0x1109 0x1109 0x110A 0x110A 0x110B 0x110B 0x110C 0x110C 0x110D 0x110D 0x110E 0x110E 0x110F 0x110F 0x1110 0x1111 0x1111 0x1112 0x1112 0x1113 0x1113 0x1114 0x1114 0x1115 0x1115 0x1116 0x1117 0x1117 0x1118 0x1118 0x1119 0x1119 0x111A 0x111B 0x111B 0x111C 0x111C 0x111D 0x111E 0x111E 0x111F 0x111F 0x1120 0x1121 0x1121 0x1122 0x1122 0x1123 0x1124 0x1124 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0x1F9E 0x1F9F 0x1FA0 0x1FA1 0x1FA2 0x1FA3 0x1FA4 0x1FA5 0x1FA6 0x1FA7 0x1FA8 0x1FA9 0x1FAA 0x1FAB 0x1FAC 0x1FAD 0x1FAE 0x1FAF 0x1FB0 0x1FB1 0x1FB2 0x1FB3 0x1FB4 0x1FB5 0x1FB6 0x1FB7 0x1FB8 0x1FB9 0x1FBA 0x1FBB 0x1FBC 0x1FBD 0x1FBE 0x1FBF 0x1FC0 0x1FC1 0x1FC2 0x1FC3 0x1FC4 0x1FC5 0x1FC6 0x1FC7 0x1FC8 0x1FC9 0x1FCA 0x1FCB 0x1FCC 0x1FCD 0x1FCE 0x1FCF 0x1FD0 0x1FD1 0x1FD2 0x1FD3 0x1FD4 0x1FD5 0x1FD6 0x1FD7 0x1FD8 0x1FD9 0x1FDA 0x1FDB 0x1FDC 0x1FDD 0x1FDE 0x1FDF 0x1FE0 0x1FE1 0x1FE2 0x1FE3 0x1FE4 0x1FE5 0x1FE6 0x1FE7 0x1FE8 0x1FE9 0x1FEA 0x1FEB 0x1FEC 0x1FED 0x1FEE 0x1FEF 0x1FF0 0x1FF1 0x1FF2 0x1FF3 0x1FF4 0x1FF5 0x1FF6 0x1FF7 0x1FF8 0x1FF9 0x1FFA 0x1FFB 0x1FFC 0x1FFD 0x1FFE 0x1FFF 0x1FFF>; | |
| qcom,mdss-dsi-panel-local-hbm-enabled; | |
| qcom,mdss-dsi-panel-name = "mipi_mot_cmd_tianma_1080p_667"; | |
| qcom,mdss-dsi-panel-param-num = <0x5>; | |
| qcom,mdss-dsi-panel-param-verision = <0x1D971>; | |
| qcom,mdss-dsi-panel-peak-brightness = <0x4C4B40>; | |
| qcom,mdss-dsi-panel-status-check-mode = "reg_read"; | |
| qcom,mdss-dsi-panel-status-command = <0x6010001 0x10A>; | |
| qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-status-read-length = <0x1>; | |
| qcom,mdss-dsi-panel-status-value = <0x9C>; | |
| qcom,mdss-dsi-panel-supplier = "tianma"; | |
| qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; | |
| qcom,mdss-dsi-reset-sequence = <0x0 0xB 0x1 0x1 0x0 0x1 0x1 0xB>; | |
| qcom,mdss-dsi-stream = <0x0>; | |
| qcom,mdss-dsi-te-dcs-command = <0x1>; | |
| qcom,mdss-dsi-te-pin-select = <0x1>; | |
| qcom,mdss-dsi-te-using-te-pin; | |
| qcom,mdss-dsi-traffic-mode = "burst_mode"; | |
| qcom,mdss-dsi-tx-eot-append; | |
| qcom,mdss-dsi-underflow-color = <0xFF>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x0>; | |
| qcom,mdss-pan-physical-height-dimension = <0x9A>; | |
| qcom,mdss-pan-physical-width-dimension = <0x45>; | |
| qcom,mot_nt37701A_read_cellid; | |
| qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; | |
| qcom,platform-reset-gpio = <&tlmm 0x0 0x0>; | |
| qcom,mdss-dsi-display-timings { | |
| timing@0 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = <0x5010000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = [39 01 00 00 00 00 06 F0 55 AA 52 08 07 39 01 00 00 00 00 0F C0 01 01 00 00 55 00 00 00 00 00 00 00 00 00 39 01 00 00 00 00 02 6F 00 39 01 00 00 00 00 16 C9 21 00 29 71 29 71 00 00 3F DE A7 12 3F DE A7 12 80 06 B5 63 E1 39 01 00 00 00 00 02 6F 15 39 01 00 00 00 00 10 C9 71 B5 C6 82 1C 2D 33 E0 29 71 0F 99 99 00 00 39 01 00 00 00 00 02 6F 24 39 01 00 00 00 00 08 C9 00 00 00 00 00 00 00 39 01 00 00 00 00 02 6F 00 39 01 00 00 00 00 16 CA 27 00 29 71 28 A4 00 00 00 00 00 00 3F DF 4C 08 80 00 00 00 00 39 01 00 00 00 00 02 6F 15 39 01 00 00 00 00 10 CA 72 1D C6 82 83 2D 33 D0 00 00 03 67 9A 00 00 39 01 00 00 00 00 02 6F 24 39 01 00 00 00 00 08 CA 00 00 00 00 00 00 00 39 01 00 00 00 00 02 6F 00 39 01 00 00 00 00 16 CB 2D 00 28 A4 29 71 00 00 3F DF 4C 08 80 00 00 00 00 00 00 00 00 39 01 00 00 00 00 02 6F 15 39 01 00 00 00 00 10 CB 81 B5 2E 82 1C 94 33 70 00 00 0C 9A 67 00 00 39 01 00 00 00 00 02 6F 24 39 01 00 00 00 00 08 CB 00 00 00 00 00 00 00 39 01 00 00 00 00 02 6F 00 39 01 00 00 00 00 16 CC 2B 00 28 A4 28 A4 00 00 00 00 00 00 80 00 00 00 7F F9 8C 56 F0 39 01 00 00 00 00 02 6F 15 39 01 00 00 00 00 10 CC 82 1D 2E 82 83 94 33 8F D7 5C 00 66 66 00 00 39 01 00 00 00 00 02 6F 24 39 01 00 00 00 00 08 CC 00 00 00 00 00 00 00 39 01 00 00 00 00 06 F0 55 AA 52 08 02 39 01 00 00 00 00 02 6F 08 39 01 00 00 00 00 03 D0 0C E4 39 01 00 00 00 00 02 6F 0A 39 01 00 00 00 00 03 D0 0B 60 39 01 00 00 00 00 02 6F 0C 39 01 00 00 00 00 03 D0 0E 30 39 01 00 00 00 00 02 D1 41 39 01 00 00 00 00 02 6F 01 39 01 00 00 00 00 02 D1 00 39 01 00 00 00 00 02 6F 02 39 01 00 00 00 00 02 D1 00 39 01 00 00 00 00 02 6F 03 39 01 00 00 00 00 05 D1 02 1D 08 2E 39 01 00 00 00 00 02 6F 07 39 01 00 00 00 00 05 D1 01 B5 07 C6 39 01 00 00 00 00 02 6F 0B 39 01 00 00 00 00 05 D1 02 83 08 94 39 01 00 00 00 00 02 6F 0F 39 01 00 00 00 00 07 D1 3F FF 20 00 30 00 39 00 00 00 00 00 06 F0 55 AA 52 08 00 39 00 00 00 00 00 02 B2 11 39 00 00 00 00 00 06 F0 55 AA 52 08 01 39 00 00 00 00 00 05 C7 F8 04 32 00 39 00 00 00 00 00 06 F0 55 AA 52 08 00 39 00 00 00 00 00 02 6F 1C 39 00 00 00 00 00 05 C0 15 27 38 49 39 00 00 00 00 00 06 F0 55 AA 52 08 00 39 00 00 00 00 00 02 6F 06 39 00 00 00 00 00 04 B5 2C 1C 35 39 00 00 00 00 00 02 6F 10 39 00 00 00 00 00 06 B5 1C 1C 1C 1C 1C 39 00 00 00 00 00 05 FF AA 55 A5 80 39 00 00 00 00 00 02 6F 1D 39 00 00 00 00 00 02 F2 05 39 00 00 00 00 00 02 03 01 39 00 00 00 00 00 02 90 01 39 00 00 00 00 00 13 91 AB 28 00 0C C2 00 03 1C 01 7E 00 0F 08 BB 04 3D 10 F0 39 00 00 00 00 00 01 2C 39 00 00 00 00 00 03 51 00 00 39 00 00 00 00 00 02 53 20 39 00 00 00 00 00 02 35 00 39 00 00 00 00 00 05 2A 00 00 04 37 39 00 00 00 00 00 05 2B 00 00 09 5F 39 00 00 00 00 00 06 F0 55 AA 52 08 01 39 00 00 00 00 00 03 CD 05 62 39 00 00 00 00 00 06 F0 55 AA 52 08 05 39 00 00 00 00 00 03 B3 86 80 39 00 00 00 00 00 03 B5 85 81 39 00 00 00 00 00 05 B7 85 00 00 81 39 00 00 00 00 00 05 B8 05 00 00 81 39 00 00 00 00 00 03 EC 0D 11 39 00 00 00 00 00 02 6F 02 39 00 00 00 00 00 13 EC 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 39 01 00 00 00 00 02 2F 01 05 01 00 00 78 00 01 11 39 00 00 00 00 00 06 F0 55 AA 52 08 08 39 00 00 00 00 00 02 E1 21 05 01 00 00 00 00 01 29]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x3C>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 10 03 03 11 1E 04 04 03 02 04 00 0E 08]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = [15 01 00 00 10 00 02 2F 01]; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| timing@1 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = <0x5010000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = [39 01 00 00 00 00 06 F0 55 AA 52 08 07 39 01 00 00 00 00 0F C0 01 01 00 00 55 00 00 00 00 00 00 00 00 00 39 01 00 00 00 00 02 6F 00 39 01 00 00 00 00 16 C9 21 00 29 71 29 71 00 00 3F DE A7 12 3F DE A7 12 80 06 B5 63 E1 39 01 00 00 00 00 02 6F 15 39 01 00 00 00 00 10 C9 71 B5 C6 82 1C 2D 33 E0 29 71 0F 99 99 00 00 39 01 00 00 00 00 02 6F 24 39 01 00 00 00 00 08 C9 00 00 00 00 00 00 00 39 01 00 00 00 00 02 6F 00 39 01 00 00 00 00 16 CA 27 00 29 71 28 A4 00 00 00 00 00 00 3F DF 4C 08 80 00 00 00 00 39 01 00 00 00 00 02 6F 15 39 01 00 00 00 00 10 CA 72 1D C6 82 83 2D 33 D0 00 00 03 67 9A 00 00 39 01 00 00 00 00 02 6F 24 39 01 00 00 00 00 08 CA 00 00 00 00 00 00 00 39 01 00 00 00 00 02 6F 00 39 01 00 00 00 00 16 CB 2D 00 28 A4 29 71 00 00 3F DF 4C 08 80 00 00 00 00 00 00 00 00 39 01 00 00 00 00 02 6F 15 39 01 00 00 00 00 10 CB 81 B5 2E 82 1C 94 33 70 00 00 0C 9A 67 00 00 39 01 00 00 00 00 02 6F 24 39 01 00 00 00 00 08 CB 00 00 00 00 00 00 00 39 01 00 00 00 00 02 6F 00 39 01 00 00 00 00 16 CC 2B 00 28 A4 28 A4 00 00 00 00 00 00 80 00 00 00 7F F9 8C 56 F0 39 01 00 00 00 00 02 6F 15 39 01 00 00 00 00 10 CC 82 1D 2E 82 83 94 33 8F D7 5C 00 66 66 00 00 39 01 00 00 00 00 02 6F 24 39 01 00 00 00 00 08 CC 00 00 00 00 00 00 00 39 01 00 00 00 00 06 F0 55 AA 52 08 02 39 01 00 00 00 00 02 6F 08 39 01 00 00 00 00 03 D0 0C E4 39 01 00 00 00 00 02 6F 0A 39 01 00 00 00 00 03 D0 0B 60 39 01 00 00 00 00 02 6F 0C 39 01 00 00 00 00 03 D0 0E 30 39 01 00 00 00 00 02 D1 41 39 01 00 00 00 00 02 6F 01 39 01 00 00 00 00 02 D1 00 39 01 00 00 00 00 02 6F 02 39 01 00 00 00 00 02 D1 00 39 01 00 00 00 00 02 6F 03 39 01 00 00 00 00 05 D1 02 1D 08 2E 39 01 00 00 00 00 02 6F 07 39 01 00 00 00 00 05 D1 01 B5 07 C6 39 01 00 00 00 00 02 6F 0B 39 01 00 00 00 00 05 D1 02 83 08 94 39 01 00 00 00 00 02 6F 0F 39 01 00 00 00 00 07 D1 3F FF 20 00 30 00 39 00 00 00 00 00 06 F0 55 AA 52 08 00 39 00 00 00 00 00 02 B2 11 39 00 00 00 00 00 06 F0 55 AA 52 08 01 39 00 00 00 00 00 05 C7 F8 04 32 00 39 00 00 00 00 00 06 F0 55 AA 52 08 00 39 00 00 00 00 00 02 6F 1C 39 00 00 00 00 00 05 C0 15 27 38 49 39 00 00 00 00 00 06 F0 55 AA 52 08 00 39 00 00 00 00 00 02 6F 06 39 00 00 00 00 00 04 B5 2C 1C 35 39 00 00 00 00 00 02 6F 10 39 00 00 00 00 00 06 B5 1C 1C 1C 1C 1C 39 00 00 00 00 00 05 FF AA 55 A5 80 39 00 00 00 00 00 02 6F 1D 39 00 00 00 00 00 02 F2 05 39 00 00 00 00 00 02 03 01 39 00 00 00 00 00 02 90 01 39 00 00 00 00 00 13 91 AB 28 00 0C C2 00 03 1C 01 7E 00 0F 08 BB 04 3D 10 F0 39 00 00 00 00 00 01 2C 39 00 00 00 00 00 03 51 00 00 39 00 00 00 00 00 02 53 20 39 00 00 00 00 00 02 35 00 39 00 00 00 00 00 05 2A 00 00 04 37 39 00 00 00 00 00 05 2B 00 00 09 5F 39 00 00 00 00 00 06 F0 55 AA 52 08 01 39 00 00 00 00 00 03 CD 05 62 39 00 00 00 00 00 06 F0 55 AA 52 08 05 39 00 00 00 00 00 03 B3 86 80 39 00 00 00 00 00 03 B5 85 81 39 00 00 00 00 00 05 B7 85 00 00 81 39 00 00 00 00 00 05 B8 05 00 00 81 39 00 00 00 00 00 03 EC 0D 11 39 00 00 00 00 00 02 6F 02 39 00 00 00 00 00 13 EC 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 39 01 00 00 00 00 02 2F 03 05 01 00 00 78 00 01 11 39 00 00 00 00 00 06 F0 55 AA 52 08 08 39 00 00 00 00 00 02 E1 21 05 01 00 00 00 00 01 29]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x5A>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 16 05 05 14 1F 06 06 06 02 04 00 13 0A]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = [15 01 00 00 10 00 02 2F 03]; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| timing@2 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = <0x5010000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = [39 01 00 00 00 00 06 F0 55 AA 52 08 07 39 01 00 00 00 00 0F C0 01 01 00 00 55 00 00 00 00 00 00 00 00 00 39 01 00 00 00 00 02 6F 00 39 01 00 00 00 00 16 C9 21 00 29 71 29 71 00 00 3F DE A7 12 3F DE A7 12 80 06 B5 63 E1 39 01 00 00 00 00 02 6F 15 39 01 00 00 00 00 10 C9 71 B5 C6 82 1C 2D 33 E0 29 71 0F 99 99 00 00 39 01 00 00 00 00 02 6F 24 39 01 00 00 00 00 08 C9 00 00 00 00 00 00 00 39 01 00 00 00 00 02 6F 00 39 01 00 00 00 00 16 CA 27 00 29 71 28 A4 00 00 00 00 00 00 3F DF 4C 08 80 00 00 00 00 39 01 00 00 00 00 02 6F 15 39 01 00 00 00 00 10 CA 72 1D C6 82 83 2D 33 D0 00 00 03 67 9A 00 00 39 01 00 00 00 00 02 6F 24 39 01 00 00 00 00 08 CA 00 00 00 00 00 00 00 39 01 00 00 00 00 02 6F 00 39 01 00 00 00 00 16 CB 2D 00 28 A4 29 71 00 00 3F DF 4C 08 80 00 00 00 00 00 00 00 00 39 01 00 00 00 00 02 6F 15 39 01 00 00 00 00 10 CB 81 B5 2E 82 1C 94 33 70 00 00 0C 9A 67 00 00 39 01 00 00 00 00 02 6F 24 39 01 00 00 00 00 08 CB 00 00 00 00 00 00 00 39 01 00 00 00 00 02 6F 00 39 01 00 00 00 00 16 CC 2B 00 28 A4 28 A4 00 00 00 00 00 00 80 00 00 00 7F F9 8C 56 F0 39 01 00 00 00 00 02 6F 15 39 01 00 00 00 00 10 CC 82 1D 2E 82 83 94 33 8F D7 5C 00 66 66 00 00 39 01 00 00 00 00 02 6F 24 39 01 00 00 00 00 08 CC 00 00 00 00 00 00 00 39 01 00 00 00 00 06 F0 55 AA 52 08 02 39 01 00 00 00 00 02 6F 08 39 01 00 00 00 00 03 D0 0C E4 39 01 00 00 00 00 02 6F 0A 39 01 00 00 00 00 03 D0 0B 60 39 01 00 00 00 00 02 6F 0C 39 01 00 00 00 00 03 D0 0E 30 39 01 00 00 00 00 02 D1 41 39 01 00 00 00 00 02 6F 01 39 01 00 00 00 00 02 D1 00 39 01 00 00 00 00 02 6F 02 39 01 00 00 00 00 02 D1 00 39 01 00 00 00 00 02 6F 03 39 01 00 00 00 00 05 D1 02 1D 08 2E 39 01 00 00 00 00 02 6F 07 39 01 00 00 00 00 05 D1 01 B5 07 C6 39 01 00 00 00 00 02 6F 0B 39 01 00 00 00 00 05 D1 02 83 08 94 39 01 00 00 00 00 02 6F 0F 39 01 00 00 00 00 07 D1 3F FF 20 00 30 00 39 00 00 00 00 00 06 F0 55 AA 52 08 00 39 00 00 00 00 00 02 B2 11 39 00 00 00 00 00 06 F0 55 AA 52 08 01 39 00 00 00 00 00 05 C7 F8 04 32 00 39 00 00 00 00 00 06 F0 55 AA 52 08 00 39 00 00 00 00 00 02 6F 1C 39 00 00 00 00 00 05 C0 15 27 38 49 39 00 00 00 00 00 06 F0 55 AA 52 08 00 39 00 00 00 00 00 02 6F 06 39 00 00 00 00 00 04 B5 2C 1C 35 39 00 00 00 00 00 02 6F 10 39 00 00 00 00 00 06 B5 1C 1C 1C 1C 1C 39 00 00 00 00 00 05 FF AA 55 A5 80 39 00 00 00 00 00 02 6F 1D 39 00 00 00 00 00 02 F2 05 39 00 00 00 00 00 02 03 01 39 00 00 00 00 00 02 90 01 39 00 00 00 00 00 13 91 AB 28 00 0C C2 00 03 1C 01 7E 00 0F 08 BB 04 3D 10 F0 39 00 00 00 00 00 01 2C 39 00 00 00 00 00 03 51 00 00 39 00 00 00 00 00 02 53 20 39 00 00 00 00 00 02 35 00 39 00 00 00 00 00 05 2A 00 00 04 37 39 00 00 00 00 00 05 2B 00 00 09 5F 39 00 00 00 00 00 06 F0 55 AA 52 08 01 39 00 00 00 00 00 03 CD 05 62 39 00 00 00 00 00 06 F0 55 AA 52 08 05 39 00 00 00 00 00 03 B3 86 80 39 00 00 00 00 00 03 B5 85 81 39 00 00 00 00 00 05 B7 85 00 00 81 39 00 00 00 00 00 05 B8 05 00 00 81 39 00 00 00 00 00 03 EC 0D 11 39 00 00 00 00 00 02 6F 02 39 00 00 00 00 00 13 EC 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 39 01 00 00 00 00 02 2F 02 05 01 00 00 78 00 01 11 39 00 00 00 00 00 06 F0 55 AA 52 08 08 39 00 00 00 00 00 02 E1 21 05 01 00 00 00 00 01 29]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x78>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 1C 07 07 17 15 07 07 08 02 04 00 18 0C]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = [15 01 00 00 10 00 02 2F 02]; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| timing@3 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = <0x5010000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = [39 01 00 00 00 00 06 F0 55 AA 52 08 07 39 01 00 00 00 00 0F C0 01 01 00 00 55 00 00 00 00 00 00 00 00 00 39 01 00 00 00 00 02 6F 00 39 01 00 00 00 00 16 C9 21 00 29 71 29 71 00 00 3F DE A7 12 3F DE A7 12 80 06 B5 63 E1 39 01 00 00 00 00 02 6F 15 39 01 00 00 00 00 10 C9 71 B5 C6 82 1C 2D 33 E0 29 71 0F 99 99 00 00 39 01 00 00 00 00 02 6F 24 39 01 00 00 00 00 08 C9 00 00 00 00 00 00 00 39 01 00 00 00 00 02 6F 00 39 01 00 00 00 00 16 CA 27 00 29 71 28 A4 00 00 00 00 00 00 3F DF 4C 08 80 00 00 00 00 39 01 00 00 00 00 02 6F 15 39 01 00 00 00 00 10 CA 72 1D C6 82 83 2D 33 D0 00 00 03 67 9A 00 00 39 01 00 00 00 00 02 6F 24 39 01 00 00 00 00 08 CA 00 00 00 00 00 00 00 39 01 00 00 00 00 02 6F 00 39 01 00 00 00 00 16 CB 2D 00 28 A4 29 71 00 00 3F DF 4C 08 80 00 00 00 00 00 00 00 00 39 01 00 00 00 00 02 6F 15 39 01 00 00 00 00 10 CB 81 B5 2E 82 1C 94 33 70 00 00 0C 9A 67 00 00 39 01 00 00 00 00 02 6F 24 39 01 00 00 00 00 08 CB 00 00 00 00 00 00 00 39 01 00 00 00 00 02 6F 00 39 01 00 00 00 00 16 CC 2B 00 28 A4 28 A4 00 00 00 00 00 00 80 00 00 00 7F F9 8C 56 F0 39 01 00 00 00 00 02 6F 15 39 01 00 00 00 00 10 CC 82 1D 2E 82 83 94 33 8F D7 5C 00 66 66 00 00 39 01 00 00 00 00 02 6F 24 39 01 00 00 00 00 08 CC 00 00 00 00 00 00 00 39 01 00 00 00 00 06 F0 55 AA 52 08 02 39 01 00 00 00 00 02 6F 08 39 01 00 00 00 00 03 D0 0C E4 39 01 00 00 00 00 02 6F 0A 39 01 00 00 00 00 03 D0 0B 60 39 01 00 00 00 00 02 6F 0C 39 01 00 00 00 00 03 D0 0E 30 39 01 00 00 00 00 02 D1 41 39 01 00 00 00 00 02 6F 01 39 01 00 00 00 00 02 D1 00 39 01 00 00 00 00 02 6F 02 39 01 00 00 00 00 02 D1 00 39 01 00 00 00 00 02 6F 03 39 01 00 00 00 00 05 D1 02 1D 08 2E 39 01 00 00 00 00 02 6F 07 39 01 00 00 00 00 05 D1 01 B5 07 C6 39 01 00 00 00 00 02 6F 0B 39 01 00 00 00 00 05 D1 02 83 08 94 39 01 00 00 00 00 02 6F 0F 39 01 00 00 00 00 07 D1 3F FF 20 00 30 00 39 00 00 00 00 00 06 F0 55 AA 52 08 00 39 00 00 00 00 00 02 B2 11 39 00 00 00 00 00 06 F0 55 AA 52 08 01 39 00 00 00 00 00 05 C7 F8 04 32 00 39 00 00 00 00 00 06 F0 55 AA 52 08 00 39 00 00 00 00 00 02 6F 1C 39 00 00 00 00 00 05 C0 15 27 38 49 39 00 00 00 00 00 06 F0 55 AA 52 08 00 39 00 00 00 00 00 02 6F 06 39 00 00 00 00 00 04 B5 2C 1C 35 39 00 00 00 00 00 02 6F 10 39 00 00 00 00 00 06 B5 1C 1C 1C 1C 1C 39 00 00 00 00 00 05 FF AA 55 A5 80 39 00 00 00 00 00 02 6F 1D 39 00 00 00 00 00 02 F2 05 39 00 00 00 00 00 02 03 01 39 00 00 00 00 00 02 90 01 39 00 00 00 00 00 13 91 AB 28 00 0C C2 00 03 1C 01 7E 00 0F 08 BB 04 3D 10 F0 39 00 00 00 00 00 01 2C 39 00 00 00 00 00 03 51 00 00 39 00 00 00 00 00 02 53 20 39 00 00 00 00 00 02 35 00 39 00 00 00 00 00 05 2A 00 00 04 37 39 00 00 00 00 00 05 2B 00 00 09 5F 39 00 00 00 00 00 06 F0 55 AA 52 08 01 39 00 00 00 00 00 03 CD 05 62 39 00 00 00 00 00 06 F0 55 AA 52 08 05 39 00 00 00 00 00 03 B3 86 80 39 00 00 00 00 00 03 B5 85 81 39 00 00 00 00 00 05 B7 85 00 00 81 39 00 00 00 00 00 05 B8 05 00 00 81 39 00 00 00 00 00 03 EC 0D 11 39 00 00 00 00 00 02 6F 02 39 00 00 00 00 00 13 EC 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 39 01 00 00 00 00 02 2F 04 05 01 00 00 78 00 01 11 39 00 00 00 00 00 06 F0 55 AA 52 08 08 39 00 00 00 00 00 02 E1 21 05 01 00 00 00 00 01 29]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x90>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 20 08 08 18 23 08 08 08 02 04 00 1B 0D]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = [15 01 00 00 10 00 02 2F 04]; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| timing@4 { | |
| qcom,compression-mode = "dsc"; | |
| qcom,default-topology-index = <0x0>; | |
| qcom,display-topology = <0x1 0x1 0x1>; | |
| qcom,mdss-dsc-bit-per-component = <0xA>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x8>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| qcom,mdss-dsc-slice-height = <0xC>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x1>; | |
| qcom,mdss-dsc-slice-width = <0x438>; | |
| qcom,mdss-dsc-version = <0x11>; | |
| qcom,mdss-dsi-cmd-mode; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-front-porch = <0x20>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-off-command = <0x5010000 0x128 0x5010000 0x78000110>; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-on-command = [39 01 00 00 00 00 06 F0 55 AA 52 08 07 39 01 00 00 00 00 0F C0 01 01 00 00 55 00 00 00 00 00 00 00 00 00 39 01 00 00 00 00 02 6F 00 39 01 00 00 00 00 16 C9 21 00 29 71 29 71 00 00 3F DE A7 12 3F DE A7 12 80 06 B5 63 E1 39 01 00 00 00 00 02 6F 15 39 01 00 00 00 00 10 C9 71 B5 C6 82 1C 2D 33 E0 29 71 0F 99 99 00 00 39 01 00 00 00 00 02 6F 24 39 01 00 00 00 00 08 C9 00 00 00 00 00 00 00 39 01 00 00 00 00 02 6F 00 39 01 00 00 00 00 16 CA 27 00 29 71 28 A4 00 00 00 00 00 00 3F DF 4C 08 80 00 00 00 00 39 01 00 00 00 00 02 6F 15 39 01 00 00 00 00 10 CA 72 1D C6 82 83 2D 33 D0 00 00 03 67 9A 00 00 39 01 00 00 00 00 02 6F 24 39 01 00 00 00 00 08 CA 00 00 00 00 00 00 00 39 01 00 00 00 00 02 6F 00 39 01 00 00 00 00 16 CB 2D 00 28 A4 29 71 00 00 3F DF 4C 08 80 00 00 00 00 00 00 00 00 39 01 00 00 00 00 02 6F 15 39 01 00 00 00 00 10 CB 81 B5 2E 82 1C 94 33 70 00 00 0C 9A 67 00 00 39 01 00 00 00 00 02 6F 24 39 01 00 00 00 00 08 CB 00 00 00 00 00 00 00 39 01 00 00 00 00 02 6F 00 39 01 00 00 00 00 16 CC 2B 00 28 A4 28 A4 00 00 00 00 00 00 80 00 00 00 7F F9 8C 56 F0 39 01 00 00 00 00 02 6F 15 39 01 00 00 00 00 10 CC 82 1D 2E 82 83 94 33 8F D7 5C 00 66 66 00 00 39 01 00 00 00 00 02 6F 24 39 01 00 00 00 00 08 CC 00 00 00 00 00 00 00 39 01 00 00 00 00 06 F0 55 AA 52 08 02 39 01 00 00 00 00 02 6F 08 39 01 00 00 00 00 03 D0 0C E4 39 01 00 00 00 00 02 6F 0A 39 01 00 00 00 00 03 D0 0B 60 39 01 00 00 00 00 02 6F 0C 39 01 00 00 00 00 03 D0 0E 30 39 01 00 00 00 00 02 D1 41 39 01 00 00 00 00 02 6F 01 39 01 00 00 00 00 02 D1 00 39 01 00 00 00 00 02 6F 02 39 01 00 00 00 00 02 D1 00 39 01 00 00 00 00 02 6F 03 39 01 00 00 00 00 05 D1 02 1D 08 2E 39 01 00 00 00 00 02 6F 07 39 01 00 00 00 00 05 D1 01 B5 07 C6 39 01 00 00 00 00 02 6F 0B 39 01 00 00 00 00 05 D1 02 83 08 94 39 01 00 00 00 00 02 6F 0F 39 01 00 00 00 00 07 D1 3F FF 20 00 30 00 39 00 00 00 00 00 06 F0 55 AA 52 08 00 39 00 00 00 00 00 02 B2 11 39 00 00 00 00 00 06 F0 55 AA 52 08 01 39 00 00 00 00 00 05 C7 F8 04 32 00 39 00 00 00 00 00 06 F0 55 AA 52 08 00 39 00 00 00 00 00 02 6F 1C 39 00 00 00 00 00 05 C0 15 27 38 49 39 00 00 00 00 00 06 F0 55 AA 52 08 00 39 00 00 00 00 00 02 6F 06 39 00 00 00 00 00 04 B5 2C 1C 35 39 00 00 00 00 00 02 6F 10 39 00 00 00 00 00 06 B5 1C 1C 1C 1C 1C 39 00 00 00 00 00 05 FF AA 55 A5 80 39 00 00 00 00 00 02 6F 1D 39 00 00 00 00 00 02 F2 05 39 00 00 00 00 00 02 03 01 39 00 00 00 00 00 02 90 01 39 00 00 00 00 00 13 91 AB 28 00 0C C2 00 03 1C 01 7E 00 0F 08 BB 04 3D 10 F0 39 00 00 00 00 00 01 2C 39 00 00 00 00 00 03 51 00 00 39 00 00 00 00 00 02 53 20 39 00 00 00 00 00 02 35 00 39 00 00 00 00 00 05 2A 00 00 04 37 39 00 00 00 00 00 05 2B 00 00 09 5F 39 00 00 00 00 00 06 F0 55 AA 52 08 01 39 00 00 00 00 00 03 CD 05 62 39 00 00 00 00 00 06 F0 55 AA 52 08 05 39 00 00 00 00 00 03 B3 86 80 39 00 00 00 00 00 03 B5 85 81 39 00 00 00 00 00 05 B7 85 00 00 81 39 00 00 00 00 00 05 B8 05 00 00 81 39 00 00 00 00 00 03 EC 0D 11 39 00 00 00 00 00 02 6F 02 39 00 00 00 00 00 13 EC 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 39 01 00 00 00 00 02 2F 07 05 01 00 00 78 00 01 11 39 00 00 00 00 00 06 F0 55 AA 52 08 08 39 00 00 00 00 00 02 E1 21 05 01 00 00 00 00 01 29]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x30>; | |
| qcom,mdss-dsi-panel-height = <0x960>; | |
| qcom,mdss-dsi-panel-jitter = <0x20 0xA>; | |
| qcom,mdss-dsi-panel-phy-timings = [00 0D 03 03 10 1D 04 03 02 02 04 00 0C 08]; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-timing-switch-command = [15 01 00 00 10 00 02 2F 07]; | |
| qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-v-front-porch = <0xC>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| }; | |
| }; | |
| }; | |
| }; | |
| &qupv3_se14_i2c { | |
| status = "ok"; | |
| sx937x@2c { | |
| Semtech,button-flag = <0x1F>; | |
| Semtech,button-names = "Moto CapSense Ch0", "Moto CapSense Ch1", "Moto CapSense Ch2", "Moto CapSense Ch3", "Moto CapSense Ch4"; | |
| Semtech,debug-name = "capsense0"; | |
| Semtech,nirq-gpio = <&tlmm 0x42 0x2>; | |
| Semtech,power-supply-type = <0x0>; | |
| Semtech,ref-phases-a = <0x4>; | |
| Semtech,ref-phases-b = <0x5>; | |
| Semtech,ref-phases-c = <0x6>; | |
| Semtech,reg-init = <0x4004 0x74 0x8008 0x0 0x8020 0x32 0x8028 0x86E 0x8034 0x86E 0x8040 0x86E 0x804C 0x86E 0x8058 0x86E 0x8064 0x86E 0x8070 0x86E 0x807C 0x85C 0x8030 0xFFF9FD 0x803C 0xFFD9FF 0x8048 0xBFF9FF 0x8054 0xFEF9FF 0x8060 0xF7F9FF 0x806C 0xFFF97F 0x8078 0xFFF9EF 0x8084 0x0 0x8098 0x5D43 0x80B8 0x4B39 0x80D8 0x2525 0x80F8 0x432E 0x8118 0x2828 0x8138 0x0 0x8158 0x0 0x8178 0x0 0x809C 0x0 0x80BC 0x0 0x80DC 0x0 0x80FC 0x0 0x811C 0x0 0x813C 0x0 0x815C 0x0 0x817C 0x0 0x80A0 0x27270001 0x80C0 0x54540002 0x80E0 0x50500002 0x8100 0x69690002 0x8120 0x7070002 0x8140 0x0 0x8160 0x0 0x8180 0x0 0x8188 0x8000016 0x818C 0x8000015 0x8190 0x6 0x8194 0x0 0x8198 0x0 0x81BC 0x0 0x819C 0x0 0x81AC 0x0 0x81A0 0x0 0x81B0 0x0 0x81A4 0x0 0x81B4 0x0 0x81A8 0x0 0x81B8 0x0 0x81C0 0x0 0x81D0 0x0 0x81C4 0x0 0x81D4 0x0 0x81C8 0x0 0x81D8 0x0 0x81CC 0x0 0x81DC 0x0 0x81E0 0x0 0x81E4 0x0 0x81E8 0x0 0x81EC 0x2000000 0x80A4 0x0 0x80C4 0x0 0x80E4 0x0 0x8104 0x0 0x8124 0x0 0x8144 0x0 0x8164 0x0 0x8184 0x0 0x8090 0x2AD67000 0x80B0 0x2AD67000 0x80D0 0x2AD67000 0x80F0 0x2AD67000 0x8110 0x2AD67000 0x8130 0x5000 0x8150 0x5000 0x8170 0x0 0x8094 0x0 0x80B4 0x0 0x80D4 0x0 0x80F4 0x0 0x8114 0x0 0x8134 0x0 0x8154 0x0 0x8174 0x0 0x8088 0x300000 0x80A8 0x300000 0x80C8 0x300000 0x80E8 0x300000 0x8108 0x300000 0x8128 0x300000 0x8148 0x300000 0x8168 0x0 0x808C 0xE0200030 0x80AC 0xE0200030 0x80CC 0xE0200030 0x80EC 0xE0200030 0x810C 0xE0200030 0x812C 0xE0200030 0x814C 0xE0200030 0x816C 0x0 0x8024 0x7F00>; | |
| Semtech,reg-num = <0x6E>; | |
| cap_vdd-supply = <&pm8350c_l8>; | |
| compatible = "Semtech,sx937x"; | |
| interrupt-names = "capsense0_irq"; | |
| interrupt-parent = <&tlmm>; | |
| interrupts = <0x42 0x2>; | |
| pinctrl-0 = <&sar_int_default>; | |
| pinctrl-1 = <&sar_int_sleep>; | |
| pinctrl-names = "default", "sleep"; | |
| reg = <0x2C>; | |
| status = "ok"; | |
| }; | |
| }; | |
| &qupv3_se4_i2c { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| status = "ok"; | |
| goodix_ts_i2c@5d { | |
| compatible = "goodix,gt9916"; | |
| goodix,avdd-name = "pm8350c_l11"; | |
| goodix,edge-ctrl; | |
| goodix,interpolation-ctrl; | |
| goodix,iovdd-name = "pm8350c_l2"; | |
| goodix,irq-flags = <0x2002>; | |
| goodix,irq-gpio = <&tlmm 0x15 0x2002>; | |
| goodix,panel-max-id = <0xA>; | |
| goodix,panel-max-p = <0x1000>; | |
| goodix,panel-max-w = <0xFF>; | |
| goodix,panel-max-x = <0x4380>; | |
| goodix,panel-max-y = <0x9600>; | |
| goodix,reset-gpio = <&tlmm 0x14 0x0>; | |
| mmi,enable-gestures; | |
| mmi,fod_coords = <0x21C 0x868>; | |
| mmi,power-off-suspend; | |
| mmi,status = "/chosen", "mmi,panel_name", "contains", "tianma_nt37701A", "csot_nt37701A"; | |
| mmi,supported_gesture_type = <0x7>; | |
| mmi,usb-charger-detection; | |
| pinctrl-0 = <&ts_active>; | |
| pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>; | |
| pinctrl-2 = <&ts_release>; | |
| pinctrl-names = "pmx_ts_active", "pmx_ts_suspend", "pmx_ts_release"; | |
| reg = <0x5D>; | |
| status = "ok"; | |
| panel = <&mot_csot_nt37701A_667_curve_1080x2400_dsc_cmd &mot_csot_nt37701A_667_curve_1080x2400_dsc_cmd_v1 &mot_csot_nt37701A_667_curve_1080x2400_dsc_cmd_v2 &mot_csot_nt37701A_667_curve_1080x2400_dsc_cmd_v3 &mot_csot_ili7838A_667_1080x2400_dsc_cmd &mot_tianma_nt37701A_667_1080x2400_dsc_cmd &mot_tianma_nt37701A_667_curve_1080x2400_dsc_cmd>; | |
| }; | |
| }; | |
| &qupv3_se4_spi { | |
| status = "disabled"; | |
| }; | |
| &qupv3_se5_i2c { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| status = "ok"; | |
| nxp_eusb2_repeater: eusb2_repeater@4f { | |
| compatible = "nxp,eusb2-repeater"; | |
| interrupt-names = "eusb2_rptr_reset_gpio_irq"; | |
| interrupt-parent = <&spmi_bus>; | |
| interrupts = <0x2 0x8E 0x0 0x1>; | |
| pinctrl-0 = <&eusb2_reset_ctrl_default>; | |
| pinctrl-names = "default"; | |
| qcom,param-override-seq = <0x40 0x6 0x22 0x7 0x64 0x8>; | |
| reg = <0x4F>; | |
| reset-gpio = <&pm8350c_gpios 0x7 0x0>; | |
| status = "ok"; | |
| vdd18-supply = <&S10B>; | |
| vdd3-supply = <&L2B>; | |
| }; | |
| diodes_eusb2_repeater: eusb2_repeater@6c { | |
| compatible = "diodes,eusb2-repeater"; | |
| interrupt-names = "eusb2_rptr_reset_gpio_irq"; | |
| interrupt-parent = <&spmi_bus>; | |
| interrupts = <0x2 0x8E 0x0 0x1>; | |
| pinctrl-0 = <&eusb2_reset_ctrl_default>; | |
| pinctrl-names = "default"; | |
| reg = <0x6C>; | |
| reset-gpio = <&pm8350c_gpios 0x7 0x0>; | |
| status = "disable"; | |
| vdd18-supply = <&S10B>; | |
| vdd3-supply = <&L2B>; | |
| }; | |
| redriver: redriver@30 { | |
| compatible = "parade,ps5169-redriver"; | |
| config-seq = <0x9D 0x80 0x2710 0x9D 0x0 0x0 0x40 0x80 0x0 0x8D 0x1 0x0 0x90 0x1 0x0 0x51 0x87 0x0 0x50 0x20 0x0 0x54 0x11 0x0 0x5D 0x66 0x0 0x52 0x50 0x0 0x55 0x0 0x0 0x56 0x0 0x0 0x57 0x0 0x0 0x58 0x0 0x0 0x59 0x0 0x0 0x5A 0x0 0x0 0x5B 0x0 0x0 0x5E 0x7 0x0 0x5F 0x0 0x0 0x60 0x0 0x0 0x61 0x3 0x0 0x65 0x40 0x0 0x66 0x0 0x0 0x67 0x3 0x0 0x75 0xC 0x0 0x77 0x0 0x0 0x78 0x7C 0x0>; | |
| pinctrl-0 = <&redriver_enable>; | |
| pinctrl-1 = <&redriver_disable>; | |
| pinctrl-names = "enable_gpio", "disable_gpio"; | |
| redriver,orientation-gpio = <&tlmm 0x5B 0x0>; | |
| reg = <0x30>; | |
| status = "ok"; | |
| vcc-supply = <&S10B>; | |
| }; | |
| cam_pmic: wl2868c@2F { | |
| compatible = "semi,wl2868c"; | |
| pinctrl-0 = <&pmic_en_default>; | |
| pinctrl-names = "default"; | |
| reg = <0x2F>; | |
| semi,cs-gpios = <&tlmm 0x6 0x1>; | |
| vin1-supply = <&S12B>; | |
| vin2-supply = <&BOB>; | |
| regulators { | |
| camera_ldo1: ldo1 { | |
| regulator-max-microvolt = <0x1B7740>; | |
| regulator-min-microvolt = <0x927C0>; | |
| regulator-name = "ldo1"; | |
| }; | |
| camera_ldo2: ldo2 { | |
| regulator-max-microvolt = <0x1B7740>; | |
| regulator-min-microvolt = <0x927C0>; | |
| regulator-name = "ldo2"; | |
| }; | |
| camera_ldo3: ldo3 { | |
| regulator-max-microvolt = <0x419CE0>; | |
| regulator-min-microvolt = <0x124F80>; | |
| regulator-name = "ldo3"; | |
| }; | |
| camera_ldo4: ldo4 { | |
| regulator-max-microvolt = <0x419CE0>; | |
| regulator-min-microvolt = <0x124F80>; | |
| regulator-name = "ldo4"; | |
| }; | |
| camera_ldo5: ldo5 { | |
| regulator-max-microvolt = <0x419CE0>; | |
| regulator-min-microvolt = <0x124F80>; | |
| regulator-name = "ldo5"; | |
| }; | |
| camera_ldo6: ldo6 { | |
| regulator-max-microvolt = <0x419CE0>; | |
| regulator-min-microvolt = <0x124F80>; | |
| regulator-name = "ldo6"; | |
| }; | |
| camera_ldo7: ldo7 { | |
| regulator-max-microvolt = <0x419CE0>; | |
| regulator-min-microvolt = <0x124F80>; | |
| regulator-name = "ldo7"; | |
| }; | |
| }; | |
| }; | |
| }; | |
| &qupv3_se8_spi { | |
| status = "okay"; | |
| st54spi: st54spi@0 { | |
| compatible = "st,st54spi"; | |
| gpio-power_nreset-std = <&tlmm 0x5D 0x0>; | |
| pinctrl-0 = <&qupv3_se8_spi_sleep>; | |
| pinctrl-1 = <&qupv3_se8_spi_active>; | |
| pinctrl-names = "spi_sleep", "spi_active"; | |
| power_mode = "ST54J"; | |
| reg = <0x0>; | |
| spi-max-frequency = <0xF4240>; | |
| status = "okay"; | |
| }; | |
| }; | |
| &qupv3_se9_i2c { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| qcom,clk-freq-out = <0xF4240>; | |
| status = "ok"; | |
| st21nfc@8 { | |
| compatible = "st,st21nfc"; | |
| interrupt-names = "nfc_irq"; | |
| interrupt-parent = <&tlmm>; | |
| interrupts = <0x2E 0x0>; | |
| pinctrl-0 = <&nfc_int_active &nfc_enable_active>; | |
| pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>; | |
| pinctrl-names = "nfc_active", "nfc_suspend"; | |
| reg = <0x8>; | |
| st,clkreq_gpio = <&tlmm 0x23 0x0>; | |
| st,irq_gpio = <&tlmm 0x2E 0x0>; | |
| st,reset_gpio = <&tlmm 0x22 0x0>; | |
| }; | |
| }; | |
| &reserved_memory { | |
| mmi_annotate_mem: mmi_annotate_mem_region { | |
| no-map; | |
| reg = <0x0 0xADFFF000 0x0 0x1000>; | |
| }; | |
| ramoops_mem { | |
| compatible = "ramoops"; | |
| console-size = <0x40000>; | |
| no-map; | |
| record-size = <0x20000>; | |
| reg = <0x0 0xAE000000 0x0 0x60000>; | |
| }; | |
| splash_memory: splash_region { | |
| label = "cont_splash_region"; | |
| reg = <0x0 0xB8000000 0x0 0x2B00000>; | |
| }; | |
| }; | |
| &sde_dp { | |
| #clock-cells = <0x1>; | |
| clock-mmrm = <0x0 0x0 0x0 0x0 0x0 0xF 0x0 0x0 0x0 0x0 0x0 0x0>; | |
| clock-names = "core_aux_clk", "rpmh_cxo_clk", "core_usb_ref_clk_src", "core_usb_pipe_clk", "link_clk", "link_clk_src", "link_iface_clk", "pixel_clk_rcg", "pixel_parent", "pixel1_clk_rcg", "strm0_pixel_clk", "strm1_pixel_clk"; | |
| clocks = <&clock_dispcc 0xB &clock_rpmh 0x0 &clock_gcc 0xAF &clock_gcc 0xB3 &clock_dispcc 0xE &clock_dispcc 0xF &clock_dispcc 0x11 &clock_dispcc 0x13 &sde_dp 0x1 &clock_dispcc 0x15 &clock_dispcc 0x12 &clock_dispcc 0x14>; | |
| mmi,aux-switch-enable-gpio = <&tlmm 0x2 0x0>; | |
| mmi,aux-switch-flip-gpio = <&tlmm 0x47 0x0>; | |
| }; | |
| &sdhc_2 { | |
| cd-gpios = <&tlmm 0x5C 0x1>; | |
| pinctrl-0 = <&sdc2_on>; | |
| pinctrl-1 = <&sdc2_off>; | |
| pinctrl-names = "default", "sleep"; | |
| qcom,vdd-current-level = <0x0 0xC3500>; | |
| qcom,vdd-io-current-level = <0x0 0x1E848>; | |
| qcom,vdd-io-voltage-level = <0x1B7740 0x2D2A80>; | |
| qcom,vdd-voltage-level = <0x2D2A80 0x2D2A80>; | |
| status = "disabled"; | |
| vdd-io-supply = <&L6C>; | |
| vdd-supply = <&L9C>; | |
| }; | |
| &soc { | |
| dsi_panel_pwr_supply: dsi_panel_pwr_supply { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| qcom,panel-supply-entry@0 { | |
| qcom,supply-disable-load = <0x64>; | |
| qcom,supply-enable-load = <0x493E0>; | |
| qcom,supply-max-voltage = <0x1B7740>; | |
| qcom,supply-min-voltage = <0x1B7740>; | |
| qcom,supply-name = "vddio"; | |
| qcom,supply-post-off-sleep = <0x0>; | |
| qcom,supply-post-on-sleep = <0x1>; | |
| qcom,supply-pre-off-sleep = <0x3>; | |
| qcom,supply-pre-on-sleep = <0x0>; | |
| reg = <0x0>; | |
| }; | |
| qcom,panel-supply-entry@1 { | |
| qcom,supply-disable-load = <0x0>; | |
| qcom,supply-enable-load = <0x493E0>; | |
| qcom,supply-max-voltage = <0x124F80>; | |
| qcom,supply-min-voltage = <0x124F80>; | |
| qcom,supply-name = "ddic"; | |
| qcom,supply-post-off-sleep = <0x0>; | |
| qcom,supply-post-on-sleep = <0x0>; | |
| qcom,supply-pre-off-sleep = <0x2>; | |
| qcom,supply-pre-on-sleep = <0x1>; | |
| reg = <0x1>; | |
| }; | |
| qcom,panel-supply-entry@2 { | |
| qcom,supply-disable-load = <0x0>; | |
| qcom,supply-enable-load = <0x493E0>; | |
| qcom,supply-max-voltage = <0x2DC6C0>; | |
| qcom,supply-min-voltage = <0x2DC6C0>; | |
| qcom,supply-name = "vci"; | |
| qcom,supply-post-off-sleep = <0x0>; | |
| qcom,supply-post-on-sleep = <0xA>; | |
| qcom,supply-pre-off-sleep = <0x2>; | |
| qcom,supply-pre-on-sleep = <0x0>; | |
| reg = <0x2>; | |
| }; | |
| }; | |
| dsi_panel_pwr_supply_ili: dsi_panel_pwr_supply_ili { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| qcom,panel-supply-entry@0 { | |
| qcom,supply-disable-load = <0x64>; | |
| qcom,supply-enable-load = <0x493E0>; | |
| qcom,supply-max-voltage = <0x1B7740>; | |
| qcom,supply-min-voltage = <0x1B7740>; | |
| qcom,supply-name = "vddio"; | |
| qcom,supply-post-off-sleep = <0x0>; | |
| qcom,supply-post-on-sleep = <0x1>; | |
| qcom,supply-pre-off-sleep = <0x3>; | |
| qcom,supply-pre-on-sleep = <0x0>; | |
| reg = <0x0>; | |
| }; | |
| qcom,panel-supply-entry@1 { | |
| qcom,supply-disable-load = <0x0>; | |
| qcom,supply-enable-load = <0x493E0>; | |
| qcom,supply-max-voltage = <0x2DC6C0>; | |
| qcom,supply-min-voltage = <0x2DC6C0>; | |
| qcom,supply-name = "vci"; | |
| qcom,supply-post-off-sleep = <0x0>; | |
| qcom,supply-post-on-sleep = <0x0>; | |
| qcom,supply-pre-off-sleep = <0x2>; | |
| qcom,supply-pre-on-sleep = <0x1>; | |
| reg = <0x1>; | |
| }; | |
| qcom,panel-supply-entry@2 { | |
| qcom,supply-disable-load = <0x0>; | |
| qcom,supply-enable-load = <0x493E0>; | |
| qcom,supply-max-voltage = <0x124F80>; | |
| qcom,supply-min-voltage = <0x124F80>; | |
| qcom,supply-name = "ddic"; | |
| qcom,supply-post-off-sleep = <0x0>; | |
| qcom,supply-post-on-sleep = <0xA>; | |
| qcom,supply-pre-off-sleep = <0x2>; | |
| qcom,supply-pre-on-sleep = <0x1>; | |
| reg = <0x2>; | |
| }; | |
| }; | |
| et528: et528 { | |
| compatible = "fp-egistec"; | |
| egis-fp,vcc-current = <0x186A0>; | |
| egis-fp,vcc-voltage = <0x325AA0 0x325AA0>; | |
| egistec,gpio_irq = <&tlmm 0x28 0x0>; | |
| egistec,gpio_reset = <&tlmm 0x2A 0x0>; | |
| fp-ctrl-power; | |
| pinctrl-0 = <&fingerfp_rst_high>; | |
| pinctrl-1 = <&fingerfp_rst_low>; | |
| pinctrl-2 = <&fingerfp_irq_active>; | |
| pinctrl-names = "egis_rst_high", "egis_rst_low", "egis_irq_active"; | |
| status = "ok"; | |
| vcc_fp-supply = <&L9C>; | |
| }; | |
| cam_avdd_front: gpio-regulator@0 { | |
| compatible = "regulator-fixed"; | |
| enable-active-high; | |
| gpio = <&tlmm 0xA 0x0>; | |
| pinctrl-0 = <&cam_avdd_front_en_default>; | |
| pinctrl-names = "default"; | |
| reg = <0x0 0x0>; | |
| regulator-enable-ramp-delay = <0xE9>; | |
| regulator-max-microvolt = <0x2AB980>; | |
| regulator-min-microvolt = <0x2AB980>; | |
| regulator-name = "cam_avdd_front"; | |
| vin-supply = <&BOB>; | |
| }; | |
| cam_dvdd_front: gpio-regulator@1 { | |
| compatible = "regulator-fixed"; | |
| enable-active-high; | |
| gpio = <&tlmm 0xB 0x0>; | |
| pinctrl-0 = <&cam_dvdd_front_en_default>; | |
| pinctrl-names = "default"; | |
| reg = <0x1 0x0>; | |
| regulator-enable-ramp-delay = <0xE9>; | |
| regulator-max-microvolt = <0x10C8E0>; | |
| regulator-min-microvolt = <0x10C8E0>; | |
| regulator-name = "cam_dvdd_front"; | |
| vin-supply = <&S12B>; | |
| }; | |
| cam_avdd_tele: gpio-regulator@2 { | |
| compatible = "regulator-fixed"; | |
| enable-active-high; | |
| gpio = <&tlmm 0x44 0x0>; | |
| pinctrl-0 = <&cam_avdd_tele_en_default>; | |
| pinctrl-names = "default"; | |
| reg = <0x2 0x0>; | |
| regulator-enable-ramp-delay = <0xE9>; | |
| regulator-max-microvolt = <0x2AB980>; | |
| regulator-min-microvolt = <0x2AB980>; | |
| regulator-name = "cam_avdd_tele"; | |
| vin-supply = <&BOB>; | |
| }; | |
| cam_afvdd_tele: gpio-regulator@3 { | |
| compatible = "regulator-fixed"; | |
| enable-active-high; | |
| gpio = <&tlmm 0x17 0x0>; | |
| pinctrl-0 = <&cam_afvdd_tele_en_default>; | |
| pinctrl-names = "default"; | |
| reg = <0x3 0x0>; | |
| regulator-enable-ramp-delay = <0xE9>; | |
| regulator-max-microvolt = <0x2DC6C0>; | |
| regulator-min-microvolt = <0x2DC6C0>; | |
| regulator-name = "cam_afvdd_tele"; | |
| vin-supply = <&BOB>; | |
| }; | |
| gpio_keys { | |
| compatible = "gpio-keys"; | |
| label = "gpio-keys"; | |
| pinctrl-0 = <&key_vol_up_default>; | |
| pinctrl-names = "default"; | |
| vol_up { | |
| debounce-interval = <0xF>; | |
| gpio-key,wakeup; | |
| gpios = <&pm8350_gpios 0x6 0x1>; | |
| label = "volume_up"; | |
| linux,can-disable; | |
| linux,code = <0x73>; | |
| linux,input-type = <0x1>; | |
| }; | |
| }; | |
| mmi_charger: mmi,charger { | |
| compatible = "mmi,mmi-charger"; | |
| mmi,dcp-power-max = <0x2710>; | |
| mmi,enable-charging-limit; | |
| mmi,factory-kill-debounce-ms = <0xBB8>; | |
| mmi,heartbeat-interval = <0x2710>; | |
| mmi,hvdcp-power-max = <0x4E20>; | |
| mmi,lower-limit-capacity = <0x41>; | |
| mmi,upper-limit-capacity = <0x4B>; | |
| mmi,pd-power-max = <0x1E848>; | |
| }; | |
| mmi,suspend_dbg { | |
| compatible = "mmi,suspend_dbg"; | |
| }; | |
| mmi_annotate { | |
| compatible = "mmi,annotate"; | |
| mem-size = <0x2000>; | |
| memory-region = <&mmi_annotate_mem>; | |
| persist_unsupported; | |
| }; | |
| mot,cam-actuator { | |
| clock-cntl-level = "nominal"; | |
| clock-names = "cam_clk"; | |
| clock-rates = <0x124F800>; | |
| clocks = <&clock_camcc 0x50>; | |
| compatible = "mot,actuator"; | |
| gpio-no-mux = <0x0>; | |
| pinctrl-0 = <&cam_sensor_mclk2_active>; | |
| pinctrl-1 = <&cam_sensor_mclk2_suspend>; | |
| pinctrl-names = "cam_default", "cam_suspend"; | |
| status = "ok"; | |
| use-shared-clk = "true"; | |
| }; | |
| wcd938x_rst_gpio: msm_cdc_pinctrl@32 { | |
| compatible = "qcom,msm-cdc-pinctrl"; | |
| pinctrl-0 = <&wcd938x_reset_active>; | |
| pinctrl-1 = <&wcd938x_reset_sleep>; | |
| pinctrl-names = "aud_active", "aud_sleep"; | |
| status = "disabled"; | |
| }; | |
| pinctrl@f000000 { | |
| #gpio-cells = <0x2>; | |
| #interrupt-cells = <0x2>; | |
| compatible = "qcom,cape-pinctrl"; | |
| gpio-controller; | |
| interrupt-controller; | |
| interrupts = <0x0 0xD0 0x4>; | |
| qcom,gpios-reserved = <0x24 0x25 0x26 0x27>; | |
| reg = <0xF000000 0x1000000>; | |
| wakeup-parent = <&pdc>; | |
| }; | |
| pmic-pon-log { | |
| compatible = "qcom,pmic-pon-log"; | |
| nvmem = <&pmk8350_sdam_5>; | |
| nvmem-names = "pon_log"; | |
| }; | |
| qcom,cam-res-mgr { | |
| compatible = "qcom,cam-res-mgr"; | |
| status = "ok"; | |
| }; | |
| led_flash_rear: qcom,camera-flash@0 { | |
| cell-index = <0x0>; | |
| compatible = "qcom,camera-flash"; | |
| flash-source = <&pm8350c_flash0 &pm8350c_flash1>; | |
| status = "ok"; | |
| switch-source = <&pm8350c_switch2>; | |
| torch-source = <&pm8350c_torch0 &pm8350c_torch1>; | |
| }; | |
| led_flash_uw: qcom,camera-flash@2 { | |
| cell-index = <0x2>; | |
| compatible = "qcom,camera-flash"; | |
| flash-source = <&pm8350c_flash0 &pm8350c_flash1>; | |
| status = "ok"; | |
| switch-source = <&pm8350c_switch2>; | |
| torch-source = <&pm8350c_torch0 &pm8350c_torch1>; | |
| }; | |
| led_flash_tele: qcom,camera-flash@3 { | |
| cell-index = <0x3>; | |
| compatible = "qcom,camera-flash"; | |
| flash-source = <&pm8350c_flash0 &pm8350c_flash1>; | |
| status = "ok"; | |
| switch-source = <&pm8350c_switch2>; | |
| torch-source = <&pm8350c_torch0 &pm8350c_torch1>; | |
| }; | |
| sde_dsi: qcom,dsi-display-primary { | |
| clock-names = "pll_byte_clk0", "pll_dsi_clk0", "mdp_core_clk"; | |
| clocks = <&mdss_dsi_phy0 0x0 &mdss_dsi_phy0 0x1 &clock_dispcc 0x3C>; | |
| compatible = "qcom,dsi-display"; | |
| ddic-supply = <&L1D>; | |
| label = "primary"; | |
| pinctrl-0 = <&sde_dsi_active &sde_te_active>; | |
| pinctrl-1 = <&sde_dsi_suspend &sde_te_suspend>; | |
| pinctrl-names = "panel_active", "panel_suspend"; | |
| qcom,dsi-ctrl = <&mdss_dsi0>; | |
| qcom,dsi-default-panel = <&mot_dummy_vid_qhd>; | |
| qcom,dsi-phy = <&mdss_dsi_phy0>; | |
| qcom,mdp = <&mdss_mdp>; | |
| qcom,panel-te-source = <0x0>; | |
| qcom,platform-te-gpio = <&tlmm 0x56 0x0>; | |
| vci-supply = <&L13C>; | |
| vddio-supply = <&L12C>; | |
| }; | |
| qcom,pmic_glink { | |
| qti_glink_charger: mmi,qti-glink-charger { | |
| compatible = "mmi,qti-glink-charger"; | |
| mmi,chrg-iterm-ma = <0x12C>; | |
| mmi,demo-fv-mv = <0xFA0>; | |
| mmi,df-serialnum = "unknown-sn"; | |
| mmi,fg-iterm-ma = <0x15E>; | |
| mmi,max-fcc-ma = <0xFA0>; | |
| mmi,max-fv-mv = <0x1130>; | |
| }; | |
| }; | |
| qcom,pmic_glink_log { | |
| bm_adsp_ulog: qcom,bm_adsp_ulog { | |
| categories = <0xFFBFFFFF>; | |
| compatible = "qcom,bm-adsp-ulog"; | |
| init-log-enabled; | |
| level = <0x4>; | |
| }; | |
| qcom,charger_ulog_glink { | |
| status = "disabled"; | |
| }; | |
| }; | |
| sde_wb: qcom,wb-display@0 { | |
| cell-index = <0x0>; | |
| compatible = "qcom,wb-display"; | |
| label = "wb_display"; | |
| }; | |
| reboot_reason { | |
| compatible = "qcom,reboot-reason"; | |
| nvmem-cell-names = "restart_reason", "extra_restart_reason"; | |
| nvmem-cells = <&restart_reason &extra_restart_reason>; | |
| }; | |
| clock_audio_rx_1: rx_core_clk { | |
| #clock-cells = <0x1>; | |
| compatible = "qcom,audio-ref-clk"; | |
| qcom,codec-ext-clk-src = <0x5>; | |
| qcom,codec-lpass-clk-id = <0x30E>; | |
| qcom,codec-lpass-ext-clk-freq = <0x1588800>; | |
| }; | |
| clock_audio_rx_tx: rx_core_tx_clk { | |
| #clock-cells = <0x1>; | |
| compatible = "qcom,audio-ref-clk"; | |
| qcom,codec-ext-clk-src = <0xD>; | |
| qcom,codec-lpass-clk-id = <0x312>; | |
| qcom,codec-lpass-ext-clk-freq = <0x124F800>; | |
| }; | |
| clock_audio_rx_mclk2_2x_clk: rx_mclk2_2x_clk { | |
| #clock-cells = <0x1>; | |
| compatible = "qcom,audio-ref-clk"; | |
| qcom,codec-ext-clk-src = <0x10>; | |
| qcom,codec-lpass-clk-id = <0x318>; | |
| qcom,codec-lpass-ext-clk-freq = <0x124F800>; | |
| }; | |
| sys_temp_support { | |
| compatible = "mmi,sys-temp"; | |
| mmi,temperature-names = "front_temp", "back_temp", "fuse_temp"; | |
| status = "ok"; | |
| }; | |
| clock_audio_tx_1: tx_core_clk { | |
| #clock-cells = <0x1>; | |
| compatible = "qcom,audio-ref-clk"; | |
| qcom,codec-ext-clk-src = <0x7>; | |
| qcom,codec-lpass-clk-id = <0x30C>; | |
| qcom,codec-lpass-ext-clk-freq = <0x124F800>; | |
| }; | |
| clock_audio_va_1: va_core_clk { | |
| #clock-cells = <0x1>; | |
| compatible = "qcom,audio-ref-clk"; | |
| qcom,codec-ext-clk-src = <0x2>; | |
| qcom,codec-lpass-clk-id = <0x307>; | |
| qcom,codec-lpass-ext-clk-freq = <0x124F800>; | |
| }; | |
| clock_audio_wsa_2: wsa2_core_clk { | |
| #clock-cells = <0x1>; | |
| compatible = "qcom,audio-ref-clk"; | |
| qcom,codec-ext-clk-src = <0xC>; | |
| qcom,codec-lpass-clk-id = <0x310>; | |
| qcom,codec-lpass-ext-clk-freq = <0x124F800>; | |
| }; | |
| clock_audio_wsa2_tx: wsa2_core_tx_clk { | |
| #clock-cells = <0x1>; | |
| compatible = "qcom,audio-ref-clk"; | |
| qcom,codec-ext-clk-src = <0xF>; | |
| qcom,codec-lpass-clk-id = <0x316>; | |
| qcom,codec-lpass-ext-clk-freq = <0x124F800>; | |
| }; | |
| wsa2_spkr_en1: wsa2_spkr_en1_pinctrl { | |
| compatible = "qcom,msm-cdc-pinctrl"; | |
| pinctrl-0 = <&spkr2_1_sd_n_active>; | |
| pinctrl-1 = <&spkr2_1_sd_n_sleep>; | |
| pinctrl-names = "aud_active", "aud_sleep"; | |
| status = "disabled"; | |
| }; | |
| wsa2_spkr_en2: wsa2_spkr_en2_pinctrl { | |
| compatible = "qcom,msm-cdc-pinctrl"; | |
| pinctrl-0 = <&spkr2_2_sd_n_active>; | |
| pinctrl-1 = <&spkr2_2_sd_n_sleep>; | |
| pinctrl-names = "aud_active", "aud_sleep"; | |
| }; | |
| clock_audio_wsa_1: wsa_core_clk { | |
| #clock-cells = <0x1>; | |
| compatible = "qcom,audio-ref-clk"; | |
| qcom,codec-ext-clk-src = <0x3>; | |
| qcom,codec-lpass-clk-id = <0x309>; | |
| qcom,codec-lpass-ext-clk-freq = <0x124F800>; | |
| }; | |
| clock_audio_wsa_tx: wsa_core_tx_clk { | |
| #clock-cells = <0x1>; | |
| compatible = "qcom,audio-ref-clk"; | |
| qcom,codec-ext-clk-src = <0xE>; | |
| qcom,codec-lpass-clk-id = <0x314>; | |
| qcom,codec-lpass-ext-clk-freq = <0x124F800>; | |
| }; | |
| wsa_spkr_en1: wsa_spkr_en1_pinctrl { | |
| compatible = "qcom,msm-cdc-pinctrl"; | |
| pinctrl-0 = <&spkr_1_sd_n_active>; | |
| pinctrl-1 = <&spkr_1_sd_n_sleep>; | |
| pinctrl-names = "aud_active", "aud_sleep"; | |
| }; | |
| wsa_spkr_en2: wsa_spkr_en2_pinctrl { | |
| compatible = "qcom,msm-cdc-pinctrl"; | |
| pinctrl-0 = <&spkr_2_sd_n_active>; | |
| pinctrl-1 = <&spkr_2_sd_n_sleep>; | |
| pinctrl-names = "aud_active", "aud_sleep"; | |
| }; | |
| }; | |
| &spf_core_platform { | |
| cdc_dmic01_gpios: cdc_dmic01_pinctrl { | |
| #gpio-cells = <0x0>; | |
| compatible = "qcom,msm-cdc-pinctrl"; | |
| pinctrl-0 = <&cdc_dmic01_clk_active &cdc_dmic01_data_active>; | |
| pinctrl-1 = <&cdc_dmic01_clk_sleep &cdc_dmic01_data_sleep>; | |
| pinctrl-names = "aud_active", "aud_sleep"; | |
| qcom,lpi-gpios; | |
| }; | |
| cdc_dmic23_gpios: cdc_dmic23_pinctrl { | |
| #gpio-cells = <0x0>; | |
| compatible = "qcom,msm-cdc-pinctrl"; | |
| pinctrl-0 = <&cdc_dmic23_clk_active &cdc_dmic23_data_active>; | |
| pinctrl-1 = <&cdc_dmic23_clk_sleep &cdc_dmic23_data_sleep>; | |
| pinctrl-names = "aud_active", "aud_sleep"; | |
| qcom,lpi-gpios; | |
| }; | |
| cdc_dmic45_gpios: cdc_dmic45_pinctrl { | |
| #gpio-cells = <0x0>; | |
| compatible = "qcom,msm-cdc-pinctrl"; | |
| pinctrl-0 = <&cdc_dmic45_clk_active &cdc_dmic45_data_active>; | |
| pinctrl-1 = <&cdc_dmic45_clk_sleep &cdc_dmic45_data_sleep>; | |
| pinctrl-names = "aud_active", "aud_sleep"; | |
| qcom,lpi-gpios; | |
| }; | |
| cdc_dmic67_gpios: cdc_dmic67_pinctrl { | |
| #gpio-cells = <0x0>; | |
| compatible = "qcom,msm-cdc-pinctrl"; | |
| pinctrl-0 = <&cdc_dmic67_clk_active &cdc_dmic67_data_active>; | |
| pinctrl-1 = <&cdc_dmic67_clk_sleep &cdc_dmic67_data_sleep>; | |
| pinctrl-names = "aud_active", "aud_sleep"; | |
| qcom,lpi-gpios; | |
| }; | |
| rx_swr_gpios: rx_swr_clk_data_pinctrl { | |
| #gpio-cells = <0x0>; | |
| compatible = "qcom,msm-cdc-pinctrl"; | |
| pinctrl-0 = <&rx_swr_clk_active &rx_swr_data_active &rx_swr_data1_active>; | |
| pinctrl-1 = <&rx_swr_clk_sleep &rx_swr_data_sleep &rx_swr_data1_sleep>; | |
| pinctrl-names = "aud_active", "aud_sleep"; | |
| qcom,lpi-gpios; | |
| }; | |
| waipio_snd: sound { | |
| asoc-codec = <&stub_codec &lpass_cdc &swr_haptics &wsa883x_0221 &wsa883x_0222>; | |
| asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", "swr-haptics", "wsa-codec1", "wsa-codec2"; | |
| cdc-vdd-dmic1-supply = <&L6C>; | |
| qcom,audio-routing = "TX DMIC0", "Digital Mic0", "TX DMIC1", "Digital Mic1", "TX DMIC2", "Digital Mic2", "TX DMIC3", "Digital Mic3", "TX DMIC4", "Digital Mic4", "TX DMIC5", "Digital Mic5", "TX DMIC6", "Digital Mic6", "TX DMIC7", "Digital Mic7", "WSA SRC0_INP", "SRC0", "HAP_IN", "PCM_OUT", "WSA_TX DEC0_INP", "TX DEC0 MUX", "WSA_TX DEC1_INP", "TX DEC1 MUX", "RX_TX DEC0_INP", "TX DEC0 MUX", "RX_TX DEC1_INP", "TX DEC1 MUX", "RX_TX DEC2_INP", "TX DEC2 MUX", "RX_TX DEC3_INP", "TX DEC3 MUX", "VA SWR_INPUT", "VA_SWR_CLK", "VA_AIF1 CAP", "VA_SWR_CLK", "VA_AIF2 CAP", "VA_SWR_CLK", "VA_AIF3 CAP", "VA_SWR_CLK", "VA DMIC0", "Digital Mic0", "VA DMIC1", "Digital Mic1", "VA DMIC2", "Digital Mic2", "VA DMIC3", "Digital Mic3", "VA DMIC4", "Digital Mic4", "VA DMIC5", "Digital Mic5", "VA DMIC6", "Digital Mic6", "VA DMIC7", "Digital Mic7"; | |
| qcom,cdc-dmic01-gpios = <&cdc_dmic01_gpios>; | |
| qcom,cdc-dmic23-gpios = <&cdc_dmic23_gpios>; | |
| qcom,cdc-dmic45-gpios = <&cdc_dmic45_gpios>; | |
| qcom,cdc-static-supplies = "cdc-vdd-dmic1"; | |
| qcom,cdc-vdd-dmic1-current = <0x7530>; | |
| qcom,cdc-vdd-dmic1-voltage = <0x1B7740 0x1B7740>; | |
| qcom,ext-disp-audio-rx = <0x1>; | |
| qcom,mi2s-audio-intf = <0x0>; | |
| qcom,mi2s-clk-attribute = <0x1 0x1 0x1 0x1 0x1 0x1>; | |
| qcom,mi2s-tdm-is-hw-vote-needed = <0x1 0x0 0x1 0x0 0x0 0x0>; | |
| qcom,model = "waipio-mtp-snd-card"; | |
| qcom,msm-mbhc-gnd-swh = <0x1>; | |
| qcom,msm-mbhc-hphl-swh = <0x1>; | |
| qcom,msm-mbhc-usbc-audio-supported = <0x0>; | |
| qcom,msm-mi2s-master = <0x0 0x0 0x0 0x0 0x0 0x0>; | |
| qcom,msm_audio_ssr_devs = <&audio_gpr &lpi_tlmm &lpass_cdc>; | |
| qcom,tdm-clk-attribute = <0x1 0x1 0x1 0x1 0x1 0x1>; | |
| qcom,tdm-max-slots = <0x8>; | |
| qcom,upd_backends_used = "wcd"; | |
| qcom,upd_ear_pa_reg_addr = <0x300A>; | |
| qcom,upd_lpass_reg_addr = <0x3200418 0x33B0300>; | |
| qcom,wcd-disabled = <0x1>; | |
| qcom,wcn-bt = <0x1>; | |
| qcom,wsa-max-devs = <0x2>; | |
| }; | |
| cdc_tert_mi2s_gpios: tert_mi2s_pinctrl { | |
| #gpio-cells = <0x0>; | |
| compatible = "qcom,msm-cdc-pinctrl"; | |
| pinctrl-0 = <&tert_mi2s_sck_active &tert_mi2s_ws_active &tert_mi2s_sd0_active>; | |
| pinctrl-1 = <&tert_mi2s_sck_sleep &tert_mi2s_ws_sleep &tert_mi2s_sd0_sleep>; | |
| pinctrl-names = "aud_active", "aud_sleep"; | |
| status = "disabled"; | |
| }; | |
| va_swr_gpios: tx_swr_clk_data_pinctrl { | |
| #gpio-cells = <0x0>; | |
| compatible = "qcom,msm-cdc-pinctrl"; | |
| pinctrl-0 = <&tx_swr_clk_active &tx_swr_data0_active &tx_swr_data1_active &tx_swr_data2_active>; | |
| pinctrl-1 = <&tx_swr_clk_sleep &tx_swr_data0_sleep &tx_swr_data1_sleep &tx_swr_data2_sleep>; | |
| pinctrl-names = "aud_active", "aud_sleep"; | |
| qcom,lpi-gpios; | |
| }; | |
| wsa2_swr_gpios: wsa2_swr_clk_data_pinctrl { | |
| #gpio-cells = <0x0>; | |
| compatible = "qcom,msm-cdc-pinctrl"; | |
| pinctrl-0 = <&wsa2_swr_clk_active &wsa2_swr_data_active>; | |
| pinctrl-1 = <&wsa2_swr_clk_sleep &wsa2_swr_data_sleep>; | |
| pinctrl-names = "aud_active", "aud_sleep"; | |
| qcom,lpi-gpios; | |
| }; | |
| wsa_swr_gpios: wsa_swr_clk_data_pinctrl { | |
| #gpio-cells = <0x0>; | |
| compatible = "qcom,msm-cdc-pinctrl"; | |
| pinctrl-0 = <&wsa_swr_clk_active &wsa_swr_data_active>; | |
| pinctrl-1 = <&wsa_swr_clk_sleep &wsa_swr_data_sleep>; | |
| pinctrl-names = "aud_active", "aud_sleep"; | |
| qcom,lpi-gpios; | |
| }; | |
| }; | |
| &spkr_2_sd_n_active { | |
| config { | |
| pins = "gpio87"; | |
| }; | |
| mux { | |
| pins = "gpio87"; | |
| }; | |
| }; | |
| &spkr_2_sd_n_sleep { | |
| config { | |
| pins = "gpio87"; | |
| }; | |
| mux { | |
| pins = "gpio87"; | |
| }; | |
| }; | |
| &spmi_bus { | |
| #address-cells = <0x2>; | |
| #interrupt-cells = <0x4>; | |
| #size-cells = <0x0>; | |
| interrupt-controller; | |
| qcom,pm8010@8 { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| compatible = "qcom,spmi-pmic"; | |
| reg = <0x8 0x0>; | |
| pm8010i_tz: qcom,temp-alarm@2400 { | |
| #thermal-sensor-cells = <0x0>; | |
| compatible = "qcom,spmi-temp-alarm"; | |
| interrupts = <0x8 0x24 0x0 0x3>; | |
| reg = <0x2400>; | |
| }; | |
| }; | |
| qcom,pm8010@9 { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| compatible = "qcom,spmi-pmic"; | |
| reg = <0x9 0x0>; | |
| pm8010j_tz: qcom,temp-alarm@2400 { | |
| #thermal-sensor-cells = <0x0>; | |
| compatible = "qcom,spmi-temp-alarm"; | |
| interrupts = <0x9 0x24 0x0 0x3>; | |
| reg = <0x2400>; | |
| }; | |
| }; | |
| qcom,pm8350@1 { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| compatible = "qcom,spmi-pmic"; | |
| reg = <0x1 0x0>; | |
| pm8350_gpios: pinctrl@8800 { | |
| #gpio-cells = <0x2>; | |
| #interrupt-cells = <0x2>; | |
| compatible = "qcom,pm8350-gpio"; | |
| gpio-controller; | |
| interrupt-controller; | |
| reg = <0x8800>; | |
| key_vol_up { | |
| key_vol_up_default: key_vol_up_default { | |
| bias-pull-up; | |
| function = "normal"; | |
| input-enable; | |
| pins = "gpio6"; | |
| power-source = <0x1>; | |
| }; | |
| }; | |
| pm8350_rear_tof_therm { | |
| pm8350_rear_tof_therm_default: pm8350_rear_tof_therm_default { | |
| bias-high-impedance; | |
| pins = "gpio1"; | |
| }; | |
| }; | |
| }; | |
| pm8350_tz: qcom,temp-alarm@a00 { | |
| #thermal-sensor-cells = <0x0>; | |
| compatible = "qcom,spmi-temp-alarm"; | |
| interrupts = <0x1 0xA 0x0 0x3>; | |
| io-channel-names = "thermal"; | |
| io-channels = <&pmk8350_vadc 0x103>; | |
| reg = <0xA00>; | |
| }; | |
| }; | |
| qcom,pm8350b@3 { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| compatible = "qcom,spmi-pmic"; | |
| reg = <0x3 0x0>; | |
| bcl_soc: bcl-soc { | |
| #thermal-sensor-cells = <0x0>; | |
| compatible = "qcom,msm-bcl-soc"; | |
| }; | |
| pm8350b_bcl: bcl@4700 { | |
| #thermal-sensor-cells = <0x1>; | |
| compatible = "qcom,bcl-v5"; | |
| interrupt-names = "bcl-lvl0", "bcl-lvl1", "bcl-lvl2"; | |
| interrupts = <0x3 0x47 0x0 0x0 0x3 0x47 0x1 0x0 0x3 0x47 0x2 0x0>; | |
| qcom,pmic7-threshold; | |
| reg = <0x4700 0x100>; | |
| }; | |
| pm8350b_gpios: pinctrl@8800 { | |
| #gpio-cells = <0x2>; | |
| #interrupt-cells = <0x2>; | |
| compatible = "qcom,pm8350b-gpio"; | |
| gpio-controller; | |
| interrupt-controller; | |
| reg = <0x8800>; | |
| }; | |
| pm8350b_amoled: qcom,amoled { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| compatible = "qcom,qpnp-amoled-regulator"; | |
| ab_vreg: ab@f900 { | |
| qcom,swire-control; | |
| reg = <0xF900>; | |
| reg-names = "ab_base"; | |
| regulator-max-microvolt = <0x4F5880>; | |
| regulator-min-microvolt = <0x4630C0>; | |
| regulator-name = "ab"; | |
| }; | |
| ibb_vreg: ibb@f800 { | |
| qcom,swire-control; | |
| reg = <0xF800>; | |
| reg-names = "ibb_base"; | |
| regulator-allow-set-load; | |
| regulator-max-microvolt = <0x64B540>; | |
| regulator-min-microvolt = <0x155CC0>; | |
| regulator-name = "ibb"; | |
| }; | |
| oledb_vreg: oledb@fa00 { | |
| qcom,swire-control; | |
| reg = <0xFA00>; | |
| reg-names = "oledb_base"; | |
| regulator-max-microvolt = <0x7A1200>; | |
| regulator-min-microvolt = <0x4C4B40>; | |
| regulator-name = "oledb"; | |
| }; | |
| }; | |
| qcom,amoled-ecm@f900 { | |
| compatible = "qcom,amoled-ecm"; | |
| interrupt-names = "ecm-sdam0", "ecm-sdam1", "ecm-sdam2"; | |
| interrupts = <0x0 0x7C 0x1 0x1 0x0 0x7D 0x1 0x1 0x0 0x98 0x1 0x1>; | |
| nvmem = <&pmk8350_sdam_13 &pmk8350_sdam_14 &pmk8350_sdam_41>; | |
| nvmem-names = "amoled-ecm-sdam0", "amoled-ecm-sdam1", "amoled-ecm-sdam2"; | |
| reg = <0xF900>; | |
| }; | |
| pm8350b_haptics: qcom,hv-haptics@f000 { | |
| compatible = "qcom,hv-haptics"; | |
| interrupt-names = "fifo-empty"; | |
| interrupts = <0x3 0xF0 0x1 0x1>; | |
| moto,wf-vmax-mv = <0x2328>; | |
| nvmem = <&pmk8350_sdam_46>; | |
| nvmem-cell-names = "hap_cl_brake"; | |
| nvmem-cells = <&hap_cl_brake>; | |
| nvmem-names = "hap_cfg_sdam"; | |
| qcom,brake-mode = <0x1>; | |
| qcom,brake-pattern = [FF 3F 1F]; | |
| qcom,brake-sig-shape = <0x1>; | |
| qcom,drv-sig-shape = <0x1>; | |
| qcom,lra-period-us = <0x16F8>; | |
| qcom,pbs-client = <&pm8350b_pbs2>; | |
| qcom,vmax-mv = <0x578>; | |
| reg = <0xF000 0xF100 0xF200>; | |
| status = "ok"; | |
| effect_0 { | |
| qcom,effect-id = <0x0>; | |
| qcom,wf-auto-res-disable; | |
| qcom,wf-brake-mode = <0x0>; | |
| qcom,wf-brake-pattern = [FF FF 9F 6F 3F 1F]; | |
| qcom,wf-pattern-data = <0xFF 0x0 0x0 0xFF 0x0 0x0 0xFF 0x1 0x0>; | |
| qcom,wf-pattern-period-us = <0x16F8>; | |
| qcom,wf-pattern-preload; | |
| qcom,wf-vmax-mv = <0x1388>; | |
| }; | |
| effect_1 { | |
| qcom,effect-id = <0x1>; | |
| qcom,wf-auto-res-disable; | |
| qcom,wf-brake-mode = <0x0>; | |
| qcom,wf-brake-pattern = [FF FF 9F 6F 3F 1F]; | |
| qcom,wf-pattern-data = <0xFF 0x0 0x0 0xFF 0x0 0x0 0xFF 0x1 0x0>; | |
| qcom,wf-pattern-period-us = <0x16F8>; | |
| qcom,wf-vmax-mv = <0x1388>; | |
| }; | |
| effect_2 { | |
| qcom,effect-id = <0x2>; | |
| qcom,wf-auto-res-disable; | |
| qcom,wf-brake-mode = <0x0>; | |
| qcom,wf-brake-pattern = [FF FF 9F 6F 3F 1F]; | |
| qcom,wf-pattern-data = <0xFF 0x0 0x0 0xFF 0x0 0x0 0xFF 0x1 0x0>; | |
| qcom,wf-pattern-period-us = <0x16F8>; | |
| qcom,wf-vmax-mv = <0x1388>; | |
| }; | |
| effect_21 { | |
| qcom,effect-id = <0x15>; | |
| qcom,wf-auto-res-disable; | |
| qcom,wf-brake-mode = <0x0>; | |
| qcom,wf-brake-pattern = [FF FF 9F 6F 3F 1F]; | |
| qcom,wf-pattern-data = <0xFF 0x0 0x0 0xFF 0x0 0x0 0xFF 0x1 0x0>; | |
| qcom,wf-pattern-period-us = <0x16F8>; | |
| qcom,wf-vmax-mv = <0x1388>; | |
| }; | |
| effect_3 { | |
| qcom,effect-id = <0x3>; | |
| qcom,wf-auto-res-disable; | |
| qcom,wf-brake-mode = <0x0>; | |
| qcom,wf-brake-pattern = [FF FF 9F 6F 3F 1F]; | |
| qcom,wf-pattern-data = <0xFF 0x0 0x0 0xFF 0x0 0x0 0xFF 0x1 0x0>; | |
| qcom,wf-pattern-period-us = <0x16F8>; | |
| qcom,wf-vmax-mv = <0x1388>; | |
| }; | |
| effect_4 { | |
| qcom,effect-id = <0x4>; | |
| qcom,wf-auto-res-disable; | |
| qcom,wf-brake-mode = <0x0>; | |
| qcom,wf-brake-pattern = [FF FF 9F 6F 3F 1F]; | |
| qcom,wf-pattern-data = <0xFF 0x0 0x0 0xFF 0x0 0x0 0xFF 0x1 0x0>; | |
| qcom,wf-pattern-period-us = <0x16F8>; | |
| qcom,wf-vmax-mv = <0x1388>; | |
| }; | |
| effect_5 { | |
| qcom,effect-id = <0x5>; | |
| qcom,wf-auto-res-disable; | |
| qcom,wf-brake-mode = <0x0>; | |
| qcom,wf-brake-pattern = [FF FF 9F 6F 3F 1F]; | |
| qcom,wf-pattern-data = <0xFF 0x0 0x0 0xFF 0x0 0x0 0xFF 0x1 0x0>; | |
| qcom,wf-pattern-period-us = <0x16F8>; | |
| qcom,wf-vmax-mv = <0x1388>; | |
| }; | |
| hap_swr_slave_reg: qcom,hap-swr-slave-reg { | |
| regulator-name = "hap-swr-slave-reg"; | |
| }; | |
| }; | |
| pm8350b_pbs2: qcom,pbs@1900 { | |
| compatible = "qcom,qpnp-pbs"; | |
| reg = <0x1900>; | |
| }; | |
| pm8350b_tz: qcom,temp-alarm@a00 { | |
| #thermal-sensor-cells = <0x0>; | |
| compatible = "qcom,spmi-temp-alarm"; | |
| interrupts = <0x3 0xA 0x0 0x3>; | |
| io-channel-names = "thermal"; | |
| io-channels = <&pmk8350_vadc 0x303>; | |
| reg = <0xA00>; | |
| }; | |
| }; | |
| qcom,pm8350c@2 { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| compatible = "qcom,spmi-pmic"; | |
| reg = <0x2 0x0>; | |
| pm8350c_bcl: bcl@4700 { | |
| #thermal-sensor-cells = <0x1>; | |
| compatible = "qcom,bcl-v5"; | |
| interrupt-names = "bcl-lvl0", "bcl-lvl1", "bcl-lvl2"; | |
| interrupts = <0x2 0x47 0x0 0x0 0x2 0x47 0x1 0x0 0x2 0x47 0x2 0x0>; | |
| qcom,pmic7-threshold; | |
| reg = <0x4700 0x100>; | |
| }; | |
| pm8350c_gpios: pinctrl@8800 { | |
| #gpio-cells = <0x2>; | |
| #interrupt-cells = <0x2>; | |
| compatible = "qcom,pm8350c-gpio"; | |
| gpio-controller; | |
| interrupt-controller; | |
| reg = <0x8800>; | |
| eusb2_reset_ctrl { | |
| eusb2_reset_ctrl_default: eusb2_reset_ctrl_default { | |
| bias-disable; | |
| function = "normal"; | |
| input-enable; | |
| output-enable; | |
| pins = "gpio7"; | |
| power-source = <0x1>; | |
| qcom,drive-strength = <0x2>; | |
| }; | |
| }; | |
| lcd_backlight_ctrl { | |
| lcd_backlight_ctrl_default: lcd_backlight_ctrl_default { | |
| bias-disable; | |
| function = "func1"; | |
| input-disable; | |
| output-enable; | |
| pins = "gpio8"; | |
| power-source = <0x1>; | |
| qcom,drive-strength = <0x2>; | |
| }; | |
| }; | |
| }; | |
| pm8350c_pwm_1: pwms@e800 { | |
| #pwm-cells = <0x2>; | |
| compatible = "qcom,pwm-lpg"; | |
| nvmem = <&pmk8350_sdam_21 &pmk8350_sdam_22>; | |
| nvmem-names = "lpg_chan_sdam", "lut_sdam"; | |
| qcom,lut-patterns = <0x0 0xA 0x14 0x1E 0x28 0x32 0x3C 0x46 0x50 0x5A 0x64 0x5A 0x50 0x46 0x3C 0x32 0x28 0x1E 0x14 0xA 0x0>; | |
| qcom,lut-sdam-base = <0x45>; | |
| qcom,num-lpg-channels = <0x3>; | |
| qcom,tick-duration-us = <0x1F40>; | |
| reg = <0xE800>; | |
| reg-names = "lpg-base"; | |
| lpg@1 { | |
| qcom,lpg-chan-id = <0x1>; | |
| qcom,lpg-sdam-base = <0x48>; | |
| qcom,ramp-high-index = <0x13>; | |
| qcom,ramp-low-index = <0x0>; | |
| qcom,ramp-pattern-repeat; | |
| qcom,ramp-step-ms = <0x64>; | |
| }; | |
| lpg@2 { | |
| qcom,lpg-chan-id = <0x2>; | |
| qcom,lpg-sdam-base = <0x56>; | |
| qcom,ramp-high-index = <0x13>; | |
| qcom,ramp-low-index = <0x0>; | |
| qcom,ramp-pattern-repeat; | |
| qcom,ramp-step-ms = <0x64>; | |
| }; | |
| lpg@3 { | |
| qcom,lpg-chan-id = <0x3>; | |
| qcom,lpg-sdam-base = <0x64>; | |
| qcom,ramp-high-index = <0x13>; | |
| qcom,ramp-low-index = <0x0>; | |
| qcom,ramp-pattern-repeat; | |
| qcom,ramp-step-ms = <0x64>; | |
| }; | |
| }; | |
| pm8350c_pwm_2: pwms@eb00 { | |
| #pwm-cells = <0x2>; | |
| compatible = "qcom,pwm-lpg"; | |
| qcom,num-lpg-channels = <0x1>; | |
| reg = <0xEB00>; | |
| reg-names = "lpg-base"; | |
| }; | |
| pm8350c_flash: qcom,flash_led@ee00 { | |
| compatible = "qcom,pm8350c-flash-led"; | |
| interrupt-names = "led-fault-irq", "all-ramp-down-done-irq", "all-ramp-up-done-irq"; | |
| interrupts = <0x2 0xEE 0x0 0x1 0x2 0xEE 0x3 0x1 0x2 0xEE 0x4 0x1>; | |
| qcom,hw-strobe-gpios = <&pm8350c_gpios 0x1 0x0>; | |
| qcom,thermal-derate-current = <0xC8 0x1F4>; | |
| reg = <0xEE00>; | |
| status = "ok"; | |
| pm8350c_flash0: qcom,flash_0 { | |
| label = "flash"; | |
| qcom,default-led-trigger = "flash0_trigger"; | |
| qcom,duration-ms = <0x500>; | |
| qcom,id = <0x0>; | |
| qcom,ires-ua = <0x30D4>; | |
| qcom,led-name = "led:flash_0"; | |
| qcom,max-current-ma = <0x5DC>; | |
| }; | |
| pm8350c_flash1: qcom,flash_1 { | |
| label = "flash"; | |
| qcom,default-led-trigger = "flash1_trigger"; | |
| qcom,duration-ms = <0x500>; | |
| qcom,id = <0x1>; | |
| qcom,ires-ua = <0x30D4>; | |
| qcom,led-name = "led:flash_1"; | |
| qcom,max-current-ma = <0x5DC>; | |
| }; | |
| pm8350c_flash2: qcom,flash_2 { | |
| label = "flash"; | |
| qcom,default-led-trigger = "flash2_trigger"; | |
| qcom,duration-ms = <0x500>; | |
| qcom,id = <0x2>; | |
| qcom,ires-ua = <0x30D4>; | |
| qcom,led-name = "led:flash_2"; | |
| qcom,max-current-ma = <0x5DC>; | |
| }; | |
| pm8350c_flash3: qcom,flash_3 { | |
| label = "flash"; | |
| qcom,default-led-trigger = "flash3_trigger"; | |
| qcom,duration-ms = <0x500>; | |
| qcom,id = <0x3>; | |
| qcom,ires-ua = <0x30D4>; | |
| qcom,led-name = "led:flash_3"; | |
| qcom,max-current-ma = <0x5DC>; | |
| }; | |
| pm8350c_switch0: qcom,led_switch_0 { | |
| label = "switch"; | |
| qcom,default-led-trigger = "switch0_trigger"; | |
| qcom,led-mask = <0x9>; | |
| qcom,led-name = "led:switch_0"; | |
| qcom,symmetry-en; | |
| }; | |
| pm8350c_switch1: qcom,led_switch_1 { | |
| label = "switch"; | |
| qcom,default-led-trigger = "switch1_trigger"; | |
| qcom,led-mask = <0x6>; | |
| qcom,led-name = "led:switch_1"; | |
| qcom,symmetry-en; | |
| }; | |
| pm8350c_switch2: qcom,led_switch_2 { | |
| label = "switch"; | |
| qcom,default-led-trigger = "switch2_trigger"; | |
| qcom,led-mask = <0xF>; | |
| qcom,led-name = "led:switch_2"; | |
| qcom,symmetry-en; | |
| }; | |
| pm8350c_torch0: qcom,torch_0 { | |
| label = "torch"; | |
| qcom,default-led-trigger = "torch0_trigger"; | |
| qcom,id = <0x0>; | |
| qcom,ires-ua = <0x30D4>; | |
| qcom,led-name = "led:torch_0"; | |
| qcom,max-current-ma = <0x1F4>; | |
| }; | |
| pm8350c_torch1: qcom,torch_1 { | |
| label = "torch"; | |
| qcom,default-led-trigger = "torch1_trigger"; | |
| qcom,id = <0x1>; | |
| qcom,ires-ua = <0x30D4>; | |
| qcom,led-name = "led:torch_1"; | |
| qcom,max-current-ma = <0x1F4>; | |
| }; | |
| pm8350c_torch2: qcom,torch_2 { | |
| label = "torch"; | |
| qcom,default-led-trigger = "torch2_trigger"; | |
| qcom,id = <0x2>; | |
| qcom,ires-ua = <0x30D4>; | |
| qcom,led-name = "led:torch_2"; | |
| qcom,max-current-ma = <0x1F4>; | |
| }; | |
| pm8350c_torch3: qcom,torch_3 { | |
| label = "torch"; | |
| qcom,default-led-trigger = "torch3_trigger"; | |
| qcom,id = <0x3>; | |
| qcom,ires-ua = <0x30D4>; | |
| qcom,led-name = "led:torch_3"; | |
| qcom,max-current-ma = <0x1F4>; | |
| }; | |
| }; | |
| pm8350c_rgb: qcom,leds@ef00 { | |
| compatible = "qcom,tri-led"; | |
| reg = <0xEF00>; | |
| blue { | |
| label = "blue"; | |
| led-sources = <0x2>; | |
| linux,default-trigger = "timer"; | |
| pwms = <&pm8350c_pwm_1 0x2 0xF4240>; | |
| status = "disabled"; | |
| }; | |
| green { | |
| label = "green"; | |
| led-sources = <0x1>; | |
| linux,default-trigger = "timer"; | |
| pwms = <&pm8350c_pwm_1 0x1 0xF4240>; | |
| status = "disabled"; | |
| }; | |
| red { | |
| label = "charging"; | |
| led-sources = <0x0>; | |
| linux,default-trigger = "timer"; | |
| pwms = <&pm8350c_pwm_1 0x0 0xF4240>; | |
| }; | |
| }; | |
| pm8350c_tz: qcom,temp-alarm@a00 { | |
| #thermal-sensor-cells = <0x0>; | |
| compatible = "qcom,spmi-temp-alarm"; | |
| interrupts = <0x2 0xA 0x0 0x3>; | |
| reg = <0xA00>; | |
| }; | |
| }; | |
| qcom,pm8450@7 { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| compatible = "qcom,spmi-pmic"; | |
| reg = <0x7 0x0>; | |
| pm8450_gpios: pinctrl@8800 { | |
| #gpio-cells = <0x2>; | |
| #interrupt-cells = <0x2>; | |
| compatible = "qcom,pm8450-gpio"; | |
| gpio-controller; | |
| interrupt-controller; | |
| reg = <0x8800>; | |
| }; | |
| pm8450_tz: qcom,temp-alarm@a00 { | |
| #thermal-sensor-cells = <0x0>; | |
| compatible = "qcom,spmi-temp-alarm"; | |
| interrupts = <0x7 0xA 0x0 0x3>; | |
| reg = <0xA00>; | |
| }; | |
| }; | |
| pmk8350: qcom,pmk8350@0 { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| compatible = "qcom,spmi-pmic"; | |
| reg = <0x0 0x0>; | |
| pmk8350_adc_tm: adc_tm@3400 { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| #thermal-sensor-cells = <0x1>; | |
| compatible = "qcom,adc-tm7"; | |
| interrupt-names = "threshold"; | |
| interrupts = <0x0 0x34 0x0 0x1>; | |
| io-channels = <&pmk8350_vadc 0x144 &pmk8350_vadc 0x145 &pmk8350_vadc 0x146 &pmk8350_vadc 0x147 &pmk8350_vadc 0x148 &pmk8350_vadc 0x347 &pmk8350_vadc 0x34B &pmk8350_vadc 0x44>; | |
| reg = <0x3400>; | |
| pm8350_cam_flash_therm { | |
| qcom,hw-settle-time = <0xC8>; | |
| qcom,ratiometric; | |
| reg = <0x145>; | |
| }; | |
| pm8350_hot_pocket_therm { | |
| qcom,hw-settle-time = <0xC8>; | |
| qcom,ratiometric; | |
| reg = <0x146>; | |
| }; | |
| pm8350_msm_therm { | |
| qcom,hw-settle-time = <0xC8>; | |
| qcom,ratiometric; | |
| reg = <0x144>; | |
| }; | |
| pm8350_rear_tof_therm { | |
| qcom,hw-settle-time = <0xC8>; | |
| qcom,ratiometric; | |
| reg = <0x148>; | |
| }; | |
| pm8350_wide_rfc_therm { | |
| qcom,hw-settle-time = <0xC8>; | |
| qcom,ratiometric; | |
| reg = <0x147>; | |
| }; | |
| pm8350b_usb_conn_therm { | |
| qcom,hw-settle-time = <0xC8>; | |
| qcom,ratiometric; | |
| reg = <0x347>; | |
| }; | |
| pm8350b_wl_chg_therm { | |
| qcom,hw-settle-time = <0xC8>; | |
| qcom,ratiometric; | |
| reg = <0x34B>; | |
| }; | |
| pmk8350_xo_therm { | |
| qcom,hw-settle-time = <0xC8>; | |
| qcom,ratiometric; | |
| reg = <0x44>; | |
| }; | |
| }; | |
| pmk8350_gpios: pinctrl@b000 { | |
| #gpio-cells = <0x2>; | |
| #interrupt-cells = <0x2>; | |
| compatible = "qcom,pmk8350-gpio"; | |
| gpio-controller; | |
| interrupt-controller; | |
| reg = <0xB000>; | |
| }; | |
| pon_hlos@1300 { | |
| compatible = "qcom,pm8998-pon"; | |
| qcom,log-kpd-event; | |
| reg = <0x1300 0x800>; | |
| reg-names = "pon_hlos", "pon_pbs"; | |
| pwrkey { | |
| compatible = "qcom,pmk8350-pwrkey"; | |
| interrupts = <0x0 0x13 0x7 0x3>; | |
| linux,code = <0x74>; | |
| }; | |
| resin { | |
| compatible = "qcom,pmk8350-resin"; | |
| interrupts = <0x0 0x13 0x6 0x3>; | |
| linux,code = <0x72>; | |
| }; | |
| }; | |
| pmk8350_rtc: rtc@6100 { | |
| compatible = "qcom,pmk8350-rtc"; | |
| interrupts = <0x0 0x62 0x1 0x1>; | |
| reg = <0x6100 0x6200>; | |
| reg-names = "rtc", "alarm"; | |
| }; | |
| pmk8350_sdam_1: sdam@7000 { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| compatible = "qcom,spmi-sdam"; | |
| reg = <0x7000>; | |
| }; | |
| pmk8350_sdam_2: sdam@7100 { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| compatible = "qcom,spmi-sdam"; | |
| reg = <0x7100>; | |
| hap_cl_brake: cl_brake@7c { | |
| bits = <0x0 0x8>; | |
| reg = <0x7C 0x1>; | |
| }; | |
| restart_reason: restart@48 { | |
| bits = <0x1 0x7>; | |
| reg = <0x48 0x1>; | |
| }; | |
| extra_restart_reason: restart@a0 { | |
| bit = <0x0 0x7>; | |
| reg = <0xA0 0x1>; | |
| }; | |
| }; | |
| pmk8350_sdam_5: sdam@7400 { | |
| compatible = "qcom,spmi-sdam"; | |
| reg = <0x7400>; | |
| }; | |
| pmk8350_sdam_13: sdam@7c00 { | |
| compatible = "qcom,spmi-sdam"; | |
| reg = <0x7C00>; | |
| }; | |
| pmk8350_sdam_14: sdam@7d00 { | |
| compatible = "qcom,spmi-sdam"; | |
| reg = <0x7D00>; | |
| }; | |
| pmk8350_sdam_21: sdam@8400 { | |
| compatible = "qcom,spmi-sdam"; | |
| reg = <0x8400>; | |
| }; | |
| pmk8350_sdam_22: sdam@8500 { | |
| compatible = "qcom,spmi-sdam"; | |
| reg = <0x8500>; | |
| }; | |
| pmk8350_sdam_23: sdam@8600 { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| compatible = "qcom,spmi-sdam"; | |
| reg = <0x8600>; | |
| adc_scaling: scaling@bf { | |
| bits = <0x0 0x2>; | |
| reg = <0xBF 0x1>; | |
| }; | |
| }; | |
| pmk8350_sdam_41: sdam@9800 { | |
| compatible = "qcom,spmi-sdam"; | |
| reg = <0x9800>; | |
| }; | |
| pmk8350_sdam_46: sdam@9d00 { | |
| compatible = "qcom,spmi-sdam"; | |
| reg = <0x9D00>; | |
| }; | |
| pmk8350_vadc: vadc@3100 { | |
| #address-cells = <0x1>; | |
| #io-channel-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| compatible = "qcom,spmi-adc7"; | |
| interrupt-names = "eoc-int-en-set"; | |
| interrupts = <0x0 0x31 0x0 0x1>; | |
| io-channel-ranges; | |
| pinctrl-0 = <&pm8350_rear_tof_therm_default>; | |
| pinctrl-names = "default"; | |
| reg = <0x3100>; | |
| pm8350_cam_flash_therm { | |
| label = "pm8350_cam_flash_therm"; | |
| qcom,hw-settle-time = <0xC8>; | |
| qcom,pre-scaling = <0x1 0x1>; | |
| qcom,ratiometric; | |
| reg = <0x145>; | |
| }; | |
| pm8350_die_temp { | |
| label = "pm8350_die_temp"; | |
| qcom,pre-scaling = <0x1 0x1>; | |
| reg = <0x103>; | |
| }; | |
| pm8350_hot_pocket_therm { | |
| label = "pm8350_hot_pocket_therm"; | |
| qcom,hw-settle-time = <0xC8>; | |
| qcom,pre-scaling = <0x1 0x1>; | |
| qcom,ratiometric; | |
| reg = <0x146>; | |
| }; | |
| pm8350_msm_therm { | |
| label = "pm8350_msm_therm"; | |
| qcom,hw-settle-time = <0xC8>; | |
| qcom,pre-scaling = <0x1 0x1>; | |
| qcom,ratiometric; | |
| reg = <0x144>; | |
| }; | |
| pm8350_rear_tof_therm { | |
| label = "pm8350_rear_tof_therm"; | |
| qcom,hw-settle-time = <0xC8>; | |
| qcom,pre-scaling = <0x1 0x1>; | |
| qcom,ratiometric; | |
| reg = <0x148>; | |
| }; | |
| pm8350_ref_gnd { | |
| label = "pm8350_ref_gnd"; | |
| qcom,pre-scaling = <0x1 0x1>; | |
| reg = <0x100>; | |
| }; | |
| pm8350_vph_pwr { | |
| label = "pm8350_vph_pwr"; | |
| qcom,pre-scaling = <0x1 0x3>; | |
| reg = <0x18E>; | |
| }; | |
| pm8350_vref_1p25 { | |
| label = "pm8350_vref_1p25"; | |
| qcom,pre-scaling = <0x1 0x1>; | |
| reg = <0x101>; | |
| }; | |
| pm8350_wide_rfc_therm { | |
| label = "pm8350_wide_rfc_therm"; | |
| qcom,hw-settle-time = <0xC8>; | |
| qcom,pre-scaling = <0x1 0x1>; | |
| qcom,ratiometric; | |
| reg = <0x147>; | |
| }; | |
| pm8350b_chg_temp { | |
| label = "pm8350b_chg_temp"; | |
| qcom,pre-scaling = <0x1 0x1>; | |
| reg = <0x310>; | |
| }; | |
| pm8350b_die_temp { | |
| label = "pm8350b_die_temp"; | |
| qcom,pre-scaling = <0x1 0x1>; | |
| reg = <0x303>; | |
| }; | |
| pm8350b_ichg_fb { | |
| label = "pm8350b_ichg_fb"; | |
| qcom,pre-scaling = <0x3E8 0x4A821>; | |
| reg = <0x3A1>; | |
| }; | |
| pm8350b_ichg_fb_2p5x { | |
| label = "pm8350b_ichg_fb_2p5x"; | |
| qcom,pre-scaling = <0x3E8 0xBA453>; | |
| reg = <0x3A1>; | |
| status = "disabled"; | |
| }; | |
| pm8350b_ichg_fb_2x { | |
| label = "pm8350b_ichg_fb_2x"; | |
| qcom,pre-scaling = <0x3E8 0x95042>; | |
| reg = <0x3A1>; | |
| status = "disabled"; | |
| }; | |
| pm8350b_iin_fb { | |
| label = "pm8350b_iin_fb"; | |
| qcom,pre-scaling = <0x20 0x64>; | |
| reg = <0x317>; | |
| }; | |
| pm8350b_ref_gnd { | |
| label = "pm8350b_ref_gnd"; | |
| qcom,pre-scaling = <0x1 0x1>; | |
| reg = <0x300>; | |
| }; | |
| pm8350b_usb_conn_therm { | |
| label = "pm8350b_usb_conn_therm"; | |
| qcom,hw-settle-time = <0xC8>; | |
| qcom,pre-scaling = <0x1 0x1>; | |
| qcom,ratiometric; | |
| reg = <0x347>; | |
| }; | |
| pm8350b_usb_in_v_div_16 { | |
| label = "pm8350b_usb_in_v_div_16"; | |
| qcom,pre-scaling = <0x1 0x10>; | |
| reg = <0x311>; | |
| }; | |
| pm8350b_vbat_sns { | |
| label = "pm8350b_vbat_sns"; | |
| qcom,pre-scaling = <0x1 0x3>; | |
| reg = <0x38F>; | |
| }; | |
| pm8350b_vph_pwr { | |
| label = "pm8350b_vph_pwr"; | |
| qcom,pre-scaling = <0x1 0x3>; | |
| reg = <0x38E>; | |
| }; | |
| pm8350b_vref_1p25 { | |
| label = "pm8350b_vref_1p25"; | |
| qcom,pre-scaling = <0x1 0x1>; | |
| reg = <0x301>; | |
| }; | |
| pm8350b_wl_chg_therm { | |
| label = "pm8350b_wl_chg_therm"; | |
| qcom,hw-settle-time = <0xC8>; | |
| qcom,pre-scaling = <0x1 0x1>; | |
| qcom,ratiometric; | |
| reg = <0x34B>; | |
| }; | |
| pmk8350_die_temp { | |
| label = "pmk8350_die_temp"; | |
| qcom,pre-scaling = <0x1 0x1>; | |
| reg = <0x3>; | |
| }; | |
| pmk8350_ref_gnd { | |
| label = "pmk8350_ref_gnd"; | |
| qcom,pre-scaling = <0x1 0x1>; | |
| reg = <0x0>; | |
| }; | |
| pmk8350_vref_1p25 { | |
| label = "pmk8350_vref_1p25"; | |
| qcom,pre-scaling = <0x1 0x1>; | |
| reg = <0x1>; | |
| }; | |
| pmk8350_xo_therm { | |
| label = "pmk8350_xo_therm"; | |
| qcom,hw-settle-time = <0xC8>; | |
| qcom,pre-scaling = <0x1 0x1>; | |
| qcom,ratiometric; | |
| reg = <0x44>; | |
| }; | |
| pmr735a_die_temp { | |
| label = "pmr735a_die_temp"; | |
| qcom,pre-scaling = <0x1 0x1>; | |
| reg = <0x403>; | |
| }; | |
| pmr735a_ref_gnd { | |
| label = "pmr735a_ref_gnd"; | |
| qcom,pre-scaling = <0x1 0x1>; | |
| reg = <0x400>; | |
| }; | |
| pmr735a_vref_1p25 { | |
| label = "pmr735a_vref_1p25"; | |
| qcom,pre-scaling = <0x1 0x1>; | |
| reg = <0x401>; | |
| }; | |
| pmr735b_die_temp { | |
| label = "pmr735b_die_temp"; | |
| qcom,pre-scaling = <0x1 0x1>; | |
| reg = <0x503>; | |
| }; | |
| pmr735b_ref_gnd { | |
| label = "pmr735b_ref_gnd"; | |
| qcom,pre-scaling = <0x1 0x1>; | |
| reg = <0x500>; | |
| }; | |
| pmr735b_vref_1p25 { | |
| label = "pmr735b_vref_1p25"; | |
| qcom,pre-scaling = <0x1 0x1>; | |
| reg = <0x501>; | |
| }; | |
| smb139x_1_ichg_smb { | |
| label = "smb139x_1_ichg_smb"; | |
| qcom,hw-settle-time = <0xC8>; | |
| reg = <0x918>; | |
| }; | |
| smb139x_1_iin_smb { | |
| label = "smb139x_1_iin_smb"; | |
| qcom,hw-settle-time = <0xC8>; | |
| reg = <0x919>; | |
| }; | |
| smb139x_1_smb_temp { | |
| label = "smb139x_1_smb_temp"; | |
| qcom,hw-settle-time = <0xC8>; | |
| reg = <0x906>; | |
| }; | |
| smb139x_2_ichg_smb { | |
| label = "smb139x_2_ichg_smb"; | |
| qcom,hw-settle-time = <0xC8>; | |
| reg = <0xB18>; | |
| }; | |
| smb139x_2_iin_smb { | |
| label = "smb139x_2_iin_smb"; | |
| qcom,hw-settle-time = <0xC8>; | |
| reg = <0xB19>; | |
| }; | |
| smb139x_2_smb_temp { | |
| label = "smb139x_2_smb_temp"; | |
| qcom,hw-settle-time = <0xC8>; | |
| reg = <0xB06>; | |
| }; | |
| }; | |
| }; | |
| pmr735a_spmi: qcom,pmr735a@4 { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| compatible = "qcom,spmi-pmic"; | |
| reg = <0x4 0x0>; | |
| pmr735a_gpios: pinctrl@8800 { | |
| #gpio-cells = <0x2>; | |
| #interrupt-cells = <0x2>; | |
| compatible = "qcom,pmr735a-gpio"; | |
| gpio-controller; | |
| interrupt-controller; | |
| reg = <0x8800>; | |
| }; | |
| pmr735a_tz: qcom,temp-alarm@a00 { | |
| #thermal-sensor-cells = <0x0>; | |
| compatible = "qcom,spmi-temp-alarm"; | |
| interrupts = <0x4 0xA 0x0 0x3>; | |
| io-channel-names = "thermal"; | |
| io-channels = <&pmk8350_vadc 0x403>; | |
| reg = <0xA00>; | |
| }; | |
| }; | |
| qcom,pmr735b@5 { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| compatible = "qcom,spmi-pmic"; | |
| reg = <0x5 0x0>; | |
| pmr735b_gpios: pinctrl@8800 { | |
| #gpio-cells = <0x2>; | |
| #interrupt-cells = <0x2>; | |
| compatible = "qcom,pmr735b-gpio"; | |
| gpio-controller; | |
| interrupt-controller; | |
| reg = <0x8800>; | |
| }; | |
| pmr735b_tz: qcom,temp-alarm@a00 { | |
| #thermal-sensor-cells = <0x0>; | |
| compatible = "qcom,spmi-temp-alarm"; | |
| interrupts = <0x5 0xA 0x0 0x3>; | |
| io-channel-names = "thermal"; | |
| io-channels = <&pmk8350_vadc 0x503>; | |
| reg = <0xA00>; | |
| }; | |
| }; | |
| }; | |
| &thermal_zones { | |
| cam-therm { | |
| polling-delay = <0x0>; | |
| polling-delay-passive = <0x0>; | |
| thermal-sensors = <&pmk8350_adc_tm 0x148>; | |
| trips { | |
| active-config0 { | |
| hysteresis = <0x3E8>; | |
| temperature = <0x1E848>; | |
| type = "passive"; | |
| }; | |
| active-config1 { | |
| hysteresis = <0x3E8>; | |
| temperature = <0x1E848>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| camera-therm { | |
| polling-delay = <0x0>; | |
| polling-delay-passive = <0x0>; | |
| thermal-sensors = <&pmk8350_adc_tm 0x145>; | |
| status = "disabled"; | |
| trips { | |
| active-config0 { | |
| hysteresis = <0x3E8>; | |
| temperature = <0x1E848>; | |
| type = "passive"; | |
| }; | |
| active-config1 { | |
| hysteresis = <0x3E8>; | |
| temperature = <0x1E848>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| chg-therm { | |
| polling-delay = <0x0>; | |
| polling-delay-passive = <0x0>; | |
| thermal-sensors = <&pmk8350_adc_tm 0x146>; | |
| trips { | |
| active-config0 { | |
| hysteresis = <0x3E8>; | |
| temperature = <0x1E848>; | |
| type = "passive"; | |
| }; | |
| active-config1 { | |
| hysteresis = <0x3E8>; | |
| temperature = <0x1E848>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| conn-therm { | |
| polling-delay = <0x0>; | |
| polling-delay-passive = <0x0>; | |
| thermal-sensors = <&pmk8350_adc_tm 0x347>; | |
| status = "disabled"; | |
| trips { | |
| active-config0 { | |
| hysteresis = <0x3E8>; | |
| temperature = <0x1E848>; | |
| type = "passive"; | |
| }; | |
| active-config1 { | |
| hysteresis = <0x3E8>; | |
| temperature = <0x1E848>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| hot-pock-therm { | |
| polling-delay = <0x0>; | |
| polling-delay-passive = <0x0>; | |
| thermal-sensors = <&pmk8350_adc_tm 0x146>; | |
| status = "disabled"; | |
| trips { | |
| active-config0 { | |
| hysteresis = <0x3E8>; | |
| temperature = <0x1E848>; | |
| type = "passive"; | |
| }; | |
| active-config1 { | |
| hysteresis = <0x3E8>; | |
| temperature = <0x1E848>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| mchg-therm { | |
| polling-delay = <0x0>; | |
| polling-delay-passive = <0x0>; | |
| thermal-sensors = <&pmk8350_adc_tm 0x347>; | |
| trips { | |
| active-config0 { | |
| hysteresis = <0x3E8>; | |
| temperature = <0x1E848>; | |
| type = "passive"; | |
| }; | |
| active-config1 { | |
| hysteresis = <0x3E8>; | |
| temperature = <0x1E848>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| msm-therm { | |
| polling-delay = <0x0>; | |
| polling-delay-passive = <0x0>; | |
| thermal-sensors = <&pmk8350_adc_tm 0x144>; | |
| trips { | |
| active-config0 { | |
| hysteresis = <0x3E8>; | |
| temperature = <0x1E848>; | |
| type = "passive"; | |
| }; | |
| active-config1 { | |
| hysteresis = <0x3E8>; | |
| temperature = <0x1E848>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| pa { | |
| status = "disabled"; | |
| }; | |
| pa-therm0 { | |
| polling-delay = <0x0>; | |
| polling-delay-passive = <0x0>; | |
| thermal-sensors = <&qmi_sensor 0x0>; | |
| trips { | |
| thermal-engine-config0 { | |
| hysteresis = <0x3E8>; | |
| temperature = <0x1E848>; | |
| type = "passive"; | |
| }; | |
| thermal-hal-config0 { | |
| hysteresis = <0x3E8>; | |
| temperature = <0x1E848>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| pa-therm1 { | |
| polling-delay = <0x0>; | |
| polling-delay-passive = <0x0>; | |
| thermal-sensors = <&qmi_sensor 0x1>; | |
| trips { | |
| thermal-engine-config0 { | |
| hysteresis = <0x3E8>; | |
| temperature = <0x1E848>; | |
| type = "passive"; | |
| }; | |
| thermal-hal-config0 { | |
| hysteresis = <0x3E8>; | |
| temperature = <0x1E848>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| pa1 { | |
| status = "disabled"; | |
| }; | |
| pm8010i_tz { | |
| polling-delay = <0x0>; | |
| polling-delay-passive = <0x64>; | |
| thermal-governor = "step_wise"; | |
| thermal-sensors = <&pm8010i_tz>; | |
| trips { | |
| trip0 { | |
| hysteresis = <0x0>; | |
| temperature = <0x17318>; | |
| type = "passive"; | |
| }; | |
| trip1 { | |
| hysteresis = <0x0>; | |
| temperature = <0x1C138>; | |
| type = "critical"; | |
| }; | |
| trip2 { | |
| hysteresis = <0x0>; | |
| temperature = <0x23668>; | |
| type = "critical"; | |
| }; | |
| }; | |
| }; | |
| pm8010j_tz { | |
| polling-delay = <0x0>; | |
| polling-delay-passive = <0x64>; | |
| thermal-governor = "step_wise"; | |
| thermal-sensors = <&pm8010j_tz>; | |
| trips { | |
| trip0 { | |
| hysteresis = <0x0>; | |
| temperature = <0x17318>; | |
| type = "passive"; | |
| }; | |
| trip1 { | |
| hysteresis = <0x0>; | |
| temperature = <0x1C138>; | |
| type = "critical"; | |
| }; | |
| trip2 { | |
| hysteresis = <0x0>; | |
| temperature = <0x23668>; | |
| type = "critical"; | |
| }; | |
| }; | |
| }; | |
| pm8350_tz { | |
| polling-delay = <0x0>; | |
| polling-delay-passive = <0x64>; | |
| thermal-governor = "step_wise"; | |
| thermal-sensors = <&pm8350_tz>; | |
| cooling-maps { | |
| pm8350_apc1 { | |
| cooling-device = <&APC1_pause 0x1 0x1>; | |
| trip = <&pm8350_trip0>; | |
| }; | |
| pm8350_cpu4_freq { | |
| cooling-device = <&CPU4 0xF 0xFFFFFFFF>; | |
| trip = <&pm8350_trip0>; | |
| }; | |
| pm8350_cpu7_freq { | |
| cooling-device = <&CPU7 0xF 0xFFFFFFFF>; | |
| trip = <&pm8350_trip0>; | |
| }; | |
| pm8350_gpu { | |
| cooling-device = <&msm_gpu 0x7 0xFFFFFFFF>; | |
| trip = <&pm8350_trip0>; | |
| }; | |
| }; | |
| trips { | |
| pm8350_trip0: trip0 { | |
| hysteresis = <0x0>; | |
| temperature = <0x17318>; | |
| type = "passive"; | |
| }; | |
| pm8350_trip1: trip1 { | |
| hysteresis = <0x0>; | |
| temperature = <0x1C138>; | |
| type = "critical"; | |
| }; | |
| pm8350_trip2: trip2 { | |
| hysteresis = <0x0>; | |
| temperature = <0x23668>; | |
| type = "critical"; | |
| }; | |
| }; | |
| }; | |
| pm8350b-bcl-lvl0 { | |
| polling-delay = <0x0>; | |
| polling-delay-passive = <0x64>; | |
| thermal-sensors = <&pm8350b_bcl 0x5>; | |
| cooling-maps { | |
| vbat_cdsp0 { | |
| cooling-device = <&cdsp_sw 0x2 0x2>; | |
| trip = <&b_bcl_lvl0>; | |
| }; | |
| vbat_cpu_5 { | |
| cooling-device = <&cpu5_pause 0x1 0x1>; | |
| trip = <&b_bcl_lvl0>; | |
| }; | |
| vbat_gpu0 { | |
| cooling-device = <&msm_gpu 0x2 0x2>; | |
| trip = <&b_bcl_lvl0>; | |
| }; | |
| vbat_lte0 { | |
| cooling-device = <&modem_lte_dsc 0x8 0x8>; | |
| trip = <&b_bcl_lvl0>; | |
| }; | |
| vbat_nr0 { | |
| cooling-device = <&modem_nr_dsc 0x6 0x6>; | |
| trip = <&b_bcl_lvl0>; | |
| }; | |
| vbat_nr0_scg { | |
| cooling-device = <&modem_nr_scg_dsc 0x3 0x3>; | |
| trip = <&b_bcl_lvl0>; | |
| }; | |
| }; | |
| trips { | |
| b_bcl_lvl0: b-bcl-lvl0 { | |
| hysteresis = <0x1>; | |
| temperature = <0x1>; | |
| type = "passive"; | |
| }; | |
| thermal-engine-trip { | |
| hysteresis = <0x0>; | |
| temperature = <0x64>; | |
| type = "passive"; | |
| }; | |
| thermal-hal-trip { | |
| hysteresis = <0x0>; | |
| temperature = <0x64>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| pm8350b-bcl-lvl1 { | |
| polling-delay = <0x0>; | |
| polling-delay-passive = <0x64>; | |
| thermal-sensors = <&pm8350b_bcl 0x6>; | |
| cooling-maps { | |
| vbat_cdsp1 { | |
| cooling-device = <&cdsp_sw 0x4 0x4>; | |
| trip = <&b_bcl_lvl1>; | |
| }; | |
| vbat_cpu_6_7 { | |
| cooling-device = <&cpu_6_7_pause 0x1 0x1>; | |
| trip = <&b_bcl_lvl1>; | |
| }; | |
| vbat_gpu1 { | |
| cooling-device = <&msm_gpu 0x4 0x4>; | |
| trip = <&b_bcl_lvl1>; | |
| }; | |
| vbat_lte1 { | |
| cooling-device = <&modem_lte_dsc 0xA 0xA>; | |
| trip = <&b_bcl_lvl1>; | |
| }; | |
| vbat_nr1 { | |
| cooling-device = <&modem_nr_dsc 0x9 0x9>; | |
| trip = <&b_bcl_lvl1>; | |
| }; | |
| vbat_nr1_scg { | |
| cooling-device = <&modem_nr_scg_dsc 0xA 0xA>; | |
| trip = <&b_bcl_lvl1>; | |
| }; | |
| }; | |
| trips { | |
| b_bcl_lvl1: b-bcl-lvl1 { | |
| hysteresis = <0x1>; | |
| temperature = <0x1>; | |
| type = "passive"; | |
| }; | |
| thermal-engine-trip { | |
| hysteresis = <0x0>; | |
| temperature = <0x64>; | |
| type = "passive"; | |
| }; | |
| thermal-hal-trip { | |
| hysteresis = <0x0>; | |
| temperature = <0x64>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| pm8350b-bcl-lvl2 { | |
| polling-delay = <0x0>; | |
| polling-delay-passive = <0x64>; | |
| thermal-sensors = <&pm8350b_bcl 0x7>; | |
| cooling-maps { | |
| vbat_cdsp2 { | |
| cooling-device = <&cdsp_sw 0x5 0xFFFFFFFF>; | |
| trip = <&b_bcl_lvl2>; | |
| }; | |
| vbat_gpu2 { | |
| cooling-device = <&msm_gpu 0x7 0xFFFFFFFF>; | |
| trip = <&b_bcl_lvl2>; | |
| }; | |
| }; | |
| trips { | |
| b_bcl_lvl2: b-bcl-lvl2 { | |
| hysteresis = <0x1>; | |
| temperature = <0x1>; | |
| type = "passive"; | |
| }; | |
| thermal-engine-trip { | |
| hysteresis = <0x0>; | |
| temperature = <0x64>; | |
| type = "passive"; | |
| }; | |
| thermal-hal-trip { | |
| hysteresis = <0x0>; | |
| temperature = <0x64>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| pm8350b-ibat-lvl0 { | |
| polling-delay = <0x0>; | |
| polling-delay-passive = <0x0>; | |
| thermal-sensors = <&pm8350b_bcl 0x0>; | |
| trips { | |
| ibat_lvl0: ibat-lvl0 { | |
| hysteresis = <0xC8>; | |
| temperature = <0x2328>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| pm8350b-ibat-lvl1 { | |
| polling-delay = <0x0>; | |
| polling-delay-passive = <0x0>; | |
| thermal-sensors = <&pm8350b_bcl 0x1>; | |
| trips { | |
| ibat_lvl1: ibat-lvl1 { | |
| hysteresis = <0xC8>; | |
| temperature = <0x2710>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| pm8350b_temp_alarm: pm8350b_tz { | |
| polling-delay = <0x0>; | |
| polling-delay-passive = <0x64>; | |
| thermal-sensors = <&pm8350b_tz>; | |
| trips { | |
| pm8350b_trip0: trip0 { | |
| hysteresis = <0x0>; | |
| temperature = <0x17318>; | |
| type = "passive"; | |
| }; | |
| pm8350b_trip1: trip1 { | |
| hysteresis = <0x0>; | |
| temperature = <0x1C138>; | |
| type = "critical"; | |
| }; | |
| pm8350b_trip2: trip2 { | |
| hysteresis = <0x0>; | |
| temperature = <0x23668>; | |
| type = "critical"; | |
| }; | |
| }; | |
| }; | |
| pm8350c-bcl-lvl0 { | |
| polling-delay = <0x0>; | |
| polling-delay-passive = <0x64>; | |
| thermal-governor = "step_wise"; | |
| thermal-sensors = <&pm8350c_bcl 0x5>; | |
| cooling-maps { | |
| vph_cdsp0 { | |
| cooling-device = <&cdsp_sw 0x2 0x2>; | |
| trip = <&c_bcl_lvl0>; | |
| }; | |
| vph_cpu_5 { | |
| cooling-device = <&cpu5_pause 0x1 0x1>; | |
| trip = <&c_bcl_lvl0>; | |
| }; | |
| vph_gpu0 { | |
| cooling-device = <&msm_gpu 0x2 0x2>; | |
| trip = <&c_bcl_lvl0>; | |
| }; | |
| vph_lte0 { | |
| cooling-device = <&modem_lte_dsc 0x8 0x8>; | |
| trip = <&c_bcl_lvl0>; | |
| }; | |
| vph_nr0 { | |
| cooling-device = <&modem_nr_dsc 0x6 0x6>; | |
| trip = <&c_bcl_lvl0>; | |
| }; | |
| vph_nr0_scg { | |
| cooling-device = <&modem_nr_scg_dsc 0x3 0x3>; | |
| trip = <&c_bcl_lvl0>; | |
| }; | |
| }; | |
| trips { | |
| c_bcl_lvl0: c-bcl-lvl0 { | |
| hysteresis = <0x1>; | |
| temperature = <0x1>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| pm8350c-bcl-lvl1 { | |
| polling-delay = <0x0>; | |
| polling-delay-passive = <0x64>; | |
| thermal-governor = "step_wise"; | |
| thermal-sensors = <&pm8350c_bcl 0x6>; | |
| cooling-maps { | |
| vph_cdsp1 { | |
| cooling-device = <&cdsp_sw 0x4 0x4>; | |
| trip = <&c_bcl_lvl1>; | |
| }; | |
| vph_cpu_6_7 { | |
| cooling-device = <&cpu_6_7_pause 0x1 0x1>; | |
| trip = <&c_bcl_lvl1>; | |
| }; | |
| vph_gpu1 { | |
| cooling-device = <&msm_gpu 0x4 0x4>; | |
| trip = <&c_bcl_lvl1>; | |
| }; | |
| vph_lte1 { | |
| cooling-device = <&modem_lte_dsc 0xA 0xA>; | |
| trip = <&c_bcl_lvl1>; | |
| }; | |
| vph_nr1 { | |
| cooling-device = <&modem_nr_dsc 0x9 0x9>; | |
| trip = <&c_bcl_lvl1>; | |
| }; | |
| vph_nr1_scg { | |
| cooling-device = <&modem_nr_scg_dsc 0xA 0xA>; | |
| trip = <&c_bcl_lvl1>; | |
| }; | |
| }; | |
| trips { | |
| c_bcl_lvl1: c-bcl-lvl1 { | |
| hysteresis = <0x1>; | |
| temperature = <0x1>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| pm8350c-bcl-lvl2 { | |
| polling-delay = <0x0>; | |
| polling-delay-passive = <0x64>; | |
| thermal-governor = "step_wise"; | |
| thermal-sensors = <&pm8350c_bcl 0x7>; | |
| cooling-maps { | |
| vph_cdsp2 { | |
| cooling-device = <&cdsp_sw 0x5 0xFFFFFFFF>; | |
| trip = <&c_bcl_lvl2>; | |
| }; | |
| vph_gpu2 { | |
| cooling-device = <&msm_gpu 0x7 0xFFFFFFFF>; | |
| trip = <&c_bcl_lvl2>; | |
| }; | |
| }; | |
| trips { | |
| c_bcl_lvl2: c-bcl-lvl2 { | |
| hysteresis = <0x1>; | |
| temperature = <0x1>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| pm8350c_tz { | |
| polling-delay = <0x0>; | |
| polling-delay-passive = <0x64>; | |
| thermal-governor = "step_wise"; | |
| thermal-sensors = <&pm8350c_tz>; | |
| cooling-maps { | |
| pm8350c_lte { | |
| cooling-device = <&modem_lte_dsc 0xFF 0xFF>; | |
| trip = <&pm8350c_trip0>; | |
| }; | |
| pm8350c_nr { | |
| cooling-device = <&modem_nr_scg_dsc 0xFF 0xFF>; | |
| trip = <&pm8350c_trip0>; | |
| }; | |
| pm8350c_nsp { | |
| cooling-device = <&cdsp_sw 0x5 0xFFFFFFFF>; | |
| trip = <&pm8350c_trip0>; | |
| }; | |
| }; | |
| trips { | |
| pm8350c_trip0: trip0 { | |
| hysteresis = <0x0>; | |
| temperature = <0x17318>; | |
| type = "passive"; | |
| }; | |
| pm8350c_trip1: trip1 { | |
| hysteresis = <0x0>; | |
| temperature = <0x1C138>; | |
| type = "critical"; | |
| }; | |
| pm8350c_trip2: trip2 { | |
| hysteresis = <0x0>; | |
| temperature = <0x23668>; | |
| type = "critical"; | |
| }; | |
| }; | |
| }; | |
| pm8450_temp_alarm: pm8450_tz { | |
| polling-delay = <0x0>; | |
| polling-delay-passive = <0x64>; | |
| thermal-governor = "step_wise"; | |
| thermal-sensors = <&pm8450_tz>; | |
| trips { | |
| pm8450_trip0: trip0 { | |
| hysteresis = <0x0>; | |
| temperature = <0x17318>; | |
| type = "passive"; | |
| }; | |
| pm8450_trip1: trip1 { | |
| hysteresis = <0x0>; | |
| temperature = <0x1C138>; | |
| type = "critical"; | |
| }; | |
| pm8450_trip2: trip2 { | |
| hysteresis = <0x0>; | |
| temperature = <0x23668>; | |
| type = "critical"; | |
| }; | |
| }; | |
| cooling-maps { | |
| pm8450_apc1 { | |
| cooling-device = <&APC1_pause 0x1 0x1>; | |
| trip = <&pm8450_trip0>; | |
| }; | |
| pm8450_cpu4_freq { | |
| cooling-device = <&CPU4 0xF 0xFFFFFFFF>; | |
| trip = <&pm8450_trip0>; | |
| }; | |
| pm8450_cpu7_freq { | |
| cooling-device = <&CPU7 0xF 0xFFFFFFFF>; | |
| trip = <&pm8450_trip0>; | |
| }; | |
| }; | |
| }; | |
| pmr735a_temp_alarm: pmr735a_tz { | |
| polling-delay = <0x0>; | |
| polling-delay-passive = <0x64>; | |
| thermal-governor = "step_wise"; | |
| thermal-sensors = <&pmr735a_tz>; | |
| trips { | |
| pmr735a_trip0: trip0 { | |
| hysteresis = <0x0>; | |
| temperature = <0x17318>; | |
| type = "passive"; | |
| }; | |
| pmr735a_trip1: trip1 { | |
| hysteresis = <0x0>; | |
| temperature = <0x1C138>; | |
| type = "passive"; | |
| }; | |
| pmr735a_trip2: trip2 { | |
| hysteresis = <0x0>; | |
| temperature = <0x23668>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| pmr735b_temp_alarm: pmr735b_tz { | |
| polling-delay = <0x0>; | |
| polling-delay-passive = <0x64>; | |
| thermal-governor = "step_wise"; | |
| thermal-sensors = <&pmr735b_tz>; | |
| trips { | |
| pmr735b_trip0: trip0 { | |
| hysteresis = <0x0>; | |
| temperature = <0x17318>; | |
| type = "passive"; | |
| }; | |
| pmr735b_trip1: trip1 { | |
| hysteresis = <0x0>; | |
| temperature = <0x1C138>; | |
| type = "passive"; | |
| }; | |
| pmr735b_trip2: trip2 { | |
| hysteresis = <0x0>; | |
| temperature = <0x23668>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| quiet-therm { | |
| polling-delay = <0x0>; | |
| polling-delay-passive = <0x0>; | |
| thermal-sensors = <&pmk8350_adc_tm 0x147>; | |
| trips { | |
| active-config0 { | |
| hysteresis = <0x3E8>; | |
| temperature = <0x1E848>; | |
| type = "passive"; | |
| }; | |
| active-config1 { | |
| hysteresis = <0x3E8>; | |
| temperature = <0x1E848>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| rear-cam-therm { | |
| polling-delay = <0x0>; | |
| polling-delay-passive = <0x0>; | |
| thermal-sensors = <&pmk8350_adc_tm 0x147>; | |
| status = "disabled"; | |
| trips { | |
| active-config0 { | |
| hysteresis = <0x3E8>; | |
| temperature = <0x1E848>; | |
| type = "passive"; | |
| }; | |
| active-config1 { | |
| hysteresis = <0x3E8>; | |
| temperature = <0x1E848>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| schg-therm { | |
| polling-delay = <0x0>; | |
| polling-delay-passive = <0x0>; | |
| thermal-sensors = <&pmk8350_adc_tm 0x145>; | |
| trips { | |
| active-config0 { | |
| hysteresis = <0x3E8>; | |
| temperature = <0x1E848>; | |
| type = "passive"; | |
| }; | |
| active-config1 { | |
| hysteresis = <0x3E8>; | |
| temperature = <0x1E848>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| sdr-mmw-therm { | |
| status = "disabled"; | |
| }; | |
| skin-msm-therm { | |
| polling-delay = <0x0>; | |
| polling-delay-passive = <0x0>; | |
| thermal-sensors = <&pmk8350_adc_tm 0x144>; | |
| status = "disabled"; | |
| trips { | |
| active-config0 { | |
| hysteresis = <0x3E8>; | |
| temperature = <0x1E848>; | |
| type = "passive"; | |
| }; | |
| active-config1 { | |
| hysteresis = <0x3E8>; | |
| temperature = <0x1E848>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| socd { | |
| polling-delay = <0x0>; | |
| polling-delay-passive = <0x64>; | |
| thermal-sensors = <&bcl_soc>; | |
| trips { | |
| socd_trip: socd-trip { | |
| hysteresis = <0x0>; | |
| temperature = <0x5F>; | |
| type = "passive"; | |
| }; | |
| thermal-engine-trip { | |
| hysteresis = <0x0>; | |
| temperature = <0x64>; | |
| type = "passive"; | |
| }; | |
| thermal-hal-trip { | |
| hysteresis = <0x0>; | |
| temperature = <0x64>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| tof-therm { | |
| polling-delay = <0x0>; | |
| polling-delay-passive = <0x0>; | |
| thermal-sensors = <&pmk8350_adc_tm 0x148>; | |
| status = "disabled"; | |
| trips { | |
| active-config0 { | |
| hysteresis = <0x3E8>; | |
| temperature = <0x1E848>; | |
| type = "passive"; | |
| }; | |
| active-config1 { | |
| hysteresis = <0x3E8>; | |
| temperature = <0x1E848>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| wchg-therm { | |
| polling-delay = <0x0>; | |
| polling-delay-passive = <0x0>; | |
| thermal-sensors = <&pmk8350_adc_tm 0x34B>; | |
| trips { | |
| active-config0 { | |
| hysteresis = <0x3E8>; | |
| temperature = <0x1E848>; | |
| type = "passive"; | |
| }; | |
| active-config1 { | |
| hysteresis = <0x3E8>; | |
| temperature = <0x1E848>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| wifi-therm { | |
| polling-delay = <0x0>; | |
| polling-delay-passive = <0x0>; | |
| thermal-sensors = <&qmi_sensor 0x1D>; | |
| trips { | |
| thermal-engine-config0 { | |
| hysteresis = <0x3E8>; | |
| temperature = <0x1E848>; | |
| type = "passive"; | |
| }; | |
| thermal-hal-config0 { | |
| hysteresis = <0x3E8>; | |
| temperature = <0x1E848>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| wlc-therm { | |
| polling-delay = <0x0>; | |
| polling-delay-passive = <0x0>; | |
| thermal-sensors = <&pmk8350_adc_tm 0x34B>; | |
| status = "disabled"; | |
| trips { | |
| active-config0 { | |
| hysteresis = <0x3E8>; | |
| temperature = <0x1E848>; | |
| type = "passive"; | |
| }; | |
| active-config1 { | |
| hysteresis = <0x3E8>; | |
| temperature = <0x1E848>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| xo-therm { | |
| polling-delay = <0x0>; | |
| polling-delay-passive = <0x0>; | |
| thermal-sensors = <&pmk8350_adc_tm 0x44>; | |
| trips { | |
| active-config0 { | |
| hysteresis = <0x3E8>; | |
| temperature = <0x1E848>; | |
| type = "passive"; | |
| }; | |
| active-config1 { | |
| hysteresis = <0x3E8>; | |
| temperature = <0x1E848>; | |
| type = "passive"; | |
| }; | |
| display_test_config1: display-test-config1 { | |
| hysteresis = <0x3E8>; | |
| temperature = <0x1E848>; | |
| type = "passive"; | |
| }; | |
| display_test_config2: display-test-config2 { | |
| hysteresis = <0x3E8>; | |
| temperature = <0x1E848>; | |
| type = "passive"; | |
| }; | |
| display_test_config3: display-test-config3 { | |
| hysteresis = <0x3E8>; | |
| temperature = <0x1E848>; | |
| type = "passive"; | |
| }; | |
| display_test_config4: display-test-config4 { | |
| hysteresis = <0x3E8>; | |
| temperature = <0x1E848>; | |
| type = "passive"; | |
| }; | |
| xo_config0: xo-config0 { | |
| hysteresis = <0x1F40>; | |
| temperature = <0x157C0>; | |
| type = "passive"; | |
| }; | |
| xo_config1: xo-config1 { | |
| hysteresis = <0x2710>; | |
| temperature = <0x15F90>; | |
| type = "passive"; | |
| }; | |
| xo_config2: xo-config2 { | |
| hysteresis = <0x2710>; | |
| temperature = <0x186A0>; | |
| type = "critical"; | |
| }; | |
| }; | |
| cooling-maps { | |
| apc1_cdev { | |
| cooling-device = <&APC1_pause 0x1 0x1>; | |
| trip = <&xo_config0>; | |
| }; | |
| cdsp_cdev { | |
| cooling-device = <&cdsp_sw 0x5 0xFFFFFFFF>; | |
| trip = <&xo_config0>; | |
| }; | |
| cpu4_freq_cdev { | |
| cooling-device = <&CPU4 0xF 0xFFFFFFFF>; | |
| trip = <&xo_config0>; | |
| }; | |
| cpu5_hot_cdev { | |
| cooling-device = <&cpu5_hotplug 0x1 0x1>; | |
| trip = <&xo_config1>; | |
| }; | |
| cpu6_hot_cdev { | |
| cooling-device = <&cpu6_hotplug 0x1 0x1>; | |
| trip = <&xo_config1>; | |
| }; | |
| cpu7_freq_cdev { | |
| cooling-device = <&CPU7 0xF 0xFFFFFFFF>; | |
| trip = <&xo_config0>; | |
| }; | |
| cpu7_hot_cdev { | |
| cooling-device = <&cpu7_hotplug 0x1 0x1>; | |
| trip = <&xo_config1>; | |
| }; | |
| display_cdev1 { | |
| cooling-device = <&display_fps 0x1 0x1>; | |
| trip = <&display_test_config1>; | |
| }; | |
| display_cdev2 { | |
| cooling-device = <&display_fps 0x2 0x2>; | |
| trip = <&display_test_config2>; | |
| }; | |
| display_cdev3 { | |
| cooling-device = <&display_fps 0x3 0x3>; | |
| trip = <&display_test_config3>; | |
| }; | |
| display_cdev4 { | |
| cooling-device = <&display_fps 0x4 0x4>; | |
| trip = <&display_test_config4>; | |
| }; | |
| gpu_cdev { | |
| cooling-device = <&msm_gpu 0x7 0xFFFFFFFF>; | |
| trip = <&xo_config0>; | |
| }; | |
| lte_cdev { | |
| cooling-device = <&modem_lte_dsc 0xFF 0xFF>; | |
| trip = <&xo_config2>; | |
| }; | |
| nr_cdev { | |
| cooling-device = <&modem_nr_scg_dsc 0xFF 0xFF>; | |
| trip = <&xo_config2>; | |
| }; | |
| }; | |
| }; | |
| }; | |
| &tlmm { | |
| cam_afvdd_tele_en_default: cam_afvdd_tele_en_default { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| pins = "gpio23"; | |
| }; | |
| mux { | |
| function = "gpio"; | |
| pins = "gpio23"; | |
| }; | |
| }; | |
| cam_avdd_front_en_default: cam_avdd_front_en_default { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| pins = "gpio10"; | |
| }; | |
| mux { | |
| function = "gpio"; | |
| pins = "gpio10"; | |
| }; | |
| }; | |
| cam_avdd_tele_en_default: cam_avdd_tele_en_default { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| pins = "gpio68"; | |
| }; | |
| mux { | |
| function = "gpio"; | |
| pins = "gpio68"; | |
| }; | |
| }; | |
| cam_dvdd_front_en_default: cam_dvdd_front_en_default { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| pins = "gpio11"; | |
| }; | |
| mux { | |
| function = "gpio"; | |
| pins = "gpio11"; | |
| }; | |
| }; | |
| display_panel_avdd_default: display_panel_avdd_default { | |
| config { | |
| bias-disable = <0x0>; | |
| drive-strength = <0x8>; | |
| output-high; | |
| pins = "gpio186"; | |
| }; | |
| mux { | |
| function = "gpio"; | |
| pins = "gpio186"; | |
| }; | |
| }; | |
| fingerfp_irq_active: fingerfp_irq_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x2>; | |
| input-enable; | |
| pins = "gpio40"; | |
| }; | |
| mux { | |
| function = "gpio"; | |
| pins = "gpio40"; | |
| }; | |
| }; | |
| fingerfp_rst_high: fingerfp_rst_high { | |
| config { | |
| bias--pull-down; | |
| drive-strength = <0x2>; | |
| output-high; | |
| pins = "gpio42"; | |
| }; | |
| mux { | |
| function = "gpio"; | |
| pins = "gpio42"; | |
| }; | |
| }; | |
| fingerfp_rst_low: fingerfp_rst_low { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x2>; | |
| output-low; | |
| pins = "gpio42"; | |
| }; | |
| mux { | |
| function = "gpio"; | |
| pins = "gpio42"; | |
| }; | |
| }; | |
| pmic_en_default: pmic_en_default { | |
| config { | |
| bias-pull-up; | |
| drive-strength = <0x2>; | |
| output-high; | |
| pins = "gpio6"; | |
| }; | |
| mux { | |
| function = "gpio"; | |
| pins = "gpio6"; | |
| }; | |
| }; | |
| pmx_sde: pmx_sde { | |
| sde_dsi1_active: sde_dsi1_active { | |
| config { | |
| bias-disable = <0x0>; | |
| drive-strength = <0x8>; | |
| pins = "gpio4"; | |
| }; | |
| mux { | |
| function = "gpio"; | |
| pins = "gpio4"; | |
| }; | |
| }; | |
| sde_dsi1_suspend: sde_dsi1_suspend { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| pins = "gpio4"; | |
| }; | |
| mux { | |
| function = "gpio"; | |
| pins = "gpio4"; | |
| }; | |
| }; | |
| sde_dsi_active: sde_dsi_active { | |
| config { | |
| bias-disable = <0x0>; | |
| drive-strength = <0x8>; | |
| pins = "gpio0"; | |
| }; | |
| mux { | |
| function = "gpio"; | |
| pins = "gpio0"; | |
| }; | |
| }; | |
| sde_dsi_suspend: sde_dsi_suspend { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| pins = "gpio0"; | |
| }; | |
| mux { | |
| function = "gpio"; | |
| pins = "gpio0"; | |
| }; | |
| }; | |
| }; | |
| pmx_sde_te: pmx_sde_te { | |
| sde_te1_active: sde_te1_active { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| pins = "gpio87"; | |
| }; | |
| mux { | |
| function = "mdp_vsync"; | |
| pins = "gpio87"; | |
| }; | |
| }; | |
| sde_te1_suspend: sde_te1_suspend { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| pins = "gpio87"; | |
| }; | |
| mux { | |
| function = "mdp_vsync"; | |
| pins = "gpio87"; | |
| }; | |
| }; | |
| sde_te_active: sde_te_active { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| pins = "gpio86"; | |
| }; | |
| mux { | |
| function = "mdp_vsync"; | |
| pins = "gpio86"; | |
| }; | |
| }; | |
| sde_te_suspend: sde_te_suspend { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| pins = "gpio86"; | |
| }; | |
| mux { | |
| function = "mdp_vsync"; | |
| pins = "gpio86"; | |
| }; | |
| }; | |
| }; | |
| qupv3_se8_spi_active: qupv3_se8_spi_active { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x6>; | |
| pins = "gpio28", "gpio29", "gpio30", "gpio31"; | |
| }; | |
| mux { | |
| function = "qup8"; | |
| pins = "gpio28", "gpio29", "gpio30", "gpio31"; | |
| }; | |
| }; | |
| qupv3_se8_spi_sleep: qupv3_se8_spi_sleep { | |
| config { | |
| bias-pull-down; | |
| drive-strength = <0x6>; | |
| input-enable; | |
| pins = "gpio28", "gpio29", "gpio30", "gpio31"; | |
| }; | |
| mux { | |
| function = "gpio"; | |
| pins = "gpio28", "gpio29", "gpio30", "gpio31"; | |
| }; | |
| }; | |
| redriver_disable: redriver_disable { | |
| config { | |
| drive-strength = <0x2>; | |
| output-low; | |
| pins = "gpio19"; | |
| }; | |
| mux { | |
| function = "gpio"; | |
| pins = "gpio19"; | |
| }; | |
| }; | |
| redriver_enable: redriver_enable { | |
| config { | |
| bias-disable; | |
| drive-strength = <0x2>; | |
| output-high; | |
| pins = "gpio19"; | |
| }; | |
| mux { | |
| function = "gpio"; | |
| pins = "gpio19"; | |
| }; | |
| }; | |
| sar_int_default: sar_int_default { | |
| config { | |
| bias-pull-up; | |
| drive-strength = <0x2>; | |
| num-grp-pins = <0x1>; | |
| pins = "gpio66"; | |
| }; | |
| mux { | |
| function = "gpio"; | |
| pins = "gpio66"; | |
| }; | |
| }; | |
| sar_int_sleep: sar_int_sleep { | |
| config { | |
| bias-pull-up; | |
| drive-strength = <0x2>; | |
| num-grp-pins = <0x1>; | |
| pins = "gpio66"; | |
| }; | |
| mux { | |
| function = "gpio"; | |
| pins = "gpio66"; | |
| }; | |
| }; | |
| }; | |
| &ucsi { | |
| connector { | |
| port { | |
| usb_port0_connector: endpoint { | |
| remote-endpoint = <&usb_port0>; | |
| }; | |
| }; | |
| }; | |
| }; | |
| &ufshc_mem { | |
| qcom,vddp-ref-clk-max-microamp = <0x64>; | |
| qcom,vddp-ref-clk-supply = <&L9B>; | |
| status = "ok"; | |
| vcc-max-microamp = <0x10C8E0>; | |
| vcc-supply = <&L7B>; | |
| vccq-max-microamp = <0x124F80>; | |
| vccq-supply = <&L9B>; | |
| vdd-hba-supply = <&gcc_ufs_phy_gdsc>; | |
| }; | |
| &ufsphy_mem { | |
| compatible = "qcom,ufs-phy-qmp-v4-cape"; | |
| status = "ok"; | |
| vdda-phy-max-microamp = <0x30188>; | |
| vdda-phy-supply = <&L5B>; | |
| vdda-pll-max-microamp = <0x5C94>; | |
| vdda-pll-supply = <&L10C>; | |
| }; | |
| &usb0 { | |
| ssusb_redriver = <&redriver>; | |
| usb-role-switch; | |
| dwc3@a600000 { | |
| usb-role-switch; | |
| }; | |
| port { | |
| usb_port0: endpoint { | |
| remote-endpoint = <&usb_port0_connector>; | |
| }; | |
| }; | |
| }; | |
| &utags { | |
| compatible = "mmi,utags"; | |
| mmi,backup-utags = "/dev/block/bootdevice/by-name/utagsBackup"; | |
| mmi,main-utags = "/dev/block/bootdevice/by-name/utags"; | |
| }; | |
| &va_cdc_dma_0_tx { | |
| qcom,msm-dai-is-island-supported = <0x1>; | |
| }; | |
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