Created
April 23, 2023 08:57
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fix open ocd flashing issue on cc3220sf
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cat sysroots/x86_64-pokysdk-linux/usr/share/openocd/scripts/target/ti_cc3220sf.cfg | |
File: sysroots/x86_64-pokysdk-linux/usr/share/openocd/scripts/target/ti_cc3220sf.cfg | |
# | |
# Texas Instruments CC3220SF - ARM Cortex-M4 | |
# | |
# http://www.ti.com/CC3220SF | |
# | |
source [find target/swj-dp.tcl] | |
source [find target/icepick.cfg] | |
source [find target/ti_cc32xx.cfg] | |
set _FLASHNAME $_CHIPNAME.flash | |
flash bank $_FLASHNAME cc3220sf 0 0 0 0 $_TARGETNAME | |
# | |
# On CC32xx family of devices, sysreqreset is disabled, and vectreset is | |
# blocked by the boot loader (stops in a while(1) statement). srst reset can | |
# leave the target in a state that prevents debug. The following uses the | |
# soft_reset_halt command to reset and halt the target. Then the PC and stack | |
# are initialized from internal flash. This allows for a more reliable reset, | |
# but with two caveats: it only works for the SF variant that has internal | |
# flash, and it only resets the CPU and not any peripherals. | |
# | |
proc ocd_process_reset_inner { MODE } { | |
soft_reset_halt | |
halt | |
# Initialize MSP, PSP, and PC from vector table at flash 0x01000800 | |
set boot [read_memory 0x01000800 32 2] | |
reg msp [lindex $boot 0] | |
reg psp [lindex $boot 0] | |
reg pc [lindex $boot 1] | |
if { 0 == [string compare $MODE run ] } { | |
resume | |
} | |
cc32xx.cpu invoke-event reset-end | |
} |
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