This Makefile is used in most of my projects. It's simple, easy to modify and is legible.

simple-makefile-v1.0.mk

# Copyright (c) 2020 Edwin Pratt
# Licenced under the MIT Licence

# Example project structure
# awesome_project
# |---Makefile
# |---README.md
# |---bin
# |   |---[empty for Makefile]
# |---obj
# |   |---[empty for Makefile]
# |---src
# |   |---main.c
# |   |---includes.h
# |   |---mod1
# |   |   |---mod1.c
# |   |   |---mod1.h
# |   |---mod2
# |   |   |---mod2.c
# |   |   |---mod2.h

# Is this a debug build?
# 1 = true
# 0 = false
DEBUG = 1

# The compiler been used
CC = gcc

# File extensions
SRC_EXT = c

# Final executable name
EXEC_NAME = main

# Directories
BIN_DIRS = ./bin
OBJ_DIRS = ./obj
SRC_DIRS = ./src ./src/mod1 ./src/mod2

# Flags
DFLAGS = -g
EFLAGS = -Wall -Werror -Wextra
IFLAGS = $(foreach dir, $(SRC_DIRS), -I$(dir))
CFLAGS = $(EFLAGS) $(IFLAGS)

# If we're doing a debug build, add the debug flags (DFLAGS) to the compile flags (CFLAGS)
ifeq ($(DEBUG), 1)
    CFLAGS += $(DFLAGS)
endif

# Easier to write compile statement
CMD = $(CC) $(CFLAGS)

# Compile main binary file
$(BIN_DIRS)/$(EXEC_NAME): compile_obj_files
    $(CMD) -o $@ $(OBJ_DIRS)/*.o

# Compile all object files
compile_obj_files: $(foreach dir, $(SRC_DIRS), $(wildcard $(dir)/*.$(SRC_EXT)))
    $(CMD) -c $^
    mv ./*.o $(OBJ_DIRS)

# Clean old binary files and object files
clean:
    rm -fvr $(BIN_DIRS)/* $(OBJ_DIRS)/*.o