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diff_asm_7b2b1411.asm
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Samples: 72K of event 'cpu-clock', 11999 Hz, Event count (approx.): 6005397060, [percent: local period] | |
instance int32 [benchapp] Bench::Test()[OptimizedTier1]() /tmp/jitted-61784-7270.so | |
Percent | |
Disassembly of section .text: | |
0000000000000080 <instance int32 [benchapp] Bench::Test()[OptimizedTier1]>: | |
instance int32 [benchapp] Bench::Test()[OptimizedTier1](): | |
stp x29, x30, [sp, #-64]! | |
stp x19, x20, [sp, #32] | |
stp x21, x22, [sp, #48] | |
mov x29, sp | |
add x1, sp, #0x40 | |
0.01 str x1, [x29, #24] | |
mov w19, wzr | |
ldr x20, [x0, #8] | |
0.02 ldr x0, [x20] | |
0.05 mov x1, #0x8e38 // #36408 | |
movk x1, #0x3910, lsl #16 | |
movk x1, #0xeb93, lsl #32 | |
cmp x0, x1 | |
↓ b.ne 170 | |
0.04 ldr w21, [x20, #8] | |
↓ cbz w21, 148 | |
0.01 mov x22, #0xff20 // #65312 | |
movk x22, #0x39c6, lsl #16 | |
movk x22, #0xeb93, lsl #32 | |
mov x0, x22 | |
bl ffffffffff610630 <instance int32 [benchapp] Bench::Test()[OptimizedTier1]+0xffffffffff6105b0> | |
0.02 mov w14, #0xffffffff // #-1 | |
stp w14, w21, [x0, #8] | |
add x14, x0, #0x10 | |
mov x15, x20 | |
bl ffffffffff610640 <instance int32 [benchapp] Bench::Test()[OptimizedTier1]+0xffffffffff6105c0> | |
0.00 68: str x0, [x29, #16] | |
0.25 6c: ldr x21, [x0] | |
0.02 mov x22, #0xff20 // #65312 | |
movk x22, #0x39c6, lsl #16 | |
movk x22, #0xeb93, lsl #32 | |
0.61 cmp x21, x22 | |
0.03 ↓ b.ne d8 | |
15.52 ldr w11, [x0, #8] | |
0.55 add w11, w11, #0x1 | |
0.02 ldr w1, [x0, #12] | |
cmp w11, w1 | |
↓ b.cs c8 | |
1.28 str w11, [x0, #8] | |
0.40 9c: ldp w1, w11, [x0, #8] | |
15.67 cmp w1, w11 | |
5.27 ↓ b.cs 104 | |
25.13 ldr x11, [x0, #16] | |
ldr w2, [x11, #8] | |
0.05 cmp w1, w2 | |
↓ b.cs 140 | |
15.18 add x11, x11, #0x10 | |
0.01 ldr w20, [x11, w1, uxtw #2] | |
18.88 c0: add w19, w19, w20 | |
0.67 ↑ b 6c | |
0.00 c8: ldr w11, [x0, #12] | |
0.21 str w11, [x0, #8] | |
mov w20, wzr | |
↓ b f4 | |
d8: mov x11, #0x24d0 // #9424 | |
movk x11, #0x3802, lsl #16 | |
movk x11, #0xeb93, lsl #32 | |
ldr x16, [x11] | |
→ blr x16 | |
asr w20, w0, #0 | |
ldr x0, [x29, #16] | |
f4: ↓ cbz w20, 18c | |
cmp x21, x22 | |
↓ b.ne 120 | |
↑ b 9c | |
104: mov w0, w1 | |
mov x1, #0x6f58 // #28504 | |
movk x1, #0x396d, lsl #16 | |
movk x1, #0xeb93, lsl #32 | |
ldr x1, [x1] | |
→ blr x1 | |
brk #0x0 | |
120: mov x11, #0x24d8 // #9432 | |
movk x11, #0x3802, lsl #16 | |
movk x11, #0xeb93, lsl #32 | |
ldr x16, [x11] | |
→ blr x16 | |
asr w20, w0, #0 | |
ldr x0, [x29, #16] | |
↑ b c0 | |
140: bl ffffffffff58ffe8 <instance int32 [benchapp] Bench::Test()[OptimizedTier1]+0xffffffffff58ff68> | |
brk #0x0 | |
148: mov x22, #0xff20 // #65312 | |
movk x22, #0x39c6, lsl #16 | |
movk x22, #0xeb93, lsl #32 | |
mov x0, x22 | |
bl ffffffffff610660 <instance int32 [benchapp] Bench::Test()[OptimizedTier1]+0xffffffffff6105e0> | |
mov x0, #0x2d70 // #11632 | |
movk x0, #0x2800, lsl #16 | |
movk x0, #0xeb53, lsl #32 | |
ldr x0, [x0] | |
↑ b 68 | |
170: mov x0, x20 | |
mov x11, #0x24c8 // #9416 | |
movk x11, #0x3802, lsl #16 | |
movk x11, #0xeb93, lsl #32 | |
ldr x16, [x11] | |
→ blr x16 | |
↑ b 68 | |
18c: cmp x21, x22 | |
↓ b.eq 1a8 | |
mov x11, #0x24e0 // #9440 | |
movk x11, #0x3802, lsl #16 | |
movk x11, #0xeb93, lsl #32 | |
ldr x16, [x11] | |
→ blr x16 | |
1a8: mov w0, w19 | |
ldp x21, x22, [sp, #48] | |
0.05 ldp x19, x20, [sp, #32] | |
0.04 ldp x29, x30, [sp], #64 | |
← ret | |
stp x29, x30, [sp, #-64]! | |
stp x19, x20, [sp, #32] | |
stp x21, x22, [sp, #48] | |
add x3, x29, #0x40 | |
str x3, [sp, #24] | |
ldr x0, [x29, #16] | |
↓ cbz x0, 204 | |
ldr x21, [x0] | |
mov x22, #0xff20 // #65312 | |
movk x22, #0x39c6, lsl #16 | |
movk x22, #0xeb93, lsl #32 | |
cmp x21, x22 | |
↓ b.eq 204 | |
mov x11, #0x24e0 // #9440 | |
movk x11, #0x3802, lsl #16 | |
movk x11, #0xeb93, lsl #32 | |
ldr x16, [x11] | |
→ blr x16 | |
204: ldp x21, x22, [sp, #48] | |
ldp x19, x20, [sp, #32] | |
ldp x29, x30, [sp], #64 | |
← ret |
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