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@EgorBot
Created August 7, 2024 22:20
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diff_asm_124c2160.asm
Samples: 501K of event 'cpu-clock', 49999 Hz, Event count (approx.): 10021720000, [percent: local period]
instance void [benchapp] Bench::WB()[OptimizedTier1]() /tmp/jitted-41601-7823.so
Samples
Disassembly of section .text:
0000000000000080 <instance void [benchapp] Bench::WB()[OptimizedTier1]>:
instance void [benchapp] Bench::WB()[OptimizedTier1]():
push rbp
push r15
push rbx
lea rbp,[rsp+0x10]
movabs rdi,0x797d303dbf80
→ call instance void [benchapp] Bench::WB()[OptimizedTier1]+0x7d7812c0
mov rbx,rax
mov r15d,0xbebc200
21: lea rdi,[rbx+0x8]
208 mov rsi,rbx
→ call instance void [benchapp] Bench::WB()[OptimizedTier1]+0x7d8e4600
397100 dec r15
147 ↑ jne 21
pop rbx
pop r15
pop rbp
← ret
Samples: 501K of event 'cpu-clock', 49999 Hz, Event count (approx.): 10021720000, [percent: local period]
JIT_WriteBarrier() /home/egorbot/core_root_diff/libcoreclr.so
Samples
Disassembly of section .text:
00000000003565e0 <GetCLRRuntimeHost@@V1.0+0x29d4b0>:
696 mov QWORD PTR [rdi],rsi
403 mov rax,rdi
99280 movabs r10,0xf0f0f0f0f0f0f0f0
shr rax,0xc
5 xchg ax,ax
2789 movabs r11,0xf0f0f0f0f0f0f0f0
add rax,r10
cmp BYTE PTR [rax],0x0
↓ jne 2e
mov BYTE PTR [rax],0xff
nop
2e: cmp rsi,r11
↓ jb 70
nop
movabs r10,0xf0f0f0f0f0f0f0f0
cmp rsi,r10
↓ jae 70
nop
movabs rax,0xf0f0f0f0f0f0f0f0
shr rdi,0xb
cmp BYTE PTR [rdi+rax*1],0xff
↓ jne 5c
repz ret
5c: mov BYTE PTR [rdi+rax*1],0xff
xchg ax,ax
shr rdi,0xa
1 movabs rax,0xf0f0f0f0f0f0f0f0
70: cmp BYTE PTR [rdi+rax*1],0xff
↓ jne 78
repz ret
78: mov BYTE PTR [rdi+rax*1],0xff
← ret
nop
repz ret
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
xchg ax,ax
nop
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