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July 18, 2017 00:57
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extern crate cortex_m; | |
extern crate cortex_m_rt; | |
#[macro_use] | |
extern crate cortex_m_rtfm; | |
extern crate pac; // Our peripheral access crate | |
use rtfm::{C1, P0, P1, Resource, T0, T1, TMax}; | |
peripherals! { | |
GPIOA: Peripheral { | |
register_block: GPIOA, | |
ceiling: C1, | |
}, | |
EXTI: Peripheral { | |
register_block: EXTI, | |
ceiling: C1, | |
}, | |
} | |
fn init(prio: T0, thres: &TMax) { | |
// setup exti on PA2 ... | |
} | |
fn exti_pa2(mut task: EXTI0, ref prio: P1, ref thres: T1) { | |
let exti = EXTI.access(prio, thres); | |
let gpioa = GPIOA.access(prio, thres); | |
// Clear pending exti and change led PA5 | |
} | |
fn idle(ref prio: T0, ref thres: T0) -> ! { | |
let gpioa_ro = pac::GPIOA.get(); | |
loop { | |
if unsafe { (*gpioa_ro).idr.read().idr1().is_set() } { | |
thres.raise(&GPIOA, |threshold: &T1| { | |
let gpioa = GPIOA.access(prio, threshold); | |
// Change state of led on PA5 | |
} | |
} | |
} | |
} |
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extern crate cortex_m; | |
extern crate cortex_m_rt; | |
#[macro_use] | |
extern crate cortex_m_rtfm; | |
extern crate pac; // Our peripheral access crate | |
use rtfm::{C1, P0, P1, Resource, T0, T1, TMax}; | |
peripherals! { | |
GPIOA: Peripheral { | |
register_block: GPIOA, | |
ceiling: C1, | |
}, | |
EXTI: Peripheral { | |
register_block: EXTI, | |
ceiling: C1, | |
}, | |
} | |
fn init(prio: T0, thres: &TMax) { | |
// setup exti on PA2 ... | |
} | |
fn exti_pa2(mut task: EXTI0, ref prio: P1, ref thres: T1) { | |
let exti = EXTI.access(prio, thres); | |
let gpioa = GPIOA.access(prio, thres); | |
// Clear pending exti and change led PA5 | |
} | |
registers_ro! { | |
GPIOA: [IDR,], | |
} | |
fn idle(ref prio: T0, ref thres: T0) -> ! { | |
let gpioa_idr = GPIOA.access_read::<GPIOA_IDR>(); | |
loop { | |
if gpio_idr.read().idr1().is_set() { | |
thres.raise(&GPIOA, |threshold: &T1| { | |
let gpioa = GPIOA.access(prio, threshold); | |
// Change state of led on PA5 | |
} | |
} | |
} | |
} |
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