Created
June 30, 2021 03:21
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| /dts-v1/; | |
| / { | |
| #address-cells = <0x02>; | |
| #size-cells = <0x02>; | |
| model = "MTP"; | |
| compatible = "qcom,sdm450"; | |
| qcom,msm-id = <0x15d 0x00>; | |
| qcom,msm-name = "SDM632"; | |
| interrupt-parent = <0x01>; | |
| qcom,pmic-id = <0x10016 0x25 0x00 0x00>; | |
| qcom,pmic-name = "PMI632"; | |
| cpus { | |
| #address-cells = <0x02>; | |
| #size-cells = <0x00>; | |
| cpu-map { | |
| cluster0 { | |
| core0 { | |
| cpu = <0x02>; | |
| }; | |
| core1 { | |
| cpu = <0x03>; | |
| }; | |
| core2 { | |
| cpu = <0x04>; | |
| }; | |
| core3 { | |
| cpu = <0x05>; | |
| }; | |
| }; | |
| cluster1 { | |
| core0 { | |
| cpu = <0x06>; | |
| }; | |
| core1 { | |
| cpu = <0x07>; | |
| }; | |
| core2 { | |
| cpu = <0x08>; | |
| }; | |
| core3 { | |
| cpu = <0x09>; | |
| }; | |
| }; | |
| }; | |
| cpu@0 { | |
| device_type = "cpu"; | |
| compatible = "arm,armv8"; | |
| reg = <0x00 0x00>; | |
| enable-method = "psci"; | |
| efficiency = <0x400>; | |
| sched-energy-costs = <0x0a 0x0b>; | |
| next-level-cache = <0x0c>; | |
| #cooling-cells = <0x02>; | |
| phandle = <0x02>; | |
| l2-cache { | |
| compatible = "arm,arch-cache"; | |
| cache-level = <0x02>; | |
| qcom,dump-size = <0x00>; | |
| phandle = <0x0c>; | |
| }; | |
| l1-icache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x9040>; | |
| phandle = <0x52>; | |
| }; | |
| l1-dcache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x9040>; | |
| phandle = <0x5a>; | |
| }; | |
| l1-tlb { | |
| qcom,dump-size = <0x2800>; | |
| phandle = <0x62>; | |
| }; | |
| }; | |
| cpu@1 { | |
| device_type = "cpu"; | |
| compatible = "arm,armv8"; | |
| enable-method = "psci"; | |
| reg = <0x00 0x01>; | |
| efficiency = <0x400>; | |
| sched-energy-costs = <0x0a 0x0b>; | |
| next-level-cache = <0x0c>; | |
| #cooling-cells = <0x02>; | |
| phandle = <0x03>; | |
| l1-icache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x9040>; | |
| phandle = <0x53>; | |
| }; | |
| l1-dcache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x9040>; | |
| phandle = <0x5b>; | |
| }; | |
| l1-tlb { | |
| qcom,dump-size = <0x2800>; | |
| phandle = <0x63>; | |
| }; | |
| }; | |
| cpu@2 { | |
| device_type = "cpu"; | |
| compatible = "arm,armv8"; | |
| enable-method = "psci"; | |
| reg = <0x00 0x02>; | |
| efficiency = <0x400>; | |
| sched-energy-costs = <0x0a 0x0b>; | |
| next-level-cache = <0x0c>; | |
| #cooling-cells = <0x02>; | |
| phandle = <0x04>; | |
| l1-icache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x9040>; | |
| phandle = <0x54>; | |
| }; | |
| l1-dcache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x9040>; | |
| phandle = <0x5c>; | |
| }; | |
| l1-tlb { | |
| qcom,dump-size = <0x2800>; | |
| phandle = <0x64>; | |
| }; | |
| }; | |
| cpu@3 { | |
| device_type = "cpu"; | |
| compatible = "arm,armv8"; | |
| enable-method = "psci"; | |
| reg = <0x00 0x03>; | |
| efficiency = <0x400>; | |
| sched-energy-costs = <0x0a 0x0b>; | |
| next-level-cache = <0x0c>; | |
| #cooling-cells = <0x02>; | |
| phandle = <0x05>; | |
| l1-icache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x9040>; | |
| phandle = <0x55>; | |
| }; | |
| l1-dcache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x9040>; | |
| phandle = <0x5d>; | |
| }; | |
| l1-tlb { | |
| qcom,dump-size = <0x2800>; | |
| phandle = <0x65>; | |
| }; | |
| }; | |
| cpu@100 { | |
| device_type = "cpu"; | |
| compatible = "arm,armv8"; | |
| enable-method = "psci"; | |
| reg = <0x00 0x100>; | |
| efficiency = <0x666>; | |
| sched-energy-costs = <0x0d 0x0e>; | |
| next-level-cache = <0x0f>; | |
| #cooling-cells = <0x02>; | |
| phandle = <0x06>; | |
| l2-cache { | |
| compatible = "arm,arch-cache"; | |
| cache-level = <0x02>; | |
| phandle = <0x0f>; | |
| }; | |
| l1-icache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x12000>; | |
| phandle = <0x56>; | |
| }; | |
| l1-dcache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x9040>; | |
| phandle = <0x5e>; | |
| }; | |
| l1-tlb { | |
| qcom,dump-size = <0x4800>; | |
| phandle = <0x66>; | |
| }; | |
| }; | |
| cpu@101 { | |
| device_type = "cpu"; | |
| compatible = "arm,cortex-a53\0arm,armv8"; | |
| enable-method = "psci"; | |
| reg = <0x00 0x101>; | |
| efficiency = <0x666>; | |
| sched-energy-costs = <0x0d 0x0e>; | |
| next-level-cache = <0x0f>; | |
| #cooling-cells = <0x02>; | |
| phandle = <0x07>; | |
| l1-icache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x12000>; | |
| phandle = <0x57>; | |
| }; | |
| l1-dcache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x9040>; | |
| phandle = <0x5f>; | |
| }; | |
| l1-tlb { | |
| qcom,dump-size = <0x4800>; | |
| phandle = <0x67>; | |
| }; | |
| }; | |
| cpu@102 { | |
| device_type = "cpu"; | |
| compatible = "arm,cortex-a53\0arm,armv8"; | |
| enable-method = "psci"; | |
| reg = <0x00 0x102>; | |
| efficiency = <0x666>; | |
| sched-energy-costs = <0x0d 0x0e>; | |
| next-level-cache = <0x0f>; | |
| #cooling-cells = <0x02>; | |
| phandle = <0x08>; | |
| l1-icache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x12000>; | |
| phandle = <0x58>; | |
| }; | |
| l1-dcache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x9040>; | |
| phandle = <0x60>; | |
| }; | |
| l1-tlb { | |
| qcom,dump-size = <0x4800>; | |
| phandle = <0x68>; | |
| }; | |
| }; | |
| cpu@103 { | |
| device_type = "cpu"; | |
| compatible = "arm,cortex-a53\0arm,armv8"; | |
| enable-method = "psci"; | |
| reg = <0x00 0x103>; | |
| efficiency = <0x666>; | |
| sched-energy-costs = <0x0d 0x0e>; | |
| next-level-cache = <0x0f>; | |
| #cooling-cells = <0x02>; | |
| phandle = <0x09>; | |
| l1-icache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x12000>; | |
| phandle = <0x59>; | |
| }; | |
| l1-dcache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x9040>; | |
| phandle = <0x61>; | |
| }; | |
| l1-tlb { | |
| qcom,dump-size = <0x4800>; | |
| phandle = <0x69>; | |
| }; | |
| }; | |
| }; | |
| soc { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| ranges = <0x00 0x00 0x00 0xffffffff>; | |
| compatible = "simple-bus"; | |
| phandle = <0x1be>; | |
| qcom,smem@86300000 { | |
| compatible = "qcom,smem"; | |
| reg = <0x86300000 0x100000 0xb011008 0x04 0x60000 0x8000 0x193d000 0x08>; | |
| reg-names = "smem\0irq-reg-base\0aux-mem1\0smem_targ_info_reg"; | |
| qcom,mpu-enabled; | |
| phandle = <0x1bf>; | |
| qcom,smd-modem { | |
| compatible = "qcom,smd"; | |
| qcom,smd-edge = <0x00>; | |
| qcom,smd-irq-offset = <0x00>; | |
| qcom,smd-irq-bitmask = <0x1000>; | |
| interrupts = <0x00 0x19 0x01>; | |
| label = "modem"; | |
| qcom,not-loadable; | |
| }; | |
| qcom,smsm-modem { | |
| compatible = "qcom,smsm"; | |
| qcom,smsm-edge = <0x00>; | |
| qcom,smsm-irq-offset = <0x00>; | |
| qcom,smsm-irq-bitmask = <0x2000>; | |
| interrupts = <0x00 0x1a 0x01>; | |
| }; | |
| qcom,smd-wcnss { | |
| compatible = "qcom,smd"; | |
| qcom,smd-edge = <0x06>; | |
| qcom,smd-irq-offset = <0x00>; | |
| qcom,smd-irq-bitmask = <0x20000>; | |
| interrupts = <0x00 0x8e 0x01>; | |
| label = "wcnss"; | |
| }; | |
| qcom,smsm-wcnss { | |
| compatible = "qcom,smsm"; | |
| qcom,smsm-edge = <0x06>; | |
| qcom,smsm-irq-offset = <0x00>; | |
| qcom,smsm-irq-bitmask = <0x80000>; | |
| interrupts = <0x00 0x90 0x01>; | |
| }; | |
| qcom,smd-adsp { | |
| compatible = "qcom,smd"; | |
| qcom,smd-edge = <0x01>; | |
| qcom,smd-irq-offset = <0x00>; | |
| qcom,smd-irq-bitmask = <0x100>; | |
| interrupts = <0x00 0x121 0x01>; | |
| label = "adsp"; | |
| }; | |
| qcom,smsm-adsp { | |
| compatible = "qcom,smsm"; | |
| qcom,smsm-edge = <0x01>; | |
| qcom,smsm-irq-offset = <0x00>; | |
| qcom,smsm-irq-bitmask = <0x200>; | |
| interrupts = <0x00 0x122 0x01>; | |
| }; | |
| qcom,smd-rpm { | |
| compatible = "qcom,smd"; | |
| qcom,smd-edge = <0x0f>; | |
| qcom,smd-irq-offset = <0x00>; | |
| qcom,smd-irq-bitmask = <0x01>; | |
| interrupts = <0x00 0xa8 0x01>; | |
| label = "rpm"; | |
| qcom,irq-no-suspend; | |
| qcom,not-loadable; | |
| }; | |
| }; | |
| qcom,rpm-smd { | |
| compatible = "qcom,rpm-smd"; | |
| rpm-channel-name = "rpm_requests"; | |
| rpm-channel-type = <0x0f>; | |
| phandle = <0x1c0>; | |
| rpm-regulator-smpa1 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "smpa"; | |
| qcom,resource-id = <0x01>; | |
| qcom,regulator-type = <0x01>; | |
| qcom,hpm-min-load = <0x186a0>; | |
| status = "okay"; | |
| regulator-s1 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8953_s1"; | |
| qcom,set = <0x03>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x10>; | |
| regulator-max-microvolt = <0x180>; | |
| qcom,use-voltage-level; | |
| phandle = <0x13e>; | |
| }; | |
| }; | |
| rpm-regulator-smpa2 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "smpa"; | |
| qcom,resource-id = <0x02>; | |
| qcom,regulator-type = <0x01>; | |
| qcom,hpm-min-load = <0x186a0>; | |
| status = "okay"; | |
| regulator-s2 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8953_s2"; | |
| qcom,set = <0x03>; | |
| status = "disabled"; | |
| }; | |
| regulator-s2-level { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8953_s2_level"; | |
| qcom,set = <0x03>; | |
| regulator-min-microvolt = <0x10>; | |
| regulator-max-microvolt = <0x180>; | |
| qcom,use-voltage-level; | |
| phandle = <0x11>; | |
| }; | |
| regulator-s2-floor-level { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8953_s2_floor_level"; | |
| qcom,set = <0x03>; | |
| regulator-min-microvolt = <0x10>; | |
| regulator-max-microvolt = <0x180>; | |
| qcom,use-voltage-floor-level; | |
| qcom,always-send-voltage; | |
| phandle = <0x10>; | |
| }; | |
| regulator-s2-level-ao { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8953_s2_level_ao"; | |
| qcom,set = <0x01>; | |
| regulator-min-microvolt = <0x10>; | |
| regulator-max-microvolt = <0x180>; | |
| qcom,use-voltage-level; | |
| phandle = <0x1c1>; | |
| }; | |
| regulator-cx-cdev { | |
| compatible = "qcom,regulator-cooling-device"; | |
| regulator-cdev-supply = <0x10>; | |
| regulator-levels = <0x100 0x10>; | |
| #cooling-cells = <0x02>; | |
| phandle = <0xd0>; | |
| }; | |
| }; | |
| rpm-regulator-smpa3 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "smpa"; | |
| qcom,resource-id = <0x03>; | |
| qcom,regulator-type = <0x01>; | |
| qcom,hpm-min-load = <0x186a0>; | |
| status = "okay"; | |
| regulator-s3 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8953_s3"; | |
| qcom,set = <0x03>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0xf03c0>; | |
| regulator-max-microvolt = <0x12ebc0>; | |
| qcom,init-voltage = <0xf03c0>; | |
| phandle = <0xb1>; | |
| }; | |
| }; | |
| rpm-regulator-smpa4 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "smpa"; | |
| qcom,resource-id = <0x04>; | |
| qcom,regulator-type = <0x01>; | |
| qcom,hpm-min-load = <0x186a0>; | |
| status = "okay"; | |
| regulator-s4 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8953_s4"; | |
| qcom,set = <0x03>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0xfcee0>; | |
| regulator-max-microvolt = <0x1f20c0>; | |
| qcom,init-voltage = <0xfcee0>; | |
| phandle = <0x12e>; | |
| }; | |
| }; | |
| rpm-regulator-smpa7 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "smpa"; | |
| qcom,resource-id = <0x07>; | |
| qcom,regulator-type = <0x01>; | |
| qcom,hpm-min-load = <0x186a0>; | |
| status = "okay"; | |
| regulator-s7 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8953_s7"; | |
| qcom,set = <0x03>; | |
| status = "disabled"; | |
| }; | |
| regulator-s7-level { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8953_s7_level"; | |
| qcom,set = <0x03>; | |
| regulator-min-microvolt = <0x10>; | |
| regulator-max-microvolt = <0x180>; | |
| qcom,init-voltage-level = <0x10>; | |
| qcom,use-voltage-level; | |
| qcom,always-send-voltage; | |
| phandle = <0x1c2>; | |
| }; | |
| regulator-s7-level-ao { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8953_s7_level_ao"; | |
| qcom,set = <0x01>; | |
| regulator-min-microvolt = <0x10>; | |
| regulator-max-microvolt = <0x180>; | |
| qcom,use-voltage-level; | |
| qcom,always-send-voltage; | |
| phandle = <0x125>; | |
| }; | |
| regulator-s7-level-so { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8953_s7_level_so"; | |
| qcom,set = <0x02>; | |
| regulator-min-microvolt = <0x10>; | |
| regulator-max-microvolt = <0x180>; | |
| qcom,init-voltage-level = <0x10>; | |
| qcom,use-voltage-level; | |
| phandle = <0x1c3>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa1 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x01>; | |
| qcom,regulator-type = <0x00>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l1 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8953_l1"; | |
| qcom,set = <0x03>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0xee098>; | |
| regulator-max-microvolt = <0x100590>; | |
| qcom,init-voltage = <0xee098>; | |
| phandle = <0x1c4>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa2 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x02>; | |
| qcom,regulator-type = <0x00>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l2 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8953_l2"; | |
| qcom,set = <0x03>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0xee098>; | |
| regulator-max-microvolt = <0x11edd8>; | |
| qcom,init-voltage = <0xee098>; | |
| phandle = <0x1c5>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa3 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x03>; | |
| qcom,regulator-type = <0x00>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l3 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8953_l3"; | |
| qcom,set = <0x03>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0xe1d48>; | |
| regulator-max-microvolt = <0xe1d48>; | |
| qcom,init-voltage = <0xe1d48>; | |
| phandle = <0xb2>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa5 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x05>; | |
| qcom,regulator-type = <0x00>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l5 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8953_l5"; | |
| qcom,set = <0x03>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-max-microvolt = <0x1b7740>; | |
| qcom,init-voltage = <0x1b7740>; | |
| phandle = <0x12f>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa6 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x06>; | |
| qcom,regulator-type = <0x00>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l6 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8953_l6"; | |
| qcom,set = <0x03>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-max-microvolt = <0x1b7740>; | |
| qcom,init-voltage = <0x1b7740>; | |
| regulator-always-on; | |
| phandle = <0xb7>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa7 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x07>; | |
| qcom,regulator-type = <0x00>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l7 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8953_l7"; | |
| qcom,set = <0x03>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-max-microvolt = <0x1cfde0>; | |
| qcom,init-voltage = <0x1b7740>; | |
| phandle = <0x13d>; | |
| }; | |
| regulator-l7-ao { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8953_l7_ao"; | |
| qcom,set = <0x01>; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-max-microvolt = <0x1cfde0>; | |
| qcom,init-voltage = <0x1b7740>; | |
| phandle = <0x1c6>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa8 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x08>; | |
| qcom,regulator-type = <0x00>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l8 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8953_l8"; | |
| qcom,set = <0x03>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x2c4020>; | |
| regulator-max-microvolt = <0x2c4020>; | |
| qcom,init-voltage = <0x2c4020>; | |
| phandle = <0x1c7>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa9 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x09>; | |
| qcom,regulator-type = <0x00>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l9 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8953_l9"; | |
| qcom,set = <0x03>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x2dc6c0>; | |
| regulator-max-microvolt = <0x325aa0>; | |
| qcom,init-voltage = <0x2dc6c0>; | |
| phandle = <0x14a>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa10 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x0a>; | |
| qcom,regulator-type = <0x00>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l10 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8953_l10"; | |
| qcom,set = <0x03>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x2ab980>; | |
| regulator-max-microvolt = <0x2dc6c0>; | |
| qcom,init-voltage = <0x2ab980>; | |
| regulator-always-on; | |
| phandle = <0x10f>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa11 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x0b>; | |
| qcom,regulator-type = <0x00>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l11 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8953_l11"; | |
| qcom,set = <0x03>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x2d0370>; | |
| regulator-max-microvolt = <0x2d0370>; | |
| qcom,init-voltage = <0x2d0370>; | |
| phandle = <0x1c8>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa12 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x0c>; | |
| qcom,regulator-type = <0x00>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l12 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8953_l12"; | |
| qcom,set = <0x03>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-max-microvolt = <0x2d0370>; | |
| qcom,init-voltage = <0x1b7740>; | |
| phandle = <0x1c9>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa13 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x0d>; | |
| qcom,regulator-type = <0x00>; | |
| qcom,hpm-min-load = <0x1388>; | |
| status = "okay"; | |
| regulator-l13 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8953_l13"; | |
| qcom,set = <0x03>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x2faf08>; | |
| regulator-max-microvolt = <0x2faf08>; | |
| qcom,init-voltage = <0x2faf08>; | |
| phandle = <0x123>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa16 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x10>; | |
| qcom,regulator-type = <0x00>; | |
| qcom,hpm-min-load = <0x1388>; | |
| status = "okay"; | |
| regulator-l16 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8953_l16"; | |
| qcom,set = <0x03>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-max-microvolt = <0x1b7740>; | |
| qcom,init-voltage = <0x1b7740>; | |
| phandle = <0x1ca>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa17 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x11>; | |
| qcom,regulator-type = <0x00>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l17 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8953_l17"; | |
| qcom,set = <0x03>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x2b7cd0>; | |
| regulator-max-microvolt = <0x2b7cd0>; | |
| qcom,init-voltage = <0x2b7cd0>; | |
| phandle = <0xb6>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa19 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x13>; | |
| qcom,regulator-type = <0x00>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l19 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8953_l19"; | |
| qcom,set = <0x03>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x124f80>; | |
| regulator-max-microvolt = <0x149970>; | |
| qcom,init-voltage = <0x124f80>; | |
| phandle = <0x149>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa22 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x16>; | |
| qcom,regulator-type = <0x00>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l22 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8953_l22"; | |
| qcom,set = <0x03>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x2ab980>; | |
| regulator-max-microvolt = <0x2ab980>; | |
| qcom,init-voltage = <0x2ab980>; | |
| phandle = <0x1cb>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa23 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x17>; | |
| qcom,regulator-type = <0x00>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l23 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8953_l23"; | |
| qcom,set = <0x03>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0xee098>; | |
| regulator-max-microvolt = <0x12b128>; | |
| qcom,init-voltage = <0xee098>; | |
| phandle = <0x1cc>; | |
| }; | |
| }; | |
| rpm-regulator-clk0 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "clk0"; | |
| qcom,resource-id = <0x03>; | |
| qcom,regulator-type = <0x01>; | |
| status = "disabled"; | |
| regulator-clk0 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "rpm_apc"; | |
| qcom,set = <0x03>; | |
| status = "disabled"; | |
| }; | |
| }; | |
| }; | |
| qcom,gcc@1800000 { | |
| compatible = "qcom,gcc-sdm632"; | |
| reg = <0x1800000 0x80000 0xa4124 0x08>; | |
| reg-names = "cc_base\0efuse"; | |
| vdd_dig-supply = <0x11>; | |
| #clock-cells = <0x01>; | |
| #reset-cells = <0x01>; | |
| phandle = <0x12>; | |
| }; | |
| ad-hoc-bus@580000 { | |
| compatible = "qcom,msm-bus-device"; | |
| reg = <0x580000 0x16080 0x580000 0x16080 0x400000 0x5a000 0x500000 0x12080>; | |
| reg-names = "snoc-base\0snoc-mm-base\0bimc-base\0pcnoc-base"; | |
| phandle = <0x1cd>; | |
| fab-bimc { | |
| cell-id = <0x00>; | |
| label = "fab-bimc"; | |
| qcom,fab-dev; | |
| qcom,base-name = "bimc-base"; | |
| qcom,bus-type = <0x02>; | |
| qcom,util-fact = <0x99>; | |
| clock-names = "bus_clk\0bus_a_clk"; | |
| clocks = <0x12 0xd212feea 0x12 0x71d1a499>; | |
| phandle = <0x15>; | |
| }; | |
| fab-pcnoc { | |
| cell-id = <0x1000>; | |
| label = "fab-pcnoc"; | |
| qcom,fab-dev; | |
| qcom,base-name = "pcnoc-base"; | |
| qcom,base-offset = <0x7000>; | |
| qcom,qos-off = <0x1000>; | |
| qcom,bus-type = <0x01>; | |
| clock-names = "bus_clk\0bus_a_clk"; | |
| clocks = <0x12 0x2b53b688 0x12 0x9753a54f>; | |
| phandle = <0x17>; | |
| qcom,node-qos-clks { | |
| clock-names = "pcnoc-usb3-axi-no-rate"; | |
| clocks = <0x12 0xf7f4b314>; | |
| }; | |
| }; | |
| fab-snoc { | |
| cell-id = <0x400>; | |
| label = "fab-snoc"; | |
| qcom,fab-dev; | |
| qcom,base-name = "snoc-base"; | |
| qcom,base-offset = <0x7000>; | |
| qcom,qos-off = <0x1000>; | |
| qcom,bus-type = <0x01>; | |
| clock-names = "bus_clk\0bus_a_clk"; | |
| clocks = <0x12 0xe6900bb6 0x12 0x5d4683bd>; | |
| phandle = <0x1c>; | |
| }; | |
| fab-snoc-mm { | |
| cell-id = <0x800>; | |
| label = "fab-snoc-mm"; | |
| qcom,fab-dev; | |
| qcom,base-name = "snoc-mm-base"; | |
| qcom,base-offset = <0x7000>; | |
| qcom,qos-off = <0x1000>; | |
| qcom,bus-type = <0x01>; | |
| qcom,util-fact = <0x99>; | |
| clock-names = "bus_clk\0bus_a_clk"; | |
| clocks = <0x12 0xd61e5721 0x12 0x50600f1b>; | |
| phandle = <0x21>; | |
| }; | |
| mas-apps-proc { | |
| cell-id = <0x01>; | |
| label = "mas-apps-proc"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,qport = <0x00>; | |
| qcom,qos-mode = "fixed"; | |
| qcom,connections = <0x13 0x14>; | |
| qcom,prio-lvl = <0x00>; | |
| qcom,prio-rd = <0x00>; | |
| qcom,prio-wr = <0x00>; | |
| qcom,bus-dev = <0x15>; | |
| qcom,mas-rpm-id = <0x00>; | |
| phandle = <0x1ce>; | |
| }; | |
| mas-oxili { | |
| cell-id = <0x1a>; | |
| label = "mas-oxili"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,qport = <0x02>; | |
| qcom,qos-mode = "fixed"; | |
| qcom,connections = <0x13 0x14>; | |
| qcom,prio-lvl = <0x00>; | |
| qcom,prio-rd = <0x00>; | |
| qcom,prio-wr = <0x00>; | |
| qcom,bus-dev = <0x15>; | |
| qcom,mas-rpm-id = <0x06>; | |
| phandle = <0x1cf>; | |
| }; | |
| mas-snoc-bimc-0 { | |
| cell-id = <0x2717>; | |
| label = "mas-snoc-bimc-0"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,qport = <0x03>; | |
| qcom,qos-mode = "bypass"; | |
| qcom,connections = <0x13 0x14>; | |
| qcom,bus-dev = <0x15>; | |
| qcom,mas-rpm-id = <0x03>; | |
| phandle = <0x4c>; | |
| }; | |
| mas-snoc-bimc-2 { | |
| cell-id = <0x273d>; | |
| label = "mas-snoc-bimc-2"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,qport = <0x04>; | |
| qcom,qos-mode = "bypass"; | |
| qcom,connections = <0x13 0x14>; | |
| qcom,bus-dev = <0x15>; | |
| qcom,mas-rpm-id = <0x6c>; | |
| phandle = <0x4e>; | |
| }; | |
| mas-snoc-bimc-1 { | |
| cell-id = <0x2718>; | |
| label = "mas-snoc-bimc-1"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,qport = <0x05>; | |
| qcom,qos-mode = "bypass"; | |
| qcom,connections = <0x13>; | |
| qcom,bus-dev = <0x15>; | |
| qcom,mas-rpm-id = <0x4c>; | |
| phandle = <0x4d>; | |
| }; | |
| mas-tcu-0 { | |
| cell-id = <0x68>; | |
| label = "mas-tcu-0"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,qport = <0x06>; | |
| qcom,qos-mode = "fixed"; | |
| qcom,connections = <0x13 0x14>; | |
| qcom,prio-lvl = <0x02>; | |
| qcom,prio-rd = <0x02>; | |
| qcom,bus-dev = <0x15>; | |
| qcom,mas-rpm-id = <0x66>; | |
| phandle = <0x1d0>; | |
| }; | |
| mas-spdm { | |
| cell-id = <0x24>; | |
| label = "mas-spdm"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,connections = <0x16>; | |
| qcom,bus-dev = <0x17>; | |
| qcom,mas-rpm-id = <0x32>; | |
| phandle = <0x1d1>; | |
| }; | |
| mas-blsp-1 { | |
| cell-id = <0x56>; | |
| label = "mas-blsp-1"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,connections = <0x18>; | |
| qcom,bus-dev = <0x17>; | |
| qcom,mas-rpm-id = <0x29>; | |
| phandle = <0x1d2>; | |
| }; | |
| mas-blsp-2 { | |
| cell-id = <0x54>; | |
| label = "mas-blsp-2"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,connections = <0x18>; | |
| qcom,bus-dev = <0x17>; | |
| qcom,mas-rpm-id = <0x27>; | |
| phandle = <0x1d3>; | |
| }; | |
| mas-usb3 { | |
| cell-id = <0x3d>; | |
| label = "mas-usb3"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,qport = <0x0b>; | |
| qcom,qos-mode = "fixed"; | |
| qcom,connections = <0x19>; | |
| qcom,prio1 = <0x01>; | |
| qcom,prio0 = <0x01>; | |
| qcom,bus-dev = <0x17>; | |
| qcom,mas-rpm-id = <0x20>; | |
| phandle = <0x1d4>; | |
| }; | |
| mas-crypto { | |
| cell-id = <0x37>; | |
| label = "mas-crypto"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,qport = <0x00>; | |
| qcom,qos-mode = "fixed"; | |
| qcom,connections = <0x19>; | |
| qcom,prio1 = <0x01>; | |
| qcom,prio0 = <0x01>; | |
| qcom,bus-dev = <0x17>; | |
| qcom,mas-rpm-id = <0x17>; | |
| phandle = <0xaa>; | |
| }; | |
| mas-sdcc-1 { | |
| cell-id = <0x4e>; | |
| label = "mas-sdcc-1"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,qport = <0x07>; | |
| qcom,qos-mode = "fixed"; | |
| qcom,connections = <0x19>; | |
| qcom,bus-dev = <0x17>; | |
| qcom,mas-rpm-id = <0x21>; | |
| phandle = <0x1d5>; | |
| }; | |
| mas-sdcc-2 { | |
| cell-id = <0x51>; | |
| label = "mas-sdcc-2"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,qport = <0x08>; | |
| qcom,qos-mode = "fixed"; | |
| qcom,connections = <0x19>; | |
| qcom,bus-dev = <0x17>; | |
| qcom,mas-rpm-id = <0x23>; | |
| phandle = <0x1d6>; | |
| }; | |
| mas-snoc-pcnoc { | |
| cell-id = <0x2739>; | |
| label = "mas-snoc-pcnoc"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,qport = <0x09>; | |
| qcom,qos-mode = "fixed"; | |
| qcom,connections = <0x1a>; | |
| qcom,bus-dev = <0x17>; | |
| qcom,mas-rpm-id = <0x4d>; | |
| phandle = <0x4f>; | |
| }; | |
| mas-qdss-bam { | |
| cell-id = <0x35>; | |
| label = "mas-qdss-bam"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,qport = <0x0b>; | |
| qcom,qos-mode = "fixed"; | |
| qcom,connections = <0x1b>; | |
| qcom,prio1 = <0x01>; | |
| qcom,prio0 = <0x01>; | |
| qcom,bus-dev = <0x1c>; | |
| qcom,mas-rpm-id = <0x13>; | |
| phandle = <0x1d7>; | |
| }; | |
| mas-bimc-snoc { | |
| cell-id = <0x2720>; | |
| label = "mas-bimc-snoc"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,connections = <0x1d 0x1e 0x1f>; | |
| qcom,bus-dev = <0x1c>; | |
| qcom,mas-rpm-id = <0x15>; | |
| phandle = <0x4a>; | |
| }; | |
| mas-jpeg { | |
| cell-id = <0x3e>; | |
| label = "mas-jpeg"; | |
| qcom,buswidth = <0x10>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,qport = <0x06>; | |
| qcom,qos-mode = "bypass"; | |
| qcom,connections = <0x20>; | |
| qcom,bus-dev = <0x21>; | |
| qcom,mas-rpm-id = <0x07>; | |
| phandle = <0x1d8>; | |
| }; | |
| mas-mdp { | |
| cell-id = <0x16>; | |
| label = "mas-mdp"; | |
| qcom,buswidth = <0x10>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,qport = <0x07>; | |
| qcom,qos-mode = "bypass"; | |
| qcom,connections = <0x22>; | |
| qcom,bus-dev = <0x21>; | |
| qcom,mas-rpm-id = <0x08>; | |
| phandle = <0x1d9>; | |
| }; | |
| mas-pcnoc-snoc { | |
| cell-id = <0x271a>; | |
| label = "mas-pcnoc-snoc"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,qport = <0x05>; | |
| qcom,qos-mode = "fixed"; | |
| qcom,connections = <0x1d 0x1e 0x23>; | |
| qcom,bus-dev = <0x1c>; | |
| qcom,mas-rpm-id = <0x1d>; | |
| qcom,blacklist = <0x24>; | |
| phandle = <0x4b>; | |
| }; | |
| mas-venus { | |
| cell-id = <0x3f>; | |
| label = "mas-venus"; | |
| qcom,buswidth = <0x10>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,qport = <0x08>; | |
| qcom,qos-mode = "bypass"; | |
| qcom,connections = <0x20>; | |
| qcom,bus-dev = <0x21>; | |
| qcom,mas-rpm-id = <0x09>; | |
| phandle = <0x1da>; | |
| }; | |
| mas-vfe0 { | |
| cell-id = <0x1d>; | |
| label = "mas-vfe0"; | |
| qcom,buswidth = <0x10>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,qport = <0x09>; | |
| qcom,qos-mode = "bypass"; | |
| qcom,connections = <0x22>; | |
| qcom,bus-dev = <0x21>; | |
| qcom,mas-rpm-id = <0x0b>; | |
| phandle = <0x1db>; | |
| }; | |
| mas-vfe1 { | |
| cell-id = <0x6d>; | |
| label = "mas-vfe1"; | |
| qcom,buswidth = <0x10>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,qport = <0x0d>; | |
| qcom,qos-mode = "bypass"; | |
| qcom,connections = <0x22>; | |
| qcom,bus-dev = <0x21>; | |
| qcom,mas-rpm-id = <0x85>; | |
| phandle = <0x1dc>; | |
| }; | |
| mas-cpp { | |
| cell-id = <0x6a>; | |
| label = "mas-cpp"; | |
| qcom,buswidth = <0x10>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,qport = <0x0c>; | |
| qcom,qos-mode = "bypass"; | |
| qcom,connections = <0x20>; | |
| qcom,bus-dev = <0x21>; | |
| qcom,mas-rpm-id = <0x73>; | |
| phandle = <0x1dd>; | |
| }; | |
| mas-ipa { | |
| cell-id = <0x5a>; | |
| label = "mas-ipa"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,qport = <0x0e>; | |
| qcom,qos-mode = "fixed"; | |
| qcom,connections = <0x1d 0x1e 0x23>; | |
| qcom,prio1 = <0x00>; | |
| qcom,prio0 = <0x00>; | |
| qcom,bus-dev = <0x1c>; | |
| qcom,mas-rpm-id = <0x3b>; | |
| phandle = <0x1de>; | |
| }; | |
| mas-qdss-etr { | |
| cell-id = <0x3c>; | |
| label = "mas-qdss-etr"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,qport = <0x0a>; | |
| qcom,qos-mode = "fixed"; | |
| qcom,connections = <0x1b>; | |
| qcom,prio1 = <0x01>; | |
| qcom,prio0 = <0x01>; | |
| qcom,bus-dev = <0x1c>; | |
| qcom,mas-rpm-id = <0x1f>; | |
| phandle = <0x1df>; | |
| }; | |
| pcnoc-m-0 { | |
| cell-id = <0x271e>; | |
| label = "pcnoc-m-0"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,qport = <0x05>; | |
| qcom,qos-mode = "fixed"; | |
| qcom,connections = <0x19>; | |
| qcom,prio1 = <0x01>; | |
| qcom,prio0 = <0x01>; | |
| qcom,bus-dev = <0x17>; | |
| qcom,mas-rpm-id = <0x57>; | |
| qcom,slv-rpm-id = <0x74>; | |
| phandle = <0x16>; | |
| }; | |
| pcnoc-m-1 { | |
| cell-id = <0x271f>; | |
| label = "pcnoc-m-1"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,qport = <0x06>; | |
| qcom,qos-mode = "fixed"; | |
| qcom,connections = <0x19>; | |
| qcom,bus-dev = <0x17>; | |
| qcom,mas-rpm-id = <0x58>; | |
| qcom,slv-rpm-id = <0x75>; | |
| phandle = <0x18>; | |
| }; | |
| pcnoc-int-1 { | |
| cell-id = <0x271d>; | |
| label = "pcnoc-int-1"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,connections = <0x1a 0x25>; | |
| qcom,bus-dev = <0x17>; | |
| qcom,mas-rpm-id = <0x56>; | |
| qcom,slv-rpm-id = <0x73>; | |
| phandle = <0x19>; | |
| }; | |
| pcnoc-int-2 { | |
| cell-id = <0x2741>; | |
| label = "pcnoc-int-2"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,connections = <0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c 0x2d 0x2e 0x2f 0x30>; | |
| qcom,bus-dev = <0x17>; | |
| qcom,mas-rpm-id = <0x7c>; | |
| qcom,slv-rpm-id = <0xb8>; | |
| phandle = <0x1a>; | |
| }; | |
| pcnoc-s-0 { | |
| cell-id = <0x2722>; | |
| label = "pcnoc-s-0"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,connections = <0x31 0x32>; | |
| qcom,bus-dev = <0x17>; | |
| qcom,mas-rpm-id = <0x59>; | |
| qcom,slv-rpm-id = <0x76>; | |
| phandle = <0x28>; | |
| }; | |
| pcnoc-s-1 { | |
| cell-id = <0x2723>; | |
| label = "pcnoc-s-1"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,connections = <0x33>; | |
| qcom,bus-dev = <0x17>; | |
| qcom,mas-rpm-id = <0x5a>; | |
| qcom,slv-rpm-id = <0x77>; | |
| phandle = <0x26>; | |
| }; | |
| pcnoc-s-2 { | |
| cell-id = <0x2724>; | |
| label = "pcnoc-s-2"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,connections = <0x34>; | |
| qcom,bus-dev = <0x17>; | |
| qcom,mas-rpm-id = <0x5b>; | |
| qcom,slv-rpm-id = <0x78>; | |
| phandle = <0x27>; | |
| }; | |
| pcnoc-s-3 { | |
| cell-id = <0x2725>; | |
| label = "pcnoc-s-3"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,connections = <0x35 0x36 0x37 0x38 0x39>; | |
| qcom,bus-dev = <0x17>; | |
| qcom,mas-rpm-id = <0x5c>; | |
| qcom,slv-rpm-id = <0x79>; | |
| phandle = <0x30>; | |
| }; | |
| pcnoc-s-4 { | |
| cell-id = <0x2726>; | |
| label = "pcnoc-s-4"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,connections = <0x3a 0x3b 0x3c>; | |
| qcom,bus-dev = <0x17>; | |
| qcom,mas-rpm-id = <0x5d>; | |
| qcom,slv-rpm-id = <0x7a>; | |
| phandle = <0x29>; | |
| }; | |
| pcnoc-s-6 { | |
| cell-id = <0x2d1>; | |
| label = "pcnoc-s-6"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,connections = <0x3d 0x3e 0x3f>; | |
| qcom,bus-dev = <0x17>; | |
| qcom,mas-rpm-id = <0x5e>; | |
| qcom,slv-rpm-id = <0x7b>; | |
| phandle = <0x2a>; | |
| }; | |
| pcnoc-s-7 { | |
| cell-id = <0x2740>; | |
| label = "pcnoc-s-7"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,connections = <0x40>; | |
| qcom,bus-dev = <0x17>; | |
| qcom,mas-rpm-id = <0x5f>; | |
| qcom,slv-rpm-id = <0x7c>; | |
| phandle = <0x2b>; | |
| }; | |
| pcnoc-s-8 { | |
| cell-id = <0x2727>; | |
| label = "pcnoc-s-8"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,connections = <0x41>; | |
| qcom,bus-dev = <0x17>; | |
| qcom,mas-rpm-id = <0x60>; | |
| qcom,slv-rpm-id = <0x7d>; | |
| phandle = <0x2c>; | |
| }; | |
| pcnoc-s-9 { | |
| cell-id = <0x2728>; | |
| label = "pcnoc-s-9"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,connections = <0x42>; | |
| qcom,bus-dev = <0x17>; | |
| qcom,mas-rpm-id = <0x61>; | |
| qcom,slv-rpm-id = <0x7e>; | |
| phandle = <0x2d>; | |
| }; | |
| qdss-int { | |
| cell-id = <0x2719>; | |
| label = "qdss-int"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,connections = <0x1e 0x23>; | |
| qcom,bus-dev = <0x1c>; | |
| qcom,mas-rpm-id = <0x62>; | |
| qcom,slv-rpm-id = <0x80>; | |
| phandle = <0x1b>; | |
| }; | |
| snoc-int-0 { | |
| cell-id = <0x2714>; | |
| label = "snoc-int-0"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,connections = <0x43 0x44 0x45>; | |
| qcom,bus-dev = <0x1c>; | |
| qcom,mas-rpm-id = <0x63>; | |
| qcom,slv-rpm-id = <0x82>; | |
| phandle = <0x1d>; | |
| }; | |
| snoc-int-1 { | |
| cell-id = <0x2715>; | |
| label = "snoc-int-1"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,connections = <0x46 0x47 0x24>; | |
| qcom,bus-dev = <0x1c>; | |
| qcom,mas-rpm-id = <0x64>; | |
| qcom,slv-rpm-id = <0x83>; | |
| phandle = <0x1e>; | |
| }; | |
| snoc-int-2 { | |
| cell-id = <0x2752>; | |
| label = "snoc-int-2"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,connections = <0x48 0x49>; | |
| qcom,bus-dev = <0x1c>; | |
| qcom,mas-rpm-id = <0x86>; | |
| qcom,slv-rpm-id = <0xc5>; | |
| phandle = <0x1f>; | |
| }; | |
| slv-ebi { | |
| cell-id = <0x200>; | |
| label = "slv-ebi"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,bus-dev = <0x15>; | |
| qcom,slv-rpm-id = <0x00>; | |
| phandle = <0x13>; | |
| }; | |
| slv-bimc-snoc { | |
| cell-id = <0x2721>; | |
| label = "slv-bimc-snoc"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,bus-dev = <0x15>; | |
| qcom,connections = <0x4a>; | |
| qcom,slv-rpm-id = <0x02>; | |
| phandle = <0x14>; | |
| }; | |
| slv-spdm { | |
| cell-id = <0x279>; | |
| label = "slv-spdm"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,bus-dev = <0x17>; | |
| qcom,slv-rpm-id = <0x3c>; | |
| phandle = <0x32>; | |
| }; | |
| slv-pdm { | |
| cell-id = <0x267>; | |
| label = "slv-pdm"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,bus-dev = <0x17>; | |
| qcom,slv-rpm-id = <0x29>; | |
| phandle = <0x31>; | |
| }; | |
| slv-tcsr { | |
| cell-id = <0x26f>; | |
| label = "slv-tcsr"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,bus-dev = <0x17>; | |
| qcom,slv-rpm-id = <0x32>; | |
| phandle = <0x33>; | |
| }; | |
| slv-snoc-cfg { | |
| cell-id = <0x282>; | |
| label = "slv-snoc-cfg"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,bus-dev = <0x17>; | |
| qcom,slv-rpm-id = <0x46>; | |
| phandle = <0x34>; | |
| }; | |
| slv-tlmm { | |
| cell-id = <0x270>; | |
| label = "slv-tlmm"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,bus-dev = <0x17>; | |
| qcom,slv-rpm-id = <0x33>; | |
| phandle = <0x35>; | |
| }; | |
| slv-message-ram { | |
| cell-id = <0x274>; | |
| label = "slv-message-ram"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,bus-dev = <0x17>; | |
| qcom,slv-rpm-id = <0x37>; | |
| phandle = <0x39>; | |
| }; | |
| slv-blsp-1 { | |
| cell-id = <0x265>; | |
| label = "slv-blsp-1"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,bus-dev = <0x17>; | |
| qcom,slv-rpm-id = <0x27>; | |
| phandle = <0x37>; | |
| }; | |
| slv-blsp-2 { | |
| cell-id = <0x263>; | |
| label = "slv-blsp-2"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,bus-dev = <0x17>; | |
| qcom,slv-rpm-id = <0x25>; | |
| phandle = <0x38>; | |
| }; | |
| slv-prng { | |
| cell-id = <0x26a>; | |
| label = "slv-prng"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,bus-dev = <0x17>; | |
| qcom,slv-rpm-id = <0x2c>; | |
| phandle = <0x36>; | |
| }; | |
| slv-camera-ss-cfg { | |
| cell-id = <0x24d>; | |
| label = "slv-camera-ss-cfg"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,bus-dev = <0x17>; | |
| qcom,slv-rpm-id = <0x03>; | |
| phandle = <0x3a>; | |
| }; | |
| slv-disp-ss-cfg { | |
| cell-id = <0x24e>; | |
| label = "slv-disp-ss-cfg"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,bus-dev = <0x17>; | |
| qcom,slv-rpm-id = <0x04>; | |
| phandle = <0x3b>; | |
| }; | |
| slv-venus-cfg { | |
| cell-id = <0x254>; | |
| label = "slv-venus-cfg"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,bus-dev = <0x17>; | |
| qcom,slv-rpm-id = <0x0a>; | |
| phandle = <0x3c>; | |
| }; | |
| slv-gpu-cfg { | |
| cell-id = <0x256>; | |
| label = "slv-gpu-cfg"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,bus-dev = <0x17>; | |
| qcom,slv-rpm-id = <0x0b>; | |
| phandle = <0x2f>; | |
| }; | |
| slv-sdcc-1 { | |
| cell-id = <0x25e>; | |
| label = "slv-sdcc-1"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,bus-dev = <0x17>; | |
| qcom,slv-rpm-id = <0x1f>; | |
| phandle = <0x3f>; | |
| }; | |
| slv-sdcc-2 { | |
| cell-id = <0x260>; | |
| label = "slv-sdcc-2"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,bus-dev = <0x17>; | |
| qcom,slv-rpm-id = <0x21>; | |
| phandle = <0x3e>; | |
| }; | |
| slv-crypto-0-cfg { | |
| cell-id = <0x271>; | |
| label = "slv-crypto-0-cfg"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,bus-dev = <0x17>; | |
| qcom,slv-rpm-id = <0x34>; | |
| phandle = <0x3d>; | |
| }; | |
| slv-pmic-arb { | |
| cell-id = <0x278>; | |
| label = "slv-pmic-arb"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,bus-dev = <0x17>; | |
| qcom,slv-rpm-id = <0x3b>; | |
| phandle = <0x40>; | |
| }; | |
| slv-usb3 { | |
| cell-id = <0x247>; | |
| label = "slv-usb3"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,bus-dev = <0x17>; | |
| qcom,slv-rpm-id = <0x16>; | |
| phandle = <0x41>; | |
| }; | |
| slv-ipa-cfg { | |
| cell-id = <0x2a4>; | |
| label = "slv-ipa-cfg"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,bus-dev = <0x17>; | |
| qcom,slv-rpm-id = <0xb7>; | |
| phandle = <0x42>; | |
| }; | |
| slv-tcu { | |
| cell-id = <0x2a0>; | |
| label = "slv-tcu"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,bus-dev = <0x17>; | |
| qcom,slv-rpm-id = <0x85>; | |
| phandle = <0x2e>; | |
| }; | |
| slv-pcnoc-snoc { | |
| cell-id = <0x271b>; | |
| label = "slv-pcnoc-snoc"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,bus-dev = <0x17>; | |
| qcom,connections = <0x4b>; | |
| qcom,slv-rpm-id = <0x2d>; | |
| phandle = <0x25>; | |
| }; | |
| slv-kpss-ahb { | |
| cell-id = <0x2a1>; | |
| label = "slv-kpss-ahb"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,bus-dev = <0x1c>; | |
| qcom,slv-rpm-id = <0x14>; | |
| phandle = <0x45>; | |
| }; | |
| slv-wcss { | |
| cell-id = <0x248>; | |
| label = "slv-wcss"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,bus-dev = <0x1c>; | |
| qcom,slv-rpm-id = <0x17>; | |
| phandle = <0x44>; | |
| }; | |
| slv-snoc-bimc-0 { | |
| cell-id = <0x2729>; | |
| label = "slv-snoc-bimc-0"; | |
| qcom,buswidth = <0x10>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,bus-dev = <0x21>; | |
| qcom,connections = <0x4c>; | |
| qcom,slv-rpm-id = <0x18>; | |
| phandle = <0x22>; | |
| }; | |
| slv-snoc-bimc-1 { | |
| cell-id = <0x272a>; | |
| label = "slv-snoc-bimc-1"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,bus-dev = <0x1c>; | |
| qcom,connections = <0x4d>; | |
| qcom,slv-rpm-id = <0x68>; | |
| phandle = <0x23>; | |
| }; | |
| slv-snoc-bimc-2 { | |
| cell-id = <0x273e>; | |
| label = "slv-snoc-bimc-2"; | |
| qcom,buswidth = <0x10>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,bus-dev = <0x21>; | |
| qcom,connections = <0x4e>; | |
| qcom,slv-rpm-id = <0x89>; | |
| phandle = <0x20>; | |
| }; | |
| slv-imem { | |
| cell-id = <0x249>; | |
| label = "slv-imem"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,bus-dev = <0x1c>; | |
| qcom,slv-rpm-id = <0x1a>; | |
| phandle = <0x47>; | |
| }; | |
| slv-snoc-pcnoc { | |
| cell-id = <0x273a>; | |
| label = "slv-snoc-pcnoc"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,bus-dev = <0x1c>; | |
| qcom,connections = <0x4f>; | |
| qcom,slv-rpm-id = <0x1c>; | |
| phandle = <0x24>; | |
| }; | |
| slv-qdss-stm { | |
| cell-id = <0x24c>; | |
| label = "slv-qdss-stm"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,bus-dev = <0x1c>; | |
| qcom,slv-rpm-id = <0x1e>; | |
| phandle = <0x46>; | |
| }; | |
| slv-cats-0 { | |
| cell-id = <0x297>; | |
| label = "slv-cats-0"; | |
| qcom,buswidth = <0x10>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,bus-dev = <0x21>; | |
| qcom,slv-rpm-id = <0x6a>; | |
| phandle = <0x48>; | |
| }; | |
| slv-cats-1 { | |
| cell-id = <0x298>; | |
| label = "slv-cats-1"; | |
| qcom,buswidth = <0x08>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,bus-dev = <0x1c>; | |
| qcom,slv-rpm-id = <0x6b>; | |
| phandle = <0x49>; | |
| }; | |
| slv-lpass { | |
| cell-id = <0x20a>; | |
| label = "slv-lpass"; | |
| qcom,buswidth = <0x04>; | |
| qcom,agg-ports = <0x01>; | |
| qcom,ap-owned; | |
| qcom,bus-dev = <0x1c>; | |
| qcom,slv-rpm-id = <0x15>; | |
| phandle = <0x43>; | |
| }; | |
| }; | |
| pinctrl@1000000 { | |
| compatible = "qcom,msm8953-pinctrl"; | |
| reg = <0x1000000 0x300000>; | |
| reg-names = "pinctrl_regs"; | |
| interrupts = <0x00 0xd0 0x00>; | |
| interrupts-extended = <0x01 0x00 0xd0 0x00>; | |
| gpio-controller; | |
| #gpio-cells = <0x02>; | |
| interrupt-controller; | |
| interrupt-parent = <0x50>; | |
| #interrupt-cells = <0x02>; | |
| phandle = <0xf4>; | |
| pmx-uartconsole { | |
| uart_console_active { | |
| phandle = <0x1e0>; | |
| mux { | |
| pins = "gpio4\0gpio5"; | |
| function = "blsp_uart2"; | |
| }; | |
| config { | |
| pins = "gpio4\0gpio5"; | |
| drive-strength = <0x02>; | |
| bias-disable; | |
| }; | |
| }; | |
| uart_console_sleep { | |
| phandle = <0x1e1>; | |
| mux { | |
| pins = "gpio4\0gpio5"; | |
| function = "blsp_uart2"; | |
| }; | |
| config { | |
| pins = "gpio4\0gpio5"; | |
| drive-strength = <0x02>; | |
| bias-pull-down; | |
| }; | |
| }; | |
| uart1_console_active { | |
| phandle = <0x1e2>; | |
| mux { | |
| pins = "gpio20\0gpio21"; | |
| function = "blsp_uart6"; | |
| }; | |
| config { | |
| pins = "gpio20\0gpio21"; | |
| drive-strength = <0x02>; | |
| bias-disable; | |
| }; | |
| }; | |
| uart1_console_sleep { | |
| phandle = <0x1e3>; | |
| mux { | |
| pins = "gpio20\0gpio21"; | |
| function = "blsp_uart6"; | |
| }; | |
| config { | |
| pins = "gpio20\0gpio21"; | |
| drive-strength = <0x02>; | |
| bias-pull-down; | |
| }; | |
| }; | |
| }; | |
| pmx_reset_pa_active { | |
| reset_pa_active { | |
| phandle = <0x11d>; | |
| mux { | |
| pins = "gpio139"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio139"; | |
| drive-strength = <0x08>; | |
| output-high; | |
| bias-pull-up; | |
| }; | |
| }; | |
| }; | |
| pmx_reset_pa_suspend { | |
| reset_pa_suspend { | |
| phandle = <0x11e>; | |
| mux { | |
| pins = "gpio139"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio139"; | |
| drive-strength = <0x02>; | |
| bias-disable; | |
| }; | |
| }; | |
| }; | |
| cci { | |
| cci0_active { | |
| phandle = <0x15f>; | |
| mux { | |
| pins = "gpio29\0gpio30"; | |
| function = "cci_i2c"; | |
| }; | |
| config { | |
| pins = "gpio29\0gpio30"; | |
| drive-strength = <0x02>; | |
| bias-disable; | |
| }; | |
| }; | |
| cci0_suspend { | |
| phandle = <0x161>; | |
| mux { | |
| pins = "gpio29\0gpio30"; | |
| function = "cci_i2c"; | |
| }; | |
| config { | |
| pins = "gpio29\0gpio30"; | |
| drive-strength = <0x02>; | |
| bias-disable; | |
| }; | |
| }; | |
| cci1_active { | |
| phandle = <0x160>; | |
| mux { | |
| pins = "gpio31\0gpio32"; | |
| function = "cci_i2c"; | |
| }; | |
| config { | |
| pins = "gpio31\0gpio32"; | |
| drive-strength = <0x02>; | |
| bias-disable; | |
| }; | |
| }; | |
| cci1_suspend { | |
| phandle = <0x162>; | |
| mux { | |
| pins = "gpio31\0gpio32"; | |
| function = "cci_i2c"; | |
| }; | |
| config { | |
| pins = "gpio31\0gpio32"; | |
| drive-strength = <0x02>; | |
| bias-disable; | |
| }; | |
| }; | |
| }; | |
| cam_sensor_mclk0_default { | |
| phandle = <0x1e4>; | |
| mux { | |
| pins = "gpio26"; | |
| function = "cam_mclk"; | |
| }; | |
| config { | |
| pins = "gpio26"; | |
| bias-disable; | |
| drive-strength = <0x04>; | |
| }; | |
| }; | |
| cam_sensor_mclk0_sleep { | |
| phandle = <0x1e5>; | |
| mux { | |
| pins = "gpio26"; | |
| function = "cam_mclk"; | |
| }; | |
| config { | |
| pins = "gpio26"; | |
| bias-pull-down; | |
| drive-strength = <0x04>; | |
| }; | |
| }; | |
| cam_sensor_rear_default { | |
| phandle = <0x1e6>; | |
| mux { | |
| pins = "gpio40\0gpio39"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio40\0gpio39"; | |
| bias-disable; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| cam_sensor_rear_sleep { | |
| phandle = <0x1e7>; | |
| mux { | |
| pins = "gpio40\0gpio39"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio40\0gpio39"; | |
| bias-disable; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| cam_sensor_ir_cut_default { | |
| phandle = <0x1e8>; | |
| mux { | |
| pins = "gpio38\0gpio39"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio38\0gpio39"; | |
| bias-pull-up; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| cam_sensor_ir_cut_sleep { | |
| phandle = <0x1e9>; | |
| mux { | |
| pins = "gpio38\0gpio39"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio38\0gpio39"; | |
| bias-disable; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| cam_sensor_rear_vdig { | |
| phandle = <0x1ea>; | |
| mux { | |
| pins = "gpio134"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio134"; | |
| bias-disable; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| cam_sensor_rear_vdig_sleep { | |
| phandle = <0x1eb>; | |
| mux { | |
| pins = "gpio134"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio134"; | |
| bias-disable; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| cam_sensor_mclk1_default { | |
| phandle = <0x1ec>; | |
| mux { | |
| pins = "gpio27"; | |
| function = "cam_mclk"; | |
| }; | |
| config { | |
| pins = "gpio27"; | |
| bias-disable; | |
| drive-strength = <0x04>; | |
| }; | |
| }; | |
| cam_sensor_mclk1_sleep { | |
| phandle = <0x1ed>; | |
| mux { | |
| pins = "gpio27"; | |
| function = "cam_mclk"; | |
| }; | |
| config { | |
| pins = "gpio27"; | |
| bias-pull-down; | |
| drive-strength = <0x04>; | |
| }; | |
| }; | |
| cam_sensor_front_default { | |
| phandle = <0x1ee>; | |
| mux { | |
| pins = "gpio131\0gpio132"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio131\0gpio132"; | |
| bias-disable; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| cam_sensor_front_sleep { | |
| phandle = <0x1ef>; | |
| mux { | |
| pins = "gpio131\0gpio132"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio131\0gpio132"; | |
| bias-disable; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| cam_sensor_mclk2_default { | |
| phandle = <0x1f0>; | |
| mux { | |
| pins = "gpio28"; | |
| function = "cam_mclk"; | |
| }; | |
| config { | |
| pins = "gpio28"; | |
| bias-disable; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| cam_sensor_mclk2_sleep { | |
| phandle = <0x1f1>; | |
| mux { | |
| pins = "gpio28"; | |
| function = "cam_mclk"; | |
| }; | |
| config { | |
| pins = "gpio28"; | |
| bias-pull-down; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| cam_sensor_front1_default { | |
| phandle = <0x1f2>; | |
| mux { | |
| pins = "gpio129"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio129"; | |
| bias-disable; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| cam_sensor_front1_sleep { | |
| phandle = <0x1f3>; | |
| mux { | |
| pins = "gpio129"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio129"; | |
| bias-disable; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| pmx_adv7533_int { | |
| phandle = <0x1f4>; | |
| adv7533_int_active { | |
| phandle = <0x1f5>; | |
| mux { | |
| pins = "gpio90"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio90"; | |
| drive-strength = <0x10>; | |
| bias-disable; | |
| }; | |
| }; | |
| adv7533_int_suspend { | |
| phandle = <0x1f6>; | |
| mux { | |
| pins = "gpio90"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio90"; | |
| drive-strength = <0x10>; | |
| bias-disable; | |
| }; | |
| }; | |
| }; | |
| pmx_mdss { | |
| phandle = <0x1f7>; | |
| mdss_dsi_active { | |
| phandle = <0x1f8>; | |
| mux { | |
| pins = "gpio61"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio61"; | |
| drive-strength = <0x08>; | |
| bias-disable = <0x00>; | |
| output-high; | |
| }; | |
| }; | |
| mdss_dsi_suspend { | |
| phandle = <0x1f9>; | |
| mux { | |
| pins = "gpio61"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio61"; | |
| drive-strength = <0x02>; | |
| bias-pull-down; | |
| }; | |
| }; | |
| mdss_dsi_gpio { | |
| phandle = <0x1fa>; | |
| mux { | |
| pins = "gpio141"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio141"; | |
| drive-strength = <0x08>; | |
| bias-pull-down; | |
| output-low; | |
| }; | |
| }; | |
| }; | |
| pmx_mdss_te { | |
| mdss_te_active { | |
| phandle = <0x1fb>; | |
| mux { | |
| pins = "gpio24"; | |
| function = "mdp_vsync"; | |
| }; | |
| config { | |
| pins = "gpio24"; | |
| drive-strength = <0x02>; | |
| bias-pull-down; | |
| }; | |
| }; | |
| mdss_te_suspend { | |
| phandle = <0x1fc>; | |
| mux { | |
| pins = "gpio24"; | |
| function = "mdp_vsync"; | |
| }; | |
| config { | |
| pins = "gpio24"; | |
| drive-strength = <0x02>; | |
| bias-pull-down; | |
| }; | |
| }; | |
| }; | |
| ext_amp_ctrl { | |
| label = "ext_amp_ctrl"; | |
| ext_amp_ctrl_active { | |
| phandle = <0x1fd>; | |
| mux { | |
| pins = "gpio68"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio68"; | |
| drive-strength = <0x08>; | |
| bias-pull-up; | |
| output-high; | |
| }; | |
| }; | |
| ext_amp_ctrl_sleep { | |
| phandle = <0x1fe>; | |
| mux { | |
| pins = "gpio68"; | |
| function = "gpio"; | |
| }; | |
| configs { | |
| pins = "gpio68"; | |
| drive-strength = <0x02>; | |
| bias-pull-down; | |
| }; | |
| }; | |
| }; | |
| cdc_dmic0_clk_act_default { | |
| phandle = <0x1ff>; | |
| mux { | |
| pins = "gpio89"; | |
| function = "dmic0_clk"; | |
| }; | |
| config { | |
| pins = "gpio89"; | |
| drive-strength = <0x08>; | |
| }; | |
| }; | |
| cdc_dmic0_clk_sus_sleep { | |
| phandle = <0x200>; | |
| mux { | |
| pins = "gpio89"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio89"; | |
| drive-strength = <0x02>; | |
| bias-disable; | |
| }; | |
| }; | |
| cdc_dmic0_data_act_default { | |
| phandle = <0x201>; | |
| mux { | |
| pins = "gpio90"; | |
| function = "dmic0_data"; | |
| }; | |
| config { | |
| pins = "gpio90"; | |
| drive-strength = <0x08>; | |
| }; | |
| }; | |
| cdc_dmic0_data_sus_sleep { | |
| phandle = <0x202>; | |
| mux { | |
| pins = "gpio90"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio90"; | |
| drive-strength = <0x02>; | |
| bias-disable; | |
| }; | |
| }; | |
| sec-tlmm-lines { | |
| sec_tlmm_lines_act { | |
| phandle = <0x203>; | |
| mux { | |
| pins = "gpio135\0gpio136\0gpio137\0gpio138"; | |
| function = "sec_mi2s"; | |
| }; | |
| config { | |
| pins = "gpio135\0gpio136\0gpio137\0gpio138"; | |
| drive-strength = <0x08>; | |
| }; | |
| }; | |
| sec_tlmm_lines_sus { | |
| phandle = <0x204>; | |
| mux { | |
| pins = "gpio135\0gpio136\0gpio137\0gpio138"; | |
| function = "sec_mi2s"; | |
| }; | |
| config { | |
| pins = "gpio135\0gpio136\0gpio137\0gpio138"; | |
| drive-strength = <0x02>; | |
| bias-pull-down; | |
| }; | |
| }; | |
| }; | |
| default { | |
| phandle = <0xf6>; | |
| mux { | |
| pins = "gpio12\0gpio13\0gpio14\0gpio15"; | |
| function = "blsp_uart4"; | |
| }; | |
| config { | |
| pins = "gpio12\0gpio13\0gpio14\0gpio15"; | |
| drive-strength = <0x10>; | |
| bias-disable; | |
| }; | |
| }; | |
| sleep { | |
| phandle = <0xf5>; | |
| mux { | |
| pins = "gpio12\0gpio13\0gpio14\0gpio15"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio12\0gpio13\0gpio14\0gpio15"; | |
| drive-strength = <0x02>; | |
| bias-disable; | |
| }; | |
| }; | |
| blsp2_uart0_active { | |
| phandle = <0xf9>; | |
| mux { | |
| pins = "gpio16\0gpio17\0gpio18\0gpio19"; | |
| function = "blsp_uart5"; | |
| }; | |
| config { | |
| pins = "gpio16\0gpio17\0gpio18\0gpio19"; | |
| drive-strength = <0x10>; | |
| bias-disable; | |
| }; | |
| }; | |
| blsp2_uart0_sleep { | |
| phandle = <0xf8>; | |
| mux { | |
| pins = "gpio16\0gpio17\0gpio18\0gpio19"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio16\0gpio17\0gpio18\0gpio19"; | |
| drive-strength = <0x02>; | |
| bias-disable; | |
| }; | |
| }; | |
| blsp2_uart1_active { | |
| phandle = <0xfc>; | |
| mux { | |
| pins = "gpio20\0gpio21\0gpio22\0gpio23"; | |
| function = "blsp_uart6"; | |
| }; | |
| config { | |
| pins = "gpio20\0gpio21\0gpio22\0gpio23"; | |
| drive-strength = <0x10>; | |
| bias-disable; | |
| }; | |
| }; | |
| blsp2_uart1_sleep { | |
| phandle = <0xfb>; | |
| mux { | |
| pins = "gpio20\0gpio21\0gpio22\0gpio23"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio20\0gpio21\0gpio22\0gpio23"; | |
| drive-strength = <0x02>; | |
| bias-disable; | |
| }; | |
| }; | |
| sdc1_clk_on { | |
| phandle = <0x205>; | |
| config { | |
| pins = "sdc1_clk"; | |
| bias-disable; | |
| drive-strength = <0x10>; | |
| }; | |
| }; | |
| sdc1_clk_off { | |
| phandle = <0x206>; | |
| config { | |
| pins = "sdc1_clk"; | |
| bias-disable; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| sdc1_cmd_on { | |
| phandle = <0x207>; | |
| config { | |
| pins = "sdc1_cmd"; | |
| bias-pull-up; | |
| drive-strength = <0x0a>; | |
| }; | |
| }; | |
| sdc1_cmd_off { | |
| phandle = <0x208>; | |
| config { | |
| pins = "sdc1_cmd"; | |
| num-grp-pins = <0x01>; | |
| bias-pull-up; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| sdc1_data_on { | |
| phandle = <0x209>; | |
| config { | |
| pins = "sdc1_data"; | |
| bias-pull-up; | |
| drive-strength = <0x0a>; | |
| }; | |
| }; | |
| sdc1_data_off { | |
| phandle = <0x20a>; | |
| config { | |
| pins = "sdc1_data"; | |
| bias-pull-up; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| sdc1_rclk_on { | |
| phandle = <0x20b>; | |
| config { | |
| pins = "sdc1_rclk"; | |
| bias-pull-down; | |
| }; | |
| }; | |
| sdc1_rclk_off { | |
| phandle = <0x20c>; | |
| config { | |
| pins = "sdc1_rclk"; | |
| bias-pull-down; | |
| }; | |
| }; | |
| sdc2_clk_on { | |
| phandle = <0x20d>; | |
| config { | |
| pins = "sdc2_clk"; | |
| drive-strength = <0x10>; | |
| bias-disable; | |
| }; | |
| }; | |
| sdc2_clk_off { | |
| phandle = <0x20e>; | |
| config { | |
| pins = "sdc2_clk"; | |
| bias-disable; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| sdc2_cmd_on { | |
| phandle = <0x20f>; | |
| config { | |
| pins = "sdc2_cmd"; | |
| bias-pull-up; | |
| drive-strength = <0x0a>; | |
| }; | |
| }; | |
| sdc2_cmd_off { | |
| phandle = <0x210>; | |
| config { | |
| pins = "sdc2_cmd"; | |
| bias-pull-up; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| sdc2_data_on { | |
| phandle = <0x211>; | |
| config { | |
| pins = "sdc2_data"; | |
| bias-pull-up; | |
| drive-strength = <0x0a>; | |
| }; | |
| }; | |
| sdc2_data_off { | |
| phandle = <0x212>; | |
| config { | |
| pins = "sdc2_data"; | |
| bias-pull-up; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| cd_on { | |
| phandle = <0x213>; | |
| mux { | |
| pins = "gpio133"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio133"; | |
| drive-strength = <0x02>; | |
| bias-pull-up; | |
| }; | |
| }; | |
| cd_off { | |
| phandle = <0x214>; | |
| mux { | |
| pins = "gpio133"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio133"; | |
| drive-strength = <0x02>; | |
| bias-disable; | |
| }; | |
| }; | |
| i2c_1 { | |
| i2c_1_active { | |
| phandle = <0x105>; | |
| mux { | |
| pins = "gpio2\0gpio3"; | |
| function = "blsp_i2c1"; | |
| }; | |
| config { | |
| pins = "gpio2\0gpio3"; | |
| drive-strength = <0x02>; | |
| bias-pull-up; | |
| }; | |
| }; | |
| i2c_1_sleep { | |
| phandle = <0x106>; | |
| mux { | |
| pins = "gpio2\0gpio3"; | |
| function = "blsp_i2c1"; | |
| }; | |
| config { | |
| pins = "gpio2\0gpio3"; | |
| drive-strength = <0x02>; | |
| bias-disable; | |
| }; | |
| }; | |
| }; | |
| i2c_2 { | |
| i2c_2_active { | |
| phandle = <0x108>; | |
| mux { | |
| pins = "gpio6\0gpio7"; | |
| function = "blsp_i2c2"; | |
| }; | |
| config { | |
| pins = "gpio6\0gpio7"; | |
| drive-strength = <0x02>; | |
| bias-disable; | |
| }; | |
| }; | |
| i2c_2_sleep { | |
| phandle = <0x109>; | |
| mux { | |
| pins = "gpio6\0gpio7"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio6\0gpio7"; | |
| drive-strength = <0x02>; | |
| bias-disable; | |
| }; | |
| }; | |
| }; | |
| i2c_3 { | |
| i2c_3_active { | |
| phandle = <0x10d>; | |
| mux { | |
| pins = "gpio10\0gpio11"; | |
| function = "blsp_i2c3"; | |
| }; | |
| config { | |
| pins = "gpio10\0gpio11"; | |
| drive-strength = <0x02>; | |
| bias-disable; | |
| }; | |
| }; | |
| i2c_3_sleep { | |
| phandle = <0x10e>; | |
| mux { | |
| pins = "gpio10\0gpio11"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio10\0gpio11"; | |
| drive-strength = <0x02>; | |
| bias-disable; | |
| }; | |
| }; | |
| }; | |
| i2c_5 { | |
| i2c_5_active { | |
| phandle = <0x11a>; | |
| mux { | |
| pins = "gpio18\0gpio19"; | |
| function = "blsp_i2c5"; | |
| }; | |
| config { | |
| pins = "gpio18\0gpio19"; | |
| drive-strength = <0x02>; | |
| bias-disable; | |
| }; | |
| }; | |
| i2c_5_sleep { | |
| phandle = <0x11b>; | |
| mux { | |
| pins = "gpio18\0gpio19"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio18\0gpio19"; | |
| drive-strength = <0x02>; | |
| bias-disable; | |
| }; | |
| }; | |
| }; | |
| nfc { | |
| nfc_int_active { | |
| phandle = <0x215>; | |
| mux { | |
| pins = "gpio17"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio17"; | |
| drive-strength = <0x02>; | |
| bias-pull-up; | |
| }; | |
| }; | |
| nfc_int_suspend { | |
| phandle = <0x216>; | |
| mux { | |
| pins = "gpio17"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio17"; | |
| drive-strength = <0x02>; | |
| bias-pull-up; | |
| }; | |
| }; | |
| nfc_disable_active { | |
| phandle = <0x217>; | |
| mux { | |
| pins = "gpio16\0gpio62\0gpio141"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio16\0gpio62\0gpio141"; | |
| drive-strength = <0x02>; | |
| bias-pull-up; | |
| }; | |
| }; | |
| nfc_disable_suspend { | |
| phandle = <0x218>; | |
| mux { | |
| pins = "gpio16\0gpio62\0gpio141"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio16\0gpio62\0gpio141"; | |
| drive-strength = <0x02>; | |
| bias-disable; | |
| }; | |
| }; | |
| }; | |
| wcnss_pmux_5wire { | |
| wcnss_default { | |
| phandle = <0x14b>; | |
| wcss_wlan2 { | |
| pins = "gpio76"; | |
| function = "wcss_wlan2"; | |
| }; | |
| wcss_wlan1 { | |
| pins = "gpio77"; | |
| function = "wcss_wlan1"; | |
| }; | |
| wcss_wlan0 { | |
| pins = "gpio78"; | |
| function = "wcss_wlan0"; | |
| }; | |
| wcss_wlan { | |
| pins = "gpio79\0gpio80"; | |
| function = "wcss_wlan"; | |
| }; | |
| config { | |
| pins = "gpio76\0gpio77\0gpio78\0gpio79\0gpio80"; | |
| drive-strength = <0x06>; | |
| bias-pull-up; | |
| }; | |
| }; | |
| wcnss_sleep { | |
| phandle = <0x14c>; | |
| wcss_wlan2 { | |
| pins = "gpio76"; | |
| function = "wcss_wlan2"; | |
| }; | |
| wcss_wlan1 { | |
| pins = "gpio77"; | |
| function = "wcss_wlan1"; | |
| }; | |
| wcss_wlan0 { | |
| pins = "gpio78"; | |
| function = "wcss_wlan0"; | |
| }; | |
| wcss_wlan { | |
| pins = "gpio79\0gpio80"; | |
| function = "wcss_wlan"; | |
| }; | |
| config { | |
| pins = "gpio76\0gpio77\0gpio78\0gpio79\0gpio80"; | |
| drive-strength = <0x02>; | |
| bias-pull-down; | |
| }; | |
| }; | |
| }; | |
| wcnss_pmux_gpio { | |
| phandle = <0x219>; | |
| wcnss_gpio_default { | |
| phandle = <0x14d>; | |
| mux { | |
| pins = "gpio76\0gpio77\0gpio78\0gpio79\0gpio80"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio76\0gpio77\0gpio78\0gpio79\0gpio80"; | |
| drive-strength = <0x06>; | |
| bias-pull-up; | |
| }; | |
| }; | |
| }; | |
| wcd9xxx_intr { | |
| wcd_intr_default { | |
| phandle = <0x1b2>; | |
| mux { | |
| pins = "gpio73"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio73"; | |
| drive-strength = <0x02>; | |
| bias-pull-down; | |
| input-enable; | |
| }; | |
| }; | |
| }; | |
| cdc_reset_ctrl { | |
| cdc_reset_sleep { | |
| phandle = <0x1b5>; | |
| mux { | |
| pins = "gpio67"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio67"; | |
| drive-strength = <0x10>; | |
| bias-disable; | |
| output-low; | |
| }; | |
| }; | |
| cdc_reset_active { | |
| phandle = <0x1b4>; | |
| mux { | |
| pins = "gpio67"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio67"; | |
| drive-strength = <0x10>; | |
| bias-pull-down; | |
| output-high; | |
| }; | |
| }; | |
| }; | |
| cdc_mclk2_pin { | |
| cdc_mclk2_sleep { | |
| phandle = <0x21a>; | |
| mux { | |
| pins = "gpio66"; | |
| function = "pri_mi2s"; | |
| }; | |
| config { | |
| pins = "gpio66"; | |
| drive-strength = <0x02>; | |
| bias-pull-down; | |
| }; | |
| }; | |
| cdc_mclk2_active { | |
| phandle = <0x21b>; | |
| mux { | |
| pins = "gpio66"; | |
| function = "pri_mi2s"; | |
| }; | |
| config { | |
| pins = "gpio66"; | |
| drive-strength = <0x08>; | |
| bias-disable; | |
| }; | |
| }; | |
| }; | |
| cdc-pdm-2-lines { | |
| pdm_lines_2_on { | |
| phandle = <0x198>; | |
| mux { | |
| pins = "gpio70\0gpio71\0gpio72"; | |
| function = "cdc_pdm0"; | |
| }; | |
| config { | |
| pins = "gpio70\0gpio71\0gpio72"; | |
| drive-strength = <0x08>; | |
| }; | |
| }; | |
| pdm_lines_2_off { | |
| phandle = <0x19a>; | |
| mux { | |
| pins = "gpio70\0gpio71\0gpio72"; | |
| function = "cdc_pdm0"; | |
| }; | |
| config { | |
| pins = "gpio70\0gpio71\0gpio72"; | |
| drive-strength = <0x02>; | |
| bias-disable; | |
| }; | |
| }; | |
| }; | |
| cdc-pdm-lines { | |
| pdm_lines_on { | |
| phandle = <0x197>; | |
| mux { | |
| pins = "gpio69\0gpio73\0gpio74"; | |
| function = "cdc_pdm0"; | |
| }; | |
| config { | |
| pins = "gpio69\0gpio73\0gpio74"; | |
| drive-strength = <0x08>; | |
| }; | |
| }; | |
| pdm_lines_off { | |
| phandle = <0x199>; | |
| mux { | |
| pins = "gpio69\0gpio73\0gpio74"; | |
| function = "cdc_pdm0"; | |
| }; | |
| config { | |
| pins = "gpio69\0gpio73\0gpio74"; | |
| drive-strength = <0x02>; | |
| bias-disable; | |
| }; | |
| }; | |
| }; | |
| cdc-pdm-comp-lines { | |
| pdm_comp_lines_on { | |
| phandle = <0x195>; | |
| mux { | |
| pins = "gpio67\0gpio68"; | |
| function = "cdc_pdm0"; | |
| }; | |
| config { | |
| pins = "gpio67\0gpio68"; | |
| drive-strength = <0x08>; | |
| }; | |
| }; | |
| pdm_comp_lines_off { | |
| phandle = <0x196>; | |
| mux { | |
| pins = "gpio67\0gpio68"; | |
| function = "cdc_pdm0"; | |
| }; | |
| config { | |
| pins = "gpio67\0gpio68"; | |
| drive-strength = <0x02>; | |
| bias-disable; | |
| }; | |
| }; | |
| }; | |
| cross-conn-det { | |
| lines_on { | |
| phandle = <0x193>; | |
| mux { | |
| pins = "gpio63"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio63"; | |
| drive-strength = <0x08>; | |
| output-low; | |
| bias-pull-down; | |
| }; | |
| }; | |
| lines_off { | |
| phandle = <0x194>; | |
| mux { | |
| pins = "gpio63"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio63"; | |
| drive-strength = <0x02>; | |
| bias-pull-down; | |
| }; | |
| }; | |
| }; | |
| wsa-vi { | |
| wsa_vi_on { | |
| phandle = <0x19f>; | |
| mux { | |
| pins = "gpio94\0gpio95"; | |
| function = "wsa_io"; | |
| }; | |
| config { | |
| pins = "gpio94\0gpio95"; | |
| drive-strength = <0x08>; | |
| bias-disable; | |
| }; | |
| }; | |
| wsa_vi_off { | |
| phandle = <0x1a0>; | |
| mux { | |
| pins = "gpio94\0gpio95"; | |
| function = "wsa_io"; | |
| }; | |
| config { | |
| pins = "gpio94\0gpio95"; | |
| drive-strength = <0x02>; | |
| bias-pull-down; | |
| }; | |
| }; | |
| }; | |
| wsa_reset { | |
| wsa_reset_on { | |
| phandle = <0x1a3>; | |
| mux { | |
| function = "gpio"; | |
| }; | |
| config { | |
| drive-strength = <0x02>; | |
| output-high; | |
| }; | |
| }; | |
| wsa_reset_off { | |
| phandle = <0x1a4>; | |
| mux { | |
| function = "gpio"; | |
| }; | |
| config { | |
| drive-strength = <0x02>; | |
| output-low; | |
| }; | |
| }; | |
| }; | |
| wsa_clk { | |
| wsa_clk_on { | |
| phandle = <0x1a1>; | |
| mux { | |
| pins = "gpio25"; | |
| function = "pri_mi2s_mclk_a"; | |
| }; | |
| config { | |
| pins = "gpio25"; | |
| drive-strength = <0x08>; | |
| output-high; | |
| }; | |
| }; | |
| wsa_clk_off { | |
| phandle = <0x1a2>; | |
| mux { | |
| pins = "gpio25"; | |
| function = "pri_mi2s_mclk_a"; | |
| }; | |
| config { | |
| pins = "gpio25"; | |
| drive-strength = <0x02>; | |
| output-low; | |
| bias-pull-down; | |
| }; | |
| }; | |
| }; | |
| pri-tlmm-lines { | |
| pri_tlmm_lines_act { | |
| phandle = <0x19b>; | |
| mux { | |
| pins = "gpio91\0gpio93"; | |
| function = "pri_mi2s"; | |
| }; | |
| config { | |
| pins = "gpio91\0gpio93"; | |
| drive-strength = <0x08>; | |
| }; | |
| }; | |
| pri_tlmm_lines_sus { | |
| phandle = <0x19d>; | |
| mux { | |
| pins = "gpio91\0gpio93"; | |
| function = "pri_mi2s"; | |
| }; | |
| config { | |
| pins = "gpio91\0gpio93"; | |
| drive-strength = <0x02>; | |
| bias-pull-down; | |
| }; | |
| }; | |
| }; | |
| pri-tlmm-ws-lines { | |
| pri_tlmm_ws_act { | |
| phandle = <0x19c>; | |
| mux { | |
| pins = "gpio92"; | |
| function = "pri_mi2s_ws"; | |
| }; | |
| config { | |
| pins = "gpio92"; | |
| drive-strength = <0x08>; | |
| }; | |
| }; | |
| pri_tlmm_ws_sus { | |
| phandle = <0x19e>; | |
| mux { | |
| pins = "gpio92"; | |
| function = "pri_mi2s_ws"; | |
| }; | |
| config { | |
| pins = "gpio92"; | |
| drive-strength = <0x02>; | |
| bias-pull-down; | |
| }; | |
| }; | |
| }; | |
| spi3 { | |
| spi3_default { | |
| phandle = <0xfd>; | |
| mux { | |
| pins = "gpio8\0gpio9\0gpio11"; | |
| function = "blsp_spi3"; | |
| }; | |
| config { | |
| pins = "gpio8\0gpio9\0gpio11"; | |
| drive-strength = <0x0c>; | |
| bias-disable = <0x00>; | |
| }; | |
| }; | |
| spi3_sleep { | |
| phandle = <0xff>; | |
| mux { | |
| pins = "gpio8\0gpio9\0gpio11"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio8\0gpio9\0gpio11"; | |
| drive-strength = <0x02>; | |
| bias-pull-down; | |
| }; | |
| }; | |
| cs0_active { | |
| phandle = <0xfe>; | |
| mux { | |
| pins = "gpio10"; | |
| function = "blsp_spi3"; | |
| }; | |
| config { | |
| pins = "gpio10"; | |
| drive-strength = <0x02>; | |
| bias-disable = <0x00>; | |
| }; | |
| }; | |
| cs0_sleep { | |
| phandle = <0x100>; | |
| mux { | |
| pins = "gpio10"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio10"; | |
| drive-strength = <0x02>; | |
| bias-disable = <0x00>; | |
| }; | |
| }; | |
| }; | |
| spi6 { | |
| spi6_default { | |
| phandle = <0x101>; | |
| mux { | |
| pins = "gpio20\0gpio21\0gpio23"; | |
| function = "blsp_spi6"; | |
| }; | |
| config { | |
| pins = "gpio20\0gpio21\0gpio23"; | |
| drive-strength = <0x0c>; | |
| bias-disable = <0x00>; | |
| }; | |
| }; | |
| spi6_sleep { | |
| phandle = <0x103>; | |
| mux { | |
| pins = "gpio20\0gpio21\0gpio23"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio20\0gpio21\0gpio23"; | |
| drive-strength = <0x02>; | |
| bias-pull-down; | |
| }; | |
| }; | |
| cs0_active { | |
| phandle = <0x102>; | |
| mux { | |
| pins = "gpio22"; | |
| function = "blsp_spi6"; | |
| }; | |
| config { | |
| pins = "gpio22"; | |
| drive-strength = <0x02>; | |
| bias-disable = <0x00>; | |
| }; | |
| }; | |
| cs0_sleep { | |
| phandle = <0x104>; | |
| mux { | |
| pins = "gpio22"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio22"; | |
| drive-strength = <0x02>; | |
| bias-disable = <0x00>; | |
| }; | |
| }; | |
| }; | |
| ts_int_default { | |
| phandle = <0x110>; | |
| mux { | |
| pins = "gpio65"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio65"; | |
| drive-strength = <0x10>; | |
| input-enable; | |
| bias-disable; | |
| }; | |
| }; | |
| ts_int_output_high { | |
| phandle = <0x111>; | |
| mux { | |
| pins = "gpio65"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio65"; | |
| drive-strength = <0x08>; | |
| output-high; | |
| bias-pull-up; | |
| }; | |
| }; | |
| ts_int_output_low { | |
| phandle = <0x112>; | |
| mux { | |
| pins = "gpio65"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio65"; | |
| drive-strength = <0x08>; | |
| bias-pull-down; | |
| output-low; | |
| }; | |
| }; | |
| ts_int_input { | |
| phandle = <0x113>; | |
| mux { | |
| pins = "gpio65"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio65"; | |
| drive-strength = <0x08>; | |
| input-enable; | |
| bias-disable; | |
| }; | |
| }; | |
| ts_rst_default { | |
| phandle = <0x21c>; | |
| mux { | |
| pins = "gpio64"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio64"; | |
| drive-strength = <0x10>; | |
| input-enable; | |
| bias-disable; | |
| }; | |
| }; | |
| ts_rst_output_high { | |
| phandle = <0x21d>; | |
| mux { | |
| pins = "gpio64"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio64"; | |
| drive-strength = <0x08>; | |
| bias-pull-up; | |
| output-high; | |
| }; | |
| }; | |
| ts_rst_output_low { | |
| phandle = <0x21e>; | |
| mux { | |
| pins = "gpio64"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio64"; | |
| drive-strength = <0x02>; | |
| bias-pull-down; | |
| output-low; | |
| }; | |
| }; | |
| ts_rst_input { | |
| phandle = <0x21f>; | |
| mux { | |
| pins = "gpio64"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio64"; | |
| drive-strength = <0x08>; | |
| input-enable; | |
| bias-disable; | |
| }; | |
| }; | |
| pmx_ts_int_active { | |
| ts_int_active { | |
| phandle = <0x117>; | |
| mux { | |
| pins = "gpio65"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio65"; | |
| drive-strength = <0x08>; | |
| bias-pull-up; | |
| output-high; | |
| }; | |
| }; | |
| }; | |
| pmx_ts_int_suspend { | |
| ts_int_suspend { | |
| phandle = <0x118>; | |
| mux { | |
| pins = "gpio65"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio65"; | |
| drive-strength = <0x08>; | |
| bias-pull-down; | |
| output-low; | |
| }; | |
| }; | |
| }; | |
| pmx_ts_reset_active { | |
| ts_reset_active { | |
| phandle = <0x116>; | |
| mux { | |
| pins = "gpio64"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio64"; | |
| drive-strength = <0x08>; | |
| bias-pull-up; | |
| output-high; | |
| }; | |
| }; | |
| }; | |
| pmx_ts_reset_suspend { | |
| ts_reset_suspend { | |
| phandle = <0x115>; | |
| mux { | |
| pins = "gpio64"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio64"; | |
| drive-strength = <0x08>; | |
| bias-pull-down; | |
| output-low; | |
| }; | |
| }; | |
| }; | |
| pmx_ts_int_release { | |
| ts_as_int { | |
| phandle = <0x119>; | |
| mux { | |
| pins = "gpio65"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio65"; | |
| drive-strength = <0x08>; | |
| input-enable; | |
| bias-disable; | |
| }; | |
| }; | |
| }; | |
| pmx_ts_reset_release { | |
| ts_as_reset { | |
| phandle = <0x114>; | |
| mux { | |
| pins = "gpio64"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio64"; | |
| drive-strength = <0x08>; | |
| input-enable; | |
| bias-disable; | |
| }; | |
| }; | |
| }; | |
| pmx_ts_release { | |
| ts_release { | |
| phandle = <0x220>; | |
| mux { | |
| pins = "gpio65\0gpio64"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio65\0gpio64"; | |
| drive-strength = <0x02>; | |
| bias-pull-down; | |
| }; | |
| }; | |
| }; | |
| tlmm_gpio_key { | |
| gpio_key_active { | |
| phandle = <0x221>; | |
| mux { | |
| pins = "gpio85\0gpio86\0gpio87"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio85\0gpio86\0gpio87"; | |
| drive-strength = <0x02>; | |
| bias-pull-up; | |
| }; | |
| }; | |
| gpio_key_suspend { | |
| phandle = <0x222>; | |
| mux { | |
| pins = "gpio85\0gpio86\0gpio87"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio85\0gpio86\0gpio87"; | |
| drive-strength = <0x02>; | |
| bias-pull-up; | |
| }; | |
| }; | |
| }; | |
| pmx_qdsd_clk { | |
| clk_sdcard { | |
| phandle = <0x223>; | |
| config { | |
| pins = "qdsd_clk"; | |
| bias-disable; | |
| drive-strength = <0x10>; | |
| }; | |
| }; | |
| clk_trace { | |
| phandle = <0x224>; | |
| config { | |
| pins = "qdsd_clk"; | |
| bias-pull-down; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| clk_swdtrc { | |
| phandle = <0x225>; | |
| config { | |
| pins = "qdsd_clk"; | |
| bias-pull-down; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| clk_spmi { | |
| phandle = <0x226>; | |
| config { | |
| pins = "qdsd_clk"; | |
| bias-pull-down; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| }; | |
| pmx_qdsd_cmd { | |
| cmd_sdcard { | |
| phandle = <0x227>; | |
| config { | |
| pins = "qdsd_cmd"; | |
| bias-pull-down; | |
| drive-strength = <0x08>; | |
| }; | |
| }; | |
| cmd_trace { | |
| phandle = <0x228>; | |
| config { | |
| pins = "qdsd_cmd"; | |
| bias-pull-down; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| cmd_uart { | |
| phandle = <0x229>; | |
| config { | |
| pins = "qdsd_cmd"; | |
| bias-pull-up; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| cmd_swdtrc { | |
| phandle = <0x22a>; | |
| config { | |
| pins = "qdsd_cmd"; | |
| bias-pull-up; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| cmd_jtag { | |
| phandle = <0x22b>; | |
| config { | |
| pins = "qdsd_cmd"; | |
| bias-disable; | |
| drive-strength = <0x08>; | |
| }; | |
| }; | |
| cmd_spmi { | |
| phandle = <0x22c>; | |
| config { | |
| pins = "qdsd_cmd"; | |
| bias-pull-down; | |
| drive-strength = <0x0a>; | |
| }; | |
| }; | |
| }; | |
| pmx_qdsd_data0 { | |
| data0_sdcard { | |
| phandle = <0x22d>; | |
| config { | |
| pins = "qdsd_data0"; | |
| bias-pull-down; | |
| drive-strength = <0x08>; | |
| }; | |
| }; | |
| data0_trace { | |
| phandle = <0x22e>; | |
| config { | |
| pins = "qdsd_data0"; | |
| bias-pull-down; | |
| drive-strength = <0x08>; | |
| }; | |
| }; | |
| data0_uart { | |
| phandle = <0x22f>; | |
| config { | |
| pins = "qdsd_data0"; | |
| bias-pull-down; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| data0_swdtrc { | |
| phandle = <0x230>; | |
| config { | |
| pins = "qdsd_data0"; | |
| bias-pull-down; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| data0_jtag { | |
| phandle = <0x231>; | |
| config { | |
| pins = "qdsd_data0"; | |
| bias-pull-up; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| data0_spmi { | |
| phandle = <0x232>; | |
| config { | |
| pins = "qdsd_data0"; | |
| bias-pull-down; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| }; | |
| pmx_qdsd_data1 { | |
| data1_sdcard { | |
| phandle = <0x233>; | |
| config { | |
| pins = "qdsd_data1"; | |
| bias-pull-down; | |
| drive-strength = <0x08>; | |
| }; | |
| }; | |
| data1_trace { | |
| phandle = <0x234>; | |
| config { | |
| pins = "qdsd_data1"; | |
| bias-pull-down; | |
| drive-strength = <0x08>; | |
| }; | |
| }; | |
| data1_uart { | |
| phandle = <0x235>; | |
| config { | |
| pins = "qdsd_data1"; | |
| bias-pull-down; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| data1_swdtrc { | |
| phandle = <0x236>; | |
| config { | |
| pins = "qdsd_data1"; | |
| bias-pull-down; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| data1_jtag { | |
| phandle = <0x237>; | |
| config { | |
| pins = "qdsd_data1"; | |
| bias-pull-down; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| }; | |
| pmx_qdsd_data2 { | |
| data2_sdcard { | |
| phandle = <0x238>; | |
| config { | |
| pins = "qdsd_data2"; | |
| bias-pull-down; | |
| drive-strength = <0x08>; | |
| }; | |
| }; | |
| data2_trace { | |
| phandle = <0x239>; | |
| config { | |
| pins = "qdsd_data2"; | |
| bias-pull-down; | |
| drive-strength = <0x08>; | |
| }; | |
| }; | |
| data2_uart { | |
| phandle = <0x23a>; | |
| config { | |
| pins = "qdsd_data2"; | |
| bias-pull-down; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| data2_swdtrc { | |
| phandle = <0x23b>; | |
| config { | |
| pins = "qdsd_data2"; | |
| bias-pull-down; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| data2_jtag { | |
| phandle = <0x23c>; | |
| config { | |
| pins = "qdsd_data2"; | |
| bias-pull-up; | |
| drive-strength = <0x08>; | |
| }; | |
| }; | |
| }; | |
| pmx_qdsd_data3 { | |
| data3_sdcard { | |
| phandle = <0x23d>; | |
| config { | |
| pins = "qdsd_data3"; | |
| bias-pull-down; | |
| drive-strength = <0x08>; | |
| }; | |
| }; | |
| data3_trace { | |
| phandle = <0x23e>; | |
| config { | |
| pins = "qdsd_data3"; | |
| bias-pull-down; | |
| drive-strength = <0x08>; | |
| }; | |
| }; | |
| data3_uart { | |
| phandle = <0x23f>; | |
| config { | |
| pins = "qdsd_data3"; | |
| bias-pull-up; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| data3_swdtrc { | |
| phandle = <0x240>; | |
| config { | |
| pins = "qdsd_data3"; | |
| bias-pull-up; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| data3_jtag { | |
| phandle = <0x241>; | |
| config { | |
| pins = "qdsd_data3"; | |
| bias-pull-up; | |
| drive-strength = <0x02>; | |
| }; | |
| }; | |
| data3_spmi { | |
| phandle = <0x242>; | |
| config { | |
| pins = "qdsd_data3"; | |
| bias-pull-down; | |
| drive-strength = <0x08>; | |
| }; | |
| }; | |
| }; | |
| ssusb_mode_sel { | |
| phandle = <0x243>; | |
| mux { | |
| pins = "gpio12"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio12"; | |
| drive-strength = <0x02>; | |
| bias-disable; | |
| input-disable; | |
| }; | |
| }; | |
| fp_reset { | |
| fp_reset_high { | |
| phandle = <0x150>; | |
| mux { | |
| pins = "gpio140"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio140"; | |
| driver-strength = <0x02>; | |
| bias-disable; | |
| output-high; | |
| }; | |
| }; | |
| fp_reset_low { | |
| phandle = <0x14f>; | |
| mux { | |
| pins = "gpio140"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio140"; | |
| driver-strength = <0x02>; | |
| bias-disable; | |
| output-low; | |
| }; | |
| }; | |
| }; | |
| fp_irq { | |
| fp_irq_active { | |
| phandle = <0x151>; | |
| mux { | |
| pins = "gpio48"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio48"; | |
| drive-strength = <0x02>; | |
| bias-pull-down; | |
| }; | |
| }; | |
| }; | |
| fp_ldo_en { | |
| fp_ldo_2v8_en { | |
| phandle = <0x152>; | |
| mux { | |
| pins = "gpio47"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio47"; | |
| drive-strength = <0x02>; | |
| bias-pull-up; | |
| out-put-high; | |
| }; | |
| }; | |
| }; | |
| ant_check_irq { | |
| ant_check_irq_state { | |
| phandle = <0x153>; | |
| mux { | |
| pins = "gpio9"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio9"; | |
| drive-strength = <0x06>; | |
| bias-disable; | |
| }; | |
| }; | |
| }; | |
| }; | |
| sdhci@7824900 { | |
| compatible = "qcom,sdhci-msm"; | |
| reg = <0x7824900 0x500 0x7824000 0x800 0x7824e00 0x200 0x119d000 0x04>; | |
| reg-names = "hc_mem\0core_mem\0cmdq_mem\0tlmm_mem"; | |
| interrupts = <0x00 0x7b 0x00 0x00 0x8a 0x00>; | |
| interrupt-names = "hc_irq\0pwr_irq"; | |
| sdhc-msm-crypto = <0x51>; | |
| qcom,bus-width = <0x08>; | |
| qcom,devfreq,freq-table = <0x2faf080 0xbebc200>; | |
| qcom,pm-qos-irq-type = "affine_irq"; | |
| qcom,pm-qos-irq-latency = <0x02 0xd5>; | |
| qcom,pm-qos-cpu-groups = <0x0f 0xf0>; | |
| qcom,pm-qos-cmdq-latency-us = <0x02 0xd5 0x02 0xd5>; | |
| qcom,pm-qos-legacy-latency-us = <0x02 0xd5 0x02 0xd5>; | |
| qcom,msm-bus,name = "sdhc1"; | |
| qcom,msm-bus,num-cases = <0x09>; | |
| qcom,msm-bus,num-paths = <0x01>; | |
| qcom,msm-bus,vectors-KBps = <0x4e 0x200 0x00 0x00 0x4e 0x200 0x416 0xc80 0x4e 0x200 0xcc3e 0x27100 0x4e 0x200 0xff50 0x30d40 0x4e 0x200 0x1fe9e 0x61a80 0x4e 0x200 0x1fe9e 0x61a80 0x4e 0x200 0x3fd3e 0xc3500 0x4e 0x200 0x3fd3e 0xc3500 0x4e 0x200 0x146cc2 0x3e8000>; | |
| qcom,bus-bw-vectors-bps = <0x00 0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100 0xbebc200 0x17d78400 0xffffffff>; | |
| clocks = <0x12 0x691e0caa 0x12 0x9ad6fb96 0x12 0xfd5680a>; | |
| clock-names = "iface_clk\0core_clk\0ice_core_clk"; | |
| qcom,ice-clk-rates = <0x1017df80 0x9896800>; | |
| qcom,large-address-bus; | |
| status = "ok"; | |
| phandle = <0x244>; | |
| vdd-supply = <0x1c7>; | |
| qcom,vdd-voltage-level = <0x2c4020 0x2c4020>; | |
| qcom,vdd-current-level = <0xc8 0x8b290>; | |
| vdd-io-supply = <0x12f>; | |
| qcom,vdd-io-always-on; | |
| qcom,vdd-io-lpm-sup; | |
| qcom,vdd-io-voltage-level = <0x1b7740 0x1b7740>; | |
| qcom,vdd-io-current-level = <0xc8 0x4f588>; | |
| pinctrl-names = "active\0sleep"; | |
| pinctrl-0 = <0x205 0x207 0x209 0x20b>; | |
| pinctrl-1 = <0x206 0x208 0x20a 0x20c>; | |
| qcom,clk-rates = <0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100 0xb71b000 0x16e36000>; | |
| qcom,nonremovable; | |
| qcom,bus-speed-mode = "HS400_1p8v\0HS200_1p8v\0DDR_1p8v"; | |
| }; | |
| cpuss_dump { | |
| compatible = "qcom,cpuss-dump"; | |
| phandle = <0x245>; | |
| qcom,l2_dump0 { | |
| qcom,dump-node = <0x0c>; | |
| qcom,dump-id = <0xc0>; | |
| }; | |
| qcom,l2_dump1 { | |
| qcom,dump-node = <0x0f>; | |
| qcom,dump-id = <0xc1>; | |
| }; | |
| qcom,l1_i_cache0 { | |
| qcom,dump-node = <0x52>; | |
| qcom,dump-id = <0x60>; | |
| }; | |
| qcom,l1_i_cache1 { | |
| qcom,dump-node = <0x53>; | |
| qcom,dump-id = <0x61>; | |
| }; | |
| qcom,l1_i_cache2 { | |
| qcom,dump-node = <0x54>; | |
| qcom,dump-id = <0x62>; | |
| }; | |
| qcom,l1_i_cache3 { | |
| qcom,dump-node = <0x55>; | |
| qcom,dump-id = <0x63>; | |
| }; | |
| qcom,l1_i_cache100 { | |
| qcom,dump-node = <0x56>; | |
| qcom,dump-id = <0x64>; | |
| }; | |
| qcom,l1_i_cache101 { | |
| qcom,dump-node = <0x57>; | |
| qcom,dump-id = <0x65>; | |
| }; | |
| qcom,l1_i_cache102 { | |
| qcom,dump-node = <0x58>; | |
| qcom,dump-id = <0x66>; | |
| }; | |
| qcom,l1_i_cache103 { | |
| qcom,dump-node = <0x59>; | |
| qcom,dump-id = <0x67>; | |
| }; | |
| qcom,l1_d_cache0 { | |
| qcom,dump-node = <0x5a>; | |
| qcom,dump-id = <0x80>; | |
| }; | |
| qcom,l1_d_cache1 { | |
| qcom,dump-node = <0x5b>; | |
| qcom,dump-id = <0x81>; | |
| }; | |
| qcom,l1_d_cache2 { | |
| qcom,dump-node = <0x5c>; | |
| qcom,dump-id = <0x82>; | |
| }; | |
| qcom,l1_d_cache3 { | |
| qcom,dump-node = <0x5d>; | |
| qcom,dump-id = <0x83>; | |
| }; | |
| qcom,l1_d_cache100 { | |
| qcom,dump-node = <0x5e>; | |
| qcom,dump-id = <0x84>; | |
| }; | |
| qcom,l1_d_cache101 { | |
| qcom,dump-node = <0x5f>; | |
| qcom,dump-id = <0x85>; | |
| }; | |
| qcom,l1_d_cache102 { | |
| qcom,dump-node = <0x60>; | |
| qcom,dump-id = <0x86>; | |
| }; | |
| qcom,l1_d_cache103 { | |
| qcom,dump-node = <0x61>; | |
| qcom,dump-id = <0x87>; | |
| }; | |
| qcom,l1_tlb_dump0 { | |
| qcom,dump-node = <0x62>; | |
| qcom,dump-id = <0x20>; | |
| }; | |
| qcom,l1_tlb_dump1 { | |
| qcom,dump-node = <0x63>; | |
| qcom,dump-id = <0x21>; | |
| }; | |
| qcom,l1_tlb_dump2 { | |
| qcom,dump-node = <0x64>; | |
| qcom,dump-id = <0x22>; | |
| }; | |
| qcom,l1_tlb_dump3 { | |
| qcom,dump-node = <0x65>; | |
| qcom,dump-id = <0x23>; | |
| }; | |
| qcom,l1_tlb_dump100 { | |
| qcom,dump-node = <0x66>; | |
| qcom,dump-id = <0x24>; | |
| }; | |
| qcom,l1_tlb_dump101 { | |
| qcom,dump-node = <0x67>; | |
| qcom,dump-id = <0x25>; | |
| }; | |
| qcom,l1_tlb_dump102 { | |
| qcom,dump-node = <0x68>; | |
| qcom,dump-id = <0x26>; | |
| }; | |
| qcom,l1_tlb_dump103 { | |
| qcom,dump-node = <0x69>; | |
| qcom,dump-id = <0x27>; | |
| }; | |
| }; | |
| qcom,spm@b1d2000 { | |
| compatible = "qcom,spm-v2"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| reg = <0xb1d2000 0x1000>; | |
| reg-names = "saw-base"; | |
| qcom,name = "system-cci"; | |
| qcom,saw2-ver-reg = <0xfd0>; | |
| qcom,saw2-cfg = <0x14>; | |
| qcom,saw2-spm-dly = <0x3c102800>; | |
| qcom,saw2-spm-ctl = <0x0e>; | |
| qcom,saw2-avs-ctl = <0x10>; | |
| qcom,cpu-vctl-list = <0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09>; | |
| qcom,vctl-timeout-us = <0x1f4>; | |
| qcom,vctl-port = <0x00>; | |
| qcom,phase-port = <0x01>; | |
| qcom,pfm-port = <0x02>; | |
| }; | |
| qcom,lpm-levels { | |
| compatible = "qcom,lpm-levels"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| qcom,pm-cluster@0 { | |
| reg = <0x00>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| label = "system"; | |
| qcom,psci-mode-shift = <0x08>; | |
| qcom,psci-mode-mask = <0x0f>; | |
| qcom,pm-cluster-level@0 { | |
| reg = <0x00>; | |
| label = "system-active"; | |
| qcom,psci-mode = <0x00>; | |
| qcom,latency-us = <0x1a7>; | |
| qcom,ss-power = <0x15d>; | |
| qcom,energy-overhead = <0x49066>; | |
| qcom,time-overhead = <0x2cf>; | |
| }; | |
| qcom,pm-cluster-level@1 { | |
| reg = <0x01>; | |
| label = "system-wfi"; | |
| qcom,psci-mode = <0x01>; | |
| qcom,latency-us = <0x1e0>; | |
| qcom,ss-power = <0x15c>; | |
| qcom,energy-overhead = <0x4ca85>; | |
| qcom,time-overhead = <0x2f1>; | |
| qcom,min-child-idx = <0x03>; | |
| }; | |
| qcom,pm-cluster-level@2 { | |
| reg = <0x02>; | |
| label = "system-pc"; | |
| qcom,psci-mode = <0x03>; | |
| qcom,latency-us = <0x2b13>; | |
| qcom,ss-power = <0x154>; | |
| qcom,energy-overhead = <0x96663>; | |
| qcom,time-overhead = <0x5d7>; | |
| qcom,min-child-idx = <0x03>; | |
| qcom,notify-rpm; | |
| qcom,is-reset; | |
| qcom,reset-level = <0x03>; | |
| }; | |
| qcom,pm-cluster@0 { | |
| reg = <0x00>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| label = "pwr"; | |
| qcom,psci-mode-shift = <0x04>; | |
| qcom,psci-mode-mask = <0x0f>; | |
| qcom,pm-cluster-level@0 { | |
| reg = <0x00>; | |
| label = "pwr-l2-wfi"; | |
| qcom,psci-mode = <0x01>; | |
| qcom,latency-us = <0xb4>; | |
| qcom,ss-power = <0x169>; | |
| qcom,energy-overhead = <0x1ba3f>; | |
| qcom,time-overhead = <0x10e>; | |
| }; | |
| qcom,pm-cluster-level@1 { | |
| reg = <0x01>; | |
| label = "pwr-l2-retention"; | |
| qcom,psci-mode = <0x03>; | |
| qcom,latency-us = <0xbc>; | |
| qcom,ss-power = <0x168>; | |
| qcom,energy-overhead = <0x1d9b7>; | |
| qcom,time-overhead = <0x133>; | |
| qcom,min-child-idx = <0x01>; | |
| qcom,reset-level = <0x01>; | |
| }; | |
| qcom,pm-cluster-level@2 { | |
| reg = <0x02>; | |
| label = "pwr-l2-gdhs"; | |
| qcom,psci-mode = <0x04>; | |
| qcom,latency-us = <0xd4>; | |
| qcom,ss-power = <0x162>; | |
| qcom,energy-overhead = <0x24cdc>; | |
| qcom,time-overhead = <0x16b>; | |
| qcom,min-child-idx = <0x01>; | |
| qcom,reset-level = <0x02>; | |
| }; | |
| qcom,pm-cluster-level@3 { | |
| reg = <0x03>; | |
| label = "pwr-l2-pc"; | |
| qcom,psci-mode = <0x05>; | |
| qcom,latency-us = <0x1a5>; | |
| qcom,ss-power = <0x15e>; | |
| qcom,energy-overhead = <0x43be7>; | |
| qcom,time-overhead = <0x2b2>; | |
| qcom,min-child-idx = <0x01>; | |
| qcom,is-reset; | |
| qcom,reset-level = <0x03>; | |
| }; | |
| qcom,pm-cpu { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| qcom,psci-mode-shift = <0x00>; | |
| qcom,psci-mode-mask = <0x0f>; | |
| qcom,use-prediction; | |
| qcom,cpu = <0x02 0x03 0x04 0x05>; | |
| qcom,pm-cpu-level@0 { | |
| reg = <0x00>; | |
| label = "wfi"; | |
| qcom,psci-cpu-mode = <0x01>; | |
| qcom,latency-us = <0x01>; | |
| qcom,ss-power = <0x18b>; | |
| qcom,energy-overhead = <0x76d8>; | |
| qcom,time-overhead = <0x3d>; | |
| }; | |
| qcom,pm-cpu-level@1 { | |
| reg = <0x01>; | |
| label = "pc"; | |
| qcom,psci-cpu-mode = <0x03>; | |
| qcom,latency-us = <0xb4>; | |
| qcom,ss-power = <0x169>; | |
| qcom,energy-overhead = <0x1ba3f>; | |
| qcom,time-overhead = <0x10e>; | |
| qcom,use-broadcast-timer; | |
| qcom,is-reset; | |
| qcom,reset-level = <0x03>; | |
| }; | |
| }; | |
| }; | |
| qcom,pm-cluster@1 { | |
| reg = <0x01>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| label = "perf"; | |
| qcom,psci-mode-shift = <0x04>; | |
| qcom,psci-mode-mask = <0x0f>; | |
| qcom,pm-cluster-level@0 { | |
| reg = <0x00>; | |
| label = "perf-l2-wfi"; | |
| qcom,psci-mode = <0x01>; | |
| qcom,latency-us = <0xb3>; | |
| qcom,ss-power = <0x16a>; | |
| qcom,energy-overhead = <0x1ba5a>; | |
| qcom,time-overhead = <0x10c>; | |
| }; | |
| qcom,pm-cluster-level@1 { | |
| reg = <0x01>; | |
| label = "perf-l2-retention"; | |
| qcom,psci-mode = <0x03>; | |
| qcom,latency-us = <0xba>; | |
| qcom,ss-power = <0x169>; | |
| qcom,energy-overhead = <0x1ec1e>; | |
| qcom,time-overhead = <0x132>; | |
| qcom,min-child-idx = <0x01>; | |
| qcom,reset-level = <0x01>; | |
| }; | |
| qcom,pm-cluster-level@2 { | |
| reg = <0x02>; | |
| label = "perf-l2-gdhs"; | |
| qcom,psci-mode = <0x04>; | |
| qcom,latency-us = <0xd2>; | |
| qcom,ss-power = <0x163>; | |
| qcom,energy-overhead = <0x26050>; | |
| qcom,time-overhead = <0x169>; | |
| qcom,min-child-idx = <0x01>; | |
| qcom,reset-level = <0x02>; | |
| }; | |
| qcom,pm-cluster-level@3 { | |
| reg = <0x03>; | |
| label = "perf-l2-pc"; | |
| qcom,psci-mode = <0x05>; | |
| qcom,latency-us = <0x1a7>; | |
| qcom,ss-power = <0x15d>; | |
| qcom,energy-overhead = <0x49066>; | |
| qcom,time-overhead = <0x2cf>; | |
| qcom,min-child-idx = <0x01>; | |
| qcom,is-reset; | |
| qcom,reset-level = <0x03>; | |
| }; | |
| qcom,pm-cpu { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| qcom,psci-mode-shift = <0x00>; | |
| qcom,psci-mode-mask = <0x0f>; | |
| qcom,use-prediction; | |
| qcom,cpu = <0x06 0x07 0x08 0x09>; | |
| qcom,pm-cpu-level@0 { | |
| reg = <0x00>; | |
| label = "wfi"; | |
| qcom,psci-cpu-mode = <0x01>; | |
| qcom,latency-us = <0x01>; | |
| qcom,ss-power = <0x18d>; | |
| qcom,energy-overhead = <0x76d8>; | |
| qcom,time-overhead = <0x3d>; | |
| }; | |
| qcom,pm-cpu-level@1 { | |
| reg = <0x01>; | |
| label = "pc"; | |
| qcom,psci-cpu-mode = <0x03>; | |
| qcom,latency-us = <0xb3>; | |
| qcom,ss-power = <0x16a>; | |
| qcom,energy-overhead = <0x1ba5a>; | |
| qcom,time-overhead = <0x10c>; | |
| qcom,use-broadcast-timer; | |
| qcom,is-reset; | |
| qcom,reset-level = <0x03>; | |
| }; | |
| }; | |
| }; | |
| }; | |
| }; | |
| qcom,rpm-stats@200000 { | |
| compatible = "qcom,rpm-stats"; | |
| reg = <0x200000 0x1000 0x290014 0x04 0x29001c 0x04>; | |
| reg-names = "phys_addr_base\0offset_addr"; | |
| }; | |
| qcom,rpm-master-stats@60150 { | |
| compatible = "qcom,rpm-master-stats"; | |
| reg = <0x60150 0x5000>; | |
| qcom,masters = "APSS\0MPSS\0PRONTO\0TZ\0LPASS"; | |
| qcom,master-stats-version = <0x02>; | |
| qcom,master-offset = <0x1000>; | |
| }; | |
| devfreq_spdm_cpu { | |
| compatible = "qcom,devfreq_spdm"; | |
| qcom,msm-bus,name = "devfreq_spdm"; | |
| qcom,msm-bus,num-cases = <0x02>; | |
| qcom,msm-bus,num-paths = <0x01>; | |
| qcom,msm-bus,vectors-KBps = <0x01 0x200 0x00 0x00 0x01 0x200 0x00 0x00>; | |
| qcom,msm-bus,active-only; | |
| qcom,spdm-client = <0x00>; | |
| clock-names = "cci_clk"; | |
| clocks = <0x6a 0x96854074>; | |
| qcom,bw-upstep = <0x190>; | |
| qcom,bw-dwnstep = <0x1068>; | |
| qcom,max-vote = <0x1068>; | |
| qcom,up-step-multp = <0x02>; | |
| qcom,spdm-interval = <0x1e>; | |
| qcom,ports = <0x0b>; | |
| qcom,alpha-up = <0x08>; | |
| qcom,alpha-down = <0x0f>; | |
| qcom,bucket-size = <0x08>; | |
| qcom,pl-freqs = <0x38270 0xbbfd0>; | |
| qcom,reject-rate = <0x1388 0x1388 0x1388 0x1388 0x1388 0x1388>; | |
| qcom,response-time-us = <0x1770 0x1770 0xfa0 0xfa0 0x7d0 0x7d0>; | |
| qcom,cci-response-time-us = <0xfa0 0xfa0 0xbb8 0xbb8 0x7d0 0x7d0>; | |
| qcom,max-cci-freq = <0xd4670>; | |
| status = "disabled"; | |
| }; | |
| devfreq_spdm_gov { | |
| compatible = "qcom,gov_spdm_hyp"; | |
| interrupt-names = "spdm-irq"; | |
| interrupts = <0x00 0xc0 0x00>; | |
| status = "disabled"; | |
| }; | |
| tmc@6028000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0x3b961>; | |
| reg = <0x6028000 0x1000 0x6044000 0x15000>; | |
| reg-names = "tmc-base\0bam-base"; | |
| interrupts = <0x00 0xa6 0x00>; | |
| interrupt-names = "byte-cntr-irq"; | |
| arm,buffer-size = <0x100000>; | |
| arm,sg-enable; | |
| qcom,force-reg-dump; | |
| coresight-name = "coresight-tmc-etr"; | |
| coresight-csr = <0x6b>; | |
| coresight-ctis = <0x6c 0x6d>; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x246>; | |
| port { | |
| endpoint { | |
| slave-mode; | |
| remote-endpoint = <0x6e>; | |
| phandle = <0x71>; | |
| }; | |
| }; | |
| }; | |
| tmc@6027000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0x3b961>; | |
| reg = <0x6027000 0x1000>; | |
| reg-names = "tmc-base"; | |
| coresight-name = "coresight-tmc-etf"; | |
| coresight-csr = <0x6b>; | |
| arm,default-sink; | |
| qcom,force-reg-dump; | |
| coresight-ctis = <0x6c 0x6d>; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x247>; | |
| ports { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| port@0 { | |
| endpoint { | |
| remote-endpoint = <0x6f>; | |
| phandle = <0x72>; | |
| }; | |
| }; | |
| port@1 { | |
| reg = <0x00>; | |
| endpoint { | |
| slave-mode; | |
| remote-endpoint = <0x70>; | |
| phandle = <0x73>; | |
| }; | |
| }; | |
| }; | |
| }; | |
| replicator@6026000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0x3b909>; | |
| reg = <0x6026000 0x1000>; | |
| reg-names = "replicator-base"; | |
| coresight-name = "coresight-replicator"; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x248>; | |
| ports { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| port@0 { | |
| endpoint { | |
| remote-endpoint = <0x71>; | |
| phandle = <0x6e>; | |
| }; | |
| }; | |
| port@1 { | |
| reg = <0x00>; | |
| endpoint { | |
| slave-mode; | |
| remote-endpoint = <0x72>; | |
| phandle = <0x6f>; | |
| }; | |
| }; | |
| }; | |
| }; | |
| funnel@6021000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0x3b908>; | |
| reg = <0x6021000 0x1000>; | |
| reg-names = "funnel-base"; | |
| coresight-name = "coresight-funnel-in0"; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x249>; | |
| ports { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| port@0 { | |
| endpoint { | |
| remote-endpoint = <0x73>; | |
| phandle = <0x70>; | |
| }; | |
| }; | |
| port@1 { | |
| reg = <0x07>; | |
| endpoint { | |
| slave-mode; | |
| remote-endpoint = <0x74>; | |
| phandle = <0x96>; | |
| }; | |
| }; | |
| port@2 { | |
| reg = <0x06>; | |
| endpoint { | |
| slave-mode; | |
| remote-endpoint = <0x75>; | |
| phandle = <0x9d>; | |
| }; | |
| }; | |
| port@3 { | |
| reg = <0x03>; | |
| endpoint { | |
| slave-mode; | |
| remote-endpoint = <0x76>; | |
| phandle = <0x79>; | |
| }; | |
| }; | |
| port@4 { | |
| reg = <0x04>; | |
| endpoint { | |
| slave-mode; | |
| remote-endpoint = <0x77>; | |
| phandle = <0x7c>; | |
| }; | |
| }; | |
| port@5 { | |
| reg = <0x05>; | |
| endpoint { | |
| slave-mode; | |
| remote-endpoint = <0x78>; | |
| phandle = <0x80>; | |
| }; | |
| }; | |
| }; | |
| }; | |
| funnel@6100000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0x3b908>; | |
| reg = <0x6100000 0x1000>; | |
| reg-names = "funnel-base"; | |
| coresight-name = "coresight-funnel-center"; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x24a>; | |
| ports { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| port@0 { | |
| endpoint { | |
| remote-endpoint = <0x79>; | |
| phandle = <0x76>; | |
| }; | |
| }; | |
| port@1 { | |
| reg = <0x00>; | |
| endpoint { | |
| slave-mode; | |
| remote-endpoint = <0x7a>; | |
| phandle = <0x98>; | |
| }; | |
| }; | |
| port@2 { | |
| reg = <0x02>; | |
| endpoint { | |
| slave-mode; | |
| remote-endpoint = <0x7b>; | |
| phandle = <0x9c>; | |
| }; | |
| }; | |
| }; | |
| }; | |
| funnel@6120000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0x3b908>; | |
| reg = <0x6120000 0x1000>; | |
| reg-names = "funnel-base"; | |
| coresight-name = "coresight-funnel-right"; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x24b>; | |
| ports { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| port@0 { | |
| endpoint { | |
| remote-endpoint = <0x7c>; | |
| phandle = <0x77>; | |
| }; | |
| }; | |
| port@1 { | |
| reg = <0x01>; | |
| endpoint { | |
| slave-mode; | |
| remote-endpoint = <0x7d>; | |
| phandle = <0x9b>; | |
| }; | |
| }; | |
| port@2 { | |
| reg = <0x02>; | |
| endpoint { | |
| slave-mode; | |
| remote-endpoint = <0x7e>; | |
| phandle = <0x9a>; | |
| }; | |
| }; | |
| port@3 { | |
| reg = <0x03>; | |
| endpoint { | |
| slave-mode; | |
| remote-endpoint = <0x7f>; | |
| phandle = <0x86>; | |
| }; | |
| }; | |
| }; | |
| }; | |
| funnel@6130000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0x3b908>; | |
| reg = <0x6130000 0x1000>; | |
| reg-names = "funnel-base"; | |
| coresight-name = "coresight-funnel-mm"; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x24c>; | |
| ports { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| port@0 { | |
| endpoint { | |
| remote-endpoint = <0x80>; | |
| phandle = <0x78>; | |
| }; | |
| }; | |
| port@1 { | |
| reg = <0x00>; | |
| endpoint { | |
| slave-mode; | |
| remote-endpoint = <0x81>; | |
| phandle = <0x97>; | |
| }; | |
| }; | |
| port@2 { | |
| reg = <0x04>; | |
| endpoint { | |
| slave-mode; | |
| remote-endpoint = <0x82>; | |
| phandle = <0x85>; | |
| }; | |
| }; | |
| port@3 { | |
| reg = <0x05>; | |
| endpoint { | |
| slave-mode; | |
| remote-endpoint = <0x83>; | |
| phandle = <0x99>; | |
| }; | |
| }; | |
| port@4 { | |
| reg = <0x06>; | |
| endpoint { | |
| slave-mode; | |
| remote-endpoint = <0x84>; | |
| phandle = <0xad>; | |
| }; | |
| }; | |
| }; | |
| }; | |
| funnel@6132000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0x3b908>; | |
| reg = <0x6132000 0x1000>; | |
| reg-names = "funnel-base"; | |
| coresight-name = "coresight-funnel-cam"; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x24d>; | |
| port { | |
| endpoint { | |
| remote-endpoint = <0x85>; | |
| phandle = <0x82>; | |
| }; | |
| }; | |
| }; | |
| funnel@61d0000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0x3b908>; | |
| reg = <0x61d0000 0x1000>; | |
| reg-names = "funnel-base"; | |
| coresight-name = "coresight-funnel-apss1"; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x24e>; | |
| ports { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| port@0 { | |
| endpoint { | |
| remote-endpoint = <0x86>; | |
| phandle = <0x7f>; | |
| }; | |
| }; | |
| port@1 { | |
| reg = <0x00>; | |
| endpoint { | |
| slave-mode; | |
| remote-endpoint = <0x87>; | |
| phandle = <0x88>; | |
| }; | |
| }; | |
| }; | |
| }; | |
| funnel@61a1000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0x3b908>; | |
| reg = <0x61a1000 0x1000>; | |
| reg-names = "funnel-base"; | |
| coresight-name = "coresight-funnel-apss0"; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x24f>; | |
| ports { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| port@0 { | |
| endpoint { | |
| remote-endpoint = <0x88>; | |
| phandle = <0x87>; | |
| }; | |
| }; | |
| port@1 { | |
| reg = <0x00>; | |
| endpoint { | |
| slave-mode; | |
| remote-endpoint = <0x89>; | |
| phandle = <0x91>; | |
| }; | |
| }; | |
| port@2 { | |
| reg = <0x01>; | |
| endpoint { | |
| slave-mode; | |
| remote-endpoint = <0x8a>; | |
| phandle = <0x92>; | |
| }; | |
| }; | |
| port@3 { | |
| reg = <0x02>; | |
| endpoint { | |
| slave-mode; | |
| remote-endpoint = <0x8b>; | |
| phandle = <0x93>; | |
| }; | |
| }; | |
| port@4 { | |
| reg = <0x03>; | |
| endpoint { | |
| slave-mode; | |
| remote-endpoint = <0x8c>; | |
| phandle = <0x94>; | |
| }; | |
| }; | |
| port@5 { | |
| reg = <0x04>; | |
| endpoint { | |
| slave-mode; | |
| remote-endpoint = <0x8d>; | |
| phandle = <0x1b6>; | |
| }; | |
| }; | |
| port@6 { | |
| reg = <0x05>; | |
| endpoint { | |
| slave-mode; | |
| remote-endpoint = <0x8e>; | |
| phandle = <0x1b7>; | |
| }; | |
| }; | |
| port@7 { | |
| reg = <0x06>; | |
| endpoint { | |
| slave-mode; | |
| remote-endpoint = <0x8f>; | |
| phandle = <0x1b8>; | |
| }; | |
| }; | |
| port@8 { | |
| reg = <0x07>; | |
| endpoint { | |
| slave-mode; | |
| remote-endpoint = <0x90>; | |
| phandle = <0x95>; | |
| }; | |
| }; | |
| }; | |
| }; | |
| etm@619c000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0xbb95d>; | |
| reg = <0x619c000 0x1000>; | |
| cpu = <0x02>; | |
| qcom,tupwr-disable; | |
| coresight-name = "coresight-etm0"; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x250>; | |
| port { | |
| endpoint { | |
| remote-endpoint = <0x91>; | |
| phandle = <0x89>; | |
| }; | |
| }; | |
| }; | |
| etm@619d000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0xbb95d>; | |
| reg = <0x619d000 0x1000>; | |
| cpu = <0x03>; | |
| coresight-name = "coresight-etm1"; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x251>; | |
| port { | |
| endpoint { | |
| remote-endpoint = <0x92>; | |
| phandle = <0x8a>; | |
| }; | |
| }; | |
| }; | |
| etm@619e000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0xbb95d>; | |
| reg = <0x619e000 0x1000>; | |
| cpu = <0x04>; | |
| coresight-name = "coresight-etm2"; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x252>; | |
| port { | |
| endpoint { | |
| remote-endpoint = <0x93>; | |
| phandle = <0x8b>; | |
| }; | |
| }; | |
| }; | |
| etm@619f000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0xbb95d>; | |
| reg = <0x619f000 0x1000>; | |
| cpu = <0x05>; | |
| coresight-name = "coresight-etm3"; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x253>; | |
| port { | |
| endpoint { | |
| remote-endpoint = <0x94>; | |
| phandle = <0x8c>; | |
| }; | |
| }; | |
| }; | |
| etm@61bf000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0xbb959>; | |
| reg = <0x61bf000 0x1000>; | |
| coresight-name = "coresight-etm7"; | |
| cpu = <0x09>; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x254>; | |
| port { | |
| endpoint { | |
| remote-endpoint = <0x95>; | |
| phandle = <0x90>; | |
| }; | |
| }; | |
| }; | |
| stm@6002000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0x3b962>; | |
| reg = <0x6002000 0x1000 0x9280000 0x180000>; | |
| reg-names = "stm-base\0stm-stimulus-base"; | |
| coresight-name = "coresight-stm"; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x255>; | |
| port { | |
| endpoint { | |
| remote-endpoint = <0x96>; | |
| phandle = <0x74>; | |
| }; | |
| }; | |
| }; | |
| cti@6010000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0x3b966>; | |
| reg = <0x6010000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-name = "coresight-cti0"; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x6c>; | |
| }; | |
| cti@6011000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0x3b966>; | |
| reg = <0x6011000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-name = "coresight-cti1"; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x256>; | |
| }; | |
| cti@6012000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0x3b966>; | |
| reg = <0x6012000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-name = "coresight-cti2"; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x257>; | |
| }; | |
| cti@6013000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0x3b966>; | |
| reg = <0x6013000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-name = "coresight-cti3"; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x258>; | |
| }; | |
| cti@6014000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0x3b966>; | |
| reg = <0x6014000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-name = "coresight-cti4"; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x259>; | |
| }; | |
| cti@6015000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0x3b966>; | |
| reg = <0x6015000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-name = "coresight-cti5"; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x25a>; | |
| }; | |
| cti@6016000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0x3b966>; | |
| reg = <0x6016000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-name = "coresight-cti6"; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x25b>; | |
| }; | |
| cti@6017000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0x3b966>; | |
| reg = <0x6017000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-name = "coresight-cti7"; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x25c>; | |
| }; | |
| cti@6018000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0x3b966>; | |
| reg = <0x6018000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-name = "coresight-cti8"; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x6d>; | |
| }; | |
| cti@6019000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0x3b966>; | |
| reg = <0x6019000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-name = "coresight-cti9"; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x25d>; | |
| }; | |
| cti@601a000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0x3b966>; | |
| reg = <0x601a000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-name = "coresight-cti10"; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x25e>; | |
| }; | |
| cti@601b000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0x3b966>; | |
| reg = <0x601b000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-name = "coresight-cti11"; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x25f>; | |
| }; | |
| cti@601c000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0x3b966>; | |
| reg = <0x601c000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-name = "coresight-cti12"; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x260>; | |
| }; | |
| cti@601d000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0x3b966>; | |
| reg = <0x601d000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-name = "coresight-cti13"; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x261>; | |
| }; | |
| cti@601e000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0x3b966>; | |
| reg = <0x601e000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-name = "coresight-cti14"; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x262>; | |
| }; | |
| cti@601f000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0x3b966>; | |
| reg = <0x601f000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-name = "coresight-cti15"; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x263>; | |
| }; | |
| cti@6198000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0x3b966>; | |
| reg = <0x6198000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-name = "coresight-cti-cpu0"; | |
| cpu = <0x02>; | |
| qcom,cit-save; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x264>; | |
| }; | |
| cti@6199000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0x3b966>; | |
| reg = <0x6199000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-name = "coresight-cti-cpu1"; | |
| cpu = <0x03>; | |
| qcom,cit-save; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x265>; | |
| }; | |
| cti@619a000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0x3b966>; | |
| reg = <0x619a000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-name = "coresight-cti-cpu2"; | |
| cpu = <0x04>; | |
| qcom,cit-save; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x266>; | |
| }; | |
| cti@619b000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0x3b966>; | |
| reg = <0x619b000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-name = "coresight-cti-cpu3"; | |
| cpu = <0x05>; | |
| qcom,cit-save; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x267>; | |
| }; | |
| cti@61b9000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0x3b966>; | |
| reg = <0x61b9000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-name = "coresight-cti-cpu6"; | |
| cpu = <0x08>; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| qcom,cti-save; | |
| phandle = <0x268>; | |
| }; | |
| cti@6128000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0x3b966>; | |
| reg = <0x6128000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-name = "coresight-cti-modem-cpu0"; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x269>; | |
| }; | |
| cti@6124000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0x3b966>; | |
| reg = <0x6124000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-name = "coresight-cti-modem-cpu1"; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x26a>; | |
| }; | |
| cti@6134000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0x3b966>; | |
| reg = <0x6134000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-name = "coresight-cti-video-cpu0"; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x26b>; | |
| }; | |
| cti@6139000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0x3b966>; | |
| reg = <0x6139000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-name = "coresight-cti-wcn-cpu0"; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x26c>; | |
| }; | |
| cti@613c000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0x3b966>; | |
| reg = <0x613c000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-name = "coresight-cti-audio-cpu0"; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x26d>; | |
| }; | |
| cti@610c000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0x3b966>; | |
| reg = <0x610c000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-name = "coresight-cti-rpm-cpu0"; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x26e>; | |
| }; | |
| wcn_etm0 { | |
| compatible = "qcom,coresight-remote-etm"; | |
| coresight-name = "coresight-wcn-etm0"; | |
| qcom,inst-id = <0x03>; | |
| port { | |
| endpoint { | |
| remote-endpoint = <0x97>; | |
| phandle = <0x81>; | |
| }; | |
| }; | |
| }; | |
| rpm_etm0 { | |
| compatible = "qcom,coresight-remote-etm"; | |
| coresight-name = "coresight-rpm-etm0"; | |
| qcom,inst-id = <0x04>; | |
| port { | |
| endpoint { | |
| remote-endpoint = <0x98>; | |
| phandle = <0x7a>; | |
| }; | |
| }; | |
| }; | |
| audio_etm0 { | |
| compatible = "qcom,coresight-remote-etm"; | |
| coresight-name = "coresight-audio-etm0"; | |
| qcom,inst-id = <0x05>; | |
| port { | |
| endpoint { | |
| remote-endpoint = <0x99>; | |
| phandle = <0x83>; | |
| }; | |
| }; | |
| }; | |
| modem_etm0 { | |
| compatible = "qcom,coresight-remote-etm"; | |
| coresight-name = "coresight-modem-etm0"; | |
| qcom,inst-id = <0x0b>; | |
| port { | |
| endpoint { | |
| remote-endpoint = <0x9a>; | |
| phandle = <0x7e>; | |
| }; | |
| }; | |
| }; | |
| modem_etm1 { | |
| compatible = "qcom,coresight-remote-etm"; | |
| coresight-name = "coresight-modem-etm1"; | |
| qcom,inst-id = <0x02>; | |
| port { | |
| endpoint { | |
| remote-endpoint = <0x9b>; | |
| phandle = <0x7d>; | |
| }; | |
| }; | |
| }; | |
| csr@6001000 { | |
| compatible = "qcom,coresight-csr"; | |
| reg = <0x6001000 0x1000>; | |
| reg-names = "csr-base"; | |
| coresight-name = "coresight-csr"; | |
| qcom,usb-bam-support; | |
| qcom,hwctrl-set-support; | |
| qcom,set-byte-cntr-support; | |
| qcom,blk-size = <0x01>; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x6b>; | |
| }; | |
| dbgui@6108000 { | |
| compatible = "qcom,coresight-dbgui"; | |
| reg = <0x6108000 0x1000>; | |
| reg-names = "dbgui-base"; | |
| coresight-name = "coresight-dbgui"; | |
| qcom,dbgui-addr-offset = <0x30>; | |
| qcom,dbgui-data-offset = <0x130>; | |
| qcom,dbgui-size = <0x40>; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x26f>; | |
| port { | |
| endpoint { | |
| remote-endpoint = <0x9c>; | |
| phandle = <0x7b>; | |
| }; | |
| }; | |
| }; | |
| tpda@6003000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0x3b969>; | |
| reg = <0x6003000 0x1000>; | |
| reg-names = "tpda-base"; | |
| coresight-name = "coresight-tpda"; | |
| qcom,tpda-atid = <0x40>; | |
| qcom,cmb-elem-size = <0x00 0x20>; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x270>; | |
| ports { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| port@0 { | |
| endpoint { | |
| remote-endpoint = <0x9d>; | |
| phandle = <0x75>; | |
| }; | |
| }; | |
| port@1 { | |
| reg = <0x00>; | |
| endpoint { | |
| slave-mode; | |
| remote-endpoint = <0x9e>; | |
| phandle = <0x9f>; | |
| }; | |
| }; | |
| }; | |
| }; | |
| tpdm@6110000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0x3b968>; | |
| reg = <0x6110000 0x1000>; | |
| reg-names = "tpdm-base"; | |
| coresight-name = "coresight-tpdm-dcc"; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x271>; | |
| port { | |
| endpoint { | |
| remote-endpoint = <0x9f>; | |
| phandle = <0x9e>; | |
| }; | |
| }; | |
| }; | |
| hwevent@6101000 { | |
| compatible = "qcom,coresight-hwevent"; | |
| reg = <0x6101000 0x148 0x6101fb0 0x04 0x6121000 0x148 0x6121fb0 0x04 0x6131000 0x148 0x6131fb0 0x04 0x7105010 0x04 0x7885010 0x04>; | |
| reg-names = "center-wrapper-mux\0center-wrapper-lockaccess\0right-wrapper-mux\0right-wrapper-lockaccess\0mm-wrapper-mux\0mm-wrapper-lockaccess\0usbbam-mux\0blsp-mux"; | |
| coresight-name = "coresight-hwevent"; | |
| coresight-csr = <0x6b>; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x272>; | |
| }; | |
| qcom,ion { | |
| compatible = "qcom,msm-ion"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| qcom,ion-heap@25 { | |
| reg = <0x19>; | |
| qcom,ion-heap-type = "SYSTEM"; | |
| }; | |
| qcom,ion-heap@8 { | |
| reg = <0x08>; | |
| memory-region = <0xa0>; | |
| qcom,ion-heap-type = "SECURE_DMA"; | |
| }; | |
| qcom,ion-heap@27 { | |
| reg = <0x1b>; | |
| memory-region = <0xa1>; | |
| qcom,ion-heap-type = "DMA"; | |
| }; | |
| qcom,ion-heap@19 { | |
| reg = <0x13>; | |
| memory-region = <0xa2>; | |
| qcom,ion-heap-type = "DMA"; | |
| }; | |
| }; | |
| arm,smmu-kgsl@1c40000 { | |
| status = "ok"; | |
| compatible = "qcom,smmu-v2"; | |
| qcom,tz-device-id = "GPU"; | |
| reg = <0x1c40000 0x10000>; | |
| #iommu-cells = <0x01>; | |
| #global-interrupts = <0x00>; | |
| interrupts = <0x00 0xe1 0x04 0x00 0xe8 0x04 0x00 0xe9 0x04 0x00 0xea 0x04>; | |
| qcom,dynamic; | |
| qcom,use-3-lvl-tables; | |
| qcom,enable-static-cb; | |
| qcom,enable-smmu-halt; | |
| qcom,skip-init; | |
| vdd-supply = <0xa3>; | |
| qcom,regulator-names = "vdd"; | |
| clocks = <0xa4 0xd15c8a00 0xa4 0x3edd69ad>; | |
| clock-names = "gpu_ahb_clk\0gcc_bimc_gfx_clk"; | |
| attach-impl-defs = <0x6000 0x270 0x6060 0x1055 0x6800 0x06 0x6900 0x3ff 0x6924 0x204 0x6928 0x10800 0x6930 0x400 0x6960 0xffffffff 0x6b64 0xa0000 0x6b68 0xaaab92a>; | |
| phandle = <0xa5>; | |
| }; | |
| kgsl_iommu_test_device0 { | |
| status = "disabled"; | |
| compatible = "iommu-debug-test"; | |
| iommus = <0xa5 0x00>; | |
| }; | |
| qcom,iommu@1e00000 { | |
| status = "okay"; | |
| compatible = "qcom,qsmmu-v500"; | |
| reg = <0x1e00000 0x40000 0x1ee2000 0x20>; | |
| reg-names = "base\0tcu-base"; | |
| #iommu-cells = <0x02>; | |
| qcom,tz-device-id = "APPS"; | |
| qcom,skip-init; | |
| qcom,enable-static-cb; | |
| qcom,use-3-lvl-tables; | |
| qcom,disable-atos; | |
| #global-interrupts = <0x00>; | |
| #size-cells = <0x01>; | |
| #address-cells = <0x01>; | |
| ranges; | |
| interrupts = <0x00 0xfd 0x04 0x00 0xfe 0x04 0x00 0xff 0x04 0x00 0x35 0x04 0x00 0x36 0x04 0x00 0x3a 0x04 0x00 0x3c 0x04 0x00 0x3d 0x04 0x00 0x4c 0x04 0x00 0x4d 0x04 0x00 0x50 0x04 0x00 0x5e 0x04 0x00 0x65 0x04 0x00 0x66 0x04 0x00 0x67 0x04 0x00 0x68 0x04 0x00 0x69 0x04 0x00 0x6a 0x04 0x00 0x6d 0x04 0x00 0x6e 0x04 0x00 0x6f 0x04 0x00 0x70 0x04 0x00 0x71 0x04 0x00 0x72 0x04 0x00 0x73 0x04 0x00 0x74 0x04 0x00 0x75 0x04 0x00 0x76 0x04 0x00 0x77 0x04 0x00 0x78 0x04 0x00 0x79 0x04 0x00 0x7a 0x04>; | |
| clocks = <0x12 0x75eaefa5 0x12 0x8fbc51da>; | |
| clock-names = "iface_clk\0core_clk"; | |
| phandle = <0xa8>; | |
| }; | |
| qcom,vidc@1d00000 { | |
| compatible = "qcom,msm-vidc"; | |
| reg = <0x1d00000 0xff000 0xa4124 0x04 0xa0164 0x04>; | |
| reg-names = "vidc\0efuse\0efuse2"; | |
| qcom,platform-version = <0x180000 0x13>; | |
| qcom,capability-version = <0x2000 0x0d>; | |
| interrupts = <0x00 0x2c 0x00>; | |
| venus-supply = <0xa6>; | |
| venus-core0-supply = <0xa7>; | |
| clocks = <0x12 0xf76a02bb 0x12 0x83a7f549 0x12 0x8d778c6 0x12 0xcdf4c8f6>; | |
| clock-names = "core_clk\0core0_clk\0iface_clk\0bus_clk"; | |
| qcom,clock-configs = <0x01 0x00 0x00 0x00 0x00>; | |
| qcom,hfi = "venus"; | |
| qcom,hfi-version = "3xx"; | |
| qcom,reg-presets = <0xe0020 0x5555556 0xe0024 0x5555556 0x80124 0x03>; | |
| qcom,qdss-presets = <0x825000 0x1000 0x826000 0x1000 0x821000 0x1000 0x802000 0x1000 0x9180000 0x1000 0x9181000 0x1000>; | |
| qcom,max-hw-load = <0xff000>; | |
| qcom,slave-side-cp; | |
| qcom,sw-power-collapse; | |
| qcom,firmware-name = "venus"; | |
| qcom,pm-qos-latency-us = <0xd5>; | |
| qcom,dcvs-tbl = <0xc7380 0xc7380 0xef100 0x3f00000c 0xd0bd8 0xc876c 0xef100 0x4000004 0xc7380 0xafc80 0xcc000 0x4000004>; | |
| qcom,dcvs-limit = <0x7080 0x18 0x7e90 0x18>; | |
| qcom,allowed-clock-rates = <0x1bb75640 0x17d78400 0x15752a00 0x127a3980 0xd9fb390 0x6cfed50>; | |
| qcom,clock-freq-tbl { | |
| qcom,profile-enc { | |
| qcom,codec-mask = <0x55555555>; | |
| qcom,cycles-per-mb = <0x35f>; | |
| qcom,low-power-mode-factor = <0x8b20>; | |
| }; | |
| qcom,profile-dec { | |
| qcom,codec-mask = <0xf3ffffff>; | |
| qcom,cycles-per-mb = <0x163>; | |
| }; | |
| qcom,profile-hevcdec { | |
| qcom,codec-mask = <0xc000000>; | |
| qcom,cycles-per-mb = <0x190>; | |
| }; | |
| }; | |
| non_secure_cb { | |
| compatible = "qcom,msm-vidc,context-bank"; | |
| label = "venus_ns"; | |
| iommus = <0xa8 0x800 0x01 0xa8 0x807 0x00 0xa8 0x808 0x07 0xa8 0x810 0x01 0xa8 0x828 0x01 0xa8 0x82c 0x01 0xa8 0x821 0x10>; | |
| buffer-types = <0xfff>; | |
| virtual-addr-pool = <0x79000000 0x50000000 0xa1000000 0xc9000000>; | |
| }; | |
| secure_bitstream_cb { | |
| compatible = "qcom,msm-vidc,context-bank"; | |
| label = "venus_sec_bitstream"; | |
| iommus = <0xa8 0x900 0x00 0xa8 0x902 0x08 0xa8 0x909 0x02 0xa8 0x90e 0x00 0xa8 0x926 0x00 0xa8 0x929 0x02>; | |
| buffer-types = <0x241>; | |
| virtual-addr-pool = <0x51000000 0x28000000>; | |
| qcom,secure-context-bank; | |
| }; | |
| secure_pixel_cb { | |
| compatible = "qcom,msm-vidc,context-bank"; | |
| label = "venus_sec_pixel"; | |
| iommus = <0xa8 0x904 0x08 0xa8 0x910 0x00 0xa8 0x92c 0x00>; | |
| buffer-types = <0x106>; | |
| virtual-addr-pool = <0x29000000 0x28000000>; | |
| qcom,secure-context-bank; | |
| }; | |
| secure_non_pixel_cb { | |
| compatible = "qcom,msm-vidc,context-bank"; | |
| label = "venus_sec_non_pixel"; | |
| iommus = <0xa8 0x908 0x00 0xa8 0x905 0x0a 0xa8 0x925 0x08 0xa8 0x928 0x00>; | |
| buffer-types = <0x480>; | |
| virtual-addr-pool = <0x1000000 0x28000000>; | |
| qcom,secure-context-bank; | |
| }; | |
| venus_bus_ddr { | |
| compatible = "qcom,msm-vidc,bus"; | |
| label = "venus-ddr"; | |
| qcom,bus-master = <0x3f>; | |
| qcom,bus-slave = <0x200>; | |
| qcom,bus-governor = "venus-ddr-gov"; | |
| qcom,bus-range-kbps = <0x3e8 0x241648>; | |
| }; | |
| arm9_bus_ddr { | |
| compatible = "qcom,msm-vidc,bus"; | |
| label = "venus-arm9-ddr"; | |
| qcom,bus-master = <0x3f>; | |
| qcom,bus-slave = <0x200>; | |
| qcom,bus-governor = "performance"; | |
| qcom,bus-range-kbps = <0x01 0x01>; | |
| }; | |
| }; | |
| venus-ddr-gov { | |
| compatible = "qcom,msm-vidc,governor,table"; | |
| status = "ok"; | |
| qcom,bus-freq-table { | |
| qcom,profile-enc { | |
| qcom,codec-mask = <0x55555555>; | |
| qcom,load-busfreq-tbl = <0xef100 0xfee20 0xd2f00 0xd88d8 0x77880 0xa2990 0x69780 0x8d1d0 0x3bc40 0x54790 0x34bc0 0x47888 0x1a5e0 0x24dd8 0x00 0x00>; | |
| }; | |
| qcom,profile-dec { | |
| qcom,codec-mask = <0xffffffff>; | |
| qcom,load-busfreq-tbl = <0xef100 0x241648 0xd2f00 0x1e2e90 0x77880 0x1149c8 0x69780 0xf2ad0 0x3bc40 0x8d9a0 0x34bc0 0x7a508 0x1a5e0 0x3e418 0x00 0x00>; | |
| }; | |
| qcom,profile-dec-ubwc { | |
| qcom,codec-mask = <0xffffffff>; | |
| qcom,ubwc-mode; | |
| qcom,load-busfreq-tbl = <0xef100 0x1cdea0 0xd2f00 0x17b650 0x77880 0xda818 0x69780 0xbeac8 0x3bc40 0x704e0 0x34bc0 0x497c8 0x1a5e0 0x31510 0x00 0x00>; | |
| }; | |
| }; | |
| }; | |
| qcom,kgsl-hyp { | |
| compatible = "qcom,pil-tz-generic"; | |
| qcom,pas-id = <0x0d>; | |
| qcom,firmware-name = "a506_zap"; | |
| memory-region = <0xa9>; | |
| qcom,mas-crypto = <0xaa>; | |
| clocks = <0x12 0xd390d2 0x12 0x94de4919 0x12 0xd4415c9b 0x12 0x37a21414>; | |
| clock-names = "scm_core_clk\0scm_iface_clk\0scm_bus_clk\0scm_core_clk_src"; | |
| qcom,proxy-clock-names = "scm_core_clk\0scm_iface_clk\0scm_bus_clk\0scm_core_clk_src"; | |
| qcom,scm_core_clk_src-freq = <0x4c4b400>; | |
| phandle = <0x273>; | |
| }; | |
| qcom,kgsl-busmon { | |
| label = "kgsl-busmon"; | |
| compatible = "qcom,kgsl-busmon"; | |
| phandle = <0x274>; | |
| }; | |
| qcom,gpubw { | |
| compatible = "qcom,devbw"; | |
| governor = "bw_vbif"; | |
| qcom,src-dst-ports = <0x1a 0x200>; | |
| qcom,active-only; | |
| qcom,bw-tbl = <0x00 0x64b 0x84c 0xb71 0xc96 0x1098 0x1406 0x16e3 0x1808 0x192d 0x1bc0>; | |
| phandle = <0xab>; | |
| }; | |
| qcom,kgsl-3d0@1c00000 { | |
| label = "kgsl-3d0"; | |
| compatible = "qcom,kgsl-3d0\0qcom,kgsl-3d"; | |
| status = "ok"; | |
| reg = <0x1c00000 0x40000>; | |
| reg-names = "kgsl_3d0_reg_memory"; | |
| interrupts = <0x00 0x21 0x00>; | |
| interrupt-names = "kgsl_3d0_irq"; | |
| qcom,id = <0x00>; | |
| qcom,chipid = <0x5000600>; | |
| qcom,initial-pwrlevel = <0x05>; | |
| qcom,idle-timeout = <0x50>; | |
| qcom,deep-nap-timeout = <0x64>; | |
| qcom,strtstp-sleepwake; | |
| qcom,highest-bank-bit = <0x0e>; | |
| qcom,snapshot-size = <0x200000>; | |
| clocks = <0xa4 0x49a51fd9 0xa4 0xd15c8a00 0xa4 0x3edd69ad 0xa4 0x19922503 0xa4 0x1180db06 0xa4 0xae18e54d>; | |
| clock-names = "core_clk\0iface_clk\0mem_iface_clk\0alt_mem_iface_clk\0rbbmtimer_clk\0alwayson_clk"; | |
| qcom,gpubw-dev = <0xab>; | |
| qcom,bus-control; | |
| qcom,bus-width = <0x10>; | |
| qcom,msm-bus,name = "grp3d"; | |
| qcom,msm-bus,num-cases = <0x0b>; | |
| qcom,msm-bus,num-paths = <0x01>; | |
| qcom,msm-bus,vectors-KBps = <0x1a 0x200 0x00 0x00 0x1a 0x200 0x00 0x19c800 0x1a 0x200 0x00 0x21fc00 0x1a 0x200 0x00 0x2ee000 0x1a 0x200 0x00 0x339000 0x1a 0x200 0x00 0x43f800 0x1a 0x200 0x00 0x520800 0x1a 0x200 0x00 0x5dc000 0x1a 0x200 0x00 0x627000 0x1a 0x200 0x00 0x672000 0x1a 0x200 0x00 0x71ac00>; | |
| regulator-names = "vddcx\0vdd"; | |
| vddcx-supply = <0xa3>; | |
| vdd-supply = <0xac>; | |
| qcom,pm-qos-active-latency = <0xd5>; | |
| qcom,pm-qos-wakeup-latency = <0xd5>; | |
| qcom,gpu-quirk-two-pass-use-wfi; | |
| qcom,gpu-quirk-dp2clockgating-disable; | |
| qcom,gpu-quirk-lmloadkill-disable; | |
| qcom,enable-ca-jump; | |
| qcom,ca-busy-penalty = <0x2ee0>; | |
| qcom,ca-target-pwrlevel = <0x04>; | |
| #cooling-cells = <0x02>; | |
| phandle = <0xcf>; | |
| qcom,gpu-mempools { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| compatible = "qcom,gpu-mempools"; | |
| qcom,mempool-max-pages = <0x8000>; | |
| qcom,gpu-mempool@0 { | |
| reg = <0x00>; | |
| qcom,mempool-page-size = <0x1000>; | |
| }; | |
| qcom,gpu-mempool@1 { | |
| reg = <0x01>; | |
| qcom,mempool-page-size = <0x10000>; | |
| }; | |
| }; | |
| qcom,gpu-coresights { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| compatible = "qcom,gpu-coresight"; | |
| qcom,gpu-coresight@0 { | |
| reg = <0x00>; | |
| coresight-name = "coresight-gfx"; | |
| coresight-atid = <0x43>; | |
| port { | |
| endpoint { | |
| remote-endpoint = <0xad>; | |
| phandle = <0x84>; | |
| }; | |
| }; | |
| }; | |
| }; | |
| qcom,gpu-pwrlevels { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| compatible = "qcom,gpu-pwrlevels"; | |
| qcom,gpu-pwrlevel@0 { | |
| reg = <0x00>; | |
| qcom,gpu-freq = <0x2b369f40>; | |
| qcom,bus-freq = <0x0a>; | |
| qcom,bus-min = <0x0a>; | |
| qcom,bus-max = <0x0a>; | |
| }; | |
| qcom,gpu-pwrlevel@1 { | |
| reg = <0x01>; | |
| qcom,gpu-freq = <0x26be3680>; | |
| qcom,bus-freq = <0x0a>; | |
| qcom,bus-min = <0x0a>; | |
| qcom,bus-max = <0x0a>; | |
| }; | |
| qcom,gpu-pwrlevel@2 { | |
| reg = <0x02>; | |
| qcom,gpu-freq = <0x2160ec00>; | |
| qcom,bus-freq = <0x0a>; | |
| qcom,bus-min = <0x08>; | |
| qcom,bus-max = <0x0a>; | |
| }; | |
| qcom,gpu-pwrlevel@3 { | |
| reg = <0x03>; | |
| qcom,gpu-freq = <0x1e65fb80>; | |
| qcom,bus-freq = <0x09>; | |
| qcom,bus-min = <0x06>; | |
| qcom,bus-max = <0x0a>; | |
| }; | |
| qcom,gpu-pwrlevel@4 { | |
| reg = <0x04>; | |
| qcom,gpu-freq = <0x17d78400>; | |
| qcom,bus-freq = <0x07>; | |
| qcom,bus-min = <0x05>; | |
| qcom,bus-max = <0x08>; | |
| }; | |
| qcom,gpu-pwrlevel@5 { | |
| reg = <0x05>; | |
| qcom,gpu-freq = <0x1312d000>; | |
| qcom,bus-freq = <0x04>; | |
| qcom,bus-min = <0x02>; | |
| qcom,bus-max = <0x06>; | |
| }; | |
| qcom,gpu-pwrlevel@6 { | |
| reg = <0x06>; | |
| qcom,gpu-freq = <0xcdfe600>; | |
| qcom,bus-freq = <0x03>; | |
| qcom,bus-min = <0x02>; | |
| qcom,bus-max = <0x04>; | |
| }; | |
| qcom,gpu-pwrlevel@7 { | |
| reg = <0x07>; | |
| qcom,gpu-freq = <0x7f1ff20>; | |
| qcom,bus-freq = <0x03>; | |
| qcom,bus-min = <0x01>; | |
| qcom,bus-max = <0x04>; | |
| }; | |
| qcom,gpu-pwrlevel@8 { | |
| reg = <0x08>; | |
| qcom,gpu-freq = <0x124f800>; | |
| qcom,bus-freq = <0x00>; | |
| qcom,bus-min = <0x00>; | |
| qcom,bus-max = <0x00>; | |
| }; | |
| }; | |
| }; | |
| qcom,kgsl-iommu@1c40000 { | |
| compatible = "qcom,kgsl-smmu-v2"; | |
| reg = <0x1c40000 0x10000>; | |
| qcom,protect = <0x40000 0x10000>; | |
| qcom,micro-mmu-control = <0x6000>; | |
| clocks = <0xa4 0xd15c8a00 0xa4 0x3edd69ad>; | |
| clock-names = "gpu_ahb_clk\0gcc_bimc_gfx_clk"; | |
| qcom,secure_align_mask = <0xfff>; | |
| qcom,retention; | |
| phandle = <0x275>; | |
| gfx3d_user { | |
| compatible = "qcom,smmu-kgsl-cb"; | |
| label = "gfx3d_user"; | |
| iommus = <0xa5 0x00>; | |
| qcom,gpu-offset = <0x48000>; | |
| phandle = <0x276>; | |
| }; | |
| gfx3d_secure { | |
| compatible = "qcom,smmu-kgsl-cb"; | |
| iommus = <0xa5 0x02>; | |
| memory-region = <0xa0>; | |
| phandle = <0x277>; | |
| }; | |
| }; | |
| qcom,mdss_mdp@1a00000 { | |
| compatible = "qcom,mdss_mdp"; | |
| reg = <0x1a00000 0x90000 0x1ab0000 0x1040>; | |
| reg-names = "mdp_phys\0vbif_phys"; | |
| interrupts = <0x00 0x48 0x00>; | |
| vdd-supply = <0xae>; | |
| qcom,msm-bus,name = "mdss_mdp"; | |
| qcom,msm-bus,num-cases = <0x03>; | |
| qcom,msm-bus,num-paths = <0x01>; | |
| qcom,msm-bus,vectors-KBps = <0x16 0x200 0x00 0x00 0x16 0x200 0x00 0x61a800 0x16 0x200 0x00 0x61a800>; | |
| qcom,mdss-ab-factor = <0x01 0x01>; | |
| qcom,mdss-ib-factor = <0x01 0x01>; | |
| qcom,mdss-clk-factor = <0x69 0x64>; | |
| qcom,max-mixer-width = <0x800>; | |
| qcom,max-pipe-width = <0x800>; | |
| qcom,mdss-vbif-qos-rt-setting = <0x01 0x02 0x02 0x02>; | |
| qcom,mdss-vbif-qos-nrt-setting = <0x01 0x01 0x01 0x01>; | |
| qcom,mdss-has-panic-ctrl; | |
| qcom,mdss-per-pipe-panic-luts = <0x0f 0xffff 0xfffc 0xff00>; | |
| qcom,mdss-mdp-reg-offset = <0x1000>; | |
| qcom,max-bandwidth-low-kbps = <0x33e140>; | |
| qcom,max-bandwidth-high-kbps = <0x33e140>; | |
| qcom,max-bandwidth-per-pipe-kbps = <0x231860>; | |
| qcom,max-clk-rate = <0x17d78400>; | |
| qcom,mdss-default-ot-rd-limit = <0x20>; | |
| qcom,mdss-default-ot-wr-limit = <0x10>; | |
| qcom,max-bw-settings = <0x01 0x33e140 0x02 0x2f4d60>; | |
| qcom,mdss-pipe-vig-off = <0x5000>; | |
| qcom,mdss-pipe-rgb-off = <0x15000 0x17000>; | |
| qcom,mdss-pipe-dma-off = <0x25000>; | |
| qcom,mdss-pipe-cursor-off = <0x35000>; | |
| qcom,mdss-pipe-vig-xin-id = <0x00>; | |
| qcom,mdss-pipe-rgb-xin-id = <0x01 0x05>; | |
| qcom,mdss-pipe-dma-xin-id = <0x02>; | |
| qcom,mdss-pipe-cursor-xin-id = <0x07>; | |
| qcom,mdss-pipe-vig-clk-ctrl-offsets = <0x2ac 0x00 0x00>; | |
| qcom,mdss-pipe-rgb-clk-ctrl-offsets = <0x2ac 0x04 0x08 0x2b4 0x04 0x08>; | |
| qcom,mdss-pipe-dma-clk-ctrl-offsets = <0x2ac 0x08 0x0c>; | |
| qcom,mdss-pipe-cursor-clk-ctrl-offsets = <0x3a8 0x10 0x0f>; | |
| qcom,mdss-ctl-off = <0x2000 0x2200 0x2400>; | |
| qcom,mdss-mixer-intf-off = <0x45000 0x46000>; | |
| qcom,mdss-dspp-off = <0x55000>; | |
| qcom,mdss-wb-off = <0x65000 0x66000>; | |
| qcom,mdss-intf-off = <0x6b000 0x6b800 0x6c000>; | |
| qcom,mdss-pingpong-off = <0x71000 0x71800>; | |
| qcom,mdss-slave-pingpong-off = <0x73000>; | |
| qcom,mdss-cdm-off = <0x7a200>; | |
| qcom,mdss-wfd-mode = "intf"; | |
| qcom,mdss-highest-bank-bit = <0x01>; | |
| qcom,mdss-has-decimation; | |
| qcom,mdss-has-non-scalar-rgb; | |
| qcom,mdss-has-rotator-downscale; | |
| qcom,mdss-rot-downscale-min = <0x02>; | |
| qcom,mdss-rot-downscale-max = <0x10>; | |
| qcom,mdss-idle-power-collapse-enabled; | |
| qcom,mdss-rot-block-size = <0x40>; | |
| qcom,mdss-ppb-off = <0x330>; | |
| qcom,mdss-has-pingpong-split; | |
| clocks = <0x12 0xbfb92ed3 0x12 0x668f51de 0x12 0x6dc1f8f1 0xaf 0x588460a4 0x12 0x32a09f1f>; | |
| clock-names = "iface_clk\0bus_clk\0core_clk_src\0core_clk\0vsync_clk"; | |
| qcom,mdp-settings = <0x506c 0x00 0x1506c 0x00 0x1706c 0x00 0x2506c 0x00>; | |
| qcom,vbif-settings = <0xd0 0x10>; | |
| qcom,regs-dump-mdp = <0x1000 0x1454 0x2000 0x2064 0x2200 0x2264 0x2400 0x2464 0x5000 0x5150 0x5200 0x5230 0x15000 0x15150 0x17000 0x17150 0x25000 0x25150 0x35000 0x35150 0x45000 0x452bc 0x46000 0x462bc 0x55000 0x5522c 0x65000 0x652c0 0x66000 0x662c0 0x6b800 0x6ba68 0x6c000 0x6c268 0x71000 0x710d4 0x71800 0x718d4>; | |
| qcom,regs-dump-names-mdp = "MDP\0CTL_0\0CTL_1\0CTL_2\0VIG0_SSPP\0VIG0\0RGB0_SSPP\0RGB1_SSPP\0DMA0_SSPP\0CURSOR0_SSPP\0LAYER_0\0LAYER_1\0DSPP_0\0WB_0\0WB_2\0INTF_1\0INTF_2\0PP_0\0PP_1"; | |
| qcom,mdss-prefill-outstanding-buffer-bytes = <0x00>; | |
| qcom,mdss-prefill-y-buffer-bytes = <0x00>; | |
| qcom,mdss-prefill-scaler-buffer-lines-bilinear = <0x02>; | |
| qcom,mdss-prefill-scaler-buffer-lines-caf = <0x04>; | |
| qcom,mdss-prefill-post-scaler-buffer-pixels = <0x800>; | |
| qcom,mdss-prefill-pingpong-buffer-pixels = <0x1000>; | |
| phandle = <0xb5>; | |
| qcom,mdss-pref-prim-intf = "dsi"; | |
| qcom,mdss-pp-offsets { | |
| qcom,mdss-sspp-mdss-igc-lut-off = <0x2000>; | |
| qcom,mdss-sspp-vig-pcc-off = <0x1780>; | |
| qcom,mdss-sspp-rgb-pcc-off = <0x380>; | |
| qcom,mdss-sspp-dma-pcc-off = <0x380>; | |
| qcom,mdss-lm-pgc-off = <0x3c0>; | |
| qcom,mdss-dspp-pcc-off = <0x1700>; | |
| qcom,mdss-dspp-pgc-off = <0x17c0>; | |
| }; | |
| qcom,mdss-reg-bus { | |
| qcom,msm-bus,name = "mdss_reg"; | |
| qcom,msm-bus,num-cases = <0x04>; | |
| qcom,msm-bus,num-paths = <0x01>; | |
| qcom,msm-bus,active-only; | |
| qcom,msm-bus,vectors-KBps = <0x01 0x24e 0x00 0x00 0x01 0x24e 0x00 0x12c00 0x01 0x24e 0x00 0x27100 0x01 0x24e 0x00 0x4e200>; | |
| }; | |
| qcom,mdss-hw-rt-bus { | |
| qcom,msm-bus,name = "mdss_hw_rt"; | |
| qcom,msm-bus,num-cases = <0x02>; | |
| qcom,msm-bus,num-paths = <0x01>; | |
| qcom,msm-bus,vectors-KBps = <0x16 0x200 0x00 0x00 0x16 0x200 0x00 0x3e8>; | |
| }; | |
| qcom,smmu_mdp_unsec_cb { | |
| compatible = "qcom,smmu_mdp_unsec"; | |
| iommus = <0xa8 0xc00 0x00>; | |
| phandle = <0x278>; | |
| }; | |
| qcom,smmu_mdp_sec_cb { | |
| compatible = "qcom,smmu_mdp_sec"; | |
| iommus = <0xa8 0xc01 0x00>; | |
| phandle = <0x279>; | |
| }; | |
| qcom,mdss_fb_primary { | |
| cell-index = <0x00>; | |
| compatible = "qcom,mdss-fb"; | |
| phandle = <0xb3>; | |
| qcom,cont-splash-memory { | |
| linux,contiguous-region = <0xb0>; | |
| }; | |
| }; | |
| qcom,mdss_fb_wfd { | |
| cell-index = <0x01>; | |
| compatible = "qcom,mdss-fb"; | |
| phandle = <0xba>; | |
| }; | |
| qcom,mdss_fb_secondary { | |
| cell-index = <0x02>; | |
| compatible = "qcom,mdss-fb"; | |
| phandle = <0xb4>; | |
| }; | |
| qcom,mdss_dsi_sim_video { | |
| qcom,mdss-dsi-panel-name = "Simulator video mode dsi panel"; | |
| qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| qcom,mdss-dsi-virtual-channel-id = <0x00>; | |
| qcom,mdss-dsi-stream = <0x00>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-border-color = <0x00>; | |
| qcom,mdss-dsi-panel-hdr-enabled; | |
| qcom,mdss-dsi-panel-hdr-color-primaries = <0x38a4 0x3c8c 0x7d00 0x4268 0x3c8c 0x7530 0x1f40 0xbb8>; | |
| qcom,mdss-dsi-panel-peak-brightness = <0x401640>; | |
| qcom,mdss-dsi-panel-blackness-level = <0xc9e>; | |
| qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-t-clk-post = <0x04>; | |
| qcom,mdss-dsi-t-clk-pre = <0x1b>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-reset-sequence = <0x01 0x00 0x00 0x00 0x01 0x00>; | |
| qcom,panel-ack-disabled; | |
| phandle = <0x30d>; | |
| qcom,mdss-dsi-display-timings { | |
| timing@0 { | |
| qcom,mdss-dsi-panel-width = <0x280>; | |
| qcom,mdss-dsi-panel-height = <0x1e0>; | |
| qcom,mdss-dsi-h-front-porch = <0x08>; | |
| qcom,mdss-dsi-h-back-porch = <0x08>; | |
| qcom,mdss-dsi-h-pulse-width = <0x08>; | |
| qcom,mdss-dsi-h-sync-skew = <0x00>; | |
| qcom,mdss-dsi-v-back-porch = <0x06>; | |
| qcom,mdss-dsi-v-front-porch = <0x06>; | |
| qcom,mdss-dsi-v-pulse-width = <0x02>; | |
| qcom,mdss-dsi-h-left-border = <0x00>; | |
| qcom,mdss-dsi-h-right-border = <0x00>; | |
| qcom,mdss-dsi-v-top-border = <0x00>; | |
| qcom,mdss-dsi-v-bottom-border = <0x00>; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-panel-timings = <0x00 0x00 0x00>; | |
| qcom,mdss-dsi-on-command = [32 01 00 00 00 00 02 00 00]; | |
| qcom,mdss-dsi-off-command = [22 01 00 00 00 00 02 00 00]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-h-sync-pulse = <0x00>; | |
| }; | |
| }; | |
| }; | |
| qcom,mdss_dsi_dual_sim_video { | |
| qcom,mdss-dsi-panel-name = "Sim dual video mode dsi panel"; | |
| qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| qcom,mdss-dsi-virtual-channel-id = <0x00>; | |
| qcom,mdss-dsi-stream = <0x00>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-border-color = <0x00>; | |
| qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-panel-broadcast-mode; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-bl-max-level = <0xfff>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-reset-sequence = <0x01 0x14 0x00 0xc8 0x01 0x14>; | |
| qcom,panel-ack-disabled; | |
| phandle = <0x30e>; | |
| qcom,mdss-dsi-display-timings { | |
| timing@0 { | |
| qcom,mdss-dsi-panel-width = <0x500>; | |
| qcom,mdss-dsi-panel-height = <0x5a0>; | |
| qcom,mdss-dsi-h-front-porch = <0x78>; | |
| qcom,mdss-dsi-h-back-porch = <0x2c>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-sync-skew = <0x00>; | |
| qcom,mdss-dsi-v-back-porch = <0x04>; | |
| qcom,mdss-dsi-v-front-porch = <0x08>; | |
| qcom,mdss-dsi-v-pulse-width = <0x04>; | |
| qcom,mdss-dsi-h-left-border = <0x00>; | |
| qcom,mdss-dsi-h-right-border = <0x00>; | |
| qcom,mdss-dsi-v-top-border = <0x00>; | |
| qcom,mdss-dsi-v-bottom-border = <0x00>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x00>; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 32 00 02 28 00 05 01 00 00 78 00 02 10 00]; | |
| qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; | |
| }; | |
| }; | |
| }; | |
| qcom,mdss_dsi_sim_cmd { | |
| qcom,mdss-dsi-panel-name = "Simulator cmd mode dsi panel"; | |
| qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; | |
| qcom,mdss-dsi-virtual-channel-id = <0x00>; | |
| qcom,mdss-dsi-stream = <0x00>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-color-order = "rgb_swap_rgb"; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-border-color = <0x00>; | |
| qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-reset-sequence = <0x01 0x0a 0x00 0x0a 0x01 0x0a>; | |
| qcom,mdss-dsi-t-clk-post = <0x03>; | |
| qcom,mdss-dsi-t-clk-pre = <0x27>; | |
| qcom,mdss-dsi-bl-max-level = <0xfff>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-te-pin-select = <0x01>; | |
| qcom,mdss-dsi-wr-mem-start = <0x2c>; | |
| qcom,mdss-dsi-wr-mem-continue = <0x3c>; | |
| qcom,mdss-dsi-te-dcs-command = <0x01>; | |
| qcom,mdss-dsi-te-check-enable; | |
| qcom,mdss-dsi-te-using-wd; | |
| qcom,mdss-dsi-te-using-te-pin; | |
| qcom,mdss-dsi-panel-hdr-enabled; | |
| qcom,ulps-enabled; | |
| qcom,mdss-dsi-panel-hdr-color-primaries = <0x38a4 0x3c8c 0x7d00 0x4268 0x3c8c 0x7530 0x1f40 0xbb8>; | |
| qcom,mdss-dsi-panel-peak-brightness = <0x401640>; | |
| qcom,mdss-dsi-panel-blackness-level = <0xc9e>; | |
| qcom,panel-ack-disabled; | |
| phandle = <0x30f>; | |
| qcom,mdss-dsi-display-timings { | |
| timing@0 { | |
| qcom,mdss-dsi-panel-width = <0x5a0>; | |
| qcom,mdss-dsi-panel-height = <0xa00>; | |
| qcom,mdss-dsi-h-front-porch = <0x78>; | |
| qcom,mdss-dsi-h-back-porch = <0x64>; | |
| qcom,mdss-dsi-h-pulse-width = <0x28>; | |
| qcom,mdss-dsi-h-sync-skew = <0x00>; | |
| qcom,mdss-dsi-v-back-porch = <0x64>; | |
| qcom,mdss-dsi-v-front-porch = <0x64>; | |
| qcom,mdss-dsi-v-pulse-width = <0x28>; | |
| qcom,mdss-dsi-h-left-border = <0x00>; | |
| qcom,mdss-dsi-h-right-border = <0x00>; | |
| qcom,mdss-dsi-v-top-border = <0x00>; | |
| qcom,mdss-dsi-v-bottom-border = <0x00>; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-panel-timings = <0x210909 0x24230808 0x8030400>; | |
| qcom,mdss-dsi-on-command = <0x29010000 0x2b0 0x3050100 0xa0001 0x150100 0xa0002 0x3a773901 0xa00 0x52a0000 0x4ff3901 0xa00 0x52b0000 0x59f1501 0xa00 0x2350039 0x100000a 0x34400 0x150100 0xa0002 0x51ff1501 0xa00 0x2532415 0x100000a 0x25500 0x5010000 0x78000111 0x5010000 0x10000129>; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 32 00 02 28 00 05 01 00 00 78 00 02 10 00]; | |
| qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; | |
| qcom,compression-mode = "dsc"; | |
| qcom,mdss-dsc-slice-height = <0x28>; | |
| qcom,mdss-dsc-slice-width = <0x2d0>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x01>; | |
| qcom,mdss-dsc-bit-per-component = <0x08>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x08>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| }; | |
| timing@1 { | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-panel-height = <0x780>; | |
| qcom,mdss-dsi-h-front-porch = <0x78>; | |
| qcom,mdss-dsi-h-back-porch = <0x1cc>; | |
| qcom,mdss-dsi-h-pulse-width = <0x28>; | |
| qcom,mdss-dsi-h-sync-skew = <0x00>; | |
| qcom,mdss-dsi-v-back-porch = <0x64>; | |
| qcom,mdss-dsi-v-front-porch = <0x2e4>; | |
| qcom,mdss-dsi-v-pulse-width = <0x28>; | |
| qcom,mdss-dsi-h-left-border = <0x00>; | |
| qcom,mdss-dsi-h-right-border = <0x00>; | |
| qcom,mdss-dsi-v-top-border = <0x00>; | |
| qcom,mdss-dsi-v-bottom-border = <0x00>; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-panel-timings = <0x210909 0x24230808 0x8030400>; | |
| qcom,mdss-dsi-on-command = <0x29010000 0x2b0 0x3050100 0xa0001 0x150100 0xa0002 0x3a773901 0xa00 0x52a0000 0x4ff3901 0xa00 0x52b0000 0x59f1501 0xa00 0x2350039 0x100000a 0x34400 0x150100 0xa0002 0x51ff1501 0xa00 0x2532415 0x100000a 0x25500 0x5010000 0x78000111 0x5010000 0x10000129>; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 32 00 02 28 00 05 01 00 00 78 00 02 10 00]; | |
| qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; | |
| qcom,compression-mode = "dsc"; | |
| qcom,mdss-dsc-slice-height = <0x28>; | |
| qcom,mdss-dsc-slice-width = <0x21c>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x01>; | |
| qcom,mdss-dsc-bit-per-component = <0x08>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x08>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| }; | |
| timing@2 { | |
| qcom,mdss-dsi-panel-width = <0x2d0>; | |
| qcom,mdss-dsi-panel-height = <0x500>; | |
| qcom,mdss-dsi-h-front-porch = <0x64>; | |
| qcom,mdss-dsi-h-back-porch = <0x348>; | |
| qcom,mdss-dsi-h-pulse-width = <0x28>; | |
| qcom,mdss-dsi-h-sync-skew = <0x00>; | |
| qcom,mdss-dsi-v-back-porch = <0x64>; | |
| qcom,mdss-dsi-v-front-porch = <0x564>; | |
| qcom,mdss-dsi-v-pulse-width = <0x28>; | |
| qcom,mdss-dsi-h-left-border = <0x00>; | |
| qcom,mdss-dsi-h-right-border = <0x00>; | |
| qcom,mdss-dsi-v-top-border = <0x00>; | |
| qcom,mdss-dsi-v-bottom-border = <0x00>; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-panel-timings = <0x210909 0x24230808 0x8030400>; | |
| qcom,mdss-dsi-on-command = <0x29010000 0x2b0 0x3050100 0xa0001 0x150100 0xa0002 0x3a773901 0xa00 0x52a0000 0x4ff3901 0xa00 0x52b0000 0x59f1501 0xa00 0x2350039 0x100000a 0x34400 0x150100 0xa0002 0x51ff1501 0xa00 0x2532415 0x100000a 0x25500 0x5010000 0x78000111 0x5010000 0x10000129>; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 32 00 02 28 00 05 01 00 00 78 00 02 10 00]; | |
| qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; | |
| qcom,compression-mode = "dsc"; | |
| qcom,mdss-dsc-slice-height = <0x28>; | |
| qcom,mdss-dsc-slice-width = <0x168>; | |
| qcom,mdss-dsc-slice-per-pkt = <0x01>; | |
| qcom,mdss-dsc-bit-per-component = <0x08>; | |
| qcom,mdss-dsc-bit-per-pixel = <0x08>; | |
| qcom,mdss-dsc-block-prediction-enable; | |
| }; | |
| }; | |
| }; | |
| qcom,mdss_dsi_dual_sim_cmd { | |
| qcom,mdss-dsi-panel-name = "Sim dual cmd mode dsi panel"; | |
| qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; | |
| qcom,mdss-dsi-virtual-channel-id = <0x00>; | |
| qcom,mdss-dsi-stream = <0x00>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-color-order = "rgb_swap_rgb"; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-border-color = <0x00>; | |
| qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,cmd-sync-wait-broadcast; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-hor-line-idle = <0x00 0x28 0x100 0x28 0x78 0x80 0x78 0xf0 0x40>; | |
| qcom,mdss-dsi-reset-sequence = <0x01 0x0a 0x00 0x0a 0x01 0x0a>; | |
| qcom,mdss-dsi-bl-max-level = <0xfff>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-te-pin-select = <0x01>; | |
| qcom,mdss-dsi-wr-mem-start = <0x2c>; | |
| qcom,mdss-dsi-wr-mem-continue = <0x3c>; | |
| qcom,mdss-dsi-te-dcs-command = <0x01>; | |
| qcom,mdss-dsi-te-check-enable; | |
| qcom,mdss-dsi-te-using-wd; | |
| qcom,mdss-dsi-te-using-te-pin; | |
| qcom,panel-ack-disabled; | |
| phandle = <0x310>; | |
| qcom,mdss-dsi-display-timings { | |
| timing@0 { | |
| qcom,mdss-dsi-panel-width = <0x21c>; | |
| qcom,mdss-dsi-panel-height = <0x780>; | |
| qcom,mdss-dsi-h-front-porch = <0x1c>; | |
| qcom,mdss-dsi-h-back-porch = <0x04>; | |
| qcom,mdss-dsi-h-pulse-width = <0x04>; | |
| qcom,mdss-dsi-h-sync-skew = <0x00>; | |
| qcom,mdss-dsi-v-back-porch = <0x0c>; | |
| qcom,mdss-dsi-v-front-porch = <0x0c>; | |
| qcom,mdss-dsi-v-pulse-width = <0x02>; | |
| qcom,mdss-dsi-h-left-border = <0x00>; | |
| qcom,mdss-dsi-h-right-border = <0x00>; | |
| qcom,mdss-dsi-v-top-border = <0x00>; | |
| qcom,mdss-dsi-v-bottom-border = <0x00>; | |
| qcom,mdss-dsi-panel-framerate = <0x78>; | |
| qcom,mdss-dsi-on-command = <0x5010000 0x129>; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 00 00 02 28 00 05 01 00 00 00 00 02 10 00]; | |
| qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; | |
| }; | |
| timing@1 { | |
| qcom,mdss-dsi-panel-width = <0x2d0>; | |
| qcom,mdss-dsi-panel-height = <0xa00>; | |
| qcom,mdss-dsi-h-front-porch = <0x64>; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-sync-skew = <0x00>; | |
| qcom,mdss-dsi-v-back-porch = <0x07>; | |
| qcom,mdss-dsi-v-front-porch = <0x08>; | |
| qcom,mdss-dsi-v-pulse-width = <0x01>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x00>; | |
| qcom,mdss-dsi-h-left-border = <0x00>; | |
| qcom,mdss-dsi-h-right-border = <0x00>; | |
| qcom,mdss-dsi-v-top-border = <0x00>; | |
| qcom,mdss-dsi-v-bottom-border = <0x00>; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-on-command = <0x5010000 0x129>; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 00 00 02 28 00 05 01 00 00 00 00 02 10 00]; | |
| qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; | |
| }; | |
| timing@2 { | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-panel-height = <0xf00>; | |
| qcom,mdss-dsi-h-front-porch = <0x1e>; | |
| qcom,mdss-dsi-h-back-porch = <0x64>; | |
| qcom,mdss-dsi-h-pulse-width = <0x04>; | |
| qcom,mdss-dsi-h-sync-skew = <0x00>; | |
| qcom,mdss-dsi-v-back-porch = <0x07>; | |
| qcom,mdss-dsi-v-front-porch = <0x08>; | |
| qcom,mdss-dsi-v-pulse-width = <0x01>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x00>; | |
| qcom,mdss-dsi-panel-framerate = <0x28>; | |
| qcom,mdss-dsi-on-command = <0x5010000 0x129>; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 00 00 02 28 00 05 01 00 00 00 00 02 10 00]; | |
| qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; | |
| }; | |
| }; | |
| }; | |
| qcom,mdss_dsi_truly_1080p_video { | |
| qcom,mdss-dsi-panel-name = "truly 1080p video mode dsi panel"; | |
| qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x00>; | |
| qcom,mdss-dsi-stream = <0x00>; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-panel-height = <0x780>; | |
| qcom,mdss-dsi-h-front-porch = <0x60>; | |
| qcom,mdss-dsi-h-back-porch = <0x40>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-sync-skew = <0x00>; | |
| qcom,mdss-dsi-v-back-porch = <0x10>; | |
| qcom,mdss-dsi-v-front-porch = <0x04>; | |
| qcom,mdss-dsi-v-pulse-width = <0x01>; | |
| qcom,mdss-dsi-h-left-border = <0x00>; | |
| qcom,mdss-dsi-h-right-border = <0x00>; | |
| qcom,mdss-dsi-v-top-border = <0x00>; | |
| qcom,mdss-dsi-v-bottom-border = <0x00>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-border-color = <0x00>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x00>; | |
| qcom,mdss-dsi-traffic-mode = "burst_mode"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-panel-timings = <0xe6382600 0x686e2a3c 0x44030400>; | |
| qcom,mdss-dsi-t-clk-post = <0x02>; | |
| qcom,mdss-dsi-t-clk-pre = <0x2d>; | |
| qcom,mdss-dsi-bl-min-level = <0x01>; | |
| qcom,mdss-dsi-bl-max-level = <0xfff>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-on-command = [15 01 00 00 00 00 02 35 00 15 01 00 00 00 00 02 51 ff 15 01 00 00 00 00 02 53 2c 15 01 00 00 00 00 02 55 00 05 01 00 00 78 00 02 11 00 23 01 00 00 00 00 02 b0 00 29 01 00 00 00 00 07 b3 14 00 00 00 00 00 29 01 00 00 00 00 03 b6 3a d3 29 01 00 00 00 00 03 c0 00 00 29 01 00 00 00 00 23 c1 84 60 10 eb ff 6f ce ff ff 17 02 58 73 ae b1 20 c6 ff ff 1f f3 ff 5f 10 10 10 10 00 02 01 22 22 00 01 29 01 00 00 00 00 08 c2 31 f7 80 06 08 00 00 29 01 00 00 00 00 17 c4 70 00 00 00 00 04 00 00 00 0c 06 00 00 00 00 00 04 00 00 00 0c 06 29 01 00 00 00 00 29 c6 00 69 00 69 00 69 00 00 00 00 00 69 00 69 00 69 10 19 07 00 01 00 69 00 69 00 69 00 00 00 00 00 69 00 69 00 69 10 19 07 29 01 00 00 00 00 0a cb 31 fc 3f 8c 00 00 00 00 c0 23 01 00 00 00 00 02 cc 0b 29 01 00 00 00 00 0b d0 11 81 bb 1e 1e 4c 19 19 0c 00 29 01 00 00 00 00 1a d3 1b 33 bb bb b3 33 33 33 00 01 00 a0 d8 a0 0d 4e 4e 33 3b 22 72 07 3d bf 33 29 01 00 00 00 00 08 d5 06 00 00 01 51 01 32 29 01 00 00 00 00 1f c7 01 0a 11 18 26 33 3e 50 38 42 52 60 67 6e 77 01 0a 11 18 26 33 3e 50 38 42 52 60 67 6e 77 29 01 00 00 14 00 14 c8 01 00 00 00 00 fc 00 00 00 00 00 fc 00 00 00 00 00 fc 00 05 01 00 00 14 00 02 29 00]; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 14 00 02 28 00 05 01 00 00 78 00 02 10 00]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; | |
| qcom,mdss-dsi-reset-sequence = <0x01 0x0a 0x00 0x0a 0x01 0x0a>; | |
| qcom,mdss-dsi-tx-eot-append; | |
| qcom,mdss-dsi-post-init-delay = <0x01>; | |
| qcom,mdss-dsi-panel-timings-phy-v2 = <0x231e0809 0x50304a0 0x231e0809 0x50304a0 0x231e0809 0x50304a0 0x231e0809 0x50304a0 0x231a0809 0x50304a0>; | |
| qcom,mdss-dsi-panel-status-check-mode = "reg_read"; | |
| qcom,mdss-dsi-panel-status-command = <0x6010001 0x10a>; | |
| qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-panel-status-value = <0x1c>; | |
| qcom,mdss-dsi-panel-on-check-value = <0x1c>; | |
| qcom,mdss-dsi-panel-status-read-length = <0x01>; | |
| qcom,mdss-dsi-panel-max-error-count = <0x03>; | |
| qcom,panel-supply-entries = <0x308>; | |
| qcom,mdss-dsi-pan-enable-dynamic-fps; | |
| qcom,mdss-dsi-min-refresh-rate = <0x30>; | |
| qcom,mdss-dsi-max-refresh-rate = <0x3c>; | |
| qcom,mdss-dsi-pan-fps-update = "dfps_immediate_porch_mode_vfp"; | |
| phandle = <0x309>; | |
| }; | |
| qcom,mdss_dsi_truly_1080p_cmd { | |
| qcom,mdss-dsi-panel-name = "truly 1080p cmd mode dsi panel"; | |
| qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x00>; | |
| qcom,mdss-dsi-stream = <0x00>; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-panel-height = <0x780>; | |
| qcom,mdss-dsi-h-front-porch = <0x60>; | |
| qcom,mdss-dsi-h-back-porch = <0x40>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-sync-skew = <0x00>; | |
| qcom,mdss-dsi-v-back-porch = <0x10>; | |
| qcom,mdss-dsi-v-front-porch = <0x04>; | |
| qcom,mdss-dsi-v-pulse-width = <0x01>; | |
| qcom,mdss-dsi-h-left-border = <0x00>; | |
| qcom,mdss-dsi-h-right-border = <0x00>; | |
| qcom,mdss-dsi-v-top-border = <0x00>; | |
| qcom,mdss-dsi-v-bottom-border = <0x00>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-border-color = <0x00>; | |
| qcom,mdss-dsi-te-pin-select = <0x01>; | |
| qcom,mdss-dsi-te-dcs-command = <0x01>; | |
| qcom,mdss-dsi-te-check-enable; | |
| qcom,mdss-dsi-te-using-te-pin; | |
| qcom,mdss-dsi-h-sync-pulse = <0x00>; | |
| qcom,mdss-dsi-traffic-mode = "burst_mode"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-panel-timings = <0xe6382600 0x686e2a3c 0x44030400>; | |
| qcom,mdss-dsi-t-clk-post = <0x02>; | |
| qcom,mdss-dsi-t-clk-pre = <0x2d>; | |
| qcom,mdss-dsi-tx-eot-append; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-on-command = [23 01 00 00 00 00 02 d6 01 15 01 00 00 00 00 02 35 00 15 01 00 00 00 00 02 51 ff 15 01 00 00 00 00 02 53 2c 15 01 00 00 00 00 02 55 00 05 01 00 00 78 00 02 11 00 23 01 00 00 00 00 02 b0 04 29 01 00 00 00 00 07 b3 04 00 00 00 00 00 29 01 00 00 00 00 03 b6 3a d3 29 01 00 00 00 00 03 c0 00 00 29 01 00 00 00 00 23 c1 84 60 10 eb ff 6f ce ff ff 17 02 58 73 ae b1 20 c6 ff ff 1f f3 ff 5f 10 10 10 10 00 02 01 22 22 00 01 29 01 00 00 00 00 08 c2 31 f7 80 06 08 00 00 29 01 00 00 00 00 17 c4 70 00 00 00 00 04 00 00 00 0c 06 00 00 00 00 00 04 00 00 00 0c 06 29 01 00 00 00 00 29 c6 78 69 00 69 00 69 00 00 00 00 00 69 00 69 00 69 10 19 07 00 78 00 69 00 69 00 69 00 00 00 00 00 69 00 69 00 69 10 19 07 29 01 00 00 00 00 0a cb 31 fc 3f 8c 00 00 00 00 c0 23 01 00 00 00 00 02 cc 0b 29 01 00 00 00 00 0b d0 11 81 bb 1e 1e 4c 19 19 0c 00 29 01 00 00 00 00 1a d3 1b 33 bb bb b3 33 33 33 00 01 00 a0 d8 a0 0d 4e 4e 33 3b 22 72 07 3d bf 33 29 01 00 00 00 00 08 d5 06 00 00 01 51 01 32 29 01 00 00 00 00 1f c7 01 0a 11 18 26 33 3e 50 38 42 52 60 67 6e 77 01 0a 11 18 26 33 3e 50 38 42 52 60 67 6e 77 29 01 00 00 14 00 14 c8 01 00 00 00 00 fc 00 00 00 00 00 fc 00 00 00 00 00 fc 00 05 01 00 00 14 00 02 29 00]; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 14 00 02 28 00 05 01 00 00 78 00 02 10 00]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-bl-min-level = <0x01>; | |
| qcom,mdss-dsi-bl-max-level = <0xfff>; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; | |
| qcom,mdss-dsi-reset-sequence = <0x01 0x0a 0x00 0x0a 0x01 0x0a>; | |
| qcom,mdss-dsi-post-init-delay = <0x01>; | |
| qcom,mdss-dsi-panel-timings-phy-v2 = <0x231e0809 0x50304a0 0x231e0809 0x50304a0 0x231e0809 0x50304a0 0x231e0809 0x50304a0 0x231a0809 0x50304a0>; | |
| qcom,esd-check-enabled; | |
| qcom,mdss-dsi-panel-status-check-mode = "reg_read"; | |
| qcom,mdss-dsi-panel-status-command = <0x6010001 0x10a>; | |
| qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-panel-status-value = <0x1c>; | |
| qcom,mdss-dsi-panel-on-check-value = <0x1c>; | |
| qcom,mdss-dsi-panel-status-read-length = <0x01>; | |
| qcom,mdss-dsi-panel-max-error-count = <0x03>; | |
| qcom,panel-supply-entries = <0x308>; | |
| qcom,ulps-enabled; | |
| qcom,partial-update-enabled; | |
| qcom,panel-roi-alignment = <0x02 0x02 0x04 0x02 0x438 0x02>; | |
| phandle = <0x311>; | |
| }; | |
| qcom,mdss_dsi_adv7533_1080p { | |
| label = "adv7533 1080p video mode dsi panel"; | |
| qcom,mdss-dsi-panel-name = "dsi_adv7533_1080p"; | |
| qcom,mdss-dsi-panel-controller = <0x27b>; | |
| qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| qcom,mdss-dsi-panel-destination = "display_1"; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x00>; | |
| qcom,mdss-dsi-stream = <0x00>; | |
| qcom,mdss-dsi-panel-width = <0x780>; | |
| qcom,mdss-dsi-panel-height = <0x438>; | |
| qcom,mdss-dsi-h-front-porch = <0x58>; | |
| qcom,mdss-dsi-h-back-porch = <0x94>; | |
| qcom,mdss-dsi-h-pulse-width = <0x2c>; | |
| qcom,mdss-dsi-h-sync-skew = <0x00>; | |
| qcom,mdss-dsi-v-back-porch = <0x24>; | |
| qcom,mdss-dsi-v-front-porch = <0x04>; | |
| qcom,mdss-dsi-v-pulse-width = <0x05>; | |
| qcom,mdss-dsi-h-left-border = <0x00>; | |
| qcom,mdss-dsi-h-right-border = <0x00>; | |
| qcom,mdss-dsi-v-top-border = <0x00>; | |
| qcom,mdss-dsi-v-bottom-border = <0x00>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-border-color = <0x00>; | |
| qcom,mdss-dsi-on-command = [05 01 00 00 c8 00 02 11 00 05 01 00 00 0a 00 02 29 00]; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 00 00 02 28 00 05 01 00 00 00 00 02 10 00]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-h-sync-pulse = <0x01>; | |
| qcom,mdss-dsi-traffic-mode = "non_burst_sync_pulse"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-panel-timings = <0xe6382600 0x686c2a3a 0x2c030400>; | |
| qcom,mdss-dsi-t-clk-post = <0x02>; | |
| qcom,mdss-dsi-t-clk-pre = <0x2b>; | |
| qcom,mdss-dsi-bl-min-level = <0x01>; | |
| qcom,mdss-dsi-bl-max-level = <0xfff>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-reset-sequence = <0x01 0x14 0x00 0x01 0x01 0x14>; | |
| qcom,mdss-pan-physical-width-dimension = <0xa0>; | |
| qcom,mdss-pan-physical-height-dimension = <0x5a>; | |
| qcom,mdss-dsi-force-clock-lane-hs; | |
| qcom,mdss-dsi-always-on; | |
| qcom,mdss-dsi-panel-timings-phy-v2 = <0x241f0809 0x50304a0 0x241f0809 0x50304a0 0x241f0809 0x50304a0 0x241f0809 0x50304a0 0x241b0809 0x50304a0>; | |
| qcom,dba-panel; | |
| qcom,bridge-name = "adv7533"; | |
| phandle = <0x30a>; | |
| }; | |
| qcom,mdss_dsi_adv7533_720p { | |
| label = "adv7533 720p video mode dsi panel"; | |
| qcom,mdss-dsi-panel-name = "dsi_adv7533_720p"; | |
| qcom,mdss-dsi-panel-controller = <0x27b>; | |
| qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| qcom,mdss-dsi-panel-destination = "display_1"; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x00>; | |
| qcom,mdss-dsi-stream = <0x00>; | |
| qcom,mdss-dsi-panel-width = <0x500>; | |
| qcom,mdss-dsi-panel-height = <0x2d0>; | |
| qcom,mdss-dsi-h-front-porch = <0x6e>; | |
| qcom,mdss-dsi-h-back-porch = <0xdc>; | |
| qcom,mdss-dsi-h-pulse-width = <0x28>; | |
| qcom,mdss-dsi-h-sync-skew = <0x00>; | |
| qcom,mdss-dsi-v-back-porch = <0x14>; | |
| qcom,mdss-dsi-v-front-porch = <0x05>; | |
| qcom,mdss-dsi-v-pulse-width = <0x05>; | |
| qcom,mdss-dsi-h-left-border = <0x00>; | |
| qcom,mdss-dsi-h-right-border = <0x00>; | |
| qcom,mdss-dsi-v-top-border = <0x00>; | |
| qcom,mdss-dsi-v-bottom-border = <0x00>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-border-color = <0x00>; | |
| qcom,mdss-dsi-on-command = [05 01 00 00 c8 00 02 11 00 05 01 00 00 0a 00 02 29 00]; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 00 00 02 28 00 05 01 00 00 00 00 02 10 00]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-h-sync-pulse = <0x01>; | |
| qcom,mdss-dsi-traffic-mode = "non_burst_sync_pulse"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-panel-timings = <0xa4241800 0x4e521c28 0x1c030400>; | |
| qcom,mdss-dsi-t-clk-post = <0x03>; | |
| qcom,mdss-dsi-t-clk-pre = <0x20>; | |
| qcom,mdss-dsi-bl-min-level = <0x01>; | |
| qcom,mdss-dsi-bl-max-level = <0xfff>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-reset-sequence = <0x01 0x14 0x00 0x01 0x01 0x14>; | |
| qcom,mdss-pan-physical-width-dimension = <0xa0>; | |
| qcom,mdss-pan-physical-height-dimension = <0x5a>; | |
| qcom,mdss-dsi-force-clock-lane-hs; | |
| qcom,mdss-dsi-always-on; | |
| qcom,mdss-dsi-panel-timings-phy-v2 = <0x1e1b0406 0x20304a0 0x1e1b0406 0x20304a0 0x1e1b0406 0x20304a0 0x1e1b0406 0x20304a0 0x1e0e0405 0x20304a0>; | |
| qcom,dba-panel; | |
| qcom,bridge-name = "adv7533"; | |
| phandle = <0x312>; | |
| }; | |
| qcom,mdss_dsi_r69006_1080p_video { | |
| qcom,mdss-dsi-panel-name = "r69006 1080p video mode dsi panel"; | |
| qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x00>; | |
| qcom,mdss-dsi-stream = <0x00>; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-panel-height = <0x780>; | |
| qcom,mdss-dsi-h-front-porch = <0x64>; | |
| qcom,mdss-dsi-h-back-porch = <0x52>; | |
| qcom,mdss-dsi-h-pulse-width = <0x14>; | |
| qcom,mdss-dsi-h-sync-skew = <0x00>; | |
| qcom,mdss-dsi-v-back-porch = <0x09>; | |
| qcom,mdss-dsi-v-front-porch = <0x03>; | |
| qcom,mdss-dsi-v-pulse-width = <0x0f>; | |
| qcom,mdss-dsi-h-left-border = <0x00>; | |
| qcom,mdss-dsi-h-right-border = <0x00>; | |
| qcom,mdss-dsi-v-top-border = <0x00>; | |
| qcom,mdss-dsi-v-bottom-border = <0x00>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-border-color = <0x00>; | |
| qcom,mdss-dsi-on-command = [23 01 00 00 00 00 02 b0 00 29 01 00 00 00 00 06 b3 05 10 00 00 00 29 01 00 00 00 00 03 b4 0c 00 29 01 00 00 00 00 04 b6 3b c3 00 23 01 00 00 00 00 02 c0 00 15 01 00 00 00 00 02 36 98 23 01 00 00 00 00 02 cc 04 29 01 00 00 00 00 20 c1 84 00 10 ef 8b f1 ff ff df 9c c5 9a 73 8d ad 63 fe ff ff cb f8 01 00 aa 40 00 c2 01 08 00 01 29 01 00 00 00 00 0a cb 0d fe 1f 2c 00 00 00 00 00 29 01 00 00 00 00 0b c2 01 f7 80 04 63 00 60 00 01 30 29 01 00 00 00 00 07 c3 55 01 00 01 00 00 29 01 00 00 00 00 12 c4 70 00 00 00 00 00 00 00 00 02 01 00 05 01 00 00 00 29 01 00 00 00 00 0f c6 59 07 4a 07 4a 01 0e 01 02 01 02 09 15 07 29 01 00 00 00 00 1f c7 00 30 32 34 42 4e 56 62 44 4a 54 62 6b 73 7f 08 30 32 34 42 4e 56 62 44 4a 54 62 6b 73 7f 29 01 00 00 00 00 14 c8 00 00 00 00 00 fc 00 00 00 00 00 fc 00 00 00 00 00 fc 00 29 01 00 00 00 00 09 c9 1f 68 1f 68 4c 4c c4 11 29 01 00 00 00 00 11 d0 33 01 91 0b d9 19 19 00 00 00 19 99 00 00 00 00 29 01 00 00 00 00 1d d3 1b 3b bb ad a5 33 33 33 00 80 ad a8 6f 6f 33 33 33 f7 f2 1f 7d 7c ff 0f 99 00 ff ff 29 01 00 00 00 00 04 d4 57 33 03 29 01 00 00 00 00 0c d5 66 00 00 01 27 01 27 00 6d 00 6d 23 01 00 00 00 00 02 d6 81 05 01 00 00 78 00 02 11 00 05 01 00 00 78 00 02 29 00]; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 78 00 02 28 00 05 01 00 00 96 00 02 10 00]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-h-sync-pulse = <0x01>; | |
| qcom,mdss-dsi-traffic-mode = "burst_mode"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-panel-timings = <0x7d251d00 0x37332227 0x1e030400>; | |
| qcom,mdss-dsi-t-clk-post = <0x20>; | |
| qcom,mdss-dsi-t-clk-pre = <0x2c>; | |
| qcom,mdss-dsi-bl-min-level = <0x01>; | |
| qcom,mdss-dsi-bl-max-level = <0xfff>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; | |
| qcom,mdss-dsi-reset-sequence = <0x01 0x14 0x00 0x02 0x01 0x14>; | |
| qcom,mdss-dsi-panel-status-command = <0x6010001 0x500010a>; | |
| qcom,mdss-dsi-panel-status-command-mode = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-status-check-mode = "reg_read"; | |
| qcom,mdss-dsi-panel-status-read-length = <0x01>; | |
| qcom,mdss-dsi-panel-status-value = <0x1c>; | |
| qcom,mdss-dsi-panel-max-error-count = <0x03>; | |
| qcom,mdss-dsi-panel-timings-phy-v2 = <0x241f0809 0x50304a0 0x241f0809 0x50304a0 0x241f0809 0x50304a0 0x241f0809 0x50304a0 0x241b0809 0x50304a0>; | |
| phandle = <0x313>; | |
| }; | |
| qcom,mdss_dsi_r69006_1080p_cmd { | |
| qcom,mdss-dsi-panel-name = "r69006 1080p cmd mode dsi panel"; | |
| qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x00>; | |
| qcom,mdss-dsi-stream = <0x00>; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-panel-height = <0x780>; | |
| qcom,mdss-dsi-h-front-porch = <0x64>; | |
| qcom,mdss-dsi-h-back-porch = <0x52>; | |
| qcom,mdss-dsi-h-pulse-width = <0x14>; | |
| qcom,mdss-dsi-h-sync-skew = <0x00>; | |
| qcom,mdss-dsi-v-back-porch = <0x09>; | |
| qcom,mdss-dsi-v-front-porch = <0x03>; | |
| qcom,mdss-dsi-v-pulse-width = <0x0f>; | |
| qcom,mdss-dsi-h-left-border = <0x00>; | |
| qcom,mdss-dsi-h-right-border = <0x00>; | |
| qcom,mdss-dsi-v-top-border = <0x00>; | |
| qcom,mdss-dsi-v-bottom-border = <0x00>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-border-color = <0x00>; | |
| qcom,mdss-dsi-on-command = [23 01 00 00 00 00 02 b0 00 29 01 00 00 00 00 06 b3 04 10 00 00 00 29 01 00 00 00 00 03 b4 0c 00 29 01 00 00 00 00 04 b6 3b d3 00 23 01 00 00 00 00 02 c0 00 15 01 00 00 00 00 02 36 98 23 01 00 00 00 00 02 cc 04 29 01 00 00 00 00 20 c1 84 00 10 ef 8b f1 ff ff df 9c c5 9a 73 8d ad 63 fe ff ff cb f8 01 00 aa 40 02 c2 01 08 00 01 29 01 00 00 00 00 0a cb 0d fe 1f 2c 00 00 00 00 00 29 01 00 00 00 00 0b c2 01 f7 80 04 63 00 60 00 01 30 29 01 00 00 00 00 07 c3 55 01 00 01 00 00 29 01 00 00 00 00 12 c4 70 00 00 00 00 00 00 00 00 02 01 00 05 01 00 00 00 29 01 00 00 00 00 0f c6 57 07 4a 07 4a 01 0e 01 02 01 02 09 15 07 29 01 00 00 00 00 1f c7 00 06 0c 16 27 35 3f 4d 33 3c 49 5b 64 66 67 00 06 0c 16 27 35 3f 4d 33 3c 49 5b 64 66 67 29 01 00 00 00 00 14 c8 00 00 fe 01 08 e7 00 00 fd 02 03 a8 00 00 fc e7 e9 c9 00 29 01 00 00 00 00 09 c9 1f 68 1f 68 4c 4c c4 11 29 01 00 00 00 00 11 d0 11 01 91 0b d9 19 19 00 00 00 19 99 00 00 00 00 29 01 00 00 00 00 1d d3 1b 3b bb ad a5 33 33 33 00 80 ad a8 37 33 33 33 33 f7 f2 1f 7d 7c ff 0f 99 00 ff ff 29 01 00 00 00 00 04 d4 57 33 03 29 01 00 00 00 00 0c d5 66 00 00 01 32 01 32 00 0b 00 0b 29 01 00 00 00 00 02 be 04 29 01 00 00 00 00 11 cf 40 10 00 00 00 00 32 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 06 de 00 00 3f ff 10 29 01 00 00 00 00 02 e9 00 29 01 00 00 00 00 02 f2 00 23 01 00 00 00 00 02 d6 01 39 01 00 00 00 00 02 35 00 39 01 00 00 00 00 02 51 ff 39 01 00 00 00 00 02 53 2c 39 01 00 00 00 00 02 55 00 05 01 00 00 78 00 02 11 00 05 01 00 00 14 00 02 29 00]; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 0a 00 02 28 00 29 01 00 00 00 00 1d d3 13 3b bb a5 a5 33 33 33 00 80 a4 a8 37 33 33 33 33 f7 f2 1f 7d 7c ff 0f 99 00 ff ff 05 01 00 00 5a 00 02 10 00]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-traffic-mode = "burst_mode"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-te-pin-select = <0x01>; | |
| qcom,mdss-dsi-wr-mem-start = <0x2c>; | |
| qcom,mdss-dsi-wr-mem-continue = <0x3c>; | |
| qcom,mdss-dsi-te-dcs-command = <0x01>; | |
| qcom,mdss-dsi-te-check-enable; | |
| qcom,mdss-dsi-te-using-te-pin; | |
| qcom,mdss-dsi-panel-timings = <0x6e3f3600 0x5a4f3841 0x54030400>; | |
| qcom,mdss-dsi-t-clk-post = <0x1e>; | |
| qcom,mdss-dsi-t-clk-pre = <0x30>; | |
| qcom,mdss-dsi-bl-min-level = <0x01>; | |
| qcom,mdss-dsi-bl-max-level = <0xfff>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; | |
| qcom,mdss-dsi-reset-sequence = <0x01 0x0a 0x00 0x0a 0x01 0x0a>; | |
| qcom,mdss-dsi-panel-status-command = <0x6010001 0x500010a>; | |
| qcom,mdss-dsi-panel-status-command-mode = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-status-check-mode = "reg_read"; | |
| qcom,mdss-dsi-panel-status-read-length = <0x01>; | |
| qcom,mdss-dsi-panel-status-value = <0x1c>; | |
| qcom,mdss-dsi-panel-max-error-count = <0x03>; | |
| qcom,mdss-dsi-rx-eot-ignore; | |
| qcom,mdss-dsi-tx-eot-append; | |
| qcom,mdss-dsi-panel-timings-phy-v2 = <0x241f0809 0x50304a0 0x241f0809 0x50304a0 0x241f0809 0x50304a0 0x241f0809 0x50304a0 0x241b0809 0x50304a0>; | |
| phandle = <0x314>; | |
| }; | |
| qcom,mdss_dsi_truly_wuxga_video { | |
| qcom,mdss-dsi-panel-name = "truly wuxga video mode dsi panel"; | |
| qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x00>; | |
| qcom,mdss-dsi-stream = <0x00>; | |
| qcom,mdss-dsi-panel-width = <0x780>; | |
| qcom,mdss-dsi-panel-height = <0x4b0>; | |
| qcom,mdss-dsi-h-front-porch = <0x60>; | |
| qcom,mdss-dsi-h-back-porch = <0x40>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-sync-skew = <0x00>; | |
| qcom,mdss-dsi-v-back-porch = <0x10>; | |
| qcom,mdss-dsi-v-front-porch = <0x04>; | |
| qcom,mdss-dsi-v-pulse-width = <0x01>; | |
| qcom,mdss-dsi-h-left-border = <0x00>; | |
| qcom,mdss-dsi-h-right-border = <0x00>; | |
| qcom,mdss-dsi-v-top-border = <0x00>; | |
| qcom,mdss-dsi-v-bottom-border = <0x00>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-border-color = <0x00>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x00>; | |
| qcom,mdss-dsi-traffic-mode = "burst_mode"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-panel-timings = <0xf33a2600 0x6c6e2c3e 0x2f030400>; | |
| qcom,mdss-dsi-t-clk-post = <0x02>; | |
| qcom,mdss-dsi-t-clk-pre = <0x2d>; | |
| qcom,mdss-dsi-bl-min-level = <0x01>; | |
| qcom,mdss-dsi-bl-max-level = <0xfff>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-on-command = [32 01 00 00 00 00 02 00 00]; | |
| qcom,mdss-dsi-off-command = [22 01 00 00 00 00 02 00 00]; | |
| qcom,mdss-dsi-on-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; | |
| qcom,mdss-dsi-reset-sequence = <0x01 0xc8 0x00 0xc8 0x01 0xc8>; | |
| qcom,mdss-dsi-panel-timings-phy-v2 = <0x241f0809 0x50304a0 0x241f0809 0x50304a0 0x241f0809 0x50304a0 0x241f0809 0x50304a0 0x241c0809 0x50304a0>; | |
| phandle = <0x315>; | |
| }; | |
| qcom,mdss_dsi_lt8912_480p_video { | |
| qcom,mdss-dsi-panel-name = "lt8912 480p video mode dsi panel"; | |
| qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| qcom,mdss-dsi-panel-destination = "display_1"; | |
| qcom,mdss-dsi-color-order = "rgb_swap_rgb"; | |
| qcom,mdss-dsi-lane-map = "lane_map_0123"; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x00>; | |
| qcom,mdss-dsi-stream = <0x00>; | |
| qcom,mdss-dsi-panel-width = <0x280>; | |
| qcom,mdss-dsi-panel-height = <0x1e0>; | |
| qcom,mdss-dsi-h-front-porch = <0x10>; | |
| qcom,mdss-dsi-h-back-porch = <0x30>; | |
| qcom,mdss-dsi-h-pulse-width = <0x60>; | |
| qcom,mdss-dsi-h-sync-skew = <0x00>; | |
| qcom,mdss-dsi-v-back-porch = <0x20>; | |
| qcom,mdss-dsi-v-front-porch = <0x0f>; | |
| qcom,mdss-dsi-v-pulse-width = <0x02>; | |
| qcom,mdss-dsi-h-left-border = <0x00>; | |
| qcom,mdss-dsi-h-right-border = <0x00>; | |
| qcom,mdss-dsi-v-top-border = <0x00>; | |
| qcom,mdss-dsi-v-bottom-border = <0x00>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-border-color = <0x00>; | |
| qcom,mdss-dsi-on-command = [05 01 00 00 a0 00 02 11 00 05 01 00 00 a0 00 02 29 00]; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 78 00 02 28 00 05 01 00 00 78 00 02 10 00]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-h-sync-pulse = <0x00>; | |
| qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-panel-timings-phy-v2 = <0x1d1a0305 0x10304a0 0x1d1a0305 0x10304a0 0x1d0a0304 0x10304a0>; | |
| qcom,mdss-dsi-panel-timings = <0x65120c00 0x34381016 0xf030400>; | |
| qcom,mdss-dsi-t-clk-post = <0x02>; | |
| qcom,mdss-dsi-t-clk-pre = <0x2b>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-reset-sequence = <0x01 0x14 0x00 0x02 0x01 0x14>; | |
| qcom,mdss-dsi-post-init-delay = <0x01>; | |
| qcom,mdss-dsi-force-clock-lane-hs; | |
| phandle = <0x316>; | |
| }; | |
| qcom,mdss_dsi_lt8912_1080p_video { | |
| qcom,mdss-dsi-panel-name = "lt8912 1080p video mode dsi panel"; | |
| qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| qcom,mdss-dsi-panel-destination = "display_1"; | |
| qcom,mdss-dsi-color-order = "rgb_swap_rgb"; | |
| qcom,mdss-dsi-lane-map = "lane_map_0123"; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x00>; | |
| qcom,mdss-dsi-stream = <0x00>; | |
| qcom,mdss-dsi-panel-width = <0x780>; | |
| qcom,mdss-dsi-panel-height = <0x438>; | |
| qcom,mdss-dsi-h-front-porch = <0x58>; | |
| qcom,mdss-dsi-h-back-porch = <0x94>; | |
| qcom,mdss-dsi-h-pulse-width = <0x2c>; | |
| qcom,mdss-dsi-h-sync-skew = <0x00>; | |
| qcom,mdss-dsi-v-back-porch = <0x24>; | |
| qcom,mdss-dsi-v-front-porch = <0x04>; | |
| qcom,mdss-dsi-v-pulse-width = <0x05>; | |
| qcom,mdss-dsi-h-left-border = <0x00>; | |
| qcom,mdss-dsi-h-right-border = <0x00>; | |
| qcom,mdss-dsi-v-top-border = <0x00>; | |
| qcom,mdss-dsi-v-bottom-border = <0x00>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-border-color = <0x00>; | |
| qcom,mdss-dsi-on-command = [05 01 00 00 a0 00 02 11 00 05 01 00 00 a0 00 02 29 00]; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 78 00 02 28 00 05 01 00 00 78 00 02 10 00]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-h-sync-pulse = <0x00>; | |
| qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-panel-timings-phy-v2 = <0x231e0809 0x50304a0 0x231e0809 0x50304a0 0x231e0809 0x50304a0 0x231e0809 0x50304a0 0x231a0809 0x50304a0>; | |
| qcom,mdss-dsi-panel-timings = <0xe6382600 0x686c2a3a 0x2c030400>; | |
| qcom,mdss-dsi-t-clk-post = <0x02>; | |
| qcom,mdss-dsi-t-clk-pre = <0x2b>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-reset-sequence = <0x01 0x14 0x00 0x02 0x01 0x14>; | |
| qcom,mdss-dsi-post-init-delay = <0x01>; | |
| qcom,mdss-dsi-force-clock-lane-hs; | |
| phandle = <0x317>; | |
| }; | |
| qcom,mdss_dsi_hx8399c_truly_video { | |
| qcom,mdss-dsi-panel-name = "hx8399c video mode dsi truly panel"; | |
| qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x00>; | |
| qcom,mdss-dsi-stream = <0x00>; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-panel-height = <0x870>; | |
| qcom,mdss-dsi-h-front-porch = <0x34>; | |
| qcom,mdss-dsi-h-back-porch = <0x30>; | |
| qcom,mdss-dsi-h-pulse-width = <0x08>; | |
| qcom,mdss-dsi-h-sync-skew = <0x00>; | |
| qcom,mdss-dsi-v-back-porch = <0x08>; | |
| qcom,mdss-dsi-v-front-porch = <0x08>; | |
| qcom,mdss-dsi-v-pulse-width = <0x04>; | |
| qcom,mdss-dsi-h-left-border = <0x00>; | |
| qcom,mdss-dsi-h-right-border = <0x00>; | |
| qcom,mdss-dsi-v-top-border = <0x00>; | |
| qcom,mdss-dsi-v-bottom-border = <0x00>; | |
| qcom,mdss-pan-physical-width-dimension = <0x41>; | |
| qcom,mdss-pan-physical-height-dimension = <0x81>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-color-order = "rgb_swap_rgb"; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-border-color = <0x00>; | |
| qcom,mdss-dsi-on-command = [39 01 00 00 00 00 04 b9 ff 83 99 39 01 00 00 00 00 02 d2 88 39 01 00 00 00 00 0c b1 02 04 72 92 01 32 aa 11 11 52 57 39 01 00 00 00 00 10 b2 00 80 80 cc 05 07 5a 11 10 10 00 1e 70 03 d4 39 01 00 00 00 00 2d b4 00 ff 59 59 01 ab 00 00 09 00 03 05 00 28 03 0b 0d 21 03 02 00 0c a3 80 59 59 02 ab 00 00 09 00 03 05 00 28 03 0b 0d 02 00 0c a3 01 39 01 00 00 05 00 22 d3 00 0c 03 03 00 00 10 10 00 00 03 00 03 00 08 78 08 78 00 00 00 00 00 24 02 05 05 03 00 00 00 05 40 39 01 00 00 05 00 21 d5 20 20 19 19 18 18 02 03 00 01 24 24 18 18 18 18 24 24 00 00 00 00 00 00 00 00 2f 2f 30 30 31 31 39 01 00 00 05 00 21 d6 24 24 18 18 19 19 01 00 03 02 24 24 18 18 18 18 20 20 40 40 40 40 40 40 40 40 2f 2f 30 30 31 31 39 01 00 00 00 00 02 bd 00 39 01 00 00 00 00 11 d8 aa aa aa aa aa aa aa aa aa ba aa aa aa ba aa aa 39 01 00 00 00 00 02 bd 01 39 01 00 00 00 00 11 d8 00 00 00 00 00 00 00 00 82 ea aa aa 82 ea aa aa 39 01 00 00 00 00 02 bd 02 39 01 00 00 00 00 09 d8 ff ff c0 3f ff ff c0 3f 39 01 00 00 00 00 02 bd 00 39 01 00 00 05 00 37 e0 01 21 31 2d 66 6f 7b 75 7a 81 86 89 8c 90 95 97 9a a1 a2 aa 9e ad b0 5b 57 63 7a 01 21 31 2d 66 6f 7b 75 7a 81 86 89 8c 90 95 97 9a a1 a2 aa 9e ad b0 5b 57 63 7a 39 01 00 00 00 00 03 b6 7e 7e 39 01 00 00 00 00 02 cc 08 05 01 00 00 96 00 02 11 00 05 01 00 00 32 00 02 29 00]; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 32 00 02 28 00 05 01 00 00 96 00 02 10 00]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-h-sync-pulse = <0x00>; | |
| qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; | |
| qcom,mdss-dsi-lane-map = "lane_map_0123"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-tx-eot-append; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-t-clk-post = <0x0e>; | |
| qcom,mdss-dsi-t-clk-pre = <0x31>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-lp11-init; | |
| qcom,mdss-dsi-reset-sequence = <0x01 0x0a 0x00 0x0a 0x01 0x0a>; | |
| qcom,mdss-dsi-panel-timings-phy-v2 = <0x241f0809 0x50304a0 0x241f0809 0x50304a0 0x241f0809 0x50304a0 0x241f0809 0x50304a0 0x241c0809 0x50304a0>; | |
| qcom,esd-check-enabled; | |
| qcom,mdss-dsi-panel-status-check-mode = "reg_read"; | |
| qcom,mdss-dsi-panel-status-command = <0x6010001 0x10a>; | |
| qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-status-value = <0x9d 0x9d 0x9d 0x9d>; | |
| qcom,mdss-dsi-panel-on-check-value = <0x9d 0x9d 0x9d 0x9d>; | |
| qcom,mdss-dsi-panel-status-read-length = <0x04>; | |
| qcom,mdss-dsi-panel-max-error-count = <0x03>; | |
| qcom,mdss-dsi-min-refresh-rate = <0x30>; | |
| qcom,mdss-dsi-max-refresh-rate = <0x3c>; | |
| qcom,mdss-dsi-pan-enable-dynamic-fps; | |
| qcom,mdss-dsi-pan-fps-update = "dfps_immediate_porch_mode_vfp"; | |
| qcom,panel-supply-entries = <0x308>; | |
| phandle = <0x318>; | |
| }; | |
| qcom,mdss_dsi_boyi_hx83100a_800p_video { | |
| qcom,mdss-dsi-panel-name = "hx83100a 800p video mode dsi panel"; | |
| qcom,mdss-dsi-panel-controller = <0x27b>; | |
| qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| qcom,mdss-dsi-panel-destination = "display_2"; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x00>; | |
| qcom,mdss-dsi-stream = <0x00>; | |
| qcom,mdss-dsi-panel-width = <0x320>; | |
| qcom,mdss-dsi-panel-height = <0x500>; | |
| qcom,mdss-dsi-h-front-porch = <0x28>; | |
| qcom,mdss-dsi-h-back-porch = <0x28>; | |
| qcom,mdss-dsi-h-pulse-width = <0x28>; | |
| qcom,mdss-dsi-h-sync-skew = <0x00>; | |
| qcom,mdss-dsi-v-back-porch = <0x08>; | |
| qcom,mdss-dsi-v-front-porch = <0x19c>; | |
| qcom,mdss-dsi-v-pulse-width = <0x04>; | |
| qcom,mdss-dsi-h-left-border = <0x00>; | |
| qcom,mdss-dsi-h-right-border = <0x00>; | |
| qcom,mdss-dsi-v-top-border = <0x00>; | |
| qcom,mdss-dsi-v-bottom-border = <0x00>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-color-order = "rgb_swap_rgb"; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-border-color = <0x00>; | |
| qcom,mdss-dsi-on-command = [39 01 00 00 78 00 02 11 00 39 01 00 00 14 00 02 29 00]; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 96 00 02 28 00 05 01 00 00 00 00 02 10 00]; | |
| qcom,mdss-dsi-on-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-h-sync-pulse = <0x01>; | |
| qcom,mdss-dsi-traffic-mode = "burst_mode"; | |
| qcom,mdss-dsi-lane-map = "lane_map_0123"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-panel-timings = <0x9b221800 0x4a4e1c26 0x1d030400>; | |
| qcom,mdss-dsi-t-clk-post = <0x04>; | |
| qcom,mdss-dsi-t-clk-pre = <0x1f>; | |
| qcom,mdss-dsi-bl-min-level = <0x02>; | |
| qcom,mdss-dsi-bl-max-level = <0xfff>; | |
| qcom,panel-supply-entries = <0x308>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; | |
| qcom,mdss-pan-physical-width-dimension = <0x6b>; | |
| qcom,mdss-pan-physical-height-dimension = <0xac>; | |
| qcom,mdss-dsi-reset-sequence = <0x01 0x0a 0x00 0x05 0x01 0x32>; | |
| qcom,mdss-dsi-lp11-init; | |
| qcom,mdss-dsi-post-init-delay = <0x01>; | |
| qcom,mdss-dsi-panel-timings-phy-v2 = <0x1f1c0506 0x30304a0 0x1f1c0506 0x30304a0 0x1f1c0506 0x30304a0 0x1f1c0506 0x30304a0 0x1f100506 0x30304a0>; | |
| phandle = <0x319>; | |
| }; | |
| qcom,mdss_dsi_boent51021_1200p_video { | |
| qcom,mdss-dsi-panel-name = "boent51021 1200p video mode dsi panel"; | |
| qcom,mdss-dsi-panel-controller = <0x27b>; | |
| qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x00>; | |
| qcom,mdss-dsi-stream = <0x00>; | |
| qcom,mdss-dsi-panel-width = <0x4b0>; | |
| qcom,mdss-dsi-panel-height = <0x780>; | |
| qcom,mdss-dsi-h-front-porch = <0x64>; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-pulse-width = <0x01>; | |
| qcom,mdss-dsi-h-sync-skew = <0x00>; | |
| qcom,mdss-dsi-v-back-porch = <0x0e>; | |
| qcom,mdss-dsi-v-front-porch = <0x19>; | |
| qcom,mdss-dsi-v-pulse-width = <0x01>; | |
| qcom,mdss-dsi-h-left-border = <0x00>; | |
| qcom,mdss-dsi-h-right-border = <0x00>; | |
| qcom,mdss-dsi-v-top-border = <0x00>; | |
| qcom,mdss-dsi-v-bottom-border = <0x00>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-border-color = <0x00>; | |
| qcom,mdss-dsi-on-command = [23 01 00 00 01 00 02 8f a5 23 01 00 00 00 00 02 83 00 23 01 00 00 00 00 02 84 00 23 01 00 00 00 00 02 8c 80 23 01 00 00 00 00 02 cd 6c 23 01 00 00 00 00 02 c8 fc 23 01 00 00 00 00 02 97 00 23 01 00 00 00 00 02 8b 10 23 01 00 00 00 00 02 a9 20 23 01 00 00 00 00 02 83 aa 23 01 00 00 00 00 02 84 11 23 01 00 00 00 00 02 a9 4b 23 01 00 00 00 00 02 85 04 23 01 00 00 00 00 02 86 08 23 01 00 00 00 00 02 9c 10 05 01 00 00 00 00 02 11 00 23 01 00 00 00 00 02 8f 00]; | |
| qcom,mdss-dsi-off-command = [23 01 00 00 00 00 02 83 00 23 01 00 00 78 00 02 84 00 05 01 00 00 78 00 02 10 00]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-h-sync-pulse = <0x01>; | |
| qcom,mdss-dsi-traffic-mode = "burst_mode"; | |
| qcom,mdss-dsi-lane-map = "lane_map_0123"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-panel-timings = <0xf23a2800 0x6c702c3e 0x2e030400>; | |
| qcom,mdss-dsi-t-clk-post = <0x0e>; | |
| qcom,mdss-dsi-t-clk-pre = <0x33>; | |
| qcom,mdss-dsi-bl-min-level = <0x01>; | |
| qcom,mdss-dsi-bl-max-level = <0xfff>; | |
| qcom,panel-supply-entries = <0x308>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-force-clock-lane-hs; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; | |
| qcom,mdss-pan-physical-width-dimension = <0x87>; | |
| qcom,mdss-pan-physical-height-dimension = <0xd8>; | |
| qcom,mdss-dsi-lp11-init; | |
| qcom,mdss-dsi-post-init-delay = <0x01>; | |
| qcom,mdss-dsi-panel-timings-phy-v2 = <0x2520080a 0x60304a0 0x2520080a 0x60304a0 0x2520080a 0x60304a0 0x2520080a 0x60304a0 0x251d080a 0x60304a0>; | |
| phandle = <0x31a>; | |
| }; | |
| qcom,mdss_dsi_hx8394d_kingdisplay_vid { | |
| qcom,mdss-dsi-panel-name = "hx8394d wxga video mode dsi panel"; | |
| qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x00>; | |
| qcom,mdss-dsi-stream = <0x00>; | |
| qcom,mdss-dsi-panel-width = <0x320>; | |
| qcom,mdss-dsi-panel-height = <0x500>; | |
| qcom,mdss-dsi-h-front-porch = <0x18>; | |
| qcom,mdss-dsi-h-back-porch = <0x84>; | |
| qcom,mdss-dsi-h-pulse-width = <0x04>; | |
| qcom,mdss-dsi-h-sync-skew = <0x00>; | |
| qcom,mdss-dsi-v-back-porch = <0x10>; | |
| qcom,mdss-dsi-v-front-porch = <0x09>; | |
| qcom,mdss-dsi-v-pulse-width = <0x02>; | |
| qcom,mdss-dsi-h-left-border = <0x00>; | |
| qcom,mdss-dsi-h-right-border = <0x00>; | |
| qcom,mdss-dsi-v-top-border = <0x00>; | |
| qcom,mdss-dsi-v-bottom-border = <0x00>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-color-order = "rgb_swap_rgb"; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-border-color = <0x00>; | |
| qcom,mdss-dsi-on-command = [39 01 00 00 00 00 04 b9 ff 83 94 39 01 00 00 32 00 05 d9 00 8b 02 07 39 01 00 00 00 00 03 ba 73 83 39 01 00 00 00 00 10 b1 6c 10 10 24 e4 11 f1 80 e4 d7 23 80 c0 d2 58 39 01 00 00 00 00 0c b2 00 64 10 07 70 1c 08 08 1c 4d 00 39 01 00 00 00 00 0d b4 00 ff 03 5a 03 5a 03 5a 01 6a 01 6a 39 01 00 00 00 00 1f d3 00 06 00 40 1a 08 00 32 10 07 00 07 54 15 0f 05 04 02 12 10 05 07 33 33 0b 0b 37 10 07 07 39 01 00 00 00 00 2d d5 19 19 18 18 1a 1a 1b 1b 04 05 06 07 00 01 02 03 20 21 18 18 18 18 18 18 18 18 18 18 18 18 22 23 18 18 18 18 18 18 18 18 18 18 18 18 39 01 00 00 00 00 2d d6 18 18 19 19 1a 1a 1b 1b 03 02 01 00 07 06 05 04 23 22 18 18 18 18 18 18 18 18 18 18 18 18 21 20 18 18 18 18 18 18 18 18 19 18 18 18 39 01 00 00 00 00 2b e0 00 00 02 3c 3e 3f 12 3d 06 09 0a 19 0f 11 14 12 13 07 12 15 16 00 00 01 3c 3e 3f 12 3d 07 09 0b 12 0d 11 13 11 13 08 13 14 19 15 01 00 00 00 00 02 cc 09 15 01 00 00 00 00 02 d2 55 39 01 00 00 00 00 03 c0 30 14 39 01 00 00 00 00 04 bf 41 0e 01 39 01 00 00 00 00 05 c7 00 c0 40 c0 15 01 00 00 00 00 02 df 8e 05 01 00 00 c8 00 01 11 05 01 00 00 c8 00 01 29]; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 32 00 02 28 00 05 01 00 00 78 00 02 10 00]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-h-sync-pulse = <0x00>; | |
| qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-panel-timings = <0x8b1f1400 0x454a1923 0x23030400>; | |
| qcom,mdss-dsi-t-clk-post = <0x04>; | |
| qcom,mdss-dsi-t-clk-pre = <0x1d>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-reset-sequence = <0x01 0x14 0x00 0x02 0x01 0x14>; | |
| qcom,mdss-dsi-init-delay-us = <0xc350>; | |
| qcom,mdss-dsi-bl-min-level = <0x01>; | |
| qcom,mdss-dsi-bl-max-level = <0xfff>; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; | |
| qcom,mdss-pan-physical-width-dimension = <0x6b>; | |
| qcom,mdss-pan-physical-height-dimension = <0xac>; | |
| qcom,mdss-dsi-panel-timings-phy-v2 = <0x1c190203 0x10304a0 0x1c190203 0x10304a0 0x1c190203 0x10304a0 0x1c190203 0x10304a0 0x1c070203 0x10304a0>; | |
| phandle = <0x31b>; | |
| }; | |
| qcom,mdss_dsi_inxnt51021_1200p_video { | |
| qcom,mdss-dsi-panel-name = "inxnt51021 1200p video mode dsi panel"; | |
| qcom,mdss-dsi-panel-controller = <0x27b>; | |
| qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x00>; | |
| qcom,mdss-dsi-stream = <0x00>; | |
| qcom,mdss-dsi-panel-width = <0x4b0>; | |
| qcom,mdss-dsi-panel-height = <0x780>; | |
| qcom,mdss-dsi-h-front-porch = <0x64>; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-pulse-width = <0x01>; | |
| qcom,mdss-dsi-h-sync-skew = <0x00>; | |
| qcom,mdss-dsi-v-back-porch = <0x0e>; | |
| qcom,mdss-dsi-v-front-porch = <0x19>; | |
| qcom,mdss-dsi-v-pulse-width = <0x01>; | |
| qcom,mdss-dsi-h-left-border = <0x00>; | |
| qcom,mdss-dsi-h-right-border = <0x00>; | |
| qcom,mdss-dsi-v-top-border = <0x00>; | |
| qcom,mdss-dsi-v-bottom-border = <0x00>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-border-color = <0x00>; | |
| qcom,mdss-dsi-on-command = [23 01 00 00 01 00 02 8f a5 23 01 00 00 00 00 02 83 00 23 01 00 00 00 00 02 84 00 23 01 00 00 00 00 02 8c 84 23 01 00 00 00 00 02 c5 50 23 01 00 00 00 00 02 c7 50 23 01 00 00 00 00 02 85 04 23 01 00 00 00 00 02 86 08 23 01 00 00 00 00 02 83 aa 23 01 00 00 00 00 02 84 11 23 01 00 00 00 00 02 9c 10 23 01 00 00 00 00 02 a9 4b 23 01 00 00 00 00 02 a0 36 23 01 00 00 00 00 02 a1 36 23 01 00 00 00 00 02 c0 00 23 01 00 00 00 00 02 e0 3d 23 01 00 00 00 00 02 83 bb 23 01 00 00 00 00 02 84 22 23 01 00 00 00 00 02 c0 00 23 01 00 00 00 00 02 e0 3d 23 01 00 00 00 00 02 83 cc 23 01 00 00 00 00 02 84 33 23 01 00 00 00 00 02 c0 00 23 01 00 00 00 00 02 e0 3d 23 01 00 00 00 00 02 8f 00]; | |
| qcom,mdss-dsi-off-command = <0x23010000 0x100028f 0xa5230100 0x02 0x83002301 0x7800 0x2840005 0x1000078 0x21000>; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-h-sync-pulse = <0x01>; | |
| qcom,mdss-dsi-traffic-mode = "burst_mode"; | |
| qcom,mdss-dsi-lane-map = "lane_map_0123"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-panel-timings = <0xf23a2800 0x6c702c3e 0x2e030400>; | |
| qcom,mdss-dsi-t-clk-post = <0x0e>; | |
| qcom,mdss-dsi-t-clk-pre = <0x33>; | |
| qcom,mdss-dsi-bl-min-level = <0x01>; | |
| qcom,mdss-dsi-bl-max-level = <0xfff>; | |
| qcom,panel-supply-entries = <0x308>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-force-clock-lane-hs; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; | |
| qcom,mdss-pan-physical-width-dimension = <0x87>; | |
| qcom,mdss-pan-physical-height-dimension = <0xd8>; | |
| qcom,mdss-dsi-lp11-init; | |
| qcom,mdss-dsi-post-init-delay = <0x01>; | |
| qcom,mdss-dsi-panel-timings-phy-v2 = <0x2520080a 0x60304a0 0x2520080a 0x60304a0 0x2520080a 0x60304a0 0x2520080a 0x60304a0 0x251d080a 0x60304a0>; | |
| phandle = <0x31c>; | |
| }; | |
| qcom,mdss_dsi_boe_hx8394f_720p_video { | |
| qcom,mdss-dsi-panel-name = "boe hx8394f video mode dsi panel"; | |
| qcom,mdss-dsi-panel-controller = <0x27b>; | |
| qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x3a>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x00>; | |
| qcom,mdss-dsi-stream = <0x00>; | |
| qcom,mdss-dsi-panel-width = <0x2d0>; | |
| qcom,mdss-dsi-panel-height = <0x5f0>; | |
| qcom,mdss-dsi-h-front-porch = <0x10>; | |
| qcom,mdss-dsi-h-back-porch = <0x14>; | |
| qcom,mdss-dsi-h-pulse-width = <0x0c>; | |
| qcom,mdss-dsi-h-sync-skew = <0x00>; | |
| qcom,mdss-dsi-v-back-porch = <0x0c>; | |
| qcom,mdss-dsi-v-front-porch = <0x0a>; | |
| qcom,mdss-dsi-v-pulse-width = <0x04>; | |
| qcom,mdss-dsi-h-left-border = <0x00>; | |
| qcom,mdss-dsi-h-right-border = <0x00>; | |
| qcom,mdss-dsi-v-top-border = <0x00>; | |
| qcom,mdss-dsi-v-bottom-border = <0x00>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-border-color = <0x00>; | |
| qcom,mdss-pan-physical-width-dimension = <0x41>; | |
| qcom,mdss-pan-physical-height-dimension = <0x8a>; | |
| qcom,mdss-dsi-on-command = [39 01 00 00 00 00 04 b9 ff 83 94 39 01 00 00 00 00 02 35 00 05 01 00 00 78 00 02 11 00 39 01 00 00 00 00 02 51 00 39 01 00 00 05 00 0a c9 13 00 0a 10 b2 20 00 91 00 39 01 00 00 05 00 02 55 11 39 01 00 00 05 00 0a ca 24 24 22 20 20 20 20 20 20 39 01 00 00 00 00 02 5e 01 39 01 00 00 00 00 02 53 24 39 01 00 00 00 00 02 cc 0b 39 01 00 00 00 00 02 ba 72 05 01 00 00 14 00 02 29 00]; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 24 00 02 28 00 05 01 00 00 3c 00 02 10 00]; | |
| qcom,mdss-dsi-cabc-on-command = [39 01 00 00 05 00 0a ca 24 24 23 22 21 21 21 20 20]; | |
| qcom,mdss-dsi-cabc-off-command = [39 01 00 00 05 00 0a ca 20 20 20 20 20 20 20 20 20]; | |
| qcom,mdss-dsi-cabc-movie-on-command = [39 01 00 00 05 00 0a ca 2d 2c 2a 28 26 24 23 21 20]; | |
| qcom,mdss-dsi-cabc-movie-off-command = [39 01 00 00 05 00 0a ca 20 20 20 20 20 20 20 20 20]; | |
| qcom,mdss-dsi-cabc-still-on-command = [39 01 00 00 05 00 0a ca 4d 39 35 31 2d 29 25 22 20]; | |
| qcom,mdss-dsi-cabc-still-off-command = [39 01 00 00 05 00 0a ca 20 20 20 20 20 20 20 20 20]; | |
| qcom,mdss-dsi-ce-on-command = [15 01 00 00 00 00 02 e4 00 39 01 00 00 00 00 20 e5 00 00 02 08 01 00 00 00 00 00 00 05 1d 19 1f 05 ed 09 20 00 00 04 0b 02 01 08 08 07 02 04 02 39 01 00 00 00 00 16 e6 00 08 00 05 05 10 10 10 20 20 20 10 10 10 10 10 10 a0 01 0f 11 39 01 00 00 00 00 03 e4 00 41]; | |
| qcom,mdss-dsi-ce-off-command = [39 01 00 00 00 00 03 e4 00 00]; | |
| qcom,mdss-dsi-srgb-on-command; | |
| qcom,mdss-dsi-srgb-off-command; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-ce-on-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-ce-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-cabc-on-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-cabc-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-cabc-movie-on-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-cabc-movie-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-cabc-still-on-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-cabc-still-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-srgb-on-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-srgb-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-h-sync-pulse = <0x01>; | |
| qcom,mdss-dsi-traffic-mode = "burst_mode"; | |
| qcom,mdss-dsi-lane-map = "lane_map_0123"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-panel-timings = <0x8b1e1400 0x42461820 0x19030400>; | |
| qcom,mdss-dsi-t-clk-post = <0x0a>; | |
| qcom,mdss-dsi-t-clk-pre = <0x1f>; | |
| qcom,mdss-dsi-bl-min-level = <0x01>; | |
| qcom,mdss-dsi-bl-max-level = <0xff>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; | |
| qcom,mdss-dsi-bl-dcs-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-reset-sequence = <0x01 0x0a 0x00 0x0a 0x01 0x1e>; | |
| qcom,mdss-dsi-lp11-init; | |
| qcom,mdss-dsi-tx-eot-append; | |
| qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-panel-status-check-mode = "reg_read"; | |
| qcom,mdss-dsi-panel-status-command = <0x14010001 0x500010a>; | |
| qcom,mdss-dsi-panel-status-read-length = <0x01>; | |
| qcom,mdss-dsi-panel-status-value = <0x1c>; | |
| qcom,esd-check-enabled; | |
| qcom,mdss-dsi-panel-timings-phy-v2 = <0x1f1c0506 0x30204a0 0x1f1c0506 0x30204a0 0x1f1c0506 0x30204a0 0x1f1c0506 0x30204a0 0x1f110506 0x30204a0>; | |
| qcom,panel-supply-entries = <0x308>; | |
| phandle = <0x31d>; | |
| }; | |
| qcom,mdss_dsi_shenchao_ili9881_720p_video { | |
| qcom,mdss-dsi-panel-name = "shenchao ili9881 video mode dsi panel"; | |
| qcom,mdss-dsi-panel-controller = <0x27b>; | |
| qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x00>; | |
| qcom,mdss-dsi-stream = <0x00>; | |
| qcom,mdss-dsi-panel-width = <0x2d0>; | |
| qcom,mdss-dsi-panel-height = <0x5f0>; | |
| qcom,mdss-dsi-h-front-porch = <0x34>; | |
| qcom,mdss-dsi-h-back-porch = <0x9a>; | |
| qcom,mdss-dsi-h-pulse-width = <0x08>; | |
| qcom,mdss-dsi-h-sync-skew = <0x00>; | |
| qcom,mdss-dsi-v-back-porch = <0x0b>; | |
| qcom,mdss-dsi-v-front-porch = <0x09>; | |
| qcom,mdss-dsi-v-pulse-width = <0x02>; | |
| qcom,mdss-dsi-h-left-border = <0x00>; | |
| qcom,mdss-dsi-h-right-border = <0x00>; | |
| qcom,mdss-dsi-v-top-border = <0x00>; | |
| qcom,mdss-dsi-v-bottom-border = <0x00>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-border-color = <0x00>; | |
| qcom,mdss-pan-physical-width-dimension = <0x41>; | |
| qcom,mdss-pan-physical-height-dimension = <0x8a>; | |
| qcom,mdss-dsi-on-command = [39 01 00 00 0a 00 04 ff 98 81 00 39 01 00 00 00 00 03 51 00 00 39 01 00 00 00 00 02 53 2c 39 01 00 00 00 00 02 55 00 05 01 00 00 96 00 02 11 00 05 01 00 00 00 00 02 29 00 39 01 00 00 0a 00 02 35 00]; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 24 00 02 28 00 05 01 00 00 78 00 02 10 00]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-h-sync-pulse = <0x01>; | |
| qcom,mdss-dsi-traffic-mode = "burst_mode"; | |
| qcom,mdss-dsi-lane-map = "lane_map_0123"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-panel-timings = <0x8b1e1400 0x42461820 0x19030400>; | |
| qcom,mdss-dsi-t-clk-post = <0x0b>; | |
| qcom,mdss-dsi-t-clk-pre = <0x22>; | |
| qcom,mdss-dsi-bl-min-level = <0x10>; | |
| qcom,mdss-dsi-bl-max-level = <0xfff>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; | |
| qcom,mdss-dsi-reset-sequence = <0x01 0x05 0x00 0x0a 0x01 0x05>; | |
| qcom,esd-check-enabled; | |
| qcom,mdss-dsi-panel-status-command = <0x6010001 0x500010a>; | |
| qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-status-check-mode = "reg_read"; | |
| qcom,mdss-dsi-panel-status-read-length = <0x01>; | |
| qcom,mdss-dsi-panel-status-value = <0x9c>; | |
| qcom,mdss-dsi-panel-timings-phy-v2 = <0x1f1c0506 0x30304a0 0x1f1c0506 0x30304a0 0x1f1c0506 0x30304a0 0x1f1c0506 0x30304a0 0x1f100506 0x30304a0>; | |
| qcom,panel-supply-entries = <0x308>; | |
| phandle = <0x31e>; | |
| }; | |
| qcom,mdss_dsi_truly_otm1901a_720p_video { | |
| qcom,mdss-dsi-panel-name = "CSOT otm1901a video mode dsi panel"; | |
| qcom,mdss-dsi-panel-controller = <0x27b>; | |
| qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x00>; | |
| qcom,mdss-dsi-stream = <0x00>; | |
| qcom,mdss-dsi-panel-width = <0x2d0>; | |
| qcom,mdss-dsi-panel-height = <0x5f0>; | |
| qcom,mdss-dsi-h-front-porch = <0xec>; | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-h-pulse-width = <0x04>; | |
| qcom,mdss-dsi-h-sync-skew = <0x00>; | |
| qcom,mdss-dsi-v-back-porch = <0x09>; | |
| qcom,mdss-dsi-v-front-porch = <0x0a>; | |
| qcom,mdss-dsi-v-pulse-width = <0x01>; | |
| qcom,mdss-dsi-h-left-border = <0x00>; | |
| qcom,mdss-dsi-h-right-border = <0x00>; | |
| qcom,mdss-dsi-v-top-border = <0x00>; | |
| qcom,mdss-dsi-v-bottom-border = <0x00>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-border-color = <0x00>; | |
| qcom,mdss-pan-physical-width-dimension = <0x41>; | |
| qcom,mdss-pan-physical-height-dimension = <0x8a>; | |
| qcom,mdss-dsi-on-command = <0x39000000 0x200 0x390100 0x04 0xff190101 0x39010000 0x200 0x80390100 0x03 0xff190139 0x00 0x20000 0x39000000 0x21c 0x33390000 0x02 0xa03901 0x00 0x2c1e839 0x1000000 0x20082 0x39010000 0x2a5 0x1f390100 0x02 0xb03901 0x00 0x2ca0139 0x1000000 0x200b3 0x39010000 0x2ca 0x50390000 0x02 0x903900 0x00 0xacae6ff 0x66ffb3ff 0x39 0x00 0x20000 0x39000000 0x2c6 0x10390000 0x02 0x3900 0x00 0x13c7b0ac 0xda9cbacc 0x88888878 0x66666666 0x66666666 0x39000000 0x200 0x390000 0x02 0xc6113900 0x00 0x2000039 0x00 0x13c7a0 0x9dca9cb9 0xcb888888 0x78777766 0x66666666 0x66390000 0x02 0x3900 0x00 0x2c61239 0x00 0x20000 0x39000000 0x13c7 0xa09cba9c 0xa9cb8888 0x88787777 0x77676666 0x66663900 0x00 0x2000039 0x00 0x2c613 0x39000000 0x200 0x390000 0x13 0xc7a09bba 0xab98cb88 0x88887877 0x77777777 0x66666639 0x00 0x20000 0x39000000 0x2c6 0x14390000 0x02 0x3900 0x00 0x13c7a09a 0xba9b89cb 0x88888878 0x77777777 0x77776666 0x39000000 0x200 0x390000 0x02 0xc6153900 0x00 0x2000039 0x00 0x13c790 0x8baa9b99 0xca888888 0x78777777 0x77777777 0x66390000 0x02 0x3900 0x00 0x2c61639 0x00 0x20000 0x39000000 0x13c7 0x909aa9aa 0x98ba8888 0x88887777 0x77777777 0x77773900 0x00 0x2000039 0x00 0x2c617 0x39000000 0x200 0x390000 0x13 0xc7908a9a 0x9a89ba88 0x88888888 0x77777777 0x77777739 0x00 0x20000 0x39000000 0x2c6 0x18390000 0x02 0x3900 0x00 0x13c79099 0x999a89b9 0x88888888 0x88887777 0x77777777 0x39000000 0x200 0x390000 0x02 0xc6193900 0x00 0x2000039 0x00 0x13c780 0x8a999a98 0xb8888888 0x88888888 0x77777777 0x77390000 0x02 0x3900 0x00 0x2c61a39 0x00 0x20000 0x39000000 0x13c7 0x80999999 0x88b88888 0x88888888 0x88887777 0x77773900 0x00 0x2000039 0x00 0x2c61b 0x39000000 0x200 0x390000 0x13 0xc7808999 0x9988a888 0x88888888 0x88888888 0x77777739 0x00 0x20000 0x39000000 0x2c6 0x1c390000 0x02 0x3900 0x00 0x13c78098 0x989988a8 0x88888888 0x88888888 0x88787777 0x39000000 0x200 0x390000 0x02 0xc61d3900 0x00 0x2000039 0x00 0x13c780 0x88898989 0x98888888 0x88888888 0x88888878 0x77390000 0x02 0x3900 0x00 0x2c61e39 0x00 0x20000 0x39000000 0x13c7 0x80889888 0x89988888 0x88888888 0x88888888 0x88773900 0x00 0x2000039 0x00 0x2c61f 0x39000000 0x200 0x390000 0x13 0xc7808888 0x88889888 0x88888888 0x88888888 0x88888839 0x00 0x20000 0x39010000 0x2c6 0x390000 0x02 0x3900 0x00 0x10d40040 0x400040 0x400040 0x400040 0x390000 0x10 0xd4400040 0x400040 0x400040 0x400040 0x39000000 0x10d4 0x400040 0x400040 0x400040 0x400039 0x00 0x10d440 0x400040 0x400040 0x400040 0x403900 0x00 0x10d40040 0x400040 0x400040 0x400040 0x390000 0x10 0xd4400040 0x400040 0x400040 0x400040 0x39000000 0x10d4 0x400040 0x400040 0x400040 0x400039 0x00 0x10d440 0x400040 0x400040 0x400040 0x403900 0x00 0x10d40040 0x400040 0x400040 0x400040 0x390000 0x10 0xd4400040 0x400040 0x400040 0x400040 0x39000000 0x10d4 0x400040 0x400040 0x400040 0x400039 0x00 0x10d440 0x400040 0x400040 0x400040 0x403900 0x00 0x10d40040 0x400040 0x400040 0x400040 0x390000 0x10 0xd4400040 0x400040 0x400040 0x400040 0x39000000 0x10d4 0x400040 0x400040 0x400040 0x400039 0x00 0x10d440 0x400040 0x400040 0x400040 0x403900 0x00 0x10d40040 0x400040 0x400040 0x400040 0x390000 0x10 0xd4400040 0x400040 0x400040 0x400040 0x39000000 0x10d4 0x400040 0x400040 0x400040 0x400039 0x00 0x10d440 0x400040 0x400040 0x400040 0x403900 0x00 0x10d40040 0x400040 0x400040 0x400040 0x390000 0x10 0xd4400040 0x400040 0x400040 0x400040 0x39000000 0x10d4 0x400040 0x400040 0x400040 0x400039 0x00 0x10d440 0x400040 0x400040 0x400040 0x403900 0x00 0x10d4fc3b 0xfc3bfc3b 0xfc3bfc3b 0xfc3bfc3b 0xfc390000 0x10 0xd43bfc3b 0xfc3bfc3b 0xfc3bfc3b 0xfc3bfc3b 0x39000000 0x10d4 0xfc3bfc3c 0xfd3cfd3c 0xfe3cfe3c 0xfe3cff39 0x00 0x10d43c 0xff3d003d 0x3d013d 0x13d013d 0x23d3900 0x00 0x10d4023e 0x23e023f 0x23f0140 0x1410141 0x1390000 0x10 0xd4420142 0x1430144 0x1440045 0x450046 0x39000000 0x10d4 0x470047 0x470048 0x480049 0x490039 0x00 0x10d449 0x4a004a 0x4b004b 0x4c004c 0x4c3900 0x00 0x10d4004d 0x4d004d 0x4d004d 0x4d004d 0x390000 0x10 0xd44d004d 0x4d004d 0x4d004d 0x4d004d 0x39000000 0x10d4 0x4d004d 0x4d004d 0x4d004d 0x4d0039 0x00 0x10d44d 0x4d004d 0x4d004d 0x4d004d 0x4d3900 0x00 0x10d4004d 0x4d004d 0x4d004d 0x4d004d 0x390000 0x10 0xd44d004d 0x4d004d 0x4d004d 0x4d004d 0x39000000 0x10d4 0x4d004c 0x4c004b 0x4b004b 0x4a0039 0x00 0x10d44a 0x490049 0x480048 0x480047 0x473900 0x00 0x10d40046 0x460045 0x450045 0x440044 0x390000 0x10 0xd4430043 0x420042 0x420041 0x410040 0x39000000 0x10d4 0x400040 0x400040 0x400040 0x400039 0x00 0x10d440 0x400040 0x400040 0x400040 0x403900 0x00 0x10d40040 0x400040 0x400040 0x400040 0x390000 0x10 0xd4400040 0x400040 0x400040 0x400040 0x39000000 0x10d4 0x400040 0xff3fff3f 0xff3fff3e 0xfe3efe39 0x1000000 0x10d43d 0xfe3dfd3d 0xfd3cfd3c 0xfd3cfc3b 0xfc3b3900 0x00 0x2000039 0x00 0x10d5fe 0x3efe3efe 0x3efe3efe 0x3efe3efe 0x3efe3900 0x00 0x10d53efe 0x3efe3efe 0x3efe3efe 0x3efe3efe 0x3e390000 0x10 0xd5fe3efe 0x3efe3efe 0x3eff3fff 0x3fff3fff 0x39000000 0x10d5 0x3fff3fff 0x3fff3fff 0x40004000 0x40004039 0x00 0x10d500 0x40004100 0x41004100 0x42004200 0x43003900 0x00 0x10d54300 0x44004400 0x44004500 0x45004600 0x46390000 0x10 0xd5004700 0x47004700 0x48004800 0x49004900 0x39000000 0x10d5 0x49004a00 0x4a004b00 0x4b004c00 0x4c004c39 0x00 0x10d500 0x4d004d00 0x4d004d00 0x4d004d00 0x4d003900 0x00 0x10d54d00 0x4d004d00 0x4d004d00 0x4d004d00 0x4d390000 0x10 0xd5004d00 0x4d004d00 0x4d004d00 0x4d004d00 0x39000000 0x10d5 0x4d004d00 0x4d004d00 0x4d004d00 0x4d004d39 0x00 0x10d500 0x4d004d00 0x4d004d00 0x4d004d00 0x4d003900 0x00 0x10d54d00 0x4d004d00 0x4d004d00 0x4d004d00 0x4d390000 0x10 0xd5004d00 0x4c004c00 0x4b004b00 0x4b004a00 0x39000000 0x10d5 0x4a004900 0x49004800 0x48004800 0x47004739 0x00 0x10d500 0x46004600 0x45004500 0x45004400 0x44003900 0x00 0x10d54300 0x43004200 0x42004200 0x41004100 0x40390000 0x10 0xd5004000 0x40004000 0x40004000 0x40004000 0x39000000 0x10d5 0x40004000 0x40004000 0x40004000 0x40004039 0x00 0x10d500 0x40004000 0x40004000 0x40004000 0x40003900 0x00 0x10d54000 0x40004000 0x40004000 0x40004000 0x40390000 0x10 0xd5004000 0x40004000 0x40ff3fff 0x3fff3fff 0x39000000 0x10d5 0x3fff3fff 0x3fff3ffe 0x3ffe3efe 0x3efe3e39 0x00 0x10d5fc 0x3bfc3bfc 0x3bfc3bfc 0x3bfc3bfc 0x3bfc3900 0x00 0x10d53bfc 0x3bfc3bfc 0x3bfc3bfc 0x3bfc3bfc 0x3b390000 0x10 0xd5fc3bfc 0x3cfd3cfd 0x3cfe3cfe 0x3cfe3cff 0x39000000 0x10d5 0x3cff3d00 0x3d003d01 0x3d013d01 0x3d023d39 0x00 0x10d502 0x3e023e02 0x3f023f01 0x40014101 0x41013900 0x00 0x10d54201 0x42014301 0x44014400 0x45004500 0x46390000 0x10 0xd5004700 0x47004700 0x48004800 0x49004900 0x39000000 0x10d5 0x49004a00 0x4a004b00 0x4b004c00 0x4c004c39 0x00 0x10d500 0x4d004d00 0x4d004d00 0x4d004d00 0x4d003900 0x00 0x10d54d00 0x4d004d00 0x4d004d00 0x4d004d00 0x4d390000 0x10 0xd5004d00 0x4d004d00 0x4d004d00 0x4d004d00 0x39000000 0x10d5 0x4d004d00 0x4d004d00 0x4d004d00 0x4d004d39 0x00 0x10d500 0x4d004d00 0x4d004d00 0x4d004d00 0x4d003900 0x00 0x10d54d00 0x4d004d00 0x4d004d00 0x4d004d00 0x4d390000 0x10 0xd5004d00 0x4c004c00 0x4b004b00 0x4b004a00 0x39000000 0x10d5 0x4a004900 0x49004800 0x48004800 0x47004739 0x00 0x10d500 0x46004600 0x45004500 0x45004400 0x44003900 0x00 0x10d54300 0x43004200 0x42004200 0x41004100 0x40390000 0x10 0xd5004000 0x40004000 0x40004000 0x40004000 0x39000000 0x10d5 0x40004000 0x40004000 0x40004000 0x40004039 0x00 0x10d500 0x40004000 0x40004000 0x40004000 0x40003900 0x00 0x10d54000 0x40004000 0x40004000 0x40004000 0x40390000 0x10 0xd5004000 0x40ff3fff 0x3fff3fff 0x3efe3efe 0x39010000 0x10d5 0x3dfe3dfd 0x3dfd3cfd 0x3cfd3cfc 0x3bfc3b39 0x00 0x200f2 0x39000000 0xa0004c1 0x39 0x00 0x200da 0x39000000 0xa0002f5 0x21390000 0x02 0x3900 0xa00 0x2fb0139 0x00 0x20000 0x39000000 0xa0002eb 0x10390000 0x02 0x23900 0x00 0x2ff0339 0x00 0x20000 0x39000000 0x2c0 0x390000 0x02 0x23900 0x00 0x2ff0105 0x1000078 0x21100 0x39010000 0x251 0x390100 0x02 0x53243901 0x00 0x2550005 0x100000a 0x22900>; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 24 00 02 28 00 05 01 00 00 78 00 02 10 00]; | |
| qcom,mdss-dsi-cabc-on-command = [39 01 00 00 00 00 02 55 01]; | |
| qcom,mdss-dsi-cabc-off-command = [39 01 00 00 00 00 02 55 00]; | |
| qcom,mdss-dsi-cabc-movie-on-command = [39 01 00 00 00 00 02 55 03]; | |
| qcom,mdss-dsi-cabc-movie-off-command = [39 01 00 00 00 00 02 55 00]; | |
| qcom,mdss-dsi-cabc-still-on-command = [39 01 00 00 00 00 02 55 02]; | |
| qcom,mdss-dsi-cabc-still-off-command = [39 01 00 00 00 00 02 55 00]; | |
| qcom,mdss-dsi-ce-on-command = [39 01 00 00 00 00 02 81 80]; | |
| qcom,mdss-dsi-ce-off-command = [39 01 00 00 00 00 02 81 00]; | |
| qcom,mdss-dsi-srgb-on-command; | |
| qcom,mdss-dsi-srgb-off-command; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-ce-on-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-ce-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-cabc-on-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-cabc-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-cabc-movie-on-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-cabc-movie-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-cabc-still-on-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-cabc-still-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-srgb-on-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-srgb-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-h-sync-pulse = <0x01>; | |
| qcom,mdss-dsi-traffic-mode = "burst_mode"; | |
| qcom,mdss-dsi-lane-map = "lane_map_0123"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-panel-timings = <0x8b1e1400 0x42461820 0x19030400>; | |
| qcom,mdss-dsi-t-clk-post = <0x0a>; | |
| qcom,mdss-dsi-t-clk-pre = <0x1e>; | |
| qcom,mdss-dsi-bl-min-level = <0x01>; | |
| qcom,mdss-dsi-bl-max-level = <0xff>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; | |
| qcom,mdss-dsi-bl-dcs-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-reset-sequence = <0x01 0x05 0x00 0x05 0x01 0x05>; | |
| qcom,esd-check-enabled; | |
| qcom,mdss-dsi-panel-status-command = <0x6010001 0x500010a>; | |
| qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-status-check-mode = "reg_read"; | |
| qcom,mdss-dsi-panel-status-read-length = <0x01>; | |
| qcom,mdss-dsi-panel-status-value = <0x9c>; | |
| qcom,mdss-dsi-panel-timings-phy-v2 = <0x1f1c0506 0x30204a0 0x1f1c0506 0x30204a0 0x1f1c0506 0x30204a0 0x1f1c0506 0x30204a0 0x1f110506 0x30204a0>; | |
| qcom,panel-supply-entries = <0x308>; | |
| phandle = <0x31f>; | |
| }; | |
| }; | |
| qcom,mdss_dsi@0 { | |
| compatible = "qcom,mdss-dsi"; | |
| hw-config = "single_dsi"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| gdsc-supply = <0xae>; | |
| vdda-supply = <0xb1>; | |
| vcca-supply = <0xb2>; | |
| qcom,msm-bus,name = "mdss_dsi"; | |
| qcom,msm-bus,num-cases = <0x02>; | |
| qcom,msm-bus,num-paths = <0x01>; | |
| qcom,msm-bus,vectors-KBps = <0x16 0x200 0x00 0x00 0x16 0x200 0x00 0x3e8>; | |
| ranges = <0x1a94000 0x1a94000 0x400 0x1a94400 0x1a94400 0x588 0x193e000 0x193e000 0x30 0x1a96000 0x1a96000 0x400 0x1a96400 0x1a96400 0x588 0x193e000 0x193e000 0x30>; | |
| clocks = <0xaf 0x588460a4 0x12 0xbfb92ed3 0x12 0x668f51de 0xaf 0xfb32f31e 0xaf 0x585ef6d4 0xaf 0x87c1612 0xaf 0x8067c5a3>; | |
| clock-names = "mdp_core_clk\0iface_clk\0bus_clk\0ext_byte0_clk\0ext_byte1_clk\0ext_pixel0_clk\0ext_pixel1_clk"; | |
| qcom,mmss-ulp-clamp-ctrl-offset = <0x20>; | |
| qcom,mmss-phyreset-ctrl-offset = <0x24>; | |
| qcom,mdss-fb-map-prim = <0xb3>; | |
| qcom,mdss-fb-map-sec = <0xb4>; | |
| phandle = <0x27a>; | |
| qcom,core-supply-entries { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| qcom,core-supply-entry@0 { | |
| reg = <0x00>; | |
| qcom,supply-name = "gdsc"; | |
| qcom,supply-min-voltage = <0x00>; | |
| qcom,supply-max-voltage = <0x00>; | |
| qcom,supply-enable-load = <0x00>; | |
| qcom,supply-disable-load = <0x00>; | |
| }; | |
| }; | |
| qcom,ctrl-supply-entries { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| qcom,ctrl-supply-entry@0 { | |
| reg = <0x00>; | |
| qcom,supply-name = "vdda"; | |
| qcom,supply-min-voltage = <0x12b128>; | |
| qcom,supply-max-voltage = <0x12b128>; | |
| qcom,supply-enable-load = <0x46f0>; | |
| qcom,supply-disable-load = <0x01>; | |
| }; | |
| }; | |
| qcom,phy-supply-entries { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| qcom,phy-supply-entry@0 { | |
| reg = <0x00>; | |
| qcom,supply-name = "vcca"; | |
| qcom,supply-min-voltage = <0xe1d48>; | |
| qcom,supply-max-voltage = <0xe1d48>; | |
| qcom,supply-enable-load = <0x4268>; | |
| qcom,supply-disable-load = <0x20>; | |
| }; | |
| }; | |
| qcom,mdss_dsi_ctrl0@1a94000 { | |
| compatible = "qcom,mdss-dsi-ctrl"; | |
| label = "MDSS DSI CTRL->0"; | |
| cell-index = <0x00>; | |
| reg = <0x1a94000 0x400 0x1a94400 0x580 0x193e000 0x30>; | |
| reg-names = "dsi_ctrl\0dsi_phy\0mmss_misc_phys"; | |
| qcom,timing-db-mode; | |
| qcom,mdss-mdp = <0xb5>; | |
| vdd-supply = <0xb6>; | |
| vddio-supply = <0xb7>; | |
| clocks = <0xaf 0x35da7862 0xaf 0xcc5c5c77 0x12 0xaec5cb25 0xaf 0x75cc885b 0xaf 0xccac1f35 0xb8 0x60e83f06 0xb8 0x792379e1 0xb8 0xbbaa30be 0xb8 0x45b3260f 0xb8 0x177c029c 0xb8 0x98ae3c92>; | |
| clock-names = "byte_clk\0pixel_clk\0core_clk\0byte_clk_rcg\0pixel_clk_rcg\0pll_byte_clk_mux\0pll_pixel_clk_mux\0pll_byte_clk_src\0pll_pixel_clk_src\0pll_shadow_byte_clk_src\0pll_shadow_pixel_clk_src"; | |
| qcom,platform-strength-ctrl = [ff 06 ff 06 ff 06 ff 06 ff 00]; | |
| qcom,platform-regulator-settings = [1d 1d 1d 1d 1d]; | |
| qcom,platform-lane-config = <0x100f 0x100f 0x100f 0x100f 0x108f>; | |
| phandle = <0x27b>; | |
| qcom,dsi-pref-prim-pan = <0x309>; | |
| pinctrl-names = "mdss_default\0mdss_sleep"; | |
| pinctrl-0 = <0x1f8 0x1fb>; | |
| pinctrl-1 = <0x1f9 0x1fc>; | |
| qcom,platform-te-gpio = <0xf4 0x18 0x00>; | |
| qcom,platform-reset-gpio = <0xf4 0x3d 0x00>; | |
| qcom,platform-bklight-en-gpio = <0xf4 0x88 0x00>; | |
| lab-supply = <0x2c1>; | |
| ibb-supply = <0x2c2>; | |
| }; | |
| qcom,mdss_dsi_ctrl1@1a96000 { | |
| compatible = "qcom,mdss-dsi-ctrl"; | |
| label = "MDSS DSI CTRL->1"; | |
| cell-index = <0x01>; | |
| reg = <0x1a96000 0x400 0x1a96400 0x588 0x193e000 0x30>; | |
| reg-names = "dsi_ctrl\0dsi_phy\0mmss_misc_phys"; | |
| qcom,mdss-mdp = <0xb5>; | |
| vdd-supply = <0xb6>; | |
| vddio-supply = <0xb7>; | |
| clocks = <0xaf 0x41f97fd8 0xaf 0x9a9c430d 0x12 0x34653cc7 0xaf 0x63c2c955 0xaf 0x90f68ac 0xb9 0xb5a42b7b 0xb9 0x36458019 0xb9 0x63930a8f 0xb9 0xe4c9b56 0xb9 0xfc021ce5 0xb9 0xdcca3ffc>; | |
| clock-names = "byte_clk\0pixel_clk\0core_clk\0byte_clk_rcg\0pixel_clk_rcg\0pll_byte_clk_mux\0pll_pixel_clk_mux\0pll_byte_clk_src\0pll_pixel_clk_src\0pll_shadow_byte_clk_src\0pll_shadow_pixel_clk_src"; | |
| qcom,timing-db-mode; | |
| qcom,platform-strength-ctrl = [ff 06 ff 06 ff 06 ff 06 ff 00]; | |
| qcom,platform-regulator-settings = [1d 1d 1d 1d 1d]; | |
| qcom,platform-lane-config = <0x100f 0x100f 0x100f 0x100f 0x108f>; | |
| phandle = <0x27c>; | |
| status = "disabled"; | |
| qcom,dsi-pref-prim-pan = <0x30a>; | |
| pinctrl-names = "mdss_default\0mdss_sleep"; | |
| pinctrl-0 = <0x1f8 0x1fb>; | |
| pinctrl-1 = <0x1f9 0x1fc>; | |
| qcom,pluggable; | |
| qcom,platform-te-gpio = <0xf4 0x18 0x00>; | |
| qcom,platform-reset-gpio = <0xf4 0x3d 0x00>; | |
| qcom,platform-bklight-en-gpio = <0xf4 0x3b 0x00>; | |
| }; | |
| }; | |
| qcom,mdss_wb_panel { | |
| compatible = "qcom,mdss_wb"; | |
| qcom,mdss_pan_res = <0x280 0x280>; | |
| qcom,mdss_pan_bpp = <0x18>; | |
| qcom,mdss-fb-map = <0xba>; | |
| }; | |
| qcom,mdss_rotator { | |
| compatible = "qcom,mdss_rotator"; | |
| qcom,mdss-wb-count = <0x01>; | |
| qcom,mdss-has-downscale; | |
| qcom,mdss-has-ubwc; | |
| qcom,msm-bus,name = "mdss_rotator"; | |
| qcom,msm-bus,num-cases = <0x03>; | |
| qcom,msm-bus,num-paths = <0x01>; | |
| qcom,msm-bus,vectors-KBps = <0x16 0x200 0x00 0x00 0x16 0x200 0x00 0x61a800 0x16 0x200 0x00 0x61a800>; | |
| rot-vdd-supply = <0xae>; | |
| qcom,supply-names = "rot-vdd"; | |
| qcom,mdss-has-reg-bus; | |
| clocks = <0x12 0xbfb92ed3 0xaf 0x5b1f675e>; | |
| clock-names = "iface_clk\0rot_core_clk"; | |
| phandle = <0x27d>; | |
| qcom,mdss-rot-reg-bus { | |
| qcom,msm-bus,name = "mdss_rot_reg"; | |
| qcom,msm-bus,num-cases = <0x02>; | |
| qcom,msm-bus,num-paths = <0x01>; | |
| qcom,msm-bus,active-only; | |
| qcom,msm-bus,vectors-KBps = <0x01 0x24e 0x00 0x00 0x01 0x24e 0x00 0x12c00>; | |
| }; | |
| }; | |
| qcom,mdss_dsi_pll@994400 { | |
| compatible = "qcom,mdss_dsi_pll_8953"; | |
| label = "MDSS DSI 0 PLL"; | |
| cell-index = <0x00>; | |
| #clock-cells = <0x01>; | |
| reg = <0x1a94400 0x588 0x184d074 0x08 0x1a94200 0x98>; | |
| reg-names = "pll_base\0gdsc_base\0dynamic_pll_base"; | |
| gdsc-supply = <0xae>; | |
| clocks = <0x12 0xbfb92ed3>; | |
| clock-names = "iface_clk"; | |
| clock-rate = <0x00>; | |
| qcom,dsi-pll-ssc-en; | |
| qcom,dsi-pll-ssc-mode = "down-spread"; | |
| memory-region = <0xbb>; | |
| phandle = <0xb8>; | |
| qcom,platform-supply-entries { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| qcom,platform-supply-entry@0 { | |
| reg = <0x00>; | |
| qcom,supply-name = "gdsc"; | |
| qcom,supply-min-voltage = <0x00>; | |
| qcom,supply-max-voltage = <0x00>; | |
| qcom,supply-enable-load = <0x00>; | |
| qcom,supply-disable-load = <0x00>; | |
| }; | |
| }; | |
| }; | |
| qcom,mdss_dsi_pll@996400 { | |
| compatible = "qcom,mdss_dsi_pll_8953"; | |
| label = "MDSS DSI 1 PLL"; | |
| cell-index = <0x01>; | |
| #clock-cells = <0x01>; | |
| reg = <0x1a96400 0x588 0x184d074 0x08 0x1a96200 0x98>; | |
| reg-names = "pll_base\0gdsc_base\0dynamic_pll_base"; | |
| gdsc-supply = <0xae>; | |
| qcom,dsi-pll-ssc-en; | |
| qcom,dsi-pll-ssc-mode = "down-spread"; | |
| clocks = <0x12 0xbfb92ed3>; | |
| clock-names = "iface_clk"; | |
| clock-rate = <0x00>; | |
| phandle = <0xb9>; | |
| qcom,platform-supply-entries { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| qcom,platform-supply-entry@0 { | |
| reg = <0x00>; | |
| qcom,supply-name = "gdsc"; | |
| qcom,supply-min-voltage = <0x00>; | |
| qcom,supply-max-voltage = <0x00>; | |
| qcom,supply-enable-load = <0x00>; | |
| qcom,supply-disable-load = <0x00>; | |
| }; | |
| }; | |
| }; | |
| qcom,smp2p-modem@0x0b011008 { | |
| compatible = "qcom,smp2p"; | |
| reg = <0xb011008 0x04>; | |
| qcom,remote-pid = <0x01>; | |
| qcom,irq-bitmask = <0x4000>; | |
| interrupts = <0x00 0x1b 0x01>; | |
| }; | |
| qcom,smp2p-wcnss@0x0b011008 { | |
| compatible = "qcom,smp2p"; | |
| reg = <0xb011008 0x04>; | |
| qcom,remote-pid = <0x04>; | |
| qcom,irq-bitmask = <0x40000>; | |
| interrupts = <0x00 0x8f 0x01>; | |
| }; | |
| qcom,smp2p-adsp@0x0b011008 { | |
| compatible = "qcom,smp2p"; | |
| reg = <0xb011008 0x04>; | |
| qcom,remote-pid = <0x02>; | |
| qcom,irq-bitmask = <0x400>; | |
| interrupts = <0x00 0x123 0x01>; | |
| }; | |
| qcom,smp2pgpio-smp2p-15-in { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "smp2p"; | |
| qcom,remote-pid = <0x0f>; | |
| qcom,is-inbound; | |
| gpio-controller; | |
| #gpio-cells = <0x02>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x02>; | |
| phandle = <0xbc>; | |
| }; | |
| qcom,smp2pgpio_test_smp2p_15_in { | |
| compatible = "qcom,smp2pgpio_test_smp2p_15_in"; | |
| gpios = <0xbc 0x00 0x00>; | |
| }; | |
| qcom,smp2pgpio-smp2p-15-out { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "smp2p"; | |
| qcom,remote-pid = <0x0f>; | |
| gpio-controller; | |
| #gpio-cells = <0x02>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x02>; | |
| phandle = <0xbd>; | |
| }; | |
| qcom,smp2pgpio_test_smp2p_15_out { | |
| compatible = "qcom,smp2pgpio_test_smp2p_15_out"; | |
| gpios = <0xbd 0x00 0x00>; | |
| }; | |
| qcom,smp2pgpio-smp2p-1-in { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "smp2p"; | |
| qcom,remote-pid = <0x01>; | |
| qcom,is-inbound; | |
| gpio-controller; | |
| #gpio-cells = <0x02>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x02>; | |
| phandle = <0xbe>; | |
| }; | |
| qcom,smp2pgpio_test_smp2p_1_in { | |
| compatible = "qcom,smp2pgpio_test_smp2p_1_in"; | |
| gpios = <0xbe 0x00 0x00>; | |
| }; | |
| qcom,smp2pgpio-smp2p-1-out { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "smp2p"; | |
| qcom,remote-pid = <0x01>; | |
| gpio-controller; | |
| #gpio-cells = <0x02>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x02>; | |
| phandle = <0xbf>; | |
| }; | |
| qcom,smp2pgpio_test_smp2p_1_out { | |
| compatible = "qcom,smp2pgpio_test_smp2p_1_out"; | |
| gpios = <0xbf 0x00 0x00>; | |
| }; | |
| qcom,smp2pgpio-smp2p-4-in { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "smp2p"; | |
| qcom,remote-pid = <0x04>; | |
| qcom,is-inbound; | |
| gpio-controller; | |
| #gpio-cells = <0x02>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x02>; | |
| phandle = <0xc0>; | |
| }; | |
| qcom,smp2pgpio_test_smp2p_4_in { | |
| compatible = "qcom,smp2pgpio_test_smp2p_4_in"; | |
| gpios = <0xc0 0x00 0x00>; | |
| }; | |
| qcom,smp2pgpio-smp2p-4-out { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "smp2p"; | |
| qcom,remote-pid = <0x04>; | |
| gpio-controller; | |
| #gpio-cells = <0x02>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x02>; | |
| phandle = <0xc1>; | |
| }; | |
| qcom,smp2pgpio_test_smp2p_4_out { | |
| compatible = "qcom,smp2pgpio_test_smp2p_4_out"; | |
| gpios = <0xc1 0x00 0x00>; | |
| }; | |
| qcom,smp2pgpio-smp2p-2-in { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "smp2p"; | |
| qcom,remote-pid = <0x02>; | |
| qcom,is-inbound; | |
| gpio-controller; | |
| #gpio-cells = <0x02>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x02>; | |
| phandle = <0xc2>; | |
| }; | |
| qcom,smp2pgpio_test_smp2p_2_in { | |
| compatible = "qcom,smp2pgpio_test_smp2p_2_in"; | |
| gpios = <0xc2 0x00 0x00>; | |
| }; | |
| qcom,smp2pgpio-smp2p-2-out { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "smp2p"; | |
| qcom,remote-pid = <0x02>; | |
| gpio-controller; | |
| #gpio-cells = <0x02>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x02>; | |
| phandle = <0xc3>; | |
| }; | |
| qcom,smp2pgpio_test_smp2p_2_out { | |
| compatible = "qcom,smp2pgpio_test_smp2p_2_out"; | |
| gpios = <0xc3 0x00 0x00>; | |
| }; | |
| qcom,smp2pgpio-ssr-smp2p-1-in { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "slave-kernel"; | |
| qcom,remote-pid = <0x01>; | |
| qcom,is-inbound; | |
| gpio-controller; | |
| #gpio-cells = <0x02>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x02>; | |
| phandle = <0x13f>; | |
| }; | |
| qcom,smp2pgpio-ssr-smp2p-1-out { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "master-kernel"; | |
| qcom,remote-pid = <0x01>; | |
| gpio-controller; | |
| #gpio-cells = <0x02>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x02>; | |
| phandle = <0x140>; | |
| }; | |
| qcom,smp2pgpio-ssr-smp2p-2-in { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "slave-kernel"; | |
| qcom,remote-pid = <0x02>; | |
| qcom,is-inbound; | |
| gpio-controller; | |
| #gpio-cells = <0x02>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x02>; | |
| phandle = <0x142>; | |
| }; | |
| qcom,smp2pgpio-ssr-smp2p-2-out { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "master-kernel"; | |
| qcom,remote-pid = <0x02>; | |
| gpio-controller; | |
| #gpio-cells = <0x02>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x02>; | |
| phandle = <0x143>; | |
| }; | |
| qcom,smp2pgpio-ssr-smp2p-4-in { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "slave-kernel"; | |
| qcom,remote-pid = <0x04>; | |
| qcom,is-inbound; | |
| gpio-controller; | |
| #gpio-cells = <0x02>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x02>; | |
| phandle = <0x145>; | |
| }; | |
| qcom,smp2pgpio-ssr-smp2p-4-out { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "master-kernel"; | |
| qcom,remote-pid = <0x04>; | |
| gpio-controller; | |
| #gpio-cells = <0x02>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x02>; | |
| phandle = <0x146>; | |
| }; | |
| dcc@b3000 { | |
| compatible = "qcom,dcc"; | |
| reg = <0xb3000 0x1000 0xb4000 0x800>; | |
| reg-names = "dcc-base\0dcc-ram-base"; | |
| clocks = <0x12 0xd1000c50>; | |
| clock-names = "apb_pclk"; | |
| qcom,save-reg; | |
| phandle = <0x27e>; | |
| }; | |
| apm@b111000 { | |
| compatible = "qcom,msm8953-apm"; | |
| reg = <0xb111000 0x1000>; | |
| reg-names = "pm-apcc-glb"; | |
| qcom,apm-post-halt-delay = <0x02>; | |
| qcom,apm-halt-clk-delay = <0x11>; | |
| qcom,apm-resume-clk-delay = <0x10>; | |
| qcom,apm-sel-switch-delay = <0x01>; | |
| phandle = <0x154>; | |
| }; | |
| interrupt-controller@b000000 { | |
| compatible = "qcom,msm-qgic2"; | |
| interrupt-controller; | |
| interrupt-parent = <0xc4>; | |
| #interrupt-cells = <0x03>; | |
| reg = <0xb000000 0x1000 0xb002000 0x1000>; | |
| phandle = <0xc4>; | |
| }; | |
| wake-gic@601d4 { | |
| compatible = "qcom,mpm-gic-msm8953\0qcom,mpm-gic"; | |
| interrupts = <0x00 0xab 0x01>; | |
| reg = <0x601d4 0x1000 0xb011008 0x04>; | |
| reg-names = "vmpm\0ipc"; | |
| qcom,num-mpm-irqs = <0x60>; | |
| interrupt-controller; | |
| interrupt-parent = <0xc4>; | |
| #interrupt-cells = <0x03>; | |
| phandle = <0x01>; | |
| }; | |
| wake-gpio { | |
| compatible = "qcom,mpm-gpio-msm8953\0qcom,mpm-gpio"; | |
| interrupt-controller; | |
| interrupt-parent = <0xc4>; | |
| #interrupt-cells = <0x02>; | |
| phandle = <0x50>; | |
| }; | |
| qcom,msm-gladiator@b1c0000 { | |
| compatible = "qcom,msm-gladiator"; | |
| reg = <0xb1c0000 0x4000>; | |
| reg-names = "gladiator_base"; | |
| interrupts = <0x00 0x16 0x00>; | |
| }; | |
| timer { | |
| compatible = "arm,armv8-timer"; | |
| interrupts = <0x01 0x02 0xff08 0x01 0x03 0xff08 0x01 0x04 0xff08 0x01 0x01 0xff08>; | |
| clock-frequency = <0x124f800>; | |
| }; | |
| timer@b120000 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| ranges; | |
| compatible = "arm,armv7-timer-mem"; | |
| reg = <0xb120000 0x1000>; | |
| clock-frequency = <0x124f800>; | |
| frame@b121000 { | |
| frame-number = <0x00>; | |
| interrupts = <0x00 0x08 0x04 0x00 0x07 0x04>; | |
| reg = <0xb121000 0x1000 0xb122000 0x1000>; | |
| }; | |
| frame@b123000 { | |
| frame-number = <0x01>; | |
| interrupts = <0x00 0x09 0x04>; | |
| reg = <0xb123000 0x1000>; | |
| status = "disabled"; | |
| }; | |
| frame@b124000 { | |
| frame-number = <0x02>; | |
| interrupts = <0x00 0x0a 0x04>; | |
| reg = <0xb124000 0x1000>; | |
| status = "disabled"; | |
| }; | |
| frame@b125000 { | |
| frame-number = <0x03>; | |
| interrupts = <0x00 0x0b 0x04>; | |
| reg = <0xb125000 0x1000>; | |
| status = "disabled"; | |
| }; | |
| frame@b126000 { | |
| frame-number = <0x04>; | |
| interrupts = <0x00 0x0c 0x04>; | |
| reg = <0xb126000 0x1000>; | |
| status = "disabled"; | |
| }; | |
| frame@b127000 { | |
| frame-number = <0x05>; | |
| interrupts = <0x00 0x0d 0x04>; | |
| reg = <0xb127000 0x1000>; | |
| status = "disabled"; | |
| }; | |
| frame@b128000 { | |
| frame-number = <0x06>; | |
| interrupts = <0x00 0x0e 0x04>; | |
| reg = <0xb128000 0x1000>; | |
| status = "disabled"; | |
| }; | |
| }; | |
| qcom,rmtfs_sharedmem@00000000 { | |
| compatible = "qcom,sharedmem-uio"; | |
| reg = <0x00 0x180000>; | |
| reg-names = "rmtfs"; | |
| qcom,client-id = <0x01>; | |
| }; | |
| restart@4ab000 { | |
| compatible = "qcom,pshold"; | |
| reg = <0x4ab000 0x04 0x193d100 0x04>; | |
| reg-names = "pshold-base\0tcsr-boot-misc-detect"; | |
| }; | |
| qcom,mpm2-sleep-counter@4a3000 { | |
| compatible = "qcom,mpm2-sleep-counter"; | |
| reg = <0x4a3000 0x1000>; | |
| clock-frequency = <0x8000>; | |
| }; | |
| cpu-pmu { | |
| compatible = "arm,armv8-pmuv3"; | |
| interrupts = <0x01 0x07 0xff00>; | |
| }; | |
| qcom,sps { | |
| compatible = "qcom,msm_sps_4k"; | |
| qcom,pipe-attr-ee; | |
| }; | |
| thermal-zones { | |
| phandle = <0x27f>; | |
| xo-therm-buf-adc { | |
| polling-delay-passive = <0x00>; | |
| polling-delay = <0x00>; | |
| thermal-sensors = <0xc5 0x3c>; | |
| thermal-governor = "user_space"; | |
| wake-capable-sensor; | |
| trips { | |
| active-config0 { | |
| temperature = <0xfde8>; | |
| hysteresis = <0x3e8>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| pm8953_tz { | |
| polling-delay-passive = <0x00>; | |
| polling-delay = <0x00>; | |
| thermal-sensors = <0xc6>; | |
| wake-capable-sensor; | |
| trips { | |
| pm8953-trip0 { | |
| temperature = <0x19a28>; | |
| hysteresis = <0x00>; | |
| type = "passive"; | |
| phandle = <0x280>; | |
| }; | |
| pm8953-trip1 { | |
| temperature = <0x1e848>; | |
| hysteresis = <0x00>; | |
| type = "passive"; | |
| phandle = <0x281>; | |
| }; | |
| pm8953-trip2 { | |
| temperature = <0x23668>; | |
| hysteresis = <0x00>; | |
| type = "passive"; | |
| phandle = <0x282>; | |
| }; | |
| }; | |
| }; | |
| mdm-core-usr { | |
| polling-delay-passive = <0x00>; | |
| polling-delay = <0x00>; | |
| thermal-governor = "user_space"; | |
| thermal-sensors = <0xc7 0x01>; | |
| trips { | |
| active-config0 { | |
| temperature = <0x1e848>; | |
| hysteresis = <0x3e8>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| qdsp-usr { | |
| polling-delay-passive = <0x00>; | |
| polling-delay = <0x00>; | |
| thermal-governor = "user_space"; | |
| thermal-sensors = <0xc7 0x02>; | |
| trips { | |
| active-config0 { | |
| temperature = <0x1e848>; | |
| hysteresis = <0x3e8>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| camera-usr { | |
| polling-delay-passive = <0x00>; | |
| polling-delay = <0x00>; | |
| thermal-governor = "user_space"; | |
| thermal-sensors = <0xc7 0x0e>; | |
| trips { | |
| active-config0 { | |
| temperature = <0x1e848>; | |
| hysteresis = <0x3e8>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| apc1-cpu0-usr { | |
| polling-delay-passive = <0x00>; | |
| polling-delay = <0x00>; | |
| thermal-sensors = <0xc7 0x05>; | |
| thermal-governor = "user_space"; | |
| trips { | |
| active-config0 { | |
| temperature = <0x1e848>; | |
| hysteresis = <0x3e8>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| apc1-cpu1-usr { | |
| polling-delay-passive = <0x00>; | |
| polling-delay = <0x00>; | |
| thermal-sensors = <0xc7 0x06>; | |
| thermal-governor = "user_space"; | |
| trips { | |
| active-config0 { | |
| temperature = <0x1e848>; | |
| hysteresis = <0x3e8>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| apc1-cpu2-usr { | |
| polling-delay-passive = <0x00>; | |
| polling-delay = <0x00>; | |
| thermal-sensors = <0xc7 0x07>; | |
| thermal-governor = "user_space"; | |
| trips { | |
| active-config0 { | |
| temperature = <0x1e848>; | |
| hysteresis = <0x3e8>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| apc1-cpu3-usr { | |
| polling-delay-passive = <0x00>; | |
| polling-delay = <0x00>; | |
| thermal-sensors = <0xc7 0x08>; | |
| thermal-governor = "user_space"; | |
| trips { | |
| active-config0 { | |
| temperature = <0x1e848>; | |
| hysteresis = <0x3e8>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| apc1-l2-usr { | |
| polling-delay-passive = <0x00>; | |
| polling-delay = <0x00>; | |
| thermal-sensors = <0xc7 0x09>; | |
| thermal-governor = "user_space"; | |
| trips { | |
| active-config0 { | |
| temperature = <0x1e848>; | |
| hysteresis = <0x3e8>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| gpu0-usr { | |
| polling-delay-passive = <0x00>; | |
| polling-delay = <0x00>; | |
| thermal-sensors = <0xc7 0x0f>; | |
| thermal-governor = "user_space"; | |
| trips { | |
| active-config0 { | |
| temperature = <0x1e848>; | |
| hysteresis = <0x3e8>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| quiet-therm-adc { | |
| polling-delay-passive = <0x00>; | |
| polling-delay = <0x00>; | |
| thermal-sensors = <0xc8 0x11>; | |
| thermal-governor = "user_space"; | |
| trips { | |
| active-config0 { | |
| temperature = <0xfde8>; | |
| hysteresis = <0x1388>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| pop-mem-step { | |
| polling-delay-passive = <0xfa>; | |
| polling-delay = <0x00>; | |
| thermal-sensors = <0xc7 0x02>; | |
| thermal-governor = "step_wise"; | |
| trips { | |
| pop-trip { | |
| temperature = <0x17318>; | |
| hysteresis = <0x00>; | |
| type = "passive"; | |
| phandle = <0xc9>; | |
| }; | |
| }; | |
| cooling-maps { | |
| pop_cdev0 { | |
| trip = <0xc9>; | |
| cooling-device = <0x02 0xffffffff 0xfffffffd>; | |
| }; | |
| pop_cdev1 { | |
| trip = <0xc9>; | |
| cooling-device = <0x03 0xffffffff 0xfffffffd>; | |
| }; | |
| pop_cdev2 { | |
| trip = <0xc9>; | |
| cooling-device = <0x04 0xffffffff 0xfffffffd>; | |
| }; | |
| pop_cdev3 { | |
| trip = <0xc9>; | |
| cooling-device = <0x05 0xffffffff 0xfffffffd>; | |
| }; | |
| pop_cdev4 { | |
| trip = <0xc9>; | |
| cooling-device = <0x06 0xffffffff 0xfffffffd>; | |
| }; | |
| pop_cdev5 { | |
| trip = <0xc9>; | |
| cooling-device = <0x07 0xffffffff 0xfffffffd>; | |
| }; | |
| pop_cdev6 { | |
| trip = <0xc9>; | |
| cooling-device = <0x08 0xffffffff 0xfffffffd>; | |
| }; | |
| pop_cdev7 { | |
| trip = <0xc9>; | |
| cooling-device = <0x09 0xffffffff 0xfffffffd>; | |
| }; | |
| }; | |
| }; | |
| apc1-cpu0-step { | |
| polling-delay-passive = <0x00>; | |
| polling-delay = <0x00>; | |
| thermal-sensors = <0xc7 0x05>; | |
| thermal-governor = "step_wise"; | |
| trips { | |
| apc1-cpu0-trip { | |
| temperature = <0x19a28>; | |
| hysteresis = <0x3a98>; | |
| type = "passive"; | |
| phandle = <0xca>; | |
| }; | |
| }; | |
| cooling-maps { | |
| cpu4_cdev { | |
| trip = <0xca>; | |
| cooling-device = <0x06 0xfffffffe 0xfffffffe>; | |
| }; | |
| }; | |
| }; | |
| apc1-cpu1-step { | |
| polling-delay-passive = <0x00>; | |
| polling-delay = <0x00>; | |
| thermal-sensors = <0xc7 0x06>; | |
| thermal-governor = "step_wise"; | |
| trips { | |
| apc1-cpu1-trip { | |
| temperature = <0x19a28>; | |
| hysteresis = <0x3a98>; | |
| type = "passive"; | |
| phandle = <0xcb>; | |
| }; | |
| }; | |
| cooling-maps { | |
| cpu5_cdev { | |
| trip = <0xcb>; | |
| cooling-device = <0x07 0xfffffffe 0xfffffffe>; | |
| }; | |
| }; | |
| }; | |
| apc1-cpu2-step { | |
| polling-delay-passive = <0x00>; | |
| polling-delay = <0x00>; | |
| thermal-sensors = <0xc7 0x07>; | |
| thermal-governor = "step_wise"; | |
| trips { | |
| apc1-cpu2-trip { | |
| temperature = <0x19a28>; | |
| hysteresis = <0x3a98>; | |
| type = "passive"; | |
| phandle = <0xcc>; | |
| }; | |
| }; | |
| cooling-maps { | |
| cpu6_cdev { | |
| trip = <0xcc>; | |
| cooling-device = <0x08 0xfffffffe 0xfffffffe>; | |
| }; | |
| }; | |
| }; | |
| apc1-cpu3-step { | |
| polling-delay-passive = <0x00>; | |
| polling-delay = <0x00>; | |
| thermal-sensors = <0xc7 0x08>; | |
| thermal-governor = "step_wise"; | |
| trips { | |
| apc1-cpu3-trip { | |
| temperature = <0x19a28>; | |
| hysteresis = <0x3a98>; | |
| type = "passive"; | |
| phandle = <0xcd>; | |
| }; | |
| }; | |
| cooling-maps { | |
| cpu7_cdev { | |
| trip = <0xcd>; | |
| cooling-device = <0x09 0xfffffffe 0xfffffffe>; | |
| }; | |
| }; | |
| }; | |
| mdm-core-lowf { | |
| polling-delay-passive = <0x00>; | |
| polling-delay = <0x00>; | |
| thermal-governor = "low_limits_floor"; | |
| thermal-sensors = <0xc7 0x01>; | |
| tracks-low; | |
| trips { | |
| mdm-core-trip { | |
| temperature = <0x1388>; | |
| hysteresis = <0x1388>; | |
| type = "passive"; | |
| phandle = <0xce>; | |
| }; | |
| }; | |
| cooling-maps { | |
| cpu0_vdd_cdev { | |
| trip = <0xce>; | |
| cooling-device = <0x02 0xfffffffa 0xfffffffa>; | |
| }; | |
| gpu_vdd_cdev { | |
| trip = <0xce>; | |
| cooling-device = <0xcf 0x02 0x02>; | |
| }; | |
| cx_vdd_cdev { | |
| trip = <0xce>; | |
| cooling-device = <0xd0 0x00 0x00>; | |
| }; | |
| modem_vdd_cdev { | |
| trip = <0xce>; | |
| cooling-device = <0xd1 0x00 0x00>; | |
| }; | |
| }; | |
| }; | |
| qdsp-lowf { | |
| polling-delay-passive = <0x00>; | |
| polling-delay = <0x00>; | |
| thermal-governor = "low_limits_floor"; | |
| thermal-sensors = <0xc7 0x02>; | |
| tracks-low; | |
| trips { | |
| qdsp-trip { | |
| temperature = <0x1388>; | |
| hysteresis = <0x1388>; | |
| type = "passive"; | |
| phandle = <0xd2>; | |
| }; | |
| }; | |
| cooling-maps { | |
| cpu0_vdd_cdev { | |
| trip = <0xd2>; | |
| cooling-device = <0x02 0xfffffffa 0xfffffffa>; | |
| }; | |
| gpu_vdd_cdev { | |
| trip = <0xd2>; | |
| cooling-device = <0xcf 0x02 0x02>; | |
| }; | |
| cx_vdd_cdev { | |
| trip = <0xd2>; | |
| cooling-device = <0xd0 0x00 0x00>; | |
| }; | |
| modem_vdd_cdev { | |
| trip = <0xd2>; | |
| cooling-device = <0xd1 0x00 0x00>; | |
| }; | |
| }; | |
| }; | |
| camera-lowf { | |
| polling-delay-passive = <0x00>; | |
| polling-delay = <0x00>; | |
| thermal-governor = "low_limits_floor"; | |
| thermal-sensors = <0xc7 0x0e>; | |
| tracks-low; | |
| trips { | |
| camera-trip { | |
| temperature = <0x1388>; | |
| hysteresis = <0x1388>; | |
| type = "passive"; | |
| phandle = <0xd3>; | |
| }; | |
| }; | |
| cooling-maps { | |
| cpu0_vdd_cdev { | |
| trip = <0xd3>; | |
| cooling-device = <0x02 0xfffffffa 0xfffffffa>; | |
| }; | |
| gpu_vdd_cdev { | |
| trip = <0xd3>; | |
| cooling-device = <0xcf 0x02 0x02>; | |
| }; | |
| cx_vdd_cdev { | |
| trip = <0xd3>; | |
| cooling-device = <0xd0 0x00 0x00>; | |
| }; | |
| modem_vdd_cdev { | |
| trip = <0xd3>; | |
| cooling-device = <0xd1 0x00 0x00>; | |
| }; | |
| }; | |
| }; | |
| apc1-cpu0-lowf { | |
| polling-delay-passive = <0x00>; | |
| polling-delay = <0x00>; | |
| thermal-governor = "low_limits_floor"; | |
| thermal-sensors = <0xc7 0x05>; | |
| tracks-low; | |
| trips { | |
| apc1-cpu0-trip { | |
| temperature = <0x1388>; | |
| hysteresis = <0x1388>; | |
| type = "passive"; | |
| phandle = <0xd4>; | |
| }; | |
| }; | |
| cooling-maps { | |
| cpu0_vdd_cdev { | |
| trip = <0xd4>; | |
| cooling-device = <0x02 0xfffffffa 0xfffffffa>; | |
| }; | |
| gpu_vdd_cdev { | |
| trip = <0xd4>; | |
| cooling-device = <0xcf 0x02 0x02>; | |
| }; | |
| cx_vdd_cdev { | |
| trip = <0xd4>; | |
| cooling-device = <0xd0 0x00 0x00>; | |
| }; | |
| modem_vdd_cdev { | |
| trip = <0xd4>; | |
| cooling-device = <0xd1 0x00 0x00>; | |
| }; | |
| }; | |
| }; | |
| apc1-cpu1-lowf { | |
| polling-delay-passive = <0x00>; | |
| polling-delay = <0x00>; | |
| thermal-governor = "low_limits_floor"; | |
| thermal-sensors = <0xc7 0x06>; | |
| tracks-low; | |
| trips { | |
| apc1-cpu0-trip { | |
| temperature = <0x1388>; | |
| hysteresis = <0x1388>; | |
| type = "passive"; | |
| phandle = <0xd5>; | |
| }; | |
| }; | |
| cooling-maps { | |
| cpu0_vdd_cdev { | |
| trip = <0xd5>; | |
| cooling-device = <0x02 0xfffffffa 0xfffffffa>; | |
| }; | |
| gpu_vdd_cdev { | |
| trip = <0xd5>; | |
| cooling-device = <0xcf 0x02 0x02>; | |
| }; | |
| cx_vdd_cdev { | |
| trip = <0xd5>; | |
| cooling-device = <0xd0 0x00 0x00>; | |
| }; | |
| modem_vdd_cdev { | |
| trip = <0xd5>; | |
| cooling-device = <0xd1 0x00 0x00>; | |
| }; | |
| }; | |
| }; | |
| apc1-cpu2-lowf { | |
| polling-delay-passive = <0x00>; | |
| polling-delay = <0x00>; | |
| thermal-governor = "low_limits_floor"; | |
| thermal-sensors = <0xc7 0x07>; | |
| tracks-low; | |
| trips { | |
| apc1-cpu2-trip { | |
| temperature = <0x1388>; | |
| hysteresis = <0x1388>; | |
| type = "passive"; | |
| phandle = <0xd6>; | |
| }; | |
| }; | |
| cooling-maps { | |
| cpu0_vdd_cdev { | |
| trip = <0xd6>; | |
| cooling-device = <0x02 0xfffffffa 0xfffffffa>; | |
| }; | |
| gpu_vdd_cdev { | |
| trip = <0xd6>; | |
| cooling-device = <0xcf 0x02 0x02>; | |
| }; | |
| cx_vdd_cdev { | |
| trip = <0xd6>; | |
| cooling-device = <0xd0 0x00 0x00>; | |
| }; | |
| modem_vdd_cdev { | |
| trip = <0xd6>; | |
| cooling-device = <0xd1 0x00 0x00>; | |
| }; | |
| }; | |
| }; | |
| apc1-cpu3-lowf { | |
| polling-delay-passive = <0x00>; | |
| polling-delay = <0x00>; | |
| thermal-governor = "low_limits_floor"; | |
| thermal-sensors = <0xc7 0x08>; | |
| tracks-low; | |
| trips { | |
| apc1-cpu3-trip { | |
| temperature = <0x1388>; | |
| hysteresis = <0x1388>; | |
| type = "passive"; | |
| phandle = <0xd7>; | |
| }; | |
| }; | |
| cooling-maps { | |
| cpu0_vdd_cdev { | |
| trip = <0xd7>; | |
| cooling-device = <0x02 0xfffffffa 0xfffffffa>; | |
| }; | |
| gpu_vdd_cdev { | |
| trip = <0xd7>; | |
| cooling-device = <0xcf 0x02 0x02>; | |
| }; | |
| cx_vdd_cdev { | |
| trip = <0xd7>; | |
| cooling-device = <0xd0 0x00 0x00>; | |
| }; | |
| modem_vdd_cdev { | |
| trip = <0xd7>; | |
| cooling-device = <0xd1 0x00 0x00>; | |
| }; | |
| }; | |
| }; | |
| gpu0-lowf { | |
| polling-delay-passive = <0x00>; | |
| polling-delay = <0x00>; | |
| thermal-governor = "low_limits_floor"; | |
| thermal-sensors = <0xc7 0x0f>; | |
| tracks-low; | |
| trips { | |
| gpu0-trip { | |
| temperature = <0x1388>; | |
| hysteresis = <0x1388>; | |
| type = "passive"; | |
| phandle = <0xd8>; | |
| }; | |
| }; | |
| cooling-maps { | |
| cpu0_vdd_cdev { | |
| trip = <0xd8>; | |
| cooling-device = <0x02 0xfffffffa 0xfffffffa>; | |
| }; | |
| gpu_vdd_cdev { | |
| trip = <0xd8>; | |
| cooling-device = <0xcf 0x02 0x02>; | |
| }; | |
| cx_vdd_cdev { | |
| trip = <0xd8>; | |
| cooling-device = <0xd0 0x00 0x00>; | |
| }; | |
| modem_vdd_cdev { | |
| trip = <0xd8>; | |
| cooling-device = <0xd1 0x00 0x00>; | |
| }; | |
| }; | |
| }; | |
| pa-therm0 { | |
| polling-delay-passive = <0x00>; | |
| polling-delay = <0x00>; | |
| thermal-sensors = <0xc8 0x36>; | |
| thermal-governor = "user_space"; | |
| trips { | |
| active-config0 { | |
| temperature = <0xfde8>; | |
| hysteresis = <0x1388>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| case-therm-step { | |
| status = "disabled"; | |
| }; | |
| quiet-therm-step { | |
| status = "disabled"; | |
| polling-delay-passive = <0x7d0>; | |
| polling-delay = <0x00>; | |
| thermal-sensors = <0xd9 0x53>; | |
| thermal-governor = "step_wise"; | |
| trips { | |
| quiet_batt-trip1 { | |
| temperature = <0x9470>; | |
| hysteresis = <0xbb8>; | |
| type = "passive"; | |
| phandle = <0xe0>; | |
| }; | |
| quiet_batt-trip2 { | |
| temperature = <0x9c40>; | |
| hysteresis = <0x7d0>; | |
| type = "passive"; | |
| phandle = <0xe2>; | |
| }; | |
| quiet_batt-trip3 { | |
| temperature = <0xa7f8>; | |
| hysteresis = <0xbb8>; | |
| type = "passive"; | |
| phandle = <0xe3>; | |
| }; | |
| quiet_cpus-trip { | |
| temperature = <0xa7f8>; | |
| hysteresis = <0x00>; | |
| type = "passive"; | |
| phandle = <0xda>; | |
| }; | |
| quiet_modem-trip0 { | |
| temperature = <0xafc8>; | |
| hysteresis = <0x7d0>; | |
| type = "passive"; | |
| phandle = <0xde>; | |
| }; | |
| quiet_batt-trip4 { | |
| temperature = <0xbb80>; | |
| hysteresis = <0x1388>; | |
| type = "passive"; | |
| phandle = <0xe4>; | |
| }; | |
| quiet_modem-trip1 { | |
| temperature = <0xbb80>; | |
| hysteresis = <0xbb8>; | |
| type = "passive"; | |
| phandle = <0xdb>; | |
| }; | |
| quiet_modem-trip2 { | |
| temperature = <0xd2f0>; | |
| hysteresis = <0xfa0>; | |
| type = "passive"; | |
| phandle = <0xdd>; | |
| }; | |
| }; | |
| cooling-maps { | |
| skin_cpu0 { | |
| trip = <0xda>; | |
| cooling-device = <0x02 0xffffffff 0x03>; | |
| }; | |
| skin_cpu1 { | |
| trip = <0xda>; | |
| cooling-device = <0x03 0xffffffff 0x03>; | |
| }; | |
| skin_cpu2 { | |
| trip = <0xda>; | |
| cooling-device = <0x04 0xffffffff 0x03>; | |
| }; | |
| skin_cpu3 { | |
| trip = <0xda>; | |
| cooling-device = <0x05 0xffffffff 0x03>; | |
| }; | |
| skin_cpu4 { | |
| trip = <0xda>; | |
| cooling-device = <0x06 0xffffffff 0x03>; | |
| }; | |
| skin_cpu5 { | |
| trip = <0xda>; | |
| cooling-device = <0x07 0xffffffff 0x03>; | |
| }; | |
| skin_cpu6 { | |
| trip = <0xda>; | |
| cooling-device = <0x08 0xffffffff 0x03>; | |
| }; | |
| skin_cpu7 { | |
| trip = <0xda>; | |
| cooling-device = <0x09 0xffffffff 0x03>; | |
| }; | |
| modem_lvl1 { | |
| trip = <0xdb>; | |
| cooling-device = <0xdc 0x02 0x02>; | |
| }; | |
| modem_lvl2 { | |
| trip = <0xdd>; | |
| cooling-device = <0xdc 0x03 0x03>; | |
| }; | |
| modem_proc_lvl1 { | |
| trip = <0xde>; | |
| cooling-device = <0xdf 0x01 0x01>; | |
| }; | |
| modem_proc_lvl2 { | |
| trip = <0xdd>; | |
| cooling-device = <0xdf 0x03 0x03>; | |
| }; | |
| battery_lvl1 { | |
| trip = <0xe0>; | |
| cooling-device = <0xe1 0x02 0x02>; | |
| }; | |
| battery_lvl2 { | |
| trip = <0xe2>; | |
| cooling-device = <0xe1 0x03 0x03>; | |
| }; | |
| battery_lvl3 { | |
| trip = <0xe3>; | |
| cooling-device = <0xe1 0x04 0x04>; | |
| }; | |
| battery_lvl4 { | |
| trip = <0xe4>; | |
| cooling-device = <0xe1 0x05 0x05>; | |
| }; | |
| }; | |
| }; | |
| video-usr { | |
| polling-delay-passive = <0x00>; | |
| polling-delay = <0x00>; | |
| thermal-governor = "user_space"; | |
| thermal-sensors = <0xc7 0x03>; | |
| trips { | |
| active-config0 { | |
| temperature = <0x1e848>; | |
| hysteresis = <0x3e8>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| apc1-mhm-usr { | |
| polling-delay-passive = <0x00>; | |
| polling-delay = <0x00>; | |
| thermal-sensors = <0xc7 0x04>; | |
| thermal-governor = "user_space"; | |
| trips { | |
| active-config0 { | |
| temperature = <0x1e848>; | |
| hysteresis = <0x3e8>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| cpuss0-usr { | |
| polling-delay-passive = <0x00>; | |
| polling-delay = <0x00>; | |
| thermal-sensors = <0xc7 0x0d>; | |
| thermal-governor = "user_space"; | |
| trips { | |
| active-config0 { | |
| temperature = <0x1e848>; | |
| hysteresis = <0x3e8>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| gpu0-step { | |
| polling-delay-passive = <0xfa>; | |
| polling-delay = <0x00>; | |
| thermal-sensors = <0xc7 0x0f>; | |
| thermal-governor = "step_wise"; | |
| trips { | |
| gpu-trip0 { | |
| temperature = <0x17318>; | |
| hysteresis = <0x00>; | |
| type = "passive"; | |
| phandle = <0xe5>; | |
| }; | |
| }; | |
| cooling-maps { | |
| gpu_cdev0 { | |
| trip = <0xe5>; | |
| cooling-device = <0xcf 0xffffffff 0xffffffff>; | |
| }; | |
| }; | |
| }; | |
| hepta-cpu-max-step { | |
| polling-delay-passive = <0x32>; | |
| polling-delay = <0x64>; | |
| thermal-governor = "step_wise"; | |
| trips { | |
| cpu-trip { | |
| temperature = <0x17318>; | |
| hysteresis = <0x00>; | |
| type = "passive"; | |
| phandle = <0xe6>; | |
| }; | |
| }; | |
| cooling-maps { | |
| cpu0_cdev { | |
| trip = <0xe6>; | |
| cooling-device = <0x02 0xffffffff 0xfffffffd>; | |
| }; | |
| cpu1_cdev { | |
| trip = <0xe6>; | |
| cooling-device = <0x03 0xffffffff 0xfffffffd>; | |
| }; | |
| cpu2_cdev { | |
| trip = <0xe6>; | |
| cooling-device = <0x04 0xffffffff 0xfffffffd>; | |
| }; | |
| cpu3_cdev { | |
| trip = <0xe6>; | |
| cooling-device = <0x05 0xffffffff 0xfffffffd>; | |
| }; | |
| cpu4_cdev { | |
| trip = <0xe6>; | |
| cooling-device = <0x06 0xffffffff 0xfffffffd>; | |
| }; | |
| cpu5_cdev { | |
| trip = <0xe6>; | |
| cooling-device = <0x07 0xffffffff 0xfffffffd>; | |
| }; | |
| cpu6_cdev { | |
| trip = <0xe6>; | |
| cooling-device = <0x08 0xffffffff 0xfffffffd>; | |
| }; | |
| cpu7_cdev { | |
| trip = <0xe6>; | |
| cooling-device = <0x09 0xffffffff 0xfffffffd>; | |
| }; | |
| }; | |
| }; | |
| cpuss0-step { | |
| polling-delay-passive = <0x00>; | |
| polling-delay = <0x00>; | |
| thermal-sensors = <0xc7 0x0d>; | |
| thermal-governor = "step_wise"; | |
| trips { | |
| cpuss0-trip { | |
| temperature = <0x19a28>; | |
| hysteresis = <0x3a98>; | |
| type = "passive"; | |
| phandle = <0xe7>; | |
| }; | |
| }; | |
| cooling-maps { | |
| cpu0_cdev { | |
| trip = <0xe7>; | |
| cooling-device = <0x02 0xfffffffe 0xfffffffe>; | |
| }; | |
| cpu1_cdev { | |
| trip = <0xe7>; | |
| cooling-device = <0x03 0xfffffffe 0xfffffffe>; | |
| }; | |
| cpu2_cdev { | |
| trip = <0xe7>; | |
| cooling-device = <0x04 0xfffffffe 0xfffffffe>; | |
| }; | |
| cpu3_cdev { | |
| trip = <0xe7>; | |
| cooling-device = <0x05 0xfffffffe 0xfffffffe>; | |
| }; | |
| }; | |
| }; | |
| video-lowf { | |
| polling-delay-passive = <0x00>; | |
| polling-delay = <0x00>; | |
| thermal-governor = "low_limits_floor"; | |
| thermal-sensors = <0xc7 0x03>; | |
| tracks-low; | |
| trips { | |
| video-trip { | |
| temperature = <0x1388>; | |
| hysteresis = <0x1388>; | |
| type = "passive"; | |
| phandle = <0xe8>; | |
| }; | |
| }; | |
| cooling-maps { | |
| cpu0_vdd_cdev { | |
| trip = <0xe8>; | |
| cooling-device = <0x02 0xfffffffa 0xfffffffa>; | |
| }; | |
| gpu_vdd_cdev { | |
| trip = <0xe8>; | |
| cooling-device = <0xcf 0x02 0x02>; | |
| }; | |
| cx_vdd_cdev { | |
| trip = <0xe8>; | |
| cooling-device = <0xd0 0x00 0x00>; | |
| }; | |
| modem_vdd_cdev { | |
| trip = <0xe8>; | |
| cooling-device = <0xd1 0x00 0x00>; | |
| }; | |
| }; | |
| }; | |
| apc1-mhm-low { | |
| polling-delay-passive = <0x00>; | |
| polling-delay = <0x00>; | |
| thermal-governor = "low_limits_floor"; | |
| thermal-sensors = <0xc7 0x04>; | |
| tracks-low; | |
| trips { | |
| cpuss1-trip { | |
| temperature = <0x1388>; | |
| hysteresis = <0x1388>; | |
| type = "passive"; | |
| phandle = <0xe9>; | |
| }; | |
| }; | |
| cooling-maps { | |
| cpu0_vdd_cdev { | |
| trip = <0xe9>; | |
| cooling-device = <0x02 0xfffffffa 0xfffffffa>; | |
| }; | |
| gpu_vdd_cdev { | |
| trip = <0xe9>; | |
| cooling-device = <0xcf 0x02 0x02>; | |
| }; | |
| cx_vdd_cdev { | |
| trip = <0xe9>; | |
| cooling-device = <0xd0 0x00 0x00>; | |
| }; | |
| modem_vdd_cdev { | |
| trip = <0xe9>; | |
| cooling-device = <0xd1 0x00 0x00>; | |
| }; | |
| }; | |
| }; | |
| apc1-l2-low { | |
| polling-delay-passive = <0x00>; | |
| polling-delay = <0x00>; | |
| thermal-governor = "low_limits_floor"; | |
| thermal-sensors = <0xc7 0x09>; | |
| tracks-low; | |
| trips { | |
| cpuss0-trip { | |
| temperature = <0x1388>; | |
| hysteresis = <0x1388>; | |
| type = "passive"; | |
| phandle = <0xea>; | |
| }; | |
| }; | |
| cooling-maps { | |
| cpu0_vdd_cdev { | |
| trip = <0xea>; | |
| cooling-device = <0x02 0xfffffffa 0xfffffffa>; | |
| }; | |
| gpu_vdd_cdev { | |
| trip = <0xea>; | |
| cooling-device = <0xcf 0x02 0x02>; | |
| }; | |
| cx_vdd_cdev { | |
| trip = <0xea>; | |
| cooling-device = <0xd0 0x00 0x00>; | |
| }; | |
| modem_vdd_cdev { | |
| trip = <0xea>; | |
| cooling-device = <0xd1 0x00 0x00>; | |
| }; | |
| }; | |
| }; | |
| cpuss0-lowf { | |
| polling-delay-passive = <0x00>; | |
| polling-delay = <0x00>; | |
| thermal-governor = "low_limits_floor"; | |
| thermal-sensors = <0xc7 0x0d>; | |
| tracks-low; | |
| trips { | |
| cpuss3-trip { | |
| temperature = <0x1388>; | |
| hysteresis = <0x1388>; | |
| type = "passive"; | |
| phandle = <0xeb>; | |
| }; | |
| }; | |
| cooling-maps { | |
| cpu0_vdd_cdev { | |
| trip = <0xeb>; | |
| cooling-device = <0x02 0xfffffffa 0xfffffffa>; | |
| }; | |
| gpu_vdd_cdev { | |
| trip = <0xeb>; | |
| cooling-device = <0xcf 0x02 0x02>; | |
| }; | |
| cx_vdd_cdev { | |
| trip = <0xeb>; | |
| cooling-device = <0xd0 0x00 0x00>; | |
| }; | |
| modem_vdd_cdev { | |
| trip = <0xeb>; | |
| cooling-device = <0xd1 0x00 0x00>; | |
| }; | |
| }; | |
| }; | |
| pmi-ibat-lvl0 { | |
| polling-delay-passive = <0x64>; | |
| polling-delay = <0x00>; | |
| thermal-governor = "step_wise"; | |
| thermal-sensors = <0xec 0x00>; | |
| wake-capable-sensor; | |
| trips { | |
| ibat-lvl0 { | |
| temperature = <0xfa0>; | |
| hysteresis = <0xc8>; | |
| type = "passive"; | |
| phandle = <0xed>; | |
| }; | |
| }; | |
| cooling-maps { | |
| ibat_map0 { | |
| trip = <0xed>; | |
| cooling-device = <0x02 0xfffffffa 0xfffffffa>; | |
| }; | |
| ibat_map1 { | |
| trip = <0xed>; | |
| cooling-device = <0x03 0xfffffffa 0xfffffffa>; | |
| }; | |
| ibat_map2 { | |
| trip = <0xed>; | |
| cooling-device = <0x04 0xfffffffa 0xfffffffa>; | |
| }; | |
| ibat_map3 { | |
| trip = <0xed>; | |
| cooling-device = <0x05 0xfffffffa 0xfffffffa>; | |
| }; | |
| ibat_map4 { | |
| trip = <0xed>; | |
| cooling-device = <0x06 0xfffffffe 0xfffffffe>; | |
| }; | |
| ibat_map5 { | |
| trip = <0xed>; | |
| cooling-device = <0x07 0xfffffffe 0xfffffffe>; | |
| }; | |
| ibat_map6 { | |
| trip = <0xed>; | |
| cooling-device = <0x08 0xfffffffe 0xfffffffe>; | |
| }; | |
| ibat_map7 { | |
| trip = <0xed>; | |
| cooling-device = <0x09 0xfffffffe 0xfffffffe>; | |
| }; | |
| }; | |
| }; | |
| pmi-ibat-lvl1 { | |
| polling-delay-passive = <0x00>; | |
| polling-delay = <0x00>; | |
| thermal-governor = "step_wise"; | |
| thermal-sensors = <0xec 0x01>; | |
| wake-capable-sensor; | |
| trips { | |
| ibat-lvl1 { | |
| temperature = <0x1068>; | |
| hysteresis = <0xc8>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| pmi-vbat-lvl0 { | |
| polling-delay-passive = <0x64>; | |
| polling-delay = <0x00>; | |
| thermal-governor = "low_limits_cap"; | |
| thermal-sensors = <0xec 0x02>; | |
| wake-capable-sensor; | |
| tracks-low; | |
| trips { | |
| vbat-lvl0 { | |
| temperature = <0xbb8>; | |
| hysteresis = <0x64>; | |
| type = "passive"; | |
| phandle = <0xee>; | |
| }; | |
| }; | |
| cooling-maps { | |
| vbat_map0 { | |
| trip = <0xee>; | |
| cooling-device = <0x02 0xfffffffa 0xfffffffa>; | |
| }; | |
| vbat_map1 { | |
| trip = <0xee>; | |
| cooling-device = <0x03 0xfffffffa 0xfffffffa>; | |
| }; | |
| vbat_map2 { | |
| trip = <0xee>; | |
| cooling-device = <0x04 0xfffffffa 0xfffffffa>; | |
| }; | |
| vbat_map3 { | |
| trip = <0xee>; | |
| cooling-device = <0x05 0xfffffffa 0xfffffffa>; | |
| }; | |
| vbat_map4 { | |
| trip = <0xee>; | |
| cooling-device = <0x06 0xfffffffe 0xfffffffe>; | |
| }; | |
| vbat_map5 { | |
| trip = <0xee>; | |
| cooling-device = <0x07 0xfffffffe 0xfffffffe>; | |
| }; | |
| vbat_map6 { | |
| trip = <0xee>; | |
| cooling-device = <0x08 0xfffffffe 0xfffffffe>; | |
| }; | |
| vbat_map7 { | |
| trip = <0xee>; | |
| cooling-device = <0x09 0xfffffffe 0xfffffffe>; | |
| }; | |
| }; | |
| }; | |
| pmi-vbat-lvl1 { | |
| polling-delay-passive = <0x00>; | |
| polling-delay = <0x00>; | |
| thermal-governor = "low_limits_cap"; | |
| thermal-sensors = <0xec 0x03>; | |
| wake-capable-sensor; | |
| tracks-low; | |
| trips { | |
| vbat-lvl1 { | |
| temperature = <0xaf0>; | |
| hysteresis = <0x64>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| pmi-vbat-lvl2 { | |
| polling-delay-passive = <0x00>; | |
| polling-delay = <0x00>; | |
| thermal-governor = "low_limits_cap"; | |
| thermal-sensors = <0xec 0x04>; | |
| wake-capable-sensor; | |
| tracks-low; | |
| trips { | |
| vbat-lvl1 { | |
| temperature = <0xa28>; | |
| hysteresis = <0x64>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| soc { | |
| polling-delay-passive = <0x64>; | |
| polling-delay = <0x00>; | |
| thermal-governor = "low_limits_cap"; | |
| thermal-sensors = <0xef>; | |
| wake-capable-sensor; | |
| tracks-low; | |
| trips { | |
| low-soc { | |
| temperature = <0x0a>; | |
| hysteresis = <0x00>; | |
| type = "passive"; | |
| phandle = <0xf0>; | |
| }; | |
| }; | |
| cooling-maps { | |
| soc_map0 { | |
| trip = <0xf0>; | |
| cooling-device = <0x02 0xfffffffa 0xfffffffa>; | |
| }; | |
| soc_map1 { | |
| trip = <0xf0>; | |
| cooling-device = <0x03 0xfffffffa 0xfffffffa>; | |
| }; | |
| soc_map2 { | |
| trip = <0xf0>; | |
| cooling-device = <0x04 0xfffffffa 0xfffffffa>; | |
| }; | |
| soc_map3 { | |
| trip = <0xf0>; | |
| cooling-device = <0x05 0xfffffffa 0xfffffffa>; | |
| }; | |
| soc_map4 { | |
| trip = <0xf0>; | |
| cooling-device = <0x06 0xfffffffe 0xfffffffe>; | |
| }; | |
| soc_map5 { | |
| trip = <0xf0>; | |
| cooling-device = <0x07 0xfffffffe 0xfffffffe>; | |
| }; | |
| soc_map6 { | |
| trip = <0xf0>; | |
| cooling-device = <0x08 0xfffffffe 0xfffffffe>; | |
| }; | |
| soc_map7 { | |
| trip = <0xf0>; | |
| cooling-device = <0x09 0xfffffffe 0xfffffffe>; | |
| }; | |
| }; | |
| }; | |
| pmi632_tz { | |
| polling-delay-passive = <0x00>; | |
| polling-delay = <0x00>; | |
| thermal-governor = "step_wise"; | |
| thermal-sensors = <0xf1>; | |
| wake-capable-sensor; | |
| trips { | |
| pmi632-trip0 { | |
| temperature = <0x19a28>; | |
| hysteresis = <0x00>; | |
| type = "passive"; | |
| phandle = <0x283>; | |
| }; | |
| pmi632-trip1 { | |
| temperature = <0x1e848>; | |
| hysteresis = <0x00>; | |
| type = "passive"; | |
| phandle = <0x284>; | |
| }; | |
| pmi632-trip2 { | |
| temperature = <0x23668>; | |
| hysteresis = <0x00>; | |
| type = "passive"; | |
| phandle = <0x285>; | |
| }; | |
| }; | |
| }; | |
| backlight-therm-adc { | |
| polling-delay-passive = <0x00>; | |
| polling-delay = <0x00>; | |
| thermal-sensors = <0xd9 0x53>; | |
| thermal-governor = "user_space"; | |
| trips { | |
| active-config0 { | |
| temperature = <0xfde8>; | |
| hysteresis = <0x3e8>; | |
| type = "passive"; | |
| }; | |
| }; | |
| }; | |
| }; | |
| mem_dump { | |
| compatible = "qcom,mem-dump"; | |
| memory-region = <0xf2>; | |
| rpm_sw_dump { | |
| qcom,dump-size = <0x28000>; | |
| qcom,dump-id = <0xea>; | |
| }; | |
| pmic_dump { | |
| qcom,dump-size = <0x10000>; | |
| qcom,dump-id = <0xe4>; | |
| }; | |
| vsense_dump { | |
| qcom,dump-size = <0x10000>; | |
| qcom,dump-id = <0xe9>; | |
| }; | |
| tmc_etf_dump { | |
| qcom,dump-size = <0x10000>; | |
| qcom,dump-id = <0xf0>; | |
| }; | |
| tmc_etr_reg_dump { | |
| qcom,dump-size = <0x1000>; | |
| qcom,dump-id = <0x100>; | |
| }; | |
| tmc_etf_reg_dump { | |
| qcom,dump-size = <0x1000>; | |
| qcom,dump-id = <0x101>; | |
| }; | |
| misc_data_dump { | |
| qcom,dump-size = <0x1000>; | |
| qcom,dump-id = <0xe8>; | |
| }; | |
| }; | |
| tsens@4a8000 { | |
| compatible = "qcom,msm8953-tsens"; | |
| reg = <0x4a8000 0x1000 0x4a9000 0x1000>; | |
| reg-names = "tsens_srot_physical\0tsens_tm_physical"; | |
| interrupts = <0x00 0xb8 0x00 0x00 0x13a 0x00>; | |
| interrupt-names = "tsens-upper-lower\0tsens-critical"; | |
| #thermal-sensor-cells = <0x01>; | |
| phandle = <0xc7>; | |
| }; | |
| qseecom@84A00000 { | |
| compatible = "qcom,qseecom"; | |
| reg = <0x84a00000 0x1900000>; | |
| reg-names = "secapp-region"; | |
| qcom,hlos-num-ce-hw-instances = <0x01>; | |
| qcom,hlos-ce-hw-instance = <0x00>; | |
| qcom,qsee-ce-hw-instance = <0x00>; | |
| qcom,disk-encrypt-pipe-pair = <0x02>; | |
| qcom,support-fde; | |
| qcom,commonlib64-loaded-by-uefi; | |
| qcom,msm-bus,name = "qseecom-noc"; | |
| qcom,msm-bus,num-cases = <0x04>; | |
| qcom,msm-bus,num-paths = <0x01>; | |
| qcom,support-bus-scaling; | |
| qcom,msm-bus,vectors-KBps = <0x37 0x200 0x00 0x00 0x37 0x200 0x00 0x00 0x37 0x200 0x1d4c0 0x124f80 0x37 0x200 0x60180 0x3c0f00>; | |
| clocks = <0x12 0x37a21414 0x12 0xd390d2 0x12 0x94de4919 0x12 0xd4415c9b>; | |
| clock-names = "core_clk_src\0core_clk\0iface_clk\0bus_clk"; | |
| qcom,ce-opp-freq = <0x5f5e100>; | |
| status = "okay"; | |
| phandle = <0x286>; | |
| }; | |
| tz-log@08600720 { | |
| compatible = "qcom,tz-log"; | |
| reg = "\b`\a \0\0 "; | |
| status = "okay"; | |
| phandle = <0x287>; | |
| }; | |
| qrng@e3000 { | |
| compatible = "qcom,msm-rng"; | |
| reg = <0xe3000 0x1000>; | |
| qcom,msm-rng-iface-clk; | |
| qcom,no-qrng-config; | |
| qcom,msm-bus,name = "msm-rng-noc"; | |
| qcom,msm-bus,num-cases = <0x02>; | |
| qcom,msm-bus,num-paths = <0x01>; | |
| qcom,msm-bus,vectors-KBps = <0x01 0x26a 0x00 0x00 0x01 0x26a 0x00 0x320>; | |
| clocks = <0x12 0x397e7eaa>; | |
| clock-names = "iface_clk"; | |
| status = "okay"; | |
| phandle = <0x288>; | |
| }; | |
| qcrypto@720000 { | |
| compatible = "qcom,qcrypto"; | |
| reg = <0x720000 0x20000 0x704000 0x20000>; | |
| reg-names = "crypto-base\0crypto-bam-base"; | |
| interrupts = <0x00 0xcf 0x00>; | |
| qcom,bam-pipe-pair = <0x02>; | |
| qcom,ce-hw-instance = <0x00>; | |
| qcom,ce-device = <0x00>; | |
| qcom,ce-hw-shared; | |
| qcom,clk-mgmt-sus-res; | |
| qcom,msm-bus,name = "qcrypto-noc"; | |
| qcom,msm-bus,num-cases = <0x02>; | |
| qcom,msm-bus,num-paths = <0x01>; | |
| qcom,msm-bus,vectors-KBps = <0x37 0x200 0x00 0x00 0x37 0x200 0x60180 0x60180>; | |
| clocks = <0x12 0x37a21414 0x12 0xd390d2 0x12 0x94de4919 0x12 0xd4415c9b>; | |
| clock-names = "core_clk_src\0core_clk\0iface_clk\0bus_clk"; | |
| qcom,use-sw-aes-cbc-ecb-ctr-algo; | |
| qcom,use-sw-aes-xts-algo; | |
| qcom,use-sw-aes-ccm-algo; | |
| qcom,use-sw-ahash-algo; | |
| qcom,use-sw-hmac-algo; | |
| qcom,use-sw-aead-algo; | |
| qcom,ce-opp-freq = <0x5f5e100>; | |
| status = "okay"; | |
| phandle = <0x289>; | |
| }; | |
| qcedev@720000 { | |
| compatible = "qcom,qcedev"; | |
| reg = <0x720000 0x20000 0x704000 0x20000>; | |
| reg-names = "crypto-base\0crypto-bam-base"; | |
| interrupts = <0x00 0xcf 0x00>; | |
| qcom,bam-pipe-pair = <0x01>; | |
| qcom,ce-hw-instance = <0x00>; | |
| qcom,ce-device = <0x00>; | |
| qcom,ce-hw-shared; | |
| qcom,msm-bus,name = "qcedev-noc"; | |
| qcom,msm-bus,num-cases = <0x02>; | |
| qcom,msm-bus,num-paths = <0x01>; | |
| qcom,msm-bus,vectors-KBps = <0x37 0x200 0x00 0x00 0x37 0x200 0x60180 0x60180>; | |
| clocks = <0x12 0x37a21414 0x12 0xd390d2 0x12 0x94de4919 0x12 0xd4415c9b>; | |
| clock-names = "core_clk_src\0core_clk\0iface_clk\0bus_clk"; | |
| qcom,ce-opp-freq = <0x5f5e100>; | |
| status = "okay"; | |
| phandle = <0x28a>; | |
| }; | |
| serial@78af000 { | |
| compatible = "qcom,msm-uartdm-v1.4\0qcom,msm-uartdm"; | |
| reg = <0x78af000 0x200>; | |
| interrupts = <0x00 0x6b 0x00>; | |
| clocks = <0x12 0xc7c62f90 0x12 0x8caa5b4f>; | |
| clock-names = "core\0iface"; | |
| status = "ok"; | |
| phandle = <0x28b>; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x1e0>; | |
| }; | |
| uart@78b0000 { | |
| compatible = "qcom,msm-hsuart-v14"; | |
| reg = <0x78b0000 0x200 0x7884000 0x1f000>; | |
| reg-names = "core_mem\0bam_mem"; | |
| interrupt-names = "core_irq\0bam_irq\0wakeup_irq"; | |
| #address-cells = <0x00>; | |
| interrupt-parent = <0xf3>; | |
| interrupts = <0x00 0x01 0x02>; | |
| #interrupt-cells = <0x01>; | |
| interrupt-map-mask = <0xffffffff>; | |
| interrupt-map = <0x00 0xc4 0x00 0x6c 0x00 0x01 0xc4 0x00 0xee 0x00 0x02 0xf4 0x0d 0x00>; | |
| qcom,inject-rx-on-wakeup; | |
| qcom,rx-char-to-inject = <0xfd>; | |
| qcom,master-id = <0x56>; | |
| clock-names = "core_clk\0iface_clk"; | |
| clocks = <0x12 0xf8a61c96 0x12 0x8caa5b4f>; | |
| pinctrl-names = "sleep\0default"; | |
| pinctrl-0 = <0xf5>; | |
| pinctrl-1 = <0xf6>; | |
| qcom,bam-tx-ep-pipe-index = <0x02>; | |
| qcom,bam-rx-ep-pipe-index = <0x03>; | |
| qcom,msm-bus,name = "blsp1_uart1"; | |
| qcom,msm-bus,num-cases = <0x02>; | |
| qcom,msm-bus,num-paths = <0x01>; | |
| qcom,msm-bus,vectors-KBps = <0x56 0x200 0x00 0x00 0x56 0x200 0x1f4 0x320>; | |
| status = "disabled"; | |
| phandle = <0xf3>; | |
| }; | |
| uart@7aef000 { | |
| compatible = "qcom,msm-hsuart-v14"; | |
| reg = <0x7aef000 0x200 0x7ac4000 0x1f000>; | |
| reg-names = "core_mem\0bam_mem"; | |
| interrupt-names = "core_irq\0bam_irq\0wakeup_irq"; | |
| #address-cells = <0x00>; | |
| interrupt-parent = <0xf7>; | |
| interrupts = <0x00 0x01 0x02>; | |
| #interrupt-cells = <0x01>; | |
| interrupt-map-mask = <0xffffffff>; | |
| interrupt-map = <0x00 0xc4 0x00 0x132 0x00 0x01 0xc4 0x00 0xef 0x00 0x02 0xf4 0x11 0x00>; | |
| qcom,inject-rx-on-wakeup; | |
| qcom,rx-char-to-inject = <0xfd>; | |
| qcom,master-id = <0x54>; | |
| clock-names = "core_clk\0iface_clk"; | |
| clocks = <0x12 0x8c3512ff 0x12 0x8f283c1d>; | |
| pinctrl-names = "sleep\0default"; | |
| pinctrl-0 = <0xf8>; | |
| pinctrl-1 = <0xf9>; | |
| qcom,bam-tx-ep-pipe-index = <0x00>; | |
| qcom,bam-rx-ep-pipe-index = <0x01>; | |
| qcom,msm-bus,name = "blsp2_uart0"; | |
| qcom,msm-bus,num-cases = <0x02>; | |
| qcom,msm-bus,num-paths = <0x01>; | |
| qcom,msm-bus,vectors-KBps = <0x54 0x200 0x00 0x00 0x54 0x200 0x1f4 0x320>; | |
| status = "disabled"; | |
| phandle = <0xf7>; | |
| }; | |
| uart@7af0000 { | |
| compatible = "qcom,msm-hsuart-v14"; | |
| reg = <0x7af0000 0x200 0x7ac4000 0x1f000>; | |
| reg-names = "core_mem\0bam_mem"; | |
| interrupt-names = "core_irq\0bam_irq\0wakeup_irq"; | |
| #address-cells = <0x00>; | |
| interrupt-parent = <0xfa>; | |
| interrupts = <0x00 0x01 0x02>; | |
| #interrupt-cells = <0x01>; | |
| interrupt-map-mask = <0xffffffff>; | |
| interrupt-map = <0x00 0xc4 0x00 0x133 0x00 0x01 0xc4 0x00 0xef 0x00 0x02 0xf4 0x15 0x00>; | |
| qcom,inject-rx-on-wakeup; | |
| qcom,rx-char-to-inject = <0xfd>; | |
| qcom,master-id = <0x54>; | |
| clock-names = "core_clk\0iface_clk"; | |
| clocks = <0x12 0x1e1965a3 0x12 0x8f283c1d>; | |
| pinctrl-names = "sleep\0default"; | |
| pinctrl-0 = <0xfb>; | |
| pinctrl-1 = <0xfc>; | |
| qcom,bam-tx-ep-pipe-index = <0x02>; | |
| qcom,bam-rx-ep-pipe-index = <0x03>; | |
| qcom,msm-bus,name = "blsp2_uart1"; | |
| qcom,msm-bus,num-cases = <0x02>; | |
| qcom,msm-bus,num-paths = <0x01>; | |
| qcom,msm-bus,vectors-KBps = <0x54 0x200 0x00 0x00 0x54 0x200 0x1f4 0x320>; | |
| status = "disabled"; | |
| phandle = <0xfa>; | |
| }; | |
| serial@78b0000 { | |
| compatible = "qcom,msm-uartdm-v1.4\0qcom,msm-uartdm"; | |
| reg = <0x78b0000 0x200>; | |
| interrupts = <0x00 0x6c 0x00>; | |
| clocks = <0x12 0xf8a61c96 0x12 0x8caa5b4f>; | |
| clock-names = "core\0iface"; | |
| status = "disabled"; | |
| phandle = <0x28c>; | |
| }; | |
| qcom,sps-dma@7884000 { | |
| #dma-cells = <0x04>; | |
| compatible = "qcom,sps-dma"; | |
| reg = <0x7884000 0x1f000>; | |
| interrupts = <0x00 0xee 0x00>; | |
| qcom,summing-threshold = <0x0a>; | |
| phandle = <0x107>; | |
| }; | |
| qcom,sps-dma@7ac4000 { | |
| #dma-cells = <0x04>; | |
| compatible = "qcom,sps-dma"; | |
| reg = <0x7ac4000 0x1f000>; | |
| interrupts = <0x00 0xef 0x00>; | |
| qcom,summing-threshold = <0x0a>; | |
| phandle = <0x11c>; | |
| }; | |
| spi@78b7000 { | |
| compatible = "qcom,spi-qup-v2"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg-names = "spi_physical\0spi_bam_physical"; | |
| reg = <0x78b7000 0x600 0x7884000 0x1f000>; | |
| interrupt-names = "spi_irq\0spi_bam_irq"; | |
| interrupts = <0x00 0x61 0x00 0x00 0xee 0x00>; | |
| spi-max-frequency = <0x124f800>; | |
| pinctrl-names = "spi_default\0spi_sleep"; | |
| pinctrl-0 = <0xfd 0xfe>; | |
| pinctrl-1 = <0xff 0x100>; | |
| clocks = <0x12 0x8caa5b4f 0x12 0xfb978880>; | |
| clock-names = "iface_clk\0core_clk"; | |
| qcom,infinite-mode = <0x00>; | |
| qcom,use-bam; | |
| qcom,use-pinctrl; | |
| qcom,ver-reg-exists; | |
| qcom,bam-consumer-pipe-index = <0x08>; | |
| qcom,bam-producer-pipe-index = <0x09>; | |
| qcom,master-id = <0x56>; | |
| status = "disabled"; | |
| phandle = <0x28d>; | |
| }; | |
| spi@7af6000 { | |
| compatible = "qcom,spi-qup-v2"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg-names = "spi_physical\0spi_bam_physical"; | |
| reg = <0x7af6000 0x600 0x7ac4000 0x1f000>; | |
| interrupt-names = "spi_irq\0spi_bam_irq"; | |
| interrupts = <0x00 0x12c 0x00 0x00 0xef 0x00>; | |
| spi-max-frequency = <0x124f800>; | |
| pinctrl-names = "spi_default\0spi_sleep"; | |
| pinctrl-0 = <0x101 0x102>; | |
| pinctrl-1 = <0x103 0x104>; | |
| clocks = <0x12 0x8f283c1d 0x12 0xbf54ca6d>; | |
| clock-names = "iface_clk\0core_clk"; | |
| qcom,infinite-mode = <0x00>; | |
| qcom,use-bam; | |
| qcom,use-pinctrl; | |
| qcom,ver-reg-exists; | |
| qcom,bam-consumer-pipe-index = <0x06>; | |
| qcom,bam-producer-pipe-index = <0x07>; | |
| qcom,master-id = <0x54>; | |
| status = "ok"; | |
| phandle = <0x28e>; | |
| deivce@1 { | |
| compatible = "ererl,ir2661cl510"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| reg = <0x01>; | |
| spi-max-frequency = <0xf4240>; | |
| spi-cpol; | |
| }; | |
| }; | |
| i2c@78b5000 { | |
| compatible = "qcom,i2c-msm-v2"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg-names = "qup_phys_addr"; | |
| reg = <0x78b5000 0x600>; | |
| interrupt-names = "qup_irq"; | |
| interrupts = <0x00 0x5f 0x00>; | |
| qcom,master-id = <0x56>; | |
| qcom,clk-freq-out = <0x186a0>; | |
| qcom,clk-freq-in = <0x124f800>; | |
| clock-names = "iface_clk\0core_clk"; | |
| clocks = <0x12 0x8caa5b4f 0x12 0xc303fae9>; | |
| pinctrl-names = "i2c_active\0i2c_sleep"; | |
| pinctrl-0 = <0x105>; | |
| pinctrl-1 = <0x106>; | |
| qcom,noise-rjct-scl = <0x00>; | |
| qcom,noise-rjct-sda = <0x00>; | |
| dmas = <0x107 0x04 0x40 0x20000020 0x20 0x107 0x05 0x20 0x20000020 0x20>; | |
| dma-names = "tx\0rx"; | |
| status = "disabled"; | |
| phandle = <0x28f>; | |
| }; | |
| i2c@78b6000 { | |
| compatible = "qcom,i2c-msm-v2"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg-names = "qup_phys_addr"; | |
| reg = <0x78b6000 0x600>; | |
| interrupt-names = "qup_irq"; | |
| interrupts = <0x00 0x60 0x00>; | |
| qcom,clk-freq-out = <0x61a80>; | |
| qcom,clk-freq-in = <0x124f800>; | |
| clock-names = "iface_clk\0core_clk"; | |
| clocks = <0x12 0x8caa5b4f 0x12 0x1076f220>; | |
| pinctrl-names = "i2c_active\0i2c_sleep"; | |
| pinctrl-0 = <0x108>; | |
| pinctrl-1 = <0x109>; | |
| qcom,noise-rjct-scl = <0x00>; | |
| qcom,noise-rjct-sda = <0x00>; | |
| qcom,master-id = <0x56>; | |
| dmas = <0x107 0x06 0x40 0x20000020 0x20 0x107 0x07 0x20 0x20000020 0x20>; | |
| dma-names = "tx\0rx"; | |
| status = "disabled"; | |
| phandle = <0x290>; | |
| wsa881x-i2c-codec@f { | |
| status = "okay"; | |
| compatible = "qcom,wsa881x-i2c-codec"; | |
| reg = <0x0f>; | |
| qcom,wsa-analog-vi-gpio = <0x10a>; | |
| qcom,wsa-analog-clk-gpio = <0x10b>; | |
| qcom,wsa-analog-reset-gpio = <0x10c>; | |
| phandle = <0x291>; | |
| }; | |
| wsa881x-i2c-codec@45 { | |
| status = "okay"; | |
| compatible = "qcom,wsa881x-i2c-codec"; | |
| reg = <0x45>; | |
| phandle = <0x292>; | |
| }; | |
| }; | |
| i2c@78b7000 { | |
| compatible = "qcom,i2c-msm-v2"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg-names = "qup_phys_addr"; | |
| reg = <0x78b7000 0x600>; | |
| interrupt-names = "qup_irq"; | |
| interrupts = <0x00 0x61 0x00>; | |
| qcom,clk-freq-out = <0x61a80>; | |
| qcom,clk-freq-in = <0x124f800>; | |
| clock-names = "iface_clk\0core_clk"; | |
| clocks = <0x12 0x8caa5b4f 0x12 0x9e25ac82>; | |
| pinctrl-names = "i2c_active\0i2c_sleep"; | |
| pinctrl-0 = <0x10d>; | |
| pinctrl-1 = <0x10e>; | |
| qcom,noise-rjct-scl = <0x00>; | |
| qcom,noise-rjct-sda = <0x00>; | |
| qcom,master-id = <0x56>; | |
| dmas = <0x107 0x08 0x40 0x20000020 0x20 0x107 0x09 0x20 0x20000020 0x20>; | |
| dma-names = "tx\0rx"; | |
| status = "ok"; | |
| clock-frequency = <0x61a80>; | |
| phandle = <0x293>; | |
| goodix@14 { | |
| compatible = "goodix,gt1x"; | |
| reg = <0x14>; | |
| interrupt-parent = <0xf4>; | |
| interrupts = <0x41 0x02>; | |
| vdd_ana-supply = <0x10f>; | |
| vcc_i2c-supply = <0xb7>; | |
| pinctrl-names = "default\0int-output-high\0int-output-low\0int-input\0erst_as_default\0erst_output_low\0erst_output_high"; | |
| pinctrl-0 = <0x110>; | |
| pinctrl-1 = <0x111>; | |
| pinctrl-2 = <0x112>; | |
| pinctrl-3 = <0x113>; | |
| pinctrl-4 = <0x114>; | |
| pinctrl-5 = <0x115>; | |
| pinctrl-6 = <0x116>; | |
| goodix,reset-gpio = <0xf4 0x40 0x00>; | |
| goodix,irq-gpio = <0xf4 0x41 0x00>; | |
| goodix,default-config0 = [ff d0 02 f0 05 0a 3c 00 00 88 4e 0f 5a 46 3e 11 00 0c 08 1e 01 33 00 00 00 00 00 18 00 00 a0 0c 32 32 28 5a 11 22 91 a0 b4 00 00 00 00 00 00 00 00 00 50 be 00 00 8e 20 1d 32 34 5a 0d 00 2e 53 24 7b 00 00 32 ab 26 95 2e 80 36 7f 3f 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 1e 50 40 94 d4 28 12 03 ee 26 aa 2e 82 36 72 3f 6e 47 6e 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 1f 1d 1b 1a 19 18 17 16 15 14 13 12 10 0f 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e ff ff ff 06 08 0c 12 13 14 15 17 18 19 1a 1b 1c 1d ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 00 f8 0a 23 23 50 5d 54 50 3c 05 32 00 00 04 40 00 8a 02 40 00 aa 00 22 22 00 40 d1 4c 01 33 00 00 00 00 00 00 00 10 00 28 a5 00 00 00 00 32 08 65 00 00 00 12 6e 19 01 64 03 64 28 50 65 0d 00 00 00 00 00 00 00 00 00 00 00 00 1e 0a 01 dc 00 00 00 14 28 46 11 20 a2 34 66 e4 0c 5a 00 0f 23 02 3c 0e 02 01 01 01 00 00 00 00 16 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b7 70]; | |
| }; | |
| focaltech@38 { | |
| compatible = "focaltech,fts"; | |
| reg = <0x38>; | |
| interrupt-parent = <0xf4>; | |
| interrupts = <0x41 0x02>; | |
| vdd-supply = <0x10f>; | |
| vcc_i2c-supply = <0xb7>; | |
| pinctrl-names = "pmx_ts_irqrst_active\0pmx_ts_irqrst_suspend\0pmx_ts_irqrst_release"; | |
| pinctrl-0 = <0x117 0x116>; | |
| pinctrl-1 = <0x118 0x115>; | |
| pinctrl-2 = <0x119 0x114>; | |
| focaltech,name = "fts_ts"; | |
| focaltech,reset-gpio = <0xf4 0x40 0x00>; | |
| focaltech,irq-gpio = <0xf4 0x41 0x02>; | |
| focaltech,display-coords = <0x00 0x00 0x2d0 0x5f0>; | |
| focaltech,max-touch-number = <0x0a>; | |
| }; | |
| }; | |
| i2c@7af5000 { | |
| compatible = "qcom,i2c-msm-v2"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg-names = "qup_phys_addr"; | |
| reg = <0x7af5000 0x600>; | |
| interrupt-names = "qup_irq"; | |
| interrupts = <0x00 0x12b 0x00>; | |
| qcom,clk-freq-out = <0x61a80>; | |
| qcom,clk-freq-in = <0x124f800>; | |
| clock-names = "iface_clk\0core_clk"; | |
| clocks = <0x12 0x8f283c1d 0x12 0x9ace11dd>; | |
| pinctrl-names = "i2c_active\0i2c_sleep"; | |
| pinctrl-0 = <0x11a>; | |
| pinctrl-1 = <0x11b>; | |
| qcom,noise-rjct-scl = <0x00>; | |
| qcom,noise-rjct-sda = <0x00>; | |
| qcom,master-id = <0x54>; | |
| dmas = <0x11c 0x04 0x40 0x20000020 0x20 0x11c 0x05 0x20 0x20000020 0x20>; | |
| dma-names = "tx\0rx"; | |
| status = "ok"; | |
| phandle = <0x294>; | |
| aw87329@58 { | |
| status = "okay"; | |
| compatible = "awinic,aw87329_pa"; | |
| reg = <0x58>; | |
| reset-gpio = <0xf4 0x8b 0x00>; | |
| pinctrl-names = "reset_pa_act\0reset_pa_sus"; | |
| pinctrl-0 = <0x11d>; | |
| pinctrl-1 = <0x11e>; | |
| }; | |
| nq@28 { | |
| status = "disabled"; | |
| compatible = "qcom,nq-nci"; | |
| reg = <0x28>; | |
| qcom,nq-irq = <0xf4 0x11 0x00>; | |
| qcom,nq-ven = <0xf4 0x10 0x00>; | |
| qcom,nq-firm = <0xf4 0x3e 0x00>; | |
| qcom,nq-clkreq = <0x159 0x02 0x00>; | |
| qcom,nq-esepwr = <0xf4 0x8d 0x00>; | |
| interrupt-parent = <0xf4>; | |
| qcom,clk-src = "BBCLK2"; | |
| interrupts = <0x11 0x00>; | |
| interrupt-names = "nfc_irq"; | |
| pinctrl-names = "nfc_active\0nfc_suspend"; | |
| pinctrl-0 = <0x215 0x217 0x307>; | |
| pinctrl-1 = <0x216 0x218>; | |
| clocks = <0x12 0x498938e5>; | |
| clock-names = "ref_clk"; | |
| }; | |
| }; | |
| slim@c140000 { | |
| cell-index = <0x01>; | |
| compatible = "qcom,slim-ngd"; | |
| reg = <0xc140000 0x2c000 0xc104000 0x2a000>; | |
| reg-names = "slimbus_physical\0slimbus_bam_physical"; | |
| interrupts = <0x00 0xa3 0x00 0x00 0xb4 0x00>; | |
| interrupt-names = "slimbus_irq\0slimbus_bam_irq"; | |
| qcom,apps-ch-pipes = <0x600000>; | |
| qcom,ea-pc = <0x200>; | |
| status = "disabled"; | |
| phandle = <0x295>; | |
| tasha_codec { | |
| status = "disabled"; | |
| compatible = "qcom,tasha-slim-pgd"; | |
| elemental-addr = [00 01 a0 01 17 02]; | |
| qcom,cdc-slim-ifd = "tasha-slim-ifd"; | |
| qcom,cdc-slim-ifd-elemental-addr = [00 00 a0 01 17 02]; | |
| interrupt-parent = <0x11f>; | |
| interrupts = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e>; | |
| qcom,wcd-rst-gpio-node = <0x120>; | |
| clock-names = "wcd_clk\0wcd_native_clk"; | |
| clocks = <0x121 0xb7ba2274 0x121 0xf0fbaf5b>; | |
| qcom,cdc-static-supplies = "cdc-vdd-buck\0cdc-buck-sido\0cdc-vdd-tx-h\0cdc-vdd-rx-h\0cdc-vdd-px"; | |
| qcom,cdc-on-demand-supplies = "cdc-vdd-mic-bias"; | |
| qcom,cdc-micbias1-mv = <0x708>; | |
| qcom,cdc-micbias2-mv = <0x708>; | |
| qcom,cdc-micbias3-mv = <0x708>; | |
| qcom,cdc-micbias4-mv = <0x708>; | |
| qcom,cdc-dmic-sample-rate = <0x249f00>; | |
| qcom,cdc-mclk-clk-rate = <0x927c00>; | |
| cdc-vdd-buck-supply = <0x122>; | |
| qcom,cdc-vdd-buck-voltage = <0x1b7740 0x1b7740>; | |
| qcom,cdc-vdd-buck-current = <0x9eb10>; | |
| cdc-buck-sido-supply = <0x122>; | |
| qcom,cdc-buck-sido-voltage = <0x1b7740 0x1b7740>; | |
| qcom,cdc-buck-sido-current = <0x249f0>; | |
| cdc-vdd-tx-h-supply = <0x122>; | |
| qcom,cdc-vdd-tx-h-voltage = <0x1b7740 0x1b7740>; | |
| qcom,cdc-vdd-tx-h-current = <0x61a8>; | |
| cdc-vdd-rx-h-supply = <0x122>; | |
| qcom,cdc-vdd-rx-h-voltage = <0x1b7740 0x1b7740>; | |
| qcom,cdc-vdd-rx-h-current = <0x61a8>; | |
| cdc-vdd-px-supply = <0x122>; | |
| qcom,cdc-vdd-px-voltage = <0x1b7740 0x1b7740>; | |
| qcom,cdc-vdd-px-current = <0x2710>; | |
| cdc-vdd-mic-bias-supply = <0x123>; | |
| qcom,cdc-vdd-mic-bias-voltage = <0x2faf08 0x2faf08>; | |
| qcom,cdc-vdd-mic-bias-current = <0x3a98>; | |
| phandle = <0x296>; | |
| swr_master { | |
| compatible = "qcom,swr-wcd"; | |
| qcom,swr-num-dev = <0x02>; | |
| #address-cells = <0x02>; | |
| #size-cells = <0x00>; | |
| wsa881x@20170211 { | |
| compatible = "qcom,wsa881x"; | |
| reg = <0x00 0x20170211>; | |
| qcom,spkr-sd-n-gpio = <0xf4 0x60 0x00>; | |
| phandle = <0x1ae>; | |
| }; | |
| wsa881x@20170212 { | |
| compatible = "qcom,wsa881x"; | |
| reg = <0x00 0x20170212>; | |
| qcom,spkr-sd-n-gpio = <0xf4 0x60 0x00>; | |
| phandle = <0x1af>; | |
| }; | |
| wsa881x@21170213 { | |
| compatible = "qcom,wsa881x"; | |
| reg = <0x00 0x21170213>; | |
| qcom,spkr-sd-n-gpio = <0xf4 0x60 0x00>; | |
| phandle = <0x1b0>; | |
| }; | |
| wsa881x@21170214 { | |
| compatible = "qcom,wsa881x"; | |
| reg = <0x00 0x21170214>; | |
| qcom,spkr-sd-n-gpio = <0xf4 0x60 0x00>; | |
| phandle = <0x1b1>; | |
| }; | |
| }; | |
| }; | |
| msm_dai_slim { | |
| status = "disabled"; | |
| compatible = "qcom,msm-dai-slim"; | |
| elemental-addr = [ff ff ff fe 17 02]; | |
| phandle = <0x297>; | |
| }; | |
| }; | |
| qcom,gcc-mdss@1800000 { | |
| compatible = "qcom,gcc-mdss-sdm632"; | |
| reg = <0x1800000 0x80000>; | |
| reg-names = "cc_base"; | |
| clock-names = "pclk0_src\0pclk1_src\0byte0_src\0byte1_src"; | |
| clocks = <0xb8 0x792379e1 0xb9 0x36458019 0xb8 0x60e83f06 0xb9 0xb5a42b7b>; | |
| #clock-cells = <0x01>; | |
| phandle = <0xaf>; | |
| }; | |
| qcom,cc-debug@1874000 { | |
| compatible = "qcom,cc-debug-sdm632"; | |
| reg = <0x1874000 0x04>; | |
| reg-names = "cc_base"; | |
| clocks = <0x6a 0x61a2945f>; | |
| clock-names = "debug_cpu_clk"; | |
| #clock-cells = <0x01>; | |
| phandle = <0x14e>; | |
| }; | |
| qcom,gcc-gfx@1800000 { | |
| compatible = "qcom,gcc-gfx-sdm632"; | |
| reg = <0x1800000 0x80000>; | |
| reg-names = "cc_base"; | |
| vdd_gfx-supply = <0x124>; | |
| clocks = <0x12 0x23f5649f>; | |
| clock-names = "xo"; | |
| qcom,gcc_oxili_gfx3d_clk-opp-handle = <0xcf>; | |
| qcom,gfxfreq-corner = <0x00 0x00 0x7f27450 0x01 0xcdfe600 0x02 0x1312d000 0x03 0x17d78400 0x04 0x1e65fb80 0x05 0x2160ec00 0x06 0x26be3680 0x07 0x29b92700 0x07 0x2b369f40 0x07>; | |
| #clock-cells = <0x01>; | |
| phandle = <0xa4>; | |
| }; | |
| qcom,cpu-clock-8953@b116000 { | |
| compatible = "qcom,cpu-clock-sdm632"; | |
| reg = <0xb114000 0x68 0xb014000 0x68 0xb011050 0x08 0xb111050 0x08 0xb1d1050 0x08 0xb011050 0x08 0xb111050 0x08 0xa4124 0x08>; | |
| reg-names = "rcgwr-c0-base\0rcgwr-c1-base\0apcs-c1-rcg-base\0apcs-c0-rcg-base\0apcs-cci-rcg-base\0c1-mux\0c0-mux\0efuse"; | |
| vdd-mx-supply = <0x125>; | |
| clocks = <0x12 0x2fdd2c7c>; | |
| clock-names = "xo_a"; | |
| qcom,num-clusters = <0x02>; | |
| qcom,speed0-bin-v0-cl = <0x00 0x00 0x26e8f000 0x01 0x3dcc5000 0x02 0x538ab800 0x03 0x64b54000 0x04 0x6b931000 0x05 0x74bad000 0x06 0x7829b800 0x07>; | |
| qcom,speed0-bin-v0-cci = <0x00 0x00 0x124f8000 0x01 0x18085800 0x02 0x1dc13000 0x03 0x2932e000 0x04 0x2dc6c000 0x05 0x2eebb800 0x06>; | |
| qcom,speed2-bin-v0-cl = <0x00 0x00 0x26e8f000 0x01 0x3dcc5000 0x02 0x538ab800 0x03 0x64b54000 0x04 0x6b931000 0x05 0x74bad000 0x06 0x7829b800 0x07>; | |
| qcom,speed2-bin-v0-cci = <0x00 0x00 0x124f8000 0x01 0x18085800 0x02 0x1dc13000 0x03 0x2932e000 0x04 0x2dc6c000 0x05 0x2eebb800 0x06>; | |
| qcom,speed7-bin-v0-cl = <0x00 0x00 0x26e8f000 0x01 0x3dcc5000 0x02 0x538ab800 0x03 0x64b54000 0x04 0x6b931000 0x05 0x74bad000 0x06 0x7829b800 0x07 0x802c8000 0x08 0x839b6800 0x09>; | |
| qcom,speed7-bin-v0-cci = <0x00 0x00 0xf906000 0x01 0x18b82000 0x02 0x216ab000 0x03 0x28488000 0x04 0x2b07a000 0x05 0x2eb12000 0x06 0x3010b000 0x07 0x33450000 0x08 0x34a49000 0x09>; | |
| qcom,speed6-bin-v0-cl = <0x00 0x00 0x26e8f000 0x01 0x3dcc5000 0x02 0x538ab800 0x03 0x64b54000 0x04 0x6b931000 0x05>; | |
| qcom,speed6-bin-v0-cci = <0x00 0x00 0x124f8000 0x01 0x18085800 0x02 0x1dc13000 0x03 0x2932e000 0x04 0x2dc6c000 0x05 0x2eebb800 0x06>; | |
| #clock-cells = <0x01>; | |
| vdd-c0-supply = <0x126>; | |
| vdd-c1-supply = <0x127>; | |
| vdd-cci-supply = <0x126>; | |
| qcom,speed0-bin-v0-c0 = <0x00 0x00 0x249f0000 0x01 0x34a49000 0x02 0x3dcc5000 0x03 0x5140c800 0x04 0x5b8d8000 0x05 0x63904800 0x06 0x6b931000 0x07>; | |
| qcom,speed0-bin-v0-c1 = <0x00 0x00 0x25c3f800 0x01 0x35c98800 0x02 0x413b3800 0x03 0x538ab800 0x04 0x5cb27800 0x05 0x6b931000 0x06>; | |
| qcom,speed6-bin-v0-c0 = <0x00 0x00 0x249f0000 0x01 0x34a49000 0x02 0x3dcc5000 0x03 0x5140c800 0x04 0x5b8d8000 0x05 0x63904800 0x06 0x6b931000 0x07>; | |
| qcom,speed6-bin-v0-c1 = <0x00 0x00 0x25c3f800 0x01 0x35c98800 0x02 0x413b3800 0x03 0x538ab800 0x04 0x5cb27800 0x05 0x6b931000 0x06>; | |
| qcom,speed2-bin-v0-c0 = <0x00 0x00 0x249f0000 0x01 0x34a49000 0x02 0x3dcc5000 0x03 0x5140c800 0x04 0x5b8d8000 0x05 0x63904800 0x06 0x6b931000 0x07>; | |
| qcom,speed2-bin-v0-c1 = <0x00 0x00 0x25c3f800 0x01 0x35c98800 0x02 0x413b3800 0x03 0x538ab800 0x04 0x5cb27800 0x05 0x6b931000 0x06 0x7829b800 0x07>; | |
| phandle = <0x6a>; | |
| }; | |
| qcom,msm-cpufreq { | |
| compatible = "qcom,msm-cpufreq"; | |
| clock-names = "l2_clk\0cpu0_clk\0cpu4_clk"; | |
| clocks = <0x6a 0x96854074 0x6a 0x9283a6d8 0x6a 0x98d6ee40>; | |
| qcom,governor-per-policy; | |
| qcom,cpufreq-table-0 = <0x96000 0xd7a00 0xfd200 0x14cd00 0x177000 0x197d00 0x1b8a00>; | |
| qcom,cpufreq-table-4 = <0x9ab00 0xdc500 0x10b300 0x156300 0x17bb00 0x1b8a00 0x1e75a8 0x1ec300>; | |
| phandle = <0x298>; | |
| }; | |
| qcom,cpubw { | |
| compatible = "qcom,devbw"; | |
| governor = "cpufreq"; | |
| qcom,src-dst-ports = <0x01 0x200>; | |
| qcom,active-only; | |
| qcom,bw-tbl = <0x301 0x64b 0x84c 0xb71 0xc95 0x1098 0x1406 0x16e3 0x1808 0x192d 0x1bc0>; | |
| phandle = <0x128>; | |
| }; | |
| qcom,mincpubw { | |
| compatible = "qcom,devbw"; | |
| governor = "cpufreq"; | |
| qcom,src-dst-ports = <0x01 0x200>; | |
| qcom,active-only; | |
| qcom,bw-tbl = <0x301 0x64b 0x84c 0xb71 0xc95 0x1098 0x1406 0x16e3 0x1808 0x192d 0x1bc0>; | |
| phandle = <0x129>; | |
| }; | |
| qcom,cpu-bwmon { | |
| compatible = "qcom,bimc-bwmon2"; | |
| reg = <0x408000 0x300 0x401000 0x200>; | |
| reg-names = "base\0global_base"; | |
| interrupts = <0x00 0xb7 0x04>; | |
| qcom,mport = <0x00>; | |
| qcom,target-dev = <0x128>; | |
| }; | |
| devfreq-cpufreq { | |
| mincpubw-cpufreq { | |
| target-dev = <0x129>; | |
| cpu-to-dev-map-0 = <0x96000 0x64b 0x14cd00 0xc95 0x1b8a00 0x16e3>; | |
| cpu-to-dev-map-4 = <0x10b300 0x64b 0x156300 0xc95 0x1b8a00 0x16e3 0x1ec300 0x1bc0>; | |
| }; | |
| cci-cpufreq { | |
| target-dev = <0x12a>; | |
| cpu-to-dev-map-0 = <0x96000 0x4b000 0xd7a00 0x62700 0xfd200 0x79e00 0x14cd00 0xa8c00 0x177000 0xbb800 0x197d00 0xc0300>; | |
| cpu-to-dev-map-4 = <0x9ab00 0x4b000 0xdc500 0x62700 0x10b300 0x79e00 0x156300 0xa8c00 0x17bb00 0xbb800 0x1b8a00 0xc0300>; | |
| }; | |
| }; | |
| qcom,cpubw-compute { | |
| compatible = "qcom,arm-cpu-mon"; | |
| qcom,cpulist = <0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09>; | |
| qcom,target-dev = <0x128>; | |
| qcom,core-dev-table = <0x9f600 0x64b 0xfd200 0xc95 0x156300 0x16e3 0x19c800 0x192d 0x1b8a00 0x1bc0 0x1de200 0x1bc0 0x21b100 0x1bc0>; | |
| phandle = <0x299>; | |
| }; | |
| qcom,mincpubw-compute { | |
| compatible = "qcom,arm-cpu-mon"; | |
| qcom,cpulist = <0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09>; | |
| qcom,target-dev = <0x129>; | |
| qcom,core-dev-table = <0x9f600 0x64b 0x156300 0xc95 0x21b100 0x16e3>; | |
| phandle = <0x29a>; | |
| }; | |
| qcom,ipc-spinlock@1905000 { | |
| compatible = "qcom,ipc-spinlock-sfpb"; | |
| reg = <0x1905000 0x8000>; | |
| qcom,num-locks = <0x08>; | |
| }; | |
| qcom,smdtty { | |
| compatible = "qcom,smdtty"; | |
| qcom,smdtty-apps-fm { | |
| qcom,smdtty-remote = "wcnss"; | |
| qcom,smdtty-port-name = "APPS_FM"; | |
| phandle = <0x29b>; | |
| }; | |
| smdtty-apps-riva-bt-acl { | |
| qcom,smdtty-remote = "wcnss"; | |
| qcom,smdtty-port-name = "APPS_RIVA_BT_ACL"; | |
| phandle = <0x29c>; | |
| }; | |
| qcom,smdtty-apps-riva-bt-cmd { | |
| qcom,smdtty-remote = "wcnss"; | |
| qcom,smdtty-port-name = "APPS_RIVA_BT_CMD"; | |
| phandle = <0x29d>; | |
| }; | |
| qcom,smdtty-mbalbridge { | |
| qcom,smdtty-remote = "modem"; | |
| qcom,smdtty-port-name = "MBALBRIDGE"; | |
| phandle = <0x29e>; | |
| }; | |
| smdtty-apps-riva-ant-cmd { | |
| qcom,smdtty-remote = "wcnss"; | |
| qcom,smdtty-port-name = "APPS_RIVA_ANT_CMD"; | |
| phandle = <0x29f>; | |
| }; | |
| smdtty-apps-riva-ant-data { | |
| qcom,smdtty-remote = "wcnss"; | |
| qcom,smdtty-port-name = "APPS_RIVA_ANT_DATA"; | |
| phandle = <0x2a0>; | |
| }; | |
| qcom,smdtty-data1 { | |
| qcom,smdtty-remote = "modem"; | |
| qcom,smdtty-port-name = "DATA1"; | |
| phandle = <0x2a1>; | |
| }; | |
| qcom,smdtty-data4 { | |
| qcom,smdtty-remote = "modem"; | |
| qcom,smdtty-port-name = "DATA4"; | |
| phandle = <0x2a2>; | |
| }; | |
| qcom,smdtty-data11 { | |
| qcom,smdtty-remote = "modem"; | |
| qcom,smdtty-port-name = "DATA11"; | |
| phandle = <0x2a3>; | |
| }; | |
| qcom,smdtty-data21 { | |
| qcom,smdtty-remote = "modem"; | |
| qcom,smdtty-port-name = "DATA21"; | |
| phandle = <0x2a4>; | |
| }; | |
| smdtty-loopback { | |
| qcom,smdtty-remote = "modem"; | |
| qcom,smdtty-port-name = "LOOPBACK"; | |
| qcom,smdtty-dev-name = "LOOPBACK_TTY"; | |
| phandle = <0x2a5>; | |
| }; | |
| }; | |
| qcom,smdpkt { | |
| compatible = "qcom,smdpkt"; | |
| qcom,smdpkt-data5-cntl { | |
| qcom,smdpkt-remote = "modem"; | |
| qcom,smdpkt-port-name = "DATA5_CNTL"; | |
| qcom,smdpkt-dev-name = "smdcntl0"; | |
| }; | |
| qcom,smdpkt-data22 { | |
| qcom,smdpkt-remote = "modem"; | |
| qcom,smdpkt-port-name = "DATA22"; | |
| qcom,smdpkt-dev-name = "smd22"; | |
| }; | |
| qcom,smdpkt-data40-cntl { | |
| qcom,smdpkt-remote = "modem"; | |
| qcom,smdpkt-port-name = "DATA40_CNTL"; | |
| qcom,smdpkt-dev-name = "smdcntl8"; | |
| }; | |
| qcom,smdpkt-data2 { | |
| qcom,smdpkt-remote = "modem"; | |
| qcom,smdpkt-port-name = "DATA2"; | |
| qcom,smdpkt-dev-name = "at_mdm0"; | |
| }; | |
| qcom,smdpkt-apr-apps2 { | |
| qcom,smdpkt-remote = "adsp"; | |
| qcom,smdpkt-port-name = "apr_apps2"; | |
| qcom,smdpkt-dev-name = "apr_apps2"; | |
| }; | |
| qcom,smdpkt-loopback { | |
| qcom,smdpkt-remote = "modem"; | |
| qcom,smdpkt-port-name = "LOOPBACK"; | |
| qcom,smdpkt-dev-name = "smd_pkt_loopback"; | |
| }; | |
| }; | |
| qcom,iris-fm { | |
| compatible = "qcom,iris_fm"; | |
| }; | |
| qcom,wdt@b017000 { | |
| compatible = "qcom,msm-watchdog"; | |
| reg = <0xb017000 0x1000>; | |
| reg-names = "wdt-base"; | |
| interrupts = <0x00 0x03 0x00 0x00 0x04 0x00>; | |
| qcom,bark-time = <0x2af8>; | |
| qcom,pet-time = <0x2490>; | |
| qcom,ipi-ping; | |
| qcom,wakeup-enable; | |
| qcom,scandump-size = <0x40000>; | |
| phandle = <0x2a6>; | |
| }; | |
| qcom,chd_silver { | |
| compatible = "qcom,core-hang-detect"; | |
| label = "silver"; | |
| qcom,threshold-arr = <0xb1880b0 0xb1980b0 0xb1a80b0 0xb1b80b0>; | |
| qcom,config-arr = <0xb1880b8 0xb1980b8 0xb1a80b8 0xb1b80b8>; | |
| }; | |
| qcom,chd_gold { | |
| compatible = "qcom,core-hang-detect"; | |
| label = "gold"; | |
| qcom,threshold-arr = <0xb0880b0 0xb0980b0 0xb0a80b0 0xb0b80b0>; | |
| qcom,config-arr = <0xb0880b8 0xb0980b8 0xb0a80b8 0xb0b80b8>; | |
| }; | |
| qcom,msm-rtb { | |
| compatible = "qcom,msm-rtb"; | |
| qcom,rtb-size = <0x100000>; | |
| }; | |
| qcom,msm-imem@8600000 { | |
| compatible = "qcom,msm-imem"; | |
| reg = <0x8600000 0x1000>; | |
| ranges = <0x00 0x8600000 0x1000>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| mem_dump_table@10 { | |
| compatible = "qcom,msm-imem-mem_dump_table"; | |
| reg = <0x10 0x08>; | |
| }; | |
| dload_type@1c { | |
| compatible = "qcom,msm-imem-dload-type"; | |
| reg = <0x1c 0x04>; | |
| }; | |
| restart_reason@65c { | |
| compatible = "qcom,msm-imem-restart_reason"; | |
| reg = <0x65c 0x04>; | |
| }; | |
| boot_stats@6b0 { | |
| compatible = "qcom,msm-imem-boot_stats"; | |
| reg = <0x6b0 0x20>; | |
| }; | |
| kaslr_offset@6d0 { | |
| compatible = "qcom,msm-imem-kaslr_offset"; | |
| reg = <0x6d0 0x0c>; | |
| }; | |
| pil@94c { | |
| compatible = "qcom,msm-imem-pil"; | |
| reg = <0x94c 0xc8>; | |
| }; | |
| diag_dload@c8 { | |
| compatible = "qcom,msm-imem-diag-dload"; | |
| reg = <0xc8 0xc8>; | |
| }; | |
| }; | |
| qcom,memshare { | |
| compatible = "qcom,memshare"; | |
| qcom,client_1 { | |
| compatible = "qcom,memshare-peripheral"; | |
| qcom,peripheral-size = <0x200000>; | |
| qcom,client-id = <0x00>; | |
| qcom,allocate-boot-time; | |
| label = "modem"; | |
| }; | |
| qcom,client_2 { | |
| compatible = "qcom,memshare-peripheral"; | |
| qcom,peripheral-size = <0x300000>; | |
| qcom,client-id = <0x02>; | |
| label = "modem"; | |
| }; | |
| qcom,client_3 { | |
| compatible = "qcom,memshare-peripheral"; | |
| qcom,peripheral-size = <0x500000>; | |
| qcom,client-id = <0x01>; | |
| qcom,allocate-boot-time; | |
| label = "modem"; | |
| }; | |
| }; | |
| snfuse@a4128 { | |
| compatible = "qcom,sn-fuse"; | |
| reg = <0xa4128 0x04 0xa6034 0x04>; | |
| reg-names = "sn-base\0fuse-state"; | |
| phandle = <0x2a7>; | |
| }; | |
| jtagmm@619c000 { | |
| compatible = "qcom,jtagv8-mm"; | |
| reg = <0x619c000 0x1000>; | |
| reg-names = "etm-base"; | |
| qcom,coresight-jtagmm-cpu = <0x02>; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "core_clk"; | |
| phandle = <0x2a8>; | |
| }; | |
| jtagmm@619d000 { | |
| compatible = "qcom,jtagv8-mm"; | |
| reg = <0x619d000 0x1000>; | |
| reg-names = "etm-base"; | |
| qcom,coresight-jtagmm-cpu = <0x03>; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "core_clk"; | |
| phandle = <0x2a9>; | |
| }; | |
| jtagmm@619e000 { | |
| compatible = "qcom,jtagv8-mm"; | |
| reg = <0x619e000 0x1000>; | |
| reg-names = "etm-base"; | |
| qcom,coresight-jtagmm-cpu = <0x04>; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "core_clk"; | |
| phandle = <0x2aa>; | |
| }; | |
| jtagmm@619f000 { | |
| compatible = "qcom,jtagv8-mm"; | |
| reg = <0x619f000 0x1000>; | |
| reg-names = "etm-base"; | |
| qcom,coresight-jtagmm-cpu = <0x05>; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "core_clk"; | |
| phandle = <0x2ab>; | |
| }; | |
| jtagmm@61bc000 { | |
| compatible = "qcom,jtagv8-mm"; | |
| reg = <0x61bc000 0x1000>; | |
| reg-names = "etm-base"; | |
| qcom,coresight-jtagmm-cpu = <0x06>; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "core_clk"; | |
| phandle = <0x2ac>; | |
| }; | |
| jtagmm@61bd000 { | |
| compatible = "qcom,jtagv8-mm"; | |
| reg = <0x61bd000 0x1000>; | |
| reg-names = "etm-base"; | |
| qcom,coresight-jtagmm-cpu = <0x07>; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "core_clk"; | |
| phandle = <0x2ad>; | |
| }; | |
| jtagmm@61be000 { | |
| compatible = "qcom,jtagv8-mm"; | |
| reg = <0x61be000 0x1000>; | |
| reg-names = "etm-base"; | |
| qcom,coresight-jtagmm-cpu = <0x08>; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "core_clk"; | |
| phandle = <0x2ae>; | |
| }; | |
| jtagmm@61bf000 { | |
| compatible = "qcom,jtagv8-mm"; | |
| reg = <0x61bf000 0x1000>; | |
| reg-names = "etm-base"; | |
| qcom,coresight-jtagmm-cpu = <0x09>; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "core_clk"; | |
| phandle = <0x2af>; | |
| }; | |
| sdcc1ice@7803000 { | |
| compatible = "qcom,ice"; | |
| reg = <0x7803000 0x8000>; | |
| interrupt-names = "sdcc_ice_nonsec_level_irq\0sdcc_ice_sec_level_irq"; | |
| interrupts = <0x00 0x138 0x00 0x00 0x139 0x00>; | |
| qcom,enable-ice-clk; | |
| clock-names = "ice_core_clk_src\0ice_core_clk\0bus_clk\0iface_clk"; | |
| clocks = <0x12 0xfd6a4301 0x12 0xfd5680a 0x12 0x9ad6fb96 0x12 0x691e0caa>; | |
| qcom,op-freq-hz = <0x1017df80 0x00 0x00 0x00>; | |
| qcom,msm-bus,name = "sdcc_ice_noc"; | |
| qcom,msm-bus,num-cases = <0x02>; | |
| qcom,msm-bus,num-paths = <0x01>; | |
| qcom,msm-bus,vectors-KBps = <0x4e 0x200 0x00 0x00 0x4e 0x200 0x3e8 0x00>; | |
| qcom,bus-vector-names = "MIN\0MAX"; | |
| qcom,instance-type = "sdcc"; | |
| phandle = <0x51>; | |
| }; | |
| sdhci@7864900 { | |
| compatible = "qcom,sdhci-msm"; | |
| reg = <0x7864900 0x500 0x7864000 0x800>; | |
| reg-names = "hc_mem\0core_mem"; | |
| interrupts = <0x00 0x01 0x02>; | |
| interrupt-names = "hc_irq\0pwr_irq\0status_irq"; | |
| qcom,bus-width = <0x04>; | |
| qcom,pm-qos-irq-type = "affine_irq"; | |
| qcom,pm-qos-irq-latency = <0x02 0xd5>; | |
| qcom,pm-qos-cpu-groups = <0x0f 0xf0>; | |
| qcom,pm-qos-legacy-latency-us = <0x02 0xd5 0x02 0xd5>; | |
| qcom,devfreq,freq-table = <0x2faf080 0xbebc200>; | |
| qcom,msm-bus,name = "sdhc2"; | |
| qcom,msm-bus,num-cases = <0x08>; | |
| qcom,msm-bus,num-paths = <0x01>; | |
| qcom,msm-bus,vectors-KBps = <0x51 0x200 0x00 0x00 0x51 0x200 0x416 0xc80 0x51 0x200 0xcc3e 0x27100 0x51 0x200 0xff50 0x30d40 0x51 0x200 0x1fe9e 0x61a80 0x51 0x200 0x3fd3e 0xc3500 0x51 0x200 0x3fd3e 0xc3500 0x51 0x200 0x146cc2 0x3e8000>; | |
| qcom,bus-bw-vectors-bps = <0x00 0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100 0xbebc200 0xffffffff>; | |
| clocks = <0x12 0x23d5727f 0x12 0x861b20ac>; | |
| clock-names = "iface_clk\0core_clk"; | |
| qcom,large-address-bus; | |
| status = "ok"; | |
| phandle = <0x2b0>; | |
| vdd-supply = <0x1c8>; | |
| qcom,vdd-voltage-level = <0x2d0370 0x2d0370>; | |
| qcom,vdd-current-level = <0x3a98 0xc3500>; | |
| vdd-io-supply = <0x1c9>; | |
| qcom,vdd-io-voltage-level = <0x1b7740 0x2d0370>; | |
| qcom,vdd-io-current-level = <0xc8 0x55f0>; | |
| pinctrl-names = "active\0sleep"; | |
| pinctrl-0 = <0x20d 0x20f 0x211 0x213>; | |
| pinctrl-1 = <0x20e 0x210 0x212>; | |
| #address-cells = <0x00>; | |
| interrupt-parent = <0x2b0>; | |
| #interrupt-cells = <0x01>; | |
| interrupt-map-mask = <0xffffffff>; | |
| interrupt-map = <0x00 0xc4 0x00 0x7d 0x00 0x01 0xc4 0x00 0xdd 0x00 0x02 0xf4 0x85 0x00>; | |
| cd-gpios = <0xf4 0x85 0x00>; | |
| qcom,clk-rates = <0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100 0xbebc200>; | |
| qcom,bus-speed-mode = "SDR12\0SDR25\0SDR50\0DDR50\0SDR104"; | |
| }; | |
| qcom,msm-adsprpc-mem { | |
| compatible = "qcom,msm-adsprpc-mem-region"; | |
| memory-region = <0x12b>; | |
| }; | |
| qcom,msm_fastrpc { | |
| compatible = "qcom,msm-fastrpc-legacy-compute"; | |
| qcom,msm_fastrpc_compute_cb { | |
| compatible = "qcom,msm-fastrpc-legacy-compute-cb"; | |
| label = "adsprpc-smd"; | |
| iommus = <0xa8 0x2408 0x07>; | |
| sids = <0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f>; | |
| }; | |
| }; | |
| qcom,ipa@07900000 { | |
| compatible = "qcom,ipa"; | |
| reg = <0x7900000 0x4effc 0x7904000 0x26934>; | |
| reg-names = "ipa-base\0bam-base"; | |
| interrupts = <0x00 0xe4 0x00 0x00 0xe6 0x00>; | |
| interrupt-names = "ipa-irq\0bam-irq"; | |
| qcom,ipa-hw-ver = <0x06>; | |
| qcom,ipa-hw-mode = <0x00>; | |
| qcom,wan-rx-ring-size = <0xc0>; | |
| qcom,lan-rx-ring-size = <0xc0>; | |
| clock-names = "core_clk"; | |
| clocks = <0x12 0xfa685cda>; | |
| qcom,ee = <0x00>; | |
| qcom,use-ipa-tethering-bridge; | |
| qcom,modem-cfg-emb-pipe-flt; | |
| qcom,msm-bus,name = "ipa"; | |
| qcom,msm-bus,num-cases = <0x03>; | |
| qcom,msm-bus,num-paths = <0x01>; | |
| qcom,msm-bus,vectors-KBps = <0x5a 0x200 0x00 0x00 0x5a 0x200 0x186a0 0xc3500 0x5a 0x200 0x186a0 0x124f80>; | |
| qcom,bus-vector-names = "MIN\0SVS\0PERF"; | |
| phandle = <0x2b1>; | |
| }; | |
| qcom,rmnet-ipa { | |
| compatible = "qcom,rmnet-ipa"; | |
| qcom,rmnet-ipa-ssr; | |
| qcom,ipa-loaduC; | |
| qcom,ipa-advertise-sg-support; | |
| }; | |
| qcom,spmi@200f000 { | |
| compatible = "qcom,spmi-pmic-arb"; | |
| reg = <0x200f000 0x1000 0x2400000 0x800000 0x2c00000 0x800000 0x3800000 0x200000 0x200a000 0x2100>; | |
| reg-names = "core\0chnls\0obsrvr\0intr\0cnfg"; | |
| interrupt-names = "periph_irq"; | |
| interrupts = <0x00 0xbe 0x00>; | |
| qcom,ee = <0x00>; | |
| qcom,channel = <0x00>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x04>; | |
| cell-index = <0x00>; | |
| phandle = <0x12d>; | |
| qcom,pm8953@0 { | |
| compatible = "qcom,spmi-pmic"; | |
| reg = <0x00 0x00>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| qcom,revid@100 { | |
| compatible = "qcom,qpnp-revid"; | |
| reg = <0x100 0x100>; | |
| phandle = <0x2b2>; | |
| }; | |
| qcom,power-on@800 { | |
| compatible = "qcom,qpnp-power-on"; | |
| reg = <0x800 0x100>; | |
| interrupts = <0x00 0x08 0x00 0x00 0x00 0x08 0x01 0x00 0x00 0x08 0x04 0x00 0x00 0x08 0x05 0x00>; | |
| interrupt-names = "kpdpwr\0resin\0resin-bark\0kpdpwr-resin-bark"; | |
| qcom,pon-dbc-delay = <0x3d09>; | |
| qcom,system-reset; | |
| qcom,store-hard-reset-reason; | |
| qcom,pon_1 { | |
| qcom,pon-type = <0x00>; | |
| qcom,pull-up = <0x01>; | |
| linux,code = <0x74>; | |
| qcom,support-reset = <0x01>; | |
| qcom,s1-timer = <0x1180>; | |
| qcom,s2-timer = <0x7d0>; | |
| qcom,s2-type = <0x07>; | |
| }; | |
| qcom,pon_2 { | |
| qcom,pon-type = <0x01>; | |
| qcom,pull-up = <0x01>; | |
| linux,code = <0x72>; | |
| }; | |
| qcom,pon_3 { | |
| qcom,pon-type = <0x03>; | |
| qcom,pull-up = <0x01>; | |
| qcom,support-reset = <0x01>; | |
| qcom,s1-timer = <0xc00>; | |
| qcom,s2-timer = <0x7d0>; | |
| qcom,s2-type = <0x01>; | |
| qcom,use-bark; | |
| }; | |
| }; | |
| qcom,temp-alarm@2400 { | |
| compatible = "qcom,qpnp-temp-alarm"; | |
| reg = <0x2400 0x100>; | |
| interrupts = <0x00 0x24 0x00 0x01>; | |
| label = "pm8953_tz"; | |
| qcom,channel-num = <0x08>; | |
| qcom,threshold-set = <0x00>; | |
| qcom,temp_alarm-vadc = <0xc5>; | |
| #thermal-sensor-cells = <0x00>; | |
| phandle = <0xc6>; | |
| }; | |
| qcom,coincell@2800 { | |
| compatible = "qcom,qpnp-coincell"; | |
| reg = <0x2800 0x100>; | |
| phandle = <0x2b3>; | |
| }; | |
| mpps { | |
| compatible = "qcom,spmi-mpp"; | |
| reg = <0xa000 0x400>; | |
| interrupts = <0x00 0xa0 0x00 0x00 0x00 0xa1 0x00 0x00 0x00 0xa2 0x00 0x00 0x00 0xa3 0x00 0x00>; | |
| interrupt-names = "pm8953_mpp1\0pm8953_mpp2\0pm8953_mpp3\0pm8953_mpp4"; | |
| gpio-controller; | |
| #gpio-cells = <0x02>; | |
| phandle = <0x2b4>; | |
| pa_therm1 { | |
| pa_therm1_default { | |
| pins = "mpp2"; | |
| function = "analog"; | |
| input-enable; | |
| qcom,amux-route = <0x01>; | |
| phandle = <0x12c>; | |
| }; | |
| }; | |
| }; | |
| gpios { | |
| compatible = "qcom,spmi-gpio"; | |
| reg = <0xc000 0x800>; | |
| interrupts = <0x00 0xc0 0x00 0x00 0x00 0xc1 0x00 0x00 0x00 0xc3 0x00 0x00 0x00 0xc4 0x00 0x00 0x00 0xc6 0x00 0x00 0x00 0xc7 0x00 0x00>; | |
| interrupt-names = "pm8953_gpio1\0pm8953_gpio2\0pm8953_gpio4\0pm8953_gpio5\0pm8953_gpio7\0pm8953_gpio8"; | |
| gpio-controller; | |
| #gpio-cells = <0x02>; | |
| qcom,gpios-disallowed = <0x03 0x06>; | |
| phandle = <0x159>; | |
| gpio@c000 { | |
| status = "ok"; | |
| qcom,mode = <0x01>; | |
| qcom,pull = <0x05>; | |
| qcom,vin-sel = <0x00>; | |
| qcom,src-sel = <0x02>; | |
| qcom,master-en = <0x01>; | |
| qcom,out-strength = <0x02>; | |
| }; | |
| tasha_mclk { | |
| tasha_mclk_default { | |
| pins = "gpio1"; | |
| function = "func1"; | |
| qcom,drive-strength = <0x02>; | |
| power-source = <0x00>; | |
| bias-disable; | |
| output-low; | |
| phandle = <0x1b3>; | |
| }; | |
| }; | |
| bklt_en { | |
| bklt_en_default { | |
| pins = "gpio4"; | |
| function = "normal"; | |
| power-source = <0x00>; | |
| output-high; | |
| phandle = <0x2b5>; | |
| }; | |
| }; | |
| nfc_clk { | |
| nfc_clk_default { | |
| pins = "gpio2"; | |
| function = "normal"; | |
| input-enable; | |
| power-source = <0x01>; | |
| phandle = <0x307>; | |
| }; | |
| }; | |
| }; | |
| vadc@3100 { | |
| compatible = "qcom,qpnp-vadc"; | |
| reg = <0x3100 0x100>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| interrupts = <0x00 0x31 0x00 0x01>; | |
| interrupt-names = "eoc-int-en-set"; | |
| qcom,adc-bit-resolution = <0x0f>; | |
| qcom,adc-vdd-reference = <0x708>; | |
| qcom,vadc-poll-eoc; | |
| #thermal-sensor-cells = <0x01>; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x12c>; | |
| phandle = <0xc5>; | |
| chan@5 { | |
| label = "vcoin"; | |
| reg = <0x05>; | |
| qcom,decimation = <0x00>; | |
| qcom,pre-div-channel-scaling = <0x01>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x00>; | |
| qcom,hw-settle-time = <0x00>; | |
| qcom,fast-avg-setup = <0x00>; | |
| }; | |
| chan@7 { | |
| label = "vph_pwr"; | |
| reg = <0x07>; | |
| qcom,decimation = <0x00>; | |
| qcom,pre-div-channel-scaling = <0x01>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x00>; | |
| qcom,hw-settle-time = <0x00>; | |
| qcom,fast-avg-setup = <0x00>; | |
| }; | |
| chan@8 { | |
| label = "die_temp"; | |
| reg = <0x08>; | |
| qcom,decimation = <0x00>; | |
| qcom,pre-div-channel-scaling = <0x00>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x03>; | |
| qcom,hw-settle-time = <0x00>; | |
| qcom,fast-avg-setup = <0x00>; | |
| }; | |
| chan@9 { | |
| label = "ref_625mv"; | |
| reg = <0x09>; | |
| qcom,decimation = <0x00>; | |
| qcom,pre-div-channel-scaling = <0x00>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x00>; | |
| qcom,hw-settle-time = <0x00>; | |
| qcom,fast-avg-setup = <0x00>; | |
| }; | |
| chan@a { | |
| label = "ref_1250v"; | |
| reg = <0x0a>; | |
| qcom,decimation = <0x00>; | |
| qcom,pre-div-channel-scaling = <0x00>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x00>; | |
| qcom,hw-settle-time = <0x00>; | |
| qcom,fast-avg-setup = <0x00>; | |
| }; | |
| chan@c { | |
| label = "ref_buf_625mv"; | |
| reg = <0x0c>; | |
| qcom,decimation = <0x00>; | |
| qcom,pre-div-channel-scaling = <0x00>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x00>; | |
| qcom,hw-settle-time = <0x00>; | |
| qcom,fast-avg-setup = <0x00>; | |
| }; | |
| chan@36 { | |
| label = "pa_therm0"; | |
| reg = <0x36>; | |
| qcom,decimation = <0x00>; | |
| qcom,pre-div-channel-scaling = <0x00>; | |
| qcom,calibration-type = "ratiometric"; | |
| qcom,scale-function = <0x02>; | |
| qcom,hw-settle-time = <0x02>; | |
| qcom,fast-avg-setup = <0x00>; | |
| }; | |
| chan@11 { | |
| label = "pa_therm1"; | |
| reg = <0x11>; | |
| qcom,decimation = <0x00>; | |
| qcom,pre-div-channel-scaling = <0x00>; | |
| qcom,calibration-type = "ratiometric"; | |
| qcom,scale-function = <0x02>; | |
| qcom,hw-settle-time = <0x02>; | |
| qcom,fast-avg-setup = <0x00>; | |
| }; | |
| chan@32 { | |
| label = "xo_therm"; | |
| reg = <0x32>; | |
| qcom,decimation = <0x00>; | |
| qcom,pre-div-channel-scaling = <0x00>; | |
| qcom,calibration-type = "ratiometric"; | |
| qcom,scale-function = <0x04>; | |
| qcom,hw-settle-time = <0x02>; | |
| qcom,fast-avg-setup = <0x00>; | |
| }; | |
| chan@3c { | |
| label = "xo_therm_buf"; | |
| reg = <0x3c>; | |
| qcom,decimation = <0x00>; | |
| qcom,pre-div-channel-scaling = <0x00>; | |
| qcom,calibration-type = "ratiometric"; | |
| qcom,scale-function = <0x04>; | |
| qcom,hw-settle-time = <0x02>; | |
| qcom,fast-avg-setup = <0x00>; | |
| qcom,vadc-thermal-node; | |
| }; | |
| }; | |
| vadc@3400 { | |
| compatible = "qcom,qpnp-adc-tm"; | |
| reg = <0x3400 0x100>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| interrupts = <0x00 0x34 0x00 0x01 0x00 0x34 0x03 0x01 0x00 0x34 0x04 0x01>; | |
| interrupt-names = "eoc-int-en-set\0high-thr-en-set\0low-thr-en-set"; | |
| qcom,adc-bit-resolution = <0x0f>; | |
| qcom,adc-vdd-reference = <0x708>; | |
| qcom,adc_tm-vadc = <0xc5>; | |
| #thermal-sensor-cells = <0x01>; | |
| phandle = <0xc8>; | |
| chan@36 { | |
| label = "pa_therm0"; | |
| reg = <0x36>; | |
| qcom,pre-div-channel-scaling = <0x00>; | |
| qcom,decimation = <0x00>; | |
| qcom,calibration-type = "ratiometric"; | |
| qcom,scale-function = <0x02>; | |
| qcom,hw-settle-time = <0x02>; | |
| qcom,btm-channel-number = <0x48>; | |
| qcom,fast-avg-setup = <0x00>; | |
| qcom,thermal-node; | |
| }; | |
| chan@11 { | |
| label = "quiet_therm"; | |
| reg = <0x11>; | |
| qcom,pre-div-channel-scaling = <0x00>; | |
| qcom,decimation = <0x00>; | |
| qcom,calibration-type = "ratiometric"; | |
| qcom,scale-function = <0x02>; | |
| qcom,hw-settle-time = <0x02>; | |
| qcom,btm-channel-number = <0x68>; | |
| qcom,fast-avg-setup = <0x00>; | |
| qcom,thermal-node; | |
| }; | |
| }; | |
| qcom,pm8953_rtc { | |
| spmi-dev-container; | |
| compatible = "qcom,qpnp-rtc"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| qcom,qpnp-rtc-write = <0x00>; | |
| qcom,qpnp-rtc-alarm-pwrup = <0x00>; | |
| phandle = <0x2b6>; | |
| qcom,pm8953_rtc_rw@6000 { | |
| reg = <0x6000 0x100>; | |
| }; | |
| qcom,pm8953_rtc_alarm@6100 { | |
| reg = <0x6100 0x100>; | |
| interrupts = <0x00 0x61 0x01 0x00>; | |
| }; | |
| }; | |
| qcom,pm8953_typec@bf00 { | |
| compatible = "qcom,qpnp-typec"; | |
| reg = <0xbf00 0x100>; | |
| interrupts = <0x00 0xbf 0x00 0x01 0x00 0xbf 0x01 0x01 0x00 0xbf 0x02 0x01 0x00 0xbf 0x03 0x01 0x00 0xbf 0x04 0x01 0x00 0xbf 0x06 0x01 0x00 0xbf 0x07 0x01>; | |
| interrupt-names = "vrd-change\0ufp-detect\0ufp-detach\0dfp-detect\0dfp-detach\0vbus-err\0vconn-oc"; | |
| status = "disabled"; | |
| phandle = <0x2b7>; | |
| }; | |
| }; | |
| qcom,pm8953@1 { | |
| compatible = "qcom,spmi-pmic"; | |
| reg = <0x01 0x00>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| phandle = <0x2b8>; | |
| qcom,pwms@bc00 { | |
| status = "ok"; | |
| compatible = "qcom,pwm-lpg"; | |
| reg = <0xbc00 0x100>; | |
| reg-names = "lpg-base"; | |
| #pwm-cells = <0x02>; | |
| phandle = <0x2b9>; | |
| }; | |
| spm-regulator@2000 { | |
| compatible = "qcom,spm-regulator"; | |
| reg = <0x2000 0x100>; | |
| regulator-name = "pm8953_s5"; | |
| regulator-min-microvolt = <0x61a80>; | |
| regulator-max-microvolt = <0x116520>; | |
| phandle = <0x155>; | |
| avs-limit-regulator { | |
| regulator-name = "pm8953_s5_avs_limit"; | |
| regulator-min-microvolt = <0x61a80>; | |
| regulator-max-microvolt = <0x116520>; | |
| phandle = <0x156>; | |
| }; | |
| }; | |
| analog-codec@f000 { | |
| status = "okay"; | |
| compatible = "qcom,pmic-analog-codec"; | |
| reg = <0xf000 0x200>; | |
| #address-cells = <0x02>; | |
| #size-cells = <0x00>; | |
| interrupt-parent = <0x12d>; | |
| interrupts = <0x01 0xf0 0x00 0x00 0x01 0xf0 0x01 0x00 0x01 0xf0 0x02 0x00 0x01 0xf0 0x03 0x00 0x01 0xf0 0x04 0x00 0x01 0xf0 0x05 0x00 0x01 0xf0 0x06 0x00 0x01 0xf0 0x07 0x00 0x01 0xf1 0x00 0x00 0x01 0xf1 0x01 0x00 0x01 0xf1 0x02 0x00 0x01 0xf1 0x03 0x00 0x01 0xf1 0x04 0x00 0x01 0xf1 0x05 0x00>; | |
| interrupt-names = "spk_cnp_int\0spk_clip_int\0spk_ocp_int\0ins_rem_det1\0but_rel_det\0but_press_det\0ins_rem_det\0mbhc_int\0ear_ocp_int\0hphr_ocp_int\0hphl_ocp_det\0ear_cnp_int\0hphr_cnp_int\0hphl_cnp_int"; | |
| cdc-vdda-cp-supply = <0x12e>; | |
| qcom,cdc-vdda-cp-voltage = <0x1cfde0 0x1f47d0>; | |
| qcom,cdc-vdda-cp-current = <0x7a120>; | |
| cdc-vdd-io-supply = <0x12f>; | |
| qcom,cdc-vdd-io-voltage = <0x1b7740 0x1b7740>; | |
| qcom,cdc-vdd-io-current = <0x1388>; | |
| cdc-vdd-pa-supply = <0x12e>; | |
| qcom,cdc-vdd-pa-voltage = <0x1cfde0 0x1f47d0>; | |
| qcom,cdc-vdd-pa-current = <0x3f7a0>; | |
| cdc-vdd-mic-bias-supply = <0x123>; | |
| qcom,cdc-vdd-mic-bias-voltage = <0x2faf08 0x2faf08>; | |
| qcom,cdc-vdd-mic-bias-current = <0x1388>; | |
| qcom,cdc-mclk-clk-rate = <0x927c00>; | |
| qcom,cdc-static-supplies = "cdc-vdd-io\0cdc-vdd-pa\0cdc-vdda-cp"; | |
| qcom,cdc-on-demand-supplies = "cdc-vdd-mic-bias"; | |
| phandle = <0x192>; | |
| msm-dig-codec { | |
| compatible = "qcom,msm-digital-codec"; | |
| reg = <0xc0f0000 0x00>; | |
| phandle = <0x191>; | |
| }; | |
| }; | |
| }; | |
| qcom,pmi632@2 { | |
| compatible = "qcom,spmi-pmic"; | |
| reg = <0x02 0x00>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| qcom,revid@100 { | |
| compatible = "qcom,qpnp-revid"; | |
| reg = <0x100 0x100>; | |
| phandle = <0x130>; | |
| }; | |
| qcom,power-on@800 { | |
| compatible = "qcom,qpnp-power-on"; | |
| reg = <0x800 0x100>; | |
| qcom,secondary-pon-reset; | |
| qcom,ps-hold-hard-reset-disable; | |
| qcom,ps-hold-shutdown-disable; | |
| phandle = <0x2ba>; | |
| }; | |
| vadc@3100 { | |
| compatible = "qcom,qpnp-vadc-hc\0qcom,qpnp-adc-hc-pm5"; | |
| reg = <0x3100 0x100>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| interrupts = <0x02 0x31 0x00 0x01>; | |
| interrupt-names = "eoc-int-en-set"; | |
| qcom,adc-vdd-reference = <0x753>; | |
| qcom,adc-full-scale-code = <0x70e4>; | |
| qcom,pmic-revid = <0x130>; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x131 0x132>; | |
| phandle = <0x133>; | |
| chan@0 { | |
| label = "ref_gnd"; | |
| reg = <0x00>; | |
| qcom,decimation = <0x02>; | |
| qcom,pre-div-channel-scaling = <0x00>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x00>; | |
| qcom,hw-settle-time = <0x00>; | |
| qcom,fast-avg-setup = <0x00>; | |
| qcom,cal-val = <0x00>; | |
| }; | |
| chan@1 { | |
| label = "ref_1250v"; | |
| reg = <0x01>; | |
| qcom,decimation = <0x02>; | |
| qcom,pre-div-channel-scaling = <0x00>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x00>; | |
| qcom,hw-settle-time = <0x00>; | |
| qcom,fast-avg-setup = <0x00>; | |
| qcom,cal-val = <0x00>; | |
| }; | |
| chan@83 { | |
| label = "vph_pwr"; | |
| reg = <0x83>; | |
| qcom,decimation = <0x02>; | |
| qcom,pre-div-channel-scaling = <0x01>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x00>; | |
| qcom,hw-settle-time = <0x00>; | |
| qcom,fast-avg-setup = <0x00>; | |
| qcom,cal-val = <0x00>; | |
| }; | |
| chan@84 { | |
| label = "vbat_sns"; | |
| reg = <0x84>; | |
| qcom,decimation = <0x02>; | |
| qcom,pre-div-channel-scaling = <0x01>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x00>; | |
| qcom,hw-settle-time = <0x00>; | |
| qcom,fast-avg-setup = <0x00>; | |
| qcom,cal-val = <0x00>; | |
| }; | |
| chan@6 { | |
| label = "die_temp"; | |
| reg = <0x06>; | |
| qcom,decimation = <0x02>; | |
| qcom,pre-div-channel-scaling = <0x00>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x13>; | |
| qcom,hw-settle-time = <0x00>; | |
| qcom,fast-avg-setup = <0x00>; | |
| qcom,cal-val = <0x00>; | |
| }; | |
| chan@7 { | |
| label = "usb_in_i"; | |
| reg = <0x07>; | |
| qcom,decimation = <0x02>; | |
| qcom,pre-div-channel-scaling = <0x00>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x15>; | |
| qcom,hw-settle-time = <0x00>; | |
| qcom,fast-avg-setup = <0x00>; | |
| qcom,cal-val = <0x00>; | |
| }; | |
| chan@8 { | |
| label = "usb_in_v"; | |
| reg = <0x08>; | |
| qcom,decimation = <0x02>; | |
| qcom,pre-div-channel-scaling = <0x08>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x00>; | |
| qcom,hw-settle-time = <0x00>; | |
| qcom,fast-avg-setup = <0x00>; | |
| qcom,cal-val = <0x00>; | |
| }; | |
| chan@9 { | |
| label = "chg_temp"; | |
| reg = <0x09>; | |
| qcom,decimation = <0x02>; | |
| qcom,pre-div-channel-scaling = <0x00>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x12>; | |
| qcom,hw-settle-time = <0x00>; | |
| qcom,fast-avg-setup = <0x00>; | |
| qcom,cal-val = <0x00>; | |
| }; | |
| chan@4a { | |
| label = "bat_therm"; | |
| reg = <0x4a>; | |
| qcom,decimation = <0x02>; | |
| qcom,pre-div-channel-scaling = <0x00>; | |
| qcom,calibration-type = "ratiometric"; | |
| qcom,scale-function = <0x11>; | |
| qcom,hw-settle-time = <0x00>; | |
| qcom,fast-avg-setup = <0x00>; | |
| qcom,cal-val = <0x00>; | |
| }; | |
| chan@2a { | |
| label = "bat_therm_PU30"; | |
| reg = <0x2a>; | |
| qcom,decimation = <0x02>; | |
| qcom,pre-div-channel-scaling = <0x00>; | |
| qcom,calibration-type = "ratiometric"; | |
| qcom,scale-function = <0x16>; | |
| qcom,hw-settle-time = <0x00>; | |
| qcom,fast-avg-setup = <0x00>; | |
| qcom,cal-val = <0x00>; | |
| }; | |
| chan@6a { | |
| label = "bat_therm_PU400"; | |
| reg = <0x6a>; | |
| qcom,decimation = <0x02>; | |
| qcom,pre-div-channel-scaling = <0x00>; | |
| qcom,calibration-type = "ratiometric"; | |
| qcom,scale-function = <0x19>; | |
| qcom,hw-settle-time = <0x00>; | |
| qcom,fast-avg-setup = <0x00>; | |
| qcom,cal-val = <0x00>; | |
| }; | |
| chan@4b { | |
| label = "bat_id"; | |
| reg = <0x4b>; | |
| qcom,decimation = <0x02>; | |
| qcom,pre-div-channel-scaling = <0x00>; | |
| qcom,calibration-type = "ratiometric"; | |
| qcom,scale-function = <0x00>; | |
| qcom,hw-settle-time = <0x00>; | |
| qcom,fast-avg-setup = <0x00>; | |
| qcom,cal-val = <0x00>; | |
| }; | |
| chan@4c { | |
| label = "xo_therm"; | |
| reg = <0x4c>; | |
| qcom,decimation = <0x02>; | |
| qcom,pre-div-channel-scaling = <0x00>; | |
| qcom,calibration-type = "ratiometric"; | |
| qcom,scale-function = <0x04>; | |
| qcom,hw-settle-time = <0x08>; | |
| qcom,fast-avg-setup = <0x00>; | |
| }; | |
| chan@1e { | |
| label = "mid_chg"; | |
| reg = <0x1e>; | |
| qcom,decimation = <0x02>; | |
| qcom,pre-div-channel-scaling = <0x03>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x00>; | |
| qcom,hw-settle-time = <0x00>; | |
| qcom,fast-avg-setup = <0x00>; | |
| qcom,cal-val = <0x00>; | |
| }; | |
| chan@52 { | |
| label = "typec_therm"; | |
| reg = <0x52>; | |
| qcom,decimation = <0x02>; | |
| qcom,pre-div-channel-scaling = <0x00>; | |
| qcom,calibration-type = "ratiometric"; | |
| qcom,scale-function = <0x02>; | |
| qcom,hw-settle-time = <0x00>; | |
| qcom,fast-avg-setup = <0x00>; | |
| qcom,cal-val = <0x00>; | |
| }; | |
| chan@53 { | |
| label = "backlight_therm"; | |
| reg = <0x53>; | |
| qcom,decimation = <0x02>; | |
| qcom,pre-div-channel-scaling = <0x00>; | |
| qcom,calibration-type = "ratiometric"; | |
| qcom,scale-function = <0x02>; | |
| qcom,hw-settle-time = <0x00>; | |
| qcom,fast-avg-setup = <0x00>; | |
| qcom,cal-val = <0x00>; | |
| }; | |
| chan@54 { | |
| label = "smb_therm"; | |
| reg = <0x54>; | |
| qcom,decimation = <0x02>; | |
| qcom,pre-div-channel-scaling = <0x00>; | |
| qcom,calibration-type = "ratiometric"; | |
| qcom,scale-function = <0x02>; | |
| qcom,hw-settle-time = <0x00>; | |
| qcom,fast-avg-setup = <0x00>; | |
| qcom,cal-val = <0x00>; | |
| }; | |
| }; | |
| vadc@3500 { | |
| compatible = "qcom,qpnp-adc-tm-hc\0qcom,qpnp-adc-tm-hc-pm5"; | |
| reg = <0x3500 0x100>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| interrupts = <0x02 0x35 0x00 0x01>; | |
| interrupt-names = "eoc-int-en-set"; | |
| qcom,adc-vdd-reference = <0x753>; | |
| qcom,adc-full-scale-code = <0x70e4>; | |
| qcom,adc_tm-vadc = <0x133>; | |
| qcom,decimation = <0x00>; | |
| qcom,fast-avg-setup = <0x00>; | |
| #thermal-sensor-cells = <0x01>; | |
| phandle = <0xd9>; | |
| chan@53 { | |
| label = "backlight_therm"; | |
| reg = <0x53>; | |
| qcom,pre-div-channel-scaling = <0x00>; | |
| qcom,calibration-type = "ratiometric"; | |
| qcom,scale-function = <0x02>; | |
| qcom,hw-settle-time = <0x00>; | |
| qcom,btm-channel-number = <0x60>; | |
| qcom,thermal-node; | |
| }; | |
| }; | |
| qcom,temp-alarm@2400 { | |
| compatible = "qcom,qpnp-temp-alarm"; | |
| reg = <0x2400 0x100>; | |
| interrupts = <0x02 0x24 0x00 0x01>; | |
| label = "pmi632_tz"; | |
| #thermal-sensor-cells = <0x00>; | |
| phandle = <0xf1>; | |
| }; | |
| pinctrl@c000 { | |
| compatible = "qcom,spmi-gpio"; | |
| reg = <0xc000 0x800>; | |
| interrupts = <0x02 0xc0 0x00 0x00 0x02 0xc1 0x00 0x00 0x02 0xc2 0x00 0x00 0x02 0xc3 0x00 0x00 0x02 0xc4 0x00 0x00 0x02 0xc5 0x00 0x00 0x02 0xc6 0x00 0x00 0x02 0xc7 0x00 0x00>; | |
| interrupt-names = "pmi632_gpio1\0pmi632_gpio2\0pmi632_gpio3\0pmi632_gpio4\0pmi632_gpio5\0pmi632_gpio6\0pmi632_gpio7\0pmi632_gpio8"; | |
| gpio-controller; | |
| #gpio-cells = <0x02>; | |
| phandle = <0x2bb>; | |
| backlight_therm { | |
| backlight_therm_default { | |
| pins = "gpio3"; | |
| bias-high-impedance; | |
| phandle = <0x131>; | |
| }; | |
| }; | |
| smb_therm { | |
| smb_therm_default { | |
| pins = "gpio4"; | |
| bias-high-impedance; | |
| phandle = <0x132>; | |
| }; | |
| }; | |
| }; | |
| qcom,qpnp-smb5 { | |
| compatible = "qcom,qpnp-smb5"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| #cooling-cells = <0x02>; | |
| qcom,pmic-revid = <0x130>; | |
| dpdm-supply = <0x134>; | |
| qcom,chg-vadc = <0x133>; | |
| qcom,float-option = <0x01>; | |
| qcom,auto-recharge-soc = <0x63>; | |
| qcom,hvdcp-disable; | |
| qcom,micro-usb; | |
| qcom,sw-jeita-enable = <0x01>; | |
| qcom,fcc-max-ua = <0x1e8480>; | |
| qcom,usb-icl-ua = <0x2dc6c0>; | |
| qcom,fv-max-uv = <0x432380>; | |
| qcom,chg-term-src = <0x01>; | |
| qcom,chg-term-current-ma = <0xffffff38>; | |
| qcom,thermal-mitigation = <0x1e8480 0x16e360 0xf4240 0xc3500 0x7a120 0x30d40>; | |
| qcom,battery-data = <0x135>; | |
| phandle = <0xe1>; | |
| qcom,chgr@1000 { | |
| reg = <0x1000 0x100>; | |
| interrupts = <0x02 0x10 0x00 0x01 0x02 0x10 0x01 0x01 0x02 0x10 0x02 0x01 0x02 0x10 0x03 0x01 0x02 0x10 0x04 0x01 0x02 0x10 0x05 0x01 0x02 0x10 0x06 0x01 0x02 0x10 0x07 0x01>; | |
| interrupt-names = "chgr-error\0chg-state-change\0step-chg-state-change\0step-chg-soc-update-fail\0step-chg-soc-update-req\0fg-fvcal-qualified\0vph-alarm\0vph-drop-prechg"; | |
| }; | |
| qcom,dcdc@1100 { | |
| reg = <0x1100 0x100>; | |
| interrupts = <0x02 0x11 0x00 0x01 0x02 0x11 0x01 0x01 0x02 0x11 0x02 0x01 0x02 0x11 0x03 0x03 0x02 0x11 0x04 0x03 0x02 0x11 0x05 0x03 0x02 0x11 0x06 0x01 0x02 0x11 0x07 0x03>; | |
| interrupt-names = "otg-fail\0otg-oc-disable-sw\0otg-oc-hiccup\0bsm-active\0high-duty-cycle\0input-current-limiting\0concurrent-mode-disable\0switcher-power-ok"; | |
| }; | |
| qcom,batif@1200 { | |
| reg = <0x1200 0x100>; | |
| interrupts = <0x02 0x12 0x00 0x01 0x02 0x12 0x01 0x01 0x02 0x12 0x02 0x03 0x02 0x12 0x03 0x03 0x02 0x12 0x04 0x03 0x02 0x12 0x05 0x03 0x02 0x12 0x06 0x03 0x02 0x12 0x07 0x03>; | |
| interrupt-names = "bat-temp\0all-chnl-conv-done\0bat-ov\0bat-low\0bat-therm-or-id-missing\0bat-terminal-missing\0buck-oc\0vph-ov"; | |
| }; | |
| qcom,usb@1300 { | |
| reg = <0x1300 0x100>; | |
| interrupts = <0x02 0x13 0x00 0x03 0x02 0x13 0x01 0x03 0x02 0x13 0x02 0x01 0x02 0x13 0x03 0x03 0x02 0x13 0x04 0x03 0x02 0x13 0x05 0x03 0x02 0x13 0x06 0x01 0x02 0x13 0x07 0x01>; | |
| interrupt-names = "usbin-collapse\0usbin-vashdn\0usbin-uv\0usbin-ov\0usbin-plugin\0usbin-revi-change\0usbin-src-change\0usbin-icl-change"; | |
| }; | |
| qcom,typec@1500 { | |
| reg = <0x1500 0x100>; | |
| interrupts = <0x02 0x15 0x00 0x03 0x02 0x15 0x01 0x03 0x02 0x15 0x02 0x01 0x02 0x15 0x03 0x01 0x02 0x15 0x04 0x03 0x02 0x15 0x05 0x01 0x02 0x15 0x06 0x01 0x02 0x15 0x07 0x01>; | |
| interrupt-names = "typec-or-rid-detect-change\0typec-vpd-detect\0typec-cc-state-change\0typec-vconn-oc\0typec-vbus-change\0typec-attach-detach\0typec-legacy-cable-detect\0typec-try-snk-src-detect"; | |
| }; | |
| qcom,misc@1600 { | |
| reg = <0x1600 0x100>; | |
| interrupts = <0x02 0x16 0x00 0x01 0x02 0x16 0x01 0x01 0x02 0x16 0x02 0x01 0x02 0x16 0x03 0x01 0x02 0x16 0x04 0x03 0x02 0x16 0x05 0x01 0x02 0x16 0x06 0x01 0x02 0x16 0x07 0x01>; | |
| interrupt-names = "wdog-snarl\0wdog-bark\0aicl-fail\0aicl-done\0smb-en\0imp-trigger\0temp-change\0temp-change-smb"; | |
| }; | |
| qcom,schgm-flash@a600 { | |
| reg = <0xa600 0x100>; | |
| interrupts = <0x02 0xa6 0x02 0x01 0x02 0xa6 0x05 0x01 0x02 0xa6 0x06 0x01 0x02 0xa6 0x07 0x03>; | |
| interrupt-names = "flash-state-change\0ilim1-s1\0ilim2-s2\0vreg-ok"; | |
| }; | |
| qcom,smb5-vbus { | |
| regulator-name = "smb5-vbus"; | |
| phandle = <0x13b>; | |
| }; | |
| }; | |
| qpnp,qg { | |
| compatible = "qcom,qpnp-qg"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| qcom,vbatt-empty-mv = <0xb54>; | |
| qcom,vbatt-empty-cold-mv = <0xbb8>; | |
| qcom,vbatt-low-mv = <0xe10>; | |
| qcom,vbatt-cutoff-mv = <0xdac>; | |
| qcom,qg-iterm-ma = <0x14a>; | |
| qcom,hold-soc-while-full; | |
| qcom,linearize-soc; | |
| qcom,qg-vadc = <0x133>; | |
| qcom,pmic-revid = <0x130>; | |
| qcom,ignore-shutdown-soc-secs = <0x708>; | |
| qcom,shutdown-soc-threshold = <0x28>; | |
| qcom,battery-data = <0x135>; | |
| phandle = <0x2bc>; | |
| qcom,qgauge@4800 { | |
| status = "okay"; | |
| reg = <0x4800 0x100>; | |
| interrupts = <0x02 0x48 0x00 0x03 0x02 0x48 0x01 0x03 0x02 0x48 0x02 0x01 0x02 0x48 0x03 0x01 0x02 0x48 0x04 0x01>; | |
| interrupt-names = "qg-batt-missing\0qg-vbat-low\0qg-vbat-empty\0qg-fifo-done\0qg-good-ocv"; | |
| }; | |
| qcom,qg-sdam@b100 { | |
| status = "okay"; | |
| reg = <0xb100 0x100>; | |
| }; | |
| }; | |
| bcl@3d00 { | |
| compatible = "qcom,bcl-v5"; | |
| reg = <0x3d00 0x100>; | |
| interrupts = <0x02 0x3d 0x00 0x00 0x02 0x3d 0x01 0x00 0x02 0x3d 0x00 0x00 0x02 0x3d 0x01 0x00 0x02 0x3d 0x02 0x00>; | |
| interrupt-names = "bcl-ibat-lvl0\0bcl-ibat-lvl1\0bcl-vbat-lvl0\0bcl-vbat-lvl1\0bcl-vbat-lvl2"; | |
| #thermal-sensor-cells = <0x01>; | |
| phandle = <0xec>; | |
| }; | |
| bcl-soc { | |
| compatible = "qcom,msm-bcl-soc"; | |
| #thermal-sensor-cells = <0x00>; | |
| phandle = <0xef>; | |
| }; | |
| qcom,pbs@7400 { | |
| compatible = "qcom,qpnp-pbs"; | |
| reg = <0x7400 0x100>; | |
| phandle = <0x137>; | |
| }; | |
| qcom,sdam@b600 { | |
| compatible = "qcom,spmi-sdam"; | |
| reg = <0xb600 0x100>; | |
| phandle = <0x136>; | |
| }; | |
| }; | |
| qcom,pmi632@3 { | |
| compatible = "qcom,spmi-pmic"; | |
| reg = <0x03 0x00>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| phandle = <0x2bd>; | |
| qcom,vibrator@5700 { | |
| compatible = "qcom,qpnp-vibrator-ldo"; | |
| reg = <0x5700 0x100>; | |
| qcom,vib-ldo-volt-uv = <0x2dc6c0>; | |
| qcom,disable-overdrive; | |
| phandle = <0x2be>; | |
| }; | |
| qcom,pwms@b300 { | |
| compatible = "qcom,pwm-lpg"; | |
| reg = <0xb300 0x500>; | |
| reg-names = "lpg-base"; | |
| #pwm-cells = <0x02>; | |
| nvmem-names = "ppg_sdam"; | |
| nvmem = <0x136>; | |
| qcom,pbs-client = <0x137>; | |
| qcom,lut-sdam-base = <0x80>; | |
| qcom,lut-patterns = <0x00 0x00 0x00 0x0e 0x1c 0x2a 0x38 0x46 0x54 0x64 0x64 0x54 0x46 0x38 0x2a 0x1c 0x0e 0x00 0x00 0x00>; | |
| phandle = <0x138>; | |
| lpg@1 { | |
| qcom,lpg-chan-id = <0x01>; | |
| qcom,ramp-step-ms = <0xc8>; | |
| qcom,ramp-low-index = <0x00>; | |
| qcom,ramp-high-index = <0x13>; | |
| qcom,ramp-pattern-repeat; | |
| qcom,lpg-sdam-base = <0x48>; | |
| }; | |
| lpg@2 { | |
| qcom,lpg-chan-id = <0x02>; | |
| qcom,ramp-step-ms = <0xc8>; | |
| qcom,ramp-low-index = <0x00>; | |
| qcom,ramp-high-index = <0x13>; | |
| qcom,ramp-pattern-repeat; | |
| qcom,lpg-sdam-base = <0x56>; | |
| }; | |
| lpg@3 { | |
| qcom,lpg-chan-id = <0x03>; | |
| qcom,ramp-step-ms = <0xc8>; | |
| qcom,ramp-low-index = <0x00>; | |
| qcom,ramp-high-index = <0x13>; | |
| qcom,ramp-pattern-repeat; | |
| qcom,lpg-sdam-base = <0x64>; | |
| }; | |
| }; | |
| qcom,leds@d000 { | |
| compatible = "qcom,tri-led"; | |
| reg = <0xd000 0x100>; | |
| phandle = <0x2bf>; | |
| red { | |
| label = "red"; | |
| pwms = <0x138 0x00 0xf4240>; | |
| led-sources = <0x00>; | |
| linux,default-trigger = "timer"; | |
| }; | |
| green { | |
| label = "green"; | |
| pwms = <0x138 0x01 0xf4240>; | |
| led-sources = <0x01>; | |
| linux,default-trigger = "timer"; | |
| }; | |
| blue { | |
| label = "blue"; | |
| pwms = <0x138 0x02 0xf4240>; | |
| led-sources = <0x02>; | |
| linux,default-trigger = "timer"; | |
| }; | |
| }; | |
| qpnp-lcdb@ec00 { | |
| compatible = "qcom,qpnp-lcdb-regulator"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| reg = <0xec00 0x100>; | |
| interrupts = <0x03 0xec 0x01 0x01>; | |
| interrupt-names = "sc-irq"; | |
| qcom,pmic-revid = <0x130>; | |
| qcom,voltage-step-ramp; | |
| phandle = <0x2c0>; | |
| ldo { | |
| label = "ldo"; | |
| regulator-name = "lcdb_ldo"; | |
| regulator-min-microvolt = <0x3d0900>; | |
| regulator-max-microvolt = <0x5b8d80>; | |
| phandle = <0x2c1>; | |
| }; | |
| ncp { | |
| label = "ncp"; | |
| regulator-name = "lcdb_ncp"; | |
| regulator-min-microvolt = <0x3d0900>; | |
| regulator-max-microvolt = <0x5b8d80>; | |
| phandle = <0x2c2>; | |
| }; | |
| bst { | |
| label = "bst"; | |
| regulator-name = "lcdb_bst"; | |
| regulator-min-microvolt = <0x47b760>; | |
| regulator-max-microvolt = <0x5fbfb8>; | |
| phandle = <0x2c3>; | |
| }; | |
| }; | |
| qcom,leds@d300 { | |
| compatible = "qcom,qpnp-flash-led-v2"; | |
| status = "okay"; | |
| reg = <0xd300 0x100>; | |
| label = "flash"; | |
| interrupts = <0x03 0xd3 0x00 0x01 0x03 0xd3 0x03 0x01 0x03 0xd3 0x04 0x01>; | |
| interrupt-names = "led-fault-irq\0all-ramp-down-done-irq\0all-ramp-up-done-irq"; | |
| qcom,short-circuit-det; | |
| qcom,open-circuit-det; | |
| qcom,vph-droop-det; | |
| qcom,thermal-derate-en; | |
| qcom,thermal-derate-current = <0xc8 0x1f4 0x3e8>; | |
| qcom,isc-delay = <0xc0>; | |
| qcom,pmic-revid = <0x130>; | |
| phandle = <0x2c4>; | |
| qcom,flash_0 { | |
| label = "flash"; | |
| qcom,led-name = "led:flash_0"; | |
| qcom,max-current = <0x5dc>; | |
| qcom,default-led-trigger = "flash0_trigger"; | |
| qcom,id = <0x00>; | |
| qcom,current-ma = <0x4b0>; | |
| qcom,duration-ms = <0x500>; | |
| qcom,ires-ua = <0x30d4>; | |
| qcom,hdrm-voltage-mv = <0x190>; | |
| qcom,hdrm-vol-hi-lo-win-mv = <0x64>; | |
| phandle = <0x1b9>; | |
| }; | |
| qcom,flash_1 { | |
| label = "flash"; | |
| qcom,led-name = "led:flash_1"; | |
| qcom,max-current = <0x5dc>; | |
| qcom,default-led-trigger = "flash1_trigger"; | |
| qcom,id = <0x01>; | |
| qcom,current-ma = <0x3e8>; | |
| qcom,duration-ms = <0x500>; | |
| qcom,ires-ua = <0x30d4>; | |
| qcom,hdrm-voltage-mv = <0x190>; | |
| qcom,hdrm-vol-hi-lo-win-mv = <0x64>; | |
| phandle = <0x1ba>; | |
| }; | |
| qcom,torch_0 { | |
| label = "torch"; | |
| qcom,led-name = "led:torch_0"; | |
| qcom,max-current = <0x4b0>; | |
| qcom,default-led-trigger = "torch0_trigger"; | |
| qcom,id = <0x00>; | |
| qcom,current-ma = <0xc8>; | |
| qcom,ires-ua = <0x30d4>; | |
| qcom,hdrm-voltage-mv = <0x190>; | |
| qcom,hdrm-vol-hi-lo-win-mv = <0x64>; | |
| phandle = <0x1bb>; | |
| }; | |
| qcom,torch_1 { | |
| label = "torch"; | |
| qcom,led-name = "led:torch_1"; | |
| qcom,max-current = <0x1f4>; | |
| qcom,default-led-trigger = "torch1_trigger"; | |
| qcom,id = <0x01>; | |
| qcom,current-ma = <0x12c>; | |
| qcom,ires-ua = <0x30d4>; | |
| qcom,hdrm-voltage-mv = <0x190>; | |
| qcom,hdrm-vol-hi-lo-win-mv = <0x64>; | |
| phandle = <0x1bc>; | |
| }; | |
| qcom,flashlight_0 { | |
| label = "flashlight"; | |
| qcom,led-name = "flashlight"; | |
| qcom,torch-name = "led:torch_0\0led:torch_1"; | |
| qcom,switch-name = "led:switch_0"; | |
| qcom,id = <0x00>; | |
| }; | |
| qcom,led_switch_0 { | |
| label = "switch"; | |
| qcom,led-name = "led:switch_0"; | |
| qcom,led-mask = <0x03>; | |
| qcom,default-led-trigger = "switch0_trigger"; | |
| phandle = <0x1bd>; | |
| }; | |
| qcom,led_switch_1 { | |
| label = "switch"; | |
| qcom,led-name = "led:switch_1"; | |
| qcom,led-mask = <0x02>; | |
| qcom,default-led-trigger = "switch1_trigger"; | |
| phandle = <0x2c5>; | |
| }; | |
| }; | |
| }; | |
| }; | |
| ssusb@7000000 { | |
| compatible = "qcom,dwc-usb3-msm"; | |
| reg = <0x7000000 0xfc000 0x7e000 0x400>; | |
| reg-names = "core_base\0ahb2phy_base"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| ranges; | |
| interrupts = <0x00 0x88 0x00 0x00 0xdc 0x00 0x00 0x86 0x00>; | |
| interrupt-names = "hs_phy_irq\0ss_phy_irq\0pwr_event_irq"; | |
| USB3_GDSC-supply = <0x139>; | |
| qcom,usb-dbm = <0x13a>; | |
| qcom,msm-bus,name = "usb3"; | |
| qcom,msm-bus,num-cases = <0x03>; | |
| qcom,msm-bus,num-paths = <0x01>; | |
| qcom,msm-bus,vectors-KBps = <0x3d 0x200 0x00 0x00 0x3d 0x200 0x3a980 0xc3500 0x3d 0x200 0x3a980 0xc3500>; | |
| qcom,pm-qos-latency = <0x02>; | |
| qcom,dwc-usb3-msm-tx-fifo-size = <0x5328>; | |
| clocks = <0x12 0xb3b4e2cb 0x12 0xf7f4b314 0x12 0xa800b65a 0x12 0xd0b65c92 0x12 0xfad488ce 0x12 0xccb7e26f>; | |
| clock-names = "core_clk\0iface_clk\0utmi_clk\0sleep_clk\0xo\0cfg_ahb_clk"; | |
| qcom,core-clk-rate = <0x7f28155>; | |
| qcom,core-clk-rate-hs = <0x3938700>; | |
| resets = <0x12 0x03>; | |
| reset-names = "core_reset"; | |
| extcon = <0xe1 0xe1 0x00 0xe1 0xe1>; | |
| vbus_dwc3-supply = <0x13b>; | |
| phandle = <0x2c6>; | |
| dwc3@7000000 { | |
| compatible = "snps,dwc3"; | |
| reg = <0x7000000 0xc8d0>; | |
| interrupt-parent = <0xc4>; | |
| interrupts = <0x00 0x8c 0x00>; | |
| usb-phy = <0x134 0x13c>; | |
| tx-fifo-resize; | |
| snps,usb3-u1u2-disable; | |
| snps,is-utmi-l1-suspend; | |
| snps,usb2-l1-disable; | |
| snps,hird-threshold = [00]; | |
| }; | |
| qcom,usbbam@7104000 { | |
| compatible = "qcom,usb-bam-msm"; | |
| reg = <0x7104000 0x1a934>; | |
| interrupt-parent = <0xc4>; | |
| interrupts = <0x00 0x87 0x00>; | |
| qcom,bam-type = <0x00>; | |
| qcom,usb-bam-fifo-baseaddr = "\b`P"; | |
| qcom,usb-bam-num-pipes = <0x08>; | |
| qcom,ignore-core-reset-ack; | |
| qcom,disable-clk-gating; | |
| qcom,usb-bam-override-threshold = <0x4001>; | |
| qcom,usb-bam-max-mbps-highspeed = <0x190>; | |
| qcom,usb-bam-max-mbps-superspeed = <0xe10>; | |
| qcom,reset-bam-on-connect; | |
| qcom,pipe0 { | |
| label = "ssusb-ipa-out-0"; | |
| qcom,usb-bam-mem-type = <0x01>; | |
| qcom,dir = <0x00>; | |
| qcom,pipe-num = <0x00>; | |
| qcom,peer-bam = <0x01>; | |
| qcom,src-bam-pipe-index = <0x01>; | |
| qcom,data-fifo-size = <0x8000>; | |
| qcom,descriptor-fifo-size = <0x2000>; | |
| }; | |
| qcom,pipe1 { | |
| label = "ssusb-ipa-in-0"; | |
| qcom,usb-bam-mem-type = <0x01>; | |
| qcom,dir = <0x01>; | |
| qcom,pipe-num = <0x00>; | |
| qcom,peer-bam = <0x01>; | |
| qcom,dst-bam-pipe-index = <0x00>; | |
| qcom,data-fifo-size = <0x8000>; | |
| qcom,descriptor-fifo-size = <0x2000>; | |
| }; | |
| qcom,pipe2 { | |
| label = "ssusb-qdss-in-0"; | |
| qcom,usb-bam-mem-type = <0x02>; | |
| qcom,dir = <0x01>; | |
| qcom,pipe-num = <0x00>; | |
| qcom,peer-bam = <0x00>; | |
| qcom,peer-bam-physical-address = <0x6044000>; | |
| qcom,src-bam-pipe-index = <0x00>; | |
| qcom,dst-bam-pipe-index = <0x02>; | |
| qcom,data-fifo-offset = <0x00>; | |
| qcom,data-fifo-size = <0xe00>; | |
| qcom,descriptor-fifo-offset = <0xe00>; | |
| qcom,descriptor-fifo-size = <0x200>; | |
| }; | |
| qcom,pipe3 { | |
| label = "ssusb-dpl-ipa-in-1"; | |
| qcom,usb-bam-mem-type = <0x01>; | |
| qcom,dir = <0x01>; | |
| qcom,pipe-num = <0x01>; | |
| qcom,peer-bam = <0x01>; | |
| qcom,dst-bam-pipe-index = <0x02>; | |
| qcom,data-fifo-size = <0x8000>; | |
| qcom,descriptor-fifo-size = <0x2000>; | |
| }; | |
| }; | |
| }; | |
| qusb@79000 { | |
| compatible = "qcom,qusb2phy"; | |
| reg = <0x79000 0x180 0x1841030 0x04 0x193f020 0x04>; | |
| reg-names = "qusb_phy_base\0ref_clk_addr\0tcsr_clamp_dig_n_1p8"; | |
| USB3_GDSC-supply = <0x139>; | |
| vdd-supply = <0xb2>; | |
| vdda18-supply = <0x13d>; | |
| vdda33-supply = <0x123>; | |
| qcom,vdd-voltage-level = <0x00 0xe1d48 0xe1d48>; | |
| qcom,qusb-phy-init-seq = <0xf8 0x80 0x23 0x84 0x83 0x88 0xc5 0x8c 0x14 0x9c 0x30 0x08 0x79 0x0c 0x21 0x10 0x00 0x90 0x9f 0x1c 0x00 0x18>; | |
| phy_type = "utmi"; | |
| qcom,phy-clk-scheme = "cml"; | |
| qcom,major-rev = <0x01>; | |
| clocks = <0x12 0xf5304268 0x12 0x16e35a90 0x12 0xccb7e26f 0x12 0xf7f4b314 0x12 0xb3b4e2cb>; | |
| clock-names = "ref_clk_src\0ref_clk\0cfg_ahb_clk\0iface_clk\0core_clk"; | |
| resets = <0x12 0x00>; | |
| reset-names = "phy_reset"; | |
| phandle = <0x134>; | |
| }; | |
| ssphy@78000 { | |
| compatible = "qcom,usb-ssphy-qmp"; | |
| reg = <0x78000 0x9f8 0x193f244 0x04>; | |
| reg-names = "qmp_phy_base\0vls_clamp_reg"; | |
| qcom,qmp-phy-init-seq = <0xac 0x14 0x00 0x34 0x08 0x00 0x174 0x30 0x00 0x3c 0x06 0x00 0xb4 0x00 0x00 0xb8 0x08 0x00 0x194 0x06 0x3e8 0x19c 0x01 0x00 0x178 0x00 0x00 0xd0 0x82 0x00 0xdc 0x55 0x00 0xe0 0x55 0x00 0xe4 0x03 0x00 0x78 0x0b 0x00 0x84 0x16 0x00 0x90 0x28 0x00 0x108 0x80 0x00 0x10c 0x00 0x00 0x184 0x0a 0x00 0x4c 0x15 0x00 0x50 0x34 0x00 0x54 0x00 0x00 0xc8 0x00 0x00 0x18c 0x00 0x00 0xcc 0x00 0x00 0x128 0x00 0x00 0x0c 0x0a 0x00 0x10 0x01 0x00 0x1c 0x31 0x00 0x20 0x01 0x00 0x14 0x00 0x00 0x18 0x00 0x00 0x24 0xde 0x00 0x28 0x07 0x00 0x48 0x0f 0x00 0x70 0x0f 0x00 0x100 0x80 0x00 0x440 0x0b 0x00 0x4d8 0x02 0x00 0x4dc 0x6c 0x00 0x4e0 0xbb 0x00 0x508 0x77 0x00 0x50c 0x80 0x00 0x514 0x03 0x00 0x51c 0x16 0x00 0x448 0x75 0x00 0x454 0x00 0x00 0x40c 0x0a 0x00 0x41c 0x06 0x00 0x510 0x00 0x00 0x268 0x45 0x00 0x2ac 0x12 0x00 0x294 0x06 0x00 0x254 0x00 0x00 0x8c8 0x83 0x00 0x8c4 0x02 0x00 0x8cc 0x09 0x00 0x8d0 0xa2 0x00 0x8d4 0x85 0x00 0x880 0xd1 0x00 0x884 0x1f 0x00 0x888 0x47 0x00 0x80c 0x9f 0x00 0x824 0x17 0x00 0x828 0x0f 0x00 0x8b8 0x75 0x00 0x8bc 0x13 0x00 0x8b0 0x86 0x00 0x8a0 0x04 0x00 0x88c 0x44 0x00 0x870 0xe7 0x00 0x874 0x03 0x00 0x878 0x40 0x00 0x87c 0x00 0x00 0x9d8 0x88 0x00 0xffffffff 0x00 0x00>; | |
| qcom,qmp-phy-reg-offset = <0x974 0x8d8 0x8dc 0x804 0x800 0x808>; | |
| vdd-supply = <0xb2>; | |
| core-supply = <0x13d>; | |
| qcom,vdd-voltage-level = <0x00 0xe1d48 0xe1d48>; | |
| qcom,core-voltage-level = <0x00 0x1b7740 0x1b7740>; | |
| qcom,vbus-valid-override; | |
| clocks = <0x12 0x555d16b2 0x12 0x26f8a97a 0x12 0xccb7e26f 0x12 0xf5304268 0x12 0xb85dadfa>; | |
| clock-names = "aux_clk\0pipe_clk\0cfg_ahb_clk\0ref_clk_src\0ref_clk"; | |
| resets = <0x12 0x01 0x12 0x02>; | |
| reset-names = "phy_reset\0phy_phy_reset"; | |
| phandle = <0x13c>; | |
| }; | |
| dbm@70f8000 { | |
| compatible = "qcom,usb-dbm-1p5"; | |
| reg = <0x70f8000 0x300>; | |
| qcom,reset-ep-after-lpm-resume; | |
| phandle = <0x13a>; | |
| }; | |
| qcom,mss@4080000 { | |
| compatible = "qcom,pil-q6v55-mss"; | |
| reg = <0x4080000 0x100 0x194f000 0x10 0x1950000 0x08 0x1951000 0x08 0x4020000 0x40 0x1871000 0x04>; | |
| reg-names = "qdsp6_base\0halt_q6\0halt_modem\0halt_nc\0rmb_base\0restart_reg"; | |
| interrupts = <0x00 0x18 0x01>; | |
| vdd_mss-supply = <0x13e>; | |
| vdd_cx-supply = <0x11>; | |
| vdd_cx-voltage = <0x180>; | |
| vdd_mx-supply = <0x125>; | |
| vdd_mx-uV = <0x180>; | |
| vdd_pll-supply = <0x13d>; | |
| qcom,vdd_pll = <0x1b7740>; | |
| vdd_mss-uV = <0x180>; | |
| clocks = <0x12 0xe97a8354 0x12 0x111cde81 0x12 0x67544d62 0x12 0xde2adeb1>; | |
| clock-names = "xo\0iface_clk\0bus_clk\0mem_clk"; | |
| qcom,proxy-clock-names = "xo"; | |
| qcom,active-clock-names = "iface_clk\0bus_clk\0mem_clk"; | |
| qcom,pas-id = <0x05>; | |
| qcom,pil-mss-memsetup; | |
| qcom,firmware-name = "modem"; | |
| qcom,pil-self-auth; | |
| qcom,sequential-fw-load; | |
| qcom,sysmon-id = <0x00>; | |
| qcom,ssctl-instance-id = <0x12>; | |
| qcom,qdsp6v56-1-10; | |
| qcom,reset-clk; | |
| qcom,gpio-err-fatal = <0x13f 0x00 0x00>; | |
| qcom,gpio-err-ready = <0x13f 0x01 0x00>; | |
| qcom,gpio-proxy-unvote = <0x13f 0x02 0x00>; | |
| qcom,gpio-stop-ack = <0x13f 0x03 0x00>; | |
| qcom,gpio-shutdown-ack = <0x13f 0x07 0x00>; | |
| qcom,gpio-force-stop = <0x140 0x00 0x00>; | |
| memory-region = <0x141>; | |
| }; | |
| qcom,lpass@c200000 { | |
| compatible = "qcom,pil-tz-generic"; | |
| reg = <0xc200000 0x100>; | |
| interrupts = <0x00 0x125 0x01>; | |
| vdd_cx-supply = <0x11>; | |
| qcom,proxy-reg-names = "vdd_cx"; | |
| qcom,vdd_cx-uV-uA = <0x180 0x186a0>; | |
| qcom,mas-crypto = <0xaa>; | |
| clocks = <0x12 0xb72aa4c9 0x12 0xd390d2 0x12 0x94de4919 0x12 0xd4415c9b 0x12 0x37a21414>; | |
| clock-names = "xo\0scm_core_clk\0scm_iface_clk\0scm_bus_clk\0scm_core_clk_src"; | |
| qcom,proxy-clock-names = "xo\0scm_core_clk\0scm_iface_clk\0scm_bus_clk\0scm_core_clk_src"; | |
| qcom,scm_core_clk_src-freq = <0x4c4b400>; | |
| qcom,pas-id = <0x01>; | |
| qcom,complete-ramdump; | |
| qcom,proxy-timeout-ms = <0x2710>; | |
| qcom,smem-id = <0x1a7>; | |
| qcom,sysmon-id = <0x01>; | |
| qcom,ssctl-instance-id = <0x14>; | |
| qcom,firmware-name = "adsp"; | |
| qcom,gpio-err-fatal = <0x142 0x00 0x00>; | |
| qcom,gpio-proxy-unvote = <0x142 0x02 0x00>; | |
| qcom,gpio-err-ready = <0x142 0x01 0x00>; | |
| qcom,gpio-stop-ack = <0x142 0x03 0x00>; | |
| qcom,gpio-force-stop = <0x143 0x00 0x00>; | |
| memory-region = <0x144>; | |
| }; | |
| qcom,pronto@a21b000 { | |
| compatible = "qcom,pil-tz-generic"; | |
| reg = <0xa21b000 0x3000>; | |
| interrupts = <0x00 0x95 0x01>; | |
| vdd_pronto_pll-supply = <0x13d>; | |
| proxy-reg-names = "vdd_pronto_pll"; | |
| vdd_pronto_pll-uV-uA = <0x1b7740 0x4650>; | |
| qcom,mas-crypto = <0xaa>; | |
| clocks = <0x12 0x89dae6d0 0x12 0xd390d2 0x12 0x94de4919 0x12 0xd4415c9b 0x12 0x37a21414>; | |
| clock-names = "xo\0scm_core_clk\0scm_iface_clk\0scm_bus_clk\0scm_core_clk_src"; | |
| qcom,proxy-clock-names = "xo\0scm_core_clk\0scm_iface_clk\0scm_bus_clk\0scm_core_clk_src"; | |
| qcom,scm_core_clk_src = <0x4c4b400>; | |
| qcom,pas-id = <0x06>; | |
| qcom,proxy-timeout-ms = <0x2710>; | |
| qcom,smem-id = <0x1a6>; | |
| qcom,sysmon-id = <0x06>; | |
| qcom,ssctl-instance-id = <0x13>; | |
| qcom,firmware-name = "wcnss"; | |
| qcom,gpio-err-fatal = <0x145 0x00 0x00>; | |
| qcom,gpio-err-ready = <0x145 0x01 0x00>; | |
| qcom,gpio-proxy-unvote = <0x145 0x02 0x00>; | |
| qcom,gpio-stop-ack = <0x145 0x03 0x00>; | |
| qcom,gpio-force-stop = <0x146 0x00 0x00>; | |
| memory-region = <0x147>; | |
| }; | |
| qcom,venus@1de0000 { | |
| compatible = "qcom,pil-tz-generic"; | |
| reg = <0x1de0000 0x4000>; | |
| vdd-supply = <0xa6>; | |
| qcom,proxy-reg-names = "vdd"; | |
| qcom,mas-crypto = <0xaa>; | |
| clocks = <0x12 0xf76a02bb 0x12 0x8d778c6 0x12 0xcdf4c8f6 0x12 0xd390d2 0x12 0x94de4919 0x12 0xd4415c9b 0x12 0x37a21414>; | |
| clock-names = "core_clk\0iface_clk\0bus_clk\0scm_core_clk\0scm_iface_clk\0scm_bus_clk\0scm_core_clk_src"; | |
| qcom,proxy-clock-names = "core_clk\0iface_clk\0bus_clk\0scm_core_clk\0scm_iface_clk\0scm_bus_clk\0scm_core_clk_src"; | |
| qcom,scm_core_clk_src-freq = <0x4c4b400>; | |
| qcom,msm-bus,name = "pil-venus"; | |
| qcom,msm-bus,num-cases = <0x02>; | |
| qcom,msm-bus,num-paths = <0x01>; | |
| qcom,msm-bus,vectors-KBps = <0x3f 0x200 0x00 0x00 0x3f 0x200 0x00 0x4a380>; | |
| qcom,pas-id = <0x09>; | |
| qcom,proxy-timeout-ms = <0x64>; | |
| qcom,firmware-name = "venus"; | |
| memory-region = <0x148>; | |
| }; | |
| qcom,wcnss-wlan@0a000000 { | |
| compatible = "qcom,wcnss_wlan"; | |
| reg = <0xa000000 0x280000 0xb011008 0x04 0xa21b000 0x3000 0x3204000 0x100 0x3200800 0x200 0xa100400 0x200 0xa205050 0x200 0xa219000 0x20 0xa080488 0x08 0xa080fb0 0x08 0xa08040c 0x08 0xa0120a8 0x08 0xa012448 0x08 0xa080c00 0x01>; | |
| reg-names = "wcnss_mmio\0wcnss_fiq\0pronto_phy_base\0riva_phy_base\0riva_ccu_base\0pronto_a2xb_base\0pronto_ccpu_base\0pronto_saw2_base\0wlan_tx_phy_aborts\0wlan_brdg_err_source\0wlan_tx_status\0alarms_txctl\0alarms_tactl\0pronto_mcu_base"; | |
| interrupts = <0x00 0x91 0x00 0x00 0x92 0x00>; | |
| interrupt-names = "wcnss_wlantx_irq\0wcnss_wlanrx_irq"; | |
| qcom,pronto-vddmx-supply = <0x125>; | |
| qcom,pronto-vddcx-supply = <0x11>; | |
| qcom,pronto-vddpx-supply = <0x12f>; | |
| qcom,iris-vddxo-supply = <0x13d>; | |
| qcom,iris-vddrfa-supply = <0x149>; | |
| qcom,iris-vddpa-supply = <0x14a>; | |
| qcom,iris-vdddig-supply = <0x12f>; | |
| qcom,iris-vddxo-voltage-level = <0x1b7740 0x00 0x1b7740>; | |
| qcom,iris-vddrfa-voltage-level = <0x13d620 0x00 0x13d620>; | |
| qcom,iris-vddpa-voltage-level = <0x325aa0 0x00 0x325aa0>; | |
| qcom,iris-vdddig-voltage-level = <0x1b7740 0x00 0x1b7740>; | |
| qcom,vddmx-voltage-level = <0x180 0x00 0x180>; | |
| qcom,vddcx-voltage-level = <0x100 0x00 0x180>; | |
| qcom,vddpx-voltage-level = <0x1b7740 0x00 0x1b7740>; | |
| qcom,iris-vddxo-current = <0x2710>; | |
| qcom,iris-vddrfa-current = <0x186a0>; | |
| qcom,iris-vddpa-current = <0x7dbb8>; | |
| qcom,iris-vdddig-current = <0x2710>; | |
| qcom,pronto-vddmx-current = <0x00>; | |
| qcom,pronto-vddcx-current = <0x00>; | |
| qcom,pronto-vddpx-current = <0x00>; | |
| pinctrl-names = "wcnss_default\0wcnss_sleep\0wcnss_gpio_default"; | |
| pinctrl-0 = <0x14b>; | |
| pinctrl-1 = <0x14c>; | |
| pinctrl-2 = <0x14d>; | |
| gpios = <0xf4 0x4c 0x00 0xf4 0x4d 0x00 0xf4 0x4e 0x00 0xf4 0x4f 0x00 0xf4 0x50 0x00>; | |
| clocks = <0x12 0x116b76f 0x12 0x24a30992 0x14e 0x8121ac15 0x12 0x709f430b>; | |
| clock-names = "xo\0rf_clk\0measure\0wcnss_debug"; | |
| qcom,has-autodetect-xo; | |
| qcom,is-pronto-v3; | |
| qcom,has-pronto-hw; | |
| qcom,has-vsys-adc-channel; | |
| qcom,has-a2xb-split-reg; | |
| qcom,wcnss-adc_tm = <0xc8>; | |
| }; | |
| qcom,msm-ssc-sensors { | |
| compatible = "qcom,msm-ssc-sensors"; | |
| status = "ok"; | |
| phandle = <0x2c7>; | |
| }; | |
| fpc1020 { | |
| status = "ok"; | |
| compatible = "fpc,fpc1020"; | |
| interrupt-parent = <0xf4>; | |
| interrupts = <0x30 0x00>; | |
| fpc,gpio_rst = <0xf4 0x8c 0x00>; | |
| fpc,gpio_irq = <0xf4 0x30 0x00>; | |
| fpc,gpio_ldo_en = <0xf4 0x2f 0x00>; | |
| vcc_spi-supply = <0xb7>; | |
| vdd_io-supply = <0xb7>; | |
| vdd_ana-supply = <0xb7>; | |
| pinctrl-names = "fpc1020_reset_reset\0fpc1020_reset_active\0fpc1020_irq_active\0fpc1020_ldo_2v8_en"; | |
| pinctrl-0 = <0x14f>; | |
| pinctrl-1 = <0x150>; | |
| pinctrl-2 = <0x151>; | |
| pinctrl-3 = <0x152>; | |
| }; | |
| simtray { | |
| compatible = "xiaomi,simtray-status"; | |
| status-gpio = <0xf4 0x36 0x00>; | |
| }; | |
| goodix_fp { | |
| status = "ok"; | |
| compatible = "goodix,fingerprint"; | |
| interrupt-parent = <0xf4>; | |
| interrupts = <0x30 0x00>; | |
| goodix,gpio_reset = <0xf4 0x8c 0x00>; | |
| goodix,gpio_irq = <0xf4 0x30 0x00>; | |
| goodix,gpio_pwr = <0xf4 0x2f 0x00>; | |
| vcc_spi-supply = <0xb7>; | |
| vdd_io-supply = <0xb7>; | |
| vdd_ana-supply = <0xb7>; | |
| }; | |
| ant_check { | |
| compatible = "ant_check"; | |
| pinctrl-names = "ant_check_irq_state"; | |
| pinctrl-0 = <0x153>; | |
| ant_check,irq_gpio = <0xf4 0x09 0x00>; | |
| }; | |
| cpr4-ctrl@b018000 { | |
| compatible = "qcom,cpr4-sdm632-apss-regulator"; | |
| reg = <0xb018000 0x4000 0xa4000 0x1000>; | |
| reg-names = "cpr_ctrl\0fuse_base"; | |
| interrupts = <0x00 0x0f 0x01>; | |
| interrupt-names = "cpr"; | |
| qcom,cpr-ctrl-name = "apc"; | |
| qcom,cpr-sensor-time = <0x3e8>; | |
| qcom,cpr-loop-time = <0x4c4b40>; | |
| qcom,cpr-idle-cycles = <0x0f>; | |
| qcom,cpr-step-quot-init-min = <0x0c>; | |
| qcom,cpr-step-quot-init-max = <0x0e>; | |
| qcom,cpr-count-mode = <0x00>; | |
| qcom,cpr-count-repeat = <0x0e>; | |
| qcom,cpr-down-error-step-limit = <0x01>; | |
| qcom,cpr-up-error-step-limit = <0x01>; | |
| qcom,apm-ctrl = <0x154>; | |
| qcom,apm-threshold-voltage = <0xd59f8>; | |
| qcom,apm-hysteresis-voltage = <0x4e20>; | |
| vdd-supply = <0x155>; | |
| qcom,voltage-step = <0x1388>; | |
| vdd-limit-supply = <0x156>; | |
| mem-acc-supply = <0x157>; | |
| qcom,cpr-enable; | |
| qcom,cpr-hw-closed-loop; | |
| qcom,cpr-panic-reg-addr-list = <0xb1d2c18 0xb1d2900 0xb1112b0 0xb018798>; | |
| qcom,cpr-panic-reg-name-list = "CCI_SAW4_PMIC_STS\0CCI_SAW4_VCTL\0APCS_ALIAS0_APM_CTLER_STATUS\0APCS0_CPR_CORE_ADJ_MODE_REG"; | |
| qcom,cpr-reset-step-quot-loop-en; | |
| qcom,cpr-thread-has-always-vote-en; | |
| phandle = <0x2c8>; | |
| thread@0 { | |
| qcom,cpr-thread-id = <0x00>; | |
| qcom,cpr-consecutive-up = <0x00>; | |
| qcom,cpr-consecutive-down = <0x00>; | |
| qcom,cpr-up-threshold = <0x02>; | |
| qcom,cpr-down-threshold = <0x01>; | |
| regulator { | |
| regulator-name = "apc0_pwrcl_corner"; | |
| regulator-min-microvolt = <0x01>; | |
| regulator-max-microvolt = <0x07>; | |
| qcom,cpr-fuse-corners = <0x04>; | |
| qcom,cpr-fuse-combos = <0x40>; | |
| qcom,cpr-corners = <0x07>; | |
| qcom,cpr-corner-fmax-map = <0x01 0x03 0x04 0x07>; | |
| qcom,cpr-voltage-ceiling = <0xafc80 0xc0df0 0xd32e8 0xd32e8 0xe09c0 0xf1b30 0x104028>; | |
| qcom,cpr-voltage-floor = <0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120>; | |
| qcom,cpr-floor-to-ceiling-max-range = <0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350>; | |
| qcom,mem-acc-voltage = <0x01 0x01 0x02 0x02 0x02 0x02 0x03>; | |
| qcom,corner-frequencies = <0x249f0000 0x34a49000 0x3dcc5000 0x5140c800 0x5b8d8000 0x63904800 0x6b931000>; | |
| qcom,cpr-open-loop-voltage-fuse-adjustment = <0x00 0x00 0x00 0x2710>; | |
| qcom,cpr-closed-loop-voltage-fuse-adjustment = <0xffffd8f0 0x00 0x00 0x2710>; | |
| qcom,cpr-ro-scaling-factor = <0xe10 0xe10 0xef6 0x97e 0x9d8 0xa8c 0x6fe 0x6e0 0x7b2 0x758 0x83e 0x7da 0x9ce 0x1324 0x1112 0x12ac 0xe10 0xe10 0xef6 0x97e 0x9d8 0xa8c 0x6fe 0x6e0 0x7b2 0x758 0x83e 0x7da 0x9ce 0x1324 0x1112 0x12ac 0xe10 0xe10 0xef6 0x97e 0x9d8 0xa8c 0x6fe 0x6e0 0x7b2 0x758 0x83e 0x7da 0x9ce 0x1324 0x1112 0x12ac 0xe10 0xe10 0xef6 0x97e 0x9d8 0xa8c 0x6fe 0x6e0 0x7b2 0x758 0x83e 0x7da 0x9ce 0x1324 0x1112 0x12ac>; | |
| qcom,allow-voltage-interpolation; | |
| qcom,allow-quotient-interpolation; | |
| qcom,cpr-scaled-open-loop-voltage-as-ceiling; | |
| phandle = <0x126>; | |
| }; | |
| }; | |
| thread@1 { | |
| qcom,cpr-thread-id = <0x01>; | |
| qcom,cpr-consecutive-up = <0x00>; | |
| qcom,cpr-consecutive-down = <0x00>; | |
| qcom,cpr-up-threshold = <0x02>; | |
| qcom,cpr-down-threshold = <0x01>; | |
| regulator { | |
| regulator-name = "apc1_perfcl_corner"; | |
| regulator-min-microvolt = <0x01>; | |
| regulator-max-microvolt = <0x07>; | |
| qcom,cpr-fuse-corners = <0x04>; | |
| qcom,cpr-fuse-combos = <0x40>; | |
| qcom,cpr-corners = <0x07>; | |
| qcom,cpr-corner-fmax-map = <0x01 0x03 0x04 0x07>; | |
| qcom,cpr-voltage-ceiling = <0xafc80 0xc0df0 0xd32e8 0xd32e8 0xe09c0 0xf1b30 0x104028>; | |
| qcom,cpr-voltage-floor = <0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120>; | |
| qcom,cpr-floor-to-ceiling-max-range = <0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350>; | |
| qcom,mem-acc-voltage = <0x01 0x01 0x02 0x02 0x02 0x02 0x03>; | |
| qcom,corner-frequencies = <0x25c3f800 0x35c98800 0x413b3800 0x538ab800 0x5cb27800 0x6b931000 0x7829b800>; | |
| qcom,cpr-ro-scaling-factor = <0xe10 0xe10 0xef6 0x97e 0x9d8 0xa8c 0x6fe 0x6e0 0x7b2 0x758 0x83e 0x7da 0x9ce 0x1324 0x1112 0x12ac 0xe10 0xe10 0xef6 0x97e 0x9d8 0xa8c 0x6fe 0x6e0 0x7b2 0x758 0x83e 0x7da 0x9ce 0x1324 0x1112 0x12ac 0xe10 0xe10 0xef6 0x97e 0x9d8 0xa8c 0x6fe 0x6e0 0x7b2 0x758 0x83e 0x7da 0x9ce 0x1324 0x1112 0x12ac 0xe10 0xe10 0xef6 0x97e 0x9d8 0xa8c 0x6fe 0x6e0 0x7b2 0x758 0x83e 0x7da 0x9ce 0x1324 0x1112 0x12ac>; | |
| qcom,allow-voltage-interpolation; | |
| qcom,allow-quotient-interpolation; | |
| qcom,cpr-scaled-open-loop-voltage-as-ceiling; | |
| qcom,cpr-open-loop-voltage-fuse-adjustment = <0x7530 0x00 0x2710 0x4e20 0x7530 0x00 0x2710 0x4e20 0x00 0x00 0x2710 0x4e20 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x7530 0x00 0x2710 0x4e20 0x7530 0x00 0x2710 0x4e20 0x00 0x00 0x2710 0x4e20 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x7530 0x00 0x2710 0x4e20 0x7530 0x00 0x2710 0x4e20 0x00 0x00 0x2710 0x4e20 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>; | |
| qcom,cpr-closed-loop-voltage-fuse-adjustment = <0x7530 0x00 0x00 0x00 0x7530 0x00 0x00 0x00 0xffffd8f0 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x7530 0x00 0x00 0x00 0x7530 0x00 0x00 0x00 0xffffd8f0 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x7530 0x00 0x00 0x00 0x7530 0x00 0x00 0x00 0xffffd8f0 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>; | |
| phandle = <0x127>; | |
| }; | |
| }; | |
| }; | |
| regulator@194415c { | |
| compatible = "qcom,mem-acc-regulator"; | |
| reg = <0x194415c 0x04>; | |
| reg-names = "acc-sel-l1"; | |
| regulator-name = "gfx_mem_acc_corner"; | |
| regulator-min-microvolt = <0x01>; | |
| regulator-max-microvolt = <0x02>; | |
| qcom,acc-sel-l1-bit-pos = <0x00>; | |
| qcom,acc-sel-l1-bit-size = <0x01>; | |
| qcom,corner-acc-map = <0x01 0x00>; | |
| phandle = <0x158>; | |
| }; | |
| ldo@185f000 { | |
| compatible = "qcom,msm8953-gfx-ldo"; | |
| reg = <0x185f000 0x30 0xa4000 0x1000>; | |
| reg-names = "ldo_addr\0efuse_addr"; | |
| regulator-name = "msm_gfx_ldo"; | |
| regulator-min-microvolt = <0x01>; | |
| regulator-max-microvolt = <0x07>; | |
| qcom,ldo-voltage-ceiling = <0x975e0 0xa6040 0xb71b0>; | |
| qcom,ldo-voltage-floor = <0x7c830 0x7c830 0x927c0>; | |
| qcom,num-corners = <0x07>; | |
| qcom,num-ldo-corners = <0x03>; | |
| qcom,ldo-enable-corner-map = <0x00 0x00 0x00 0x00 0x00 0x00 0x00>; | |
| qcom,init-corner = <0x04>; | |
| vdd-cx-supply = <0x11>; | |
| qcom,vdd-cx-corner-map = <0x40 0x40 0x80 0xc0 0x100 0x140 0x180>; | |
| mem-acc-supply = <0x158>; | |
| qcom,mem-acc-corner-map = <0x01 0x01 0x01 0x02 0x02 0x02 0x02>; | |
| phandle = <0x124>; | |
| }; | |
| eldo2 { | |
| compatible = "regulator-fixed"; | |
| regulator-name = "eldo2_8953"; | |
| startup-delay-us = <0x00>; | |
| enable-active-high; | |
| gpio = <0xf4 0x32 0x00>; | |
| regulator-always-on; | |
| phandle = <0x122>; | |
| }; | |
| adv_vreg { | |
| compatible = "regulator-fixed"; | |
| regulator-name = "adv_vreg"; | |
| startup-delay-us = <0x190>; | |
| enable-active-high; | |
| gpio = <0x159 0x05 0x00>; | |
| phandle = <0x2c9>; | |
| }; | |
| qcom,gdsc@184c018 { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_venus"; | |
| reg = <0x184c018 0x04>; | |
| status = "okay"; | |
| clock-names = "bus_clk\0core_clk"; | |
| clocks = <0x12 0xcdf4c8f6 0x12 0xf76a02bb>; | |
| phandle = <0xa6>; | |
| }; | |
| qcom,gdsc@184d078 { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_mdss"; | |
| reg = <0x184d078 0x04>; | |
| status = "okay"; | |
| clock-names = "core_clk\0bus_clk"; | |
| clocks = <0x12 0x22f3521f 0x12 0x668f51de>; | |
| proxy-supply = <0xae>; | |
| qcom,proxy-consumer-enable; | |
| phandle = <0xae>; | |
| }; | |
| qcom,gdsc@185701c { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_jpeg"; | |
| reg = <0x185701c 0x04>; | |
| status = "okay"; | |
| clock-names = "core_clk\0bus_clk"; | |
| clocks = <0x12 0x1ed3f032 0x12 0x3e278896>; | |
| phandle = <0x15d>; | |
| }; | |
| qcom,gdsc@1858034 { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_vfe"; | |
| reg = <0x1858034 0x04>; | |
| status = "okay"; | |
| clock-names = "core_clk\0bus_clk\0micro_clk\0csi_clk"; | |
| clocks = <0x12 0xaaa3cd97 0x12 0x77fe2384 0x12 0xfbbee8cf 0x12 0xcc73453c>; | |
| phandle = <0x15a>; | |
| }; | |
| qcom,gdsc@185806c { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_vfe1"; | |
| reg = <0x185806c 0x04>; | |
| status = "okay"; | |
| clock-names = "core_clk\0bus_clk\0micro_clk\0csi_clk"; | |
| clocks = <0x12 0xcaf20d99 0x12 0xaf7463b3 0x12 0xfbbee8cf 0x12 0xb1ef6e8b>; | |
| phandle = <0x15b>; | |
| }; | |
| qcom,gdsc@1858078 { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_cpp"; | |
| reg = <0x1858078 0x04>; | |
| status = "okay"; | |
| clock-names = "core_clk\0bus_clk"; | |
| clocks = <0x12 0x7118a0de 0x12 0xbbf73861>; | |
| phandle = <0x15e>; | |
| }; | |
| qcom,gdsc@185901c { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_oxili_gx"; | |
| reg = <0x185901c 0x04>; | |
| status = "okay"; | |
| clock-names = "core_root_clk"; | |
| clocks = <0xa4 0x917f76ef>; | |
| qcom,force-enable-root-clk; | |
| parent-supply = <0x124>; | |
| phandle = <0xac>; | |
| }; | |
| qcom,gdsc@184c028 { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_venus_core0"; | |
| reg = <0x184c028 0x04>; | |
| status = "okay"; | |
| qcom,support-hw-trigger; | |
| clock-names = "core0_clk"; | |
| clocks = <0x12 0x83a7f549>; | |
| phandle = <0xa7>; | |
| }; | |
| qcom,gdsc@184c030 { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_venus_core1"; | |
| reg = <0x184c030 0x04>; | |
| status = "disabled"; | |
| phandle = <0x2ca>; | |
| }; | |
| qcom,gdsc@185904c { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_oxili_cx"; | |
| reg = <0x185904c 0x04>; | |
| status = "okay"; | |
| clock-names = "core_clk"; | |
| clocks = <0xa4 0x49a51fd9>; | |
| phandle = <0xa3>; | |
| }; | |
| qcom,gdsc@183f078 { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_usb30"; | |
| reg = <0x183f078 0x04>; | |
| status = "okay"; | |
| phandle = <0x139>; | |
| }; | |
| qmi-tmd-devices { | |
| compatible = "qcom,qmi_cooling_devices"; | |
| modem { | |
| qcom,instance-id = <0x00>; | |
| modem_pa { | |
| qcom,qmi-dev-name = "pa"; | |
| #cooling-cells = <0x02>; | |
| phandle = <0xdc>; | |
| }; | |
| modem_proc { | |
| qcom,qmi-dev-name = "modem"; | |
| #cooling-cells = <0x02>; | |
| phandle = <0xdf>; | |
| }; | |
| modem_current { | |
| qcom,qmi-dev-name = "modem_current"; | |
| #cooling-cells = <0x02>; | |
| phandle = <0x2cb>; | |
| }; | |
| modem_vdd { | |
| qcom,qmi-dev-name = "cpuv_restriction_cold"; | |
| #cooling-cells = <0x02>; | |
| phandle = <0xd1>; | |
| }; | |
| }; | |
| }; | |
| qcom,msm-cam@1b00000 { | |
| compatible = "qcom,msm-cam"; | |
| reg = <0x1b00000 0x40000>; | |
| reg-names = "msm-cam"; | |
| status = "ok"; | |
| bus-vectors = "suspend\0svs\0nominal\0turbo"; | |
| qcom,bus-votes = <0x00 0x1312d000 0x2625a000 0x2625a000>; | |
| }; | |
| qcom,csiphy@1b34000 { | |
| status = "ok"; | |
| cell-index = <0x00>; | |
| compatible = "qcom,csiphy-v3.5\0qcom,csiphy"; | |
| reg = <0x1b34000 0x1000 0x1b00030 0x04>; | |
| reg-names = "csiphy\0csiphy_clk_mux"; | |
| interrupts = <0x00 0x4e 0x00>; | |
| interrupt-names = "csiphy"; | |
| clocks = <0x12 0x4e814a78 0x12 0x3c0a858f 0x12 0xc8a309be 0x12 0xf8897589 0x12 0xf92304fb 0x12 0x9894b414>; | |
| clock-names = "camss_top_ahb_clk\0ispif_ahb_clk\0csiphy_timer_src_clk\0csiphy_timer_clk\0camss_ahb_src\0camss_ahb_clk"; | |
| qcom,clock-rates = <0x00 0x3ab06a0 0xbebc200 0x00 0x00 0x00>; | |
| }; | |
| qcom,csiphy@1b35000 { | |
| status = "ok"; | |
| cell-index = <0x01>; | |
| compatible = "qcom,csiphy-v3.5\0qcom,csiphy"; | |
| reg = <0x1b35000 0x1000 0x1b00038 0x04>; | |
| reg-names = "csiphy\0csiphy_clk_mux"; | |
| interrupts = <0x00 0x4f 0x00>; | |
| interrupt-names = "csiphy"; | |
| clocks = <0x12 0x4e814a78 0x12 0x3c0a858f 0x12 0x7c0fe23a 0x12 0x4d26438f 0x12 0xf92304fb 0x12 0x9894b414>; | |
| clock-names = "camss_top_ahb_clk\0ispif_ahb_clk\0csiphy_timer_src_clk\0csiphy_timer_clk\0camss_ahb_src\0camss_ahb_clk"; | |
| qcom,clock-rates = <0x00 0x3ab06a0 0xbebc200 0x00 0x00 0x00>; | |
| }; | |
| qcom,csiphy@1b36000 { | |
| status = "ok"; | |
| cell-index = <0x02>; | |
| compatible = "qcom,csiphy-v3.5\0qcom,csiphy"; | |
| reg = <0x1b36000 0x1000 0x1b00040 0x04>; | |
| reg-names = "csiphy\0csiphy_clk_mux"; | |
| interrupts = <0x00 0x13b 0x00>; | |
| interrupt-names = "csiphy"; | |
| clocks = <0x12 0x4e814a78 0x12 0x3c0a858f 0x12 0x62ffea9c 0x12 0xe768898c 0x12 0xf92304fb 0x12 0x9894b414>; | |
| clock-names = "camss_top_ahb_clk\0ispif_ahb_clk\0csiphy_timer_src_clk\0csiphy_timer_clk\0camss_ahb_src\0camss_ahb_clk"; | |
| qcom,clock-rates = <0x00 0x3ab06a0 0xbebc200 0x00 0x00 0x00>; | |
| }; | |
| qcom,csid@1b30000 { | |
| status = "ok"; | |
| cell-index = <0x00>; | |
| compatible = "qcom,csid-v3.5.1\0qcom,csid"; | |
| reg = <0x1b30000 0x400>; | |
| reg-names = "csid"; | |
| interrupts = <0x00 0x33 0x00>; | |
| interrupt-names = "csid"; | |
| qcom,csi-vdd-voltage = <0x12b128>; | |
| qcom,mipi-csi-vdd-supply = <0xb1>; | |
| clocks = <0x12 0x4e814a78 0x12 0x3c0a858f 0x12 0x175d672a 0x12 0x227e65bc 0x12 0x6a41ff7 0x12 0x6b01b3e1 0x12 0x61a8a930 0x12 0x7053c7ae 0x12 0x9894b414>; | |
| clock-names = "camss_top_ahb_clk\0ispif_ahb_clk\0csi_ahb_clk\0csi_src_clk\0csi0_phy_clk\0csi_clk\0csi_pix_clk\0csi_rdi_clk\0camss_ahb_clk"; | |
| qcom,clock-rates = <0x00 0x3ab06a0 0x00 0xbebc200 0x00 0x00 0x00 0x00 0x00>; | |
| }; | |
| qcom,csid@1b30400 { | |
| status = "ok"; | |
| cell-index = <0x01>; | |
| compatible = "qcom,csid-v3.5.1\0qcom,csid"; | |
| reg = <0x1b30400 0x400>; | |
| reg-names = "csid"; | |
| interrupts = <0x00 0x34 0x00>; | |
| interrupt-names = "csid"; | |
| qcom,csi-vdd-voltage = <0x12b128>; | |
| qcom,mipi-csi-vdd-supply = <0xb1>; | |
| clocks = <0x12 0x4e814a78 0x12 0x3c0a858f 0x12 0x2c2dc261 0x12 0x6a2a6c36 0x12 0xfd1d1fa 0x12 0x1aba4a8c 0x12 0x87fc98d8 0x12 0x6ac996fe 0x12 0x9894b414>; | |
| clock-names = "camss_top_ahb_clk\0ispif_ahb_clk\0csi_ahb_clk\0csi_src_clk\0csi1_phy_clk\0csi_clk\0csi_pix_clk\0csi_rdi_clk\0camss_ahb_clk"; | |
| qcom,clock-rates = <0x00 0x3ab06a0 0x00 0xbebc200 0x00 0x00 0x00 0x00 0x00>; | |
| }; | |
| qcom,csid@1b30800 { | |
| status = "ok"; | |
| cell-index = <0x02>; | |
| compatible = "qcom,csid-v3.5.1\0qcom,csid"; | |
| reg = <0x1b30800 0x400>; | |
| reg-names = "csid"; | |
| interrupts = <0x00 0x99 0x00>; | |
| interrupt-names = "csid"; | |
| qcom,csi-vdd-voltage = <0x12b128>; | |
| qcom,mipi-csi-vdd-supply = <0xb1>; | |
| clocks = <0x12 0x4e814a78 0x12 0x3c0a858f 0x12 0xf3f25940 0x12 0x4113589f 0x12 0xbeeffbcd 0x12 0xb6857fa2 0x12 0xa619561a 0x12 0x19fd3f1 0x12 0x9894b414>; | |
| clock-names = "camss_top_ahb_clk\0ispif_ahb_clk\0csi_ahb_clk\0csi_src_clk\0csi2_phy_clk\0csi_clk\0csi_pix_clk\0csi_rdi_clk\0camss_ahb_clk"; | |
| qcom,clock-rates = <0x00 0x3ab06a0 0x00 0xbebc200 0x00 0x00 0x00 0x00 0x00>; | |
| }; | |
| qcom,ispif@1b31000 { | |
| cell-index = <0x00>; | |
| compatible = "qcom,ispif-v3.0\0qcom,ispif"; | |
| reg = <0x1b31000 0x500 0x1b00020 0x10>; | |
| reg-names = "ispif\0csi_clk_mux"; | |
| interrupts = <0x00 0x37 0x00>; | |
| interrupt-names = "ispif"; | |
| qcom,num-isps = <0x02>; | |
| vfe0-vdd-supply = <0x15a>; | |
| vfe1-vdd-supply = <0x15b>; | |
| qcom,vdd-names = "vfe0-vdd\0vfe1-vdd"; | |
| clocks = <0x12 0x3c0a858f 0x12 0x9894b414 0x12 0x4e814a78 0x12 0xf92304fb 0x12 0x227e65bc 0x12 0x6b01b3e1 0x12 0x7053c7ae 0x12 0x61a8a930 0x12 0x6a2a6c36 0x12 0x1aba4a8c 0x12 0x6ac996fe 0x12 0x87fc98d8 0x12 0x4113589f 0x12 0xb6857fa2 0x12 0x19fd3f1 0x12 0xa619561a 0x12 0xa0c2bd8f 0x12 0xaaa3cd97 0x12 0xcc73453c 0x12 0x4e357366 0x12 0xcaf20d99 0x12 0xb1ef6e8b>; | |
| clock-names = "ispif_ahb_clk\0camss_ahb_clk\0camss_top_ahb_clk\0camss_ahb_src\0csi0_src_clk\0csi0_clk\0csi0_rdi_clk\0csi0_pix_clk\0csi1_src_clk\0csi1_clk\0csi1_rdi_clk\0csi1_pix_clk\0csi2_src_clk\0csi2_clk\0csi2_rdi_clk\0csi2_pix_clk\0vfe0_clk_src\0camss_vfe_vfe0_clk\0camss_csi_vfe0_clk\0vfe1_clk_src\0camss_vfe_vfe1_clk\0camss_csi_vfe1_clk"; | |
| qcom,clock-rates = <0x3ab06a0 0x00 0x00 0x00 0xbebc200 0x00 0x00 0x00 0xbebc200 0x00 0x00 0x00 0xbebc200 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>; | |
| qcom,clock-cntl-support; | |
| qcom,clock-control = "SET_RATE\0NO_SET_RATE\0NO_SET_RATE\0NO_SET_RATE\0SET_RATE\0NO_SET_RATE\0NO_SET_RATE\0NO_SET_RATE\0SET_RATE\0NO_SET_RATE\0NO_SET_RATE\0NO_SET_RATE\0SET_RATE\0NO_SET_RATE\0NO_SET_RATE\0NO_SET_RATE\0INIT_RATE\0NO_SET_RATE\0NO_SET_RATE\0INIT_RATE\0NO_SET_RATE\0NO_SET_RATE"; | |
| }; | |
| qcom,vfe0@1b10000 { | |
| cell-index = <0x00>; | |
| compatible = "qcom,vfe40"; | |
| reg = <0x1b10000 0x1000 0x1b40000 0x200>; | |
| reg-names = "vfe\0vfe_vbif"; | |
| interrupts = <0x00 0x39 0x00>; | |
| interrupt-names = "vfe"; | |
| vdd-supply = <0x15a>; | |
| clocks = <0x12 0x4e814a78 0x12 0x9894b414 0x12 0xa0c2bd8f 0x12 0xaaa3cd97 0x12 0xcc73453c 0x12 0x4050f47a 0x12 0x77fe2384 0x12 0x3c0a858f>; | |
| clock-names = "camss_top_ahb_clk\0camss_ahb_clk\0vfe_clk_src\0camss_vfe_vfe_clk\0camss_csi_vfe_clk\0iface_clk\0bus_clk\0iface_ahb_clk"; | |
| qcom,clock-rates = <0x00 0x00 0xfe50fb0 0x00 0x00 0x00 0x00 0x00>; | |
| qos-entries = <0x08>; | |
| qos-regs = <0x2c4 0x2c8 0x2cc 0x2d0 0x2d4 0x2d8 0x2dc 0x2e0>; | |
| qos-settings = <0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55>; | |
| vbif-entries = <0x01>; | |
| vbif-regs = <0x124>; | |
| vbif-settings = <0x03>; | |
| ds-entries = <0x11>; | |
| ds-regs = <0x988 0x98c 0x990 0x994 0x998 0x99c 0x9a0 0x9a4 0x9a8 0x9ac 0x9b0 0x9b4 0x9b8 0x9bc 0x9c0 0x9c4 0x9c8>; | |
| ds-settings = <0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0x110>; | |
| max-clk-nominal = <0x1bb75640>; | |
| max-clk-turbo = <0x1bb75640>; | |
| phandle = <0x2cc>; | |
| }; | |
| qcom,vfe1@1b14000 { | |
| cell-index = <0x01>; | |
| compatible = "qcom,vfe40"; | |
| reg = <0x1b14000 0x1000 0x1ba0000 0x200>; | |
| reg-names = "vfe\0vfe_vbif"; | |
| interrupts = <0x00 0x1d 0x00>; | |
| interrupt-names = "vfe"; | |
| vdd-supply = <0x15b>; | |
| clocks = <0x12 0x4e814a78 0x12 0x9894b414 0x12 0x4e357366 0x12 0xcaf20d99 0x12 0xb1ef6e8b 0x12 0x634a738a 0x12 0xaf7463b3 0x12 0x3c0a858f>; | |
| clock-names = "camss_top_ahb_clk\0camss_ahb_clk\0vfe_clk_src\0camss_vfe_vfe_clk\0camss_csi_vfe_clk\0iface_clk\0bus_clk\0iface_ahb_clk"; | |
| qcom,clock-rates = <0x00 0x00 0xfe50fb0 0x00 0x00 0x00 0x00 0x00>; | |
| qos-entries = <0x08>; | |
| qos-regs = <0x2c4 0x2c8 0x2cc 0x2d0 0x2d4 0x2d8 0x2dc 0x2e0>; | |
| qos-settings = <0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55>; | |
| vbif-entries = <0x01>; | |
| vbif-regs = <0x124>; | |
| vbif-settings = <0x03>; | |
| ds-entries = <0x11>; | |
| ds-regs = <0x988 0x98c 0x990 0x994 0x998 0x99c 0x9a0 0x9a4 0x9a8 0x9ac 0x9b0 0x9b4 0x9b8 0x9bc 0x9c0 0x9c4 0x9c8>; | |
| ds-settings = <0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0x110>; | |
| max-clk-nominal = <0x1bb75640>; | |
| max-clk-turbo = <0x1bb75640>; | |
| phandle = <0x2cd>; | |
| }; | |
| qcom,adsp { | |
| status = "disabled"; | |
| compatible = "adsp-shmem-device"; | |
| memory-region = <0x15c>; | |
| }; | |
| qcom,vfe { | |
| compatible = "qcom,vfe"; | |
| num_child = <0x02>; | |
| }; | |
| qcom,cam_smmu { | |
| status = "ok"; | |
| compatible = "qcom,msm-cam-smmu"; | |
| msm_cam_smmu_cb1 { | |
| compatible = "qcom,msm-cam-smmu-cb"; | |
| iommus = <0xa8 0x400 0x00 0xa8 0x2800 0x00>; | |
| label = "vfe"; | |
| qcom,scratch-buf-support; | |
| phandle = <0x2ce>; | |
| }; | |
| msm_cam_smmu_cb3 { | |
| compatible = "qcom,msm-cam-smmu-cb"; | |
| iommus = <0xa8 0x1c00 0x00>; | |
| label = "cpp"; | |
| phandle = <0x2cf>; | |
| }; | |
| msm_cam_smmu_cb4 { | |
| compatible = "qcom,msm-cam-smmu-cb"; | |
| iommus = <0xa8 0x1800 0x00>; | |
| label = "jpeg_enc0"; | |
| phandle = <0x2d0>; | |
| }; | |
| }; | |
| qcom,jpeg@1b1c000 { | |
| status = "ok"; | |
| cell-index = <0x00>; | |
| compatible = "qcom,jpeg"; | |
| reg = <0x1b1c000 0x400 0x1b60000 0xc30>; | |
| reg-names = "jpeg_hw\0jpeg_vbif"; | |
| interrupts = <0x00 0x3b 0x00>; | |
| interrupt-names = "jpeg"; | |
| vdd-supply = <0x15d>; | |
| qcom,vdd-names = "vdd"; | |
| clock-names = "core_clk\0iface_clk\0bus_clk0\0camss_top_ahb_clk\0camss_ahb_clk"; | |
| clocks = <0x12 0x1ed3f032 0x12 0x3bfa7603 0x12 0x3e278896 0x12 0x4e814a78 0x12 0x9894b414>; | |
| qcom,clock-rates = <0xfe50fb0 0x00 0x00 0x00 0x00>; | |
| qcom,qos-reg-settings = <0x28 0x555e 0xc8 0x5555>; | |
| qcom,vbif-reg-settings = <0xc0 0x10101000 0xb0 0x10100010>; | |
| qcom,msm-bus,name = "msm_camera_jpeg0"; | |
| qcom,msm-bus,num-cases = <0x02>; | |
| qcom,msm-bus,num-paths = <0x01>; | |
| qcom,msm-bus,vectors-KBps = <0x3e 0x200 0x00 0x00 0x3e 0x200 0xc3500 0xc3500>; | |
| }; | |
| qcom,irqrouter@1b00000 { | |
| status = "ok"; | |
| cell-index = <0x00>; | |
| compatible = "qcom,irqrouter"; | |
| reg = <0x1b00000 0x100>; | |
| reg-names = "irqrouter"; | |
| }; | |
| qcom,cpp@1b04000 { | |
| status = "ok"; | |
| cell-index = <0x00>; | |
| compatible = "qcom,cpp"; | |
| reg = <0x1b04000 0x100 0x1b80000 0x200 0x1b18000 0x18 0x1858078 0x04>; | |
| reg-names = "cpp\0cpp_vbif\0cpp_hw\0camss_cpp"; | |
| interrupts = <0x00 0x31 0x00>; | |
| interrupt-names = "cpp"; | |
| vdd-supply = <0x15e>; | |
| qcom,vdd-names = "vdd"; | |
| clocks = <0x12 0xf92304fb 0x12 0x4e814a78 0x12 0x8382f56d 0x12 0x4ac95e14 0x12 0xbbf73861 0x12 0x7118a0de 0x12 0xfbbee8cf 0x12 0x9894b414>; | |
| clock-names = "camss_ahb_src\0camss_top_ahb_clk\0cpp_core_clk\0camss_vfe_cpp_ahb_clk\0camss_vfe_cpp_axi_clk\0camss_vfe_cpp_clk\0micro_iface_clk\0camss_ahb_clk"; | |
| qcom,clock-rates = <0x4c4b400 0x00 0xaba9500 0x00 0x00 0xaba9500 0x00 0x00>; | |
| qcom,min-clock-rate = <0x5f5e100>; | |
| qcom,bus-master = <0x01>; | |
| resets = <0x12 0x04>; | |
| reset-names = "micro_iface_reset"; | |
| qcom,msm-bus,name = "msm_camera_cpp"; | |
| qcom,msm-bus,num-cases = <0x02>; | |
| qcom,msm-bus,num-paths = <0x01>; | |
| qcom,msm-bus,vectors-KBps = <0x6a 0x200 0x00 0x00 0x6a 0x200 0x00 0x00>; | |
| qcom,msm-bus-vector-dyn-vote; | |
| qcom,micro-reset; | |
| qcom,cpp-fw-payload-info { | |
| qcom,stripe-base = <0x9c>; | |
| qcom,plane-base = <0x8d>; | |
| qcom,stripe-size = <0x1b>; | |
| qcom,plane-size = <0x05>; | |
| qcom,fe-ptr-off = <0x05>; | |
| qcom,we-ptr-off = <0x0b>; | |
| }; | |
| }; | |
| qcom,cci@1b0c000 { | |
| status = "ok"; | |
| cell-index = <0x00>; | |
| compatible = "qcom,cci"; | |
| reg = <0x1b0c000 0x4000>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg-names = "cci"; | |
| interrupts = <0x00 0x32 0x00>; | |
| interrupt-names = "cci"; | |
| clocks = <0x12 0x3c0a858f 0x12 0x822f3d97 0x12 0xa81c11ba 0x12 0xb7dd8824 0x12 0x9894b414 0x12 0x4e814a78>; | |
| clock-names = "ispif_ahb_clk\0cci_src_clk\0cci_ahb_clk\0camss_cci_clk\0camss_ahb_clk\0camss_top_ahb_clk"; | |
| qcom,clock-rates = <0x3ab06a0 0x124f800 0x00 0x00 0x00 0x00 0x3ab06a0 0x23c3460 0x00 0x00 0x00 0x00>; | |
| pinctrl-names = "cci_default\0cci_suspend"; | |
| pinctrl-0 = <0x15f 0x160>; | |
| pinctrl-1 = <0x161 0x162>; | |
| gpios = <0xf4 0x1d 0x00 0xf4 0x1e 0x00 0xf4 0x1f 0x00 0xf4 0x20 0x00>; | |
| qcom,gpio-tbl-num = <0x00 0x01 0x02 0x03>; | |
| qcom,gpio-tbl-flags = <0x01 0x01 0x01 0x01>; | |
| qcom,gpio-tbl-label = "CCI_I2C_DATA0\0CCI_I2C_CLK0\0CCI_I2C_DATA1\0CCI_I2C_CLK1"; | |
| phandle = <0x2d1>; | |
| qcom,i2c_standard_mode { | |
| status = "disabled"; | |
| qcom,hw-thigh = <0x4e>; | |
| qcom,hw-tlow = <0x72>; | |
| qcom,hw-tsu-sto = <0x1c>; | |
| qcom,hw-tsu-sta = <0x1c>; | |
| qcom,hw-thd-dat = <0x0a>; | |
| qcom,hw-thd-sta = <0x4d>; | |
| qcom,hw-tbuf = <0x76>; | |
| qcom,hw-scl-stretch-en = <0x00>; | |
| qcom,hw-trdhld = <0x06>; | |
| qcom,hw-tsp = <0x01>; | |
| phandle = <0x2d2>; | |
| }; | |
| qcom,i2c_fast_mode { | |
| status = "ok"; | |
| qcom,hw-thigh = <0x14>; | |
| qcom,hw-tlow = <0x1c>; | |
| qcom,hw-tsu-sto = <0x15>; | |
| qcom,hw-tsu-sta = <0x15>; | |
| qcom,hw-thd-dat = <0x0d>; | |
| qcom,hw-thd-sta = <0x12>; | |
| qcom,hw-tbuf = <0x20>; | |
| qcom,hw-scl-stretch-en = <0x00>; | |
| qcom,hw-trdhld = <0x06>; | |
| qcom,hw-tsp = <0x03>; | |
| phandle = <0x2d3>; | |
| }; | |
| qcom,i2c_custom_mode { | |
| status = "ok"; | |
| qcom,hw-thigh = <0x0f>; | |
| qcom,hw-tlow = <0x1c>; | |
| qcom,hw-tsu-sto = <0x15>; | |
| qcom,hw-tsu-sta = <0x15>; | |
| qcom,hw-thd-dat = <0x0d>; | |
| qcom,hw-thd-sta = <0x12>; | |
| qcom,hw-tbuf = <0x19>; | |
| qcom,hw-scl-stretch-en = <0x01>; | |
| qcom,hw-trdhld = <0x06>; | |
| qcom,hw-tsp = <0x03>; | |
| phandle = <0x2d4>; | |
| }; | |
| qcom,i2c_fast_plus_mode { | |
| status = "ok"; | |
| qcom,hw-thigh = <0x10>; | |
| qcom,hw-tlow = <0x16>; | |
| qcom,hw-tsu-sto = <0x11>; | |
| qcom,hw-tsu-sta = <0x12>; | |
| qcom,hw-thd-dat = <0x10>; | |
| qcom,hw-thd-sta = <0x0f>; | |
| qcom,hw-tbuf = <0x13>; | |
| qcom,hw-scl-stretch-en = <0x01>; | |
| qcom,hw-trdhld = <0x03>; | |
| qcom,hw-tsp = <0x03>; | |
| qcom,cci-clk-src = <0x23c3460>; | |
| phandle = <0x2d5>; | |
| }; | |
| qcom,actuator@0 { | |
| cell-index = <0x00>; | |
| reg = <0x00>; | |
| compatible = "qcom,actuator"; | |
| qcom,cci-master = <0x00>; | |
| cam_vaf-supply = <0xb6>; | |
| qcom,cam-vreg-name = "cam_vaf"; | |
| qcom,cam-vreg-min-voltage = <0x2b7cd0>; | |
| qcom,cam-vreg-max-voltage = <0x2b7cd0>; | |
| qcom,cam-vreg-op-mode = <0x13880>; | |
| phandle = <0x300>; | |
| }; | |
| qcom,actuator@1 { | |
| cell-index = <0x01>; | |
| reg = <0x01>; | |
| compatible = "qcom,actuator"; | |
| qcom,cci-master = <0x01>; | |
| cam_vaf-supply = <0xb6>; | |
| qcom,cam-vreg-name = "cam_vaf"; | |
| qcom,cam-vreg-min-voltage = <0x2b7cd0>; | |
| qcom,cam-vreg-max-voltage = <0x2b7cd0>; | |
| qcom,cam-vreg-op-mode = <0x13880>; | |
| phandle = <0x30b>; | |
| }; | |
| qcom,eeprom@0 { | |
| cell-index = <0x00>; | |
| reg = <0x00>; | |
| compatible = "qcom,eeprom"; | |
| qcom,slave-addr = <0xa2>; | |
| qcom,cci-master = <0x00>; | |
| qcom,num-blocks = <0x01>; | |
| qcom,page0 = <0x00 0x00 0x02 0x00 0x01 0x00>; | |
| qcom,poll0 = <0x00 0x00 0x02 0x00 0x01 0x00>; | |
| qcom,mem0 = <0x1bf6 0x00 0x02 0x00 0x01 0x00>; | |
| cam_vio-supply = <0xb7>; | |
| cam_vdig-supply = <0x1c5>; | |
| cam_vaf-supply = <0xb6>; | |
| qcom,cam-vreg-name = "cam_vio\0cam_vdig\0cam_vaf"; | |
| qcom,cam-vreg-min-voltage = <0x1b7740 0x11edd8 0x2b7cd0>; | |
| qcom,cam-vreg-max-voltage = <0x1b7740 0x11edd8 0x2b7cd0>; | |
| qcom,cam-vreg-op-mode = <0x00 0x19a28 0x186a0>; | |
| pinctrl-names = "cam_default\0cam_suspend"; | |
| pinctrl-0 = <0x1e4 0x1e6 0x1ea>; | |
| pinctrl-1 = <0x1e5 0x1e7 0x1eb>; | |
| gpios = <0xf4 0x1a 0x00 0xf4 0x28 0x00 0xf4 0x8a 0x00>; | |
| qcom,gpio-reset = <0x01>; | |
| qcom,gpio-vana = <0x02>; | |
| qcom,gpio-req-tbl-num = <0x00 0x01 0x02>; | |
| qcom,gpio-req-tbl-flags = <0x01 0x00 0x00>; | |
| qcom,gpio-req-tbl-label = "CAMIF_MCLK0\0CAM_RESET0\0CAM_VANA"; | |
| qcom,cam-power-seq-type = "sensor_vreg\0sensor_gpio\0sensor_vreg\0sensor_vreg\0sensor_gpio\0sensor_clk"; | |
| qcom,cam-power-seq-val = "cam_vio\0sensor_gpio_vana\0cam_vdig\0cam_vaf\0sensor_gpio_reset\0sensor_cam_mclk"; | |
| qcom,cam-power-seq-cfg-val = <0x01 0x01 0x01 0x01 0x01 0x16e3600>; | |
| qcom,cam-power-seq-delay = <0x01 0x01 0x01 0x05 0x0a 0x0a>; | |
| status = "ok"; | |
| clocks = <0x12 0x266b3853 0x12 0x80902deb>; | |
| clock-names = "cam_src_clk\0cam_clk"; | |
| qcom,clock-rates = <0x124f800 0x00>; | |
| phandle = <0x2fe>; | |
| }; | |
| qcom,eeprom@1 { | |
| cell-index = <0x01>; | |
| reg = <0x01>; | |
| compatible = "qcom,eeprom"; | |
| qcom,slave-addr = <0xa2>; | |
| qcom,cci-master = <0x00>; | |
| qcom,num-blocks = <0x01>; | |
| qcom,page0 = <0x00 0x00 0x02 0x00 0x01 0x00>; | |
| qcom,poll0 = <0x00 0x00 0x02 0x00 0x01 0x00>; | |
| qcom,mem0 = <0x1bf6 0x00 0x02 0x00 0x01 0x00>; | |
| cam_vio-supply = <0xb7>; | |
| cam_vdig-supply = <0x1c5>; | |
| cam_vaf-supply = <0xb6>; | |
| qcom,cam-vreg-name = "cam_vio\0cam_vdig\0cam_vaf"; | |
| qcom,cam-vreg-min-voltage = <0x1b7740 0x11edd8 0x2b7cd0>; | |
| qcom,cam-vreg-max-voltage = <0x1b7740 0x11edd8 0x2b7cd0>; | |
| qcom,cam-vreg-op-mode = <0x00 0x19a28 0x186a0>; | |
| pinctrl-names = "cam_default\0cam_suspend"; | |
| pinctrl-0 = <0x1e4 0x1e6 0x1ea>; | |
| pinctrl-1 = <0x1e5 0x1e7 0x1eb>; | |
| gpios = <0xf4 0x1a 0x00 0xf4 0x28 0x00 0xf4 0x8a 0x00>; | |
| qcom,gpio-reset = <0x01>; | |
| qcom,gpio-vana = <0x02>; | |
| qcom,gpio-req-tbl-num = <0x00 0x01 0x02>; | |
| qcom,gpio-req-tbl-flags = <0x01 0x00 0x00>; | |
| qcom,gpio-req-tbl-label = "CAMIF_MCLK0\0CAM_RESET0\0CAM_VANA"; | |
| qcom,cam-power-seq-type = "sensor_vreg\0sensor_gpio\0sensor_vreg\0sensor_vreg\0sensor_gpio\0sensor_clk"; | |
| qcom,cam-power-seq-val = "cam_vio\0sensor_gpio_vana\0cam_vdig\0cam_vaf\0sensor_gpio_reset\0sensor_cam_mclk"; | |
| qcom,cam-power-seq-cfg-val = <0x01 0x01 0x01 0x01 0x01 0x16e3600>; | |
| qcom,cam-power-seq-delay = <0x01 0x01 0x01 0x05 0x0a 0x0a>; | |
| status = "ok"; | |
| clocks = <0x12 0x266b3853 0x12 0x80902deb>; | |
| clock-names = "cam_src_clk\0cam_clk"; | |
| qcom,clock-rates = <0x124f800 0x00>; | |
| phandle = <0x2ff>; | |
| }; | |
| qcom,eeprom@2 { | |
| cell-index = <0x02>; | |
| reg = <0x02>; | |
| qcom,eeprom-name = "onc_ov02a10_ofilm_i"; | |
| compatible = "qcom,eeprom"; | |
| qcom,slave-addr = <0xa8>; | |
| qcom,num-blocks = <0x01>; | |
| qcom,page0 = <0x00 0x00 0x02 0x00 0x01 0x00>; | |
| qcom,poll0 = <0x00 0x00 0x02 0x00 0x01 0x00>; | |
| qcom,mem0 = <0x1bf6 0x00 0x02 0x00 0x01 0x00>; | |
| cam_vana-supply = <0x1cb>; | |
| cam_vio-supply = <0xb7>; | |
| qcom,cam-vreg-name = "cam_vana\0cam_vio"; | |
| qcom,cam-vreg-min-voltage = <0x2ab980 0x1b7740>; | |
| qcom,cam-vreg-max-voltage = <0x2ab980 0x1b7740>; | |
| qcom,cam-vreg-op-mode = <0x13880 0x186a0>; | |
| pinctrl-names = "cam_default\0cam_suspend"; | |
| pinctrl-0 = <0x1f0 0x1ee>; | |
| pinctrl-1 = <0x1f1 0x1ef>; | |
| gpios = <0xf4 0x1c 0x00 0xf4 0x83 0x00>; | |
| qcom,gpio-reset = <0x01>; | |
| qcom,gpio-req-tbl-num = <0x00 0x01>; | |
| qcom,gpio-req-tbl-flags = <0x01 0x00>; | |
| qcom,gpio-req-tbl-label = "CAMIF_MCLK1\0CAM_RESET1"; | |
| qcom,cam-power-seq-type = "sensor_vreg\0sensor_vreg\0sensor_gpio\0sensor_clk"; | |
| qcom,cam-power-seq-val = "cam_vio\0cam_vana\0sensor_gpio_reset\0sensor_cam_mclk"; | |
| qcom,cam-power-seq-cfg-val = <0x01 0x01 0x01 0x16e3600>; | |
| qcom,cam-power-seq-delay = <0x01 0x05 0x0a 0x0a>; | |
| qcom,cci-master = <0x01>; | |
| status = "ok"; | |
| clocks = <0x12 0x42545468 0x12 0x222f8fff>; | |
| clock-names = "cam_src_clk\0cam_clk"; | |
| qcom,clock-rates = <0x124f800 0x00>; | |
| phandle = <0x301>; | |
| }; | |
| qcom,eeprom@3 { | |
| cell-index = <0x03>; | |
| reg = <0x03>; | |
| qcom,eeprom-name = "onc_ov02a10_sunny_ii"; | |
| compatible = "qcom,eeprom"; | |
| qcom,slave-addr = <0xa8>; | |
| qcom,num-blocks = <0x01>; | |
| qcom,page0 = <0x00 0x00 0x02 0x00 0x01 0x00>; | |
| qcom,poll0 = <0x00 0x00 0x02 0x00 0x01 0x00>; | |
| qcom,mem0 = <0x1bf6 0x00 0x02 0x00 0x01 0x00>; | |
| cam_vana-supply = <0x1cb>; | |
| cam_vio-supply = <0xb7>; | |
| qcom,cam-vreg-name = "cam_vana\0cam_vio"; | |
| qcom,cam-vreg-min-voltage = <0x2ab980 0x1b7740>; | |
| qcom,cam-vreg-max-voltage = <0x2ab980 0x1b7740>; | |
| qcom,cam-vreg-op-mode = <0x13880 0x186a0>; | |
| pinctrl-names = "cam_default\0cam_suspend"; | |
| pinctrl-0 = <0x1f0 0x1ee>; | |
| pinctrl-1 = <0x1f1 0x1ef>; | |
| gpios = <0xf4 0x1c 0x00 0xf4 0x83 0x00>; | |
| qcom,gpio-reset = <0x01>; | |
| qcom,gpio-req-tbl-num = <0x00 0x01>; | |
| qcom,gpio-req-tbl-flags = <0x01 0x00>; | |
| qcom,gpio-req-tbl-label = "CAMIF_MCLK1\0CAM_RESET1"; | |
| qcom,cam-power-seq-type = "sensor_vreg\0sensor_vreg\0sensor_gpio\0sensor_clk"; | |
| qcom,cam-power-seq-val = "cam_vio\0cam_vana\0sensor_gpio_reset\0sensor_cam_mclk"; | |
| qcom,cam-power-seq-cfg-val = <0x01 0x01 0x01 0x16e3600>; | |
| qcom,cam-power-seq-delay = <0x01 0x05 0x0a 0x0a>; | |
| qcom,cci-master = <0x01>; | |
| status = "ok"; | |
| clocks = <0x12 0x42545468 0x12 0x222f8fff>; | |
| clock-names = "cam_src_clk\0cam_clk"; | |
| qcom,clock-rates = <0x124f800 0x00>; | |
| phandle = <0x302>; | |
| }; | |
| qcom,eeprom@4 { | |
| cell-index = <0x04>; | |
| compatible = "qcom,eeprom"; | |
| qcom,eeprom-name = "onc_s5k4h7_ofilm_i"; | |
| qcom,cci-master = <0x01>; | |
| reg = <0x04>; | |
| qcom,slave-addr = <0x5a>; | |
| qcom,num-blocks = <0x09>; | |
| qcom,page0 = <0x01 0x100 0x02 0x01 0x01 0x00>; | |
| qcom,poll0 = <0x00 0x00 0x02 0x00 0x01 0x00>; | |
| qcom,mem0 = <0x00 0x00 0x02 0x00 0x01 0x00>; | |
| qcom,page1 = <0x01 0xa02 0x02 0x15 0x01 0x00>; | |
| qcom,poll1 = <0x00 0x00 0x02 0x00 0x01 0x00>; | |
| qcom,mem1 = <0x00 0x00 0x02 0x00 0x01 0x00>; | |
| qcom,page2 = <0x01 0xa00 0x02 0x01 0x01 0x00>; | |
| qcom,poll2 = <0x00 0x00 0x02 0x00 0x01 0x00>; | |
| qcom,mem2 = <0x40 0xa04 0x02 0x00 0x01 0x00>; | |
| qcom,page3 = <0x01 0x100 0x02 0x01 0x01 0x00>; | |
| qcom,poll3 = <0x00 0x00 0x02 0x00 0x01 0x00>; | |
| qcom,mem3 = <0x00 0x00 0x02 0x00 0x01 0x00>; | |
| qcom,page4 = <0x01 0xa02 0x02 0x16 0x01 0x00>; | |
| qcom,poll4 = <0x00 0x00 0x02 0x00 0x01 0x00>; | |
| qcom,mem4 = <0x00 0x00 0x02 0x00 0x01 0x00>; | |
| qcom,page5 = <0x01 0xa00 0x02 0x01 0x01 0x00>; | |
| qcom,poll5 = <0x00 0x00 0x02 0x00 0x01 0x00>; | |
| qcom,mem5 = <0x40 0xa04 0x02 0x00 0x01 0x00>; | |
| qcom,page6 = <0x01 0x100 0x02 0x01 0x01 0x00>; | |
| qcom,poll6 = <0x00 0x00 0x02 0x00 0x01 0x00>; | |
| qcom,mem6 = <0x00 0x00 0x02 0x00 0x01 0x00>; | |
| qcom,page7 = <0x01 0xa02 0x02 0x00 0x01 0x00>; | |
| qcom,poll7 = <0x00 0x00 0x02 0x00 0x01 0x00>; | |
| qcom,mem7 = <0x00 0x00 0x02 0x00 0x01 0x00>; | |
| qcom,page8 = <0x01 0xa00 0x02 0x01 0x01 0x00>; | |
| qcom,poll8 = <0x00 0x00 0x02 0x00 0x01 0x00>; | |
| qcom,mem8 = <0x08 0xa04 0x02 0x00 0x01 0x00>; | |
| cam_vio-supply = <0xb7>; | |
| cam_vana-supply = <0x1cb>; | |
| qcom,cam-vreg-name = "cam_vio\0cam_vana"; | |
| qcom,cam-vreg-min-voltage = <0x1b7740 0x2ab980>; | |
| qcom,cam-vreg-max-voltage = <0x1b7740 0x2ab980>; | |
| qcom,cam-vreg-op-mode = <0x19a28 0x13880>; | |
| pinctrl-names = "cam_default\0cam_suspend"; | |
| pinctrl-0 = <0x1ec 0x1f2>; | |
| pinctrl-1 = <0x1ed 0x1f3>; | |
| gpios = <0xf4 0x1b 0x00 0xf4 0x81 0x00 0xf4 0x27 0x00 0xf4 0x89 0x00>; | |
| qcom,gpio-reset = <0x01>; | |
| qcom,gpio-vdig = <0x02>; | |
| qcom,gpio-vana = <0x03>; | |
| qcom,gpio-req-tbl-num = <0x00 0x01 0x02 0x03>; | |
| qcom,gpio-req-tbl-flags = <0x01 0x00 0x00 0x00>; | |
| qcom,gpio-req-tbl-label = "CAMIF_MCLK2\0CAM_RESET2\0CAM_VDIG2\0CAM_VANA2"; | |
| qcom,cam-power-seq-type = "sensor_vreg\0sensor_vreg\0sensor_gpio\0sensor_gpio\0sensor_gpio\0sensor_clk"; | |
| qcom,cam-power-seq-val = "cam_vio\0cam_vana\0sensor_gpio_vana\0sensor_gpio_vdig\0sensor_gpio_reset\0sensor_cam_mclk"; | |
| qcom,cam-power-seq-cfg-val = <0x01 0x01 0x01 0x01 0x01 0x16e3600>; | |
| qcom,cam-power-seq-delay = <0x01 0x01 0x01 0x01 0x05 0x0a>; | |
| status = "ok"; | |
| clocks = <0x12 0xa73cad0c 0x12 0x5002d85f>; | |
| clock-names = "cam_src_clk\0cam_clk"; | |
| qcom,clock-rates = <0x124f800 0x00>; | |
| phandle = <0x303>; | |
| }; | |
| qcom,eeprom@5 { | |
| cell-index = <0x05>; | |
| compatible = "qcom,eeprom"; | |
| qcom,eeprom-name = "onc_s5k4h7_sunny_ii"; | |
| qcom,cci-master = <0x01>; | |
| reg = <0x05>; | |
| qcom,slave-addr = <0x5a>; | |
| qcom,num-blocks = <0x09>; | |
| qcom,page0 = <0x01 0x100 0x02 0x01 0x01 0x00>; | |
| qcom,poll0 = <0x00 0x00 0x02 0x00 0x01 0x00>; | |
| qcom,mem0 = <0x00 0x00 0x02 0x00 0x01 0x00>; | |
| qcom,page1 = <0x01 0xa02 0x02 0x15 0x01 0x00>; | |
| qcom,poll1 = <0x00 0x00 0x02 0x00 0x01 0x00>; | |
| qcom,mem1 = <0x00 0x00 0x02 0x00 0x01 0x00>; | |
| qcom,page2 = <0x01 0xa00 0x02 0x01 0x01 0x00>; | |
| qcom,poll2 = <0x00 0x00 0x02 0x00 0x01 0x00>; | |
| qcom,mem2 = <0x40 0xa04 0x02 0x00 0x01 0x00>; | |
| qcom,page3 = <0x01 0x100 0x02 0x01 0x01 0x00>; | |
| qcom,poll3 = <0x00 0x00 0x02 0x00 0x01 0x00>; | |
| qcom,mem3 = <0x00 0x00 0x02 0x00 0x01 0x00>; | |
| qcom,page4 = <0x01 0xa02 0x02 0x16 0x01 0x00>; | |
| qcom,poll4 = <0x00 0x00 0x02 0x00 0x01 0x00>; | |
| qcom,mem4 = <0x00 0x00 0x02 0x00 0x01 0x00>; | |
| qcom,page5 = <0x01 0xa00 0x02 0x01 0x01 0x00>; | |
| qcom,poll5 = <0x00 0x00 0x02 0x00 0x01 0x00>; | |
| qcom,mem5 = <0x40 0xa04 0x02 0x00 0x01 0x00>; | |
| qcom,page6 = <0x01 0x100 0x02 0x01 0x01 0x00>; | |
| qcom,poll6 = <0x00 0x00 0x02 0x00 0x01 0x00>; | |
| qcom,mem6 = <0x00 0x00 0x02 0x00 0x01 0x00>; | |
| qcom,page7 = <0x01 0xa02 0x02 0x00 0x01 0x00>; | |
| qcom,poll7 = <0x00 0x00 0x02 0x00 0x01 0x00>; | |
| qcom,mem7 = <0x00 0x00 0x02 0x00 0x01 0x00>; | |
| qcom,page8 = <0x01 0xa00 0x02 0x01 0x01 0x00>; | |
| qcom,poll8 = <0x00 0x00 0x02 0x00 0x01 0x00>; | |
| qcom,mem8 = <0x08 0xa04 0x02 0x00 0x01 0x00>; | |
| cam_vio-supply = <0xb7>; | |
| cam_vana-supply = <0x1cb>; | |
| qcom,cam-vreg-name = "cam_vio\0cam_vana"; | |
| qcom,cam-vreg-min-voltage = <0x1b7740 0x2ab980>; | |
| qcom,cam-vreg-max-voltage = <0x1b7740 0x2ab980>; | |
| qcom,cam-vreg-op-mode = <0x19a28 0x13880>; | |
| pinctrl-names = "cam_default\0cam_suspend"; | |
| pinctrl-0 = <0x1ec 0x1f2>; | |
| pinctrl-1 = <0x1ed 0x1f3>; | |
| gpios = <0xf4 0x1b 0x00 0xf4 0x81 0x00 0xf4 0x27 0x00 0xf4 0x89 0x00>; | |
| qcom,gpio-reset = <0x01>; | |
| qcom,gpio-vdig = <0x02>; | |
| qcom,gpio-vana = <0x03>; | |
| qcom,gpio-req-tbl-num = <0x00 0x01 0x02 0x03>; | |
| qcom,gpio-req-tbl-flags = <0x01 0x00 0x00 0x00>; | |
| qcom,gpio-req-tbl-label = "CAMIF_MCLK2\0CAM_RESET2\0CAM_VDIG2\0CAM_VANA2"; | |
| qcom,cam-power-seq-type = "sensor_vreg\0sensor_vreg\0sensor_gpio\0sensor_gpio\0sensor_gpio\0sensor_clk"; | |
| qcom,cam-power-seq-val = "cam_vio\0cam_vana\0sensor_gpio_vana\0sensor_gpio_vdig\0sensor_gpio_reset\0sensor_cam_mclk"; | |
| qcom,cam-power-seq-cfg-val = <0x01 0x01 0x01 0x01 0x01 0x16e3600>; | |
| qcom,cam-power-seq-delay = <0x01 0x01 0x01 0x01 0x05 0x0a>; | |
| status = "ok"; | |
| clocks = <0x12 0xa73cad0c 0x12 0x5002d85f>; | |
| clock-names = "cam_src_clk\0cam_clk"; | |
| qcom,clock-rates = <0x124f800 0x00>; | |
| phandle = <0x304>; | |
| }; | |
| qcom,eeprom@6 { | |
| cell-index = <0x06>; | |
| compatible = "qcom,eeprom"; | |
| qcom,cci-master = <0x01>; | |
| reg = <0x06>; | |
| qcom,slave-addr = <0xa4>; | |
| qcom,num-blocks = <0x01>; | |
| qcom,page0 = <0x00 0x00 0x02 0x00 0x01 0x00>; | |
| qcom,poll0 = <0x00 0x00 0x02 0x00 0x01 0x00>; | |
| qcom,mem0 = <0x1bf6 0x00 0x02 0x00 0x01 0x00>; | |
| cam_vio-supply = <0xb7>; | |
| cam_vana-supply = <0x1cb>; | |
| qcom,cam-vreg-name = "cam_vio\0cam_vana"; | |
| qcom,cam-vreg-min-voltage = <0x1b7740 0x2ab980>; | |
| qcom,cam-vreg-max-voltage = <0x1b7740 0x2ab980>; | |
| qcom,cam-vreg-op-mode = <0x19a28 0x13880>; | |
| pinctrl-names = "cam_default\0cam_suspend"; | |
| pinctrl-0 = <0x1ec 0x1f2>; | |
| pinctrl-1 = <0x1ed 0x1f3>; | |
| gpios = <0xf4 0x1b 0x00 0xf4 0x81 0x00 0xf4 0x27 0x00 0xf4 0x89 0x00>; | |
| qcom,gpio-reset = <0x01>; | |
| qcom,gpio-vdig = <0x02>; | |
| qcom,gpio-vana = <0x03>; | |
| qcom,gpio-req-tbl-num = <0x00 0x01 0x02 0x03>; | |
| qcom,gpio-req-tbl-flags = <0x01 0x00 0x00 0x00>; | |
| qcom,gpio-req-tbl-label = "CAMIF_MCLK2\0CAM_RESET2\0CAM_VDIG2\0CAM_VANA2"; | |
| qcom,cam-power-seq-type = "sensor_vreg\0sensor_vreg\0sensor_gpio\0sensor_gpio\0sensor_gpio\0sensor_clk"; | |
| qcom,cam-power-seq-val = "cam_vio\0cam_vana\0sensor_gpio_vana\0sensor_gpio_vdig\0sensor_gpio_reset\0sensor_cam_mclk"; | |
| qcom,cam-power-seq-cfg-val = <0x01 0x01 0x01 0x01 0x01 0x16e3600>; | |
| qcom,cam-power-seq-delay = <0x01 0x01 0x01 0x01 0x05 0x0a>; | |
| status = "ok"; | |
| clocks = <0x12 0xa73cad0c 0x12 0x5002d85f>; | |
| clock-names = "cam_src_clk\0cam_clk"; | |
| qcom,clock-rates = <0x124f800 0x00>; | |
| phandle = <0x305>; | |
| }; | |
| qcom,eeprom@7 { | |
| cell-index = <0x07>; | |
| compatible = "qcom,eeprom"; | |
| qcom,cci-master = <0x01>; | |
| reg = <0x07>; | |
| qcom,slave-addr = <0xa0>; | |
| qcom,num-blocks = <0x01>; | |
| qcom,page0 = <0x00 0x00 0x02 0x00 0x01 0x00>; | |
| qcom,poll0 = <0x00 0x00 0x02 0x00 0x01 0x00>; | |
| qcom,mem0 = <0x1bf6 0x00 0x02 0x00 0x01 0x00>; | |
| cam_vio-supply = <0xb7>; | |
| cam_vana-supply = <0x1cb>; | |
| qcom,cam-vreg-name = "cam_vio\0cam_vana"; | |
| qcom,cam-vreg-min-voltage = <0x1b7740 0x2ab980>; | |
| qcom,cam-vreg-max-voltage = <0x1b7740 0x2ab980>; | |
| qcom,cam-vreg-op-mode = <0x19a28 0x13880>; | |
| pinctrl-names = "cam_default\0cam_suspend"; | |
| pinctrl-0 = <0x1ec 0x1f2>; | |
| pinctrl-1 = <0x1ed 0x1f3>; | |
| gpios = <0xf4 0x1b 0x00 0xf4 0x81 0x00 0xf4 0x27 0x00 0xf4 0x89 0x00>; | |
| qcom,gpio-reset = <0x01>; | |
| qcom,gpio-vdig = <0x02>; | |
| qcom,gpio-vana = <0x03>; | |
| qcom,gpio-req-tbl-num = <0x00 0x01 0x02 0x03>; | |
| qcom,gpio-req-tbl-flags = <0x01 0x00 0x00 0x00>; | |
| qcom,gpio-req-tbl-label = "CAMIF_MCLK2\0CAM_RESET2\0CAM_VDIG2\0CAM_VANA2"; | |
| qcom,cam-power-seq-type = "sensor_vreg\0sensor_vreg\0sensor_gpio\0sensor_gpio\0sensor_gpio\0sensor_clk"; | |
| qcom,cam-power-seq-val = "cam_vio\0cam_vana\0sensor_gpio_vana\0sensor_gpio_vdig\0sensor_gpio_reset\0sensor_cam_mclk"; | |
| qcom,cam-power-seq-cfg-val = <0x01 0x01 0x01 0x01 0x01 0x16e3600>; | |
| qcom,cam-power-seq-delay = <0x01 0x01 0x01 0x01 0x05 0x0a>; | |
| status = "ok"; | |
| clocks = <0x12 0xa73cad0c 0x12 0x5002d85f>; | |
| clock-names = "cam_src_clk\0cam_clk"; | |
| qcom,clock-rates = <0x124f800 0x00>; | |
| phandle = <0x306>; | |
| }; | |
| qcom,camera@0 { | |
| cell-index = <0x00>; | |
| compatible = "qcom,camera"; | |
| reg = <0x00>; | |
| qcom,csiphy-sd-index = <0x00>; | |
| qcom,csid-sd-index = <0x00>; | |
| qcom,mount-angle = <0x10e>; | |
| qcom,led-flash-src = <0x2f9>; | |
| qcom,eeprom-src = <0x2fe 0x2ff>; | |
| qcom,actuator-src = <0x300>; | |
| cam_vio-supply = <0xb7>; | |
| cam_vdig-supply = <0x1c5>; | |
| cam_vaf-supply = <0xb6>; | |
| qcom,cam-vreg-name = "cam_vio\0cam_vdig\0cam_vaf"; | |
| qcom,cam-vreg-min-voltage = <0x1b7740 0x11edd8 0x2b7cd0>; | |
| qcom,cam-vreg-max-voltage = <0x1b7740 0x11edd8 0x2b7cd0>; | |
| qcom,cam-vreg-op-mode = <0x00 0x19a28 0x186a0>; | |
| pinctrl-names = "cam_default\0cam_suspend"; | |
| pinctrl-0 = <0x1e4 0x1e6 0x1ea>; | |
| pinctrl-1 = <0x1e5 0x1e7 0x1eb>; | |
| gpios = <0xf4 0x1a 0x00 0xf4 0x28 0x00 0xf4 0x8a 0x00>; | |
| qcom,gpio-reset = <0x01>; | |
| qcom,gpio-vana = <0x02>; | |
| qcom,gpio-req-tbl-num = <0x00 0x01 0x02>; | |
| qcom,gpio-req-tbl-flags = <0x01 0x00 0x00>; | |
| qcom,gpio-req-tbl-label = "CAMIF_MCLK0\0CAM_RESET0\0CAM_VANA"; | |
| qcom,sensor-position = <0x00>; | |
| qcom,sensor-mode = <0x00>; | |
| qcom,cci-master = <0x00>; | |
| status = "ok"; | |
| clocks = <0x12 0x266b3853 0x12 0x80902deb>; | |
| clock-names = "cam_src_clk\0cam_clk"; | |
| qcom,clock-rates = <0x16e3600 0x00>; | |
| phandle = <0x30c>; | |
| }; | |
| qcom,camera@1 { | |
| cell-index = <0x01>; | |
| compatible = "qcom,camera"; | |
| reg = <0x01>; | |
| qcom,csiphy-sd-index = <0x01>; | |
| qcom,csid-sd-index = <0x01>; | |
| qcom,mount-angle = <0x5a>; | |
| qcom,led-flash-src = <0x2f9>; | |
| qcom,eeprom-src = <0x301 0x302>; | |
| cam_vana-supply = <0x1cb>; | |
| cam_vio-supply = <0xb7>; | |
| qcom,cam-vreg-name = "cam_vana\0cam_vio"; | |
| qcom,cam-vreg-min-voltage = <0x2ab980 0x1b7740>; | |
| qcom,cam-vreg-max-voltage = <0x2ab980 0x1b7740>; | |
| qcom,cam-vreg-op-mode = <0x13880 0x186a0>; | |
| pinctrl-names = "cam_default\0cam_suspend"; | |
| pinctrl-0 = <0x1f0 0x1ee>; | |
| pinctrl-1 = <0x1f1 0x1ef>; | |
| gpios = <0xf4 0x1c 0x00 0xf4 0x83 0x00>; | |
| qcom,gpio-reset = <0x01>; | |
| qcom,gpio-req-tbl-num = <0x00 0x01>; | |
| qcom,gpio-req-tbl-flags = <0x01 0x00>; | |
| qcom,gpio-req-tbl-label = "CAMIF_MCLK1\0CAM_RESET1"; | |
| qcom,sensor-position = <0x100>; | |
| qcom,sensor-mode = <0x01>; | |
| qcom,cci-master = <0x01>; | |
| status = "ok"; | |
| clocks = <0x12 0x42545468 0x12 0x222f8fff>; | |
| clock-names = "cam_src_clk\0cam_clk"; | |
| qcom,clock-rates = <0x16e3600 0x00>; | |
| }; | |
| qcom,camera@2 { | |
| cell-index = <0x02>; | |
| compatible = "qcom,camera"; | |
| reg = <0x02>; | |
| qcom,csiphy-sd-index = <0x02>; | |
| qcom,csid-sd-index = <0x02>; | |
| qcom,mount-angle = <0x5a>; | |
| qcom,eeprom-src = <0x303 0x304 0x305 0x306>; | |
| cam_vio-supply = <0xb7>; | |
| cam_vana-supply = <0x1cb>; | |
| qcom,cam-vreg-name = "cam_vio\0cam_vana"; | |
| qcom,cam-vreg-min-voltage = <0x1b7740 0x2ab980>; | |
| qcom,cam-vreg-max-voltage = <0x1b7740 0x2ab980>; | |
| qcom,cam-vreg-op-mode = <0x19a28 0x13880>; | |
| qcom,gpio-no-mux = <0x00>; | |
| pinctrl-names = "cam_default\0cam_suspend"; | |
| pinctrl-0 = <0x1ec 0x1f2>; | |
| pinctrl-1 = <0x1ed 0x1f3>; | |
| gpios = <0xf4 0x1b 0x00 0xf4 0x81 0x00 0xf4 0x27 0x00 0xf4 0x89 0x00>; | |
| qcom,gpio-reset = <0x01>; | |
| qcom,gpio-vdig = <0x02>; | |
| qcom,gpio-vana = <0x03>; | |
| qcom,gpio-req-tbl-num = <0x00 0x01 0x02 0x03>; | |
| qcom,gpio-req-tbl-flags = <0x01 0x00 0x00 0x00>; | |
| qcom,gpio-req-tbl-label = "CAMIF_MCLK2\0CAM_RESET2\0CAM_VDIG2\0CAM_VANA2"; | |
| qcom,sensor-position = <0x01>; | |
| qcom,sensor-mode = <0x00>; | |
| qcom,cci-master = <0x01>; | |
| status = "ok"; | |
| clocks = <0x12 0xa73cad0c 0x12 0x5002d85f>; | |
| clock-names = "cam_src_clk\0cam_clk"; | |
| qcom,clock-rates = <0x124f800 0x00>; | |
| }; | |
| }; | |
| qcom,msm-pcm { | |
| compatible = "qcom,msm-pcm-dsp"; | |
| qcom,msm-pcm-dsp-id = <0x00>; | |
| phandle = <0x166>; | |
| }; | |
| qcom,msm-pcm-routing { | |
| compatible = "qcom,msm-pcm-routing"; | |
| phandle = <0x170>; | |
| }; | |
| qcom,msm-compr-dsp { | |
| compatible = "qcom,msm-compr-dsp"; | |
| phandle = <0x1a7>; | |
| }; | |
| qcom,msm-pcm-low-latency { | |
| compatible = "qcom,msm-pcm-dsp"; | |
| qcom,msm-pcm-dsp-id = <0x01>; | |
| qcom,msm-pcm-low-latency; | |
| qcom,latency-level = "regular"; | |
| phandle = <0x167>; | |
| }; | |
| qcom,msm-ultra-low-latency { | |
| compatible = "qcom,msm-pcm-dsp"; | |
| qcom,msm-pcm-dsp-id = <0x02>; | |
| qcom,msm-pcm-low-latency; | |
| qcom,latency-level = "ultra"; | |
| phandle = <0x168>; | |
| }; | |
| qcom,msm-pcm-dsp-noirq { | |
| compatible = "qcom,msm-pcm-dsp-noirq"; | |
| qcom,msm-pcm-low-latency; | |
| qcom,latency-level = "ultra"; | |
| phandle = <0x171>; | |
| }; | |
| qcom,msm-compress-dsp { | |
| compatible = "qcom,msm-compress-dsp"; | |
| phandle = <0x16c>; | |
| }; | |
| qcom,msm-voip-dsp { | |
| compatible = "qcom,msm-voip-dsp"; | |
| phandle = <0x169>; | |
| }; | |
| qcom,msm-pcm-voice { | |
| compatible = "qcom,msm-pcm-voice"; | |
| qcom,destroy-cvd; | |
| phandle = <0x16a>; | |
| }; | |
| qcom,msm-stub-codec { | |
| compatible = "qcom,msm-stub-codec"; | |
| phandle = <0x190>; | |
| }; | |
| qcom,msm-dai-fe { | |
| compatible = "qcom,msm-dai-fe"; | |
| }; | |
| qcom,msm-pcm-afe { | |
| compatible = "qcom,msm-pcm-afe"; | |
| phandle = <0x16e>; | |
| }; | |
| qcom,msm-dai-q6-hdmi { | |
| compatible = "qcom,msm-dai-q6-hdmi"; | |
| qcom,msm-dai-q6-dev-id = <0x08>; | |
| phandle = <0x2d6>; | |
| }; | |
| qcom,msm-dai-q6-dp { | |
| compatible = "qcom,msm-dai-q6-hdmi"; | |
| qcom,msm-dai-q6-dev-id = <0x6020>; | |
| phandle = <0x2d7>; | |
| }; | |
| qcom,msm-pcm-loopback { | |
| compatible = "qcom,msm-pcm-loopback"; | |
| phandle = <0x16b>; | |
| }; | |
| qcom,msm-dai-mi2s { | |
| compatible = "qcom,msm-dai-mi2s"; | |
| phandle = <0x2d8>; | |
| qcom,msm-dai-q6-mi2s-prim { | |
| compatible = "qcom,msm-dai-q6-mi2s"; | |
| qcom,msm-dai-q6-mi2s-dev-id = <0x00>; | |
| qcom,msm-mi2s-rx-lines = <0x03>; | |
| qcom,msm-mi2s-tx-lines = <0x00>; | |
| phandle = <0x173>; | |
| }; | |
| qcom,msm-dai-q6-mi2s-sec { | |
| compatible = "qcom,msm-dai-q6-mi2s"; | |
| qcom,msm-dai-q6-mi2s-dev-id = <0x01>; | |
| qcom,msm-mi2s-rx-lines = <0x01>; | |
| qcom,msm-mi2s-tx-lines = <0x00>; | |
| phandle = <0x174>; | |
| }; | |
| qcom,msm-dai-q6-mi2s-tert { | |
| compatible = "qcom,msm-dai-q6-mi2s"; | |
| qcom,msm-dai-q6-mi2s-dev-id = <0x02>; | |
| qcom,msm-mi2s-rx-lines = <0x00>; | |
| qcom,msm-mi2s-tx-lines = <0x03>; | |
| phandle = <0x175>; | |
| }; | |
| qcom,msm-dai-q6-mi2s-quat { | |
| compatible = "qcom,msm-dai-q6-mi2s"; | |
| qcom,msm-dai-q6-mi2s-dev-id = <0x03>; | |
| qcom,msm-mi2s-rx-lines = <0x01>; | |
| qcom,msm-mi2s-tx-lines = <0x02>; | |
| phandle = <0x176>; | |
| }; | |
| qcom,msm-dai-q6-mi2s-quin { | |
| compatible = "qcom,msm-dai-q6-mi2s"; | |
| qcom,msm-dai-q6-mi2s-dev-id = <0x04>; | |
| qcom,msm-mi2s-rx-lines = <0x01>; | |
| qcom,msm-mi2s-tx-lines = <0x02>; | |
| phandle = <0x177>; | |
| }; | |
| qcom,msm-dai-q6-mi2s-senary { | |
| compatible = "qcom,msm-dai-q6-mi2s"; | |
| qcom,msm-dai-q6-mi2s-dev-id = <0x06>; | |
| qcom,msm-mi2s-rx-lines = <0x00>; | |
| qcom,msm-mi2s-tx-lines = <0x03>; | |
| phandle = <0x178>; | |
| }; | |
| }; | |
| qcom,msm-lsm-client { | |
| compatible = "qcom,msm-lsm-client"; | |
| phandle = <0x16f>; | |
| }; | |
| qcom,msm-dai-q6 { | |
| compatible = "qcom,msm-dai-q6"; | |
| qcom,msm-dai-q6-sb-0-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x4000>; | |
| phandle = <0x179>; | |
| }; | |
| qcom,msm-dai-q6-sb-0-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x4001>; | |
| phandle = <0x17a>; | |
| }; | |
| qcom,msm-dai-q6-sb-1-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x4002>; | |
| phandle = <0x17b>; | |
| }; | |
| qcom,msm-dai-q6-sb-1-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x4003>; | |
| phandle = <0x17c>; | |
| }; | |
| qcom,msm-dai-q6-sb-2-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x4004>; | |
| phandle = <0x1a8>; | |
| }; | |
| qcom,msm-dai-q6-sb-2-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x4005>; | |
| phandle = <0x1a9>; | |
| }; | |
| qcom,msm-dai-q6-sb-3-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x4006>; | |
| phandle = <0x17d>; | |
| }; | |
| qcom,msm-dai-q6-sb-3-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x4007>; | |
| phandle = <0x17e>; | |
| }; | |
| qcom,msm-dai-q6-sb-4-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x4008>; | |
| phandle = <0x17f>; | |
| }; | |
| qcom,msm-dai-q6-sb-4-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x4009>; | |
| phandle = <0x180>; | |
| }; | |
| qcom,msm-dai-q6-sb-5-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x400b>; | |
| phandle = <0x1aa>; | |
| }; | |
| qcom,msm-dai-q6-sb-5-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x400a>; | |
| phandle = <0x1ab>; | |
| }; | |
| qcom,msm-dai-q6-sb-6-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x400c>; | |
| phandle = <0x1ac>; | |
| }; | |
| qcom,msm-dai-q6-sb-7-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x400e>; | |
| phandle = <0x2d9>; | |
| }; | |
| qcom,msm-dai-q6-sb-7-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x400f>; | |
| phandle = <0x2da>; | |
| }; | |
| qcom,msm-dai-q6-sb-8-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x4010>; | |
| phandle = <0x2db>; | |
| }; | |
| qcom,msm-dai-q6-sb-8-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x4011>; | |
| phandle = <0x2dc>; | |
| }; | |
| qcom,msm-dai-q6-bt-sco-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x3000>; | |
| phandle = <0x181>; | |
| }; | |
| qcom,msm-dai-q6-bt-sco-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x3001>; | |
| phandle = <0x182>; | |
| }; | |
| qcom,msm-dai-q6-int-fm-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x3004>; | |
| phandle = <0x183>; | |
| }; | |
| qcom,msm-dai-q6-int-fm-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x3005>; | |
| phandle = <0x184>; | |
| }; | |
| qcom,msm-dai-q6-be-afe-pcm-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0xe0>; | |
| phandle = <0x185>; | |
| }; | |
| qcom,msm-dai-q6-be-afe-pcm-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0xe1>; | |
| phandle = <0x186>; | |
| }; | |
| qcom,msm-dai-q6-afe-proxy-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0xf1>; | |
| phandle = <0x187>; | |
| }; | |
| qcom,msm-dai-q6-afe-proxy-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0xf0>; | |
| phandle = <0x188>; | |
| }; | |
| qcom,msm-dai-q6-afe-loopback-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x6001>; | |
| phandle = <0x18d>; | |
| }; | |
| qcom,msm-dai-q6-incall-record-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x8003>; | |
| phandle = <0x189>; | |
| }; | |
| qcom,msm-dai-q6-incall-record-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x8004>; | |
| phandle = <0x18a>; | |
| }; | |
| qcom,msm-dai-q6-incall-music-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x8005>; | |
| phandle = <0x18b>; | |
| }; | |
| qcom,msm-dai-q6-incall-music-2-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x8002>; | |
| phandle = <0x18c>; | |
| }; | |
| qcom,msm-dai-q6-proxy-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x2002>; | |
| phandle = <0x18e>; | |
| }; | |
| qcom,msm-dai-q6-proxy-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x2003>; | |
| phandle = <0x18f>; | |
| }; | |
| qcom,msm-dai-q6-usb-audio-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x7000>; | |
| phandle = <0x2dd>; | |
| }; | |
| qcom,msm-dai-q6-usb-audio-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x7001>; | |
| phandle = <0x2de>; | |
| }; | |
| }; | |
| qcom,msm-pcm-hostless { | |
| compatible = "qcom,msm-pcm-hostless"; | |
| phandle = <0x16d>; | |
| }; | |
| qcom,msm-audio-apr { | |
| compatible = "qcom,msm-audio-apr"; | |
| qcom,subsys-name = "apr_adsp"; | |
| phandle = <0x2df>; | |
| msm_audio_apr_dummy { | |
| compatible = "qcom,msm-audio-apr-dummy"; | |
| }; | |
| }; | |
| qcom,msm-pri-auxpcm { | |
| compatible = "qcom,msm-auxpcm-dev"; | |
| qcom,msm-cpudai-auxpcm-mode = <0x00 0x00>; | |
| qcom,msm-cpudai-auxpcm-sync = <0x01 0x01>; | |
| qcom,msm-cpudai-auxpcm-frame = <0x05 0x04>; | |
| qcom,msm-cpudai-auxpcm-quant = <0x02 0x02>; | |
| qcom,msm-cpudai-auxpcm-num-slots = <0x01 0x01>; | |
| qcom,msm-cpudai-auxpcm-slot-mapping = <0x01 0x01>; | |
| qcom,msm-cpudai-auxpcm-data = <0x00 0x00>; | |
| qcom,msm-cpudai-auxpcm-pcm-clk-rate = <0x1f4000 0x1f4000>; | |
| qcom,msm-auxpcm-interface = "primary"; | |
| qcom,msm-cpudai-afe-clk-ver = <0x02>; | |
| phandle = <0x172>; | |
| }; | |
| qcom,msm-sec-auxpcm { | |
| compatible = "qcom,msm-auxpcm-dev"; | |
| qcom,msm-cpudai-auxpcm-mode = <0x00 0x00>; | |
| qcom,msm-cpudai-auxpcm-sync = <0x01 0x01>; | |
| qcom,msm-cpudai-auxpcm-frame = <0x05 0x04>; | |
| qcom,msm-cpudai-auxpcm-quant = <0x02 0x02>; | |
| qcom,msm-cpudai-auxpcm-num-slots = <0x01 0x01>; | |
| qcom,msm-cpudai-auxpcm-slot-mapping = <0x01 0x01>; | |
| qcom,msm-cpudai-auxpcm-data = <0x00 0x00>; | |
| qcom,msm-cpudai-auxpcm-pcm-clk-rate = <0x1f4000 0x1f4000>; | |
| qcom,msm-auxpcm-interface = "secondary"; | |
| qcom,msm-cpudai-afe-clk-ver = <0x02>; | |
| phandle = <0x2e0>; | |
| }; | |
| qcom,msm-tert-auxpcm { | |
| compatible = "qcom,msm-auxpcm-dev"; | |
| qcom,msm-cpudai-auxpcm-mode = <0x00 0x00>; | |
| qcom,msm-cpudai-auxpcm-sync = <0x01 0x01>; | |
| qcom,msm-cpudai-auxpcm-frame = <0x05 0x04>; | |
| qcom,msm-cpudai-auxpcm-quant = <0x02 0x02>; | |
| qcom,msm-cpudai-auxpcm-num-slots = <0x01 0x01>; | |
| qcom,msm-cpudai-auxpcm-slot-mapping = <0x01 0x01>; | |
| qcom,msm-cpudai-auxpcm-data = <0x00 0x00>; | |
| qcom,msm-cpudai-auxpcm-pcm-clk-rate = <0x1f4000 0x1f4000>; | |
| qcom,msm-auxpcm-interface = "tertiary"; | |
| qcom,msm-cpudai-afe-clk-ver = <0x02>; | |
| phandle = <0x2e1>; | |
| }; | |
| qcom,msm-quat-auxpcm { | |
| compatible = "qcom,msm-auxpcm-dev"; | |
| qcom,msm-cpudai-auxpcm-mode = <0x00 0x00>; | |
| qcom,msm-cpudai-auxpcm-sync = <0x01 0x01>; | |
| qcom,msm-cpudai-auxpcm-frame = <0x05 0x04>; | |
| qcom,msm-cpudai-auxpcm-quant = <0x02 0x02>; | |
| qcom,msm-cpudai-auxpcm-num-slots = <0x01 0x01>; | |
| qcom,msm-cpudai-auxpcm-slot-mapping = <0x01 0x01>; | |
| qcom,msm-cpudai-auxpcm-data = <0x00 0x00>; | |
| qcom,msm-cpudai-auxpcm-pcm-clk-rate = <0x1f4000 0x1f4000>; | |
| qcom,msm-auxpcm-interface = "quaternary"; | |
| qcom,msm-cpudai-afe-clk-ver = <0x02>; | |
| phandle = <0x2e2>; | |
| }; | |
| qcom,msm-quin-auxpcm { | |
| compatible = "qcom,msm-auxpcm-dev"; | |
| qcom,msm-cpudai-auxpcm-mode = <0x00 0x00>; | |
| qcom,msm-cpudai-auxpcm-sync = <0x01 0x01>; | |
| qcom,msm-cpudai-auxpcm-frame = <0x05 0x04>; | |
| qcom,msm-cpudai-auxpcm-quant = <0x02 0x02>; | |
| qcom,msm-cpudai-auxpcm-num-slots = <0x01 0x01>; | |
| qcom,msm-cpudai-auxpcm-slot-mapping = <0x01 0x01>; | |
| qcom,msm-cpudai-auxpcm-data = <0x00 0x00>; | |
| qcom,msm-cpudai-auxpcm-pcm-clk-rate = <0x1f4000 0x1f4000>; | |
| qcom,msm-auxpcm-interface = "quinary"; | |
| qcom,msm-cpudai-afe-clk-ver = <0x02>; | |
| phandle = <0x2e3>; | |
| }; | |
| qcom,msm-hdmi-dba-codec-rx { | |
| compatible = "qcom,msm-hdmi-dba-codec-rx"; | |
| qcom,dba-bridge-chip = "adv7533"; | |
| phandle = <0x1ad>; | |
| }; | |
| qcom,msm-audio-ion { | |
| compatible = "qcom,msm-audio-ion"; | |
| qcom,smmu-version = <0x02>; | |
| qcom,smmu-enabled; | |
| iommus = <0xa8 0x2401 0x00>; | |
| qcom,smmu-sid-mask = <0x00 0x0f>; | |
| phandle = <0x2e4>; | |
| }; | |
| qcom,msm-adsp-loader { | |
| status = "ok"; | |
| compatible = "qcom,adsp-loader"; | |
| qcom,adsp-state = <0x00>; | |
| }; | |
| qcom,msm-dai-tdm-pri-rx { | |
| compatible = "qcom,msm-dai-tdm"; | |
| qcom,msm-cpudai-tdm-group-id = <0x9100>; | |
| qcom,msm-cpudai-tdm-group-num-ports = <0x01>; | |
| qcom,msm-cpudai-tdm-group-port-id = <0x9000>; | |
| qcom,msm-cpudai-tdm-clk-rate = <0x177000>; | |
| qcom,msm-cpudai-tdm-clk-internal = <0x01>; | |
| qcom,msm-cpudai-tdm-sync-mode = <0x01>; | |
| qcom,msm-cpudai-tdm-sync-src = <0x01>; | |
| qcom,msm-cpudai-tdm-data-out = <0x00>; | |
| qcom,msm-cpudai-tdm-invert-sync = <0x01>; | |
| qcom,msm-cpudai-tdm-data-delay = <0x01>; | |
| qcom,msm-dai-q6-tdm-pri-rx-0 { | |
| compatible = "qcom,msm-dai-q6-tdm"; | |
| qcom,msm-cpudai-tdm-dev-id = <0x9000>; | |
| qcom,msm-cpudai-tdm-data-align = <0x00>; | |
| phandle = <0x2e5>; | |
| }; | |
| }; | |
| qcom,msm-dai-tdm-pri-tx { | |
| compatible = "qcom,msm-dai-tdm"; | |
| qcom,msm-cpudai-tdm-group-id = <0x9101>; | |
| qcom,msm-cpudai-tdm-group-num-ports = <0x01>; | |
| qcom,msm-cpudai-tdm-group-port-id = <0x9001>; | |
| qcom,msm-cpudai-tdm-clk-rate = <0x177000>; | |
| qcom,msm-cpudai-tdm-clk-internal = <0x01>; | |
| qcom,msm-cpudai-tdm-sync-mode = <0x01>; | |
| qcom,msm-cpudai-tdm-sync-src = <0x01>; | |
| qcom,msm-cpudai-tdm-data-out = <0x00>; | |
| qcom,msm-cpudai-tdm-invert-sync = <0x01>; | |
| qcom,msm-cpudai-tdm-data-delay = <0x01>; | |
| qcom,msm-dai-q6-tdm-pri-tx-0 { | |
| compatible = "qcom,msm-dai-q6-tdm"; | |
| qcom,msm-cpudai-tdm-dev-id = <0x9001>; | |
| qcom,msm-cpudai-tdm-data-align = <0x00>; | |
| phandle = <0x2e6>; | |
| }; | |
| }; | |
| qcom,msm-dai-tdm-sec-rx { | |
| compatible = "qcom,msm-dai-tdm"; | |
| qcom,msm-cpudai-tdm-group-id = <0x9110>; | |
| qcom,msm-cpudai-tdm-group-num-ports = <0x01>; | |
| qcom,msm-cpudai-tdm-group-port-id = <0x9010>; | |
| qcom,msm-cpudai-tdm-clk-rate = <0x177000>; | |
| qcom,msm-cpudai-tdm-clk-internal = <0x01>; | |
| qcom,msm-cpudai-tdm-sync-mode = <0x01>; | |
| qcom,msm-cpudai-tdm-sync-src = <0x01>; | |
| qcom,msm-cpudai-tdm-data-out = <0x00>; | |
| qcom,msm-cpudai-tdm-invert-sync = <0x01>; | |
| qcom,msm-cpudai-tdm-data-delay = <0x01>; | |
| qcom,msm-dai-q6-tdm-sec-rx-0 { | |
| compatible = "qcom,msm-dai-q6-tdm"; | |
| qcom,msm-cpudai-tdm-dev-id = <0x9010>; | |
| qcom,msm-cpudai-tdm-data-align = <0x00>; | |
| phandle = <0x2e7>; | |
| }; | |
| }; | |
| qcom,msm-dai-tdm-sec-tx { | |
| compatible = "qcom,msm-dai-tdm"; | |
| qcom,msm-cpudai-tdm-group-id = <0x9111>; | |
| qcom,msm-cpudai-tdm-group-num-ports = <0x01>; | |
| qcom,msm-cpudai-tdm-group-port-id = <0x9011>; | |
| qcom,msm-cpudai-tdm-clk-rate = <0x177000>; | |
| qcom,msm-cpudai-tdm-clk-internal = <0x01>; | |
| qcom,msm-cpudai-tdm-sync-mode = <0x01>; | |
| qcom,msm-cpudai-tdm-sync-src = <0x01>; | |
| qcom,msm-cpudai-tdm-data-out = <0x00>; | |
| qcom,msm-cpudai-tdm-invert-sync = <0x01>; | |
| qcom,msm-cpudai-tdm-data-delay = <0x01>; | |
| qcom,msm-dai-q6-tdm-sec-tx-0 { | |
| compatible = "qcom,msm-dai-q6-tdm"; | |
| qcom,msm-cpudai-tdm-dev-id = <0x9011>; | |
| qcom,msm-cpudai-tdm-data-align = <0x00>; | |
| phandle = <0x2e8>; | |
| }; | |
| }; | |
| qcom,msm-dai-tdm-tert-rx { | |
| compatible = "qcom,msm-dai-tdm"; | |
| qcom,msm-cpudai-tdm-group-id = <0x9120>; | |
| qcom,msm-cpudai-tdm-group-num-ports = <0x01>; | |
| qcom,msm-cpudai-tdm-group-port-id = <0x9020>; | |
| qcom,msm-cpudai-tdm-clk-rate = <0x177000>; | |
| qcom,msm-cpudai-tdm-clk-internal = <0x01>; | |
| qcom,msm-cpudai-tdm-sync-mode = <0x01>; | |
| qcom,msm-cpudai-tdm-sync-src = <0x01>; | |
| qcom,msm-cpudai-tdm-data-out = <0x00>; | |
| qcom,msm-cpudai-tdm-invert-sync = <0x01>; | |
| qcom,msm-cpudai-tdm-data-delay = <0x01>; | |
| qcom,msm-dai-q6-tdm-tert-rx-0 { | |
| compatible = "qcom,msm-dai-q6-tdm"; | |
| qcom,msm-cpudai-tdm-dev-id = <0x9020>; | |
| qcom,msm-cpudai-tdm-data-align = <0x00>; | |
| phandle = <0x2e9>; | |
| }; | |
| }; | |
| qcom,msm-dai-tdm-tert-tx { | |
| compatible = "qcom,msm-dai-tdm"; | |
| qcom,msm-cpudai-tdm-group-id = <0x9121>; | |
| qcom,msm-cpudai-tdm-group-num-ports = <0x01>; | |
| qcom,msm-cpudai-tdm-group-port-id = <0x9021>; | |
| qcom,msm-cpudai-tdm-clk-rate = <0x177000>; | |
| qcom,msm-cpudai-tdm-clk-internal = <0x01>; | |
| qcom,msm-cpudai-tdm-sync-mode = <0x01>; | |
| qcom,msm-cpudai-tdm-sync-src = <0x01>; | |
| qcom,msm-cpudai-tdm-data-out = <0x00>; | |
| qcom,msm-cpudai-tdm-invert-sync = <0x01>; | |
| qcom,msm-cpudai-tdm-data-delay = <0x01>; | |
| qcom,msm-dai-q6-tdm-tert-tx-0 { | |
| compatible = "qcom,msm-dai-q6-tdm"; | |
| qcom,msm-cpudai-tdm-dev-id = <0x9021>; | |
| qcom,msm-cpudai-tdm-data-align = <0x00>; | |
| phandle = <0x2ea>; | |
| }; | |
| }; | |
| qcom,msm-dai-tdm-quat-rx { | |
| compatible = "qcom,msm-dai-tdm"; | |
| qcom,msm-cpudai-tdm-group-id = <0x9130>; | |
| qcom,msm-cpudai-tdm-group-num-ports = <0x01>; | |
| qcom,msm-cpudai-tdm-group-port-id = <0x9030>; | |
| qcom,msm-cpudai-tdm-clk-rate = <0x177000>; | |
| qcom,msm-cpudai-tdm-clk-internal = <0x01>; | |
| qcom,msm-cpudai-tdm-sync-mode = <0x01>; | |
| qcom,msm-cpudai-tdm-sync-src = <0x01>; | |
| qcom,msm-cpudai-tdm-data-out = <0x00>; | |
| qcom,msm-cpudai-tdm-invert-sync = <0x01>; | |
| qcom,msm-cpudai-tdm-data-delay = <0x01>; | |
| phandle = <0x2eb>; | |
| qcom,msm-dai-q6-tdm-quat-rx-0 { | |
| compatible = "qcom,msm-dai-q6-tdm"; | |
| qcom,msm-cpudai-tdm-dev-id = <0x9030>; | |
| qcom,msm-cpudai-tdm-data-align = <0x00>; | |
| phandle = <0x2ec>; | |
| }; | |
| }; | |
| qcom,msm-dai-tdm-quat-tx { | |
| compatible = "qcom,msm-dai-tdm"; | |
| qcom,msm-cpudai-tdm-group-id = <0x9131>; | |
| qcom,msm-cpudai-tdm-group-num-ports = <0x01>; | |
| qcom,msm-cpudai-tdm-group-port-id = <0x9031>; | |
| qcom,msm-cpudai-tdm-clk-rate = <0x177000>; | |
| qcom,msm-cpudai-tdm-clk-internal = <0x01>; | |
| qcom,msm-cpudai-tdm-sync-mode = <0x01>; | |
| qcom,msm-cpudai-tdm-sync-src = <0x01>; | |
| qcom,msm-cpudai-tdm-data-out = <0x00>; | |
| qcom,msm-cpudai-tdm-invert-sync = <0x01>; | |
| qcom,msm-cpudai-tdm-data-delay = <0x01>; | |
| qcom,msm-dai-q6-tdm-quat-tx-0 { | |
| compatible = "qcom,msm-dai-q6-tdm"; | |
| qcom,msm-cpudai-tdm-dev-id = <0x9031>; | |
| qcom,msm-cpudai-tdm-data-align = <0x00>; | |
| phandle = <0x2ed>; | |
| }; | |
| }; | |
| qcom,msm-dai-tdm-quin-rx { | |
| compatible = "qcom,msm-dai-tdm"; | |
| qcom,msm-cpudai-tdm-group-id = <0x9140>; | |
| qcom,msm-cpudai-tdm-group-num-ports = <0x01>; | |
| qcom,msm-cpudai-tdm-group-port-id = <0x9040>; | |
| qcom,msm-cpudai-tdm-clk-rate = <0x177000>; | |
| qcom,msm-cpudai-tdm-clk-internal = <0x01>; | |
| qcom,msm-cpudai-tdm-sync-mode = <0x01>; | |
| qcom,msm-cpudai-tdm-sync-src = <0x01>; | |
| qcom,msm-cpudai-tdm-data-out = <0x00>; | |
| qcom,msm-cpudai-tdm-invert-sync = <0x01>; | |
| qcom,msm-cpudai-tdm-data-delay = <0x01>; | |
| qcom,msm-dai-q6-tdm-quin-rx-0 { | |
| compatible = "qcom,msm-dai-q6-tdm"; | |
| qcom,msm-cpudai-tdm-dev-id = <0x9040>; | |
| qcom,msm-cpudai-tdm-data-align = <0x00>; | |
| phandle = <0x2ee>; | |
| }; | |
| }; | |
| qcom,msm-dai-tdm-quin-tx { | |
| compatible = "qcom,msm-dai-tdm"; | |
| qcom,msm-cpudai-tdm-group-id = <0x9141>; | |
| qcom,msm-cpudai-tdm-group-num-ports = <0x01>; | |
| qcom,msm-cpudai-tdm-group-port-id = <0x9041>; | |
| qcom,msm-cpudai-tdm-clk-rate = <0x177000>; | |
| qcom,msm-cpudai-tdm-clk-internal = <0x01>; | |
| qcom,msm-cpudai-tdm-sync-mode = <0x01>; | |
| qcom,msm-cpudai-tdm-sync-src = <0x01>; | |
| qcom,msm-cpudai-tdm-data-out = <0x00>; | |
| qcom,msm-cpudai-tdm-invert-sync = <0x01>; | |
| qcom,msm-cpudai-tdm-data-delay = <0x01>; | |
| qcom,msm-dai-q6-tdm-quin-tx-0 { | |
| compatible = "qcom,msm-dai-q6-tdm"; | |
| qcom,msm-cpudai-tdm-dev-id = <0x9041>; | |
| qcom,msm-cpudai-tdm-data-align = <0x00>; | |
| phandle = <0x2ef>; | |
| }; | |
| }; | |
| qcom,avtimer@c0a300c { | |
| compatible = "qcom,avtimer"; | |
| reg = <0xc0a300c 0x04 0xc0a3010 0x04>; | |
| reg-names = "avtimer_lsb_addr\0avtimer_msb_addr"; | |
| qcom,clk-div = <0x1b>; | |
| }; | |
| sound { | |
| status = "okay"; | |
| compatible = "qcom,msm8952-audio-codec"; | |
| qcom,model = "msm8953-snd-card-mtp"; | |
| reg = <0xc051000 0x04 0xc051004 0x04 0xc055000 0x04 0xc052000 0x04>; | |
| reg-names = "csr_gp_io_mux_mic_ctl\0csr_gp_io_mux_spkr_ctl\0csr_gp_io_lpaif_pri_pcm_pri_mode_muxsel\0csr_gp_io_mux_quin_ctl"; | |
| qcom,msm-ext-pa = "primary"; | |
| qcom,msm-mclk-freq = <0x927c00>; | |
| qcom,msm-mbhc-hphl-swh = <0x01>; | |
| qcom,msm-mbhc-gnd-swh = <0x01>; | |
| qcom,msm-hs-micbias-type = "external"; | |
| qcom,msm-micbias1-ext-cap; | |
| qcom,msm-micbias2-ext-cap; | |
| qcom,audio-routing = "RX_BIAS\0MCLK\0SPK_RX_BIAS\0MCLK\0INT_LDO_H\0MCLK\0RX_I2S_CLK\0MCLK\0TX_I2S_CLK\0MCLK\0MIC BIAS External\0Handset Mic\0MIC BIAS External2\0Headset Mic\0MIC BIAS External\0Secondary Mic\0AMIC1\0MIC BIAS External\0AMIC2\0MIC BIAS External2\0AMIC3\0MIC BIAS External\0ADC1_IN\0ADC1_OUT\0ADC2_IN\0ADC2_OUT\0ADC3_IN\0ADC3_OUT\0PDM_IN_RX1\0PDM_OUT_RX1\0PDM_IN_RX2\0PDM_OUT_RX2\0PDM_IN_RX3\0PDM_OUT_RX3"; | |
| qcom,cdc-comp-gpios = <0x163>; | |
| qcom,pri-mi2s-gpios = <0x164>; | |
| qcom,quin-mi2s-gpios = <0x165>; | |
| asoc-platform = <0x166 0x167 0x168 0x169 0x16a 0x16b 0x16c 0x16d 0x16e 0x16f 0x170 0x171>; | |
| asoc-platform-names = "msm-pcm-dsp.0\0msm-pcm-dsp.1\0msm-pcm-dsp.2\0msm-voip-dsp\0msm-pcm-voice\0msm-pcm-loopback\0msm-compress-dsp\0msm-pcm-hostless\0msm-pcm-afe\0msm-lsm-client\0msm-pcm-routing\0msm-pcm-dsp-noirq"; | |
| asoc-cpu = <0x172 0x173 0x174 0x175 0x176 0x177 0x178 0x179 0x17a 0x17b 0x17c 0x17d 0x17e 0x17f 0x180 0x181 0x182 0x183 0x184 0x185 0x186 0x187 0x188 0x189 0x18a 0x18b 0x18c 0x18d 0x18e 0x18f>; | |
| asoc-cpu-names = "msm-dai-q6-auxpcm.1\0msm-dai-q6-mi2s.0\0msm-dai-q6-mi2s.1\0msm-dai-q6-mi2s.2\0msm-dai-q6-mi2s.3\0msm-dai-q6-mi2s.4\0msm-dai-q6-mi2s.6\0msm-dai-q6-dev.16384\0msmdai-q6-dev.16385\0msm-dai-q6-dev.16386\0msm-dai-q6-dev.16387\0msm-dai-q6-dev.16390\0msm-dai-q6-dev.16391\0msm-dai-q6-dev.16392\0msm-dai-q6-dev.16393\0msm-dai-q6-dev.12288\0msm-dai-q6-dev.12289\0msm-dai-q6-dev.12292\0msm-dai-q6-dev.12293\0msm-dai-q6-dev.224\0msm-dai-q6-dev.225\0msm-dai-q6-dev.241\0msm-dai-q6-dev.240\0msm-dai-q6-dev.32771\0msm-dai-q6-dev.32772\0msm-dai-q6-dev.32773\0msm-dai-q6-dev.32770\0msm-dai-q6-dev.24577\0msm-dai-q6-dev.8194\0msm-dai-q6-dev.8195"; | |
| asoc-codec = <0x190 0x191 0x192>; | |
| asoc-codec-names = "msm-stub-codec.1\0msm-dig-codec\0analog-codec"; | |
| phandle = <0x2f0>; | |
| }; | |
| msm_cdc_pinctrl_us_euro_sw { | |
| compatible = "qcom,msm-cdc-pinctrl"; | |
| pinctrl-names = "aud_active\0aud_sleep"; | |
| pinctrl-0 = <0x193>; | |
| pinctrl-1 = <0x194>; | |
| phandle = <0x1a5>; | |
| }; | |
| cdc_comp_pinctrl { | |
| compatible = "qcom,msm-cdc-pinctrl"; | |
| pinctrl-names = "aud_active\0aud_sleep"; | |
| pinctrl-0 = <0x195>; | |
| pinctrl-1 = <0x196>; | |
| phandle = <0x163>; | |
| }; | |
| msm_cdc_pinctrl_pri { | |
| compatible = "qcom,msm-cdc-pinctrl"; | |
| pinctrl-names = "aud_active\0aud_sleep"; | |
| pinctrl-0 = <0x197 0x198>; | |
| pinctrl-1 = <0x199 0x19a>; | |
| phandle = <0x164>; | |
| }; | |
| msm_cdc_pinctrl_quin { | |
| compatible = "qcom,msm-cdc-pinctrl"; | |
| pinctrl-names = "aud_active\0aud_sleep"; | |
| pinctrl-0 = <0x19b 0x19c>; | |
| pinctrl-1 = <0x19d 0x19e>; | |
| phandle = <0x165>; | |
| }; | |
| wsa881x_analog_vi_pctrl { | |
| compatible = "qcom,msm-cdc-pinctrl"; | |
| pinctrl-names = "aud_active\0aud_sleep"; | |
| pinctrl-0 = <0x19f>; | |
| pinctrl-1 = <0x1a0>; | |
| phandle = <0x10a>; | |
| }; | |
| wsa881x_analog_clk_pctrl { | |
| compatible = "qcom,msm-cdc-pinctrl"; | |
| pinctrl-names = "aud_active\0aud_sleep"; | |
| pinctrl-0 = <0x1a1>; | |
| pinctrl-1 = <0x1a2>; | |
| phandle = <0x10b>; | |
| }; | |
| wsa881x_analog_reset_pctrl { | |
| compatible = "qcom,msm-cdc-pinctrl"; | |
| pinctrl-names = "aud_active\0aud_sleep"; | |
| pinctrl-0 = <0x1a3>; | |
| pinctrl-1 = <0x1a4>; | |
| phandle = <0x10c>; | |
| }; | |
| sound-9335 { | |
| status = "disabled"; | |
| compatible = "qcom,msm8952-audio-slim-codec"; | |
| qcom,model = "msm8953-tasha-snd-card"; | |
| reg = <0xc051000 0x04 0xc051004 0x04 0xc055000 0x04 0xc052000 0x04>; | |
| reg-names = "csr_gp_io_mux_mic_ctl\0csr_gp_io_mux_spkr_ctl\0csr_gp_io_lpaif_pri_pcm_pri_mode_muxsel\0csr_gp_io_mux_quin_ctl"; | |
| qcom,audio-routing = "AIF4 VI\0MCLK\0AIF4 VI\0MICBIAS_REGULATOR\0RX_BIAS\0MCLK\0MADINPUT\0MCLK\0AIF4 MAD\0MICBIAS_REGULATOR\0AMIC2\0MIC BIAS2\0MIC BIAS2\0Headset Mic\0AMIC3\0MIC BIAS2\0MIC BIAS2\0ANCRight Headset Mic\0AMIC4\0MIC BIAS2\0MIC BIAS2\0ANCLeft Headset Mic\0AMIC5\0MIC BIAS3\0MIC BIAS3\0Handset Mic\0AMIC6\0MIC BIAS4\0MIC BIAS4\0Analog Mic6\0DMIC0\0MIC BIAS1\0MIC BIAS1\0Digital Mic0\0DMIC1\0MIC BIAS1\0MIC BIAS1\0Digital Mic1\0DMIC2\0MIC BIAS3\0MIC BIAS3\0Digital Mic2\0DMIC3\0MIC BIAS3\0MIC BIAS3\0Digital Mic3\0DMIC4\0MIC BIAS4\0MIC BIAS4\0Digital Mic4\0DMIC5\0MIC BIAS4\0MIC BIAS4\0Digital Mic5\0MIC BIAS1\0MICBIAS_REGULATOR\0MIC BIAS2\0MICBIAS_REGULATOR\0MIC BIAS3\0MICBIAS_REGULATOR\0MIC BIAS4\0MICBIAS_REGULATOR\0SpkrLeft IN\0SPK1 OUT\0SpkrRight IN\0SPK2 OUT"; | |
| qcom,tasha-mclk-clk-freq = <0x927c00>; | |
| qcom,cdc-us-euro-gpios = <0xf4 0x3f 0x00>; | |
| qcom,msm-mbhc-hphl-swh = <0x00>; | |
| qcom,msm-mbhc-gnd-swh = <0x00>; | |
| qcom,cdc-us-eu-gpios = <0x1a5>; | |
| qcom,quin-mi2s-gpios = <0x165>; | |
| asoc-platform = <0x166 0x167 0x168 0x169 0x16a 0x16b 0x16c 0x16d 0x16e 0x16f 0x170 0x1a6 0x1a7 0x171>; | |
| asoc-platform-names = "msm-pcm-dsp.0\0msm-pcm-dsp.1\0msm-pcm-dsp.2\0msm-voip-dsp\0msm-pcm-voice\0msm-pcm-loopback\0msm-compress-dsp\0msm-pcm-hostless\0msm-pcm-afe\0msm-lsm-client\0msm-pcm-routing\0msm-cpe-lsm\0msm-compr-dsp\0msm-pcm-dsp-noirq"; | |
| asoc-cpu = <0x172 0x175 0x176 0x178 0x179 0x17a 0x17b 0x17c 0x1a8 0x1a9 0x17d 0x17e 0x17f 0x180 0x1aa 0x185 0x186 0x187 0x188 0x189 0x18a 0x18b 0x18c 0x1ab 0x181 0x182 0x183 0x184 0x1ac 0x18e 0x18f>; | |
| asoc-cpu-names = "msm-dai-q6-auxpcm.1\0msm-dai-q6-mi2s.2\0msm-dai-q6-mi2s.3\0msm-dai-q6-mi2s.5\0msm-dai-q6-dev.16384\0msm-dai-q6-dev.16385\0msm-dai-q6-dev.16386\0msm-dai-q6-dev.16387\0msm-dai-q6-dev.16388\0msm-dai-q6-dev.16389\0msm-dai-q6-dev.16390\0msm-dai-q6-dev.16391\0msm-dai-q6-dev.16392\0msm-dai-q6-dev.16393\0msm-dai-q6-dev.16395\0msm-dai-q6-dev.224\0msm-dai-q6-dev.225\0msm-dai-q6-dev.241\0msm-dai-q6-dev.240\0msm-dai-q6-dev.32771\0msm-dai-q6-dev.32772\0msm-dai-q6-dev.32773\0msm-dai-q6-dev.32770\0msm-dai-q6-dev.16394\0msm-dai-q6-dev.12288\0msm-dai-q6-dev.12289\0msm-dai-q6-dev.12292\0msm-dai-q6-dev.12293\0msm-dai-q6-dev.16396\0msm-dai-q6-dev.8194\0msm-dai-q6-dev.8195"; | |
| asoc-codec = <0x190 0x1ad>; | |
| asoc-codec-names = "msm-stub-codec.1\0msm-hdmi-dba-codec-rx"; | |
| qcom,wsa-max-devs = <0x02>; | |
| qcom,wsa-devs = <0x1ae 0x1af 0x1b0 0x1b1>; | |
| qcom,wsa-aux-dev-prefix = "SpkrLeft\0SpkrRight\0SpkrLeft\0SpkrRight"; | |
| phandle = <0x2f1>; | |
| }; | |
| qcom,msm-cpe-lsm { | |
| compatible = "qcom,msm-cpe-lsm"; | |
| phandle = <0x1a6>; | |
| }; | |
| wcd9xxx-irq { | |
| status = "disabled"; | |
| compatible = "qcom,wcd9xxx-irq"; | |
| interrupt-controller; | |
| #interrupt-cells = <0x01>; | |
| interrupt-parent = <0xf4>; | |
| qcom,gpio-connect = <0xf4 0x49 0x00>; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x1b2>; | |
| phandle = <0x11f>; | |
| }; | |
| audio_ext_clk { | |
| status = "disabled"; | |
| compatible = "qcom,audio-ref-clk"; | |
| clock-names = "osr_clk"; | |
| qcom,node_has_rpm_clock; | |
| #clock-cells = <0x01>; | |
| pinctrl-names = "active\0sleep"; | |
| pinctrl-0 = <0x1b3>; | |
| pinctrl-1 = <0x1b3>; | |
| qcom,audio-ref-clk-gpio = <0x159 0x01 0x00>; | |
| clocks = <0x12 0xd454019f>; | |
| phandle = <0x121>; | |
| }; | |
| msm_cdc_pinctrl@67 { | |
| status = "disabled"; | |
| compatible = "qcom,msm-cdc-pinctrl"; | |
| pinctrl-names = "aud_active\0aud_sleep"; | |
| pinctrl-0 = <0x1b4>; | |
| pinctrl-1 = <0x1b5>; | |
| phandle = <0x120>; | |
| }; | |
| apc-mem-acc-regulator { | |
| compatible = "qcom,mem-acc-regulator"; | |
| regulator-name = "apc_mem_acc_corner"; | |
| regulator-min-microvolt = <0x01>; | |
| regulator-max-microvolt = <0x03>; | |
| qcom,acc-reg-addr-list = <0xb1d1360 0xb1d1364 0xb1d1368 0xb1d136c 0xb1d1370>; | |
| qcom,num-acc-corners = <0x03>; | |
| qcom,boot-acc-corner = <0x01>; | |
| qcom,corner1-reg-config = <0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0x01 0x00 0x02 0x00 0x03 0x00 0x04 0x00 0x05 0x00 0x01 0x00 0x02 0x01 0x03 0x00 0x04 0x10000 0x05 0x00>; | |
| qcom,corner2-reg-config = <0x01 0x00 0x02 0x80000000 0x03 0x00 0x04 0x00 0x05 0x80000000 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0x01 0x00 0x02 0x01 0x03 0x00 0x04 0x10000 0x05 0x00>; | |
| qcom,corner3-reg-config = <0x01 0x00 0x02 0x80000000 0x03 0x00 0x04 0x00 0x05 0x80000000 0x01 0x00 0x02 0x00 0x03 0x00 0x04 0x00 0x05 0x00 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff>; | |
| phandle = <0x157>; | |
| }; | |
| dbu3 { | |
| compatible = "regulator-fixed"; | |
| regulator-name = "dbu3"; | |
| startup-delay-us = <0x00>; | |
| enable-active-high; | |
| phandle = <0x2f2>; | |
| }; | |
| qcom,cci { | |
| compatible = "devfreq-simple-dev"; | |
| clock-names = "devfreq_clk"; | |
| clocks = <0x6a 0x96854074>; | |
| governor = "cpufreq"; | |
| freq-tbl-khz = <0x4b000 0x62700 0x79e00 0xa8c00 0xbb800 0xc0300>; | |
| phandle = <0x12a>; | |
| }; | |
| etm@61b3000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0xbb959>; | |
| reg = <0x61b3000 0x1000>; | |
| cpu = <0x06>; | |
| coresight-name = "coresight-etm4"; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x2f3>; | |
| port { | |
| endpoint { | |
| remote-endpoint = <0x1b6>; | |
| phandle = <0x8d>; | |
| }; | |
| }; | |
| }; | |
| etm@61b7000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0xbb959>; | |
| reg = <0x61b7000 0x1000>; | |
| cpu = <0x07>; | |
| coresight-name = "coresight-etm5"; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x2f4>; | |
| port { | |
| endpoint { | |
| remote-endpoint = <0x1b7>; | |
| phandle = <0x8e>; | |
| }; | |
| }; | |
| }; | |
| etm@61bb000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0xbb959>; | |
| reg = <0x61bb000 0x1000>; | |
| cpu = <0x08>; | |
| coresight-name = "coresight-etm6"; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x2f5>; | |
| port { | |
| endpoint { | |
| remote-endpoint = <0x1b8>; | |
| phandle = <0x8f>; | |
| }; | |
| }; | |
| }; | |
| cti@61b1000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0x3b966>; | |
| reg = <0x61b1000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-name = "coresight-cti-cpu4"; | |
| cpu = <0x06>; | |
| qcom,cti-save; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x2f6>; | |
| }; | |
| cti@61b5000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0x3b966>; | |
| reg = <0x61b5000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-name = "coresight-cti-cpu5"; | |
| cpu = <0x07>; | |
| qcom,cti-save; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x2f7>; | |
| }; | |
| cti@61bd000 { | |
| compatible = "arm,primecell"; | |
| arm,primecell-periphid = <0x3b966>; | |
| reg = <0x61bd000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-name = "coresight-cti-cpu7"; | |
| cpu = <0x09>; | |
| qcom,cti-save; | |
| clocks = <0x12 0x1492202a 0x12 0xdd121669>; | |
| clock-names = "apb_pclk"; | |
| phandle = <0x2f8>; | |
| }; | |
| qcom,camera-flash { | |
| cell-index = <0x00>; | |
| compatible = "qcom,camera-flash"; | |
| qcom,flash-type = <0x01>; | |
| qcom,flash-source = <0x1b9 0x1ba>; | |
| qcom,torch-source = <0x1bb 0x1bc>; | |
| qcom,switch-source = <0x1bd>; | |
| phandle = <0x2f9>; | |
| }; | |
| dsi_panel_pwr_supply { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| phandle = <0x308>; | |
| qcom,panel-supply-entry@1 { | |
| reg = <0x01>; | |
| qcom,supply-name = "vddio"; | |
| qcom,supply-min-voltage = <0x1b7740>; | |
| qcom,supply-max-voltage = <0x1b7740>; | |
| qcom,supply-enable-load = <0x186a0>; | |
| qcom,supply-disable-load = <0x64>; | |
| }; | |
| qcom,panel-supply-entry@2 { | |
| reg = <0x02>; | |
| qcom,supply-name = "lab"; | |
| qcom,supply-min-voltage = <0x4630c0>; | |
| qcom,supply-max-voltage = <0x5b8d80>; | |
| qcom,supply-enable-load = <0x186a0>; | |
| qcom,supply-disable-load = <0x64>; | |
| }; | |
| qcom,panel-supply-entry@3 { | |
| reg = <0x03>; | |
| qcom,supply-name = "ibb"; | |
| qcom,supply-min-voltage = <0x4630c0>; | |
| qcom,supply-max-voltage = <0x5b8d80>; | |
| qcom,supply-enable-load = <0x186a0>; | |
| qcom,supply-disable-load = <0x64>; | |
| qcom,supply-post-on-sleep = <0x0a>; | |
| }; | |
| }; | |
| gpio_keys { | |
| compatible = "gpio-keys"; | |
| input-name = "gpio-keys"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x221>; | |
| camera_focus { | |
| label = "camera_focus"; | |
| gpios = <0xf4 0x57 0x01>; | |
| linux,input-type = <0x01>; | |
| linux,code = <0x210>; | |
| debounce-interval = <0x0f>; | |
| linux,can-disable; | |
| gpio-key,wakeup; | |
| }; | |
| camera_snapshot { | |
| label = "camera_snapshot"; | |
| gpios = <0xf4 0x56 0x01>; | |
| linux,input-type = <0x01>; | |
| linux,code = <0x2fe>; | |
| debounce-interval = <0x0f>; | |
| linux,can-disable; | |
| gpio-key,wakeup; | |
| }; | |
| vol_up { | |
| label = "volume_up"; | |
| gpios = <0xf4 0x55 0x01>; | |
| linux,input-type = <0x01>; | |
| linux,code = <0x73>; | |
| debounce-interval = <0x0f>; | |
| linux,can-disable; | |
| gpio-key,wakeup; | |
| }; | |
| }; | |
| }; | |
| chosen { | |
| pureason = <0x40021>; | |
| linux,initrd-end = <0x43666c18>; | |
| linux,initrd-start = <0x43600000>; | |
| kaslr-seed = <0x00 0x00>; | |
| bootargs = "kpti=0 console=ttyMSM0,115200,n8 androidboot.console=ttyMSM0 androidboot.hardware=qcom msm_rtb.filter=0x237 ehci-hcd.park=3 lpm_levels.sleep_disabled=1 androidboot.bootdevice=7824900.sdhci earlycon=msm_serial_dm,0x78af000 firmware_class.path=/vendor/firmware_mnt/image androidboot.usbconfigfs=true loop.max_part=7 buildvariant=userdebug androidboot.emmc=true androidboot.fpsensor=fpc androidboot.hwcountry=Global androidboot.hwversion=2.29.0 androidboot.hwlevel=MP androidboot.battery=battery_100k androidboot.secureboot=1 androidboot.dp=0x0 androidboot.cpuid=0x85d22799 androidboot.product.cert=M1810F6LG androidboot.verifiedbootstate=orange androidboot.keymaster=1 root=PARTUUID=d968d23e-a789-e08e-0bcc-bd3f47d71e67 androidboot.vbmeta.device=PARTUUID=46e8cd8b-78f7-a174-82f9-f30f95eb9967 androidboot.vbmeta.avb_version=1.0 androidboot.vbmeta.device_state=unlocked androidboot.vbmeta.hash_alg=sha256 androidboot.vbmeta.size=4224 androidboot.vbmeta.digest=7f705f2c36827870c901c8e7dbd2c91c0a43296a5a7116f0e5cf9ed10fdf74ef androidboot.veritymode=disabled androidboot.serialno=69ded29f androidboot.baseband=msm mdss_mdp.panel=1:dsi:0:qcom,mdss_dsi_truly_otm1901a_720p_video:1:none:cfg:single_dsi skip_initramfs rootwait ro init=/init androidboot.dtbo_idx=6 ramoops_memreserve_addr=0x91400000 ramoops_memreserve=0x00400000"; | |
| }; | |
| aliases { | |
| smd1 = "/soc/qcom,smdtty/qcom,smdtty-apps-fm"; | |
| smd2 = "/soc/qcom,smdtty/smdtty-apps-riva-bt-acl"; | |
| smd3 = "/soc/qcom,smdtty/qcom,smdtty-apps-riva-bt-cmd"; | |
| smd4 = "/soc/qcom,smdtty/qcom,smdtty-mbalbridge"; | |
| smd5 = "/soc/qcom,smdtty/smdtty-apps-riva-ant-cmd"; | |
| smd6 = "/soc/qcom,smdtty/smdtty-apps-riva-ant-data"; | |
| smd7 = "/soc/qcom,smdtty/qcom,smdtty-data1"; | |
| smd8 = "/soc/qcom,smdtty/qcom,smdtty-data4"; | |
| smd11 = "/soc/qcom,smdtty/qcom,smdtty-data11"; | |
| smd21 = "/soc/qcom,smdtty/qcom,smdtty-data21"; | |
| smd36 = "/soc/qcom,smdtty/smdtty-loopback"; | |
| sdhc1 = "/soc/sdhci@7824900"; | |
| sdhc2 = "/soc/sdhci@7864900"; | |
| i2c1 = "/soc/i2c@78b5000"; | |
| i2c2 = "/soc/i2c@78b6000"; | |
| i2c3 = "/soc/i2c@78b7000"; | |
| i2c5 = "/soc/i2c@7af5000"; | |
| spi3 = "/soc/spi@78b7000"; | |
| spi6 = "/soc/spi@7af6000"; | |
| }; | |
| memory { | |
| device_type = "memory"; | |
| reg = <0x00 0x40000000 0x00 0x40000000 0x00 0x80000000 0x00 0x80000000>; | |
| }; | |
| vendor { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| ranges = <0x00 0x00 0x00 0xffffffff>; | |
| compatible = "simple-bus"; | |
| phandle = <0x2fa>; | |
| }; | |
| firmware { | |
| phandle = <0x2fb>; | |
| android { | |
| compatible = "android,firmware"; | |
| vbmeta { | |
| compatible = "android,vbmeta"; | |
| parts = "vbmeta,boot,system,vendor,dtbo,recovery"; | |
| }; | |
| fstab { | |
| compatible = "android,fstab"; | |
| vendor { | |
| compatible = "android,vendor"; | |
| dev = "/dev/block/platform/soc/7824900.sdhci/by-name/vendor"; | |
| type = "ext4"; | |
| mnt_flags = "ro,barrier=1,discard"; | |
| fsmgr_flags = "wait,avb"; | |
| status = "ok"; | |
| }; | |
| }; | |
| }; | |
| }; | |
| reserved-memory { | |
| #address-cells = <0x02>; | |
| #size-cells = <0x02>; | |
| ranges; | |
| other_ext_region@0 { | |
| compatible = "removed-dma-pool"; | |
| no-map; | |
| reg = <0x00 0x84a00000 0x00 0x1e00000>; | |
| phandle = <0x2fc>; | |
| }; | |
| modem_region@0 { | |
| compatible = "removed-dma-pool"; | |
| no-map; | |
| reg = <0x00 0x86c00000 0x00 0x6a00000>; | |
| phandle = <0x141>; | |
| }; | |
| adsp_fw_region@0 { | |
| compatible = "removed-dma-pool"; | |
| no-map; | |
| reg = <0x00 0x8d600000 0x00 0x1400000>; | |
| phandle = <0x144>; | |
| }; | |
| wcnss_fw_region@0 { | |
| compatible = "removed-dma-pool"; | |
| no-map; | |
| reg = <0x00 0x8ea00000 0x00 0x700000>; | |
| phandle = <0x147>; | |
| }; | |
| venus_region@0 { | |
| compatible = "shared-dma-pool"; | |
| reusable; | |
| alloc-ranges = <0x00 0x80000000 0x00 0x10000000>; | |
| alignment = <0x00 0x400000>; | |
| size = <0x00 0x800000>; | |
| phandle = <0x148>; | |
| }; | |
| secure_region@0 { | |
| compatible = "shared-dma-pool"; | |
| reusable; | |
| alignment = <0x00 0x400000>; | |
| size = <0x00 0xb400000>; | |
| phandle = <0xa0>; | |
| }; | |
| qseecom_region@0 { | |
| compatible = "shared-dma-pool"; | |
| reusable; | |
| alignment = <0x00 0x400000>; | |
| size = <0x00 0x1000000>; | |
| phandle = <0xa1>; | |
| }; | |
| qseecom_ta_region { | |
| compatible = "shared-dma-pool"; | |
| alloc-ranges = <0x00 0x00 0x00 0xffffffff>; | |
| reusable; | |
| alignment = <0x00 0x400000>; | |
| size = <0x00 0x400000>; | |
| phandle = <0xa2>; | |
| }; | |
| adsp_region@0 { | |
| compatible = "shared-dma-pool"; | |
| reusable; | |
| size = <0x00 0x400000>; | |
| phandle = <0x12b>; | |
| }; | |
| dfps_data_mem@90000000 { | |
| reg = <0x00 0x90000000 0x00 0x1000>; | |
| label = "dfps_data_mem"; | |
| status = "disabled"; | |
| phandle = <0xbb>; | |
| }; | |
| splash_region@0x90001000 { | |
| reg = <0x00 0x90001000 0x00 0x13ff000>; | |
| label = "cont_splash_mem"; | |
| phandle = <0xb0>; | |
| }; | |
| adsp_shmem_device_region@0xc0100000 { | |
| compatible = "shared-dma-pool"; | |
| label = "adsp_shmem_device_mem"; | |
| reusable; | |
| alloc-ranges = <0x00 0xc0100000 0x00 0x8200000>; | |
| alignment = <0x00 0x400000>; | |
| size = <0x00 0x800000>; | |
| phandle = <0x15c>; | |
| }; | |
| gpu_region@0 { | |
| compatible = "shared-dma-pool"; | |
| reusable; | |
| alloc-ranges = <0x00 0x80000000 0x00 0x10000000>; | |
| alignment = <0x00 0x400000>; | |
| size = <0x00 0x800000>; | |
| phandle = <0xa9>; | |
| }; | |
| mem_dump_region { | |
| compatible = "shared-dma-pool"; | |
| reusable; | |
| size = <0x400000>; | |
| phandle = <0xf2>; | |
| }; | |
| linux,cma { | |
| compatible = "shared-dma-pool"; | |
| reusable; | |
| alignment = <0x00 0x400000>; | |
| size = <0x00 0x1400000>; | |
| linux,cma-default; | |
| }; | |
| }; | |
| psci { | |
| compatible = "arm,psci-1.0"; | |
| method = "smc"; | |
| }; | |
| energy-costs { | |
| compatible = "sched-energy"; | |
| phandle = <0x2fd>; | |
| core-cost0 { | |
| busy-cost-data = <0x96000 0x17 0xd7a00 0x29 0xfd200 0x38 0x14cd00 0x58 0x177000 0x70 0x197d00 0x97 0x1b8a00 0xc2>; | |
| idle-cost-data = <0x14 0x10 0x0c 0x08>; | |
| phandle = <0x0a>; | |
| }; | |
| cluster-cost0 { | |
| busy-cost-data = <0x96000 0x08 0xd7a00 0x0e 0xfd200 0x12 0x14cd00 0x1c 0x177000 0x23 0x197d00 0x2b 0x1b8a00 0x36>; | |
| idle-cost-data = <0x04 0x03 0x02 0x01>; | |
| phandle = <0x0b>; | |
| }; | |
| cluster-cost1 { | |
| busy-cost-data = <0x9ab00 0x44 0xdc500 0x67 0x10b300 0x84 0x156300 0xc1 0x17bb00 0xe9 0x1b8a00 0x124 0x1e74e0 0x176 0x1ec300 0x179>; | |
| idle-cost-data = <0x04 0x03 0x02 0x01>; | |
| phandle = <0x0e>; | |
| }; | |
| core-cost1 { | |
| busy-cost-data = <0x9ab00 0x2d2 0xdc500 0x507 0x10b300 0x6cb 0x156300 0xb03 0x17bb00 0xdcc 0x1b8a00 0x13ae 0x1e74e0 0x19e0 0x1ec300 0x1a20>; | |
| idle-cost-data = <0x64 0x50 0x3c 0x28>; | |
| phandle = <0x0d>; | |
| }; | |
| }; | |
| qcom,battery-data { | |
| qcom,batt-id-range-pct = <0x0f>; | |
| phandle = <0x135>; | |
| qcom,alt_3900mah { | |
| qcom,max-voltage-uv = <0x432380>; | |
| qcom,fg-cc-cv-threshold-uv = <0x42fc70>; | |
| qcom,fastchg-current-ma = <0x7d0>; | |
| qcom,batt-id-kohm = <0x44>; | |
| qcom,battery-beta = <0x109a>; | |
| qcom,battery-therm-kohm = <0x64>; | |
| qcom,battery-type = "atl_4000mAh"; | |
| qcom,qg-batt-profile-ver = <0x64>; | |
| qcom,jeita-fcc-ranges = <0x00 0x32 0x5f370 0x33 0x96 0x11da50 0x97 0x1c2 0x1e8480 0x1c3 0x258 0x1dc130>; | |
| qcom,jeita-fv-ranges = <0x00 0x32 0x432380 0x33 0x96 0x432380 0x97 0x1c2 0x432380 0x1c3 0x258 0x401640>; | |
| qcom,step-chg-ranges = <0x36ee80 0x401640 0x34a490 0x401a28 0x419ce0 0x2a1d40 0x41a0c8 0x426030 0x1f95f0>; | |
| qcom,jeita-soft-thresholds = <0x5316 0x20b9>; | |
| qcom,jeita-hard-thresholds = <0x58ce 0x14a6>; | |
| qcom,fcc1-temp-lut { | |
| qcom,lut-col-legend = <0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-data = <0xedc 0xf1c 0xf69 0xf89 0xfa6>; | |
| }; | |
| qcom,fcc2-temp-lut { | |
| qcom,lut-col-legend = <0xfffffff6 0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-data = <0xf5b 0xf5e 0xf69 0xf6d 0xf71 0xf6e>; | |
| }; | |
| qcom,pc-temp-v1-lut { | |
| qcom,lut-col-legend = <0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0xaa78 0xaae3 0xab3e 0xab5b 0xab66 0xa988 0xa9fc 0xaa5f 0xaa81 0xaa84 0xa892 0xa90f 0xa97c 0xa9a3 0xa9a7 0xa7a1 0xa81f 0xa894 0xa8c0 0xa8c7 0xa6b7 0xa734 0xa7ab 0xa7d9 0xa7e3 0xa5d2 0xa64a 0xa6c1 0xa6f1 0xa6fd 0xa4ef 0xa564 0xa5d6 0xa608 0xa615 0xa412 0xa483 0xa4ed 0xa51e 0xa52c 0xa339 0xa3a6 0xa409 0xa438 0xa445 0xa266 0xa2cc 0xa327 0xa354 0xa35e 0xa198 0xa1f3 0xa249 0xa272 0xa27b 0xa0d9 0xa123 0xa16d 0xa195 0xa19c 0xa02d 0xa06a 0xa099 0xa0bb 0xa0c0 0x9f78 0x9fc1 0x9fd4 0x9fee 0x9fed 0x9e8c 0x9f02 0x9f15 0x9f28 0x9f20 0x9d79 0x9e0b 0x9e4c 0x9e63 0x9e5a 0x9c99 0x9d12 0x9d73 0x9d97 0x9d98 0x9bf9 0x9c5c 0x9cad 0x9cd2 0x9cdd 0x9b70 0x9bcf 0x9c12 0x9c27 0x9c2d 0x9ae8 0x9b42 0x9b87 0x9b91 0x9b8e 0x9a68 0x9aac 0x9ad9 0x9ae9 0x9ae5 0x99e2 0x9a0e 0x99f0 0x9a0f 0x9a10 0x9946 0x994e 0x990f 0x992e 0x9928 0x989c 0x9846 0x9859 0x9878 0x986d 0x97f6 0x976f 0x97ba 0x97d7 0x97d4 0x9747 0x9711 0x9740 0x9750 0x9750 0x96b3 0x96d3 0x96e4 0x96e3 0x96dd 0x9662 0x9695 0x9693 0x9684 0x9676 0x962c 0x9653 0x9641 0x9626 0x9617 0x95fe 0x9614 0x95f2 0x95cb 0x95bb 0x95d1 0x95d9 0x95ac 0x957c 0x9569 0x95a8 0x95a1 0x956a 0x9538 0x9520 0x9581 0x956f 0x9530 0x94fb 0x94de 0x955e 0x9545 0x94fe 0x94c2 0x94a0 0x953d 0x951f 0x94d3 0x948e 0x9469 0x951f 0x94fa 0x94a8 0x945b 0x9430 0x9504 0x94d9 0x9480 0x9429 0x93f3 0x94e0 0x94b1 0x9454 0x93f4 0x93b3 0x94a2 0x946f 0x9412 0x93ae 0x9365 0x9450 0x9413 0x93b5 0x9354 0x9304 0x93ed 0x93aa 0x934b 0x92ed 0x9297 0x936e 0x932f 0x92d3 0x9276 0x9217 0x92dd 0x92a3 0x924a 0x91ed 0x9189 0x923a 0x91fc 0x91a4 0x9149 0x90e9 0x91ba 0x9172 0x911c 0x90c4 0x9075 0x9162 0x9123 0x90cb 0x9076 0x9035 0x914f 0x910b 0x90b5 0x9062 0x9022 0x9141 0x90f8 0x90a3 0x9051 0x9018 0x9121 0x90e8 0x9095 0x903c 0x9004 0x90dd 0x90a2 0x904c 0x8fe2 0x8f9a 0x8fc9 0x8f82 0x8f1a 0x8e9e 0x8e47 0x8dff 0x8db3 0x8d52 0x8cd1 0x8c79 0x8ba9 0x8b65 0x8afe 0x8a79 0x8a20 0x8877 0x882f 0x87c9 0x8742 0x86e4 0x8356 0x8311 0x82b6 0x8227 0x81c7 0x7530 0x7530 0x7530 0x7530 0x7530>; | |
| }; | |
| qcom,pc-temp-v2-lut { | |
| qcom,lut-col-legend = <0xfffffff6 0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0xab81 0xab6d 0xab59 0xab2c 0xab0e 0xaafa 0xaa15 0xaa1f 0xaa34 0xaa20 0xaa0c 0xa9fb 0xa8c5 0xa8e8 0xa91f 0xa91d 0xa911 0xa902 0xa794 0xa7cc 0xa818 0xa825 0xa81e 0xa810 0xa679 0xa6ca 0xa722 0xa737 0xa734 0xa726 0xa57d 0xa5d2 0xa631 0xa64c 0xa64b 0xa63d 0xa4ae 0xa4db 0xa542 0xa562 0xa562 0xa556 0xa3f2 0xa3eb 0xa455 0xa47a 0xa47a 0xa470 0xa316 0xa2fd 0xa36e 0xa395 0xa395 0xa38c 0xa1f8 0xa20b 0xa28c 0xa2b3 0xa2b2 0xa2a9 0xa10d 0xa12f 0xa1b1 0xa1d4 0xa1d3 0xa1c9 0xa0a8 0xa084 0xa0e0 0xa0fb 0xa0f7 0xa0ef 0xa068 0x9ff1 0xa016 0xa025 0xa01e 0xa017 0x9fe1 0x9f36 0x9f48 0x9f57 0x9f4f 0x9f48 0x9e32 0x9e32 0x9e71 0x9e8d 0x9e89 0x9e7e 0x9c4d 0x9d1f 0x9d9f 0x9dc8 0x9dc8 0x9dbb 0x9b30 0x9c2e 0x9cdc 0x9cff 0x9d05 0x9cff 0x9a57 0x9b4b 0x9c21 0x9c38 0x9c46 0x9c4b 0x999f 0x9a78 0x9b5d 0x9b81 0x9b94 0x9b9c 0x9909 0x99b1 0x9a85 0x9ae4 0x9af8 0x9afb 0x987b 0x98f9 0x99ae 0x9a40 0x9a54 0x9a53 0x97c9 0x9852 0x98e2 0x996d 0x9980 0x997e 0x96fa 0x97bc 0x981e 0x9878 0x988a 0x988b 0x9659 0x971d 0x9772 0x97af 0x97c2 0x97c4 0x95ed 0x965a 0x96de 0x9718 0x972a 0x972d 0x9598 0x95a4 0x965c 0x9699 0x96a9 0x96ad 0x954e 0x953d 0x95ed 0x9626 0x9636 0x9639 0x9510 0x94f9 0x958b 0x95c0 0x95d0 0x95d3 0x94d7 0x94c0 0x952c 0x9563 0x9574 0x9575 0x94a0 0x948c 0x94c4 0x950d 0x951e 0x951d 0x946c 0x945e 0x9467 0x94c0 0x94d1 0x94ce 0x943a 0x9433 0x942c 0x9479 0x948b 0x9486 0x9409 0x940d 0x9402 0x9439 0x944c 0x9446 0x93d7 0x93e6 0x93dd 0x93fb 0x940a 0x9401 0x93a5 0x93bd 0x93b9 0x93c2 0x93c2 0x93b1 0x9372 0x9393 0x9394 0x938a 0x9375 0x9358 0x933b 0x9366 0x936d 0x9349 0x931e 0x92f7 0x9301 0x9336 0x9344 0x9302 0x92bc 0x9289 0x92c0 0x92fd 0x9311 0x92b5 0x925e 0x9223 0x926f 0x92b5 0x92c6 0x9265 0x920d 0x91cf 0x9210 0x925d 0x9265 0x920d 0x91bd 0x917e 0x91b0 0x91f5 0x91f5 0x91a3 0x9157 0x911a 0x914e 0x9170 0x916b 0x9121 0x90da 0x909f 0x90f6 0x90e8 0x90d7 0x909c 0x905c 0x9022 0x90ab 0x9062 0x9045 0x902a 0x8ff1 0x8fb7 0x9062 0x900f 0x9007 0x9009 0x8fd1 0x8f9c 0x903b 0x8ff7 0x8ff1 0x8ff9 0x8fc0 0x8f8f 0x900a 0x8fde 0x8fd2 0x8fde 0x8fb1 0x8f7d 0x8fc6 0x8fad 0x8fa4 0x8faf 0x8f85 0x8f4d 0x8f4e 0x8f4c 0x8f33 0x8f10 0x8eea 0x8e91 0x8e56 0x8e4f 0x8e0e 0x8d90 0x8d66 0x8d08 0x8c99 0x8c76 0x8c29 0x8b79 0x8b55 0x8af5 0x8a1c 0x89f0 0x8993 0x88ae 0x88a2 0x883a 0x868f 0x8669 0x8600 0x84a1 0x84e0 0x8478 0x8109 0x8123 0x80c6 0x7f18 0x7f8d 0x7eff 0x6c9f 0x6bc4 0x6bdc 0x6ba2 0x6bf5 0x6b3e>; | |
| }; | |
| qcom,pc-temp-z1-lut { | |
| qcom,lut-col-legend = <0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x320c 0x3001 0x2dc7 0x2c90 0x2c26 0x322d 0x302f 0x2df1 0x2cc6 0x2c68 0x3247 0x302c 0x2dfe 0x2ce5 0x2c87 0x3250 0x301d 0x2df9 0x2ce6 0x2c8e 0x3249 0x3014 0x2df2 0x2ce4 0x2c91 0x323c 0x300d 0x2de9 0x2ce1 0x2c92 0x3233 0x3006 0x2ddc 0x2cdb 0x2c92 0x3228 0x2ffc 0x2dd3 0x2cd6 0x2c91 0x3222 0x2ff0 0x2dcd 0x2cd5 0x2c90 0x3228 0x2fe6 0x2dc9 0x2cd4 0x2c91 0x3231 0x2fd7 0x2dc7 0x2cd4 0x2c92 0x322a 0x2fca 0x2dc6 0x2cd4 0x2c91 0x3203 0x2fc6 0x2dc5 0x2cd3 0x2c8e 0x31da 0x2fc3 0x2dc4 0x2cd2 0x2c8d 0x31c5 0x2fc1 0x2dc3 0x2cd0 0x2c8d 0x31b5 0x2fb6 0x2dc2 0x2ccf 0x2c8d 0x31b0 0x2fa8 0x2dc2 0x2ccf 0x2c8e 0x31b1 0x2fa5 0x2dc2 0x2cd0 0x2c8f 0x31b3 0x2fa8 0x2dc4 0x2cd0 0x2c91 0x31b9 0x2fad 0x2dc8 0x2cd1 0x2c92 0x31d1 0x2fb3 0x2dca 0x2cd2 0x2c92 0x31e3 0x2fb9 0x2dcd 0x2cd3 0x2c93 0x31e6 0x2fbd 0x2dd0 0x2cd5 0x2c93 0x31e8 0x2fc2 0x2dd3 0x2cd6 0x2c93 0x31e8 0x2fc5 0x2dd7 0x2cd8 0x2c95 0x31e9 0x2fc2 0x2ddb 0x2cdb 0x2c97 0x31ec 0x2fbd 0x2de1 0x2cde 0x2c9b 0x31ed 0x2fbc 0x2de6 0x2ce3 0x2c9f 0x31ec 0x2fc8 0x2deb 0x2ce7 0x2ca2 0x31eb 0x2fd6 0x2dee 0x2ceb 0x2ca5 0x31ec 0x2fd7 0x2df4 0x2cf0 0x2ca8 0x31ef 0x2fd2 0x2dfc 0x2cf4 0x2cab 0x31f2 0x2fd1 0x2e04 0x2cf8 0x2cae 0x31fb 0x2fd8 0x2e09 0x2cfc 0x2cb2 0x3203 0x2fe2 0x2e0c 0x2d00 0x2cb8 0x3202 0x2fea 0x2e10 0x2d04 0x2cbe 0x31fc 0x2ff4 0x2e16 0x2d09 0x2cbf 0x31fc 0x2ffb 0x2e1e 0x2d0d 0x2cbf 0x3203 0x2fff 0x2e26 0x2d11 0x2cc1 0x320f 0x3004 0x2e2e 0x2d15 0x2cc5 0x321c 0x3005 0x2e34 0x2d18 0x2cc9 0x322e 0x300d 0x2e37 0x2d1c 0x2ccb 0x3231 0x3012 0x2e3b 0x2d21 0x2ccc 0x322b 0x3021 0x2e41 0x2d25 0x2ccf 0x3226 0x3024 0x2e4c 0x2d29 0x2cd1 0x3230 0x3021 0x2e57 0x2d2c 0x2cd4 0x322a 0x3018 0x2e54 0x2d2b 0x2cd6 0x3238 0x301a 0x2e58 0x2d2f 0x2cd5 0x3223 0x3026 0x2e5a 0x2d2f 0x2cd8 0x3214 0x302e 0x2e60 0x2d33 0x2cdc 0x3244 0x302b 0x2e61 0x2d3a 0x2cdf 0x325a 0x3044 0x2e70 0x2d41 0x2ce5 0x327c 0x304b 0x2e76 0x2d4c 0x2cee 0x328e 0x3064 0x2e8a 0x2d57 0x2cf7 0x328e 0x3064 0x2e8a 0x2d57 0x2cf7 0x328e 0x3064 0x2e8a 0x2d57 0x2cf7>; | |
| }; | |
| qcom,pc-temp-z2-lut { | |
| qcom,lut-col-legend = <0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x2855 0x275f 0x27ce 0x27e7 0x284b 0x2788 0x27d5 0x283b 0x2817 0x27f8 0x278f 0x27d6 0x2865 0x283a 0x2855 0x2792 0x27d6 0x285b 0x2849 0x2874 0x2784 0x27d0 0x284a 0x286a 0x285c 0x2770 0x27bb 0x283b 0x2878 0x2839 0x275e 0x27a8 0x282b 0x286e 0x280a 0x274b 0x279c 0x2821 0x2859 0x27f2 0x2740 0x2792 0x281a 0x2825 0x27fd 0x273e 0x278d 0x2812 0x27c3 0x27d9 0x273d 0x278c 0x2813 0x279b 0x27b1 0x2741 0x278e 0x2820 0x27a8 0x27b3 0x2751 0x27b8 0x2829 0x27ba 0x27c2 0x275f 0x282f 0x2825 0x27c3 0x27d1 0x275b 0x2869 0x281d 0x27cb 0x27e1 0x274e 0x2835 0x281e 0x27d2 0x27ef 0x2749 0x27ef 0x282d 0x27d6 0x27f6 0x275b 0x27ea 0x283b 0x27db 0x27fd 0x2779 0x27fe 0x283c 0x27e5 0x280b 0x278f 0x2810 0x283b 0x27f9 0x282e 0x27a3 0x281c 0x2850 0x281b 0x2851 0x27b1 0x2825 0x28b7 0x2895 0x286b 0x27b5 0x2827 0x290a 0x2915 0x2884 0x27b9 0x281d 0x28d2 0x28fe 0x2894 0x27bd 0x2814 0x2858 0x287c 0x289f 0x27c4 0x2818 0x2837 0x283a 0x28a6 0x27cb 0x2825 0x287f 0x2863 0x28a7 0x27ce 0x282f 0x28c7 0x289c 0x289c 0x27cf 0x283e 0x28d1 0x28b1 0x2875 0x27d1 0x284b 0x28d3 0x28b9 0x2809 0x27d7 0x284b 0x28cd 0x28af 0x27c3 0x27e0 0x2848 0x28b3 0x2876 0x27c2 0x27e9 0x2846 0x289b 0x2833 0x27c7 0x27f1 0x284b 0x289e 0x2821 0x27d3 0x27fa 0x2854 0x28af 0x281f 0x27f8 0x2806 0x285d 0x28c1 0x2826 0x2825 0x2817 0x2868 0x28d5 0x2868 0x2854 0x2826 0x2873 0x28ec 0x28c1 0x2887 0x2832 0x2883 0x2906 0x28e0 0x28aa 0x283c 0x2893 0x2927 0x28ef 0x28c9 0x2847 0x289c 0x293b 0x28f7 0x28d8 0x2853 0x28a0 0x2946 0x28ea 0x28b8 0x2866 0x28a7 0x294c 0x28d9 0x2896 0x2893 0x28c3 0x294b 0x28d4 0x28c6 0x29a7 0x2953 0x296b 0x28e1 0x28c4 0x29bd 0x297c 0x296d 0x28ec 0x28a8 0x29e1 0x2975 0x295e 0x291d 0x290a 0x2a4c 0x2971 0x293b 0x28f0 0x28a9 0x2a4d 0x299c 0x292d 0x291a 0x2924 0x2a1d 0x29bd 0x2993 0x2950 0x292a 0x2a60 0x2a0b 0x2977 0x288d 0x27f9 0x2958 0x29bf 0x2974 0x283f 0x27c2 0x28ef 0x29d7 0x2954 0x2808 0x2784 0x2835 0x29ae 0x28ee 0x27da 0x2769 0x2835 0x29ae 0x28ee 0x27da 0x2769 0x2835 0x29ae 0x28ee 0x27da 0x2769>; | |
| }; | |
| qcom,pc-temp-z3-lut { | |
| qcom,lut-col-legend = <0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x4c92 0x4bf0 0x4ba7 0x4b8e 0x4b85 0x4cb1 0x4c63 0x4be5 0x4ba4 0x4b97 0x4d09 0x4c8b 0x4c03 0x4bb4 0x4ba5 0x4d2e 0x4ca1 0x4c0b 0x4bc0 0x4baf 0x4d36 0x4ca4 0x4c10 0x4bc9 0x4bb7 0x4d3a 0x4ca4 0x4c12 0x4bce 0x4bbb 0x4d3b 0x4ca2 0x4c14 0x4bd0 0x4bbc 0x4d3b 0x4c9d 0x4c15 0x4bd2 0x4bbb 0x4d3a 0x4c94 0x4c10 0x4bcf 0x4bb9 0x4d30 0x4c8d 0x4c09 0x4bc5 0x4bb2 0x4d21 0x4c87 0x4c02 0x4bbd 0x4baa 0x4d15 0x4c81 0x4bfc 0x4bb7 0x4ba7 0x4d12 0x4c7b 0x4bf5 0x4bb2 0x4ba5 0x4d14 0x4c74 0x4be9 0x4bad 0x4ba3 0x4d18 0x4c72 0x4bdb 0x4ba7 0x4b9f 0x4d19 0x4c6f 0x4bd8 0x4ba4 0x4b9a 0x4d10 0x4c67 0x4bdb 0x4ba3 0x4b97 0x4cf8 0x4c5d 0x4bde 0x4ba3 0x4b94 0x4cde 0x4c4d 0x4bd6 0x4ba0 0x4b90 0x4cd2 0x4c44 0x4bc8 0x4b9c 0x4b8c 0x4cc9 0x4c49 0x4bc8 0x4b9a 0x4b89 0x4cc4 0x4c55 0x4bde 0x4ba2 0x4b8d 0x4cd0 0x4c5e 0x4bf1 0x4bac 0x4b94 0x4cec 0x4c67 0x4be9 0x4ba8 0x4b93 0x4cfc 0x4c6c 0x4bd7 0x4b95 0x4b85 0x4d01 0x4c66 0x4bd1 0x4b8b 0x4b7c 0x4d04 0x4c5a 0x4bd1 0x4b93 0x4b89 0x4d02 0x4c55 0x4bd2 0x4b9f 0x4ba2 0x4cf7 0x4c55 0x4bdc 0x4bad 0x4bac 0x4ceb 0x4c57 0x4bf2 0x4bc2 0x4bb0 0x4ce0 0x4c5a 0x4bfa 0x4bcc 0x4bb2 0x4cd5 0x4c5e 0x4bfa 0x4bc6 0x4baf 0x4ccc 0x4c61 0x4bfa 0x4bbc 0x4ba8 0x4cc7 0x4c5e 0x4bf7 0x4bb5 0x4ba2 0x4cc1 0x4c59 0x4bee 0x4bb0 0x4b9a 0x4cbb 0x4c55 0x4be7 0x4bac 0x4b95 0x4cb4 0x4c52 0x4be2 0x4ba8 0x4b93 0x4caf 0x4c4e 0x4bde 0x4ba4 0x4b92 0x4cac 0x4c4a 0x4bda 0x4ba1 0x4b91 0x4ca9 0x4c45 0x4bd7 0x4b9e 0x4b92 0x4ca6 0x4c40 0x4bd4 0x4b9c 0x4b93 0x4c9e 0x4c3b 0x4bd3 0x4b9b 0x4b96 0x4c95 0x4c36 0x4bd1 0x4b9b 0x4b9a 0x4c88 0x4c2e 0x4bce 0x4b9e 0x4b9e 0x4c33 0x4c0c 0x4bc1 0x4b99 0x4b98 0x4c23 0x4bf7 0x4bb4 0x4b8d 0x4b81 0x4bef 0x4bf3 0x4baf 0x4b87 0x4b76 0x4bb5 0x4bf3 0x4bb3 0x4b87 0x4b80 0x4be3 0x4bde 0x4ba0 0x4b81 0x4b6f 0x4bd4 0x4bdf 0x4b95 0x4b80 0x4b78 0x4bdd 0x4bd3 0x4ba0 0x4b98 0x4b94 0x4b8d 0x4be2 0x4b9c 0x4b9c 0x4b9b 0x4b8a 0x4b95 0x4b99 0x4b9d 0x4b99 0x4b87 0x4b91 0x4b9f 0x4b9e 0x4b9d 0x4b87 0x4b91 0x4b9f 0x4b9e 0x4b9d 0x4b87 0x4b91 0x4b9f 0x4b9e 0x4b9d>; | |
| }; | |
| qcom,pc-temp-z4-lut { | |
| qcom,lut-col-legend = <0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x3d10 0x3c31 0x3ad4 0x3a45 0x39f1 0x3da1 0x3c40 0x3ada 0x3a44 0x3a0e 0x3d11 0x3bed 0x3ad7 0x3a40 0x3a0b 0x3c85 0x3b5e 0x3aa9 0x3a31 0x3a03 0x3c01 0x3afb 0x3a62 0x3a0c 0x39eb 0x3b8b 0x3aaf 0x3a31 0x39ec 0x39d1 0x3b33 0x3a70 0x3a0a 0x39d1 0x39bb 0x3aea 0x3a40 0x39e8 0x39ba 0x39a6 0x3ab3 0x3a19 0x39c8 0x39ab 0x3999 0x3a8e 0x39fa 0x39ae 0x39a0 0x3992 0x3a70 0x39e4 0x39a0 0x3997 0x398c 0x3a4d 0x39d0 0x3996 0x3990 0x3986 0x3a19 0x39b5 0x3990 0x398a 0x397e 0x39ec 0x3992 0x3990 0x3983 0x3976 0x39de 0x3983 0x3991 0x397b 0x396f 0x39e0 0x3995 0x398e 0x3973 0x3968 0x39e3 0x39ae 0x3984 0x396c 0x3962 0x39de 0x39ae 0x3978 0x3965 0x395c 0x39d7 0x399c 0x396e 0x395c 0x3956 0x39cf 0x398e 0x3966 0x3952 0x3951 0x39c4 0x3988 0x3967 0x394f 0x394e 0x39bd 0x3984 0x3986 0x396c 0x3968 0x39bd 0x398f 0x39b0 0x399a 0x399f 0x39bd 0x39e4 0x39db 0x39c2 0x39c2 0x39c1 0x3a2b 0x3a09 0x39eb 0x39da 0x39e3 0x3a27 0x3a15 0x39fb 0x39e5 0x3a07 0x3a14 0x3a08 0x39ea 0x39d0 0x3a08 0x3a00 0x39f3 0x39ca 0x39a4 0x39fb 0x39ec 0x39d7 0x39ac 0x3988 0x39ed 0x39d7 0x39b2 0x3987 0x3975 0x39e2 0x39c4 0x399a 0x3971 0x3969 0x39d9 0x39b2 0x398b 0x396a 0x3960 0x39cf 0x39a6 0x3982 0x3965 0x395a 0x39c4 0x399e 0x397d 0x3963 0x3959 0x39bb 0x3998 0x3979 0x3961 0x3959 0x39b2 0x3994 0x3978 0x3961 0x395a 0x39aa 0x3990 0x3978 0x3963 0x395c 0x39a6 0x398e 0x397a 0x3967 0x3961 0x39a3 0x3994 0x397f 0x396d 0x3965 0x39a2 0x399e 0x398c 0x3977 0x396a 0x39a2 0x39a0 0x3992 0x397d 0x396c 0x39a2 0x399b 0x3989 0x3977 0x3967 0x39a1 0x3995 0x3982 0x3972 0x3961 0x399a 0x3990 0x3982 0x3971 0x3960 0x398b 0x3977 0x3973 0x3968 0x3959 0x3984 0x396f 0x3965 0x395f 0x394f 0x39b8 0x3968 0x395b 0x3955 0x3940 0x39f0 0x3962 0x394b 0x3941 0x3938 0x39b4 0x396e 0x394f 0x3935 0x3934 0x39c3 0x396e 0x3962 0x393e 0x3932 0x39c3 0x3989 0x3972 0x3944 0x3938 0x3a2c 0x3981 0x397a 0x3943 0x3935 0x3a38 0x39dc 0x3980 0x3945 0x3939 0x3a48 0x39e4 0x397c 0x3946 0x3936 0x3a48 0x39e4 0x397c 0x3946 0x3936 0x3a48 0x39e4 0x397c 0x3946 0x3936>; | |
| }; | |
| qcom,pc-temp-z5-lut { | |
| qcom,lut-col-legend = <0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x3151 0x2fce 0x32eb 0x3710 0x3815 0x32ca 0x3732 0x3b74 0x3bdb 0x3e9d 0x3698 0x3b36 0x4024 0x3fbc 0x42a9 0x3923 0x3e1c 0x41a3 0x4281 0x45c2 0x3a70 0x4063 0x42ad 0x44bd 0x485f 0x3b8f 0x4259 0x4454 0x46c7 0x49d9 0x3d19 0x440f 0x4697 0x490d 0x4b21 0x3ee3 0x457b 0x4905 0x4aa7 0x4d33 0x4005 0x46c3 0x4c26 0x4ae6 0x4e63 0x4085 0x484f 0x4f28 0x4af5 0x4dcf 0x40ec 0x4a58 0x5090 0x4aea 0x4c68 0x41d0 0x4c29 0x51d5 0x4a94 0x4cc7 0x4696 0x506a 0x523b 0x4a38 0x4e99 0x4b6a 0x5af1 0x4f15 0x4a30 0x4f93 0x4fb0 0x603a 0x4a3b 0x4a5b 0x5057 0x5744 0x5daf 0x49ec 0x4ae1 0x513d 0x594c 0x5989 0x4f58 0x4cb7 0x5286 0x543d 0x57f7 0x5371 0x4f9d 0x54c1 0x4e7c 0x55ec 0x52dc 0x5347 0x576e 0x4dd9 0x5567 0x51bf 0x5919 0x5b5c 0x5012 0x636c 0x57ad 0x60ee 0x5f1f 0x53aa 0x7c41 0x8900 0x7103 0x6308 0x66aa 0x8b05 0xb1be 0x7fde 0x66e1 0x8c92 0x9507 0x9cee 0x77c7 0x635d 0xa055 0x9a4d 0x6c0c 0x54c8 0x4c5b 0xa789 0x8df1 0x54e7 0x4195 0x3c38 0xabea 0x70c2 0x4ce6 0x406b 0x3e20 0xa6da 0x63cf 0x4905 0x40c2 0x43dd 0x91df 0x61ec 0x4c6b 0x4642 0x4a68 0x7f62 0x613c 0x5751 0x57bd 0x536f 0x7528 0x6461 0x6322 0x63ff 0x5bd1 0x6d8d 0x6ead 0x7222 0x6789 0x62b0 0x6b6a 0x76d9 0x7e64 0x6a30 0x6830 0x6af0 0x7b94 0x8210 0x6ef8 0x6a03 0x6ab0 0x7f41 0x841f 0x7640 0x6b5e 0x6a8c 0x809f 0x84a5 0x79bc 0x6c08 0x6a60 0x82a2 0x8275 0x774a 0x6b63 0x6a6c 0x8392 0x7e3e 0x7217 0x69e5 0x6eed 0x80b4 0x7725 0x6aa5 0x66ad 0x74a8 0x7b1c 0x6abe 0x5e1d 0x5e33 0x746c 0x7627 0x626f 0x5589 0x58d7 0x6f1d 0x70a4 0x5f78 0x5272 0x5b4d 0x6e02 0x6c8b 0x5cbb 0x50d1 0x5e0b 0x706e 0x698a 0x580a 0x50c0 0x5de7 0x5fe9 0x6c31 0x58bf 0x4e94 0x57cf 0x5b00 0x61fa 0x5656 0x48e6 0x472f 0x4b8b 0x5e8e 0x541d 0x46d8 0x4716 0x36d3 0x5fa1 0x5ddd 0x4ed0 0x4fbf 0x400b 0x4d2e 0x4c6e 0x5377 0x48a8 0x411f 0x4f51 0x4251 0x48f3 0x4fd4 0x3fe7 0x45a9 0x3f69 0x4b07 0x5675 0x316f 0x497a 0x3bff 0x4aee 0x5a93 0x30a4 0x3349 0x3909 0x4930 0x5158 0x2f97 0x3210 0x39d1 0x46f1 0x4fde 0x2f97 0x3210 0x39d1 0x46f1 0x4fde 0x2f97 0x3210 0x39d1 0x46f1 0x4fde>; | |
| }; | |
| qcom,pc-temp-z6-lut { | |
| qcom,lut-col-legend = <0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x3db4 0x3b9d 0x39d8 0x3947 0x390e 0x3dd0 0x3bcc 0x3a01 0x395d 0x3931 0x3d89 0x3ba6 0x3a0e 0x3969 0x393c 0x3d3b 0x3b61 0x39fb 0x3966 0x393d 0x3ce6 0x3b2a 0x39dc 0x395d 0x3938 0x3c94 0x3afa 0x39c7 0x3952 0x3930 0x3c58 0x3acf 0x39b4 0x3949 0x3928 0x3c28 0x3aab 0x39a3 0x393f 0x391f 0x3bfe 0x3a8b 0x3991 0x3935 0x3917 0x3bda 0x3a73 0x3980 0x392a 0x3910 0x3bbb 0x3a62 0x3976 0x3922 0x3909 0x3b9a 0x3a51 0x396e 0x391c 0x3904 0x3b73 0x3a3d 0x3968 0x3916 0x38ff 0x3b55 0x3a26 0x3960 0x3910 0x38fa 0x3b47 0x3a1d 0x3959 0x3909 0x38f5 0x3b3e 0x3a20 0x3955 0x3903 0x38ef 0x3b35 0x3a23 0x3952 0x3900 0x38ea 0x3b26 0x3a1f 0x394f 0x38fc 0x38e6 0x3b18 0x3a0f 0x3946 0x38f7 0x38e2 0x3b10 0x3a05 0x393c 0x38f0 0x38dd 0x3b0b 0x3a06 0x393c 0x38ed 0x38da 0x3b08 0x3a0b 0x3956 0x38ff 0x38e8 0x3b0e 0x3a17 0x3972 0x3919 0x3903 0x3b1e 0x3a41 0x3981 0x3926 0x390f 0x3b2f 0x3a63 0x398c 0x392f 0x3914 0x3b43 0x3a60 0x398f 0x3932 0x3916 0x3b53 0x3a54 0x398a 0x392e 0x3914 0x3b53 0x3a4a 0x3984 0x3929 0x390f 0x3b4a 0x3a43 0x397f 0x3924 0x390a 0x3b41 0x3a3c 0x397b 0x3921 0x3905 0x3b39 0x3a38 0x3977 0x391c 0x3900 0x3b32 0x3a34 0x3973 0x3916 0x38fb 0x3b2b 0x3a31 0x396f 0x3910 0x38f6 0x3b25 0x3a2e 0x396b 0x390c 0x38f2 0x3b1f 0x3a2b 0x3966 0x3908 0x38ee 0x3b1b 0x3a2a 0x3964 0x3906 0x38ec 0x3b18 0x3a29 0x3963 0x3906 0x38ec 0x3b17 0x3a29 0x3963 0x3906 0x38ed 0x3b1a 0x3a2c 0x3964 0x3906 0x38ee 0x3b1e 0x3a30 0x396a 0x390a 0x38f1 0x3b21 0x3a32 0x396c 0x390c 0x38f3 0x3b24 0x3a31 0x3969 0x390a 0x38f2 0x3b25 0x3a30 0x3967 0x3908 0x38f2 0x3b24 0x3a2f 0x3967 0x390a 0x38f4 0x3aff 0x3a1e 0x395d 0x3904 0x38ef 0x3af6 0x3a12 0x3952 0x38fa 0x38de 0x3af1 0x3a0d 0x394c 0x38f3 0x38d2 0x3aec 0x3a0b 0x3946 0x38ea 0x38d4 0x3aec 0x3a07 0x3940 0x38e2 0x38c9 0x3aec 0x3a0a 0x3943 0x38e6 0x38ce 0x3afb 0x3a15 0x3953 0x38f8 0x38e1 0x3b07 0x3a1f 0x3957 0x38fb 0x38e6 0x3b18 0x3a26 0x395b 0x38ff 0x38e8 0x3b30 0x3a34 0x3962 0x3903 0x38ed 0x3b30 0x3a34 0x3962 0x3903 0x38ed 0x3b30 0x3a34 0x3962 0x3903 0x38ed>; | |
| }; | |
| qcom,pc-temp-y1-lut { | |
| qcom,lut-col-legend = <0xfffffff6 0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x191e 0x1777 0x1637 0x14cf 0x1426 0x13e2 0x1910 0x1751 0x162b 0x14c9 0x1422 0x13e3 0x18fb 0x1734 0x161c 0x14c4 0x141e 0x13e4 0x18e4 0x171f 0x160d 0x14bf 0x141a 0x13e3 0x18d1 0x1713 0x1601 0x14ba 0x1417 0x13e2 0x18c6 0x170f 0x15fb 0x14b7 0x1414 0x13e1 0x18c3 0x1717 0x15fa 0x14b3 0x1412 0x13e0 0x18c1 0x1726 0x15fa 0x14b0 0x1410 0x13dd 0x18c3 0x1728 0x15fb 0x14ae 0x140e 0x13dd 0x18d3 0x171c 0x1600 0x14ab 0x140c 0x13dc 0x18e2 0x1711 0x1603 0x14a9 0x140a 0x13db 0x18de 0x1711 0x1600 0x14a9 0x1409 0x13db 0x18d2 0x1713 0x15fa 0x14a9 0x1409 0x13da 0x18cf 0x1717 0x15f8 0x14a9 0x1408 0x13da 0x18db 0x1723 0x15f8 0x14a6 0x1406 0x13d9 0x18e8 0x172d 0x15f9 0x14a3 0x1404 0x13d9 0x18e3 0x172a 0x15f9 0x14a3 0x1404 0x13d9 0x18d3 0x1721 0x15f7 0x14a5 0x1406 0x13d9 0x18cb 0x171c 0x15f7 0x14a6 0x1406 0x13d9 0x18c9 0x171d 0x15f6 0x14a8 0x1407 0x13d9 0x18c8 0x171e 0x15f6 0x14aa 0x1407 0x13d9 0x18cb 0x1721 0x15f9 0x14ad 0x1408 0x13da 0x18d3 0x1729 0x15fd 0x14b0 0x140a 0x13dc 0x18d7 0x172d 0x1600 0x14b2 0x140b 0x13dd 0x18cc 0x1728 0x1601 0x14b4 0x140c 0x13dd 0x18bd 0x1721 0x1602 0x14b6 0x140d 0x13de 0x18b8 0x171e 0x1605 0x14b9 0x140f 0x13de 0x18b5 0x171c 0x160f 0x14bd 0x1412 0x13df 0x18b3 0x171b 0x1614 0x14c2 0x1414 0x13e0 0x18ae 0x1719 0x1616 0x14c7 0x1419 0x13e2 0x18a9 0x1718 0x161a 0x14cc 0x141c 0x13e5 0x18ab 0x1718 0x1618 0x14d1 0x141f 0x13e8 0x18bb 0x171a 0x1613 0x14d7 0x1421 0x13ec 0x18c6 0x171b 0x1610 0x14dd 0x1423 0x13ee 0x18bd 0x171a 0x1613 0x14e3 0x1427 0x13f0 0x18ad 0x1719 0x1619 0x14e9 0x142b 0x13f2 0x18a7 0x171a 0x161c 0x14ee 0x142e 0x13f4 0x18a0 0x171b 0x161e 0x14f6 0x142f 0x13f6 0x189a 0x171c 0x1620 0x14fa 0x1431 0x13f7 0x189e 0x1719 0x1623 0x14fc 0x1433 0x13f9 0x18a9 0x1715 0x1628 0x14fe 0x1435 0x13fa 0x18ad 0x1712 0x162d 0x1500 0x1437 0x13fb 0x18ab 0x1714 0x162d 0x1505 0x1439 0x13fd 0x18a8 0x1716 0x162a 0x150e 0x143d 0x1400 0x18a5 0x1714 0x1625 0x151c 0x1442 0x1404 0x1895 0x1715 0x1635 0x1521 0x1447 0x1405 0x18a4 0x171a 0x1627 0x152d 0x1447 0x1406 0x18b4 0x1724 0x162a 0x1524 0x1447 0x1401 0x18c0 0x1726 0x1622 0x1524 0x1448 0x1405 0x18da 0x1722 0x161e 0x1523 0x1447 0x1406 0x18c6 0x1726 0x161f 0x152f 0x144b 0x1407 0x18c2 0x172d 0x1627 0x1539 0x1451 0x140c 0x18dc 0x1746 0x1639 0x154b 0x145a 0x1414 0x1902 0x174b 0x164e 0x156b 0x1464 0x141c 0x1902 0x174b 0x164e 0x156b 0x1464 0x141c 0x1902 0x174b 0x164e 0x156b 0x1464 0x141c>; | |
| }; | |
| qcom,pc-temp-y2-lut { | |
| qcom,lut-col-legend = <0xfffffff6 0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x277f 0x2740 0x28dc 0x2af9 0x2b0f 0x2aff 0x2755 0x275d 0x28e6 0x2aeb 0x2ae6 0x2ade 0x2749 0x2781 0x28f0 0x2ad5 0x2aba 0x2ac0 0x2756 0x27a4 0x28fb 0x2aba 0x2a92 0x2aa3 0x2774 0x27c0 0x2903 0x2a9f 0x2a71 0x2a89 0x279e 0x27cc 0x2909 0x2a87 0x2a5d 0x2a72 0x27d9 0x27c8 0x290d 0x2a6d 0x2a53 0x2a5e 0x2828 0x27c0 0x2910 0x2a52 0x2a4f 0x2a4c 0x2872 0x27cf 0x2911 0x2a4d 0x2a4f 0x2a41 0x28c0 0x2861 0x2914 0x2a5d 0x2a55 0x2a3a 0x28fe 0x28dc 0x291a 0x2a6b 0x2a58 0x2a35 0x291d 0x28d1 0x292f 0x2a6d 0x2a4c 0x2a37 0x2932 0x28b0 0x295d 0x2a75 0x2a35 0x2a3d 0x295f 0x28ab 0x2995 0x2a80 0x2a3b 0x2a40 0x29f8 0x2902 0x29e7 0x2a98 0x2a83 0x2a3f 0x2a7d 0x297e 0x2a33 0x2aba 0x2ad7 0x2a41 0x2991 0x29e7 0x2a5d 0x2aec 0x2b09 0x2a5b 0x26f5 0x2a52 0x2a7d 0x2b33 0x2b34 0x2a9f 0x25d5 0x2aba 0x2a91 0x2b77 0x2b64 0x2af0 0x25d2 0x2b37 0x2a9f 0x2bc4 0x2bd2 0x2b75 0x25d0 0x2b92 0x2aad 0x2bf8 0x2c2e 0x2bdc 0x25cd 0x2b72 0x2ac2 0x2be2 0x2bfd 0x2bb8 0x25c9 0x2ae1 0x2ade 0x2ba0 0x2b70 0x2b48 0x25c7 0x2a58 0x2b00 0x2b86 0x2b2d 0x2b1c 0x25c6 0x298b 0x2b33 0x2b97 0x2b20 0x2b37 0x25c6 0x28a8 0x2b64 0x2bab 0x2b19 0x2b5c 0x25c5 0x27fd 0x2b7c 0x2bb7 0x2b3a 0x2b74 0x25c4 0x26a3 0x2b8d 0x2bce 0x2b9c 0x2b8e 0x25c3 0x25e8 0x2b93 0x2be8 0x2bcf 0x2bac 0x25c2 0x25e1 0x2b8e 0x2c04 0x2bd2 0x2bd5 0x25c2 0x25dc 0x2b87 0x2c25 0x2bd5 0x2bfb 0x25c1 0x25d8 0x2b7f 0x2c50 0x2c08 0x2c09 0x25c0 0x25d3 0x2b73 0x2c87 0x2c8d 0x2c0e 0x25c0 0x25cf 0x2b66 0x2ca5 0x2cd5 0x2c0b 0x25bf 0x25cc 0x2b58 0x2ca7 0x2cc2 0x2bee 0x25bf 0x25c9 0x2b43 0x2c9f 0x2c9a 0x2bc7 0x25be 0x25c7 0x2b2a 0x2c8c 0x2c6e 0x2bb4 0x25be 0x25c4 0x2b06 0x2c64 0x2c0c 0x2baa 0x25be 0x25c2 0x2adb 0x2c3f 0x2bd2 0x2ba2 0x25bd 0x25c0 0x2aa8 0x2c1b 0x2bcf 0x2b8c 0x25bd 0x25bf 0x2a67 0x2bf5 0x2bcd 0x2b70 0x25bc 0x25be 0x2a00 0x2bd6 0x2bc7 0x2b6d 0x25bc 0x25bd 0x292f 0x2ba7 0x2bb6 0x2b99 0x25bc 0x25bc 0x2801 0x2b6e 0x2b92 0x2b6f 0x25bb 0x25bb 0x2647 0x2b2e 0x2b49 0x2ad2 0x25bb 0x25ba 0x25fb 0x2afb 0x2af0 0x2a58 0x25bb 0x25ba 0x25fd 0x2b1e 0x2ac6 0x2a74 0x25bb 0x25ba 0x25eb 0x2b1e 0x2b39 0x2a7c 0x25ba 0x25b9 0x25de 0x2b1e 0x2b01 0x2a8c 0x25ba 0x25b9 0x25d5 0x2add 0x2afd 0x2a4a 0x25b9 0x25b8 0x25cc 0x2aa0 0x2a80 0x2a44 0x25b8 0x25b8 0x25c5 0x2a64 0x2a4f 0x29fb 0x25b7 0x25b7 0x25c0 0x2a0a 0x2a28 0x29fa 0x25b4 0x25b6 0x25bb 0x29c7 0x2a04 0x2948 0x25b4 0x25b6 0x25bb 0x29c7 0x2a04 0x2948 0x25b4 0x25b6 0x25bb 0x29c7 0x2a04 0x2948>; | |
| }; | |
| qcom,pc-temp-y3-lut { | |
| qcom,lut-col-legend = <0xfffffff6 0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x36aa 0x352d 0x3451 0x33f5 0x33df 0x33e0 0x367a 0x352e 0x3450 0x33f3 0x33e0 0x33de 0x3643 0x352d 0x3450 0x33f2 0x33e1 0x33dd 0x3611 0x352b 0x3451 0x33f2 0x33e1 0x33dd 0x35eb 0x3528 0x3451 0x33f2 0x33e2 0x33dd 0x35da 0x3524 0x3451 0x33f2 0x33e3 0x33dd 0x35e2 0x351d 0x3451 0x33f3 0x33e4 0x33de 0x35f1 0x3516 0x3452 0x33f4 0x33e5 0x33e0 0x35e6 0x3515 0x3451 0x33f5 0x33e6 0x33e2 0x355b 0x351a 0x3450 0x33f6 0x33e7 0x33e3 0x34e3 0x351e 0x344e 0x33f7 0x33e8 0x33e4 0x34e2 0x34f9 0x344f 0x33f8 0x33e8 0x33e5 0x34e9 0x34a8 0x3451 0x33fa 0x33e9 0x33e6 0x34ea 0x348f 0x3450 0x33fb 0x33ea 0x33e6 0x34dc 0x34a3 0x3445 0x33fc 0x33ee 0x33e6 0x34c6 0x34b7 0x343a 0x33fd 0x33f1 0x33e7 0x34af 0x34af 0x343c 0x33fc 0x33f0 0x33e8 0x3495 0x3492 0x3441 0x33fa 0x33ef 0x33ea 0x348c 0x3475 0x3442 0x33f9 0x33ee 0x33eb 0x349c 0x3458 0x3438 0x33fb 0x33ee 0x33ea 0x34ad 0x3440 0x342c 0x33fc 0x33ed 0x33e9 0x34aa 0x3435 0x3424 0x33fa 0x33ea 0x33e6 0x3499 0x342e 0x341f 0x33f5 0x33e4 0x33e0 0x348f 0x3429 0x3419 0x33f2 0x33e2 0x33de 0x348d 0x3425 0x3414 0x33f0 0x33e1 0x33dd 0x348c 0x3421 0x3410 0x33ee 0x33e0 0x33dd 0x3491 0x3418 0x340d 0x33ee 0x33e0 0x33dd 0x34a1 0x3407 0x340a 0x33ed 0x33e0 0x33de 0x34b4 0x33ff 0x3408 0x33ec 0x33e0 0x33de 0x34c5 0x3404 0x3404 0x33ec 0x33e0 0x33dd 0x34d9 0x340f 0x3401 0x33ec 0x33df 0x33dc 0x34ef 0x341c 0x3401 0x33ec 0x33e0 0x33dc 0x3508 0x342f 0x3403 0x33ed 0x33e1 0x33dc 0x3522 0x3442 0x3405 0x33ed 0x33e2 0x33dd 0x353c 0x3452 0x3406 0x33ed 0x33e2 0x33de 0x3557 0x3462 0x3407 0x33ee 0x33e2 0x33de 0x3573 0x3477 0x3409 0x33ed 0x33e1 0x33de 0x3592 0x3492 0x340b 0x33ec 0x33df 0x33dd 0x35b2 0x34b2 0x340c 0x33ec 0x33de 0x33dc 0x35d1 0x34d3 0x340d 0x33eb 0x33df 0x33dd 0x35f0 0x34f8 0x340e 0x33ea 0x33e0 0x33de 0x3611 0x3522 0x340f 0x33ea 0x33e0 0x33df 0x3635 0x3551 0x3410 0x33ec 0x33e1 0x33e0 0x3660 0x3583 0x3413 0x33ed 0x33e1 0x33e0 0x3695 0x35b6 0x3421 0x33ee 0x33e2 0x33dd 0x36df 0x35fc 0x343d 0x33f6 0x33e6 0x33e4 0x36d8 0x35f8 0x343d 0x33f8 0x33e6 0x33e7 0x36ce 0x3600 0x3445 0x33fa 0x33ee 0x33e9 0x3715 0x3637 0x345c 0x3401 0x33ef 0x33e9 0x3763 0x3676 0x346d 0x3400 0x33ec 0x33e5 0x37be 0x36ae 0x347c 0x33fe 0x33e8 0x33e5 0x3830 0x36fa 0x34a6 0x3403 0x33e9 0x33e6 0x390b 0x376f 0x34f9 0x340a 0x33ef 0x33ea 0x3b2c 0x380d 0x358b 0x3416 0x33f6 0x33ef 0x3b2c 0x380d 0x358b 0x3416 0x33f6 0x33ef 0x3b2c 0x380d 0x358b 0x3416 0x33f6 0x33ef>; | |
| }; | |
| qcom,pc-temp-y4-lut { | |
| qcom,lut-col-legend = <0xfffffff6 0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x438a 0x423e 0x4112 0x4065 0x4052 0x404a 0x43a8 0x4259 0x4122 0x4066 0x404e 0x4049 0x43b7 0x426b 0x412f 0x4067 0x404c 0x4048 0x43b7 0x4276 0x4138 0x4068 0x404a 0x4047 0x43ad 0x427b 0x413d 0x4069 0x404a 0x4046 0x439c 0x427c 0x413f 0x406b 0x404a 0x4046 0x4352 0x4279 0x413b 0x406c 0x404a 0x4046 0x42e1 0x426f 0x4135 0x406e 0x404b 0x4046 0x42d7 0x425d 0x4133 0x4071 0x404d 0x4047 0x4390 0x4226 0x4133 0x4076 0x4050 0x4048 0x4444 0x41fb 0x4135 0x407c 0x4054 0x4049 0x4473 0x4264 0x413b 0x4080 0x4059 0x404b 0x4490 0x434f 0x414a 0x4085 0x405f 0x404f 0x4481 0x4394 0x4161 0x408d 0x4064 0x4054 0x4360 0x4302 0x4193 0x409f 0x4067 0x405b 0x4244 0x4261 0x41ba 0x40b3 0x406b 0x4063 0x4240 0x4230 0x41b4 0x40c5 0x4074 0x4069 0x4268 0x4215 0x4199 0x40d7 0x4081 0x406e 0x4277 0x41fe 0x417c 0x40e2 0x4092 0x4077 0x4245 0x41ed 0x4158 0x40eb 0x40ad 0x408e 0x41f7 0x41db 0x4133 0x40f0 0x40c2 0x40a2 0x41b2 0x41bf 0x410d 0x40d7 0x40b0 0x4095 0x416a 0x4197 0x40e7 0x4091 0x407c 0x406e 0x414c 0x4167 0x40d1 0x406c 0x405e 0x4057 0x414d 0x4115 0x40c6 0x4061 0x4053 0x404d 0x414f 0x40cb 0x40bf 0x405c 0x404c 0x4048 0x414f 0x40cb 0x40b9 0x405d 0x404d 0x4048 0x414f 0x40ef 0x40b5 0x4062 0x4051 0x404b 0x414f 0x4106 0x40ae 0x4069 0x4056 0x404f 0x414f 0x4107 0x409b 0x406f 0x405f 0x4057 0x4150 0x4105 0x4087 0x4077 0x4069 0x4061 0x4152 0x4105 0x4086 0x407e 0x4074 0x406c 0x4154 0x4105 0x408e 0x4085 0x407e 0x4077 0x4156 0x4108 0x4098 0x4088 0x4082 0x407b 0x415a 0x4110 0x40a4 0x4088 0x407f 0x4077 0x4160 0x411c 0x40b2 0x4087 0x4078 0x4070 0x4164 0x4126 0x40bf 0x4084 0x406e 0x4065 0x4167 0x412f 0x40cf 0x4078 0x405c 0x4055 0x4168 0x4135 0x40d6 0x4070 0x4053 0x404d 0x4162 0x4134 0x40d6 0x4072 0x4056 0x404f 0x4156 0x4133 0x40d4 0x4075 0x4059 0x4053 0x4150 0x412f 0x40d4 0x4077 0x4059 0x4053 0x414e 0x4123 0x40d5 0x4079 0x4058 0x4050 0x414f 0x4116 0x40d7 0x4078 0x4051 0x4049 0x4164 0x410b 0x40de 0x4072 0x4045 0x403f 0x4187 0x4118 0x40f1 0x4083 0x4056 0x404f 0x4181 0x4116 0x40f1 0x407f 0x4061 0x405f 0x417b 0x411d 0x4104 0x408d 0x4073 0x407b 0x4198 0x413d 0x4122 0x40a5 0x408e 0x4094 0x41a5 0x4158 0x4142 0x40a5 0x407f 0x406d 0x4198 0x4153 0x4139 0x4088 0x4052 0x404a 0x417a 0x413f 0x4135 0x408f 0x4056 0x404c 0x4182 0x4142 0x4144 0x40a8 0x4060 0x4052 0x420c 0x4164 0x4173 0x40df 0x4091 0x4088 0x420c 0x4164 0x4173 0x40df 0x4091 0x4088 0x420c 0x4164 0x4173 0x40df 0x4091 0x4088>; | |
| }; | |
| qcom,pc-temp-y5-lut { | |
| qcom,lut-col-legend = <0xfffffff6 0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x3637 0x2c28 0x389e 0x4d05 0x4629 0x55d8 0x3292 0x2e52 0x39c7 0x4b33 0x46d9 0x4f1c 0x30e3 0x30bc 0x3b6e 0x4880 0x4727 0x4a1b 0x30ce 0x331a 0x3d36 0x4585 0x472a 0x46af 0x31f9 0x351c 0x3ec3 0x42de 0x46f9 0x44b5 0x340b 0x3676 0x3fb8 0x4125 0x46ab 0x440a 0x3bf4 0x371f 0x403c 0x4040 0x4627 0x459d 0x480a 0x3798 0x40a9 0x3f61 0x4554 0x484f 0x49b8 0x386c 0x40c4 0x3e3b 0x4453 0x48b4 0x3bc7 0x3a6e 0x409a 0x3c7c 0x42ec 0x47d9 0x2fd0 0x3be6 0x4013 0x3b19 0x4149 0x46ab 0x3504 0x3a24 0x3d63 0x3abe 0x3f18 0x4537 0x4251 0x3635 0x38e7 0x3abc 0x3cc6 0x4355 0x490d 0x35dc 0x37b5 0x3a47 0x3c57 0x411c 0x4b86 0x428a 0x39ab 0x37f8 0x3dd4 0x3dd7 0x4cd2 0x4eca 0x3d1b 0x3608 0x3f1d 0x3b9d 0x4830 0x4d3d 0x44a3 0x3644 0x3e0f 0x3bea 0x3b61 0x46f4 0x5077 0x3768 0x3b82 0x3cd7 0x3641 0x43d5 0x5466 0x39be 0x3a9c 0x3d52 0x3d9c 0x4339 0x520e 0x43d0 0x3c1a 0x3cee 0x45e8 0x42eb 0x4f89 0x4f19 0x3e98 0x3cd0 0x44a7 0x45b6 0x4f1d 0x54c5 0x4327 0x3fbb 0x3cdb 0x4ed6 0x4ef7 0x58fb 0x4a7c 0x4612 0x36c1 0x533c 0x4ea8 0x5a15 0x4d49 0x4965 0x3369 0x4d45 0x4d1f 0x5670 0x4cbe 0x4abe 0x3132 0x4444 0x4b90 0x515b 0x4b94 0x4b9c 0x30e6 0x3e30 0x4d7d 0x4dca 0x49aa 0x4adf 0x30e1 0x35fc 0x545f 0x4a1e 0x4649 0x47ca 0x30dc 0x31da 0x57aa 0x48be 0x437a 0x444a 0x310d 0x321e 0x50b2 0x48c4 0x4121 0x3f9e 0x3172 0x32cf 0x47d8 0x48d3 0x3f8b 0x3bbe 0x31d9 0x3384 0x4716 0x49cc 0x4034 0x3b9f 0x3279 0x351c 0x48f8 0x4d65 0x436a 0x3d10 0x3325 0x3621 0x4a05 0x5068 0x46d9 0x3f20 0x33c1 0x3631 0x498c 0x5243 0x4aba 0x443f 0x3471 0x363a 0x48d0 0x5384 0x4dde 0x49ac 0x354e 0x367a 0x4896 0x530c 0x4d6a 0x4a76 0x36ac 0x37b9 0x48fa 0x4fc3 0x49d1 0x49ec 0x37c9 0x38c2 0x4922 0x4bf8 0x46c2 0x494d 0x37e7 0x38ee 0x4827 0x46ce 0x4512 0x48a3 0x3756 0x3906 0x4653 0x417f 0x43d9 0x4842 0x3695 0x38fd 0x444d 0x3ff4 0x439a 0x4ab4 0x349b 0x3860 0x4162 0x3fa1 0x4448 0x5324 0x335e 0x37a2 0x3d54 0x3fd6 0x461a 0x50b4 0x32e8 0x3632 0x3789 0x4072 0x48e6 0x4316 0x337a 0x34ec 0x3805 0x412f 0x4018 0x44d7 0x343b 0x3628 0x381c 0x4341 0x3def 0x4634 0x34ee 0x3724 0x3629 0x40c1 0x4735 0x43b5 0x355f 0x3619 0x375f 0x450b 0x43c0 0x4038 0x3698 0x3707 0x3790 0x455a 0x4228 0x3f19 0x3754 0x36ce 0x379a 0x4758 0x46bd 0x4886 0x35e7 0x361c 0x3897 0x4c84 0x47c6 0x4bd4 0x33e2 0x361c 0x37e3 0x4d36 0x556b 0x55a8 0x30a1 0x361e 0x382c 0x52ad 0x637e 0x64ac 0x30a1 0x361e 0x382c 0x52ad 0x637e 0x64ac 0x30a1 0x361e 0x382c 0x52ad 0x637e 0x64ac>; | |
| }; | |
| qcom,pc-temp-y6-lut { | |
| qcom,lut-col-legend = <0xfffffff6 0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x18c1 0x1649 0x14bb 0x13c4 0x1399 0x1391 0x1896 0x1646 0x14b8 0x13c3 0x1398 0x138f 0x186d 0x1641 0x14b4 0x13c2 0x1398 0x138e 0x1846 0x163c 0x14b1 0x13c2 0x1398 0x138e 0x1824 0x1635 0x14ad 0x13c1 0x1398 0x138e 0x1808 0x162e 0x14a9 0x13c1 0x1398 0x138e 0x17f4 0x1626 0x14a5 0x13c2 0x1399 0x138f 0x17e4 0x161d 0x14a0 0x13c2 0x139a 0x1390 0x17ce 0x1613 0x149c 0x13c4 0x139b 0x1392 0x17ac 0x1607 0x1498 0x13c5 0x139d 0x1393 0x1796 0x15ff 0x1495 0x13c7 0x139e 0x1394 0x179f 0x1605 0x1496 0x13c9 0x13a0 0x1395 0x17b7 0x1612 0x1498 0x13cb 0x13a2 0x1397 0x17ba 0x1615 0x149b 0x13cf 0x13a4 0x1398 0x176f 0x1603 0x14a0 0x13d4 0x13a7 0x139b 0x171b 0x15eb 0x14a3 0x13da 0x13ab 0x139d 0x1701 0x15d9 0x14a2 0x13de 0x13ad 0x13a0 0x16f1 0x15c9 0x149f 0x13e2 0x13b0 0x13a2 0x16e9 0x15ba 0x149a 0x13e5 0x13b4 0x13a6 0x16e6 0x15ab 0x148a 0x13e8 0x13ba 0x13ab 0x16e3 0x159f 0x1476 0x13eb 0x13c0 0x13b0 0x16da 0x1599 0x1466 0x13e2 0x13b9 0x13ab 0x16c7 0x1595 0x1458 0x13ca 0x13a6 0x139b 0x16bf 0x1591 0x1450 0x13be 0x139b 0x1392 0x16c4 0x1583 0x144d 0x13ba 0x1397 0x138f 0x16ce 0x1575 0x144a 0x13b8 0x1395 0x138d 0x16d9 0x1577 0x144b 0x13b8 0x1395 0x138d 0x16ea 0x1588 0x144c 0x13ba 0x1397 0x138e 0x16fb 0x159c 0x144d 0x13bc 0x1398 0x1390 0x170c 0x15b1 0x144b 0x13be 0x139b 0x1391 0x171e 0x15c8 0x1449 0x13c1 0x139e 0x1394 0x1731 0x15df 0x144c 0x13c4 0x13a1 0x1397 0x1746 0x15f7 0x1458 0x13c8 0x13a6 0x139b 0x175c 0x1611 0x1466 0x13ca 0x13a7 0x139d 0x1772 0x162d 0x1474 0x13cc 0x13a7 0x139c 0x1789 0x164a 0x1483 0x13cd 0x13a5 0x139a 0x17a2 0x166a 0x1494 0x13cc 0x13a2 0x1398 0x17be 0x168d 0x14a6 0x13c9 0x139c 0x1393 0x17d9 0x16b2 0x14b8 0x13c8 0x1399 0x1390 0x17f1 0x16d8 0x14ca 0x13c9 0x139a 0x1391 0x1807 0x16ff 0x14dd 0x13cb 0x139c 0x1393 0x1821 0x1727 0x14f4 0x13cd 0x139d 0x1394 0x1840 0x1750 0x150f 0x13d1 0x139d 0x1394 0x1867 0x177b 0x152e 0x13d4 0x139c 0x1392 0x189d 0x17aa 0x1552 0x13d7 0x139a 0x138f 0x18e8 0x17eb 0x158e 0x13e6 0x13a2 0x1398 0x18e5 0x17e9 0x1589 0x13e4 0x13a6 0x139f 0x18e2 0x17f3 0x159f 0x13ea 0x13b0 0x13a9 0x1926 0x182c 0x15d1 0x13f8 0x13b9 0x13af 0x196c 0x186a 0x15fd 0x13f8 0x13b2 0x13a2 0x19b7 0x189a 0x1624 0x13f2 0x13a3 0x1398 0x1a16 0x18d8 0x166b 0x13fe 0x13a6 0x139a 0x1ae4 0x1942 0x16da 0x1413 0x13af 0x13a0 0x1d0c 0x19e1 0x177c 0x1437 0x13c3 0x13b5 0x1d0c 0x19e1 0x177c 0x1437 0x13c3 0x13b5 0x1d0c 0x19e1 0x177c 0x1437 0x13c3 0x13b5>; | |
| }; | |
| }; | |
| qcom,light_3900mah { | |
| qcom,max-voltage-uv = <0x432380>; | |
| qcom,fg-cc-cv-threshold-uv = <0x42fc70>; | |
| qcom,fastchg-current-ma = <0x7d0>; | |
| qcom,batt-id-kohm = <0x64>; | |
| qcom,battery-beta = <0x109a>; | |
| qcom,battery-therm-kohm = <0x64>; | |
| qcom,battery-type = "light_4000mAh"; | |
| qcom,qg-batt-profile-ver = <0x64>; | |
| qcom,jeita-fcc-ranges = <0x00 0x32 0x5f370 0x33 0x96 0x11da50 0x97 0x1c2 0x1e8480 0x1c3 0x258 0x1dc130>; | |
| qcom,jeita-fv-ranges = <0x00 0x32 0x432380 0x33 0x96 0x432380 0x97 0x1c2 0x432380 0x1c3 0x258 0x401640>; | |
| qcom,step-chg-ranges = <0x36ee80 0x401640 0x34a490 0x401a28 0x419ce0 0x2a1d40 0x41a0c8 0x426030 0x1f95f0>; | |
| qcom,jeita-soft-thresholds = <0x5316 0x20b9>; | |
| qcom,jeita-hard-thresholds = <0x58ce 0x14a6>; | |
| qcom,fcc1-temp-lut { | |
| qcom,lut-col-legend = <0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-data = <0xefb 0xf46 0xf90 0xfbc 0xfc8>; | |
| }; | |
| qcom,fcc2-temp-lut { | |
| qcom,lut-col-legend = <0xfffffff6 0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-data = <0xf8a 0xf8a 0xf9a 0xf8a 0xf9e 0xf9d>; | |
| }; | |
| qcom,pc-temp-v1-lut { | |
| qcom,lut-col-legend = <0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0xaa66 0xaad8 0xab3b 0xab62 0xab69 0xa96c 0xa9dc 0xaa5d 0xaa76 0xaa78 0xa863 0xa8e2 0xa969 0xa991 0xa994 0xa764 0xa7ee 0xa877 0xa8aa 0xa8b1 0xa678 0xa700 0xa787 0xa7be 0xa7c8 0xa595 0xa614 0xa698 0xa6d0 0xa6dc 0xa4b8 0xa52c 0xa5ac 0xa5e5 0xa5f2 0xa3e2 0xa44b 0xa4c2 0xa4f9 0xa507 0xa315 0xa372 0xa3dd 0xa411 0xa41f 0xa253 0xa29e 0xa2fd 0xa32b 0xa33b 0xa19b 0xa1d3 0xa221 0xa247 0xa258 0xa0dc 0xa110 0xa14a 0xa168 0xa179 0xa010 0xa04e 0xa07c 0xa08c 0xa09c 0x9f38 0x9f8d 0x9fb7 0x9fb9 0x9fc7 0x9e41 0x9ebd 0x9ef1 0x9eed 0x9ef9 0x9d1d 0x9dc3 0x9e22 0x9e27 0x9e32 0x9c28 0x9cb8 0x9d3f 0x9d67 0x9d72 0x9b93 0x9bf8 0x9c6b 0x9caf 0x9cb9 0x9b21 0x9b80 0x9bcb 0x9c01 0x9c08 0x9aad 0x9b11 0x9b4d 0x9b65 0x9b68 0x9a32 0x9a7c 0x9ab1 0x9ac0 0x9ac2 0x99b5 0x99c5 0x99a9 0x99e3 0x99f0 0x9931 0x9904 0x988f 0x98df 0x98f5 0x98a6 0x982a 0x97ed 0x981c 0x982a 0x9818 0x9761 0x9785 0x9799 0x9798 0x9781 0x96f1 0x9728 0x9729 0x971d 0x96ef 0x96ad 0x96ca 0x96b8 0x96ad 0x9689 0x9672 0x9671 0x964d 0x9647 0x963d 0x9637 0x961c 0x95f0 0x95ea 0x9601 0x9600 0x95ca 0x959c 0x9594 0x95d3 0x95ce 0x9583 0x9553 0x9546 0x95af 0x959e 0x9545 0x9511 0x9500 0x9592 0x9572 0x9510 0x94d7 0x94c0 0x957c 0x954d 0x94e1 0x94a2 0x9484 0x9566 0x952d 0x94b9 0x9473 0x944f 0x9549 0x9509 0x9492 0x9444 0x9418 0x9524 0x94e6 0x946b 0x9412 0x93db 0x94f7 0x94bb 0x9441 0x93dc 0x9398 0x94b6 0x9477 0x9403 0x9397 0x934b 0x9460 0x9414 0x93a5 0x933b 0x92f1 0x93fe 0x93a6 0x9338 0x92d0 0x928b 0x9389 0x9328 0x92c2 0x9259 0x9212 0x9302 0x929e 0x923c 0x91d3 0x9189 0x9260 0x9202 0x919b 0x9135 0x90ee 0x91cf 0x9181 0x9118 0x90b5 0x9076 0x9170 0x912e 0x90c5 0x906b 0x9030 0x9151 0x9110 0x90b2 0x9056 0x9019 0x9135 0x90f8 0x909d 0x9044 0x9007 0x9114 0x90da 0x9082 0x9023 0x8fe4 0x90b5 0x9065 0x900a 0x8f82 0x8f28 0x8f78 0x8f03 0x8eb4 0x8e19 0x8dbc 0x8dab 0x8d2b 0x8ce6 0x8c40 0x8be2 0x8b62 0x8acb 0x8a90 0x89dc 0x897c 0x8848 0x878a 0x8760 0x8695 0x8630 0x835e 0x8249 0x825e 0x815e 0x80f0 0x7530 0x7530 0x7530 0x7530 0x7530>; | |
| }; | |
| qcom,pc-temp-v2-lut { | |
| qcom,lut-col-legend = <0xfffffff6 0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0xab8b 0xab6d 0xab54 0xab1d 0xab09 0xaaf5 0xa9fb 0xaa09 0xaa1e 0xaa00 0xa9fe 0xa9ef 0xa88e 0xa8be 0xa8fa 0xa8f1 0xa8fc 0xa8f0 0xa744 0xa790 0xa7e9 0xa7ef 0xa803 0xa7f9 0xa61b 0xa67b 0xa6ee 0xa6fc 0xa713 0xa70b 0xa50a 0xa579 0xa5f9 0xa60e 0xa627 0xa61f 0xa409 0xa48c 0xa503 0xa521 0xa53b 0xa534 0xa31c 0xa3ab 0xa412 0xa438 0xa450 0xa44a 0xa242 0xa2b4 0xa32f 0xa353 0xa36a 0xa364 0xa16c 0xa196 0xa257 0xa272 0xa286 0xa281 0xa0cd 0xa0c7 0xa186 0xa196 0xa1a6 0xa1a0 0xa07e 0xa07a 0xa0c1 0xa0c0 0xa0c9 0xa0c5 0xa040 0xa043 0x9ffd 0x9fee 0x9ff0 0x9fec 0x9f86 0x9fab 0x9f27 0x9f1d 0x9f21 0x9f1c 0x9d3a 0x9ded 0x9e3f 0x9e4c 0x9e58 0x9e4f 0x9b2b 0x9c40 0x9d55 0x9d7f 0x9d95 0x9d8b 0x9a57 0x9b60 0x9c6e 0x9cb4 0x9cd7 0x9ccf 0x99c1 0x9ab2 0x9b8c 0x9bee 0x9c1e 0x9c1b 0x991a 0x99f2 0x9abe 0x9b3c 0x9b6e 0x9b6c 0x9864 0x9920 0x9a01 0x9aa4 0x9ac8 0x9ac7 0x97b6 0x9858 0x9945 0x9a00 0x9a13 0x9a14 0x9716 0x97a1 0x987d 0x9923 0x992a 0x992b 0x9685 0x96f6 0x97ba 0x982e 0x9836 0x9836 0x9614 0x9660 0x9715 0x9771 0x9780 0x9780 0x95bd 0x95da 0x9687 0x96e1 0x96f3 0x96f4 0x9572 0x956e 0x9608 0x9666 0x9678 0x967a 0x9530 0x9522 0x9592 0x95f7 0x9609 0x960b 0x94f4 0x94e6 0x9527 0x9593 0x95a5 0x95a6 0x94bd 0x94b1 0x94cd 0x9539 0x954b 0x9549 0x948b 0x9484 0x9480 0x94e5 0x94f8 0x94f3 0x945a 0x945a 0x9444 0x9499 0x94ad 0x94a6 0x9429 0x9433 0x9416 0x9452 0x9469 0x9461 0x93f9 0x940c 0x93ef 0x9412 0x942a 0x9421 0x93c5 0x93e3 0x93c9 0x93d6 0x93e6 0x93db 0x9392 0x93b8 0x93a5 0x93a2 0x939b 0x938d 0x935b 0x938a 0x937e 0x936d 0x9349 0x9334 0x931d 0x9358 0x9353 0x932f 0x92ec 0x92c7 0x92d9 0x9322 0x9321 0x92eb 0x9289 0x9252 0x928e 0x92e3 0x92e2 0x92a3 0x9233 0x91f5 0x923b 0x929a 0x9290 0x9258 0x91e8 0x91a8 0x91e6 0x9247 0x9233 0x9205 0x9199 0x9158 0x9196 0x91e4 0x91ca 0x91a2 0x9136 0x90f7 0x914a 0x916d 0x9153 0x912d 0x90c4 0x9088 0x9102 0x90e9 0x90c6 0x90a6 0x9043 0x9007 0x90b6 0x9072 0x9049 0x9036 0x8fe8 0x8fad 0x905b 0x9022 0x9001 0x9001 0x8fc3 0x8f8e 0x9022 0x9003 0x8fe4 0x8ff1 0x8fb2 0x8f7e 0x8fe2 0x8fe1 0x8fc2 0x8fdb 0x8f9b 0x8f66 0x8f83 0x8fa7 0x8f84 0x8fb0 0x8f59 0x8f1d 0x8ee8 0x8f2f 0x8ee7 0x8f33 0x8e7a 0x8e2e 0x8dd0 0x8e14 0x8d95 0x8dcb 0x8ccb 0x8c7e 0x8c1e 0x8c39 0x8b96 0x8bd8 0x8aac 0x8a5d 0x89b8 0x89c1 0x88f9 0x8961 0x87e8 0x8793 0x8635 0x8653 0x8554 0x85f9 0x83fb 0x83b0 0x8050 0x80df 0x7fb1 0x808f 0x7dcf 0x7d87 0x70de 0x74b0 0x6ab4 0x7057 0x6a13 0x69e2>; | |
| }; | |
| qcom,pc-temp-z1-lut { | |
| qcom,lut-col-legend = <0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x32d9 0x303d 0x2e38 0x2d2d 0x2ccc 0x32f5 0x3050 0x2e4e 0x2d47 0x2cdc 0x3303 0x3055 0x2e4d 0x2d46 0x2cdd 0x3305 0x305b 0x2e46 0x2d42 0x2cdc 0x32fe 0x305f 0x2e3c 0x2d3e 0x2cda 0x32f0 0x3050 0x2e36 0x2d39 0x2cd7 0x32e9 0x3039 0x2e33 0x2d34 0x2cd6 0x32e8 0x3030 0x2e31 0x2d2e 0x2cd4 0x32e7 0x302f 0x2e30 0x2d2c 0x2cd4 0x32dd 0x302f 0x2e2f 0x2d2c 0x2cd4 0x32c6 0x3032 0x2e30 0x2d2b 0x2cd4 0x32ab 0x3036 0x2e39 0x2d2c 0x2cd4 0x3294 0x3035 0x2e41 0x2d2d 0x2cd5 0x327c 0x3021 0x2e3e 0x2d2e 0x2cd6 0x3268 0x300c 0x2e30 0x2d2d 0x2cd7 0x3257 0x3008 0x2e27 0x2d2a 0x2cd8 0x324f 0x3007 0x2e27 0x2d2a 0x2cd9 0x3253 0x3007 0x2e28 0x2d2c 0x2cda 0x3261 0x300e 0x2e2b 0x2d2e 0x2cdb 0x3270 0x3018 0x2e34 0x2d30 0x2cdd 0x3282 0x3022 0x2e39 0x2d33 0x2cdf 0x328f 0x302c 0x2e3a 0x2d34 0x2ce0 0x328d 0x3036 0x2e3a 0x2d34 0x2cdf 0x3284 0x303f 0x2e3a 0x2d35 0x2cdf 0x3281 0x3045 0x2e3c 0x2d37 0x2ce1 0x328e 0x3045 0x2e40 0x2d3b 0x2ce5 0x329d 0x303f 0x2e47 0x2d3e 0x2ce8 0x329f 0x3039 0x2e50 0x2d41 0x2ceb 0x3297 0x3038 0x2e52 0x2d45 0x2cee 0x328f 0x303a 0x2e53 0x2d48 0x2cf1 0x3290 0x3040 0x2e54 0x2d4b 0x2cf4 0x3299 0x304e 0x2e54 0x2d50 0x2cf7 0x32a1 0x3058 0x2e55 0x2d54 0x2cfa 0x32b1 0x3056 0x2e56 0x2d58 0x2cfe 0x32c1 0x3052 0x2e5d 0x2d5a 0x2d01 0x32c2 0x3054 0x2e63 0x2d5d 0x2d04 0x32c3 0x305b 0x2e68 0x2d60 0x2d07 0x32c7 0x3061 0x2e6e 0x2d64 0x2d09 0x32d8 0x3062 0x2e6f 0x2d68 0x2d0c 0x32ec 0x3062 0x2e6f 0x2d6c 0x2d0f 0x32f0 0x3063 0x2e70 0x2d70 0x2d12 0x32e4 0x306a 0x2e7a 0x2d74 0x2d15 0x32db 0x306f 0x2e84 0x2d77 0x2d18 0x32cb 0x3074 0x2e86 0x2d78 0x2d1b 0x32dd 0x3078 0x2e85 0x2d7b 0x2d1c 0x32ed 0x307f 0x2e8d 0x2d80 0x2d1e 0x32c4 0x3071 0x2e81 0x2d7e 0x2d1d 0x32bd 0x3076 0x2e80 0x2d81 0x2d20 0x32c8 0x307b 0x2e80 0x2d88 0x2d23 0x32dd 0x3080 0x2e8a 0x2d8c 0x2d26 0x32ce 0x3084 0x2e96 0x2d8d 0x2d2b 0x3303 0x3095 0x2e9c 0x2d95 0x2d32 0x3321 0x30b9 0x2ea8 0x2da3 0x2d3b 0x332a 0x30cf 0x2eba 0x2dac 0x2d48 0x332a 0x30cf 0x2eba 0x2dac 0x2d48 0x332a 0x30cf 0x2eba 0x2dac 0x2d48>; | |
| }; | |
| qcom,pc-temp-z2-lut { | |
| qcom,lut-col-legend = <0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x2784 0x2736 0x297e 0x2a62 0x29e4 0x264d 0x286a 0x29ae 0x29ba 0x2948 0x277f 0x28c4 0x29b4 0x29ca 0x299a 0x280f 0x28b7 0x299f 0x29ce 0x29bf 0x2808 0x28a4 0x2970 0x29b7 0x29b5 0x27f6 0x2888 0x2947 0x298f 0x2999 0x27e7 0x2867 0x292c 0x2975 0x297f 0x27dc 0x284d 0x2915 0x2962 0x295e 0x27cd 0x2839 0x2908 0x2957 0x293d 0x277a 0x282a 0x28ff 0x2957 0x290f 0x26eb 0x2822 0x28fe 0x295c 0x28db 0x26c3 0x281d 0x2909 0x2960 0x28c6 0x2738 0x2826 0x291c 0x2964 0x28c1 0x27bf 0x28b5 0x2931 0x2961 0x28c7 0x27cc 0x295b 0x2948 0x2947 0x28dd 0x2791 0x296c 0x2950 0x292f 0x28fb 0x275b 0x2961 0x2946 0x2921 0x2913 0x2768 0x2962 0x2933 0x2900 0x2929 0x278c 0x2929 0x2933 0x28f3 0x293d 0x27a3 0x28c8 0x2948 0x2919 0x294d 0x27b2 0x28b2 0x295d 0x2949 0x295e 0x27bb 0x28b6 0x296e 0x2950 0x2974 0x27bf 0x28b7 0x297e 0x2949 0x2995 0x27c0 0x28a3 0x297b 0x294c 0x29d2 0x27c2 0x288b 0x2956 0x296b 0x2abd 0x27c7 0x288a 0x293c 0x2998 0x2ba3 0x27ce 0x2895 0x2968 0x29d2 0x2b55 0x27d5 0x289f 0x29ab 0x2a15 0x2a33 0x27e0 0x28a5 0x29b1 0x2a21 0x296c 0x27ea 0x28aa 0x2993 0x29cc 0x28fa 0x27f4 0x28b1 0x297f 0x297c 0x28b6 0x27fc 0x28b9 0x2978 0x2972 0x28ad 0x27f8 0x28c2 0x2973 0x2972 0x28ad 0x27ab 0x28ca 0x2975 0x2979 0x28b6 0x2761 0x28d2 0x2983 0x2990 0x28f1 0x27a8 0x28dd 0x2995 0x29b1 0x2942 0x2881 0x28eb 0x29aa 0x29d9 0x29a3 0x28f6 0x28fb 0x29c5 0x2a06 0x2a0a 0x28ab 0x290e 0x29e1 0x2a2e 0x2a20 0x283c 0x2926 0x2a01 0x2a5e 0x2a00 0x282b 0x2935 0x2a10 0x2a7d 0x29e5 0x281e 0x293f 0x2a0f 0x2a74 0x29eb 0x2810 0x293c 0x2a0e 0x2a61 0x29f4 0x283b 0x28c8 0x2a14 0x2a6f 0x29ea 0x284f 0x2e5d 0x2a3d 0x2a4d 0x29d6 0x2820 0x304d 0x2a62 0x2a19 0x29cd 0x28f2 0x3041 0x2a38 0x2a0c 0x29c8 0x2921 0x35ce 0x2a2f 0x2a19 0x29e4 0x28d8 0x36f6 0x2a50 0x2a67 0x2a8c 0x298e 0x3685 0x2ae5 0x2a36 0x29ce 0x282e 0x3538 0x2b16 0x2981 0x28d7 0x2717 0x3478 0x2ac6 0x295d 0x28b4 0x26b5 0x3058 0x2a9b 0x2904 0x286f 0x25f0 0x2e35 0x2a43 0x28cd 0x282f 0x25f0 0x2e35 0x2a43 0x28cd 0x282f 0x25f0 0x2e35 0x2a43 0x28cd 0x282f>; | |
| }; | |
| qcom,pc-temp-z3-lut { | |
| qcom,lut-col-legend = <0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x4bcc 0x4bbf 0x4b96 0x4b7a 0x4b78 0x4c23 0x4c24 0x4bbc 0x4ba3 0x4b95 0x4cb3 0x4c51 0x4be8 0x4bb4 0x4ba3 0x4cff 0x4c66 0x4bf9 0x4bbe 0x4bad 0x4d05 0x4c70 0x4bff 0x4bc4 0x4bb6 0x4d08 0x4c77 0x4c01 0x4bc8 0x4bbd 0x4d08 0x4c7a 0x4c02 0x4bc9 0x4bbe 0x4d05 0x4c7b 0x4c02 0x4bc8 0x4bbc 0x4d01 0x4c7a 0x4c00 0x4bc6 0x4bba 0x4cc1 0x4c79 0x4bf6 0x4bbf 0x4bb1 0x4c4a 0x4c75 0x4bef 0x4bb7 0x4ba7 0x4c2b 0x4c6c 0x4bee 0x4bb4 0x4ba3 0x4ca1 0x4c62 0x4bec 0x4bb2 0x4ba2 0x4d20 0x4c54 0x4be6 0x4baf 0x4b9f 0x4d2e 0x4c4e 0x4bdb 0x4ba9 0x4b9a 0x4d25 0x4c57 0x4bd7 0x4ba4 0x4b93 0x4d18 0x4c64 0x4bdb 0x4ba1 0x4b90 0x4cf8 0x4c65 0x4bdd 0x4b9d 0x4b8f 0x4ccc 0x4c48 0x4bd9 0x4b99 0x4b8d 0x4cb9 0x4c27 0x4bd1 0x4b95 0x4b89 0x4cb2 0x4c29 0x4bce 0x4b93 0x4b86 0x4cae 0x4c40 0x4bd4 0x4b93 0x4b85 0x4cb2 0x4c4d 0x4bdf 0x4b96 0x4b85 0x4cc4 0x4c4f 0x4bdd 0x4b96 0x4b87 0x4cd5 0x4c51 0x4bcc 0x4b8f 0x4b9e 0x4cdf 0x4c50 0x4bc3 0x4b89 0x4bb7 0x4ce7 0x4c4d 0x4bc9 0x4b97 0x4bb9 0x4ce7 0x4c49 0x4bd4 0x4bbb 0x4bb9 0x4ce2 0x4c47 0x4bde 0x4bc6 0x4bb7 0x4cdb 0x4c45 0x4be9 0x4bc4 0x4bb1 0x4cd3 0x4c43 0x4bef 0x4bc0 0x4ba8 0x4cc9 0x4c42 0x4bec 0x4bba 0x4ba3 0x4cb3 0x4c41 0x4be7 0x4bb3 0x4b9e 0x4c53 0x4c3e 0x4be2 0x4bad 0x4b98 0x4bf8 0x4c39 0x4bde 0x4ba7 0x4b91 0x4beb 0x4c34 0x4bda 0x4ba2 0x4b8d 0x4be5 0x4c30 0x4bd6 0x4ba0 0x4b8d 0x4be2 0x4c2c 0x4bd2 0x4b9e 0x4b8e 0x4be0 0x4c28 0x4bce 0x4b9c 0x4b8e 0x4be0 0x4c24 0x4bcb 0x4b9c 0x4b8d 0x4bd1 0x4c20 0x4bc9 0x4b9b 0x4b8d 0x4b6a 0x4c1d 0x4bc6 0x4b9b 0x4b90 0x4b3d 0x4c13 0x4bc4 0x4b9a 0x4b93 0x4b3d 0x4bb6 0x4bc1 0x4b9b 0x4b93 0x4b3d 0x4b98 0x4bb6 0x4b98 0x4b8f 0x4b3d 0x4b66 0x4baf 0x4b8a 0x4b7e 0x4b3c 0x4b5e 0x4b9a 0x4b84 0x4b7c 0x4b3c 0x4b55 0x4b9c 0x4b80 0x4b79 0x4b3c 0x4b47 0x4b96 0x4b7d 0x4b6c 0x4b3c 0x4b3b 0x4b8a 0x4b85 0x4b84 0x4b3d 0x4b3b 0x4b86 0x4b90 0x4b8f 0x4b3e 0x4b3b 0x4b87 0x4b94 0x4b8e 0x4b3f 0x4b3c 0x4b85 0x4b97 0x4b8f 0x4b42 0x4b40 0x4b82 0x4b96 0x4b91 0x4b42 0x4b40 0x4b82 0x4b96 0x4b91 0x4b42 0x4b40 0x4b82 0x4b96 0x4b91>; | |
| }; | |
| qcom,pc-temp-z4-lut { | |
| qcom,lut-col-legend = <0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x3cff 0x3bf9 0x3aa2 0x39ed 0x39d2 0x3e25 0x3bfd 0x3abf 0x3a36 0x39fe 0x3d8f 0x3bdb 0x3ab1 0x3a24 0x39f3 0x3cd2 0x3b5c 0x3a8c 0x3a0d 0x39e3 0x3c40 0x3ada 0x3a49 0x39f0 0x39ce 0x3bbe 0x3a8a 0x3a11 0x39d1 0x39b4 0x3b56 0x3a4a 0x39ea 0x39b8 0x39a0 0x3afd 0x3a18 0x39ca 0x39a1 0x398d 0x3ac3 0x39ef 0x39b2 0x3991 0x3982 0x3ad8 0x39d0 0x399e 0x3988 0x397e 0x3b21 0x39ba 0x3991 0x3982 0x397c 0x3b20 0x39aa 0x398a 0x397a 0x3978 0x3a73 0x399f 0x3984 0x3973 0x3970 0x39c1 0x398c 0x397d 0x396d 0x3969 0x39af 0x397c 0x3977 0x3969 0x3965 0x39ce 0x3979 0x3973 0x3964 0x3962 0x39e6 0x397a 0x3970 0x395f 0x395d 0x39e5 0x397a 0x396b 0x395a 0x3956 0x39dc 0x3978 0x3964 0x3957 0x3952 0x39d2 0x3977 0x3957 0x3955 0x3950 0x39c4 0x397b 0x3955 0x3953 0x394f 0x39b5 0x397f 0x3997 0x3973 0x3968 0x39a9 0x3989 0x39ef 0x39c4 0x39b4 0x399d 0x39bf 0x39fd 0x39e3 0x39d3 0x3998 0x39fe 0x39fa 0x39e2 0x39b9 0x39a8 0x3a03 0x39f5 0x39df 0x3995 0x39c2 0x39ec 0x39e0 0x39c8 0x3983 0x39c9 0x39d3 0x39c0 0x3995 0x3976 0x39c6 0x39c0 0x39a6 0x397a 0x396e 0x39c1 0x39b0 0x398f 0x3971 0x3969 0x39b8 0x39a1 0x3981 0x396b 0x3965 0x39ab 0x3995 0x397c 0x3966 0x3960 0x39ab 0x398b 0x3979 0x3963 0x395b 0x39fc 0x3982 0x3977 0x3963 0x395a 0x3a4b 0x397b 0x3975 0x3963 0x395a 0x3a4c 0x3975 0x3974 0x3963 0x395b 0x3a41 0x396f 0x3971 0x3964 0x395d 0x3a37 0x396b 0x396e 0x3965 0x3962 0x3a2d 0x396b 0x396e 0x3967 0x3964 0x3a24 0x396e 0x3972 0x396a 0x3966 0x3a2c 0x396e 0x3974 0x396c 0x3966 0x3a91 0x3968 0x396c 0x3966 0x3960 0x3aba 0x3969 0x3963 0x395e 0x3957 0x3aa8 0x39c5 0x3961 0x395d 0x395a 0x3a5e 0x39bb 0x3956 0x3953 0x3954 0x3a47 0x39cf 0x3942 0x3945 0x3945 0x3a42 0x39d2 0x3949 0x393d 0x393b 0x3a3e 0x39d3 0x393c 0x3930 0x392a 0x3a38 0x39e1 0x393a 0x3929 0x392b 0x3a32 0x39ed 0x3950 0x3933 0x392c 0x3a3c 0x39f9 0x3962 0x3935 0x392e 0x3a47 0x39fe 0x3964 0x3933 0x3931 0x3a51 0x3a03 0x3968 0x3933 0x3932 0x3a62 0x3a0b 0x396f 0x3937 0x3932 0x3a62 0x3a0b 0x396f 0x3937 0x3932 0x3a62 0x3a0b 0x396f 0x3937 0x3932>; | |
| }; | |
| qcom,pc-temp-z5-lut { | |
| qcom,lut-col-legend = <0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x2de7 0x30cc 0x3482 0x3663 0x376b 0x3217 0x3857 0x3a62 0x4011 0x40f9 0x3753 0x3d59 0x41f8 0x4450 0x4585 0x3ae7 0x409c 0x4625 0x4765 0x4924 0x3c8c 0x4387 0x4869 0x4985 0x4d0d 0x3daf 0x46ba 0x4af0 0x4b44 0x5089 0x3ef2 0x4a29 0x4e63 0x4d83 0x5371 0x4064 0x4dfc 0x51dd 0x504c 0x561a 0x419d 0x52b3 0x5458 0x51a6 0x5725 0x3fbd 0x573e 0x5638 0x519f 0x5485 0x3b7d 0x5ae0 0x5888 0x5187 0x50d5 0x3c25 0x5d93 0x5c6e 0x527a 0x50e5 0x47ec 0x5d9e 0x5ffa 0x5529 0x53df 0x5667 0x5d6f 0x5f06 0x56ed 0x559a 0x5d10 0x6023 0x5ad7 0x569f 0x543f 0x60e4 0x67d0 0x5a15 0x5656 0x5269 0x61f5 0x72bb 0x5f28 0x56f9 0x53c1 0x5a5d 0x735c 0x6618 0x5785 0x5917 0x4dae 0x65da 0x6bfe 0x58cb 0x5c94 0x49c6 0x5798 0x74ac 0x5c31 0x5e10 0x4b8f 0x6777 0x7e62 0x5ece 0x5eed 0x4f4c 0xa054 0x8bac 0x5e18 0x5bc4 0x5845 0xbe9e 0x9902 0x5b6c 0x525a 0x7074 0xb7fb 0x9199 0x5727 0x4e61 0x89c2 0xaa83 0x6a02 0x49fb 0x4f93 0xa3d8 0x9c40 0x52c8 0x3e98 0x51c0 0xba34 0x8a5f 0x5361 0x44a5 0x54be 0xbcbd 0x7e7b 0x5549 0x5614 0x5934 0xb50d 0x7a9a 0x5bab 0x62f8 0x5c86 0xaabb 0x7884 0x6f01 0x6b6a 0x5ec0 0xa093 0x79a4 0x80e8 0x72a3 0x6123 0x93f5 0x806e 0x8c6f 0x79a7 0x658c 0x8443 0x877d 0x9555 0x7ffc 0x6bd9 0x69bb 0x8aca 0x9add 0x82f1 0x6edd 0x5419 0x8d40 0x9f56 0x848a 0x7008 0x5083 0x8eb4 0xa13c 0x8540 0x7101 0x4eee 0x8ffd 0x9dca 0x836c 0x72ad 0x4e3f 0x90ba 0x96bb 0x7ea8 0x74ba 0x511a 0x903a 0x8ead 0x789e 0x740d 0x563d 0x8e64 0x8393 0x6ef8 0x6950 0x543f 0x8c06 0x7b67 0x681e 0x60a2 0x382a 0x8773 0x7803 0x66f3 0x6526 0x2c10 0x818e 0x757b 0x6662 0x6b78 0x2c3f 0x5ebe 0x6f8a 0x648a 0x6828 0x2d35 0x524f 0x6bb0 0x6253 0x5f83 0x2d49 0x3366 0x703a 0x59a3 0x50cc 0x2d0d 0x319e 0x51a3 0x571b 0x5444 0x2cff 0x303f 0x57c8 0x5c77 0x6027 0x2d06 0x2e72 0x5396 0x61b0 0x5163 0x2d3b 0x2dc8 0x44d5 0x5999 0x6bcb 0x2d5a 0x2dc3 0x3e89 0x57ee 0x68c2 0x2d08 0x2d74 0x3c4e 0x5a6b 0x5f63 0x2cb5 0x2d2c 0x3a73 0x5a13 0x58fa 0x2c52 0x2ced 0x386b 0x5159 0x54fa 0x2c52 0x2ced 0x386b 0x5159 0x54fa 0x2c52 0x2ced 0x386b 0x5159 0x54fa>; | |
| }; | |
| qcom,pc-temp-z6-lut { | |
| qcom,lut-col-legend = <0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x3e1f 0x3be7 0x39f8 0x3936 0x3912 0x3e8c 0x3bf6 0x3a15 0x3968 0x3935 0x3e4e 0x3be7 0x3a1b 0x3969 0x3937 0x3df7 0x3ba2 0x3a12 0x3967 0x3938 0x3d9c 0x3b59 0x39f3 0x395e 0x3934 0x3d3e 0x3b27 0x39d5 0x3951 0x392d 0x3cf5 0x3afd 0x39c1 0x3946 0x3925 0x3cbb 0x3ada 0x39b0 0x393b 0x391d 0x3c89 0x3abd 0x39a0 0x3931 0x3915 0x3c5e 0x3aa5 0x3991 0x3929 0x390e 0x3c39 0x3a92 0x3988 0x3922 0x3908 0x3c18 0x3a81 0x3984 0x391d 0x3904 0x3bf4 0x3a6e 0x3981 0x3919 0x38ff 0x3bd4 0x3a56 0x397a 0x3915 0x38fb 0x3bc6 0x3a48 0x396e 0x390f 0x38f6 0x3bbf 0x3a49 0x3968 0x390a 0x38f1 0x3bb8 0x3a4e 0x3967 0x3906 0x38ed 0x3ba6 0x3a4d 0x3967 0x3902 0x38ea 0x3b8e 0x3a40 0x3963 0x38fe 0x38e7 0x3b81 0x3a32 0x395c 0x38fc 0x38e4 0x3b7a 0x3a34 0x395a 0x38fa 0x38e2 0x3b77 0x3a42 0x397a 0x3908 0x38ed 0x3b78 0x3a54 0x39a6 0x392d 0x390e 0x3b7f 0x3a71 0x39ac 0x393a 0x391c 0x3b88 0x3a8c 0x39a5 0x3938 0x391c 0x3b99 0x3a8e 0x399d 0x3934 0x391c 0x3bab 0x3a85 0x3998 0x3932 0x391a 0x3baf 0x3a7b 0x3992 0x392f 0x3914 0x3bac 0x3a73 0x398f 0x392c 0x390e 0x3ba8 0x3a6d 0x398c 0x3927 0x3909 0x3ba3 0x3a68 0x3989 0x3923 0x3904 0x3b9b 0x3a64 0x3987 0x391e 0x38ff 0x3b92 0x3a61 0x3984 0x391a 0x38fb 0x3b88 0x3a5e 0x3982 0x3917 0x38f7 0x3b7f 0x3a5c 0x3981 0x3913 0x38f4 0x3b7d 0x3a5a 0x3980 0x3911 0x38f2 0x3b7c 0x3a59 0x397e 0x3911 0x38f3 0x3b7b 0x3a58 0x397c 0x3912 0x38f5 0x3b7c 0x3a5a 0x397d 0x3912 0x38f7 0x3b7e 0x3a5d 0x397f 0x3914 0x38f7 0x3b7f 0x3a5f 0x3980 0x3915 0x38f8 0x3b7f 0x3a5f 0x397d 0x3913 0x38f7 0x3b7f 0x3a5f 0x397a 0x3910 0x38f6 0x3b81 0x3a60 0x397b 0x3911 0x38f7 0x3b6d 0x3a55 0x3974 0x390c 0x38f3 0x3b66 0x3a4a 0x396b 0x38ff 0x38e4 0x3b65 0x3a47 0x3964 0x38f9 0x38de 0x3b64 0x3a45 0x395f 0x38f1 0x38d6 0x3b64 0x3a48 0x395d 0x38ed 0x38cf 0x3b66 0x3a4c 0x3963 0x38f7 0x38dd 0x3b72 0x3a56 0x396d 0x3900 0x38e6 0x3b80 0x3a5f 0x3971 0x3903 0x38e9 0x3b91 0x3a6b 0x3977 0x3907 0x38ec 0x3bb0 0x3a81 0x3980 0x390c 0x38f0 0x3bb0 0x3a81 0x3980 0x390c 0x38f0 0x3bb0 0x3a81 0x3980 0x390c 0x38f0>; | |
| }; | |
| qcom,pc-temp-y1-lut { | |
| qcom,lut-col-legend = <0xfffffff6 0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x192b 0x172e 0x15db 0x14d4 0x1444 0x1409 0x1927 0x1733 0x15e5 0x14d9 0x1446 0x1409 0x1924 0x1737 0x15ed 0x14dc 0x1446 0x1408 0x1923 0x173b 0x15f3 0x14df 0x1446 0x1407 0x1923 0x173d 0x15f7 0x14e0 0x1445 0x1407 0x1923 0x1740 0x15f9 0x14e0 0x1444 0x1406 0x1928 0x1742 0x15f5 0x14de 0x1442 0x1405 0x192e 0x1743 0x15f1 0x14dc 0x1440 0x1403 0x1930 0x1743 0x15f0 0x14da 0x143e 0x1402 0x192f 0x1742 0x15ef 0x14da 0x143c 0x1401 0x192e 0x1741 0x15ee 0x14da 0x143b 0x1400 0x192a 0x1741 0x15f3 0x14d8 0x1439 0x13ff 0x1924 0x1742 0x15fb 0x14d6 0x1438 0x13ff 0x1926 0x1745 0x15fd 0x14d5 0x1437 0x13ff 0x192d 0x1753 0x15fe 0x14d5 0x1437 0x13ff 0x1932 0x175e 0x15fe 0x14d6 0x1437 0x13ff 0x1936 0x175d 0x15ff 0x14da 0x1438 0x13ff 0x193a 0x175b 0x15ff 0x14e1 0x143b 0x13ff 0x193c 0x175a 0x15ff 0x14e2 0x143b 0x13ff 0x193b 0x175d 0x15fe 0x14e2 0x143a 0x1400 0x193a 0x1760 0x15fd 0x14e1 0x1439 0x1400 0x193f 0x1763 0x15fe 0x14e0 0x1439 0x1401 0x1945 0x1766 0x1600 0x14df 0x143a 0x1402 0x1943 0x1764 0x1602 0x14df 0x143b 0x1403 0x193c 0x175e 0x1604 0x14e3 0x143d 0x1404 0x1934 0x175b 0x1607 0x14e8 0x1440 0x1405 0x192e 0x175e 0x160b 0x14e8 0x1442 0x1407 0x1928 0x1762 0x1611 0x14e7 0x1445 0x1409 0x1926 0x1762 0x1611 0x14e8 0x1447 0x140b 0x192e 0x1755 0x160e 0x14ed 0x1448 0x140d 0x1938 0x1748 0x160b 0x14f3 0x1449 0x140f 0x1934 0x174b 0x160a 0x14f3 0x144c 0x1411 0x1929 0x1756 0x160b 0x14f2 0x144e 0x1413 0x1921 0x175a 0x160b 0x14f2 0x1451 0x1415 0x191e 0x1757 0x160a 0x14f3 0x1453 0x1416 0x191c 0x1754 0x1609 0x14f5 0x1454 0x1417 0x1917 0x1754 0x1609 0x14f7 0x1455 0x1418 0x1913 0x1757 0x1609 0x14fb 0x1456 0x141a 0x1919 0x1758 0x160d 0x14fd 0x1458 0x141b 0x192c 0x1754 0x1616 0x14fd 0x145b 0x141d 0x1939 0x174e 0x161a 0x14fc 0x145e 0x141f 0x1935 0x174f 0x1614 0x14ff 0x145f 0x1420 0x1925 0x1751 0x1609 0x1505 0x145f 0x1422 0x1927 0x1750 0x1608 0x150a 0x1462 0x1425 0x193b 0x1757 0x1613 0x1510 0x1469 0x1428 0x1944 0x1769 0x1622 0x1511 0x146a 0x142b 0x1964 0x1775 0x1623 0x150e 0x146c 0x142a 0x1956 0x1771 0x1626 0x150d 0x146b 0x142a 0x1980 0x176f 0x1623 0x1510 0x146a 0x1429 0x1976 0x1774 0x1626 0x1510 0x146c 0x142a 0x1995 0x1781 0x1632 0x1517 0x1471 0x142e 0x1984 0x1793 0x1635 0x1523 0x1477 0x1434 0x197b 0x17a4 0x1647 0x1528 0x147f 0x1439 0x19a8 0x17b2 0x1664 0x153c 0x148b 0x1442 0x19a8 0x17b2 0x1664 0x153c 0x148b 0x1442 0x19a8 0x17b2 0x1664 0x153c 0x148b 0x1442>; | |
| }; | |
| qcom,pc-temp-y2-lut { | |
| qcom,lut-col-legend = <0xfffffff6 0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x25be 0x2622 0x291b 0x2cbf 0x2c1e 0x2c58 0x25c1 0x2653 0x294c 0x2c90 0x2c3e 0x2c51 0x25c4 0x2686 0x2978 0x2c60 0x2c4a 0x2c3f 0x25c6 0x26b5 0x299e 0x2c32 0x2c45 0x2c23 0x25c8 0x26d8 0x29bd 0x2c0c 0x2c34 0x2c00 0x25c8 0x26ea 0x29d4 0x2bf0 0x2c1c 0x2bd8 0x25c8 0x271b 0x29e7 0x2bde 0x2bed 0x2b9c 0x25c7 0x276b 0x29f1 0x2bd1 0x2bb4 0x2b61 0x25c7 0x2791 0x29e2 0x2bc4 0x2ba0 0x2b52 0x25c7 0x27d4 0x29ab 0x2bb8 0x2ba3 0x2b4d 0x25c6 0x27f4 0x2988 0x2ba9 0x2ba9 0x2b4b 0x25c7 0x27b9 0x29fc 0x2b90 0x2ba5 0x2b4f 0x25c7 0x2760 0x2ac9 0x2b75 0x2ba0 0x2b57 0x25c7 0x275b 0x2b10 0x2b79 0x2ba7 0x2b57 0x25c5 0x27a3 0x2b16 0x2bbe 0x2bc4 0x2b4a 0x25c4 0x27e9 0x2b16 0x2c0d 0x2be8 0x2b45 0x25c3 0x2818 0x2b26 0x2c3f 0x2c0c 0x2b78 0x25c3 0x283a 0x2b40 0x2c6b 0x2c3d 0x2bdd 0x25c3 0x2803 0x2b5d 0x2ca4 0x2c97 0x2c50 0x25c2 0x26c4 0x2b80 0x2cf8 0x2d47 0x2cf7 0x25c2 0x25eb 0x2b98 0x2d2a 0x2dab 0x2d57 0x25c2 0x25de 0x2ba6 0x2d07 0x2d68 0x2d15 0x25c2 0x25d7 0x2bb2 0x2cc4 0x2ced 0x2ca7 0x25c2 0x25d5 0x2bb7 0x2cb4 0x2cb9 0x2c91 0x25c2 0x25d5 0x2bbb 0x2cc0 0x2c9f 0x2caa 0x25c1 0x25d5 0x2bb2 0x2cd0 0x2c9a 0x2cc3 0x25c1 0x25d4 0x2b1a 0x2cde 0x2cb6 0x2cd1 0x25c1 0x25d1 0x29e8 0x2cec 0x2cdf 0x2ce4 0x25c1 0x25ce 0x296b 0x2cfa 0x2cff 0x2d04 0x25c0 0x25cc 0x2952 0x2d0b 0x2d31 0x2d4d 0x25c0 0x25ca 0x2941 0x2d19 0x2d5b 0x2d7b 0x25c0 0x25c8 0x2927 0x2d28 0x2d8d 0x2d76 0x25c0 0x25c6 0x290b 0x2d40 0x2dc1 0x2d6a 0x25bf 0x25c4 0x28f1 0x2d47 0x2db9 0x2d6e 0x25bf 0x25c3 0x28d5 0x2d36 0x2d78 0x2d90 0x25bf 0x25c1 0x28b7 0x2d1d 0x2d42 0x2d9f 0x25bf 0x25c0 0x289b 0x2d04 0x2d2d 0x2d68 0x25be 0x25bf 0x2874 0x2ce6 0x2d21 0x2d14 0x25be 0x25be 0x27f5 0x2cc2 0x2d1e 0x2ce0 0x25be 0x25be 0x26c9 0x2c96 0x2d23 0x2cae 0x25be 0x25bd 0x2617 0x2c65 0x2d25 0x2c87 0x25bd 0x25bc 0x25e8 0x2c30 0x2ced 0x2c71 0x25bd 0x25bc 0x25d3 0x2bf5 0x2ca9 0x2c68 0x25bd 0x25bc 0x25cc 0x2ba7 0x2c8d 0x2c68 0x25bd 0x25bb 0x25c6 0x2b43 0x2c32 0x2c05 0x25bc 0x25bb 0x25c6 0x2b1e 0x2bce 0x2b67 0x25bc 0x25bb 0x25c5 0x2b24 0x2be1 0x2b50 0x25bc 0x25bb 0x25c2 0x2b2f 0x2c10 0x2b77 0x25bc 0x25bb 0x25c1 0x2b16 0x2c29 0x2b8d 0x25bb 0x25ba 0x25bf 0x2b1f 0x2bfc 0x2b7e 0x25bb 0x25ba 0x25be 0x2ac5 0x2b8e 0x2b37 0x25ba 0x25ba 0x25bc 0x2a4c 0x2b55 0x2adf 0x25ba 0x25b9 0x25ba 0x2a16 0x2b1c 0x2a7e 0x25b7 0x25b9 0x25b9 0x29c2 0x2ad9 0x29ff 0x25b7 0x25b9 0x25b9 0x29c2 0x2ad9 0x29ff 0x25b7 0x25b9 0x25b9 0x29c2 0x2ad9 0x29ff>; | |
| }; | |
| qcom,pc-temp-y3-lut { | |
| qcom,lut-col-legend = <0xfffffff6 0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x3795 0x358a 0x343b 0x33ef 0x33de 0x33dc 0x3742 0x3573 0x343d 0x33f0 0x33de 0x33dd 0x36f2 0x355d 0x343f 0x33f1 0x33df 0x33dd 0x36a8 0x3548 0x3440 0x33f2 0x33e0 0x33dd 0x3667 0x3533 0x3441 0x33f3 0x33e1 0x33de 0x3632 0x3520 0x3442 0x33f4 0x33e2 0x33de 0x360f 0x350e 0x3443 0x33f5 0x33e2 0x33df 0x35f0 0x34fd 0x3443 0x33f6 0x33e2 0x33e0 0x35be 0x34ec 0x3444 0x33f7 0x33e3 0x33e1 0x3566 0x34d8 0x344b 0x33f8 0x33e4 0x33e2 0x3532 0x34c6 0x3451 0x33f9 0x33e5 0x33e2 0x3536 0x34ad 0x3449 0x33fa 0x33e5 0x33e3 0x3540 0x3493 0x343c 0x33fb 0x33e5 0x33e4 0x353e 0x348d 0x3437 0x33fc 0x33e6 0x33e4 0x3523 0x3493 0x3432 0x33fd 0x33e9 0x33e4 0x350c 0x3495 0x3430 0x33fe 0x33ec 0x33e4 0x3507 0x3487 0x342e 0x33fb 0x33eb 0x33e6 0x3505 0x3471 0x342a 0x33f7 0x33ea 0x33e8 0x3506 0x3466 0x3426 0x33f6 0x33ea 0x33e8 0x350c 0x3462 0x3421 0x33f7 0x33eb 0x33e9 0x3510 0x345e 0x341b 0x33f8 0x33eb 0x33e9 0x3510 0x345a 0x3416 0x33f6 0x33e7 0x33e5 0x350e 0x3454 0x3411 0x33f1 0x33e1 0x33dd 0x350f 0x344c 0x340d 0x33ee 0x33e0 0x33dc 0x3519 0x343c 0x340a 0x33ed 0x33df 0x33dc 0x3527 0x3432 0x3407 0x33ec 0x33df 0x33dc 0x3535 0x3437 0x33fc 0x33ec 0x33df 0x33dc 0x3543 0x3443 0x33ed 0x33ec 0x33df 0x33dd 0x3555 0x3451 0x33e7 0x33ec 0x33df 0x33dd 0x356c 0x345e 0x33e5 0x33eb 0x33df 0x33db 0x3585 0x346e 0x33e5 0x33eb 0x33df 0x33db 0x359d 0x3484 0x33e8 0x33eb 0x33df 0x33db 0x35b6 0x349e 0x33eb 0x33eb 0x33e0 0x33db 0x35d3 0x34b9 0x33f1 0x33ec 0x33e0 0x33db 0x35f4 0x34d4 0x33f9 0x33ec 0x33e0 0x33dc 0x3617 0x34f4 0x3402 0x33ec 0x33e0 0x33dd 0x363c 0x3518 0x340a 0x33eb 0x33df 0x33dc 0x3662 0x3542 0x3413 0x33eb 0x33de 0x33db 0x3689 0x356f 0x341d 0x33eb 0x33de 0x33db 0x36b2 0x35a2 0x3427 0x33eb 0x33df 0x33dc 0x36dc 0x35d6 0x3435 0x33ec 0x33e0 0x33dd 0x3708 0x3608 0x344a 0x33ec 0x33e0 0x33de 0x3737 0x3639 0x3468 0x33ed 0x33e0 0x33de 0x3772 0x366d 0x348b 0x33ef 0x33df 0x33dd 0x37b4 0x36a3 0x34bb 0x33f2 0x33e1 0x33dd 0x37cd 0x36ae 0x34cd 0x33f4 0x33e4 0x33e2 0x37c7 0x36c0 0x34d4 0x33f6 0x33e7 0x33e4 0x380c 0x36eb 0x3501 0x33fa 0x33ea 0x33e6 0x3846 0x3725 0x3532 0x3401 0x33eb 0x33e6 0x3894 0x3751 0x355f 0x3403 0x33e8 0x33e3 0x38d4 0x3789 0x358f 0x33ff 0x33e5 0x33e3 0x3940 0x37cd 0x35ec 0x3402 0x33e9 0x33e4 0x39c0 0x3833 0x3678 0x340b 0x33ee 0x33e8 0x3bc3 0x38a5 0x371b 0x3414 0x33f3 0x33ed 0x3bc3 0x38a5 0x371b 0x3414 0x33f3 0x33ed 0x3bc3 0x38a5 0x371b 0x3414 0x33f3 0x33ed>; | |
| }; | |
| qcom,pc-temp-y4-lut { | |
| qcom,lut-col-legend = <0xfffffff6 0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x4257 0x4155 0x40e0 0x4078 0x4057 0x404a 0x4271 0x419f 0x40f5 0x407a 0x4052 0x4048 0x4288 0x41db 0x4115 0x407b 0x404f 0x4046 0x429b 0x4208 0x4135 0x407d 0x404d 0x4045 0x42aa 0x4227 0x414f 0x407f 0x404d 0x4044 0x42b5 0x4234 0x415a 0x407f 0x404d 0x4044 0x42b7 0x422b 0x4158 0x4080 0x404e 0x4044 0x42b7 0x4216 0x4153 0x4080 0x4050 0x4045 0x42d1 0x4214 0x4151 0x4081 0x4052 0x4046 0x434d 0x4236 0x4150 0x4085 0x4054 0x4048 0x43ce 0x4267 0x4151 0x4088 0x4056 0x404a 0x4428 0x430c 0x417b 0x408b 0x405a 0x404c 0x446f 0x43ee 0x41c4 0x408d 0x4061 0x4050 0x4443 0x43ee 0x41e1 0x4094 0x4066 0x4054 0x42d9 0x42bc 0x41ea 0x40ac 0x406b 0x405a 0x41cf 0x41d2 0x41e1 0x40c5 0x4071 0x4061 0x41c8 0x41c4 0x41b4 0x40d5 0x407c 0x4068 0x41ca 0x41be 0x417a 0x40e2 0x408b 0x406f 0x41bf 0x41b2 0x415e 0x40ee 0x409c 0x407b 0x418f 0x4192 0x414d 0x40fb 0x40b4 0x4093 0x415e 0x416b 0x4139 0x4102 0x40c1 0x40a0 0x4143 0x413e 0x4110 0x40dc 0x40a0 0x4089 0x412f 0x4110 0x40de 0x4090 0x4069 0x4060 0x4129 0x40fb 0x40c0 0x406f 0x4055 0x4050 0x4127 0x40f2 0x40ac 0x4063 0x404d 0x4049 0x4127 0x40ed 0x409f 0x405e 0x404a 0x4046 0x4127 0x40eb 0x40a1 0x405e 0x404c 0x4047 0x4129 0x40eb 0x40ae 0x4060 0x404f 0x4049 0x412a 0x40eb 0x40ae 0x4062 0x4054 0x404d 0x412a 0x40ec 0x40a8 0x4066 0x405b 0x4055 0x412b 0x40ed 0x40a5 0x406a 0x4064 0x405f 0x412e 0x40ec 0x40a5 0x406c 0x406f 0x406a 0x4135 0x40ec 0x40a6 0x406e 0x4079 0x4074 0x413c 0x40f0 0x40a9 0x406e 0x407a 0x4076 0x4142 0x40fa 0x40ad 0x406f 0x4075 0x4073 0x4147 0x4106 0x40b3 0x406e 0x406e 0x406f 0x4149 0x410f 0x40bc 0x406a 0x405d 0x405e 0x414a 0x4117 0x40c6 0x4062 0x404a 0x4048 0x414a 0x411d 0x40d2 0x405f 0x4047 0x4044 0x414c 0x4124 0x40e1 0x4061 0x404a 0x4048 0x414e 0x412a 0x40ec 0x4064 0x404e 0x404c 0x4155 0x412d 0x40f3 0x406b 0x4050 0x404d 0x4161 0x412a 0x40f6 0x4074 0x4051 0x404e 0x4176 0x4113 0x40f4 0x4078 0x404a 0x4044 0x4190 0x410a 0x40f1 0x407a 0x4046 0x4040 0x418b 0x4109 0x40ee 0x4080 0x4051 0x404e 0x417c 0x410b 0x40f8 0x4085 0x405f 0x4063 0x4190 0x4122 0x4111 0x4094 0x407b 0x4082 0x41a2 0x4140 0x412f 0x40ac 0x4087 0x4089 0x41a9 0x4159 0x4141 0x40b8 0x406d 0x4061 0x4196 0x4147 0x413a 0x4093 0x4052 0x4048 0x4183 0x412f 0x412e 0x409f 0x4057 0x404b 0x4181 0x4133 0x4139 0x40b8 0x4064 0x4052 0x4204 0x4145 0x4150 0x40d9 0x4090 0x407e 0x4204 0x4145 0x4150 0x40d9 0x4090 0x407e 0x4204 0x4145 0x4150 0x40d9 0x4090 0x407e>; | |
| }; | |
| qcom,pc-temp-y5-lut { | |
| qcom,lut-col-legend = <0xfffffff6 0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x2f0b 0x3294 0x3ec7 0x4d80 0x3f3c 0x4c67 0x3064 0x33a8 0x4064 0x4db5 0x4447 0x4ca1 0x31d8 0x3567 0x422f 0x4d96 0x473b 0x4c93 0x3343 0x377c 0x43f0 0x4d44 0x489b 0x4c4a 0x3483 0x398d 0x4570 0x4cdf 0x48e9 0x4bd4 0x3572 0x3b43 0x4678 0x4c8b 0x48a8 0x4b3e 0x363b 0x3ec6 0x4712 0x4c0e 0x46e2 0x4a73 0x36dc 0x4370 0x4787 0x4b42 0x4419 0x497d 0x3663 0x42f4 0x48b7 0x4a44 0x42eb 0x4896 0x32dc 0x3963 0x4d94 0x4851 0x4258 0x478e 0x3062 0x3277 0x50eb 0x4635 0x41a6 0x465b 0x3b02 0x36c5 0x4823 0x4425 0x3f5e 0x44e6 0x4d6b 0x3fbf 0x39b8 0x41f0 0x3c69 0x432a 0x4f9a 0x4600 0x38ab 0x4033 0x3c08 0x40ff 0x40ec 0x4e01 0x459b 0x3e56 0x3d28 0x3dfc 0x35ec 0x5269 0x4fea 0x3d2e 0x3dd9 0x3c5e 0x3684 0x4f8d 0x50d0 0x3c99 0x3c61 0x3c9e 0x3836 0x49bb 0x50c2 0x3beb 0x3a60 0x3d1a 0x3986 0x45b3 0x5281 0x3d2f 0x3add 0x3dbf 0x3aaf 0x431b 0x5707 0x487e 0x3fee 0x4004 0x3b50 0x4202 0x5ab2 0x542c 0x4596 0x4297 0x390e 0x4175 0x5bfc 0x59f3 0x4ae5 0x44fc 0x3468 0x408e 0x5cdd 0x5e0b 0x4f84 0x47b5 0x3291 0x3e2a 0x5dc4 0x5ed8 0x50ab 0x4a96 0x322e 0x36b1 0x5ec2 0x5e02 0x50cc 0x4e67 0x320a 0x3158 0x5fad 0x5ccb 0x5055 0x5082 0x31fa 0x3140 0x5a75 0x5b74 0x4de7 0x4ed5 0x31e0 0x3155 0x4e1b 0x59df 0x4a4a 0x4b01 0x31f0 0x3159 0x47cf 0x58c1 0x489d 0x46f4 0x32bd 0x31bf 0x3ee7 0x5843 0x47c8 0x41ec 0x33a3 0x3262 0x3a27 0x5839 0x4779 0x3f43 0x341b 0x33c5 0x3a59 0x59e6 0x4877 0x3fa6 0x3474 0x359a 0x3b19 0x5dea 0x4acc 0x40dc 0x34e4 0x361b 0x3cbb 0x5ffd 0x4e30 0x43af 0x35c7 0x3631 0x40c7 0x606b 0x53b5 0x4b46 0x36a6 0x3647 0x430b 0x6081 0x568f 0x5110 0x370a 0x36f6 0x4365 0x5ea5 0x5579 0x531a 0x3758 0x3854 0x436d 0x59b3 0x5336 0x544b 0x3744 0x3924 0x4168 0x54af 0x5192 0x53fb 0x3605 0x3991 0x3c25 0x4fc3 0x5058 0x5208 0x348f 0x39cd 0x38fb 0x4b75 0x4ef0 0x50b5 0x3415 0x3986 0x3886 0x47fe 0x4ca2 0x50dd 0x33f9 0x391c 0x38f7 0x44ae 0x4b52 0x5195 0x34a1 0x387f 0x38b0 0x431d 0x4b06 0x4e84 0x356a 0x3691 0x3826 0x44e7 0x4a9f 0x4698 0x369e 0x3615 0x3876 0x441e 0x45d3 0x4810 0x36ba 0x3715 0x37b4 0x4401 0x46d3 0x45d9 0x37de 0x376c 0x37d5 0x453f 0x48c4 0x449c 0x384f 0x3727 0x3887 0x4790 0x47e8 0x42c7 0x393b 0x380d 0x391c 0x4ab8 0x4938 0x4911 0x3826 0x3931 0x38a7 0x4c50 0x4b21 0x4eb0 0x3655 0x375b 0x38b3 0x493b 0x50a7 0x4dec 0x35b6 0x3713 0x38b0 0x4cc7 0x5dba 0x57e3 0x30a0 0x36cb 0x3a31 0x4f54 0x617f 0x633d 0x30a0 0x36cb 0x3a31 0x4f54 0x617f 0x633d 0x30a0 0x36cb 0x3a31 0x4f54 0x617f 0x633d>; | |
| }; | |
| qcom,pc-temp-y6-lut { | |
| qcom,lut-col-legend = <0xfffffff6 0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x1948 0x16eb 0x14fa 0x13dd 0x139d 0x1391 0x190b 0x16e1 0x14fb 0x13dd 0x139d 0x1391 0x18d0 0x16d6 0x14fb 0x13dd 0x139d 0x1390 0x189a 0x16c9 0x14fb 0x13dd 0x139d 0x1390 0x1869 0x16bb 0x14fb 0x13dd 0x139d 0x1391 0x1840 0x16ae 0x14fa 0x13de 0x139d 0x1391 0x181d 0x16a0 0x14f5 0x13de 0x139e 0x1391 0x17ff 0x1692 0x14ed 0x13de 0x139e 0x1392 0x17e9 0x1680 0x14e9 0x13de 0x139f 0x1393 0x17d6 0x1668 0x14e7 0x13df 0x13a0 0x1394 0x17cd 0x165a 0x14e6 0x13e0 0x13a2 0x1395 0x17df 0x1674 0x14e9 0x13e1 0x13a3 0x1396 0x17fc 0x169f 0x14ef 0x13e2 0x13a4 0x1398 0x17f1 0x169e 0x14f1 0x13e4 0x13a7 0x1399 0x1780 0x1653 0x14ef 0x13eb 0x13aa 0x139b 0x172c 0x1613 0x14ec 0x13f1 0x13ad 0x139d 0x172a 0x1607 0x14e1 0x13f4 0x13b1 0x13a0 0x172a 0x1600 0x14d1 0x13f7 0x13b4 0x13a3 0x1728 0x15f6 0x14c6 0x13fa 0x13b9 0x13a8 0x171f 0x15e7 0x14bd 0x13fe 0x13c0 0x13af 0x1716 0x15d9 0x14b3 0x1400 0x13c3 0x13b2 0x170f 0x15ce 0x14a4 0x13f3 0x13b7 0x13a8 0x170a 0x15c4 0x1493 0x13da 0x13a3 0x1397 0x1709 0x15bf 0x148a 0x13d0 0x139c 0x1391 0x1711 0x15be 0x1486 0x13cc 0x139a 0x1390 0x171b 0x15bd 0x1483 0x13cb 0x1399 0x138f 0x1726 0x15c3 0x1483 0x13cb 0x1399 0x138f 0x1733 0x15d4 0x1482 0x13cc 0x139a 0x1390 0x1741 0x15e3 0x1482 0x13ce 0x139c 0x1392 0x1752 0x15f2 0x1485 0x13d0 0x139e 0x1393 0x1765 0x1603 0x148b 0x13d2 0x13a1 0x1396 0x1778 0x1617 0x1493 0x13d3 0x13a5 0x1399 0x178e 0x1630 0x149f 0x13d5 0x13a8 0x139c 0x17a6 0x164a 0x14ac 0x13d7 0x13a9 0x139d 0x17c1 0x1668 0x14bc 0x13d8 0x13a8 0x139d 0x17dd 0x1689 0x14ce 0x13d9 0x13a6 0x139d 0x17fa 0x16ab 0x14e2 0x13d9 0x13a1 0x1397 0x1819 0x16d1 0x14f9 0x13d8 0x139b 0x1391 0x1838 0x16f9 0x1513 0x13d8 0x139a 0x1390 0x1858 0x1725 0x1530 0x13da 0x139c 0x1392 0x1879 0x1751 0x1551 0x13df 0x139e 0x1394 0x189e 0x177a 0x1578 0x13e4 0x13a0 0x1395 0x18c7 0x17a0 0x15a6 0x13ec 0x13a0 0x1396 0x18fb 0x17c3 0x15d8 0x13f3 0x139f 0x1392 0x1939 0x17ec 0x1614 0x13fd 0x139f 0x1391 0x1953 0x17fb 0x1622 0x1404 0x13a5 0x139a 0x1953 0x1809 0x1632 0x1407 0x13ac 0x13a1 0x1990 0x1831 0x1664 0x1411 0x13b6 0x13ac 0x19c4 0x1867 0x1698 0x141f 0x13ba 0x13ae 0x1a02 0x1890 0x16c7 0x1425 0x13b0 0x13a0 0x1a34 0x18b9 0x16f3 0x141b 0x13a7 0x1399 0x1a86 0x18ec 0x1742 0x142d 0x13ad 0x139c 0x1af3 0x1940 0x17be 0x144a 0x13b6 0x13a2 0x1cdd 0x19a7 0x184c 0x146a 0x13c8 0x13b3 0x1cdd 0x19a7 0x184c 0x146a 0x13c8 0x13b3 0x1cdd 0x19a7 0x184c 0x146a 0x13c8 0x13b3>; | |
| }; | |
| }; | |
| qcom,sunwoda_3900mah { | |
| qcom,max-voltage-uv = <0x432380>; | |
| qcom,fg-cc-cv-threshold-mv = <0x1126>; | |
| qcom,fastchg-current-ma = <0x7d0>; | |
| qcom,batt-id-kohm = <0x14a>; | |
| qcom,battery-beta = <0xd6b>; | |
| qcom,battery-therm-kohm = <0x0a>; | |
| qcom,battery-type = "sunwoda_3900mAh"; | |
| qcom,qg-batt-profile-ver = <0x64>; | |
| qcom,jeita-fcc-ranges = <0x00 0x32 0x5f370 0x33 0x96 0x11da50 0x97 0x1c2 0x1e8480 0x1c3 0x258 0x1dc130>; | |
| qcom,jeita-fv-ranges = <0x00 0x32 0x432380 0x33 0x96 0x432380 0x97 0x1c2 0x432380 0x1c3 0x258 0x3e8fa0>; | |
| qcom,step-chg-ranges = <0x36ee80 0x401640 0x34a490 0x401a28 0x419ce0 0x2a1d40 0x41a0c8 0x426030 0x1f95f0>; | |
| qcom,jeita-soft-thresholds = <0x2fdd 0xfe5>; | |
| qcom,jeita-hard-thresholds = <0x35c4 0xa5b>; | |
| qcom,fcc1-temp-lut { | |
| qcom,lut-col-legend = <0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-data = <0xd31 0xd64 0xd99 0xda8 0xdac>; | |
| }; | |
| qcom,fcc2-temp-lut { | |
| qcom,lut-col-legend = <0xfffffff6 0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-data = <0xd98 0xd9a 0xd94 0xda4 0xd96 0xd8a>; | |
| }; | |
| qcom,pc-temp-v1-lut { | |
| qcom,lut-col-legend = <0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0xa8cc 0xa933 0xa96a 0xa974 0xa977 0xa7d3 0xa83f 0xa885 0xa88d 0xa890 0xa6e3 0xa750 0xa796 0xa7a4 0xa7aa 0xa5f8 0xa665 0xa6a6 0xa6bb 0xa6c5 0xa516 0xa57f 0xa5be 0xa5d6 0xa5e1 0xa43b 0xa49f 0xa4da 0xa4f1 0xa4fe 0xa368 0xa3c4 0xa3f8 0xa40f 0xa41d 0xa298 0xa2ed 0xa31a 0xa32f 0xa33f 0xa1cb 0xa219 0xa240 0xa254 0xa263 0xa104 0xa148 0xa16a 0xa17d 0xa18b 0xa04f 0xa083 0xa099 0xa0ac 0xa0b7 0x9fa2 0x9fcf 0x9fd4 0x9fe0 0x9fe8 0x9ee4 0x9f1c 0x9f19 0x9f19 0x9f1e 0x9e01 0x9e4e 0x9e5d 0x9e5a 0x9e5d 0x9d26 0x9d6e 0x9d94 0x9d9f 0x9da3 0x9c7d 0x9cb3 0x9cd2 0x9cea 0x9cf0 0x9bee 0x9c26 0x9c30 0x9c42 0x9c47 0x9b6b 0x9ba6 0x9ba3 0x9ba5 0x9ba6 0x9af8 0x9b20 0x9b11 0x9b0a 0x9b09 0x9a88 0x9a9b 0x9a7c 0x9a70 0x9a72 0x9a02 0x99fb 0x99dc 0x99d0 0x99d8 0x9967 0x9902 0x9918 0x9913 0x991e 0x98c8 0x9810 0x9831 0x9830 0x9837 0x9816 0x9799 0x9784 0x9778 0x9777 0x976c 0x9750 0x9712 0x96fa 0x96f6 0x9704 0x9709 0x96b5 0x9692 0x968b 0x96bd 0x96bb 0x965b 0x9630 0x9627 0x9685 0x9671 0x9608 0x95d7 0x95cb 0x9657 0x962c 0x95be 0x9586 0x9577 0x9630 0x95ed 0x9579 0x953c 0x952b 0x9607 0x95b3 0x953c 0x94fa 0x94e6 0x95dc 0x957d 0x9505 0x94be 0x94a7 0x95b2 0x954b 0x94d3 0x948a 0x946f 0x958c 0x951f 0x94a5 0x9457 0x9436 0x9569 0x94f9 0x947e 0x942a 0x9401 0x9543 0x94d2 0x9456 0x93fc 0x93ca 0x951e 0x94ad 0x942a 0x93c7 0x9387 0x94f1 0x9484 0x93fa 0x938b 0x933b 0x94a7 0x9442 0x93b8 0x9342 0x92ea 0x943a 0x93d8 0x9356 0x92e5 0x9294 0x93c1 0x935e 0x92e2 0x9279 0x9232 0x9339 0x92db 0x9262 0x91fc 0x91b5 0x92a5 0x924b 0x91d4 0x916f 0x9124 0x91fc 0x91aa 0x913a 0x90d8 0x9087 0x9197 0x912a 0x90c5 0x9064 0x9016 0x9147 0x90e5 0x9080 0x9021 0x8fd3 0x9125 0x90c8 0x906a 0x9006 0x8fbe 0x9108 0x90af 0x9055 0x8fec 0x8fa2 0x90dc 0x908f 0x9027 0x8fb4 0x8f6a 0x903f 0x8ff3 0x8f4b 0x8ed2 0x8e88 0x8ecb 0x8e81 0x8dc2 0x8d54 0x8d0c 0x8ce7 0x8c9f 0x8bbb 0x8b67 0x8b24 0x8a7a 0x8a30 0x891a 0x88ea 0x88b2 0x872c 0x86db 0x857e 0x8588 0x8566 0x81fb 0x8172 0x7fd5 0x8053 0x805e 0x7530 0x7530 0x7530 0x7530 0x7530>; | |
| }; | |
| qcom,pc-temp-v2-lut { | |
| qcom,lut-col-legend = <0xfffffff6 0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0xa9a1 0xa997 0xa979 0xa960 0xa933 0xa91f 0xa83e 0xa865 0xa859 0xa856 0xa82c 0xa819 0xa6fc 0xa745 0xa74a 0xa756 0xa72f 0xa71d 0xa5de 0xa63b 0xa64b 0xa662 0xa63d 0xa62d 0xa4e0 0xa544 0xa55d 0xa579 0xa556 0xa548 0xa3f0 0xa458 0xa475 0xa495 0xa473 0xa466 0xa308 0xa374 0xa390 0xa3b0 0xa390 0xa384 0xa22c 0xa299 0xa2b1 0xa2d0 0xa2b1 0xa2a5 0xa157 0xa1bd 0xa1d7 0xa1f4 0xa1d6 0xa1cb 0xa08c 0xa0e2 0xa101 0xa11b 0xa0ff 0xa0f4 0x9fc0 0xa013 0xa034 0xa04a 0xa02d 0xa022 0x9ef6 0x9f5c 0x9f7a 0x9f88 0x9f62 0x9f55 0x9e22 0x9ea8 0x9ec2 0x9ec8 0x9e9c 0x9e8e 0x9d1c 0x9dd7 0x9df0 0x9dfd 0x9ddb 0x9dcf 0x9bdf 0x9cef 0x9d07 0x9d29 0x9d1e 0x9d16 0x9ad4 0x9c12 0x9c3c 0x9c6b 0x9c6a 0x9c64 0x9a13 0x9b4f 0x9ba4 0x9bce 0x9bc5 0x9bbc 0x9968 0x9a92 0x9b14 0x9b38 0x9b25 0x9b1a 0x98b3 0x99ca 0x9a57 0x9a95 0x9a84 0x9a7b 0x97fc 0x98fa 0x9973 0x99e7 0x99e4 0x99df 0x9756 0x983d 0x98a0 0x9928 0x9931 0x9931 0x96bf 0x9796 0x97e6 0x983f 0x984c 0x9852 0x963c 0x96ff 0x9741 0x9768 0x976e 0x9773 0x95d6 0x9677 0x96b9 0x96d5 0x96d5 0x96d6 0x9582 0x95fc 0x9644 0x9660 0x965e 0x965e 0x9539 0x958f 0x95da 0x95f6 0x95f4 0x95f3 0x94fa 0x952d 0x9579 0x9596 0x9593 0x9590 0x94c0 0x94da 0x9521 0x953e 0x953a 0x9536 0x948b 0x9497 0x94d0 0x94ee 0x94e8 0x94e2 0x945c 0x945f 0x9485 0x94a3 0x949c 0x9495 0x942e 0x942f 0x9442 0x9460 0x9458 0x944f 0x9401 0x9407 0x9403 0x9421 0x941b 0x9411 0x93d3 0x93e0 0x93ce 0x93e6 0x93e0 0x93d6 0x93a3 0x93b7 0x93a7 0x93ab 0x939e 0x9395 0x9372 0x938e 0x9388 0x9372 0x9358 0x934b 0x933c 0x935f 0x9360 0x9335 0x930b 0x92f5 0x9301 0x932d 0x932d 0x92f4 0x92b2 0x928d 0x92c0 0x92f2 0x92f1 0x92ae 0x9259 0x9223 0x9273 0x92aa 0x92ac 0x9263 0x920b 0x91cf 0x921c 0x9253 0x925a 0x9213 0x91c1 0x9188 0x91be 0x91f0 0x91f9 0x91b5 0x916a 0x9136 0x9156 0x917b 0x917e 0x9143 0x90fd 0x90cd 0x90ef 0x90f7 0x90f2 0x90ba 0x907c 0x9051 0x908d 0x9064 0x9052 0x9024 0x8fe7 0x8fbc 0x902d 0x8ffc 0x8fe5 0x8fd2 0x8f99 0x8f68 0x8fc8 0x8fae 0x8fa1 0x8fa7 0x8f6e 0x8f41 0x8f8a 0x8f84 0x8f7c 0x8f85 0x8f52 0x8f2b 0x8f3e 0x8f50 0x8f4c 0x8f54 0x8f29 0x8f04 0x8ec9 0x8ef2 0x8eef 0x8edf 0x8ebe 0x8eb0 0x8de9 0x8e1c 0x8e10 0x8db0 0x8daf 0x8db6 0x8c79 0x8c97 0x8c75 0x8bd4 0x8bf9 0x8c1b 0x8a6c 0x8a7c 0x8a49 0x8979 0x89c7 0x8a0c 0x8795 0x87b9 0x8778 0x8669 0x86f6 0x8774 0x8388 0x83df 0x838d 0x8232 0x8331 0x83ff 0x7c71 0x7dbf 0x7df4 0x7c7b 0x7d01 0x7f05 0x6e00 0x70e0 0x7156 0x6b76 0x6faa 0x73b1>; | |
| }; | |
| qcom,pc-temp-z1-lut { | |
| qcom,lut-col-legend = <0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x3587 0x32b7 0x3057 0x2f6a 0x2f2f 0x354f 0x32a7 0x3052 0x2f71 0x2f3c 0x3535 0x3299 0x304b 0x2f6f 0x2f3d 0x3526 0x328e 0x3045 0x2f6e 0x2f3d 0x351a 0x327f 0x303d 0x2f6c 0x2f3d 0x3511 0x3274 0x3036 0x2f69 0x2f3d 0x3509 0x3269 0x3033 0x2f68 0x2f3c 0x3501 0x3262 0x3031 0x2f67 0x2f3c 0x34f8 0x3260 0x3031 0x2f67 0x2f3b 0x34ef 0x325f 0x3033 0x2f67 0x2f3b 0x34e4 0x3260 0x3036 0x2f68 0x2f3b 0x34d7 0x3263 0x3036 0x2f68 0x2f3b 0x34c8 0x3265 0x3036 0x2f69 0x2f3d 0x34b0 0x3260 0x3036 0x2f6b 0x2f3f 0x349d 0x3257 0x3037 0x2f6d 0x2f41 0x349d 0x3253 0x303b 0x2f70 0x2f42 0x34a1 0x325b 0x3040 0x2f73 0x2f45 0x34a6 0x3268 0x3048 0x2f77 0x2f47 0x34b1 0x3270 0x3051 0x2f7b 0x2f4a 0x34be 0x3277 0x305a 0x2f80 0x2f4d 0x34ca 0x327f 0x3063 0x2f85 0x2f51 0x34d5 0x3289 0x306c 0x2f8b 0x2f55 0x34e2 0x3294 0x3074 0x2f91 0x2f5a 0x34f3 0x329d 0x307c 0x2f98 0x2f5f 0x3504 0x32a5 0x3086 0x2f9d 0x2f63 0x350a 0x32ab 0x308f 0x2fa3 0x2f67 0x350c 0x32b2 0x3098 0x2fa8 0x2f6b 0x350e 0x32b9 0x30a0 0x2fae 0x2f6f 0x351a 0x32c0 0x30a8 0x2fb4 0x2f73 0x352d 0x32cc 0x30b0 0x2fba 0x2f77 0x3539 0x32d2 0x30b8 0x2fc0 0x2f7c 0x353f 0x32d2 0x30bf 0x2fc6 0x2f80 0x3540 0x32d2 0x30c6 0x2fcd 0x2f85 0x353b 0x32d7 0x30ce 0x2fd4 0x2f8b 0x3532 0x32e9 0x30d9 0x2fdd 0x2f91 0x3533 0x32f7 0x30e5 0x2fe6 0x2f97 0x353d 0x3300 0x30f1 0x2fef 0x2f9e 0x3548 0x3309 0x30fd 0x2ff8 0x2fa4 0x354f 0x330c 0x3109 0x3002 0x2fab 0x3556 0x330e 0x3115 0x300d 0x2fb2 0x355f 0x330f 0x3121 0x3017 0x2fb9 0x356e 0x331d 0x312c 0x3022 0x2fc0 0x357e 0x332a 0x3136 0x302c 0x2fc8 0x3596 0x3333 0x313f 0x3038 0x2fcf 0x3595 0x3336 0x314d 0x3044 0x2fd8 0x3595 0x3337 0x315e 0x304f 0x2fe0 0x357d 0x3336 0x3160 0x3056 0x2fe6 0x3590 0x334b 0x3162 0x305e 0x2fed 0x3592 0x333e 0x3173 0x306b 0x2ff8 0x3595 0x3354 0x3185 0x3078 0x3003 0x3595 0x3368 0x3186 0x3086 0x300f 0x35ac 0x336e 0x3193 0x3094 0x301c 0x35ab 0x337f 0x31a7 0x30a8 0x302c 0x35ba 0x3391 0x31bf 0x30bf 0x3043 0x35ba 0x3391 0x31bf 0x30bf 0x3043 0x35ba 0x3391 0x31bf 0x30bf 0x3043>; | |
| }; | |
| qcom,pc-temp-z2-lut { | |
| qcom,lut-col-legend = <0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x26ff 0x286f 0x298f 0x28f1 0x28b2 0x2724 0x2865 0x29ad 0x2859 0x2827 0x2743 0x285d 0x2920 0x284f 0x282a 0x2763 0x285b 0x289d 0x2848 0x2829 0x2774 0x2859 0x2876 0x283b 0x2817 0x276e 0x2855 0x2858 0x282d 0x27fa 0x2761 0x283f 0x2854 0x2827 0x27f3 0x2755 0x2829 0x2858 0x2825 0x27fd 0x274a 0x2826 0x285a 0x2824 0x280b 0x2742 0x2828 0x2856 0x2824 0x281a 0x273c 0x282d 0x2851 0x2829 0x2828 0x2737 0x283a 0x2853 0x2830 0x282d 0x2736 0x2846 0x2854 0x2844 0x282c 0x273d 0x2845 0x284e 0x2851 0x282d 0x2746 0x2840 0x2840 0x284f 0x2837 0x2748 0x283e 0x2833 0x284a 0x2845 0x2748 0x2848 0x2839 0x284c 0x2851 0x274a 0x2859 0x2850 0x2856 0x285f 0x2756 0x2871 0x2863 0x285e 0x2865 0x276a 0x2892 0x286d 0x2863 0x286a 0x277f 0x28a0 0x2876 0x2867 0x2872 0x279a 0x289c 0x2885 0x285e 0x2864 0x27ad 0x2894 0x289b 0x2831 0x281e 0x27b9 0x288d 0x28a0 0x2803 0x27e4 0x27c2 0x2884 0x2872 0x27d5 0x27be 0x27c7 0x287c 0x2842 0x27b1 0x27a0 0x27ce 0x2870 0x2840 0x27b0 0x279d 0x27d2 0x2865 0x2843 0x27ba 0x27a5 0x27c9 0x285f 0x2846 0x27c5 0x27ae 0x27b9 0x285c 0x2847 0x27d4 0x27b9 0x27b5 0x285c 0x284a 0x27e8 0x27c7 0x27b8 0x2867 0x2857 0x27fe 0x27da 0x27bb 0x2875 0x2874 0x281b 0x27f2 0x27bf 0x2880 0x288d 0x283a 0x280d 0x27c4 0x2888 0x28a5 0x285d 0x2830 0x27c7 0x2890 0x28b6 0x287f 0x2856 0x27ca 0x2899 0x28bf 0x2899 0x2876 0x27cd 0x28a3 0x28c6 0x28b0 0x2893 0x27cb 0x28aa 0x28ca 0x28c5 0x28a5 0x27c5 0x28b3 0x28d7 0x28dd 0x28b2 0x27bf 0x28b7 0x28e1 0x28ec 0x28ba 0x27b4 0x28a7 0x28e2 0x28ec 0x28be 0x27a8 0x2891 0x28e4 0x28ea 0x28bc 0x279e 0x2885 0x28d5 0x28e9 0x28a2 0x2750 0x2883 0x28d7 0x28ef 0x2895 0x27bd 0x282d 0x28f6 0x2915 0x28a2 0x2713 0x2832 0x28fa 0x2922 0x28b0 0x27a7 0x2837 0x2923 0x2946 0x28ed 0x280f 0x2913 0x295c 0x2974 0x292c 0x275d 0x2888 0x293c 0x291c 0x28b5 0x26dc 0x2800 0x28f0 0x28d6 0x284a 0x267e 0x278a 0x2890 0x289e 0x2810 0x25a8 0x270e 0x284f 0x2866 0x27c6 0x24e0 0x2666 0x280f 0x2815 0x2751 0x24e0 0x2666 0x280f 0x2815 0x2751 0x24e0 0x2666 0x280f 0x2815 0x2751>; | |
| }; | |
| qcom,pc-temp-z3-lut { | |
| qcom,lut-col-legend = <0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x4bf1 0x4ba7 0x4ba2 0x4b7e 0x4b74 0x4c68 0x4be4 0x4b9e 0x4b86 0x4b81 0x4c9f 0x4c0b 0x4bad 0x4b8d 0x4b87 0x4cbd 0x4c18 0x4bb7 0x4b92 0x4b8c 0x4cca 0x4c1f 0x4bb9 0x4b97 0x4b90 0x4cc9 0x4c20 0x4bbb 0x4b9a 0x4b93 0x4cc9 0x4c1e 0x4bba 0x4b9b 0x4b94 0x4cc7 0x4c1b 0x4bb8 0x4b9a 0x4b93 0x4cc3 0x4c19 0x4bb6 0x4b98 0x4b92 0x4cbf 0x4c17 0x4bb4 0x4b96 0x4b91 0x4cbd 0x4c15 0x4bb2 0x4b93 0x4b90 0x4cba 0x4c0e 0x4bb1 0x4b91 0x4b8e 0x4cba 0x4c08 0x4bae 0x4b91 0x4b8e 0x4cba 0x4c08 0x4bac 0x4b90 0x4b8d 0x4cbb 0x4c0b 0x4bac 0x4b8f 0x4b8a 0x4cb7 0x4c0b 0x4bac 0x4b8e 0x4b88 0x4caa 0x4c04 0x4bab 0x4b8c 0x4b86 0x4c9f 0x4bfa 0x4ba9 0x4b8a 0x4b84 0x4c94 0x4bf8 0x4ba8 0x4b89 0x4b82 0x4c8c 0x4bf6 0x4ba8 0x4b89 0x4b80 0x4c8d 0x4bf7 0x4ba9 0x4b89 0x4b7e 0x4c95 0x4bfc 0x4bac 0x4b8c 0x4b80 0x4c9c 0x4c04 0x4bb2 0x4b96 0x4b8d 0x4ca3 0x4c06 0x4bba 0x4b9d 0x4b96 0x4caa 0x4c08 0x4bc2 0x4ba1 0x4b99 0x4cab 0x4c0a 0x4bc9 0x4ba4 0x4b9b 0x4caa 0x4c10 0x4bc8 0x4ba4 0x4b9b 0x4ca8 0x4c18 0x4bc6 0x4ba2 0x4b98 0x4ca4 0x4c18 0x4bc3 0x4b9f 0x4b95 0x4c9f 0x4c14 0x4bbf 0x4b9c 0x4b92 0x4c9b 0x4c11 0x4bbc 0x4b99 0x4b8f 0x4c99 0x4c0d 0x4bb8 0x4b96 0x4b8c 0x4c96 0x4c0a 0x4bb5 0x4b93 0x4b88 0x4c94 0x4c07 0x4bb3 0x4b8f 0x4b84 0x4c91 0x4c05 0x4bb1 0x4b8a 0x4b7f 0x4c8d 0x4c02 0x4baf 0x4b87 0x4b7c 0x4c88 0x4bfe 0x4bad 0x4b86 0x4b7d 0x4c83 0x4bfb 0x4baa 0x4b86 0x4b81 0x4c80 0x4bf8 0x4ba8 0x4b86 0x4b82 0x4c7e 0x4bf6 0x4ba6 0x4b86 0x4b80 0x4c7b 0x4bf3 0x4ba4 0x4b86 0x4b7e 0x4c77 0x4bf1 0x4ba2 0x4b86 0x4b7e 0x4c73 0x4bee 0x4ba0 0x4b86 0x4b7f 0x4c6d 0x4bea 0x4b9f 0x4b88 0x4b81 0x4ba1 0x4bdf 0x4b99 0x4b87 0x4b80 0x4b3e 0x4bb6 0x4b90 0x4b7b 0x4b7c 0x4b3f 0x4bab 0x4b88 0x4b79 0x4b75 0x4b3d 0x4ba1 0x4b84 0x4b75 0x4b71 0x4b3d 0x4b49 0x4b7e 0x4b75 0x4b6d 0x4b3e 0x4b4a 0x4b87 0x4b7f 0x4b77 0x4b3f 0x4b67 0x4b89 0x4b82 0x4b7c 0x4b3f 0x4b4a 0x4b9d 0x4b85 0x4b7f 0x4b42 0x4b4b 0x4ba1 0x4b89 0x4b87 0x4b48 0x4b50 0x4ba8 0x4b95 0x4b91 0x4b48 0x4b50 0x4ba8 0x4b95 0x4b91 0x4b48 0x4b50 0x4ba8 0x4b95 0x4b91>; | |
| }; | |
| qcom,pc-temp-z4-lut { | |
| qcom,lut-col-legend = <0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x3d0b 0x3b03 0x39ad 0x39a9 0x39a6 0x3d5f 0x3afb 0x3a10 0x39dc 0x39cc 0x3d4d 0x3ae8 0x39fb 0x39ce 0x39c4 0x3caa 0x3abc 0x39e5 0x39ba 0x39b7 0x3bfb 0x3a68 0x39ca 0x39a8 0x39a9 0x3b8e 0x3a27 0x39ac 0x3994 0x3999 0x3b33 0x39fd 0x3995 0x3986 0x398b 0x3aed 0x39dc 0x3981 0x3979 0x397f 0x3ab7 0x39c0 0x3976 0x3971 0x3977 0x3a89 0x39a8 0x3971 0x396c 0x3973 0x3a5a 0x3999 0x396e 0x3969 0x3971 0x3a2f 0x398f 0x3968 0x3965 0x396e 0x3a1c 0x3989 0x3961 0x3960 0x396b 0x3a18 0x398a 0x395e 0x395c 0x3969 0x3a15 0x398f 0x395e 0x3959 0x3966 0x3a08 0x3991 0x395e 0x3958 0x3964 0x39ee 0x3980 0x395a 0x3955 0x3961 0x39d8 0x396e 0x3951 0x3950 0x395c 0x39c6 0x396d 0x394d 0x394d 0x3959 0x39ba 0x3972 0x3954 0x394e 0x3957 0x39be 0x397d 0x395f 0x3953 0x3955 0x39d5 0x39df 0x397c 0x3962 0x395d 0x39f3 0x3a4f 0x39ba 0x398d 0x3986 0x3a32 0x3a4f 0x39d3 0x39a3 0x399e 0x3a75 0x3a23 0x39b6 0x3992 0x398f 0x3a7e 0x39fa 0x3995 0x397b 0x3978 0x3a73 0x39dd 0x3988 0x3971 0x396f 0x3a66 0x39c5 0x3981 0x396c 0x396b 0x3a54 0x39ba 0x397d 0x3968 0x3968 0x3a3e 0x39b3 0x397b 0x3965 0x3964 0x3a2c 0x39af 0x3979 0x3963 0x3960 0x3a1e 0x39ae 0x3978 0x3960 0x395b 0x3a13 0x39ad 0x3978 0x395c 0x3955 0x3a08 0x39ac 0x3976 0x3959 0x3951 0x39ff 0x39ab 0x3975 0x3954 0x394c 0x39f6 0x39a9 0x3972 0x3951 0x394a 0x39ea 0x39a4 0x396f 0x3951 0x394d 0x39e0 0x399c 0x396c 0x3952 0x3958 0x39d9 0x3998 0x3969 0x3952 0x395b 0x39d4 0x3996 0x3967 0x3951 0x3955 0x39cd 0x3993 0x3965 0x394f 0x3951 0x39c3 0x398a 0x395f 0x394b 0x3951 0x39b6 0x397e 0x3956 0x3947 0x3953 0x39a1 0x3974 0x3951 0x3946 0x395a 0x3a31 0x395b 0x3944 0x393d 0x3952 0x3a75 0x3961 0x392e 0x3926 0x392b 0x3a74 0x3966 0x392b 0x391d 0x3920 0x3a6e 0x396b 0x3926 0x3916 0x3919 0x3a67 0x39ca 0x3929 0x3918 0x391c 0x3a61 0x39cb 0x392d 0x3934 0x393f 0x3a6d 0x39b1 0x3932 0x393e 0x3948 0x3a78 0x39d5 0x392c 0x3944 0x394c 0x3a81 0x39d9 0x393f 0x394c 0x394c 0x3a91 0x39e1 0x395c 0x3952 0x3949 0x3a91 0x39e1 0x395c 0x3952 0x3949 0x3a91 0x39e1 0x395c 0x3952 0x3949>; | |
| }; | |
| qcom,pc-temp-z5-lut { | |
| qcom,lut-col-legend = <0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x2ecf 0x31c4 0x3c21 0x3cb1 0x3be2 0x342d 0x39e8 0x3f79 0x439e 0x4479 0x37ce 0x4062 0x4593 0x47c9 0x485b 0x3a61 0x44ea 0x4ae7 0x4b17 0x4c36 0x3c7e 0x487b 0x4e38 0x4f33 0x5021 0x3e55 0x4b7f 0x50f3 0x5362 0x5424 0x3ff0 0x4dce 0x5440 0x5749 0x57f7 0x418d 0x503d 0x57f2 0x5b9e 0x5bad 0x4323 0x54b3 0x5a50 0x5e0a 0x5eac 0x450a 0x5ab8 0x5b99 0x5da3 0x607a 0x480a 0x5dfc 0x5ca1 0x5ccd 0x61dc 0x4c1b 0x5fe5 0x5d6a 0x5d08 0x63d2 0x4fd5 0x615d 0x5e8f 0x603d 0x66c8 0x5371 0x62a9 0x5f83 0x63c6 0x68e3 0x5659 0x6535 0x6079 0x65ec 0x698d 0x57ce 0x676b 0x61ff 0x67f6 0x69fb 0x58cf 0x6a05 0x66ec 0x6b02 0x6b4e 0x5a24 0x6db1 0x711a 0x6f96 0x6eab 0x5d01 0x7413 0x7615 0x72ac 0x7099 0x616a 0x7dfb 0x76df 0x741c 0x6fe6 0x6a28 0x8308 0x76ee 0x74bd 0x6de7 0x7cbc 0x8101 0x6fa2 0x6f1d 0x689f 0x899a 0x7c74 0x5c0f 0x5ad1 0x58db 0x8fd3 0x752a 0x5475 0x5064 0x4fd0 0x93f2 0x65b3 0x5a34 0x552e 0x5503 0x911b 0x5e40 0x627e 0x5d21 0x5d8c 0x88b1 0x65de 0x6a14 0x6390 0x6356 0x8039 0x71c7 0x72ca 0x69e1 0x6817 0x7904 0x79d3 0x799e 0x6f19 0x6b59 0x72c0 0x8077 0x7e90 0x734b 0x6e2e 0x70c9 0x85a0 0x8296 0x76a7 0x7067 0x7072 0x8a48 0x8607 0x797d 0x71e9 0x7081 0x8d9a 0x88eb 0x7c50 0x74b1 0x70a4 0x8de5 0x8aa9 0x7d2d 0x764b 0x70be 0x8d1a 0x8c62 0x7c75 0x777e 0x70eb 0x8c0e 0x8d7d 0x7b9e 0x7982 0x7134 0x8972 0x8aa9 0x7b52 0x7fae 0x71cc 0x85f3 0x839e 0x7b3d 0x8aa6 0x73e6 0x8404 0x7e3b 0x7b37 0x8da5 0x77bc 0x82ec 0x7a64 0x7aed 0x8589 0x7910 0x815a 0x76b4 0x7ab4 0x7e45 0x74f2 0x7d82 0x724e 0x7d2e 0x8066 0x7169 0x7893 0x6ea7 0x81c9 0x8529 0x7100 0x7348 0x6d36 0x8833 0x890b 0x424b 0x709a 0x6a29 0x8a4f 0x8a80 0x2b69 0x486e 0x6513 0x6e4c 0x94e6 0x2b4c 0x415f 0x57d6 0x7b85 0x7e12 0x2b1d 0x3cf1 0x5526 0x8f9d 0x995d 0x2b1b 0x2ceb 0x4e67 0x9c60 0x9351 0x2b2f 0x2d36 0x56b9 0x8bb5 0x66d7 0x2b09 0x307f 0x5545 0x732c 0x57d4 0x2ac7 0x2c9b 0x9a48 0x65bc 0x5151 0x2a8a 0x2c54 0x9fc3 0x5ef3 0x5064 0x2a46 0x2c80 0x9440 0x62c8 0x524e 0x2a46 0x2c80 0x9440 0x62c8 0x524e 0x2a46 0x2c80 0x9440 0x62c8 0x524e>; | |
| }; | |
| qcom,pc-temp-z6-lut { | |
| qcom,lut-col-legend = <0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x3d5f 0x3aff 0x39b5 0x3976 0x3966 0x3da2 0x3b0d 0x39dd 0x3990 0x397e 0x3da0 0x3b10 0x39d9 0x398d 0x397d 0x3d56 0x3b02 0x39d4 0x3988 0x397c 0x3d04 0x3ad9 0x39c9 0x3982 0x3979 0x3cc9 0x3ab7 0x39bb 0x397b 0x3973 0x3c94 0x3a9f 0x39b0 0x3975 0x396d 0x3c6b 0x3a8b 0x39a6 0x396f 0x3968 0x3c4b 0x3a7b 0x399f 0x396a 0x3964 0x3c2f 0x3a6f 0x399c 0x3967 0x3961 0x3c13 0x3a65 0x399a 0x3964 0x395f 0x3bf9 0x3a5c 0x3997 0x3961 0x395d 0x3beb 0x3a57 0x3993 0x395f 0x395c 0x3be4 0x3a57 0x3990 0x395d 0x395a 0x3bde 0x3a5a 0x3991 0x395c 0x3958 0x3bd4 0x3a5b 0x3992 0x395b 0x3956 0x3bc6 0x3a52 0x3990 0x3959 0x3954 0x3bbd 0x3a49 0x398d 0x3957 0x3951 0x3bb9 0x3a49 0x398c 0x3955 0x394f 0x3bb6 0x3a4e 0x3990 0x3956 0x394e 0x3bbb 0x3a58 0x3998 0x395a 0x394d 0x3bd0 0x3a8a 0x39a9 0x3963 0x3952 0x3bea 0x3ac0 0x39cb 0x397e 0x396e 0x3c0d 0x3ac2 0x39d8 0x398c 0x397d 0x3c30 0x3ab3 0x39d2 0x3987 0x3979 0x3c37 0x3aa8 0x39cb 0x3980 0x3972 0x3c36 0x3aa3 0x39c7 0x397d 0x396e 0x3c34 0x3a9f 0x39c4 0x397a 0x396b 0x3c30 0x3a9e 0x39c2 0x3978 0x3969 0x3c2a 0x3a9c 0x39c1 0x3976 0x3966 0x3c27 0x3a9c 0x39c0 0x3974 0x3963 0x3c26 0x3a9d 0x39c0 0x3972 0x3960 0x3c25 0x3a9e 0x39c0 0x3970 0x395c 0x3c25 0x3aa1 0x39c0 0x396d 0x3958 0x3c26 0x3aa4 0x39c0 0x396b 0x3955 0x3c28 0x3aa7 0x39c1 0x3968 0x3952 0x3c2a 0x3aa8 0x39c1 0x3969 0x3955 0x3c2d 0x3aa9 0x39c2 0x396b 0x395c 0x3c32 0x3aac 0x39c3 0x396c 0x395f 0x3c38 0x3ab2 0x39c5 0x396e 0x395d 0x3c3f 0x3ab7 0x39c7 0x396f 0x395b 0x3c46 0x3aba 0x39c7 0x396f 0x395c 0x3c4d 0x3abd 0x39c7 0x3970 0x395f 0x3c54 0x3ac0 0x39c8 0x3972 0x3965 0x3c41 0x3abf 0x39c5 0x3970 0x3962 0x3c3b 0x3ab6 0x39bd 0x3963 0x3951 0x3c40 0x3ab6 0x39ba 0x3960 0x3949 0x3c41 0x3ab8 0x39b9 0x395d 0x3945 0x3c47 0x3abc 0x39bc 0x3960 0x3946 0x3c4e 0x3ac7 0x39c8 0x3974 0x395d 0x3c62 0x3ad4 0x39d1 0x397e 0x3967 0x3c75 0x3ae0 0x39df 0x3986 0x396e 0x3c8d 0x3af0 0x39f3 0x3991 0x3976 0x3cae 0x3b0a 0x3a0e 0x39a1 0x3980 0x3cae 0x3b0a 0x3a0e 0x39a1 0x3980 0x3cae 0x3b0a 0x3a0e 0x39a1 0x3980>; | |
| }; | |
| qcom,pc-temp-y1-lut { | |
| qcom,lut-col-legend = <0xfffffff6 0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x1b33 0x18db 0x1777 0x15fe 0x1588 0x155e 0x1b21 0x18d9 0x1773 0x15fd 0x1586 0x155f 0x1b16 0x18d5 0x176f 0x15fc 0x1584 0x155f 0x1b11 0x18d2 0x176b 0x15fb 0x1582 0x155f 0x1b10 0x18d1 0x1768 0x15fa 0x1581 0x155e 0x1b10 0x18d5 0x1764 0x15f9 0x157f 0x155e 0x1b16 0x18de 0x1761 0x15f8 0x157e 0x155d 0x1b1e 0x18e6 0x175d 0x15f8 0x157d 0x155b 0x1b1b 0x18e6 0x175e 0x15f7 0x157c 0x155b 0x1b08 0x18de 0x1760 0x15f8 0x157b 0x155b 0x1afe 0x18d8 0x1761 0x15f8 0x157a 0x155a 0x1b07 0x18d5 0x175c 0x15f7 0x157a 0x155a 0x1b13 0x18d4 0x1755 0x15f6 0x157a 0x1559 0x1b17 0x18da 0x1755 0x15f6 0x157b 0x1559 0x1b1a 0x18ec 0x175a 0x15f9 0x157c 0x155a 0x1b1b 0x18f6 0x175d 0x15fc 0x157d 0x155b 0x1b1e 0x18f5 0x1761 0x15ff 0x157d 0x155c 0x1b22 0x18f3 0x1766 0x1602 0x157e 0x155d 0x1b1f 0x18f4 0x1765 0x1605 0x157f 0x155e 0x1b14 0x18f7 0x1764 0x1607 0x1582 0x155f 0x1b11 0x18fa 0x1763 0x160b 0x1584 0x1560 0x1b2d 0x18fd 0x1765 0x160f 0x1586 0x1561 0x1b49 0x1900 0x176a 0x1615 0x1589 0x1563 0x1b40 0x1905 0x1771 0x161a 0x158b 0x1566 0x1b1e 0x190e 0x177c 0x161f 0x158e 0x1568 0x1b10 0x1912 0x1782 0x1624 0x1592 0x156b 0x1b16 0x1913 0x1783 0x162a 0x1595 0x156e 0x1b1e 0x1912 0x1784 0x1631 0x1599 0x1570 0x1b27 0x1912 0x1785 0x1637 0x159d 0x1573 0x1b3c 0x1912 0x1787 0x163c 0x15a1 0x1575 0x1b42 0x1912 0x1789 0x1642 0x15a5 0x1579 0x1b3b 0x1916 0x178c 0x1649 0x15a9 0x157c 0x1b31 0x1919 0x1790 0x1650 0x15ae 0x1580 0x1b23 0x1916 0x1796 0x1658 0x15b2 0x1583 0x1b11 0x1910 0x17a0 0x165f 0x15b7 0x1585 0x1b0d 0x1910 0x17a7 0x1666 0x15bb 0x1588 0x1b14 0x191c 0x17ab 0x166d 0x15c1 0x158c 0x1b1b 0x1926 0x17ae 0x1674 0x15c7 0x1592 0x1b1b 0x1921 0x17af 0x167d 0x15cc 0x1596 0x1b1e 0x1916 0x17b0 0x1687 0x15d1 0x1599 0x1b20 0x1911 0x17b3 0x168f 0x15d7 0x159d 0x1b22 0x1910 0x17bd 0x1697 0x15dc 0x15a1 0x1b1d 0x1912 0x17c3 0x169b 0x15e3 0x15a5 0x1b0b 0x191d 0x17ca 0x169e 0x15ea 0x15aa 0x1b29 0x191c 0x17c6 0x16b0 0x15f6 0x15b3 0x1b14 0x1921 0x17cb 0x16b5 0x15ff 0x15b9 0x1b10 0x1921 0x17d3 0x16ba 0x1603 0x15bd 0x1b15 0x192a 0x17e1 0x16ca 0x1608 0x15bf 0x1b14 0x191e 0x17d9 0x16cb 0x160d 0x15c3 0x1b18 0x1924 0x17da 0x16d8 0x1616 0x15ca 0x1b35 0x1928 0x17d3 0x16e2 0x1622 0x15d1 0x1b4e 0x1940 0x17de 0x16f1 0x1634 0x15e0 0x1b73 0x192d 0x17eb 0x16ff 0x1648 0x15ed 0x1b98 0x1947 0x17f8 0x171a 0x165e 0x1601 0x1b98 0x1947 0x17f8 0x171a 0x165e 0x1601 0x1b98 0x1947 0x17f8 0x171a 0x165e 0x1601>; | |
| }; | |
| qcom,pc-temp-y2-lut { | |
| qcom,lut-col-legend = <0xfffffff6 0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x25ab 0x2a1c 0x2b1d 0x2bd0 0x2b59 0x2b01 0x25b5 0x29fb 0x2af1 0x2ba9 0x2b44 0x2b08 0x268b 0x29d6 0x2ac1 0x2b79 0x2b2d 0x2b0a 0x2762 0x29b1 0x2a92 0x2b48 0x2b17 0x2b0a 0x2806 0x2992 0x2a6c 0x2b1d 0x2b02 0x2b07 0x2844 0x2980 0x2a55 0x2aff 0x2af0 0x2b02 0x2829 0x2978 0x2a4a 0x2aeb 0x2ae1 0x2ae5 0x2801 0x2972 0x2a44 0x2ad8 0x2ad2 0x2ab9 0x2823 0x2968 0x2a40 0x2ac9 0x2abe 0x2aa8 0x28c8 0x295a 0x2a32 0x2abb 0x2aa1 0x2a9c 0x2923 0x2954 0x2a28 0x2aaf 0x2a8e 0x2a95 0x291a 0x2972 0x2a22 0x2aa3 0x2a81 0x2a91 0x2906 0x29a9 0x2a1c 0x2a94 0x2a75 0x2a8a 0x28be 0x29e1 0x2a2d 0x2a7e 0x2a75 0x2a7d 0x27f2 0x2a25 0x2a79 0x2a5e 0x2a7c 0x2a61 0x2783 0x2a41 0x2abc 0x2a52 0x2a7e 0x2a4f 0x26dd 0x2a35 0x2aec 0x2a7c 0x2a77 0x2a58 0x2615 0x2a27 0x2b0d 0x2abb 0x2a6f 0x2a6c 0x25e8 0x2a27 0x2b06 0x2aef 0x2a75 0x2a72 0x25d3 0x2a2b 0x2ae3 0x2b21 0x2a92 0x2a76 0x25cd 0x2a31 0x2ad5 0x2b37 0x2ab8 0x2a7d 0x25cc 0x2a38 0x2af5 0x2b46 0x2afc 0x2abc 0x25cc 0x2a44 0x2b22 0x2b55 0x2b3a 0x2b12 0x25ca 0x2a54 0x2b36 0x2b5b 0x2b42 0x2b2f 0x25c6 0x2a6d 0x2b45 0x2b61 0x2b37 0x2b3a 0x25c3 0x2aa3 0x2b4a 0x2b67 0x2b38 0x2b3c 0x25c1 0x2c4d 0x2b4d 0x2b76 0x2b54 0x2b40 0x25bf 0x2de4 0x2b53 0x2b8d 0x2b75 0x2b4b 0x25bd 0x2cfc 0x2b5b 0x2bab 0x2b8c 0x2b58 0x25bb 0x2a40 0x2b66 0x2bd1 0x2ba6 0x2b6e 0x25ba 0x2888 0x2b6e 0x2be4 0x2bb6 0x2b7b 0x25b9 0x27ab 0x2b6d 0x2bed 0x2bc8 0x2b84 0x25b8 0x2710 0x2b65 0x2bf4 0x2bd8 0x2b90 0x25b7 0x26a4 0x2b56 0x2bfb 0x2be1 0x2ba7 0x25b6 0x2654 0x2b34 0x2bfc 0x2bf2 0x2bc8 0x25b6 0x2622 0x2b0c 0x2bf2 0x2bf7 0x2bd2 0x25b5 0x25fd 0x2aa3 0x2bdb 0x2bec 0x2bb2 0x25b5 0x25e5 0x2a20 0x2bc7 0x2bdb 0x2b8a 0x25b5 0x25d8 0x29c7 0x2bb8 0x2bcb 0x2b7f 0x25b4 0x25ce 0x2977 0x2ba4 0x2bba 0x2b7b 0x25b4 0x25c7 0x28f0 0x2b87 0x2bb8 0x2b76 0x25b4 0x25c1 0x27d9 0x2b62 0x2bd0 0x2b68 0x25b3 0x25bd 0x277c 0x2b44 0x2bd4 0x2b61 0x25b3 0x25ba 0x27af 0x2b22 0x2baf 0x2b70 0x25b3 0x25b8 0x26ed 0x2ab1 0x2b95 0x2b41 0x25b3 0x25b6 0x2680 0x2a89 0x2b52 0x2b0f 0x25b3 0x25b5 0x2644 0x2a47 0x2b31 0x2ad8 0x25b2 0x25b5 0x260d 0x2a2a 0x2b2b 0x2acb 0x25b2 0x25b4 0x25e0 0x29f4 0x2b15 0x2aa6 0x25b2 0x25b4 0x25d0 0x299c 0x2ad8 0x2a9b 0x25b2 0x25b3 0x25c6 0x292c 0x2aa4 0x2a74 0x25b1 0x25b3 0x25bf 0x289d 0x2a31 0x2a18 0x25b0 0x25b2 0x25b9 0x2816 0x29d8 0x29c8 0x25b0 0x25b2 0x25b6 0x28d0 0x2958 0x2964 0x25b0 0x25b2 0x25b6 0x28d0 0x2958 0x2964 0x25b0 0x25b2 0x25b6 0x28d0 0x2958 0x2964>; | |
| }; | |
| qcom,pc-temp-y3-lut { | |
| qcom,lut-col-legend = <0xfffffff6 0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x34b3 0x3427 0x33f0 0x33dc 0x33db 0x33d8 0x34a9 0x3424 0x33f1 0x33de 0x33db 0x33d8 0x34a4 0x3422 0x33f2 0x33e0 0x33db 0x33d9 0x34a4 0x3423 0x33f4 0x33e2 0x33dc 0x33da 0x34a8 0x3425 0x33f6 0x33e3 0x33dc 0x33da 0x34ae 0x3428 0x33f7 0x33e3 0x33dc 0x33db 0x34c9 0x342e 0x33f7 0x33e3 0x33dc 0x33db 0x34ea 0x3433 0x33f8 0x33e3 0x33dc 0x33db 0x34e7 0x3435 0x33fa 0x33e3 0x33dd 0x33db 0x34c1 0x3435 0x33fe 0x33e4 0x33de 0x33db 0x34a4 0x3436 0x3403 0x33e5 0x33de 0x33dc 0x3499 0x343b 0x3407 0x33e5 0x33de 0x33dc 0x3490 0x3441 0x340a 0x33e5 0x33de 0x33dc 0x3486 0x3440 0x340a 0x33e6 0x33de 0x33dc 0x347a 0x3439 0x3409 0x33e8 0x33df 0x33dd 0x3474 0x3433 0x3408 0x33ea 0x33df 0x33dd 0x3474 0x342f 0x3406 0x33eb 0x33e0 0x33de 0x3474 0x342a 0x3404 0x33ec 0x33e2 0x33de 0x3466 0x3425 0x3401 0x33ec 0x33e3 0x33df 0x3441 0x341f 0x33fc 0x33eb 0x33e3 0x33e1 0x342c 0x341a 0x33f8 0x33ea 0x33e4 0x33e1 0x3427 0x3418 0x33f5 0x33e6 0x33e0 0x33de 0x3425 0x3415 0x33f3 0x33e3 0x33dc 0x33da 0x342a 0x340b 0x33f2 0x33e2 0x33db 0x33d9 0x343e 0x33f5 0x33f1 0x33e1 0x33db 0x33d9 0x3455 0x33e9 0x33f1 0x33e1 0x33db 0x33d9 0x3470 0x33d9 0x33f1 0x33e0 0x33db 0x33d9 0x3491 0x33cb 0x33f1 0x33e0 0x33db 0x33d9 0x34b6 0x33cb 0x33f0 0x33e0 0x33db 0x33d9 0x34e1 0x33cb 0x33f0 0x33e0 0x33db 0x33d9 0x3512 0x33cc 0x33ef 0x33e0 0x33da 0x33d8 0x354c 0x33cd 0x33eb 0x33e0 0x33da 0x33d8 0x358c 0x33ce 0x33e8 0x33df 0x33da 0x33d8 0x35d1 0x33d0 0x33e9 0x33df 0x33da 0x33d8 0x361d 0x33d4 0x33ed 0x33df 0x33d9 0x33d8 0x3673 0x33da 0x33ef 0x33df 0x33d9 0x33d8 0x36d8 0x33e5 0x33ee 0x33df 0x33da 0x33d8 0x3749 0x33f3 0x33ec 0x33e0 0x33da 0x33d9 0x37c4 0x3405 0x33ec 0x33df 0x33da 0x33d9 0x384c 0x341c 0x33ed 0x33df 0x33da 0x33d9 0x38e4 0x343c 0x33eb 0x33df 0x33da 0x33d9 0x3992 0x346f 0x33d7 0x33e0 0x33db 0x33d9 0x3a4d 0x34b5 0x33ce 0x33e0 0x33db 0x33d9 0x3b18 0x351e 0x33cd 0x33e0 0x33da 0x33d9 0x3bfa 0x35a1 0x33cf 0x33df 0x33db 0x33da 0x3cbb 0x363d 0x33d2 0x33e4 0x33dc 0x33db 0x3d54 0x36ac 0x33d6 0x33e4 0x33dd 0x33dd 0x3e0b 0x373b 0x33e0 0x33e8 0x33df 0x33dd 0x3ee2 0x37e1 0x33fd 0x33ea 0x33e0 0x33dd 0x3fd4 0x3899 0x341f 0x33ec 0x33e0 0x33dc 0x4110 0x3986 0x344d 0x33ee 0x33e1 0x33dd 0x44e2 0x3ab1 0x34a9 0x33f3 0x33e3 0x33de 0x4cb4 0x3c29 0x3543 0x33fd 0x33e6 0x33e3 0x59a2 0x3e85 0x364b 0x3417 0x33ed 0x33e7 0x59a2 0x3e85 0x364b 0x3417 0x33ed 0x33e7 0x59a2 0x3e85 0x364b 0x3417 0x33ed 0x33e7>; | |
| }; | |
| qcom,pc-temp-y4-lut { | |
| qcom,lut-col-legend = <0xfffffff6 0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x424d 0x40ef 0x408e 0x404a 0x4044 0x4048 0x4267 0x40f8 0x408d 0x4049 0x4044 0x4048 0x4286 0x4101 0x408d 0x4049 0x4044 0x4048 0x42a4 0x410c 0x408e 0x4049 0x4044 0x4048 0x42ba 0x4117 0x4090 0x4049 0x4044 0x4048 0x42c1 0x4122 0x4093 0x4049 0x4044 0x4048 0x42b5 0x412f 0x4097 0x404b 0x4044 0x4048 0x42a3 0x413d 0x409b 0x404e 0x4045 0x4048 0x42ca 0x4147 0x40a1 0x4051 0x4045 0x4048 0x437c 0x4150 0x40a8 0x4054 0x4046 0x4049 0x43f4 0x415f 0x40b3 0x4059 0x4047 0x4049 0x4412 0x41b8 0x40c8 0x4060 0x404a 0x404a 0x4423 0x4222 0x40e4 0x406a 0x404d 0x404c 0x43e8 0x4237 0x40fe 0x4072 0x4051 0x404e 0x4303 0x423e 0x4117 0x4078 0x4056 0x4051 0x4284 0x423f 0x4137 0x4083 0x405c 0x4055 0x4276 0x4226 0x4176 0x409b 0x4066 0x405b 0x426d 0x41f7 0x41b0 0x40bb 0x4076 0x4066 0x4254 0x41bf 0x41a0 0x40e1 0x4092 0x407a 0x4225 0x4172 0x4149 0x4110 0x40c0 0x409d 0x41f6 0x4134 0x40fb 0x4118 0x40d1 0x40ae 0x41c5 0x4104 0x40bc 0x40ba 0x4097 0x4089 0x419d 0x40e2 0x408a 0x405b 0x4054 0x4056 0x418f 0x40df 0x407b 0x404c 0x4047 0x404a 0x4188 0x40ef 0x4072 0x4046 0x4043 0x4047 0x4182 0x40f8 0x406e 0x4045 0x4041 0x4046 0x417d 0x4105 0x406d 0x4046 0x4041 0x4045 0x4179 0x4113 0x406d 0x4047 0x4040 0x4045 0x4179 0x4116 0x406c 0x4049 0x4041 0x4045 0x4179 0x4117 0x406d 0x404d 0x4044 0x4046 0x417a 0x411b 0x406d 0x4052 0x4048 0x4047 0x417c 0x4125 0x406c 0x405a 0x4050 0x404d 0x417f 0x412f 0x406c 0x405f 0x4057 0x4056 0x4182 0x4132 0x406e 0x405e 0x405a 0x405c 0x4187 0x4135 0x4074 0x405a 0x405a 0x4063 0x418a 0x4135 0x4079 0x4053 0x4057 0x4062 0x418e 0x4131 0x407c 0x4047 0x404a 0x4053 0x4190 0x412d 0x407e 0x4040 0x403f 0x4045 0x418f 0x412d 0x407f 0x4041 0x4042 0x4047 0x418d 0x412b 0x4080 0x4044 0x4048 0x4051 0x418b 0x4129 0x4085 0x4047 0x404b 0x4057 0x4182 0x411e 0x40ae 0x404c 0x404a 0x4056 0x4180 0x410e 0x40c3 0x4050 0x4048 0x4054 0x4188 0x40fa 0x40c8 0x4051 0x4040 0x4044 0x41a1 0x40f5 0x40d1 0x405a 0x4040 0x403c 0x41b3 0x4107 0x40e9 0x406d 0x4053 0x4056 0x41d8 0x411d 0x4101 0x407b 0x4068 0x4070 0x4209 0x413b 0x4120 0x4098 0x4088 0x4089 0x4230 0x4172 0x4123 0x40b5 0x4091 0x4098 0x4235 0x418c 0x412b 0x40ab 0x4077 0x4068 0x422d 0x417f 0x4129 0x40aa 0x406f 0x405f 0x42b6 0x419a 0x4137 0x40c6 0x407c 0x4065 0x449d 0x41ea 0x416f 0x4106 0x40a1 0x407e 0x4ada 0x42e4 0x41f8 0x41db 0x411f 0x40c5 0x4ada 0x42e4 0x41f8 0x41db 0x411f 0x40c5 0x4ada 0x42e4 0x41f8 0x41db 0x411f 0x40c5>; | |
| }; | |
| qcom,pc-temp-y5-lut { | |
| qcom,lut-col-legend = <0xfffffff6 0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x2ced 0x3ea2 0x39af 0x35e1 0x4bcf 0x3ccd 0x2d53 0x3dce 0x3b34 0x3d43 0x4bd5 0x422a 0x2e63 0x3c89 0x3be5 0x4279 0x4bd8 0x468a 0x2ffd 0x3b30 0x3bf8 0x45bf 0x4bd8 0x49ce 0x3203 0x3a21 0x3ba2 0x4753 0x4bd5 0x4bd8 0x345b 0x39ba 0x3b18 0x476c 0x4bcd 0x4c86 0x38d7 0x39d7 0x39c9 0x43fd 0x49f5 0x4b65 0x3d5e 0x3a00 0x3853 0x3f6c 0x475d 0x4979 0x3c41 0x3960 0x3887 0x3e47 0x4713 0x4881 0x34dd 0x369f 0x3a67 0x3e01 0x4797 0x47d1 0x30e1 0x34f4 0x3b73 0x3d80 0x47da 0x4716 0x35eb 0x34b5 0x3a2c 0x3aca 0x45a8 0x453e 0x3c71 0x3494 0x3852 0x37e2 0x4219 0x42cb 0x3c22 0x35b0 0x37ae 0x382d 0x3fbe 0x41b5 0x37b2 0x3a03 0x3765 0x3a15 0x3dc7 0x4121 0x34fa 0x3d1b 0x3777 0x3ade 0x3cc4 0x4057 0x3474 0x3e5d 0x38dc 0x39c2 0x3c5a 0x3e52 0x33da 0x3f47 0x3b38 0x389a 0x3c1b 0x3c69 0x3288 0x400e 0x3df7 0x39a3 0x3c56 0x3c59 0x3087 0x40cc 0x41b8 0x3db1 0x3da1 0x3d22 0x2eb0 0x415c 0x4434 0x4217 0x3f8b 0x3e6c 0x2cd4 0x41ef 0x459d 0x4774 0x44c0 0x4225 0x2b6d 0x4244 0x46a7 0x4be6 0x4aa8 0x46f3 0x2b19 0x3f75 0x4742 0x4d6d 0x4d7e 0x4a38 0x2b01 0x373d 0x4795 0x4de9 0x4f6b 0x4cf0 0x2b10 0x324c 0x479b 0x4dca 0x5114 0x4e7d 0x2b30 0x2e16 0x4855 0x4d82 0x53d1 0x4f49 0x2b4c 0x2ac4 0x4947 0x4d49 0x55ef 0x4fc2 0x2b7c 0x2a7f 0x498c 0x4d04 0x549a 0x4f3e 0x2be0 0x2a6e 0x49b4 0x4c77 0x501d 0x4c6b 0x2c05 0x2a74 0x4950 0x4bd1 0x4c94 0x497d 0x2c51 0x2afd 0x42c8 0x4af0 0x49e8 0x4698 0x2c9d 0x2b9d 0x3c76 0x4a69 0x4843 0x4474 0x2cc0 0x2bfd 0x3ea6 0x4b83 0x48e5 0x4570 0x2d00 0x2c56 0x44a3 0x4e49 0x4b83 0x4a5a 0x2d17 0x2c7b 0x4675 0x507e 0x4f32 0x4fdc 0x2d5d 0x2d21 0x4376 0x53a4 0x59e9 0x562c 0x2d9e 0x2db1 0x3fac 0x551d 0x6278 0x5ab9 0x2d78 0x2d78 0x3df5 0x51b2 0x5f7a 0x58cb 0x2d19 0x2cf7 0x3caa 0x4ca2 0x5799 0x5237 0x2cf2 0x2cc7 0x39ce 0x4b4a 0x5437 0x4f3b 0x2cc1 0x2c94 0x3199 0x4b11 0x5402 0x4f54 0x2c97 0x2cec 0x2e4d 0x491d 0x54d7 0x5006 0x2c68 0x2dde 0x2e03 0x4603 0x57ab 0x5897 0x2c64 0x2e2a 0x2d77 0x412f 0x54fa 0x59bb 0x2c73 0x2d3d 0x2c2e 0x4493 0x47e8 0x4767 0x2cc8 0x2d38 0x2bce 0x412e 0x43a1 0x444b 0x2dd1 0x2ec1 0x2c33 0x4289 0x4053 0x3c31 0x2f6e 0x2e7b 0x2d9d 0x414d 0x3e09 0x3858 0x2ecb 0x2e77 0x2ebe 0x4453 0x4319 0x3c0c 0x2d81 0x2ee7 0x2ecf 0x4446 0x4725 0x3f7d 0x2b09 0x2ea2 0x2ebc 0x4326 0x45ac 0x3e65 0x2819 0x2e45 0x2e93 0x418c 0x43bf 0x4557 0x259a 0x2c30 0x2f99 0x4214 0x43f8 0x45f7 0x259a 0x2c30 0x2f99 0x4214 0x43f8 0x45f7 0x259a 0x2c30 0x2f99 0x4214 0x43f8 0x45f7>; | |
| }; | |
| qcom,pc-temp-y6-lut { | |
| qcom,lut-col-legend = <0xfffffff6 0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x17da 0x151d 0x143a 0x13c8 0x13b6 0x13b2 0x17d1 0x1519 0x1439 0x13c8 0x13b6 0x13b2 0x17cc 0x1518 0x1438 0x13c9 0x13b6 0x13b2 0x17c9 0x1518 0x1438 0x13ca 0x13b7 0x13b3 0x17c8 0x1519 0x1438 0x13cb 0x13b7 0x13b4 0x17c8 0x151b 0x1438 0x13cb 0x13b7 0x13b4 0x17ca 0x151f 0x1438 0x13cc 0x13b7 0x13b4 0x17ce 0x1525 0x1439 0x13cc 0x13b7 0x13b4 0x17d6 0x1528 0x143a 0x13cd 0x13b7 0x13b4 0x17e5 0x152a 0x143e 0x13cf 0x13b8 0x13b4 0x17f1 0x152e 0x1443 0x13d1 0x13b9 0x13b5 0x17f7 0x154a 0x144b 0x13d3 0x13ba 0x13b5 0x17fb 0x156b 0x1454 0x13d6 0x13bb 0x13b6 0x17eb 0x1570 0x145b 0x13d9 0x13bc 0x13b7 0x17ab 0x1572 0x1462 0x13dd 0x13be 0x13b8 0x178b 0x1572 0x146a 0x13e1 0x13c0 0x13ba 0x178e 0x156c 0x147b 0x13e9 0x13c4 0x13bc 0x1792 0x1560 0x148b 0x13f3 0x13ca 0x13bf 0x1790 0x1551 0x1485 0x13fe 0x13d3 0x13c6 0x178b 0x153b 0x1469 0x140b 0x13e0 0x13d1 0x1789 0x152d 0x1451 0x140d 0x13e5 0x13d6 0x178f 0x1526 0x143e 0x13f0 0x13d2 0x13c9 0x179a 0x1521 0x1431 0x13d3 0x13bc 0x13b8 0x17ad 0x1522 0x142f 0x13cf 0x13b8 0x13b4 0x17cf 0x1524 0x142e 0x13cd 0x13b7 0x13b3 0x17f4 0x1527 0x142e 0x13cd 0x13b6 0x13b2 0x1819 0x152d 0x1430 0x13ce 0x13b7 0x13b2 0x1842 0x1537 0x1433 0x13cf 0x13b7 0x13b2 0x186e 0x1544 0x1437 0x13d1 0x13b8 0x13b3 0x189e 0x1558 0x143a 0x13d3 0x13b9 0x13b3 0x18d2 0x156e 0x143d 0x13d6 0x13ba 0x13b4 0x190b 0x1587 0x143f 0x13d9 0x13bc 0x13b6 0x1947 0x15a3 0x1441 0x13db 0x13bf 0x13b8 0x1987 0x15c1 0x1448 0x13dc 0x13c0 0x13ba 0x19ca 0x15e3 0x1455 0x13dc 0x13c0 0x13bd 0x1a15 0x1608 0x1460 0x13dc 0x13c0 0x13bd 0x1a67 0x1631 0x1469 0x13db 0x13bd 0x13b9 0x1ac1 0x165f 0x1472 0x13db 0x13bb 0x13b6 0x1b24 0x1692 0x147c 0x13dc 0x13bc 0x13b7 0x1b92 0x16cb 0x1489 0x13df 0x13bf 0x13ba 0x1c0a 0x170b 0x1499 0x13e3 0x13c1 0x13bc 0x1c91 0x1753 0x14af 0x13e7 0x13c2 0x13bc 0x1d25 0x17ac 0x14ca 0x13eb 0x13c2 0x13bc 0x1dc9 0x181a 0x14eb 0x13f0 0x13c0 0x13b9 0x1e79 0x1897 0x151c 0x13f8 0x13c3 0x13b8 0x1f10 0x1926 0x1559 0x1407 0x13ca 0x13c1 0x1f93 0x198e 0x1589 0x140f 0x13d2 0x13cb 0x2029 0x1a0a 0x15c6 0x141e 0x13de 0x13d3 0x20d4 0x1a9d 0x160e 0x142e 0x13e2 0x13d8 0x2195 0x1b3c 0x165d 0x1434 0x13dc 0x13ca 0x227f 0x1bf7 0x16bb 0x1440 0x13dd 0x13c9 0x25b7 0x1cf0 0x1743 0x145e 0x13e5 0x13ce 0x2c5c 0x1e2d 0x1805 0x148e 0x13f6 0x13db 0x37b4 0x2060 0x191e 0x14fe 0x1425 0x13f5 0x37b4 0x2060 0x191e 0x14fe 0x1425 0x13f5 0x37b4 0x2060 0x191e 0x14fe 0x1425 0x13f5>; | |
| }; | |
| }; | |
| qcom,share_3900mah { | |
| qcom,max-voltage-uv = <0x432380>; | |
| qcom,fg-cc-cv-threshold-mv = <0x1126>; | |
| qcom,fastchg-current-ma = <0x7d0>; | |
| qcom,batt-id-kohm = <0x29a>; | |
| qcom,battery-beta = <0xd6b>; | |
| qcom,battery-therm-kohm = <0x0a>; | |
| qcom,battery-type = "unknown-battery"; | |
| qcom,qg-batt-profile-ver = <0x64>; | |
| qcom,jeita-fcc-ranges = <0x00 0x32 0x5f370 0x33 0x96 0x11da50 0x97 0x1c2 0x1e8480 0x1c3 0x258 0x1dc130>; | |
| qcom,jeita-fv-ranges = <0x00 0x32 0x432380 0x33 0x96 0x432380 0x97 0x1c2 0x432380 0x1c3 0x258 0x3e8fa0>; | |
| qcom,step-chg-ranges = <0x36ee80 0x401640 0x34a490 0x401a28 0x419ce0 0x2a1d40 0x41a0c8 0x426030 0x1f95f0>; | |
| qcom,jeita-soft-thresholds = <0x2fdd 0xfe5>; | |
| qcom,jeita-hard-thresholds = <0x35c4 0xa5b>; | |
| qcom,fcc1-temp-lut { | |
| qcom,lut-col-legend = <0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-data = <0xd31 0xd64 0xd99 0xda8 0xdac>; | |
| }; | |
| qcom,fcc2-temp-lut { | |
| qcom,lut-col-legend = <0xfffffff6 0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-data = <0xd98 0xd9a 0xd94 0xda4 0xd96 0xd8a>; | |
| }; | |
| qcom,pc-temp-v1-lut { | |
| qcom,lut-col-legend = <0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0xa8cc 0xa933 0xa96a 0xa974 0xa977 0xa7d3 0xa83f 0xa885 0xa88d 0xa890 0xa6e3 0xa750 0xa796 0xa7a4 0xa7aa 0xa5f8 0xa665 0xa6a6 0xa6bb 0xa6c5 0xa516 0xa57f 0xa5be 0xa5d6 0xa5e1 0xa43b 0xa49f 0xa4da 0xa4f1 0xa4fe 0xa368 0xa3c4 0xa3f8 0xa40f 0xa41d 0xa298 0xa2ed 0xa31a 0xa32f 0xa33f 0xa1cb 0xa219 0xa240 0xa254 0xa263 0xa104 0xa148 0xa16a 0xa17d 0xa18b 0xa04f 0xa083 0xa099 0xa0ac 0xa0b7 0x9fa2 0x9fcf 0x9fd4 0x9fe0 0x9fe8 0x9ee4 0x9f1c 0x9f19 0x9f19 0x9f1e 0x9e01 0x9e4e 0x9e5d 0x9e5a 0x9e5d 0x9d26 0x9d6e 0x9d94 0x9d9f 0x9da3 0x9c7d 0x9cb3 0x9cd2 0x9cea 0x9cf0 0x9bee 0x9c26 0x9c30 0x9c42 0x9c47 0x9b6b 0x9ba6 0x9ba3 0x9ba5 0x9ba6 0x9af8 0x9b20 0x9b11 0x9b0a 0x9b09 0x9a88 0x9a9b 0x9a7c 0x9a70 0x9a72 0x9a02 0x99fb 0x99dc 0x99d0 0x99d8 0x9967 0x9902 0x9918 0x9913 0x991e 0x98c8 0x9810 0x9831 0x9830 0x9837 0x9816 0x9799 0x9784 0x9778 0x9777 0x976c 0x9750 0x9712 0x96fa 0x96f6 0x9704 0x9709 0x96b5 0x9692 0x968b 0x96bd 0x96bb 0x965b 0x9630 0x9627 0x9685 0x9671 0x9608 0x95d7 0x95cb 0x9657 0x962c 0x95be 0x9586 0x9577 0x9630 0x95ed 0x9579 0x953c 0x952b 0x9607 0x95b3 0x953c 0x94fa 0x94e6 0x95dc 0x957d 0x9505 0x94be 0x94a7 0x95b2 0x954b 0x94d3 0x948a 0x946f 0x958c 0x951f 0x94a5 0x9457 0x9436 0x9569 0x94f9 0x947e 0x942a 0x9401 0x9543 0x94d2 0x9456 0x93fc 0x93ca 0x951e 0x94ad 0x942a 0x93c7 0x9387 0x94f1 0x9484 0x93fa 0x938b 0x933b 0x94a7 0x9442 0x93b8 0x9342 0x92ea 0x943a 0x93d8 0x9356 0x92e5 0x9294 0x93c1 0x935e 0x92e2 0x9279 0x9232 0x9339 0x92db 0x9262 0x91fc 0x91b5 0x92a5 0x924b 0x91d4 0x916f 0x9124 0x91fc 0x91aa 0x913a 0x90d8 0x9087 0x9197 0x912a 0x90c5 0x9064 0x9016 0x9147 0x90e5 0x9080 0x9021 0x8fd3 0x9125 0x90c8 0x906a 0x9006 0x8fbe 0x9108 0x90af 0x9055 0x8fec 0x8fa2 0x90dc 0x908f 0x9027 0x8fb4 0x8f6a 0x903f 0x8ff3 0x8f4b 0x8ed2 0x8e88 0x8ecb 0x8e81 0x8dc2 0x8d54 0x8d0c 0x8ce7 0x8c9f 0x8bbb 0x8b67 0x8b24 0x8a7a 0x8a30 0x891a 0x88ea 0x88b2 0x872c 0x86db 0x857e 0x8588 0x8566 0x81fb 0x8172 0x7fd5 0x8053 0x805e 0x7530 0x7530 0x7530 0x7530 0x7530>; | |
| }; | |
| qcom,pc-temp-v2-lut { | |
| qcom,lut-col-legend = <0xfffffff6 0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0xa9a1 0xa997 0xa979 0xa960 0xa933 0xa91f 0xa83e 0xa865 0xa859 0xa856 0xa82c 0xa819 0xa6fc 0xa745 0xa74a 0xa756 0xa72f 0xa71d 0xa5de 0xa63b 0xa64b 0xa662 0xa63d 0xa62d 0xa4e0 0xa544 0xa55d 0xa579 0xa556 0xa548 0xa3f0 0xa458 0xa475 0xa495 0xa473 0xa466 0xa308 0xa374 0xa390 0xa3b0 0xa390 0xa384 0xa22c 0xa299 0xa2b1 0xa2d0 0xa2b1 0xa2a5 0xa157 0xa1bd 0xa1d7 0xa1f4 0xa1d6 0xa1cb 0xa08c 0xa0e2 0xa101 0xa11b 0xa0ff 0xa0f4 0x9fc0 0xa013 0xa034 0xa04a 0xa02d 0xa022 0x9ef6 0x9f5c 0x9f7a 0x9f88 0x9f62 0x9f55 0x9e22 0x9ea8 0x9ec2 0x9ec8 0x9e9c 0x9e8e 0x9d1c 0x9dd7 0x9df0 0x9dfd 0x9ddb 0x9dcf 0x9bdf 0x9cef 0x9d07 0x9d29 0x9d1e 0x9d16 0x9ad4 0x9c12 0x9c3c 0x9c6b 0x9c6a 0x9c64 0x9a13 0x9b4f 0x9ba4 0x9bce 0x9bc5 0x9bbc 0x9968 0x9a92 0x9b14 0x9b38 0x9b25 0x9b1a 0x98b3 0x99ca 0x9a57 0x9a95 0x9a84 0x9a7b 0x97fc 0x98fa 0x9973 0x99e7 0x99e4 0x99df 0x9756 0x983d 0x98a0 0x9928 0x9931 0x9931 0x96bf 0x9796 0x97e6 0x983f 0x984c 0x9852 0x963c 0x96ff 0x9741 0x9768 0x976e 0x9773 0x95d6 0x9677 0x96b9 0x96d5 0x96d5 0x96d6 0x9582 0x95fc 0x9644 0x9660 0x965e 0x965e 0x9539 0x958f 0x95da 0x95f6 0x95f4 0x95f3 0x94fa 0x952d 0x9579 0x9596 0x9593 0x9590 0x94c0 0x94da 0x9521 0x953e 0x953a 0x9536 0x948b 0x9497 0x94d0 0x94ee 0x94e8 0x94e2 0x945c 0x945f 0x9485 0x94a3 0x949c 0x9495 0x942e 0x942f 0x9442 0x9460 0x9458 0x944f 0x9401 0x9407 0x9403 0x9421 0x941b 0x9411 0x93d3 0x93e0 0x93ce 0x93e6 0x93e0 0x93d6 0x93a3 0x93b7 0x93a7 0x93ab 0x939e 0x9395 0x9372 0x938e 0x9388 0x9372 0x9358 0x934b 0x933c 0x935f 0x9360 0x9335 0x930b 0x92f5 0x9301 0x932d 0x932d 0x92f4 0x92b2 0x928d 0x92c0 0x92f2 0x92f1 0x92ae 0x9259 0x9223 0x9273 0x92aa 0x92ac 0x9263 0x920b 0x91cf 0x921c 0x9253 0x925a 0x9213 0x91c1 0x9188 0x91be 0x91f0 0x91f9 0x91b5 0x916a 0x9136 0x9156 0x917b 0x917e 0x9143 0x90fd 0x90cd 0x90ef 0x90f7 0x90f2 0x90ba 0x907c 0x9051 0x908d 0x9064 0x9052 0x9024 0x8fe7 0x8fbc 0x902d 0x8ffc 0x8fe5 0x8fd2 0x8f99 0x8f68 0x8fc8 0x8fae 0x8fa1 0x8fa7 0x8f6e 0x8f41 0x8f8a 0x8f84 0x8f7c 0x8f85 0x8f52 0x8f2b 0x8f3e 0x8f50 0x8f4c 0x8f54 0x8f29 0x8f04 0x8ec9 0x8ef2 0x8eef 0x8edf 0x8ebe 0x8eb0 0x8de9 0x8e1c 0x8e10 0x8db0 0x8daf 0x8db6 0x8c79 0x8c97 0x8c75 0x8bd4 0x8bf9 0x8c1b 0x8a6c 0x8a7c 0x8a49 0x8979 0x89c7 0x8a0c 0x8795 0x87b9 0x8778 0x8669 0x86f6 0x8774 0x8388 0x83df 0x838d 0x8232 0x8331 0x83ff 0x7c71 0x7dbf 0x7df4 0x7c7b 0x7d01 0x7f05 0x6e00 0x70e0 0x7156 0x6b76 0x6faa 0x73b1>; | |
| }; | |
| qcom,pc-temp-z1-lut { | |
| qcom,lut-col-legend = <0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x3587 0x32b7 0x3057 0x2f6a 0x2f2f 0x354f 0x32a7 0x3052 0x2f71 0x2f3c 0x3535 0x3299 0x304b 0x2f6f 0x2f3d 0x3526 0x328e 0x3045 0x2f6e 0x2f3d 0x351a 0x327f 0x303d 0x2f6c 0x2f3d 0x3511 0x3274 0x3036 0x2f69 0x2f3d 0x3509 0x3269 0x3033 0x2f68 0x2f3c 0x3501 0x3262 0x3031 0x2f67 0x2f3c 0x34f8 0x3260 0x3031 0x2f67 0x2f3b 0x34ef 0x325f 0x3033 0x2f67 0x2f3b 0x34e4 0x3260 0x3036 0x2f68 0x2f3b 0x34d7 0x3263 0x3036 0x2f68 0x2f3b 0x34c8 0x3265 0x3036 0x2f69 0x2f3d 0x34b0 0x3260 0x3036 0x2f6b 0x2f3f 0x349d 0x3257 0x3037 0x2f6d 0x2f41 0x349d 0x3253 0x303b 0x2f70 0x2f42 0x34a1 0x325b 0x3040 0x2f73 0x2f45 0x34a6 0x3268 0x3048 0x2f77 0x2f47 0x34b1 0x3270 0x3051 0x2f7b 0x2f4a 0x34be 0x3277 0x305a 0x2f80 0x2f4d 0x34ca 0x327f 0x3063 0x2f85 0x2f51 0x34d5 0x3289 0x306c 0x2f8b 0x2f55 0x34e2 0x3294 0x3074 0x2f91 0x2f5a 0x34f3 0x329d 0x307c 0x2f98 0x2f5f 0x3504 0x32a5 0x3086 0x2f9d 0x2f63 0x350a 0x32ab 0x308f 0x2fa3 0x2f67 0x350c 0x32b2 0x3098 0x2fa8 0x2f6b 0x350e 0x32b9 0x30a0 0x2fae 0x2f6f 0x351a 0x32c0 0x30a8 0x2fb4 0x2f73 0x352d 0x32cc 0x30b0 0x2fba 0x2f77 0x3539 0x32d2 0x30b8 0x2fc0 0x2f7c 0x353f 0x32d2 0x30bf 0x2fc6 0x2f80 0x3540 0x32d2 0x30c6 0x2fcd 0x2f85 0x353b 0x32d7 0x30ce 0x2fd4 0x2f8b 0x3532 0x32e9 0x30d9 0x2fdd 0x2f91 0x3533 0x32f7 0x30e5 0x2fe6 0x2f97 0x353d 0x3300 0x30f1 0x2fef 0x2f9e 0x3548 0x3309 0x30fd 0x2ff8 0x2fa4 0x354f 0x330c 0x3109 0x3002 0x2fab 0x3556 0x330e 0x3115 0x300d 0x2fb2 0x355f 0x330f 0x3121 0x3017 0x2fb9 0x356e 0x331d 0x312c 0x3022 0x2fc0 0x357e 0x332a 0x3136 0x302c 0x2fc8 0x3596 0x3333 0x313f 0x3038 0x2fcf 0x3595 0x3336 0x314d 0x3044 0x2fd8 0x3595 0x3337 0x315e 0x304f 0x2fe0 0x357d 0x3336 0x3160 0x3056 0x2fe6 0x3590 0x334b 0x3162 0x305e 0x2fed 0x3592 0x333e 0x3173 0x306b 0x2ff8 0x3595 0x3354 0x3185 0x3078 0x3003 0x3595 0x3368 0x3186 0x3086 0x300f 0x35ac 0x336e 0x3193 0x3094 0x301c 0x35ab 0x337f 0x31a7 0x30a8 0x302c 0x35ba 0x3391 0x31bf 0x30bf 0x3043 0x35ba 0x3391 0x31bf 0x30bf 0x3043 0x35ba 0x3391 0x31bf 0x30bf 0x3043>; | |
| }; | |
| qcom,pc-temp-z2-lut { | |
| qcom,lut-col-legend = <0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x26ff 0x286f 0x298f 0x28f1 0x28b2 0x2724 0x2865 0x29ad 0x2859 0x2827 0x2743 0x285d 0x2920 0x284f 0x282a 0x2763 0x285b 0x289d 0x2848 0x2829 0x2774 0x2859 0x2876 0x283b 0x2817 0x276e 0x2855 0x2858 0x282d 0x27fa 0x2761 0x283f 0x2854 0x2827 0x27f3 0x2755 0x2829 0x2858 0x2825 0x27fd 0x274a 0x2826 0x285a 0x2824 0x280b 0x2742 0x2828 0x2856 0x2824 0x281a 0x273c 0x282d 0x2851 0x2829 0x2828 0x2737 0x283a 0x2853 0x2830 0x282d 0x2736 0x2846 0x2854 0x2844 0x282c 0x273d 0x2845 0x284e 0x2851 0x282d 0x2746 0x2840 0x2840 0x284f 0x2837 0x2748 0x283e 0x2833 0x284a 0x2845 0x2748 0x2848 0x2839 0x284c 0x2851 0x274a 0x2859 0x2850 0x2856 0x285f 0x2756 0x2871 0x2863 0x285e 0x2865 0x276a 0x2892 0x286d 0x2863 0x286a 0x277f 0x28a0 0x2876 0x2867 0x2872 0x279a 0x289c 0x2885 0x285e 0x2864 0x27ad 0x2894 0x289b 0x2831 0x281e 0x27b9 0x288d 0x28a0 0x2803 0x27e4 0x27c2 0x2884 0x2872 0x27d5 0x27be 0x27c7 0x287c 0x2842 0x27b1 0x27a0 0x27ce 0x2870 0x2840 0x27b0 0x279d 0x27d2 0x2865 0x2843 0x27ba 0x27a5 0x27c9 0x285f 0x2846 0x27c5 0x27ae 0x27b9 0x285c 0x2847 0x27d4 0x27b9 0x27b5 0x285c 0x284a 0x27e8 0x27c7 0x27b8 0x2867 0x2857 0x27fe 0x27da 0x27bb 0x2875 0x2874 0x281b 0x27f2 0x27bf 0x2880 0x288d 0x283a 0x280d 0x27c4 0x2888 0x28a5 0x285d 0x2830 0x27c7 0x2890 0x28b6 0x287f 0x2856 0x27ca 0x2899 0x28bf 0x2899 0x2876 0x27cd 0x28a3 0x28c6 0x28b0 0x2893 0x27cb 0x28aa 0x28ca 0x28c5 0x28a5 0x27c5 0x28b3 0x28d7 0x28dd 0x28b2 0x27bf 0x28b7 0x28e1 0x28ec 0x28ba 0x27b4 0x28a7 0x28e2 0x28ec 0x28be 0x27a8 0x2891 0x28e4 0x28ea 0x28bc 0x279e 0x2885 0x28d5 0x28e9 0x28a2 0x2750 0x2883 0x28d7 0x28ef 0x2895 0x27bd 0x282d 0x28f6 0x2915 0x28a2 0x2713 0x2832 0x28fa 0x2922 0x28b0 0x27a7 0x2837 0x2923 0x2946 0x28ed 0x280f 0x2913 0x295c 0x2974 0x292c 0x275d 0x2888 0x293c 0x291c 0x28b5 0x26dc 0x2800 0x28f0 0x28d6 0x284a 0x267e 0x278a 0x2890 0x289e 0x2810 0x25a8 0x270e 0x284f 0x2866 0x27c6 0x24e0 0x2666 0x280f 0x2815 0x2751 0x24e0 0x2666 0x280f 0x2815 0x2751 0x24e0 0x2666 0x280f 0x2815 0x2751>; | |
| }; | |
| qcom,pc-temp-z3-lut { | |
| qcom,lut-col-legend = <0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x4bf1 0x4ba7 0x4ba2 0x4b7e 0x4b74 0x4c68 0x4be4 0x4b9e 0x4b86 0x4b81 0x4c9f 0x4c0b 0x4bad 0x4b8d 0x4b87 0x4cbd 0x4c18 0x4bb7 0x4b92 0x4b8c 0x4cca 0x4c1f 0x4bb9 0x4b97 0x4b90 0x4cc9 0x4c20 0x4bbb 0x4b9a 0x4b93 0x4cc9 0x4c1e 0x4bba 0x4b9b 0x4b94 0x4cc7 0x4c1b 0x4bb8 0x4b9a 0x4b93 0x4cc3 0x4c19 0x4bb6 0x4b98 0x4b92 0x4cbf 0x4c17 0x4bb4 0x4b96 0x4b91 0x4cbd 0x4c15 0x4bb2 0x4b93 0x4b90 0x4cba 0x4c0e 0x4bb1 0x4b91 0x4b8e 0x4cba 0x4c08 0x4bae 0x4b91 0x4b8e 0x4cba 0x4c08 0x4bac 0x4b90 0x4b8d 0x4cbb 0x4c0b 0x4bac 0x4b8f 0x4b8a 0x4cb7 0x4c0b 0x4bac 0x4b8e 0x4b88 0x4caa 0x4c04 0x4bab 0x4b8c 0x4b86 0x4c9f 0x4bfa 0x4ba9 0x4b8a 0x4b84 0x4c94 0x4bf8 0x4ba8 0x4b89 0x4b82 0x4c8c 0x4bf6 0x4ba8 0x4b89 0x4b80 0x4c8d 0x4bf7 0x4ba9 0x4b89 0x4b7e 0x4c95 0x4bfc 0x4bac 0x4b8c 0x4b80 0x4c9c 0x4c04 0x4bb2 0x4b96 0x4b8d 0x4ca3 0x4c06 0x4bba 0x4b9d 0x4b96 0x4caa 0x4c08 0x4bc2 0x4ba1 0x4b99 0x4cab 0x4c0a 0x4bc9 0x4ba4 0x4b9b 0x4caa 0x4c10 0x4bc8 0x4ba4 0x4b9b 0x4ca8 0x4c18 0x4bc6 0x4ba2 0x4b98 0x4ca4 0x4c18 0x4bc3 0x4b9f 0x4b95 0x4c9f 0x4c14 0x4bbf 0x4b9c 0x4b92 0x4c9b 0x4c11 0x4bbc 0x4b99 0x4b8f 0x4c99 0x4c0d 0x4bb8 0x4b96 0x4b8c 0x4c96 0x4c0a 0x4bb5 0x4b93 0x4b88 0x4c94 0x4c07 0x4bb3 0x4b8f 0x4b84 0x4c91 0x4c05 0x4bb1 0x4b8a 0x4b7f 0x4c8d 0x4c02 0x4baf 0x4b87 0x4b7c 0x4c88 0x4bfe 0x4bad 0x4b86 0x4b7d 0x4c83 0x4bfb 0x4baa 0x4b86 0x4b81 0x4c80 0x4bf8 0x4ba8 0x4b86 0x4b82 0x4c7e 0x4bf6 0x4ba6 0x4b86 0x4b80 0x4c7b 0x4bf3 0x4ba4 0x4b86 0x4b7e 0x4c77 0x4bf1 0x4ba2 0x4b86 0x4b7e 0x4c73 0x4bee 0x4ba0 0x4b86 0x4b7f 0x4c6d 0x4bea 0x4b9f 0x4b88 0x4b81 0x4ba1 0x4bdf 0x4b99 0x4b87 0x4b80 0x4b3e 0x4bb6 0x4b90 0x4b7b 0x4b7c 0x4b3f 0x4bab 0x4b88 0x4b79 0x4b75 0x4b3d 0x4ba1 0x4b84 0x4b75 0x4b71 0x4b3d 0x4b49 0x4b7e 0x4b75 0x4b6d 0x4b3e 0x4b4a 0x4b87 0x4b7f 0x4b77 0x4b3f 0x4b67 0x4b89 0x4b82 0x4b7c 0x4b3f 0x4b4a 0x4b9d 0x4b85 0x4b7f 0x4b42 0x4b4b 0x4ba1 0x4b89 0x4b87 0x4b48 0x4b50 0x4ba8 0x4b95 0x4b91 0x4b48 0x4b50 0x4ba8 0x4b95 0x4b91 0x4b48 0x4b50 0x4ba8 0x4b95 0x4b91>; | |
| }; | |
| qcom,pc-temp-z4-lut { | |
| qcom,lut-col-legend = <0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x3d0b 0x3b03 0x39ad 0x39a9 0x39a6 0x3d5f 0x3afb 0x3a10 0x39dc 0x39cc 0x3d4d 0x3ae8 0x39fb 0x39ce 0x39c4 0x3caa 0x3abc 0x39e5 0x39ba 0x39b7 0x3bfb 0x3a68 0x39ca 0x39a8 0x39a9 0x3b8e 0x3a27 0x39ac 0x3994 0x3999 0x3b33 0x39fd 0x3995 0x3986 0x398b 0x3aed 0x39dc 0x3981 0x3979 0x397f 0x3ab7 0x39c0 0x3976 0x3971 0x3977 0x3a89 0x39a8 0x3971 0x396c 0x3973 0x3a5a 0x3999 0x396e 0x3969 0x3971 0x3a2f 0x398f 0x3968 0x3965 0x396e 0x3a1c 0x3989 0x3961 0x3960 0x396b 0x3a18 0x398a 0x395e 0x395c 0x3969 0x3a15 0x398f 0x395e 0x3959 0x3966 0x3a08 0x3991 0x395e 0x3958 0x3964 0x39ee 0x3980 0x395a 0x3955 0x3961 0x39d8 0x396e 0x3951 0x3950 0x395c 0x39c6 0x396d 0x394d 0x394d 0x3959 0x39ba 0x3972 0x3954 0x394e 0x3957 0x39be 0x397d 0x395f 0x3953 0x3955 0x39d5 0x39df 0x397c 0x3962 0x395d 0x39f3 0x3a4f 0x39ba 0x398d 0x3986 0x3a32 0x3a4f 0x39d3 0x39a3 0x399e 0x3a75 0x3a23 0x39b6 0x3992 0x398f 0x3a7e 0x39fa 0x3995 0x397b 0x3978 0x3a73 0x39dd 0x3988 0x3971 0x396f 0x3a66 0x39c5 0x3981 0x396c 0x396b 0x3a54 0x39ba 0x397d 0x3968 0x3968 0x3a3e 0x39b3 0x397b 0x3965 0x3964 0x3a2c 0x39af 0x3979 0x3963 0x3960 0x3a1e 0x39ae 0x3978 0x3960 0x395b 0x3a13 0x39ad 0x3978 0x395c 0x3955 0x3a08 0x39ac 0x3976 0x3959 0x3951 0x39ff 0x39ab 0x3975 0x3954 0x394c 0x39f6 0x39a9 0x3972 0x3951 0x394a 0x39ea 0x39a4 0x396f 0x3951 0x394d 0x39e0 0x399c 0x396c 0x3952 0x3958 0x39d9 0x3998 0x3969 0x3952 0x395b 0x39d4 0x3996 0x3967 0x3951 0x3955 0x39cd 0x3993 0x3965 0x394f 0x3951 0x39c3 0x398a 0x395f 0x394b 0x3951 0x39b6 0x397e 0x3956 0x3947 0x3953 0x39a1 0x3974 0x3951 0x3946 0x395a 0x3a31 0x395b 0x3944 0x393d 0x3952 0x3a75 0x3961 0x392e 0x3926 0x392b 0x3a74 0x3966 0x392b 0x391d 0x3920 0x3a6e 0x396b 0x3926 0x3916 0x3919 0x3a67 0x39ca 0x3929 0x3918 0x391c 0x3a61 0x39cb 0x392d 0x3934 0x393f 0x3a6d 0x39b1 0x3932 0x393e 0x3948 0x3a78 0x39d5 0x392c 0x3944 0x394c 0x3a81 0x39d9 0x393f 0x394c 0x394c 0x3a91 0x39e1 0x395c 0x3952 0x3949 0x3a91 0x39e1 0x395c 0x3952 0x3949 0x3a91 0x39e1 0x395c 0x3952 0x3949>; | |
| }; | |
| qcom,pc-temp-z5-lut { | |
| qcom,lut-col-legend = <0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x2ecf 0x31c4 0x3c21 0x3cb1 0x3be2 0x342d 0x39e8 0x3f79 0x439e 0x4479 0x37ce 0x4062 0x4593 0x47c9 0x485b 0x3a61 0x44ea 0x4ae7 0x4b17 0x4c36 0x3c7e 0x487b 0x4e38 0x4f33 0x5021 0x3e55 0x4b7f 0x50f3 0x5362 0x5424 0x3ff0 0x4dce 0x5440 0x5749 0x57f7 0x418d 0x503d 0x57f2 0x5b9e 0x5bad 0x4323 0x54b3 0x5a50 0x5e0a 0x5eac 0x450a 0x5ab8 0x5b99 0x5da3 0x607a 0x480a 0x5dfc 0x5ca1 0x5ccd 0x61dc 0x4c1b 0x5fe5 0x5d6a 0x5d08 0x63d2 0x4fd5 0x615d 0x5e8f 0x603d 0x66c8 0x5371 0x62a9 0x5f83 0x63c6 0x68e3 0x5659 0x6535 0x6079 0x65ec 0x698d 0x57ce 0x676b 0x61ff 0x67f6 0x69fb 0x58cf 0x6a05 0x66ec 0x6b02 0x6b4e 0x5a24 0x6db1 0x711a 0x6f96 0x6eab 0x5d01 0x7413 0x7615 0x72ac 0x7099 0x616a 0x7dfb 0x76df 0x741c 0x6fe6 0x6a28 0x8308 0x76ee 0x74bd 0x6de7 0x7cbc 0x8101 0x6fa2 0x6f1d 0x689f 0x899a 0x7c74 0x5c0f 0x5ad1 0x58db 0x8fd3 0x752a 0x5475 0x5064 0x4fd0 0x93f2 0x65b3 0x5a34 0x552e 0x5503 0x911b 0x5e40 0x627e 0x5d21 0x5d8c 0x88b1 0x65de 0x6a14 0x6390 0x6356 0x8039 0x71c7 0x72ca 0x69e1 0x6817 0x7904 0x79d3 0x799e 0x6f19 0x6b59 0x72c0 0x8077 0x7e90 0x734b 0x6e2e 0x70c9 0x85a0 0x8296 0x76a7 0x7067 0x7072 0x8a48 0x8607 0x797d 0x71e9 0x7081 0x8d9a 0x88eb 0x7c50 0x74b1 0x70a4 0x8de5 0x8aa9 0x7d2d 0x764b 0x70be 0x8d1a 0x8c62 0x7c75 0x777e 0x70eb 0x8c0e 0x8d7d 0x7b9e 0x7982 0x7134 0x8972 0x8aa9 0x7b52 0x7fae 0x71cc 0x85f3 0x839e 0x7b3d 0x8aa6 0x73e6 0x8404 0x7e3b 0x7b37 0x8da5 0x77bc 0x82ec 0x7a64 0x7aed 0x8589 0x7910 0x815a 0x76b4 0x7ab4 0x7e45 0x74f2 0x7d82 0x724e 0x7d2e 0x8066 0x7169 0x7893 0x6ea7 0x81c9 0x8529 0x7100 0x7348 0x6d36 0x8833 0x890b 0x424b 0x709a 0x6a29 0x8a4f 0x8a80 0x2b69 0x486e 0x6513 0x6e4c 0x94e6 0x2b4c 0x415f 0x57d6 0x7b85 0x7e12 0x2b1d 0x3cf1 0x5526 0x8f9d 0x995d 0x2b1b 0x2ceb 0x4e67 0x9c60 0x9351 0x2b2f 0x2d36 0x56b9 0x8bb5 0x66d7 0x2b09 0x307f 0x5545 0x732c 0x57d4 0x2ac7 0x2c9b 0x9a48 0x65bc 0x5151 0x2a8a 0x2c54 0x9fc3 0x5ef3 0x5064 0x2a46 0x2c80 0x9440 0x62c8 0x524e 0x2a46 0x2c80 0x9440 0x62c8 0x524e 0x2a46 0x2c80 0x9440 0x62c8 0x524e>; | |
| }; | |
| qcom,pc-temp-z6-lut { | |
| qcom,lut-col-legend = <0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x3d5f 0x3aff 0x39b5 0x3976 0x3966 0x3da2 0x3b0d 0x39dd 0x3990 0x397e 0x3da0 0x3b10 0x39d9 0x398d 0x397d 0x3d56 0x3b02 0x39d4 0x3988 0x397c 0x3d04 0x3ad9 0x39c9 0x3982 0x3979 0x3cc9 0x3ab7 0x39bb 0x397b 0x3973 0x3c94 0x3a9f 0x39b0 0x3975 0x396d 0x3c6b 0x3a8b 0x39a6 0x396f 0x3968 0x3c4b 0x3a7b 0x399f 0x396a 0x3964 0x3c2f 0x3a6f 0x399c 0x3967 0x3961 0x3c13 0x3a65 0x399a 0x3964 0x395f 0x3bf9 0x3a5c 0x3997 0x3961 0x395d 0x3beb 0x3a57 0x3993 0x395f 0x395c 0x3be4 0x3a57 0x3990 0x395d 0x395a 0x3bde 0x3a5a 0x3991 0x395c 0x3958 0x3bd4 0x3a5b 0x3992 0x395b 0x3956 0x3bc6 0x3a52 0x3990 0x3959 0x3954 0x3bbd 0x3a49 0x398d 0x3957 0x3951 0x3bb9 0x3a49 0x398c 0x3955 0x394f 0x3bb6 0x3a4e 0x3990 0x3956 0x394e 0x3bbb 0x3a58 0x3998 0x395a 0x394d 0x3bd0 0x3a8a 0x39a9 0x3963 0x3952 0x3bea 0x3ac0 0x39cb 0x397e 0x396e 0x3c0d 0x3ac2 0x39d8 0x398c 0x397d 0x3c30 0x3ab3 0x39d2 0x3987 0x3979 0x3c37 0x3aa8 0x39cb 0x3980 0x3972 0x3c36 0x3aa3 0x39c7 0x397d 0x396e 0x3c34 0x3a9f 0x39c4 0x397a 0x396b 0x3c30 0x3a9e 0x39c2 0x3978 0x3969 0x3c2a 0x3a9c 0x39c1 0x3976 0x3966 0x3c27 0x3a9c 0x39c0 0x3974 0x3963 0x3c26 0x3a9d 0x39c0 0x3972 0x3960 0x3c25 0x3a9e 0x39c0 0x3970 0x395c 0x3c25 0x3aa1 0x39c0 0x396d 0x3958 0x3c26 0x3aa4 0x39c0 0x396b 0x3955 0x3c28 0x3aa7 0x39c1 0x3968 0x3952 0x3c2a 0x3aa8 0x39c1 0x3969 0x3955 0x3c2d 0x3aa9 0x39c2 0x396b 0x395c 0x3c32 0x3aac 0x39c3 0x396c 0x395f 0x3c38 0x3ab2 0x39c5 0x396e 0x395d 0x3c3f 0x3ab7 0x39c7 0x396f 0x395b 0x3c46 0x3aba 0x39c7 0x396f 0x395c 0x3c4d 0x3abd 0x39c7 0x3970 0x395f 0x3c54 0x3ac0 0x39c8 0x3972 0x3965 0x3c41 0x3abf 0x39c5 0x3970 0x3962 0x3c3b 0x3ab6 0x39bd 0x3963 0x3951 0x3c40 0x3ab6 0x39ba 0x3960 0x3949 0x3c41 0x3ab8 0x39b9 0x395d 0x3945 0x3c47 0x3abc 0x39bc 0x3960 0x3946 0x3c4e 0x3ac7 0x39c8 0x3974 0x395d 0x3c62 0x3ad4 0x39d1 0x397e 0x3967 0x3c75 0x3ae0 0x39df 0x3986 0x396e 0x3c8d 0x3af0 0x39f3 0x3991 0x3976 0x3cae 0x3b0a 0x3a0e 0x39a1 0x3980 0x3cae 0x3b0a 0x3a0e 0x39a1 0x3980 0x3cae 0x3b0a 0x3a0e 0x39a1 0x3980>; | |
| }; | |
| qcom,pc-temp-y1-lut { | |
| qcom,lut-col-legend = <0xfffffff6 0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x1b33 0x18db 0x1777 0x15fe 0x1588 0x155e 0x1b21 0x18d9 0x1773 0x15fd 0x1586 0x155f 0x1b16 0x18d5 0x176f 0x15fc 0x1584 0x155f 0x1b11 0x18d2 0x176b 0x15fb 0x1582 0x155f 0x1b10 0x18d1 0x1768 0x15fa 0x1581 0x155e 0x1b10 0x18d5 0x1764 0x15f9 0x157f 0x155e 0x1b16 0x18de 0x1761 0x15f8 0x157e 0x155d 0x1b1e 0x18e6 0x175d 0x15f8 0x157d 0x155b 0x1b1b 0x18e6 0x175e 0x15f7 0x157c 0x155b 0x1b08 0x18de 0x1760 0x15f8 0x157b 0x155b 0x1afe 0x18d8 0x1761 0x15f8 0x157a 0x155a 0x1b07 0x18d5 0x175c 0x15f7 0x157a 0x155a 0x1b13 0x18d4 0x1755 0x15f6 0x157a 0x1559 0x1b17 0x18da 0x1755 0x15f6 0x157b 0x1559 0x1b1a 0x18ec 0x175a 0x15f9 0x157c 0x155a 0x1b1b 0x18f6 0x175d 0x15fc 0x157d 0x155b 0x1b1e 0x18f5 0x1761 0x15ff 0x157d 0x155c 0x1b22 0x18f3 0x1766 0x1602 0x157e 0x155d 0x1b1f 0x18f4 0x1765 0x1605 0x157f 0x155e 0x1b14 0x18f7 0x1764 0x1607 0x1582 0x155f 0x1b11 0x18fa 0x1763 0x160b 0x1584 0x1560 0x1b2d 0x18fd 0x1765 0x160f 0x1586 0x1561 0x1b49 0x1900 0x176a 0x1615 0x1589 0x1563 0x1b40 0x1905 0x1771 0x161a 0x158b 0x1566 0x1b1e 0x190e 0x177c 0x161f 0x158e 0x1568 0x1b10 0x1912 0x1782 0x1624 0x1592 0x156b 0x1b16 0x1913 0x1783 0x162a 0x1595 0x156e 0x1b1e 0x1912 0x1784 0x1631 0x1599 0x1570 0x1b27 0x1912 0x1785 0x1637 0x159d 0x1573 0x1b3c 0x1912 0x1787 0x163c 0x15a1 0x1575 0x1b42 0x1912 0x1789 0x1642 0x15a5 0x1579 0x1b3b 0x1916 0x178c 0x1649 0x15a9 0x157c 0x1b31 0x1919 0x1790 0x1650 0x15ae 0x1580 0x1b23 0x1916 0x1796 0x1658 0x15b2 0x1583 0x1b11 0x1910 0x17a0 0x165f 0x15b7 0x1585 0x1b0d 0x1910 0x17a7 0x1666 0x15bb 0x1588 0x1b14 0x191c 0x17ab 0x166d 0x15c1 0x158c 0x1b1b 0x1926 0x17ae 0x1674 0x15c7 0x1592 0x1b1b 0x1921 0x17af 0x167d 0x15cc 0x1596 0x1b1e 0x1916 0x17b0 0x1687 0x15d1 0x1599 0x1b20 0x1911 0x17b3 0x168f 0x15d7 0x159d 0x1b22 0x1910 0x17bd 0x1697 0x15dc 0x15a1 0x1b1d 0x1912 0x17c3 0x169b 0x15e3 0x15a5 0x1b0b 0x191d 0x17ca 0x169e 0x15ea 0x15aa 0x1b29 0x191c 0x17c6 0x16b0 0x15f6 0x15b3 0x1b14 0x1921 0x17cb 0x16b5 0x15ff 0x15b9 0x1b10 0x1921 0x17d3 0x16ba 0x1603 0x15bd 0x1b15 0x192a 0x17e1 0x16ca 0x1608 0x15bf 0x1b14 0x191e 0x17d9 0x16cb 0x160d 0x15c3 0x1b18 0x1924 0x17da 0x16d8 0x1616 0x15ca 0x1b35 0x1928 0x17d3 0x16e2 0x1622 0x15d1 0x1b4e 0x1940 0x17de 0x16f1 0x1634 0x15e0 0x1b73 0x192d 0x17eb 0x16ff 0x1648 0x15ed 0x1b98 0x1947 0x17f8 0x171a 0x165e 0x1601 0x1b98 0x1947 0x17f8 0x171a 0x165e 0x1601 0x1b98 0x1947 0x17f8 0x171a 0x165e 0x1601>; | |
| }; | |
| qcom,pc-temp-y2-lut { | |
| qcom,lut-col-legend = <0xfffffff6 0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x25ab 0x2a1c 0x2b1d 0x2bd0 0x2b59 0x2b01 0x25b5 0x29fb 0x2af1 0x2ba9 0x2b44 0x2b08 0x268b 0x29d6 0x2ac1 0x2b79 0x2b2d 0x2b0a 0x2762 0x29b1 0x2a92 0x2b48 0x2b17 0x2b0a 0x2806 0x2992 0x2a6c 0x2b1d 0x2b02 0x2b07 0x2844 0x2980 0x2a55 0x2aff 0x2af0 0x2b02 0x2829 0x2978 0x2a4a 0x2aeb 0x2ae1 0x2ae5 0x2801 0x2972 0x2a44 0x2ad8 0x2ad2 0x2ab9 0x2823 0x2968 0x2a40 0x2ac9 0x2abe 0x2aa8 0x28c8 0x295a 0x2a32 0x2abb 0x2aa1 0x2a9c 0x2923 0x2954 0x2a28 0x2aaf 0x2a8e 0x2a95 0x291a 0x2972 0x2a22 0x2aa3 0x2a81 0x2a91 0x2906 0x29a9 0x2a1c 0x2a94 0x2a75 0x2a8a 0x28be 0x29e1 0x2a2d 0x2a7e 0x2a75 0x2a7d 0x27f2 0x2a25 0x2a79 0x2a5e 0x2a7c 0x2a61 0x2783 0x2a41 0x2abc 0x2a52 0x2a7e 0x2a4f 0x26dd 0x2a35 0x2aec 0x2a7c 0x2a77 0x2a58 0x2615 0x2a27 0x2b0d 0x2abb 0x2a6f 0x2a6c 0x25e8 0x2a27 0x2b06 0x2aef 0x2a75 0x2a72 0x25d3 0x2a2b 0x2ae3 0x2b21 0x2a92 0x2a76 0x25cd 0x2a31 0x2ad5 0x2b37 0x2ab8 0x2a7d 0x25cc 0x2a38 0x2af5 0x2b46 0x2afc 0x2abc 0x25cc 0x2a44 0x2b22 0x2b55 0x2b3a 0x2b12 0x25ca 0x2a54 0x2b36 0x2b5b 0x2b42 0x2b2f 0x25c6 0x2a6d 0x2b45 0x2b61 0x2b37 0x2b3a 0x25c3 0x2aa3 0x2b4a 0x2b67 0x2b38 0x2b3c 0x25c1 0x2c4d 0x2b4d 0x2b76 0x2b54 0x2b40 0x25bf 0x2de4 0x2b53 0x2b8d 0x2b75 0x2b4b 0x25bd 0x2cfc 0x2b5b 0x2bab 0x2b8c 0x2b58 0x25bb 0x2a40 0x2b66 0x2bd1 0x2ba6 0x2b6e 0x25ba 0x2888 0x2b6e 0x2be4 0x2bb6 0x2b7b 0x25b9 0x27ab 0x2b6d 0x2bed 0x2bc8 0x2b84 0x25b8 0x2710 0x2b65 0x2bf4 0x2bd8 0x2b90 0x25b7 0x26a4 0x2b56 0x2bfb 0x2be1 0x2ba7 0x25b6 0x2654 0x2b34 0x2bfc 0x2bf2 0x2bc8 0x25b6 0x2622 0x2b0c 0x2bf2 0x2bf7 0x2bd2 0x25b5 0x25fd 0x2aa3 0x2bdb 0x2bec 0x2bb2 0x25b5 0x25e5 0x2a20 0x2bc7 0x2bdb 0x2b8a 0x25b5 0x25d8 0x29c7 0x2bb8 0x2bcb 0x2b7f 0x25b4 0x25ce 0x2977 0x2ba4 0x2bba 0x2b7b 0x25b4 0x25c7 0x28f0 0x2b87 0x2bb8 0x2b76 0x25b4 0x25c1 0x27d9 0x2b62 0x2bd0 0x2b68 0x25b3 0x25bd 0x277c 0x2b44 0x2bd4 0x2b61 0x25b3 0x25ba 0x27af 0x2b22 0x2baf 0x2b70 0x25b3 0x25b8 0x26ed 0x2ab1 0x2b95 0x2b41 0x25b3 0x25b6 0x2680 0x2a89 0x2b52 0x2b0f 0x25b3 0x25b5 0x2644 0x2a47 0x2b31 0x2ad8 0x25b2 0x25b5 0x260d 0x2a2a 0x2b2b 0x2acb 0x25b2 0x25b4 0x25e0 0x29f4 0x2b15 0x2aa6 0x25b2 0x25b4 0x25d0 0x299c 0x2ad8 0x2a9b 0x25b2 0x25b3 0x25c6 0x292c 0x2aa4 0x2a74 0x25b1 0x25b3 0x25bf 0x289d 0x2a31 0x2a18 0x25b0 0x25b2 0x25b9 0x2816 0x29d8 0x29c8 0x25b0 0x25b2 0x25b6 0x28d0 0x2958 0x2964 0x25b0 0x25b2 0x25b6 0x28d0 0x2958 0x2964 0x25b0 0x25b2 0x25b6 0x28d0 0x2958 0x2964>; | |
| }; | |
| qcom,pc-temp-y3-lut { | |
| qcom,lut-col-legend = <0xfffffff6 0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x34b3 0x3427 0x33f0 0x33dc 0x33db 0x33d8 0x34a9 0x3424 0x33f1 0x33de 0x33db 0x33d8 0x34a4 0x3422 0x33f2 0x33e0 0x33db 0x33d9 0x34a4 0x3423 0x33f4 0x33e2 0x33dc 0x33da 0x34a8 0x3425 0x33f6 0x33e3 0x33dc 0x33da 0x34ae 0x3428 0x33f7 0x33e3 0x33dc 0x33db 0x34c9 0x342e 0x33f7 0x33e3 0x33dc 0x33db 0x34ea 0x3433 0x33f8 0x33e3 0x33dc 0x33db 0x34e7 0x3435 0x33fa 0x33e3 0x33dd 0x33db 0x34c1 0x3435 0x33fe 0x33e4 0x33de 0x33db 0x34a4 0x3436 0x3403 0x33e5 0x33de 0x33dc 0x3499 0x343b 0x3407 0x33e5 0x33de 0x33dc 0x3490 0x3441 0x340a 0x33e5 0x33de 0x33dc 0x3486 0x3440 0x340a 0x33e6 0x33de 0x33dc 0x347a 0x3439 0x3409 0x33e8 0x33df 0x33dd 0x3474 0x3433 0x3408 0x33ea 0x33df 0x33dd 0x3474 0x342f 0x3406 0x33eb 0x33e0 0x33de 0x3474 0x342a 0x3404 0x33ec 0x33e2 0x33de 0x3466 0x3425 0x3401 0x33ec 0x33e3 0x33df 0x3441 0x341f 0x33fc 0x33eb 0x33e3 0x33e1 0x342c 0x341a 0x33f8 0x33ea 0x33e4 0x33e1 0x3427 0x3418 0x33f5 0x33e6 0x33e0 0x33de 0x3425 0x3415 0x33f3 0x33e3 0x33dc 0x33da 0x342a 0x340b 0x33f2 0x33e2 0x33db 0x33d9 0x343e 0x33f5 0x33f1 0x33e1 0x33db 0x33d9 0x3455 0x33e9 0x33f1 0x33e1 0x33db 0x33d9 0x3470 0x33d9 0x33f1 0x33e0 0x33db 0x33d9 0x3491 0x33cb 0x33f1 0x33e0 0x33db 0x33d9 0x34b6 0x33cb 0x33f0 0x33e0 0x33db 0x33d9 0x34e1 0x33cb 0x33f0 0x33e0 0x33db 0x33d9 0x3512 0x33cc 0x33ef 0x33e0 0x33da 0x33d8 0x354c 0x33cd 0x33eb 0x33e0 0x33da 0x33d8 0x358c 0x33ce 0x33e8 0x33df 0x33da 0x33d8 0x35d1 0x33d0 0x33e9 0x33df 0x33da 0x33d8 0x361d 0x33d4 0x33ed 0x33df 0x33d9 0x33d8 0x3673 0x33da 0x33ef 0x33df 0x33d9 0x33d8 0x36d8 0x33e5 0x33ee 0x33df 0x33da 0x33d8 0x3749 0x33f3 0x33ec 0x33e0 0x33da 0x33d9 0x37c4 0x3405 0x33ec 0x33df 0x33da 0x33d9 0x384c 0x341c 0x33ed 0x33df 0x33da 0x33d9 0x38e4 0x343c 0x33eb 0x33df 0x33da 0x33d9 0x3992 0x346f 0x33d7 0x33e0 0x33db 0x33d9 0x3a4d 0x34b5 0x33ce 0x33e0 0x33db 0x33d9 0x3b18 0x351e 0x33cd 0x33e0 0x33da 0x33d9 0x3bfa 0x35a1 0x33cf 0x33df 0x33db 0x33da 0x3cbb 0x363d 0x33d2 0x33e4 0x33dc 0x33db 0x3d54 0x36ac 0x33d6 0x33e4 0x33dd 0x33dd 0x3e0b 0x373b 0x33e0 0x33e8 0x33df 0x33dd 0x3ee2 0x37e1 0x33fd 0x33ea 0x33e0 0x33dd 0x3fd4 0x3899 0x341f 0x33ec 0x33e0 0x33dc 0x4110 0x3986 0x344d 0x33ee 0x33e1 0x33dd 0x44e2 0x3ab1 0x34a9 0x33f3 0x33e3 0x33de 0x4cb4 0x3c29 0x3543 0x33fd 0x33e6 0x33e3 0x59a2 0x3e85 0x364b 0x3417 0x33ed 0x33e7 0x59a2 0x3e85 0x364b 0x3417 0x33ed 0x33e7 0x59a2 0x3e85 0x364b 0x3417 0x33ed 0x33e7>; | |
| }; | |
| qcom,pc-temp-y4-lut { | |
| qcom,lut-col-legend = <0xfffffff6 0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x424d 0x40ef 0x408e 0x404a 0x4044 0x4048 0x4267 0x40f8 0x408d 0x4049 0x4044 0x4048 0x4286 0x4101 0x408d 0x4049 0x4044 0x4048 0x42a4 0x410c 0x408e 0x4049 0x4044 0x4048 0x42ba 0x4117 0x4090 0x4049 0x4044 0x4048 0x42c1 0x4122 0x4093 0x4049 0x4044 0x4048 0x42b5 0x412f 0x4097 0x404b 0x4044 0x4048 0x42a3 0x413d 0x409b 0x404e 0x4045 0x4048 0x42ca 0x4147 0x40a1 0x4051 0x4045 0x4048 0x437c 0x4150 0x40a8 0x4054 0x4046 0x4049 0x43f4 0x415f 0x40b3 0x4059 0x4047 0x4049 0x4412 0x41b8 0x40c8 0x4060 0x404a 0x404a 0x4423 0x4222 0x40e4 0x406a 0x404d 0x404c 0x43e8 0x4237 0x40fe 0x4072 0x4051 0x404e 0x4303 0x423e 0x4117 0x4078 0x4056 0x4051 0x4284 0x423f 0x4137 0x4083 0x405c 0x4055 0x4276 0x4226 0x4176 0x409b 0x4066 0x405b 0x426d 0x41f7 0x41b0 0x40bb 0x4076 0x4066 0x4254 0x41bf 0x41a0 0x40e1 0x4092 0x407a 0x4225 0x4172 0x4149 0x4110 0x40c0 0x409d 0x41f6 0x4134 0x40fb 0x4118 0x40d1 0x40ae 0x41c5 0x4104 0x40bc 0x40ba 0x4097 0x4089 0x419d 0x40e2 0x408a 0x405b 0x4054 0x4056 0x418f 0x40df 0x407b 0x404c 0x4047 0x404a 0x4188 0x40ef 0x4072 0x4046 0x4043 0x4047 0x4182 0x40f8 0x406e 0x4045 0x4041 0x4046 0x417d 0x4105 0x406d 0x4046 0x4041 0x4045 0x4179 0x4113 0x406d 0x4047 0x4040 0x4045 0x4179 0x4116 0x406c 0x4049 0x4041 0x4045 0x4179 0x4117 0x406d 0x404d 0x4044 0x4046 0x417a 0x411b 0x406d 0x4052 0x4048 0x4047 0x417c 0x4125 0x406c 0x405a 0x4050 0x404d 0x417f 0x412f 0x406c 0x405f 0x4057 0x4056 0x4182 0x4132 0x406e 0x405e 0x405a 0x405c 0x4187 0x4135 0x4074 0x405a 0x405a 0x4063 0x418a 0x4135 0x4079 0x4053 0x4057 0x4062 0x418e 0x4131 0x407c 0x4047 0x404a 0x4053 0x4190 0x412d 0x407e 0x4040 0x403f 0x4045 0x418f 0x412d 0x407f 0x4041 0x4042 0x4047 0x418d 0x412b 0x4080 0x4044 0x4048 0x4051 0x418b 0x4129 0x4085 0x4047 0x404b 0x4057 0x4182 0x411e 0x40ae 0x404c 0x404a 0x4056 0x4180 0x410e 0x40c3 0x4050 0x4048 0x4054 0x4188 0x40fa 0x40c8 0x4051 0x4040 0x4044 0x41a1 0x40f5 0x40d1 0x405a 0x4040 0x403c 0x41b3 0x4107 0x40e9 0x406d 0x4053 0x4056 0x41d8 0x411d 0x4101 0x407b 0x4068 0x4070 0x4209 0x413b 0x4120 0x4098 0x4088 0x4089 0x4230 0x4172 0x4123 0x40b5 0x4091 0x4098 0x4235 0x418c 0x412b 0x40ab 0x4077 0x4068 0x422d 0x417f 0x4129 0x40aa 0x406f 0x405f 0x42b6 0x419a 0x4137 0x40c6 0x407c 0x4065 0x449d 0x41ea 0x416f 0x4106 0x40a1 0x407e 0x4ada 0x42e4 0x41f8 0x41db 0x411f 0x40c5 0x4ada 0x42e4 0x41f8 0x41db 0x411f 0x40c5 0x4ada 0x42e4 0x41f8 0x41db 0x411f 0x40c5>; | |
| }; | |
| qcom,pc-temp-y5-lut { | |
| qcom,lut-col-legend = <0xfffffff6 0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x2ced 0x3ea2 0x39af 0x35e1 0x4bcf 0x3ccd 0x2d53 0x3dce 0x3b34 0x3d43 0x4bd5 0x422a 0x2e63 0x3c89 0x3be5 0x4279 0x4bd8 0x468a 0x2ffd 0x3b30 0x3bf8 0x45bf 0x4bd8 0x49ce 0x3203 0x3a21 0x3ba2 0x4753 0x4bd5 0x4bd8 0x345b 0x39ba 0x3b18 0x476c 0x4bcd 0x4c86 0x38d7 0x39d7 0x39c9 0x43fd 0x49f5 0x4b65 0x3d5e 0x3a00 0x3853 0x3f6c 0x475d 0x4979 0x3c41 0x3960 0x3887 0x3e47 0x4713 0x4881 0x34dd 0x369f 0x3a67 0x3e01 0x4797 0x47d1 0x30e1 0x34f4 0x3b73 0x3d80 0x47da 0x4716 0x35eb 0x34b5 0x3a2c 0x3aca 0x45a8 0x453e 0x3c71 0x3494 0x3852 0x37e2 0x4219 0x42cb 0x3c22 0x35b0 0x37ae 0x382d 0x3fbe 0x41b5 0x37b2 0x3a03 0x3765 0x3a15 0x3dc7 0x4121 0x34fa 0x3d1b 0x3777 0x3ade 0x3cc4 0x4057 0x3474 0x3e5d 0x38dc 0x39c2 0x3c5a 0x3e52 0x33da 0x3f47 0x3b38 0x389a 0x3c1b 0x3c69 0x3288 0x400e 0x3df7 0x39a3 0x3c56 0x3c59 0x3087 0x40cc 0x41b8 0x3db1 0x3da1 0x3d22 0x2eb0 0x415c 0x4434 0x4217 0x3f8b 0x3e6c 0x2cd4 0x41ef 0x459d 0x4774 0x44c0 0x4225 0x2b6d 0x4244 0x46a7 0x4be6 0x4aa8 0x46f3 0x2b19 0x3f75 0x4742 0x4d6d 0x4d7e 0x4a38 0x2b01 0x373d 0x4795 0x4de9 0x4f6b 0x4cf0 0x2b10 0x324c 0x479b 0x4dca 0x5114 0x4e7d 0x2b30 0x2e16 0x4855 0x4d82 0x53d1 0x4f49 0x2b4c 0x2ac4 0x4947 0x4d49 0x55ef 0x4fc2 0x2b7c 0x2a7f 0x498c 0x4d04 0x549a 0x4f3e 0x2be0 0x2a6e 0x49b4 0x4c77 0x501d 0x4c6b 0x2c05 0x2a74 0x4950 0x4bd1 0x4c94 0x497d 0x2c51 0x2afd 0x42c8 0x4af0 0x49e8 0x4698 0x2c9d 0x2b9d 0x3c76 0x4a69 0x4843 0x4474 0x2cc0 0x2bfd 0x3ea6 0x4b83 0x48e5 0x4570 0x2d00 0x2c56 0x44a3 0x4e49 0x4b83 0x4a5a 0x2d17 0x2c7b 0x4675 0x507e 0x4f32 0x4fdc 0x2d5d 0x2d21 0x4376 0x53a4 0x59e9 0x562c 0x2d9e 0x2db1 0x3fac 0x551d 0x6278 0x5ab9 0x2d78 0x2d78 0x3df5 0x51b2 0x5f7a 0x58cb 0x2d19 0x2cf7 0x3caa 0x4ca2 0x5799 0x5237 0x2cf2 0x2cc7 0x39ce 0x4b4a 0x5437 0x4f3b 0x2cc1 0x2c94 0x3199 0x4b11 0x5402 0x4f54 0x2c97 0x2cec 0x2e4d 0x491d 0x54d7 0x5006 0x2c68 0x2dde 0x2e03 0x4603 0x57ab 0x5897 0x2c64 0x2e2a 0x2d77 0x412f 0x54fa 0x59bb 0x2c73 0x2d3d 0x2c2e 0x4493 0x47e8 0x4767 0x2cc8 0x2d38 0x2bce 0x412e 0x43a1 0x444b 0x2dd1 0x2ec1 0x2c33 0x4289 0x4053 0x3c31 0x2f6e 0x2e7b 0x2d9d 0x414d 0x3e09 0x3858 0x2ecb 0x2e77 0x2ebe 0x4453 0x4319 0x3c0c 0x2d81 0x2ee7 0x2ecf 0x4446 0x4725 0x3f7d 0x2b09 0x2ea2 0x2ebc 0x4326 0x45ac 0x3e65 0x2819 0x2e45 0x2e93 0x418c 0x43bf 0x4557 0x259a 0x2c30 0x2f99 0x4214 0x43f8 0x45f7 0x259a 0x2c30 0x2f99 0x4214 0x43f8 0x45f7 0x259a 0x2c30 0x2f99 0x4214 0x43f8 0x45f7>; | |
| }; | |
| qcom,pc-temp-y6-lut { | |
| qcom,lut-col-legend = <0xfffffff6 0x00 0x0a 0x19 0x28 0x32>; | |
| qcom,lut-row-legend = <0x2710 0x2648 0x2580 0x24b8 0x23f0 0x2328 0x2260 0x2198 0x20d0 0x2008 0x1f40 0x1e78 0x1db0 0x1ce8 0x1c20 0x1b58 0x1a90 0x19c8 0x1900 0x1838 0x1770 0x16a8 0x15e0 0x1518 0x1450 0x1388 0x12c0 0x11f8 0x1130 0x1068 0xfa0 0xed8 0xe10 0xd48 0xc80 0xbb8 0xaf0 0xa28 0x960 0x898 0x7d0 0x708 0x640 0x578 0x4b0 0x3e8 0x384 0x320 0x2bc 0x258 0x1f4 0x190 0x12c 0xc8 0x64 0x00>; | |
| qcom,lut-data = <0x17da 0x151d 0x143a 0x13c8 0x13b6 0x13b2 0x17d1 0x1519 0x1439 0x13c8 0x13b6 0x13b2 0x17cc 0x1518 0x1438 0x13c9 0x13b6 0x13b2 0x17c9 0x1518 0x1438 0x13ca 0x13b7 0x13b3 0x17c8 0x1519 0x1438 0x13cb 0x13b7 0x13b4 0x17c8 0x151b 0x1438 0x13cb 0x13b7 0x13b4 0x17ca 0x151f 0x1438 0x13cc 0x13b7 0x13b4 0x17ce 0x1525 0x1439 0x13cc 0x13b7 0x13b4 0x17d6 0x1528 0x143a 0x13cd 0x13b7 0x13b4 0x17e5 0x152a 0x143e 0x13cf 0x13b8 0x13b4 0x17f1 0x152e 0x1443 0x13d1 0x13b9 0x13b5 0x17f7 0x154a 0x144b 0x13d3 0x13ba 0x13b5 0x17fb 0x156b 0x1454 0x13d6 0x13bb 0x13b6 0x17eb 0x1570 0x145b 0x13d9 0x13bc 0x13b7 0x17ab 0x1572 0x1462 0x13dd 0x13be 0x13b8 0x178b 0x1572 0x146a 0x13e1 0x13c0 0x13ba 0x178e 0x156c 0x147b 0x13e9 0x13c4 0x13bc 0x1792 0x1560 0x148b 0x13f3 0x13ca 0x13bf 0x1790 0x1551 0x1485 0x13fe 0x13d3 0x13c6 0x178b 0x153b 0x1469 0x140b 0x13e0 0x13d1 0x1789 0x152d 0x1451 0x140d 0x13e5 0x13d6 0x178f 0x1526 0x143e 0x13f0 0x13d2 0x13c9 0x179a 0x1521 0x1431 0x13d3 0x13bc 0x13b8 0x17ad 0x1522 0x142f 0x13cf 0x13b8 0x13b4 0x17cf 0x1524 0x142e 0x13cd 0x13b7 0x13b3 0x17f4 0x1527 0x142e 0x13cd 0x13b6 0x13b2 0x1819 0x152d 0x1430 0x13ce 0x13b7 0x13b2 0x1842 0x1537 0x1433 0x13cf 0x13b7 0x13b2 0x186e 0x1544 0x1437 0x13d1 0x13b8 0x13b3 0x189e 0x1558 0x143a 0x13d3 0x13b9 0x13b3 0x18d2 0x156e 0x143d 0x13d6 0x13ba 0x13b4 0x190b 0x1587 0x143f 0x13d9 0x13bc 0x13b6 0x1947 0x15a3 0x1441 0x13db 0x13bf 0x13b8 0x1987 0x15c1 0x1448 0x13dc 0x13c0 0x13ba 0x19ca 0x15e3 0x1455 0x13dc 0x13c0 0x13bd 0x1a15 0x1608 0x1460 0x13dc 0x13c0 0x13bd 0x1a67 0x1631 0x1469 0x13db 0x13bd 0x13b9 0x1ac1 0x165f 0x1472 0x13db 0x13bb 0x13b6 0x1b24 0x1692 0x147c 0x13dc 0x13bc 0x13b7 0x1b92 0x16cb 0x1489 0x13df 0x13bf 0x13ba 0x1c0a 0x170b 0x1499 0x13e3 0x13c1 0x13bc 0x1c91 0x1753 0x14af 0x13e7 0x13c2 0x13bc 0x1d25 0x17ac 0x14ca 0x13eb 0x13c2 0x13bc 0x1dc9 0x181a 0x14eb 0x13f0 0x13c0 0x13b9 0x1e79 0x1897 0x151c 0x13f8 0x13c3 0x13b8 0x1f10 0x1926 0x1559 0x1407 0x13ca 0x13c1 0x1f93 0x198e 0x1589 0x140f 0x13d2 0x13cb 0x2029 0x1a0a 0x15c6 0x141e 0x13de 0x13d3 0x20d4 0x1a9d 0x160e 0x142e 0x13e2 0x13d8 0x2195 0x1b3c 0x165d 0x1434 0x13dc 0x13ca 0x227f 0x1bf7 0x16bb 0x1440 0x13dd 0x13c9 0x25b7 0x1cf0 0x1743 0x145e 0x13e5 0x13ce 0x2c5c 0x1e2d 0x1805 0x148e 0x13f6 0x13db 0x37b4 0x2060 0x191e 0x14fe 0x1425 0x13f5 0x37b4 0x2060 0x191e 0x14fe 0x1425 0x13f5 0x37b4 0x2060 0x191e 0x14fe 0x1425 0x13f5>; | |
| }; | |
| }; | |
| }; | |
| __symbols__ { | |
| CPU0 = "/cpus/cpu@0"; | |
| L2_0 = "/cpus/cpu@0/l2-cache"; | |
| L1_I_0 = "/cpus/cpu@0/l1-icache"; | |
| L1_D_0 = "/cpus/cpu@0/l1-dcache"; | |
| L1_TLB_0 = "/cpus/cpu@0/l1-tlb"; | |
| CPU1 = "/cpus/cpu@1"; | |
| L1_I_1 = "/cpus/cpu@1/l1-icache"; | |
| L1_D_1 = "/cpus/cpu@1/l1-dcache"; | |
| L1_TLB_1 = "/cpus/cpu@1/l1-tlb"; | |
| CPU2 = "/cpus/cpu@2"; | |
| L1_I_2 = "/cpus/cpu@2/l1-icache"; | |
| L1_D_2 = "/cpus/cpu@2/l1-dcache"; | |
| L1_TLB_2 = "/cpus/cpu@2/l1-tlb"; | |
| CPU3 = "/cpus/cpu@3"; | |
| L1_I_3 = "/cpus/cpu@3/l1-icache"; | |
| L1_D_3 = "/cpus/cpu@3/l1-dcache"; | |
| L1_TLB_3 = "/cpus/cpu@3/l1-tlb"; | |
| CPU4 = "/cpus/cpu@100"; | |
| L2_1 = "/cpus/cpu@100/l2-cache"; | |
| L1_I_100 = "/cpus/cpu@100/l1-icache"; | |
| L1_D_100 = "/cpus/cpu@100/l1-dcache"; | |
| L1_TLB_100 = "/cpus/cpu@100/l1-tlb"; | |
| CPU5 = "/cpus/cpu@101"; | |
| L1_I_101 = "/cpus/cpu@101/l1-icache"; | |
| L1_D_101 = "/cpus/cpu@101/l1-dcache"; | |
| L1_TLB_101 = "/cpus/cpu@101/l1-tlb"; | |
| CPU6 = "/cpus/cpu@102"; | |
| L1_I_102 = "/cpus/cpu@102/l1-icache"; | |
| L1_D_102 = "/cpus/cpu@102/l1-dcache"; | |
| L1_TLB_102 = "/cpus/cpu@102/l1-tlb"; | |
| CPU7 = "/cpus/cpu@103"; | |
| L1_I_103 = "/cpus/cpu@103/l1-icache"; | |
| L1_D_103 = "/cpus/cpu@103/l1-dcache"; | |
| L1_TLB_103 = "/cpus/cpu@103/l1-tlb"; | |
| soc = "/soc"; | |
| smem = "/soc/qcom,smem@86300000"; | |
| rpm_bus = "/soc/qcom,rpm-smd"; | |
| pm8953_s1 = "/soc/qcom,rpm-smd/rpm-regulator-smpa1/regulator-s1"; | |
| pm8953_s2_level = "/soc/qcom,rpm-smd/rpm-regulator-smpa2/regulator-s2-level"; | |
| pm8953_s2_floor_level = "/soc/qcom,rpm-smd/rpm-regulator-smpa2/regulator-s2-floor-level"; | |
| pm8953_s2_level_ao = "/soc/qcom,rpm-smd/rpm-regulator-smpa2/regulator-s2-level-ao"; | |
| cx_cdev = "/soc/qcom,rpm-smd/rpm-regulator-smpa2/regulator-cx-cdev"; | |
| pm8953_s3 = "/soc/qcom,rpm-smd/rpm-regulator-smpa3/regulator-s3"; | |
| pm8953_s4 = "/soc/qcom,rpm-smd/rpm-regulator-smpa4/regulator-s4"; | |
| pm8953_s7_level = "/soc/qcom,rpm-smd/rpm-regulator-smpa7/regulator-s7-level"; | |
| pm8953_s7_level_ao = "/soc/qcom,rpm-smd/rpm-regulator-smpa7/regulator-s7-level-ao"; | |
| pm8953_s7_level_so = "/soc/qcom,rpm-smd/rpm-regulator-smpa7/regulator-s7-level-so"; | |
| pm8953_l1 = "/soc/qcom,rpm-smd/rpm-regulator-ldoa1/regulator-l1"; | |
| pm8953_l2 = "/soc/qcom,rpm-smd/rpm-regulator-ldoa2/regulator-l2"; | |
| pm8953_l3 = "/soc/qcom,rpm-smd/rpm-regulator-ldoa3/regulator-l3"; | |
| pm8953_l5 = "/soc/qcom,rpm-smd/rpm-regulator-ldoa5/regulator-l5"; | |
| pm8953_l6 = "/soc/qcom,rpm-smd/rpm-regulator-ldoa6/regulator-l6"; | |
| pm8953_l7 = "/soc/qcom,rpm-smd/rpm-regulator-ldoa7/regulator-l7"; | |
| pm8953_l7_ao = "/soc/qcom,rpm-smd/rpm-regulator-ldoa7/regulator-l7-ao"; | |
| pm8953_l8 = "/soc/qcom,rpm-smd/rpm-regulator-ldoa8/regulator-l8"; | |
| pm8953_l9 = "/soc/qcom,rpm-smd/rpm-regulator-ldoa9/regulator-l9"; | |
| pm8953_l10 = "/soc/qcom,rpm-smd/rpm-regulator-ldoa10/regulator-l10"; | |
| pm8953_l11 = "/soc/qcom,rpm-smd/rpm-regulator-ldoa11/regulator-l11"; | |
| pm8953_l12 = "/soc/qcom,rpm-smd/rpm-regulator-ldoa12/regulator-l12"; | |
| pm8953_l13 = "/soc/qcom,rpm-smd/rpm-regulator-ldoa13/regulator-l13"; | |
| pm8953_l16 = "/soc/qcom,rpm-smd/rpm-regulator-ldoa16/regulator-l16"; | |
| pm8953_l17 = "/soc/qcom,rpm-smd/rpm-regulator-ldoa17/regulator-l17"; | |
| pm8953_l19 = "/soc/qcom,rpm-smd/rpm-regulator-ldoa19/regulator-l19"; | |
| pm8953_l22 = "/soc/qcom,rpm-smd/rpm-regulator-ldoa22/regulator-l22"; | |
| pm8953_l23 = "/soc/qcom,rpm-smd/rpm-regulator-ldoa23/regulator-l23"; | |
| clock_gcc = "/soc/qcom,gcc@1800000"; | |
| ad_hoc_bus = "/soc/ad-hoc-bus@580000"; | |
| fab_bimc = "/soc/ad-hoc-bus@580000/fab-bimc"; | |
| fab_pcnoc = "/soc/ad-hoc-bus@580000/fab-pcnoc"; | |
| fab_snoc = "/soc/ad-hoc-bus@580000/fab-snoc"; | |
| fab_snoc_mm = "/soc/ad-hoc-bus@580000/fab-snoc-mm"; | |
| mas_apps_proc = "/soc/ad-hoc-bus@580000/mas-apps-proc"; | |
| mas_oxili = "/soc/ad-hoc-bus@580000/mas-oxili"; | |
| mas_snoc_bimc_0 = "/soc/ad-hoc-bus@580000/mas-snoc-bimc-0"; | |
| mas_snoc_bimc_2 = "/soc/ad-hoc-bus@580000/mas-snoc-bimc-2"; | |
| mas_snoc_bimc_1 = "/soc/ad-hoc-bus@580000/mas-snoc-bimc-1"; | |
| mas_tcu_0 = "/soc/ad-hoc-bus@580000/mas-tcu-0"; | |
| mas_spdm = "/soc/ad-hoc-bus@580000/mas-spdm"; | |
| mas_blsp_1 = "/soc/ad-hoc-bus@580000/mas-blsp-1"; | |
| mas_blsp_2 = "/soc/ad-hoc-bus@580000/mas-blsp-2"; | |
| mas_usb3 = "/soc/ad-hoc-bus@580000/mas-usb3"; | |
| mas_crypto = "/soc/ad-hoc-bus@580000/mas-crypto"; | |
| mas_sdcc_1 = "/soc/ad-hoc-bus@580000/mas-sdcc-1"; | |
| mas_sdcc_2 = "/soc/ad-hoc-bus@580000/mas-sdcc-2"; | |
| mas_snoc_pcnoc = "/soc/ad-hoc-bus@580000/mas-snoc-pcnoc"; | |
| mas_qdss_bam = "/soc/ad-hoc-bus@580000/mas-qdss-bam"; | |
| mas_bimc_snoc = "/soc/ad-hoc-bus@580000/mas-bimc-snoc"; | |
| mas_jpeg = "/soc/ad-hoc-bus@580000/mas-jpeg"; | |
| mas_mdp = "/soc/ad-hoc-bus@580000/mas-mdp"; | |
| mas_pcnoc_snoc = "/soc/ad-hoc-bus@580000/mas-pcnoc-snoc"; | |
| mas_venus = "/soc/ad-hoc-bus@580000/mas-venus"; | |
| mas_vfe0 = "/soc/ad-hoc-bus@580000/mas-vfe0"; | |
| mas_vfe1 = "/soc/ad-hoc-bus@580000/mas-vfe1"; | |
| mas_cpp = "/soc/ad-hoc-bus@580000/mas-cpp"; | |
| mas_ipa = "/soc/ad-hoc-bus@580000/mas-ipa"; | |
| mas_qdss_etr = "/soc/ad-hoc-bus@580000/mas-qdss-etr"; | |
| pcnoc_m_0 = "/soc/ad-hoc-bus@580000/pcnoc-m-0"; | |
| pcnoc_m_1 = "/soc/ad-hoc-bus@580000/pcnoc-m-1"; | |
| pcnoc_int_1 = "/soc/ad-hoc-bus@580000/pcnoc-int-1"; | |
| pcnoc_int_2 = "/soc/ad-hoc-bus@580000/pcnoc-int-2"; | |
| pcnoc_s_0 = "/soc/ad-hoc-bus@580000/pcnoc-s-0"; | |
| pcnoc_s_1 = "/soc/ad-hoc-bus@580000/pcnoc-s-1"; | |
| pcnoc_s_2 = "/soc/ad-hoc-bus@580000/pcnoc-s-2"; | |
| pcnoc_s_3 = "/soc/ad-hoc-bus@580000/pcnoc-s-3"; | |
| pcnoc_s_4 = "/soc/ad-hoc-bus@580000/pcnoc-s-4"; | |
| pcnoc_s_6 = "/soc/ad-hoc-bus@580000/pcnoc-s-6"; | |
| pcnoc_s_7 = "/soc/ad-hoc-bus@580000/pcnoc-s-7"; | |
| pcnoc_s_8 = "/soc/ad-hoc-bus@580000/pcnoc-s-8"; | |
| pcnoc_s_9 = "/soc/ad-hoc-bus@580000/pcnoc-s-9"; | |
| qdss_int = "/soc/ad-hoc-bus@580000/qdss-int"; | |
| snoc_int_0 = "/soc/ad-hoc-bus@580000/snoc-int-0"; | |
| snoc_int_1 = "/soc/ad-hoc-bus@580000/snoc-int-1"; | |
| snoc_int_2 = "/soc/ad-hoc-bus@580000/snoc-int-2"; | |
| slv_ebi = "/soc/ad-hoc-bus@580000/slv-ebi"; | |
| slv_bimc_snoc = "/soc/ad-hoc-bus@580000/slv-bimc-snoc"; | |
| slv_spdm = "/soc/ad-hoc-bus@580000/slv-spdm"; | |
| slv_pdm = "/soc/ad-hoc-bus@580000/slv-pdm"; | |
| slv_tcsr = "/soc/ad-hoc-bus@580000/slv-tcsr"; | |
| slv_snoc_cfg = "/soc/ad-hoc-bus@580000/slv-snoc-cfg"; | |
| slv_tlmm = "/soc/ad-hoc-bus@580000/slv-tlmm"; | |
| slv_message_ram = "/soc/ad-hoc-bus@580000/slv-message-ram"; | |
| slv_blsp_1 = "/soc/ad-hoc-bus@580000/slv-blsp-1"; | |
| slv_blsp_2 = "/soc/ad-hoc-bus@580000/slv-blsp-2"; | |
| slv_prng = "/soc/ad-hoc-bus@580000/slv-prng"; | |
| slv_camera_ss_cfg = "/soc/ad-hoc-bus@580000/slv-camera-ss-cfg"; | |
| slv_disp_ss_cfg = "/soc/ad-hoc-bus@580000/slv-disp-ss-cfg"; | |
| slv_venus_cfg = "/soc/ad-hoc-bus@580000/slv-venus-cfg"; | |
| slv_gpu_cfg = "/soc/ad-hoc-bus@580000/slv-gpu-cfg"; | |
| slv_sdcc_1 = "/soc/ad-hoc-bus@580000/slv-sdcc-1"; | |
| slv_sdcc_2 = "/soc/ad-hoc-bus@580000/slv-sdcc-2"; | |
| slv_crypto_0_cfg = "/soc/ad-hoc-bus@580000/slv-crypto-0-cfg"; | |
| slv_pmic_arb = "/soc/ad-hoc-bus@580000/slv-pmic-arb"; | |
| slv_usb3 = "/soc/ad-hoc-bus@580000/slv-usb3"; | |
| slv_ipa_cfg = "/soc/ad-hoc-bus@580000/slv-ipa-cfg"; | |
| slv_tcu = "/soc/ad-hoc-bus@580000/slv-tcu"; | |
| slv_pcnoc_snoc = "/soc/ad-hoc-bus@580000/slv-pcnoc-snoc"; | |
| slv_kpss_ahb = "/soc/ad-hoc-bus@580000/slv-kpss-ahb"; | |
| slv_wcss = "/soc/ad-hoc-bus@580000/slv-wcss"; | |
| slv_snoc_bimc_0 = "/soc/ad-hoc-bus@580000/slv-snoc-bimc-0"; | |
| slv_snoc_bimc_1 = "/soc/ad-hoc-bus@580000/slv-snoc-bimc-1"; | |
| slv_snoc_bimc_2 = "/soc/ad-hoc-bus@580000/slv-snoc-bimc-2"; | |
| slv_imem = "/soc/ad-hoc-bus@580000/slv-imem"; | |
| slv_snoc_pcnoc = "/soc/ad-hoc-bus@580000/slv-snoc-pcnoc"; | |
| slv_qdss_stm = "/soc/ad-hoc-bus@580000/slv-qdss-stm"; | |
| slv_cats_0 = "/soc/ad-hoc-bus@580000/slv-cats-0"; | |
| slv_cats_1 = "/soc/ad-hoc-bus@580000/slv-cats-1"; | |
| slv_lpass = "/soc/ad-hoc-bus@580000/slv-lpass"; | |
| tlmm = "/soc/pinctrl@1000000"; | |
| uart_console_active = "/soc/pinctrl@1000000/pmx-uartconsole/uart_console_active"; | |
| uart_console_sleep = "/soc/pinctrl@1000000/pmx-uartconsole/uart_console_sleep"; | |
| uart1_console_active = "/soc/pinctrl@1000000/pmx-uartconsole/uart1_console_active"; | |
| uart1_console_sleep = "/soc/pinctrl@1000000/pmx-uartconsole/uart1_console_sleep"; | |
| reset_pa_active = "/soc/pinctrl@1000000/pmx_reset_pa_active/reset_pa_active"; | |
| reset_pa_suspend = "/soc/pinctrl@1000000/pmx_reset_pa_suspend/reset_pa_suspend"; | |
| cci0_active = "/soc/pinctrl@1000000/cci/cci0_active"; | |
| cci0_suspend = "/soc/pinctrl@1000000/cci/cci0_suspend"; | |
| cci1_active = "/soc/pinctrl@1000000/cci/cci1_active"; | |
| cci1_suspend = "/soc/pinctrl@1000000/cci/cci1_suspend"; | |
| cam_sensor_mclk0_default = "/soc/pinctrl@1000000/cam_sensor_mclk0_default"; | |
| cam_sensor_mclk0_sleep = "/soc/pinctrl@1000000/cam_sensor_mclk0_sleep"; | |
| cam_sensor_rear_default = "/soc/pinctrl@1000000/cam_sensor_rear_default"; | |
| cam_sensor_rear_sleep = "/soc/pinctrl@1000000/cam_sensor_rear_sleep"; | |
| cam_sensor_ir_cut_default = "/soc/pinctrl@1000000/cam_sensor_ir_cut_default"; | |
| cam_sensor_ir_cut_sleep = "/soc/pinctrl@1000000/cam_sensor_ir_cut_sleep"; | |
| cam_sensor_rear_vana = "/soc/pinctrl@1000000/cam_sensor_rear_vdig"; | |
| cam_sensor_rear_vana_sleep = "/soc/pinctrl@1000000/cam_sensor_rear_vdig_sleep"; | |
| cam_sensor_mclk1_default = "/soc/pinctrl@1000000/cam_sensor_mclk1_default"; | |
| cam_sensor_mclk1_sleep = "/soc/pinctrl@1000000/cam_sensor_mclk1_sleep"; | |
| cam_sensor_front_default = "/soc/pinctrl@1000000/cam_sensor_front_default"; | |
| cam_sensor_front_sleep = "/soc/pinctrl@1000000/cam_sensor_front_sleep"; | |
| cam_sensor_mclk2_default = "/soc/pinctrl@1000000/cam_sensor_mclk2_default"; | |
| cam_sensor_mclk2_sleep = "/soc/pinctrl@1000000/cam_sensor_mclk2_sleep"; | |
| cam_sensor_front1_default = "/soc/pinctrl@1000000/cam_sensor_front1_default"; | |
| cam_sensor_front1_sleep = "/soc/pinctrl@1000000/cam_sensor_front1_sleep"; | |
| pmx_adv7533_int = "/soc/pinctrl@1000000/pmx_adv7533_int"; | |
| adv7533_int_active = "/soc/pinctrl@1000000/pmx_adv7533_int/adv7533_int_active"; | |
| adv7533_int_suspend = "/soc/pinctrl@1000000/pmx_adv7533_int/adv7533_int_suspend"; | |
| pmx_mdss = "/soc/pinctrl@1000000/pmx_mdss"; | |
| mdss_dsi_active = "/soc/pinctrl@1000000/pmx_mdss/mdss_dsi_active"; | |
| mdss_dsi_suspend = "/soc/pinctrl@1000000/pmx_mdss/mdss_dsi_suspend"; | |
| mdss_dsi_gpio = "/soc/pinctrl@1000000/pmx_mdss/mdss_dsi_gpio"; | |
| mdss_te_active = "/soc/pinctrl@1000000/pmx_mdss_te/mdss_te_active"; | |
| mdss_te_suspend = "/soc/pinctrl@1000000/pmx_mdss_te/mdss_te_suspend"; | |
| ext_amp_ctrl_active = "/soc/pinctrl@1000000/ext_amp_ctrl/ext_amp_ctrl_active"; | |
| ext_amp_ctrl_sleep = "/soc/pinctrl@1000000/ext_amp_ctrl/ext_amp_ctrl_sleep"; | |
| cdc_dmic0_clk_act = "/soc/pinctrl@1000000/cdc_dmic0_clk_act_default"; | |
| cdc_dmic0_clk_sus = "/soc/pinctrl@1000000/cdc_dmic0_clk_sus_sleep"; | |
| cdc_dmic0_data_act = "/soc/pinctrl@1000000/cdc_dmic0_data_act_default"; | |
| cdc_dmic0_data_sus = "/soc/pinctrl@1000000/cdc_dmic0_data_sus_sleep"; | |
| sec_tlmm_lines_act = "/soc/pinctrl@1000000/sec-tlmm-lines/sec_tlmm_lines_act"; | |
| sec_tlmm_lines_sus = "/soc/pinctrl@1000000/sec-tlmm-lines/sec_tlmm_lines_sus"; | |
| hsuart_active = "/soc/pinctrl@1000000/default"; | |
| hsuart_sleep = "/soc/pinctrl@1000000/sleep"; | |
| blsp2_uart0_active = "/soc/pinctrl@1000000/blsp2_uart0_active"; | |
| blsp2_uart0_sleep = "/soc/pinctrl@1000000/blsp2_uart0_sleep"; | |
| blsp2_uart1_active = "/soc/pinctrl@1000000/blsp2_uart1_active"; | |
| blsp2_uart1_sleep = "/soc/pinctrl@1000000/blsp2_uart1_sleep"; | |
| sdc1_clk_on = "/soc/pinctrl@1000000/sdc1_clk_on"; | |
| sdc1_clk_off = "/soc/pinctrl@1000000/sdc1_clk_off"; | |
| sdc1_cmd_on = "/soc/pinctrl@1000000/sdc1_cmd_on"; | |
| sdc1_cmd_off = "/soc/pinctrl@1000000/sdc1_cmd_off"; | |
| sdc1_data_on = "/soc/pinctrl@1000000/sdc1_data_on"; | |
| sdc1_data_off = "/soc/pinctrl@1000000/sdc1_data_off"; | |
| sdc1_rclk_on = "/soc/pinctrl@1000000/sdc1_rclk_on"; | |
| sdc1_rclk_off = "/soc/pinctrl@1000000/sdc1_rclk_off"; | |
| sdc2_clk_on = "/soc/pinctrl@1000000/sdc2_clk_on"; | |
| sdc2_clk_off = "/soc/pinctrl@1000000/sdc2_clk_off"; | |
| sdc2_cmd_on = "/soc/pinctrl@1000000/sdc2_cmd_on"; | |
| sdc2_cmd_off = "/soc/pinctrl@1000000/sdc2_cmd_off"; | |
| sdc2_data_on = "/soc/pinctrl@1000000/sdc2_data_on"; | |
| sdc2_data_off = "/soc/pinctrl@1000000/sdc2_data_off"; | |
| sdc2_cd_on = "/soc/pinctrl@1000000/cd_on"; | |
| sdc2_cd_off = "/soc/pinctrl@1000000/cd_off"; | |
| i2c_1_active = "/soc/pinctrl@1000000/i2c_1/i2c_1_active"; | |
| i2c_1_sleep = "/soc/pinctrl@1000000/i2c_1/i2c_1_sleep"; | |
| i2c_2_active = "/soc/pinctrl@1000000/i2c_2/i2c_2_active"; | |
| i2c_2_sleep = "/soc/pinctrl@1000000/i2c_2/i2c_2_sleep"; | |
| i2c_3_active = "/soc/pinctrl@1000000/i2c_3/i2c_3_active"; | |
| i2c_3_sleep = "/soc/pinctrl@1000000/i2c_3/i2c_3_sleep"; | |
| i2c_5_active = "/soc/pinctrl@1000000/i2c_5/i2c_5_active"; | |
| i2c_5_sleep = "/soc/pinctrl@1000000/i2c_5/i2c_5_sleep"; | |
| nfc_int_active = "/soc/pinctrl@1000000/nfc/nfc_int_active"; | |
| nfc_int_suspend = "/soc/pinctrl@1000000/nfc/nfc_int_suspend"; | |
| nfc_disable_active = "/soc/pinctrl@1000000/nfc/nfc_disable_active"; | |
| nfc_disable_suspend = "/soc/pinctrl@1000000/nfc/nfc_disable_suspend"; | |
| wcnss_default = "/soc/pinctrl@1000000/wcnss_pmux_5wire/wcnss_default"; | |
| wcnss_sleep = "/soc/pinctrl@1000000/wcnss_pmux_5wire/wcnss_sleep"; | |
| wcnss_pmux_gpio = "/soc/pinctrl@1000000/wcnss_pmux_gpio"; | |
| wcnss_gpio_default = "/soc/pinctrl@1000000/wcnss_pmux_gpio/wcnss_gpio_default"; | |
| wcd_intr_default = "/soc/pinctrl@1000000/wcd9xxx_intr/wcd_intr_default"; | |
| cdc_reset_sleep = "/soc/pinctrl@1000000/cdc_reset_ctrl/cdc_reset_sleep"; | |
| cdc_reset_active = "/soc/pinctrl@1000000/cdc_reset_ctrl/cdc_reset_active"; | |
| cdc_mclk2_sleep = "/soc/pinctrl@1000000/cdc_mclk2_pin/cdc_mclk2_sleep"; | |
| cdc_mclk2_active = "/soc/pinctrl@1000000/cdc_mclk2_pin/cdc_mclk2_active"; | |
| cdc_pdm_lines_2_act = "/soc/pinctrl@1000000/cdc-pdm-2-lines/pdm_lines_2_on"; | |
| cdc_pdm_lines_2_sus = "/soc/pinctrl@1000000/cdc-pdm-2-lines/pdm_lines_2_off"; | |
| cdc_pdm_lines_act = "/soc/pinctrl@1000000/cdc-pdm-lines/pdm_lines_on"; | |
| cdc_pdm_lines_sus = "/soc/pinctrl@1000000/cdc-pdm-lines/pdm_lines_off"; | |
| cdc_pdm_comp_lines_act = "/soc/pinctrl@1000000/cdc-pdm-comp-lines/pdm_comp_lines_on"; | |
| cdc_pdm_comp_lines_sus = "/soc/pinctrl@1000000/cdc-pdm-comp-lines/pdm_comp_lines_off"; | |
| cross_conn_det_act = "/soc/pinctrl@1000000/cross-conn-det/lines_on"; | |
| cross_conn_det_sus = "/soc/pinctrl@1000000/cross-conn-det/lines_off"; | |
| wsa_vi_on = "/soc/pinctrl@1000000/wsa-vi/wsa_vi_on"; | |
| wsa_vi_off = "/soc/pinctrl@1000000/wsa-vi/wsa_vi_off"; | |
| wsa_reset_on = "/soc/pinctrl@1000000/wsa_reset/wsa_reset_on"; | |
| wsa_reset_off = "/soc/pinctrl@1000000/wsa_reset/wsa_reset_off"; | |
| wsa_clk_on = "/soc/pinctrl@1000000/wsa_clk/wsa_clk_on"; | |
| wsa_clk_off = "/soc/pinctrl@1000000/wsa_clk/wsa_clk_off"; | |
| pri_tlmm_lines_act = "/soc/pinctrl@1000000/pri-tlmm-lines/pri_tlmm_lines_act"; | |
| pri_tlmm_lines_sus = "/soc/pinctrl@1000000/pri-tlmm-lines/pri_tlmm_lines_sus"; | |
| pri_tlmm_ws_act = "/soc/pinctrl@1000000/pri-tlmm-ws-lines/pri_tlmm_ws_act"; | |
| pri_tlmm_ws_sus = "/soc/pinctrl@1000000/pri-tlmm-ws-lines/pri_tlmm_ws_sus"; | |
| spi3_default = "/soc/pinctrl@1000000/spi3/spi3_default"; | |
| spi3_sleep = "/soc/pinctrl@1000000/spi3/spi3_sleep"; | |
| spi3_cs0_active = "/soc/pinctrl@1000000/spi3/cs0_active"; | |
| spi3_cs0_sleep = "/soc/pinctrl@1000000/spi3/cs0_sleep"; | |
| spi6_default = "/soc/pinctrl@1000000/spi6/spi6_default"; | |
| spi6_sleep = "/soc/pinctrl@1000000/spi6/spi6_sleep"; | |
| spi6_cs0_active = "/soc/pinctrl@1000000/spi6/cs0_active"; | |
| spi6_cs0_sleep = "/soc/pinctrl@1000000/spi6/cs0_sleep"; | |
| ts_int_default = "/soc/pinctrl@1000000/ts_int_default"; | |
| ts_int_output_high = "/soc/pinctrl@1000000/ts_int_output_high"; | |
| ts_int_output_low = "/soc/pinctrl@1000000/ts_int_output_low"; | |
| ts_int_input = "/soc/pinctrl@1000000/ts_int_input"; | |
| ts_rst_default = "/soc/pinctrl@1000000/ts_rst_default"; | |
| ts_rst_output_high = "/soc/pinctrl@1000000/ts_rst_output_high"; | |
| ts_rst_output_low = "/soc/pinctrl@1000000/ts_rst_output_low"; | |
| ts_rst_input = "/soc/pinctrl@1000000/ts_rst_input"; | |
| ts_int_active = "/soc/pinctrl@1000000/pmx_ts_int_active/ts_int_active"; | |
| ts_int_suspend = "/soc/pinctrl@1000000/pmx_ts_int_suspend/ts_int_suspend"; | |
| ts_reset_active = "/soc/pinctrl@1000000/pmx_ts_reset_active/ts_reset_active"; | |
| ts_reset_suspend = "/soc/pinctrl@1000000/pmx_ts_reset_suspend/ts_reset_suspend"; | |
| ts_as_int = "/soc/pinctrl@1000000/pmx_ts_int_release/ts_as_int"; | |
| ts_as_reset = "/soc/pinctrl@1000000/pmx_ts_reset_release/ts_as_reset"; | |
| ts_release = "/soc/pinctrl@1000000/pmx_ts_release/ts_release"; | |
| gpio_key_active = "/soc/pinctrl@1000000/tlmm_gpio_key/gpio_key_active"; | |
| gpio_key_suspend = "/soc/pinctrl@1000000/tlmm_gpio_key/gpio_key_suspend"; | |
| qdsd_clk_sdcard = "/soc/pinctrl@1000000/pmx_qdsd_clk/clk_sdcard"; | |
| qdsd_clk_trace = "/soc/pinctrl@1000000/pmx_qdsd_clk/clk_trace"; | |
| qdsd_clk_swdtrc = "/soc/pinctrl@1000000/pmx_qdsd_clk/clk_swdtrc"; | |
| qdsd_clk_spmi = "/soc/pinctrl@1000000/pmx_qdsd_clk/clk_spmi"; | |
| qdsd_cmd_sdcard = "/soc/pinctrl@1000000/pmx_qdsd_cmd/cmd_sdcard"; | |
| qdsd_cmd_trace = "/soc/pinctrl@1000000/pmx_qdsd_cmd/cmd_trace"; | |
| qdsd_cmd_swduart = "/soc/pinctrl@1000000/pmx_qdsd_cmd/cmd_uart"; | |
| qdsd_cmd_swdtrc = "/soc/pinctrl@1000000/pmx_qdsd_cmd/cmd_swdtrc"; | |
| qdsd_cmd_jtag = "/soc/pinctrl@1000000/pmx_qdsd_cmd/cmd_jtag"; | |
| qdsd_cmd_spmi = "/soc/pinctrl@1000000/pmx_qdsd_cmd/cmd_spmi"; | |
| qdsd_data0_sdcard = "/soc/pinctrl@1000000/pmx_qdsd_data0/data0_sdcard"; | |
| qdsd_data0_trace = "/soc/pinctrl@1000000/pmx_qdsd_data0/data0_trace"; | |
| qdsd_data0_swduart = "/soc/pinctrl@1000000/pmx_qdsd_data0/data0_uart"; | |
| qdsd_data0_swdtrc = "/soc/pinctrl@1000000/pmx_qdsd_data0/data0_swdtrc"; | |
| qdsd_data0_jtag = "/soc/pinctrl@1000000/pmx_qdsd_data0/data0_jtag"; | |
| qdsd_data0_spmi = "/soc/pinctrl@1000000/pmx_qdsd_data0/data0_spmi"; | |
| qdsd_data1_sdcard = "/soc/pinctrl@1000000/pmx_qdsd_data1/data1_sdcard"; | |
| qdsd_data1_trace = "/soc/pinctrl@1000000/pmx_qdsd_data1/data1_trace"; | |
| qdsd_data1_swduart = "/soc/pinctrl@1000000/pmx_qdsd_data1/data1_uart"; | |
| qdsd_data1_swdtrc = "/soc/pinctrl@1000000/pmx_qdsd_data1/data1_swdtrc"; | |
| qdsd_data1_jtag = "/soc/pinctrl@1000000/pmx_qdsd_data1/data1_jtag"; | |
| qdsd_data2_sdcard = "/soc/pinctrl@1000000/pmx_qdsd_data2/data2_sdcard"; | |
| qdsd_data2_trace = "/soc/pinctrl@1000000/pmx_qdsd_data2/data2_trace"; | |
| qdsd_data2_swduart = "/soc/pinctrl@1000000/pmx_qdsd_data2/data2_uart"; | |
| qdsd_data2_swdtrc = "/soc/pinctrl@1000000/pmx_qdsd_data2/data2_swdtrc"; | |
| qdsd_data2_jtag = "/soc/pinctrl@1000000/pmx_qdsd_data2/data2_jtag"; | |
| qdsd_data3_sdcard = "/soc/pinctrl@1000000/pmx_qdsd_data3/data3_sdcard"; | |
| qdsd_data3_trace = "/soc/pinctrl@1000000/pmx_qdsd_data3/data3_trace"; | |
| qdsd_data3_swduart = "/soc/pinctrl@1000000/pmx_qdsd_data3/data3_uart"; | |
| qdsd_data3_swdtrc = "/soc/pinctrl@1000000/pmx_qdsd_data3/data3_swdtrc"; | |
| qdsd_data3_jtag = "/soc/pinctrl@1000000/pmx_qdsd_data3/data3_jtag"; | |
| qdsd_data3_spmi = "/soc/pinctrl@1000000/pmx_qdsd_data3/data3_spmi"; | |
| ssusb_mode_sel = "/soc/pinctrl@1000000/ssusb_mode_sel"; | |
| fp_reset_high = "/soc/pinctrl@1000000/fp_reset/fp_reset_high"; | |
| fp_reset_low = "/soc/pinctrl@1000000/fp_reset/fp_reset_low"; | |
| fp_irq_active = "/soc/pinctrl@1000000/fp_irq/fp_irq_active"; | |
| fp_ldo_2v8_en = "/soc/pinctrl@1000000/fp_ldo_en/fp_ldo_2v8_en"; | |
| ant_check_irq_state = "/soc/pinctrl@1000000/ant_check_irq/ant_check_irq_state"; | |
| sdhc_1 = "/soc/sdhci@7824900"; | |
| cpuss_dump = "/soc/cpuss_dump"; | |
| tmc_etr = "/soc/tmc@6028000"; | |
| tmc_etr_in_replicator = "/soc/tmc@6028000/port/endpoint"; | |
| tmc_etf = "/soc/tmc@6027000"; | |
| tmc_etf_out_replicator = "/soc/tmc@6027000/ports/port@0/endpoint"; | |
| tmc_etf_in_funnel_in0 = "/soc/tmc@6027000/ports/port@1/endpoint"; | |
| replicator = "/soc/replicator@6026000"; | |
| replicator_out_tmc_etr = "/soc/replicator@6026000/ports/port@0/endpoint"; | |
| replicator_in_tmc_etf = "/soc/replicator@6026000/ports/port@1/endpoint"; | |
| funnel_in0 = "/soc/funnel@6021000"; | |
| funnel_in0_out_tmc_etf = "/soc/funnel@6021000/ports/port@0/endpoint"; | |
| funnel_in0_in_stm = "/soc/funnel@6021000/ports/port@1/endpoint"; | |
| funnel_in0_in_tpda = "/soc/funnel@6021000/ports/port@2/endpoint"; | |
| funnel_in0_in_funnel_center = "/soc/funnel@6021000/ports/port@3/endpoint"; | |
| funnel_in0_in_funnel_right = "/soc/funnel@6021000/ports/port@4/endpoint"; | |
| funnel_in0_in_funnel_mm = "/soc/funnel@6021000/ports/port@5/endpoint"; | |
| funnel_center = "/soc/funnel@6100000"; | |
| funnel_center_out_funnel_in0 = "/soc/funnel@6100000/ports/port@0/endpoint"; | |
| funnel_center_in_rpm_etm0 = "/soc/funnel@6100000/ports/port@1/endpoint"; | |
| funnel_center_in_dbgui = "/soc/funnel@6100000/ports/port@2/endpoint"; | |
| funnel_right = "/soc/funnel@6120000"; | |
| funnel_right_out_funnel_in0 = "/soc/funnel@6120000/ports/port@0/endpoint"; | |
| funnel_right_in_modem_etm1 = "/soc/funnel@6120000/ports/port@1/endpoint"; | |
| funnel_right_in_modem_etm0 = "/soc/funnel@6120000/ports/port@2/endpoint"; | |
| funnel_right_in_funnel_apss1 = "/soc/funnel@6120000/ports/port@3/endpoint"; | |
| funnel_mm = "/soc/funnel@6130000"; | |
| funnel_mm_out_funnel_in0 = "/soc/funnel@6130000/ports/port@0/endpoint"; | |
| funnel_mm_in_wcn_etm0 = "/soc/funnel@6130000/ports/port@1/endpoint"; | |
| funnel_mm_in_funnel_cam = "/soc/funnel@6130000/ports/port@2/endpoint"; | |
| funnel_mm_in_audio_etm0 = "/soc/funnel@6130000/ports/port@3/endpoint"; | |
| funnel_mm_in_gfx = "/soc/funnel@6130000/ports/port@4/endpoint"; | |
| funnel_cam = "/soc/funnel@6132000"; | |
| funnel_cam_out_funnel_mm = "/soc/funnel@6132000/port/endpoint"; | |
| funnel_apss1 = "/soc/funnel@61d0000"; | |
| funnel_apss1_out_funnel_right = "/soc/funnel@61d0000/ports/port@0/endpoint"; | |
| funnel_apss1_in_funnel_apss0 = "/soc/funnel@61d0000/ports/port@1/endpoint"; | |
| funnel_apss0 = "/soc/funnel@61a1000"; | |
| funnel_apss0_out_funnel_apss1 = "/soc/funnel@61a1000/ports/port@0/endpoint"; | |
| funnel_apss0_in_etm0 = "/soc/funnel@61a1000/ports/port@1/endpoint"; | |
| funnel_apss0_in_etm1 = "/soc/funnel@61a1000/ports/port@2/endpoint"; | |
| funnel_apss0_in_etm2 = "/soc/funnel@61a1000/ports/port@3/endpoint"; | |
| funnel_apss0_in_etm3 = "/soc/funnel@61a1000/ports/port@4/endpoint"; | |
| funnel_apss0_in_etm4 = "/soc/funnel@61a1000/ports/port@5/endpoint"; | |
| funnel_apss0_in_etm5 = "/soc/funnel@61a1000/ports/port@6/endpoint"; | |
| funnel_apss0_in_etm6 = "/soc/funnel@61a1000/ports/port@7/endpoint"; | |
| funnel_apss0_in_etm7 = "/soc/funnel@61a1000/ports/port@8/endpoint"; | |
| etm0 = "/soc/etm@619c000"; | |
| etm0_out_funnel_apss0 = "/soc/etm@619c000/port/endpoint"; | |
| etm1 = "/soc/etm@619d000"; | |
| etm1_out_funnel_apss0 = "/soc/etm@619d000/port/endpoint"; | |
| etm2 = "/soc/etm@619e000"; | |
| etm2_out_funnel_apss0 = "/soc/etm@619e000/port/endpoint"; | |
| etm3 = "/soc/etm@619f000"; | |
| etm3_out_funnel_apss0 = "/soc/etm@619f000/port/endpoint"; | |
| etm7 = "/soc/etm@61bf000"; | |
| etm7_out_funnel_apss0 = "/soc/etm@61bf000/port/endpoint"; | |
| stm = "/soc/stm@6002000"; | |
| stm_out_funnel_in0 = "/soc/stm@6002000/port/endpoint"; | |
| cti0 = "/soc/cti@6010000"; | |
| cti1 = "/soc/cti@6011000"; | |
| cti2 = "/soc/cti@6012000"; | |
| cti3 = "/soc/cti@6013000"; | |
| cti4 = "/soc/cti@6014000"; | |
| cti5 = "/soc/cti@6015000"; | |
| cti6 = "/soc/cti@6016000"; | |
| cti7 = "/soc/cti@6017000"; | |
| cti8 = "/soc/cti@6018000"; | |
| cti9 = "/soc/cti@6019000"; | |
| cti10 = "/soc/cti@601a000"; | |
| cti11 = "/soc/cti@601b000"; | |
| cti12 = "/soc/cti@601c000"; | |
| cti13 = "/soc/cti@601d000"; | |
| cti14 = "/soc/cti@601e000"; | |
| cti15 = "/soc/cti@601f000"; | |
| cti_cpu0 = "/soc/cti@6198000"; | |
| cti_cpu1 = "/soc/cti@6199000"; | |
| cti_cpu2 = "/soc/cti@619a000"; | |
| cti_cpu3 = "/soc/cti@619b000"; | |
| cti_cpu6 = "/soc/cti@61b9000"; | |
| cti_modem_cpu0 = "/soc/cti@6128000"; | |
| cti_modem_cpu1 = "/soc/cti@6124000"; | |
| cti_video_cpu0 = "/soc/cti@6134000"; | |
| cti_wcn_cpu0 = "/soc/cti@6139000"; | |
| cti_audio_cpu0 = "/soc/cti@613c000"; | |
| cti_rpm_cpu0 = "/soc/cti@610c000"; | |
| wcn_etm0_out_funnel_mm = "/soc/wcn_etm0/port/endpoint"; | |
| rpm_etm0_out_funnel_center = "/soc/rpm_etm0/port/endpoint"; | |
| audio_etm0_out_funnel_mm = "/soc/audio_etm0/port/endpoint"; | |
| modem_etm0_out_funnel_right = "/soc/modem_etm0/port/endpoint"; | |
| modem_etm1_out_funnel_right = "/soc/modem_etm1/port/endpoint"; | |
| csr = "/soc/csr@6001000"; | |
| dbgui = "/soc/dbgui@6108000"; | |
| dbgui_out_funnel_center = "/soc/dbgui@6108000/port/endpoint"; | |
| tpda = "/soc/tpda@6003000"; | |
| tpda_out_funnel_in0 = "/soc/tpda@6003000/ports/port@0/endpoint"; | |
| tpda_in_tpdm_dcc = "/soc/tpda@6003000/ports/port@1/endpoint"; | |
| tpdm_dcc = "/soc/tpdm@6110000"; | |
| tpdm_dcc_out_tpda = "/soc/tpdm@6110000/port/endpoint"; | |
| hwevent = "/soc/hwevent@6101000"; | |
| kgsl_smmu = "/soc/arm,smmu-kgsl@1c40000"; | |
| apps_iommu = "/soc/qcom,iommu@1e00000"; | |
| pil_gpu = "/soc/qcom,kgsl-hyp"; | |
| msm_bus = "/soc/qcom,kgsl-busmon"; | |
| gpubw = "/soc/qcom,gpubw"; | |
| msm_gpu = "/soc/qcom,kgsl-3d0@1c00000"; | |
| gfx_out_funnel_mm = "/soc/qcom,kgsl-3d0@1c00000/qcom,gpu-coresights/qcom,gpu-coresight@0/port/endpoint"; | |
| kgsl_msm_iommu = "/soc/qcom,kgsl-iommu@1c40000"; | |
| gfx3d_user = "/soc/qcom,kgsl-iommu@1c40000/gfx3d_user"; | |
| gfx3d_secure = "/soc/qcom,kgsl-iommu@1c40000/gfx3d_secure"; | |
| mdss_mdp = "/soc/qcom,mdss_mdp@1a00000"; | |
| smmu_mdp_unsec = "/soc/qcom,mdss_mdp@1a00000/qcom,smmu_mdp_unsec_cb"; | |
| smmu_mdp_sec = "/soc/qcom,mdss_mdp@1a00000/qcom,smmu_mdp_sec_cb"; | |
| mdss_fb0 = "/soc/qcom,mdss_mdp@1a00000/qcom,mdss_fb_primary"; | |
| mdss_fb1 = "/soc/qcom,mdss_mdp@1a00000/qcom,mdss_fb_wfd"; | |
| mdss_fb2 = "/soc/qcom,mdss_mdp@1a00000/qcom,mdss_fb_secondary"; | |
| mdss_dsi = "/soc/qcom,mdss_dsi@0"; | |
| mdss_dsi0 = "/soc/qcom,mdss_dsi@0/qcom,mdss_dsi_ctrl0@1a94000"; | |
| mdss_dsi1 = "/soc/qcom,mdss_dsi@0/qcom,mdss_dsi_ctrl1@1a96000"; | |
| mdss_rotator = "/soc/qcom,mdss_rotator"; | |
| mdss_dsi0_pll = "/soc/qcom,mdss_dsi_pll@994400"; | |
| mdss_dsi1_pll = "/soc/qcom,mdss_dsi_pll@996400"; | |
| smp2pgpio_smp2p_15_in = "/soc/qcom,smp2pgpio-smp2p-15-in"; | |
| smp2pgpio_smp2p_15_out = "/soc/qcom,smp2pgpio-smp2p-15-out"; | |
| smp2pgpio_smp2p_1_in = "/soc/qcom,smp2pgpio-smp2p-1-in"; | |
| smp2pgpio_smp2p_1_out = "/soc/qcom,smp2pgpio-smp2p-1-out"; | |
| smp2pgpio_smp2p_4_in = "/soc/qcom,smp2pgpio-smp2p-4-in"; | |
| smp2pgpio_smp2p_4_out = "/soc/qcom,smp2pgpio-smp2p-4-out"; | |
| smp2pgpio_smp2p_2_in = "/soc/qcom,smp2pgpio-smp2p-2-in"; | |
| smp2pgpio_smp2p_2_out = "/soc/qcom,smp2pgpio-smp2p-2-out"; | |
| smp2pgpio_ssr_smp2p_1_in = "/soc/qcom,smp2pgpio-ssr-smp2p-1-in"; | |
| smp2pgpio_ssr_smp2p_1_out = "/soc/qcom,smp2pgpio-ssr-smp2p-1-out"; | |
| smp2pgpio_ssr_smp2p_2_in = "/soc/qcom,smp2pgpio-ssr-smp2p-2-in"; | |
| smp2pgpio_ssr_smp2p_2_out = "/soc/qcom,smp2pgpio-ssr-smp2p-2-out"; | |
| smp2pgpio_ssr_smp2p_4_in = "/soc/qcom,smp2pgpio-ssr-smp2p-4-in"; | |
| smp2pgpio_ssr_smp2p_4_out = "/soc/qcom,smp2pgpio-ssr-smp2p-4-out"; | |
| dcc = "/soc/dcc@b3000"; | |
| apc_apm = "/soc/apm@b111000"; | |
| intc = "/soc/interrupt-controller@b000000"; | |
| wakegic = "/soc/wake-gic@601d4"; | |
| wakegpio = "/soc/wake-gpio"; | |
| thermal_zones = "/soc/thermal-zones"; | |
| pm8953_trip0 = "/soc/thermal-zones/pm8953_tz/trips/pm8953-trip0"; | |
| pm8953_trip1 = "/soc/thermal-zones/pm8953_tz/trips/pm8953-trip1"; | |
| pm8953_trip2 = "/soc/thermal-zones/pm8953_tz/trips/pm8953-trip2"; | |
| pop_trip = "/soc/thermal-zones/pop-mem-step/trips/pop-trip"; | |
| apc1_cpu0_trip = "/soc/thermal-zones/apc1-cpu0-step/trips/apc1-cpu0-trip"; | |
| apc1_cpu1_trip = "/soc/thermal-zones/apc1-cpu1-step/trips/apc1-cpu1-trip"; | |
| apc1_cpu2_trip = "/soc/thermal-zones/apc1-cpu2-step/trips/apc1-cpu2-trip"; | |
| apc1_cpu3_trip = "/soc/thermal-zones/apc1-cpu3-step/trips/apc1-cpu3-trip"; | |
| mdm_core_trip = "/soc/thermal-zones/mdm-core-lowf/trips/mdm-core-trip"; | |
| qdsp_trip = "/soc/thermal-zones/qdsp-lowf/trips/qdsp-trip"; | |
| sdm632_camera_trip = "/soc/thermal-zones/camera-lowf/trips/camera-trip"; | |
| cpu4_trip = "/soc/thermal-zones/apc1-cpu0-lowf/trips/apc1-cpu0-trip"; | |
| cpu5_trip = "/soc/thermal-zones/apc1-cpu1-lowf/trips/apc1-cpu0-trip"; | |
| cpu6_trip = "/soc/thermal-zones/apc1-cpu2-lowf/trips/apc1-cpu2-trip"; | |
| cpu7_trip = "/soc/thermal-zones/apc1-cpu3-lowf/trips/apc1-cpu3-trip"; | |
| sdm632_gpu0_trip = "/soc/thermal-zones/gpu0-lowf/trips/gpu0-trip"; | |
| quiet_batt_trip1 = "/soc/thermal-zones/quiet-therm-step/trips/quiet_batt-trip1"; | |
| quiet_batt_trip2 = "/soc/thermal-zones/quiet-therm-step/trips/quiet_batt-trip2"; | |
| quiet_batt_trip3 = "/soc/thermal-zones/quiet-therm-step/trips/quiet_batt-trip3"; | |
| quiet_cpus_trip = "/soc/thermal-zones/quiet-therm-step/trips/quiet_cpus-trip"; | |
| quiet_modem_trip0 = "/soc/thermal-zones/quiet-therm-step/trips/quiet_modem-trip0"; | |
| quiet_batt_trip4 = "/soc/thermal-zones/quiet-therm-step/trips/quiet_batt-trip4"; | |
| quiet_modem_trip1 = "/soc/thermal-zones/quiet-therm-step/trips/quiet_modem-trip1"; | |
| quiet_modem_trip2 = "/soc/thermal-zones/quiet-therm-step/trips/quiet_modem-trip2"; | |
| sdm632_gpu_trip0 = "/soc/thermal-zones/gpu0-step/trips/gpu-trip0"; | |
| sdm632_cpu_trip = "/soc/thermal-zones/hepta-cpu-max-step/trips/cpu-trip"; | |
| cpuss0_trip = "/soc/thermal-zones/cpuss0-step/trips/cpuss0-trip"; | |
| video_trip = "/soc/thermal-zones/video-lowf/trips/video-trip"; | |
| sdm632_cpuss1_trip = "/soc/thermal-zones/apc1-mhm-low/trips/cpuss1-trip"; | |
| sdm632_cpuss0_trip = "/soc/thermal-zones/apc1-l2-low/trips/cpuss0-trip"; | |
| sdm632_cpuss3_trip = "/soc/thermal-zones/cpuss0-lowf/trips/cpuss3-trip"; | |
| pmi632_ibat_lvl0 = "/soc/thermal-zones/pmi-ibat-lvl0/trips/ibat-lvl0"; | |
| pmi632_vbat_lvl0 = "/soc/thermal-zones/pmi-vbat-lvl0/trips/vbat-lvl0"; | |
| pmi632_low_soc = "/soc/thermal-zones/soc/trips/low-soc"; | |
| pmi632_tz_trip0 = "/soc/thermal-zones/pmi632_tz/trips/pmi632-trip0"; | |
| pmi632_tz_trip1 = "/soc/thermal-zones/pmi632_tz/trips/pmi632-trip1"; | |
| pmi632_tz_trip2 = "/soc/thermal-zones/pmi632_tz/trips/pmi632-trip2"; | |
| tsens0 = "/soc/tsens@4a8000"; | |
| qcom_seecom = "/soc/qseecom@84A00000"; | |
| qcom_tzlog = "/soc/tz-log@08600720"; | |
| qcom_rng = "/soc/qrng@e3000"; | |
| qcom_crypto = "/soc/qcrypto@720000"; | |
| qcom_cedev = "/soc/qcedev@720000"; | |
| blsp1_uart0 = "/soc/serial@78af000"; | |
| blsp1_uart1 = "/soc/uart@78b0000"; | |
| blsp2_uart0 = "/soc/uart@7aef000"; | |
| blsp2_uart1 = "/soc/uart@7af0000"; | |
| blsp1_serial1 = "/soc/serial@78b0000"; | |
| dma_blsp1 = "/soc/qcom,sps-dma@7884000"; | |
| dma_blsp2 = "/soc/qcom,sps-dma@7ac4000"; | |
| spi_3 = "/soc/spi@78b7000"; | |
| spi_6 = "/soc/spi@7af6000"; | |
| i2c_1 = "/soc/i2c@78b5000"; | |
| i2c_2 = "/soc/i2c@78b6000"; | |
| wsa881x_i2c_f = "/soc/i2c@78b6000/wsa881x-i2c-codec@f"; | |
| wsa881x_i2c_45 = "/soc/i2c@78b6000/wsa881x-i2c-codec@45"; | |
| i2c_3 = "/soc/i2c@78b7000"; | |
| i2c_5 = "/soc/i2c@7af5000"; | |
| slim_msm = "/soc/slim@c140000"; | |
| wcd9335 = "/soc/slim@c140000/tasha_codec"; | |
| wsa881x_211 = "/soc/slim@c140000/tasha_codec/swr_master/wsa881x@20170211"; | |
| wsa881x_212 = "/soc/slim@c140000/tasha_codec/swr_master/wsa881x@20170212"; | |
| wsa881x_213 = "/soc/slim@c140000/tasha_codec/swr_master/wsa881x@21170213"; | |
| wsa881x_214 = "/soc/slim@c140000/tasha_codec/swr_master/wsa881x@21170214"; | |
| dai_slim = "/soc/slim@c140000/msm_dai_slim"; | |
| clock_gcc_mdss = "/soc/qcom,gcc-mdss@1800000"; | |
| clock_debug = "/soc/qcom,cc-debug@1874000"; | |
| clock_gcc_gfx = "/soc/qcom,gcc-gfx@1800000"; | |
| clock_cpu = "/soc/qcom,cpu-clock-8953@b116000"; | |
| msm_cpufreq = "/soc/qcom,msm-cpufreq"; | |
| cpubw = "/soc/qcom,cpubw"; | |
| mincpubw = "/soc/qcom,mincpubw"; | |
| cpubw_compute = "/soc/qcom,cpubw-compute"; | |
| mincpubw_compute = "/soc/qcom,mincpubw-compute"; | |
| smdtty_apps_fm = "/soc/qcom,smdtty/qcom,smdtty-apps-fm"; | |
| smdtty_apps_riva_bt_acl = "/soc/qcom,smdtty/smdtty-apps-riva-bt-acl"; | |
| smdtty_apps_riva_bt_cmd = "/soc/qcom,smdtty/qcom,smdtty-apps-riva-bt-cmd"; | |
| smdtty_mbalbridge = "/soc/qcom,smdtty/qcom,smdtty-mbalbridge"; | |
| smdtty_apps_riva_ant_cmd = "/soc/qcom,smdtty/smdtty-apps-riva-ant-cmd"; | |
| smdtty_apps_riva_ant_data = "/soc/qcom,smdtty/smdtty-apps-riva-ant-data"; | |
| smdtty_data1 = "/soc/qcom,smdtty/qcom,smdtty-data1"; | |
| smdtty_data4 = "/soc/qcom,smdtty/qcom,smdtty-data4"; | |
| smdtty_data11 = "/soc/qcom,smdtty/qcom,smdtty-data11"; | |
| smdtty_data21 = "/soc/qcom,smdtty/qcom,smdtty-data21"; | |
| smdtty_loopback = "/soc/qcom,smdtty/smdtty-loopback"; | |
| wdog = "/soc/qcom,wdt@b017000"; | |
| sn_fuse = "/soc/snfuse@a4128"; | |
| jtag_mm0 = "/soc/jtagmm@619c000"; | |
| jtag_mm1 = "/soc/jtagmm@619d000"; | |
| jtag_mm2 = "/soc/jtagmm@619e000"; | |
| jtag_mm3 = "/soc/jtagmm@619f000"; | |
| jtag_mm4 = "/soc/jtagmm@61bc000"; | |
| jtag_mm5 = "/soc/jtagmm@61bd000"; | |
| jtag_mm6 = "/soc/jtagmm@61be000"; | |
| jtag_mm7 = "/soc/jtagmm@61bf000"; | |
| sdcc1_ice = "/soc/sdcc1ice@7803000"; | |
| sdhc_2 = "/soc/sdhci@7864900"; | |
| ipa_hw = "/soc/qcom,ipa@07900000"; | |
| spmi_bus = "/soc/qcom,spmi@200f000"; | |
| pm8953_revid = "/soc/qcom,spmi@200f000/qcom,pm8953@0/qcom,revid@100"; | |
| pm8953_tz = "/soc/qcom,spmi@200f000/qcom,pm8953@0/qcom,temp-alarm@2400"; | |
| pm8953_coincell = "/soc/qcom,spmi@200f000/qcom,pm8953@0/qcom,coincell@2800"; | |
| pm8953_mpps = "/soc/qcom,spmi@200f000/qcom,pm8953@0/mpps"; | |
| pa_therm1_default = "/soc/qcom,spmi@200f000/qcom,pm8953@0/mpps/pa_therm1/pa_therm1_default"; | |
| pm8953_gpios = "/soc/qcom,spmi@200f000/qcom,pm8953@0/gpios"; | |
| tasha_mclk_default = "/soc/qcom,spmi@200f000/qcom,pm8953@0/gpios/tasha_mclk/tasha_mclk_default"; | |
| bklt_en_default = "/soc/qcom,spmi@200f000/qcom,pm8953@0/gpios/bklt_en/bklt_en_default"; | |
| pm8953_vadc = "/soc/qcom,spmi@200f000/qcom,pm8953@0/vadc@3100"; | |
| pm8953_adc_tm = "/soc/qcom,spmi@200f000/qcom,pm8953@0/vadc@3400"; | |
| pm8953_rtc = "/soc/qcom,spmi@200f000/qcom,pm8953@0/qcom,pm8953_rtc"; | |
| pm8953_typec = "/soc/qcom,spmi@200f000/qcom,pm8953@0/qcom,pm8953_typec@bf00"; | |
| pm8953_1 = "/soc/qcom,spmi@200f000/qcom,pm8953@1"; | |
| pm8953_pwm = "/soc/qcom,spmi@200f000/qcom,pm8953@1/qcom,pwms@bc00"; | |
| pm8953_s5 = "/soc/qcom,spmi@200f000/qcom,pm8953@1/spm-regulator@2000"; | |
| pm8953_s5_limit = "/soc/qcom,spmi@200f000/qcom,pm8953@1/spm-regulator@2000/avs-limit-regulator"; | |
| pmic_analog_codec = "/soc/qcom,spmi@200f000/qcom,pm8953@1/analog-codec@f000"; | |
| msm_digital_codec = "/soc/qcom,spmi@200f000/qcom,pm8953@1/analog-codec@f000/msm-dig-codec"; | |
| pmi632_revid = "/soc/qcom,spmi@200f000/qcom,pmi632@2/qcom,revid@100"; | |
| pmi632_pon = "/soc/qcom,spmi@200f000/qcom,pmi632@2/qcom,power-on@800"; | |
| pmi632_vadc = "/soc/qcom,spmi@200f000/qcom,pmi632@2/vadc@3100"; | |
| pmi632_adc_tm = "/soc/qcom,spmi@200f000/qcom,pmi632@2/vadc@3500"; | |
| pmi632_tz = "/soc/qcom,spmi@200f000/qcom,pmi632@2/qcom,temp-alarm@2400"; | |
| pmi632_gpios = "/soc/qcom,spmi@200f000/qcom,pmi632@2/pinctrl@c000"; | |
| backlight_therm_default = "/soc/qcom,spmi@200f000/qcom,pmi632@2/pinctrl@c000/backlight_therm/backlight_therm_default"; | |
| smb_therm_default = "/soc/qcom,spmi@200f000/qcom,pmi632@2/pinctrl@c000/smb_therm/smb_therm_default"; | |
| pmi632_charger = "/soc/qcom,spmi@200f000/qcom,pmi632@2/qcom,qpnp-smb5"; | |
| smb5_vbus = "/soc/qcom,spmi@200f000/qcom,pmi632@2/qcom,qpnp-smb5/qcom,smb5-vbus"; | |
| pmi632_qg = "/soc/qcom,spmi@200f000/qcom,pmi632@2/qpnp,qg"; | |
| bcl_sensor = "/soc/qcom,spmi@200f000/qcom,pmi632@2/bcl@3d00"; | |
| bcl_soc = "/soc/qcom,spmi@200f000/qcom,pmi632@2/bcl-soc"; | |
| pmi632_pbs_client3 = "/soc/qcom,spmi@200f000/qcom,pmi632@2/qcom,pbs@7400"; | |
| pmi632_sdam7 = "/soc/qcom,spmi@200f000/qcom,pmi632@2/qcom,sdam@b600"; | |
| pmi632_3 = "/soc/qcom,spmi@200f000/qcom,pmi632@3"; | |
| pmi632_vib = "/soc/qcom,spmi@200f000/qcom,pmi632@3/qcom,vibrator@5700"; | |
| pmi632_pwm = "/soc/qcom,spmi@200f000/qcom,pmi632@3/qcom,pwms@b300"; | |
| pmi632_rgb = "/soc/qcom,spmi@200f000/qcom,pmi632@3/qcom,leds@d000"; | |
| pmi632_lcdb = "/soc/qcom,spmi@200f000/qcom,pmi632@3/qpnp-lcdb@ec00"; | |
| lcdb_ldo_vreg = "/soc/qcom,spmi@200f000/qcom,pmi632@3/qpnp-lcdb@ec00/ldo"; | |
| lcdb_ncp_vreg = "/soc/qcom,spmi@200f000/qcom,pmi632@3/qpnp-lcdb@ec00/ncp"; | |
| lcdb_bst_vreg = "/soc/qcom,spmi@200f000/qcom,pmi632@3/qpnp-lcdb@ec00/bst"; | |
| flash_led = "/soc/qcom,spmi@200f000/qcom,pmi632@3/qcom,leds@d300"; | |
| pmi632_flash0 = "/soc/qcom,spmi@200f000/qcom,pmi632@3/qcom,leds@d300/qcom,flash_0"; | |
| pmi632_flash1 = "/soc/qcom,spmi@200f000/qcom,pmi632@3/qcom,leds@d300/qcom,flash_1"; | |
| pmi632_torch0 = "/soc/qcom,spmi@200f000/qcom,pmi632@3/qcom,leds@d300/qcom,torch_0"; | |
| pmi632_torch1 = "/soc/qcom,spmi@200f000/qcom,pmi632@3/qcom,leds@d300/qcom,torch_1"; | |
| pmi632_switch0 = "/soc/qcom,spmi@200f000/qcom,pmi632@3/qcom,leds@d300/qcom,led_switch_0"; | |
| pmi632_switch1 = "/soc/qcom,spmi@200f000/qcom,pmi632@3/qcom,leds@d300/qcom,led_switch_1"; | |
| usb3 = "/soc/ssusb@7000000"; | |
| qusb_phy = "/soc/qusb@79000"; | |
| ssphy = "/soc/ssphy@78000"; | |
| dbm_1p5 = "/soc/dbm@70f8000"; | |
| ssc_sensors = "/soc/qcom,msm-ssc-sensors"; | |
| apc_cpr = "/soc/cpr4-ctrl@b018000"; | |
| apc0_pwrcl_vreg = "/soc/cpr4-ctrl@b018000/thread@0/regulator"; | |
| apc1_perfcl_vreg = "/soc/cpr4-ctrl@b018000/thread@1/regulator"; | |
| gfx_mem_acc = "/soc/regulator@194415c"; | |
| gfx_vreg_corner = "/soc/ldo@185f000"; | |
| eldo2_8953 = "/soc/eldo2"; | |
| adv_vreg = "/soc/adv_vreg"; | |
| gdsc_venus = "/soc/qcom,gdsc@184c018"; | |
| gdsc_mdss = "/soc/qcom,gdsc@184d078"; | |
| gdsc_jpeg = "/soc/qcom,gdsc@185701c"; | |
| gdsc_vfe = "/soc/qcom,gdsc@1858034"; | |
| gdsc_vfe1 = "/soc/qcom,gdsc@185806c"; | |
| gdsc_cpp = "/soc/qcom,gdsc@1858078"; | |
| gdsc_oxili_gx = "/soc/qcom,gdsc@185901c"; | |
| gdsc_venus_core0 = "/soc/qcom,gdsc@184c028"; | |
| gdsc_venus_core1 = "/soc/qcom,gdsc@184c030"; | |
| gdsc_oxili_cx = "/soc/qcom,gdsc@185904c"; | |
| gdsc_usb30 = "/soc/qcom,gdsc@183f078"; | |
| modem_pa = "/soc/qmi-tmd-devices/modem/modem_pa"; | |
| modem_proc = "/soc/qmi-tmd-devices/modem/modem_proc"; | |
| modem_current = "/soc/qmi-tmd-devices/modem/modem_current"; | |
| modem_vdd = "/soc/qmi-tmd-devices/modem/modem_vdd"; | |
| vfe0 = "/soc/qcom,vfe0@1b10000"; | |
| vfe1 = "/soc/qcom,vfe1@1b14000"; | |
| msm_cam_smmu_cb1 = "/soc/qcom,cam_smmu/msm_cam_smmu_cb1"; | |
| msm_cam_smmu_cb3 = "/soc/qcom,cam_smmu/msm_cam_smmu_cb3"; | |
| msm_cam_smmu_cb4 = "/soc/qcom,cam_smmu/msm_cam_smmu_cb4"; | |
| cci = "/soc/qcom,cci@1b0c000"; | |
| i2c_freq_100Khz = "/soc/qcom,cci@1b0c000/qcom,i2c_standard_mode"; | |
| i2c_freq_400Khz = "/soc/qcom,cci@1b0c000/qcom,i2c_fast_mode"; | |
| i2c_freq_custom = "/soc/qcom,cci@1b0c000/qcom,i2c_custom_mode"; | |
| i2c_freq_1Mhz = "/soc/qcom,cci@1b0c000/qcom,i2c_fast_plus_mode"; | |
| pcm0 = "/soc/qcom,msm-pcm"; | |
| routing = "/soc/qcom,msm-pcm-routing"; | |
| compr = "/soc/qcom,msm-compr-dsp"; | |
| pcm1 = "/soc/qcom,msm-pcm-low-latency"; | |
| pcm2 = "/soc/qcom,msm-ultra-low-latency"; | |
| pcm_noirq = "/soc/qcom,msm-pcm-dsp-noirq"; | |
| compress = "/soc/qcom,msm-compress-dsp"; | |
| voip = "/soc/qcom,msm-voip-dsp"; | |
| voice = "/soc/qcom,msm-pcm-voice"; | |
| stub_codec = "/soc/qcom,msm-stub-codec"; | |
| afe = "/soc/qcom,msm-pcm-afe"; | |
| dai_hdmi = "/soc/qcom,msm-dai-q6-hdmi"; | |
| dai_dp = "/soc/qcom,msm-dai-q6-dp"; | |
| loopback = "/soc/qcom,msm-pcm-loopback"; | |
| msm_dai_mi2s = "/soc/qcom,msm-dai-mi2s"; | |
| dai_mi2s0 = "/soc/qcom,msm-dai-mi2s/qcom,msm-dai-q6-mi2s-prim"; | |
| dai_mi2s1 = "/soc/qcom,msm-dai-mi2s/qcom,msm-dai-q6-mi2s-sec"; | |
| dai_mi2s2 = "/soc/qcom,msm-dai-mi2s/qcom,msm-dai-q6-mi2s-tert"; | |
| dai_mi2s3 = "/soc/qcom,msm-dai-mi2s/qcom,msm-dai-q6-mi2s-quat"; | |
| dai_mi2s4 = "/soc/qcom,msm-dai-mi2s/qcom,msm-dai-q6-mi2s-quin"; | |
| dai_mi2s5 = "/soc/qcom,msm-dai-mi2s/qcom,msm-dai-q6-mi2s-senary"; | |
| lsm = "/soc/qcom,msm-lsm-client"; | |
| sb_0_rx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-sb-0-rx"; | |
| sb_0_tx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-sb-0-tx"; | |
| sb_1_rx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-sb-1-rx"; | |
| sb_1_tx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-sb-1-tx"; | |
| sb_2_rx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-sb-2-rx"; | |
| sb_2_tx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-sb-2-tx"; | |
| sb_3_rx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-sb-3-rx"; | |
| sb_3_tx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-sb-3-tx"; | |
| sb_4_rx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-sb-4-rx"; | |
| sb_4_tx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-sb-4-tx"; | |
| sb_5_tx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-sb-5-tx"; | |
| sb_5_rx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-sb-5-rx"; | |
| sb_6_rx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-sb-6-rx"; | |
| sb_7_rx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-sb-7-rx"; | |
| sb_7_tx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-sb-7-tx"; | |
| sb_8_rx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-sb-8-rx"; | |
| sb_8_tx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-sb-8-tx"; | |
| bt_sco_rx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-bt-sco-rx"; | |
| bt_sco_tx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-bt-sco-tx"; | |
| int_fm_rx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-int-fm-rx"; | |
| int_fm_tx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-int-fm-tx"; | |
| afe_pcm_rx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-be-afe-pcm-rx"; | |
| afe_pcm_tx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-be-afe-pcm-tx"; | |
| afe_proxy_rx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-afe-proxy-rx"; | |
| afe_proxy_tx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-afe-proxy-tx"; | |
| afe_loopback_tx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-afe-loopback-tx"; | |
| incall_record_rx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-incall-record-rx"; | |
| incall_record_tx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-incall-record-tx"; | |
| incall_music_rx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-incall-music-rx"; | |
| incall_music_2_rx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-incall-music-2-rx"; | |
| proxy_rx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-proxy-rx"; | |
| proxy_tx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-proxy-tx"; | |
| usb_audio_rx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-usb-audio-rx"; | |
| usb_audio_tx = "/soc/qcom,msm-dai-q6/qcom,msm-dai-q6-usb-audio-tx"; | |
| hostless = "/soc/qcom,msm-pcm-hostless"; | |
| audio_apr = "/soc/qcom,msm-audio-apr"; | |
| dai_pri_auxpcm = "/soc/qcom,msm-pri-auxpcm"; | |
| dai_sec_auxpcm = "/soc/qcom,msm-sec-auxpcm"; | |
| dai_tert_auxpcm = "/soc/qcom,msm-tert-auxpcm"; | |
| dai_quat_auxpcm = "/soc/qcom,msm-quat-auxpcm"; | |
| dai_quin_auxpcm = "/soc/qcom,msm-quin-auxpcm"; | |
| hdmi_dba = "/soc/qcom,msm-hdmi-dba-codec-rx"; | |
| msm_audio_ion = "/soc/qcom,msm-audio-ion"; | |
| dai_pri_tdm_rx_0 = "/soc/qcom,msm-dai-tdm-pri-rx/qcom,msm-dai-q6-tdm-pri-rx-0"; | |
| dai_pri_tdm_tx_0 = "/soc/qcom,msm-dai-tdm-pri-tx/qcom,msm-dai-q6-tdm-pri-tx-0"; | |
| dai_sec_tdm_rx_0 = "/soc/qcom,msm-dai-tdm-sec-rx/qcom,msm-dai-q6-tdm-sec-rx-0"; | |
| dai_sec_tdm_tx_0 = "/soc/qcom,msm-dai-tdm-sec-tx/qcom,msm-dai-q6-tdm-sec-tx-0"; | |
| dai_tert_tdm_rx_0 = "/soc/qcom,msm-dai-tdm-tert-rx/qcom,msm-dai-q6-tdm-tert-rx-0"; | |
| dai_tert_tdm_tx_0 = "/soc/qcom,msm-dai-tdm-tert-tx/qcom,msm-dai-q6-tdm-tert-tx-0"; | |
| msm_dai_tdm_quat_rx = "/soc/qcom,msm-dai-tdm-quat-rx"; | |
| dai_quat_tdm_rx_0 = "/soc/qcom,msm-dai-tdm-quat-rx/qcom,msm-dai-q6-tdm-quat-rx-0"; | |
| dai_quat_tdm_tx_0 = "/soc/qcom,msm-dai-tdm-quat-tx/qcom,msm-dai-q6-tdm-quat-tx-0"; | |
| dai_quin_tdm_rx_0 = "/soc/qcom,msm-dai-tdm-quin-rx/qcom,msm-dai-q6-tdm-quin-rx-0"; | |
| dai_quin_tdm_tx_0 = "/soc/qcom,msm-dai-tdm-quin-tx/qcom,msm-dai-q6-tdm-quin-tx-0"; | |
| int_codec = "/soc/sound"; | |
| cdc_us_euro_sw = "/soc/msm_cdc_pinctrl_us_euro_sw"; | |
| cdc_comp_gpios = "/soc/cdc_comp_pinctrl"; | |
| cdc_pri_mi2s_gpios = "/soc/msm_cdc_pinctrl_pri"; | |
| cdc_quin_mi2s_gpios = "/soc/msm_cdc_pinctrl_quin"; | |
| wsa881x_analog_vi_gpio = "/soc/wsa881x_analog_vi_pctrl"; | |
| wsa881x_analog_clk_gpio = "/soc/wsa881x_analog_clk_pctrl"; | |
| wsa881x_analog_reset_gpio = "/soc/wsa881x_analog_reset_pctrl"; | |
| ext_codec = "/soc/sound-9335"; | |
| cpe = "/soc/qcom,msm-cpe-lsm"; | |
| wcd9xxx_intc = "/soc/wcd9xxx-irq"; | |
| clock_audio = "/soc/audio_ext_clk"; | |
| wcd_rst_gpio = "/soc/msm_cdc_pinctrl@67"; | |
| apc_mem_acc_vreg = "/soc/apc-mem-acc-regulator"; | |
| dbu3 = "/soc/dbu3"; | |
| cci_cache = "/soc/qcom,cci"; | |
| etm4 = "/soc/etm@61b3000"; | |
| etm4_out_funnel_apss0 = "/soc/etm@61b3000/port/endpoint"; | |
| etm5 = "/soc/etm@61b7000"; | |
| etm5_out_funnel_apss0 = "/soc/etm@61b7000/port/endpoint"; | |
| etm6 = "/soc/etm@61bb000"; | |
| etm6_out_funnel_apss0 = "/soc/etm@61bb000/port/endpoint"; | |
| cti_cpu4 = "/soc/cti@61b1000"; | |
| cti_cpu5 = "/soc/cti@61b5000"; | |
| cti_cpu7 = "/soc/cti@61bd000"; | |
| led_flash0 = "/soc/qcom,camera-flash"; | |
| vendor = "/vendor"; | |
| firmware = "/firmware"; | |
| other_ext_mem = "/reserved-memory/other_ext_region@0"; | |
| modem_mem = "/reserved-memory/modem_region@0"; | |
| adsp_fw_mem = "/reserved-memory/adsp_fw_region@0"; | |
| wcnss_fw_mem = "/reserved-memory/wcnss_fw_region@0"; | |
| venus_mem = "/reserved-memory/venus_region@0"; | |
| secure_mem = "/reserved-memory/secure_region@0"; | |
| qseecom_mem = "/reserved-memory/qseecom_region@0"; | |
| qseecom_ta_mem = "/reserved-memory/qseecom_ta_region"; | |
| adsp_mem = "/reserved-memory/adsp_region@0"; | |
| dfps_data_mem = "/reserved-memory/dfps_data_mem@90000000"; | |
| cont_splash_mem = "/reserved-memory/splash_region@0x90001000"; | |
| adsp_shmem_device_mem = "/reserved-memory/adsp_shmem_device_region@0xc0100000"; | |
| gpu_mem = "/reserved-memory/gpu_region@0"; | |
| dump_mem = "/reserved-memory/mem_dump_region"; | |
| energy_costs = "/energy-costs"; | |
| CPU_COST_0 = "/energy-costs/core-cost0"; | |
| CLUSTER_COST_0 = "/energy-costs/cluster-cost0"; | |
| CLUSTER_COST_1 = "/energy-costs/cluster-cost1"; | |
| CPU_COST_1 = "/energy-costs/core-cost1"; | |
| mtp_batterydata = "/qcom,battery-data"; | |
| }; | |
| }; |
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