Created
April 12, 2020 11:11
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riscv cpu registers
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pub fn read(comptime reg_name: []const u8) u64 { | |
return asm volatile("csrr %[ret], " ++ reg_name : [ret] "=r" (-> u64)); | |
} | |
pub fn write(comptime reg_name: []const u8, data: u64) void { | |
asm volatile("csrw " ++ reg_name ++ ", %[data]" : : [data] "r" (data)); | |
} |
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