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GMMan/cc2640r2f_rfcbits.md

Last active July 2, 2024 03:36
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RFCBITS register documentation for TI CC2640R2F
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cc2640r2f_rfcbits.md

RFCBITS @ 0x400821cc

Values indicate bit mask.

  • 0x00000001: boot type: 0 = with command, 1 = special boot

Boot with command

Command specified will be executed immediately after boot init (unverified), unless command is 0, which will result in a completely normal boot.

Special boot

  • 0xe0000000: 7 = special request, otherwise execute code out of address specified by RFCBITS

Special request

  • 0x00000006: request type: 0 = advanced boot, 1 = perform operation

Advanced boot

Boots CPE normally, but with additional options. For single-bit mask values, debug option is set if mask is set.

  • 0x00000008: resets RFC_PWR to CPE (+RAM)-only
  • 0x00000010: debug: generates an interrupt (where?) before certain operations, and waits for bit 0x8 to be cleared in RFCMODESEL before continuing
  • 0x00000020: start RAT
  • 0x00000040: disable pointer checks (for region and alignment)
  • 0x00000f00: enable debug trace with timestamp on systick channel 1 (see dbgTraceCfg_t 15..8 for options)

Operations

  • 0x000007f8: operation type: 1 = blank radio RAM (CPE + MCE + RFE), otherwise do normal boot

Execute code

Pointer can be to any memory region accessible by CPE. If the address falls between 0x21000000 and 0x21ffffff, the core will disable its clock, and you can load code into the region before reenabling the CPE clock. The function to be executed is passed a pointer to the CPE's init function.

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