Parse verilog number literal.

parse_verilog_number.py

def parse_verilog_number(s):
    """Parse a verilog number literal to the tuple (sign, bits, base, value).
    sign: 1 for postive, -1 for negative.
    bits: The bits token in the number literal.
    base: The base of number(2, 10 or 16).
    value: The value token.
    """
    base_token = {'b': 2, 'd': 10, 'h': 16}
    pattern = re.compile(r"""(?P<sign>[\-\+])?(?P<define>\`)?(?P<bits>[\w]+)?\'((?P<base2>[bB])(?P<value2>[01]+)|(?P<base10>[dD])(?P<value10>\d+)|(?P<base16>[hH])(?P<value16>[0-9a-fA-F]+)|(?P<value>\d+))""")
    m = pattern.match(s)
    assert m, ValueError(f"`{s}` is not a valid format of verilog number.")
    sign = -1 if m.group("sign") == '-' else 1
    bits = '`' + m.group("bits") if m.group('define') else m.group("bits")
    base = m.group("base2") or m.group("base10") or m.group("base16") or 'd'
    value = m.group("value2") or m.group("value10") or m.group("value16")
    return sign, bits, base_token[base.lower()], value

def to_int(s):
    """Convert verilog number literal to number."""
    sign, _, base, value = parse_verilog_number(s)
    return sign * int(value, base)