gistfile1.txt

OCTEON eMMC stage 1 bootloader

Partition: 1, start: 0x0000000000000800, size: 0x0000000000200001
Reading 470976 bytes.
................................................................................................................... Done.
Loaded OCTBOOT2BIN, size: 0x0000000000072FC0
Branching to stage 2 at: 0xFFFFFFFF81004000
Board TLV descriptor Read - RHino continues ... 2 board 0x4e26 major 1 minor 0, DDR HERTZ 0 hz
Rhino: early board init, mem_clk 0x29b ..

U-Boot 2013.07 (Development build, svnversion: u-boot:exported, exec:) (Build time: Mar 27 2015 - 10:49:38)

Initializing DRAM
U-Boot is not RAM-resident
Rhino: lookup_ddr_config_structure: cpu_id 890370 board_type 20006 ...
Rhino: cpu_id 0xd9602 board_type 0x4e26 major 0x1 minor 0x0  mask 1 ...
Initializing DDR, clock = 667000000hz, reference = 50000000hz
LMC0_DCLK_CNT: 0xffffffffffffffff
Measured DDR clock 666666657 Hz
Mem size in MBYTES: 1024
RHino: new Ram size 1024MiB (0x40000000)
Ram size 1024MiB (0x40000000)
Clearing memory from 0 to 1048576
Done clearing memory
CUST_PRIVATE_RHINO_ITUS7X board revision major:1, minor:0, serial #:
OCTEON CN7020-AAP pass 1.2, Core clock: 1000 MHz, IO clock: 600 MHz, DDR clock: 667 MHz (1334 Mhz DDR)
Base DRAM address used by u-boot: 0x4f804000, size: 0x7fc000
DRAM: 1 GiB
Clearing DRAM.....Clearing base address: 0x100000, size: 0xff00000, ub_base: 0x4f804000, ub_size: 0x7fc000
Stack: 0xc03f5c60
Done clearing memory, ub_base: 0x4f804000
.Clearing base address: 0x20000000, size: 0x30000000, ub_base: 0x4f804000, ub_size: 0x7fc000
Stack: 0xc03f5c60
Done clearing memory, ub_base: 0x4f804000
 done
Using default environment

MMC:   Octeon MMC/SD0: 1
Hit any key to stop autoboot:  0
reading u-boot-octeon_rhino_itus7x.bin
early_board_init: Early board init .................
Importing environment from RAM address 0x1000
RAM environment is 33 bytes

U-Boot 2013.07 (Development build, svnversion: u-boot:exported, exec:) (Build time: May 21 2015 - 11:11:49)

Initializing DRAM
U-Boot is RAM resident
Using DRAM size from environment: 1024 MBytes
DDR clock is 667 MHz
RHino: new Ram size 1024MiB (0x40000000)
Ram size 1024MiB (0x40000000)
Preserving environment in RAM
Done clearing memory
Configuring DLM0 for QSGMII
DLM1: mini-PCIe slots selected
CUST_PRIVATE_RHINO_ITUS7X board revision major:0, minor:1, serial #: 752011191521-37534
OCTEON CN7020-AAP pass 1.2, Core clock: 1000 MHz, IO clock: 600 MHz, DDR clock: 667 MHz (1334 Mhz DDR)
Base DRAM address used by u-boot: 0x4f000000, size: 0x1000000
DRAM: 1 GiB
Clearing DRAM.....Clearing base address: 0x100000, size: 0xff00000, ub_base: 0x4f000000, ub_size: 0x1000000
Stack: 0xc0f71c60
Done clearing memory, ub_base: 0x4f000000
.Clearing base address: 0x20000000, size: 0x30000000, ub_base: 0x4f000000, ub_size: 0x1000000
Stack: 0xc0f71c60
Done clearing memory, ub_base: 0x4f000000
 done
board_fixup_fdt: Found PCIe GPIO2 ..
MMC device not found, initializing
Octeon MMC/SD0: 1
*** Warning - bad CRC, using default environment

PCIe: Link timeout on port 0, probably the slot is empty
PCIe: Port 1 not in PCIe mode, skipping
PCIe: Port 2 not in PCIe mode, skipping
Net:   cvmx_helper_interface: interface 0
cvmx_helper_interface: interface 1
cvmx_helper_interface: interface 4
octeth0, octeth1, octeth2, octeth3
Type the command 'usb start' to scan for USB storage devices.

late_board_init ..
ITUS: SW1 2 Router  (CENTER)
Hit any key to stop autoboot:  0
Octeon cust_private_rhino_itus7x(ram)#