bcm2835-i2s-no-clock.patch

diff --git a/sound/soc/bcm/bcm2835-i2s.c b/sound/soc/bcm/bcm2835-i2s.c
index 815509b..483c33d 100644
--- a/sound/soc/bcm/bcm2835-i2s.c
+++ b/sound/soc/bcm/bcm2835-i2s.c
@@ -167,11 +167,14 @@ struct bcm2835_i2s_dev {
 	unsigned int				bclk_ratio;
 
 	struct regmap *i2s_regmap;
+#if 0
 	struct regmap *clk_regmap;
+#endif
 };
 
 static void bcm2835_i2s_start_clock(struct bcm2835_i2s_dev *dev)
 {
+#if 0
 	/* Start the clock if in master mode */
 	unsigned int master = dev->fmt & SND_SOC_DAIFMT_MASTER_MASK;
 
@@ -185,10 +188,12 @@ static void bcm2835_i2s_start_clock(struct bcm2835_i2s_dev *dev)
 	default:
 		break;
 	}
+#endif
 }
 
 static void bcm2835_i2s_stop_clock(struct bcm2835_i2s_dev *dev)
 {
+#if 0
 	uint32_t clkreg;
 	int timeout = 1000;
 
@@ -211,6 +216,7 @@ static void bcm2835_i2s_stop_clock(struct bcm2835_i2s_dev *dev)
 			BCM2835_CLK_KILL | BCM2835_CLK_PASSWD_MASK,
 			BCM2835_CLK_KILL | BCM2835_CLK_PASSWD);
 	}
+#endif
 }
 
 static void bcm2835_i2s_clear_fifos(struct bcm2835_i2s_dev *dev,
@@ -220,8 +226,10 @@ static void bcm2835_i2s_clear_fifos(struct bcm2835_i2s_dev *dev,
 	uint32_t syncval;
 	uint32_t csreg;
 	uint32_t i2s_active_state;
+#if 0
 	uint32_t clkreg;
 	uint32_t clk_active_state;
+#endif
 	uint32_t off;
 	uint32_t clr;
 
@@ -235,6 +243,7 @@ static void bcm2835_i2s_clear_fifos(struct bcm2835_i2s_dev *dev,
 	regmap_read(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, &csreg);
 	i2s_active_state = csreg & (BCM2835_I2S_RXON | BCM2835_I2S_TXON);
 
+#if 0
 	regmap_read(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, &clkreg);
 	clk_active_state = clkreg & BCM2835_CLK_ENAB;
 
@@ -244,6 +253,7 @@ static void bcm2835_i2s_clear_fifos(struct bcm2835_i2s_dev *dev,
 			BCM2835_CLK_PASSWD_MASK | BCM2835_CLK_ENAB,
 			BCM2835_CLK_PASSWD | BCM2835_CLK_ENAB);
 	}
+#endif
 
 	/* Stop I2S module */
 	regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, off, 0);
@@ -276,9 +286,11 @@ static void bcm2835_i2s_clear_fifos(struct bcm2835_i2s_dev *dev,
 	if (!timeout)
 		dev_err(dev->dev, "I2S SYNC error!\n");
 
+#if 0
 	/* Stop clock if it was not running before */
 	if (!clk_active_state)
 		bcm2835_i2s_stop_clock(dev);
+#endif
 
 	/* Restore I2S state */
 	regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG,
@@ -411,6 +423,7 @@ static int bcm2835_i2s_hw_params(struct snd_pcm_substream *substream,
 		divf = dividend & BCM2835_CLK_DIVF_MASK;
 	}
 
+#if 0
 	/* Clock should only be set up here if CPU is clock master */
 	switch (dev->fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 	case SND_SOC_DAIFMT_CBS_CFS:
@@ -430,6 +443,7 @@ static int bcm2835_i2s_hw_params(struct snd_pcm_substream *substream,
 	default:
 		break;
 	}
+#endif
 
 	/* Setup the frame format */
 	format = BCM2835_I2S_CHEN;
@@ -841,7 +855,7 @@ static int bcm2835_i2s_probe(struct platform_device *pdev)
 			SNDRV_PCM_INFO_MMAP_VALID;
 
 	/* Request both ioareas */
-	for (i = 0; i <= 1; i++) {
+	for (i = 0; i < 1; i++) {
 		void __iomem *base;
 
 		mem[i] = platform_get_resource(pdev, IORESOURCE_MEM, i);
@@ -861,7 +875,9 @@ static int bcm2835_i2s_probe(struct platform_device *pdev)
 		return -ENOMEM;
 
 	dev->i2s_regmap = regmap[0];
+#if 0
 	dev->clk_regmap = regmap[1];
+#endif
 
 	/* Set the DMA address */
 	dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK].addr =