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rboot4LCM draft code after compiler check
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| /* -------------------------------------------- | |
| Assumptions for the storage of start- and continue-bits | |
| they will be stored in sector 0x1000 at the end together with the rboot parameters | |
| they will be multiples 8bytes which will assure that the start of the start_bits is at a 32bit address | |
| the last byte will contain the amount of open continue-bits and is a signal for reflash of this sector | |
| the define CONT_ADDR indicates where the bits are stored, half for continue-bits, last half for start-bits | |
| --------------------------------------------- */ | |
| #define CYCLE_DELAY_MICROS 2000000 //1 second? | |
| #define CONT_ADDR 0x1ff0 //TODO: make this 0x1100 or so after testing | |
| #define LAST_ADDR (BOOT_CONFIG_SECTOR+1)*SECTOR_SIZE | |
| #define FIELD_SIZE (LAST_ADDR-CONT_ADDR)/2 | |
| int outcome=0; | |
| uint32_t start_bits, cont_bits, comp_bits, count; | |
| //read last byte of BOOT_CONFIG_SECTOR to see if we need to reflash it if we ran out of status bits | |
| //Important to do it ASAP since it reduces the chance of being interupted by a power cycle | |
| loadAddr=CONT_ADDR+FIELD_SIZE; | |
| SPIRead(LAST_ADDR-4, &count, 4); | |
| if (count<33) { //default value is 0xffffffff | |
| SPIRead(BOOT_CONFIG_SECTOR * SECTOR_SIZE, buffer, 0x100); //TODO: make this define based | |
| SPIEraseSector(BOOT_CONFIG_SECTOR); | |
| SPIWrite(BOOT_CONFIG_SECTOR * SECTOR_SIZE, buffer, 0x100); | |
| //TODO: clear start-bits based on value of count | |
| start_bits=~0>>count; //TODO: some error here, bits won't clear | |
| ets_printf("\nstart_bits: %08x count: %d\n",start_bits,count); | |
| SPIWrite(loadAddr,&start_bits,4); | |
| } | |
| #if defined BOOT_DELAY_MICROS && BOOT_DELAY_MICROS > 0 | |
| // delay to slow boot (help see messages when debugging) | |
| ets_delay_us(BOOT_DELAY_MICROS); | |
| #endif | |
| ets_printf("\r\nrBoot4LCM v0.0.2\r\n"); | |
| //find the beginning of start-bit-range | |
| do {SPIRead(loadAddr,&start_bits,4); | |
| ets_printf("%04x: %08x\n",loadAddr,start_bits); | |
| loadAddr+=4; | |
| } while (!start_bits && loadAddr<LAST_ADDR); //until a non-zero value | |
| loadAddr-=4; //return to the address where start_bits was read | |
| SPIRead(loadAddr-FIELD_SIZE,&cont_bits,4); | |
| ets_printf("%04x: %08x\n",loadAddr-FIELD_SIZE,cont_bits); | |
| count=0; | |
| comp_bits=~start_bits&cont_bits; //collect the bits that are not in start_bits | |
| while (comp_bits) {comp_bits&=(comp_bits-1);count++;} //count the bits using Brian Kernighan’s Algorithm | |
| if (cont_bits==~0 && loadAddr-FIELD_SIZE>CONT_ADDR) { | |
| SPIRead(loadAddr-FIELD_SIZE-4,&comp_bits,4); //read the previous word | |
| ets_printf("%04x: %08x\n",loadAddr-FIELD_SIZE-4,comp_bits); | |
| while (comp_bits) {comp_bits&=(comp_bits-1);count++;} //count more bits | |
| } | |
| ets_printf("count: %d\n",count); | |
| //clear_start_bit(); | |
| if (loadAddr<LAST_ADDR-4) { | |
| start_bits>>=1; //clear leftmost 1-bit | |
| SPIWrite(loadAddr,&start_bits,4); | |
| } else { //reflash this sector because we reached the end (encode count+1 in last byte and do in next cycle) | |
| count++; | |
| SPIWrite(LAST_ADDR-4,&count,4); | |
| count--; | |
| } | |
| //the "logic" section | |
| if (count<6) { | |
| ets_delay_us(CYCLE_DELAY_MICROS); | |
| //========================================//if we powercycle, this is where it stops! | |
| if (count>=3) outcome=1; //ota-boot | |
| } else outcome=2; //factory reset, then ota-boot | |
| //clear_all_cont_bits(); //TODO: what if the powercycle happens again in the middle of this? | |
| comp_bits=0; | |
| if (loadAddr<LAST_ADDR-4) { | |
| if (cont_bits==~0 && loadAddr-FIELD_SIZE>CONT_ADDR) SPIWrite(loadAddr-FIELD_SIZE-4,&comp_bits,4); | |
| SPIWrite(loadAddr-FIELD_SIZE,&start_bits,4); | |
| } else { //reflash this sector because we reached the end (encode ZERO in last byte and do in next cycle) | |
| SPIWrite(LAST_ADDR-4,&comp_bits,4); | |
| } | |
| ets_printf("outcome: %d\n",outcome); | |
| return 0; //TODO: remove this line if the above code is properly tested | |
| if (outcome==2) { //factory reset | |
| unsigned int sysparam_len = 32; | |
| unsigned char sysparam[] = { | |
| 0x45, 0x4f, 0x52, 0x70, 0x01, 0x40, 0x00, 0x00, | |
| 0x01, 0x80, 0x0b, 0x00, 0x6f, 0x74, 0x61, 0x5f, | |
| 0x76, 0x65, 0x72, 0x73, 0x69, 0x6f, 0x6e, 0x01, | |
| 0xa0, 0x05, 0x00, 0x30, 0x2e, 0x30, 0x2e, 0x30 | |
| }; | |
| SPIEraseSector(SYSPARAM_SECTOR); | |
| SPIEraseSector(SYSPARAM_SECTOR+1); | |
| SPIWrite(SYSPARAM_SECTOR*SECTOR_SIZE, sysparam, sysparam_len); | |
| sysparam[5]=0x80; //changes from 0x40 firstactive to 0x80 secondstale | |
| SPIWrite((SYSPARAM_SECTOR+1)*SECTOR_SIZE, sysparam, sysparam_len); | |
| SPIWrite(LAST_ADDR,&comp_bits,4); //make rom0 bad so it cannot boot anymore | |
| } | |
| //further down we will select romToBoot = 1 = ota-boot |
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| #define BOOT_CONFIG_SECTOR 1 | |
| #define OTA_MAIN_SECTOR 0x8d | |
| #define SYSPARAM_SECTOR 0xf7 | |
| //..... | |
| #ifdef BOOT_CUSTOM_DEFAULT_CONFIG | |
| static uint8_t default_config(rboot_config *romconf, uint32_t flashsize) { | |
| romconf->count = 2; | |
| romconf->roms[0] = SECTOR_SIZE * (BOOT_CONFIG_SECTOR + 1); | |
| romconf->roms[1] = SECTOR_SIZE * OTA_MAIN_SECTOR; | |
| // romconf->roms[2] = SECTOR_SIZE * (OTA_MAIN_SECTOR - 1); | |
| // romconf->roms[3] = SECTOR_SIZE * (OTA_MAIN_SECTOR - 2); //spare slots in case otamain grows | |
| } | |
| #endif |
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| in line 290 the start_bits do not get cleared | |
| uint32_t start_bits, cont_bits, comp_bits, count; | |
| start_bits=~0>>count; //TODO: some error here, bits won't clear | |
| ets_printf("\nstart_bits: %08x count: %d\n",start_bits,count); | |
| line 10 | |
| rboot4lcm me$ make clean all flash monitor | |
| rm -rf build/ | |
| rm -rf firmware/ | |
| mkdir -p build/ | |
| /Applications/Xcode.app/Contents/Developer/usr/bin/make -C rboot "/Volumes/ESPopenHK/rboot4lcm/build"/rboot-stage2a.elf RBOOT_EXTRA_INCDIR=/Volumes/ESPopenHK/rboot4lcm/ RBOOT_BUILD_BASE="/Volumes/ESPopenHK/rboot4lcm/build" RBOOT_FW_BASE="/Volumes/ESPopenHK/rboot4lcm/firmware" | |
| CC rboot-stage2a.c | |
| LD /Volumes/ESPopenHK/rboot4lcm/build/rboot-stage2a.elf | |
| Extracting stub image header... | |
| xtensa-lx106-elf-objcopy build//rboot-stage2a.elf --only-section .text -Obinary build//rboot-hex2a.bin | |
| xxd -i build//rboot-hex2a.bin > build//rboot-hex2a.h.in | |
| sed -i "s/unsigned char .\+\[\]/const uint8_t _text_data[]/" build//rboot-hex2a.h.in | |
| sed -i "s/unsigned int .\+_len/const uint32_t _text_len/" build//rboot-hex2a.h.in | |
| echo "const uint32_t entry_addr = $(xtensa-lx106-elf-objdump -f build//rboot-stage2a.elf | grep 'start address' | grep -o '0x.\+');" >> build//rboot-hex2a.h.in | |
| echo "const uint32_t _text_addr = 0x$(xtensa-lx106-elf-objdump -h -j .text build//rboot-stage2a.elf | grep ".text" | grep -o '401.....' | head -n1);" >> build//rboot-hex2a.h.in | |
| mv build//rboot-hex2a.h.in build//rboot-hex2a.h | |
| /Applications/Xcode.app/Contents/Developer/usr/bin/make -C rboot "/Volumes/ESPopenHK/rboot4lcm/build"/rboot.elf RBOOT_EXTRA_INCDIR=/Volumes/ESPopenHK/rboot4lcm/ RBOOT_BUILD_BASE="/Volumes/ESPopenHK/rboot4lcm/build" RBOOT_FW_BASE="/Volumes/ESPopenHK/rboot4lcm/firmware" | |
| CC rboot.c | |
| LD /Volumes/ESPopenHK/rboot4lcm/build/rboot.elf | |
| mkdir -p firmware/ | |
| FW rboot.bin | |
| esptool.py elf2image -fs 8m -fm qio -ff 40m build//rboot.elf -o build// | |
| esptool.py v1.2 | |
| mv build//0x00000.bin firmware//rboot.bin | |
| esptool.py -p /dev/cu.usbserial-* -b 230400 write_flash -fs 8m -fm qio -ff 40m 0x0 firmware//rboot.bin 0x1000 firmware_prebuilt/blank_config.bin | |
| esptool.py v1.2 | |
| Connecting... | |
| Running Cesanta flasher stub... | |
| Flash params set to 0x0020 | |
| Writing 4096 @ 0x0... 4096 (100 %) | |
| Wrote 4096 bytes at 0x0 in 0.3 seconds (107.9 kbit/s)... | |
| Writing 4096 @ 0x1000... 4096 (100 %) | |
| Wrote 4096 bytes at 0x1000 in 0.3 seconds (107.9 kbit/s)... | |
| Leaving... | |
| /Volumes/ESPopenHK/esp-open-rtos///utils/filteroutput.py --port /dev/cu.usbserial-* --baud 74880 --elf build//rboot.elf | |
| Opening /dev/cu.usbserial-AH02MF3H at 74880bps... | |
| rBoot4LCM v0.0.2 | |
| 1ff8: ffffffff | |
| 1ff0: ffffffff | |
| count: 0 | |
| ets Jan 8 2013,rst cause:2, boot mode:(3,6) | |
| rBoot4LCM v0.0.2 | |
| 1ff8: 7fffffff | |
| 1ff0: ffffffff | |
| count: 1 | |
| ets Jan 8 2013,rst cause:2, boot mode:(3,6) | |
| rBoot4LCM v0.0.2 | |
| 1ff8: 3fffffff | |
| 1ff0: ffffffff | |
| count: 2 | |
| ets Jan 8 2013,rst cause:2, boot mode:(3,6) | |
| rBoot4LCM v0.0.2 | |
| 1ff8: 1fffffff | |
| 1ff0: ffffffff | |
| count: 3 | |
| ets Jan 8 2013,rst cause:2, boot mode:(3,6) | |
| rBoot4LCM v0.0.2 | |
| 1ff8: 0fffffff | |
| 1ff0: ffffffff | |
| count: 4 | |
| ets Jan 8 2013,rst cause:2, boot mode:(3,6) | |
| rBoot4LCM v0.0.2 | |
| 1ff8: 07ffffff | |
| 1ff0: ffffffff | |
| count: 5 | |
| ets Jan 8 2013,rst cause:2, boot mode:(3,6) | |
| rBoot4LCM v0.0.2 | |
| 1ff8: 03ffffff | |
| 1ff0: ffffffff | |
| count: 6 | |
| outcome: 2 | |
| user code done | |
| ets Jan 8 2013,rst cause:2, boot mode:(3,6) | |
| rBoot4LCM v0.0.2 | |
| 1ff8: 01ffffff | |
| 1ff0: 01ffffff | |
| count: 0 | |
| ets Jan 8 2013,rst cause:2, boot mode:(3,6) | |
| rBoot4LCM v0.0.2 | |
| 1ff8: 00ffffff | |
| 1ff0: 01ffffff | |
| count: 1 | |
| ets Jan 8 2013,rst cause:2, boot mode:(3,6) | |
| rBoot4LCM v0.0.2 | |
| 1ff8: 007fffff | |
| 1ff0: 01ffffff | |
| count: 2 | |
| ets Jan 8 2013,rst cause:2, boot mode:(3,6) | |
| rBoot4LCM v0.0.2 | |
| 1ff8: 003fffff | |
| 1ff0: 01ffffff | |
| count: 3 | |
| ets Jan 8 2013,rst cause:2, boot mode:(3,6) | |
| rBoot4LCM v0.0.2 | |
| 1ff8: 001fffff | |
| 1ff0: 01ffffff | |
| count: 4 | |
| outcome: 1 | |
| user code done | |
| ets Jan 8 2013,rst cause:2, boot mode:(3,6) | |
| rBoot4LCM v0.0.2 | |
| 1ff8: 000fffff | |
| 1ff0: 000fffff | |
| count: 0 | |
| ets Jan 8 2013,rst cause:2, boot mode:(3,6) | |
| rBoot4LCM v0.0.2 | |
| 1ff8: 0007ffff | |
| 1ff0: 000fffff | |
| count: 1 | |
| ets Jan 8 2013,rst cause:2, boot mode:(3,6) | |
| rBoot4LCM v0.0.2 | |
| 1ff8: 0003ffff | |
| 1ff0: 000fffff | |
| count: 2 | |
| ets Jan 8 2013,rst cause:2, boot mode:(3,6) | |
| rBoot4LCM v0.0.2 | |
| 1ff8: 0001ffff | |
| 1ff0: 000fffff | |
| count: 3 | |
| ets Jan 8 2013,rst cause:2, boot mode:(3,6) | |
| rBoot4LCM v0.0.2 | |
| 1ff8: 0000ffff | |
| 1ff0: 000fffff | |
| count: 4 | |
| ets Jan 8 2013,rst cause:2, boot mode:(3,6) | |
| rBoot4LCM v0.0.2 | |
| 1ff8: 00007fff | |
| 1ff0: 000fffff | |
| count: 5 | |
| ets Jan 8 2013,rst cause:2, boot mode:(3,6) | |
| rBoot4LCM v0.0.2 | |
| 1ff8: 00003fff | |
| 1ff0: 000fffff | |
| count: 6 | |
| outcome: 2 | |
| user code done | |
| ets Jan 8 2013,rst cause:2, boot mode:(3,6) | |
| rBoot4LCM v0.0.2 | |
| 1ff8: 00001fff | |
| 1ff0: 00001fff | |
| count: 0 | |
| ets Jan 8 2013,rst cause:2, boot mode:(3,6) | |
| rBoot4LCM v0.0.2 | |
| 1ff8: 00000fff | |
| 1ff0: 00001fff | |
| count: 1 | |
| ets Jan 8 2013,rst cause:2, boot mode:(3,6) | |
| rBoot4LCM v0.0.2 | |
| 1ff8: 000007ff | |
| 1ff0: 00001fff | |
| count: 2 | |
| ets Jan 8 2013,rst cause:2, boot mode:(3,6) | |
| rBoot4LCM v0.0.2 | |
| 1ff8: 000003ff | |
| 1ff0: 00001fff | |
| count: 3 | |
| ets Jan 8 2013,rst cause:2, boot mode:(3,6) | |
| rBoot4LCM v0.0.2 | |
| 1ff8: 000001ff | |
| 1ff0: 00001fff | |
| count: 4 | |
| ets Jan 8 2013,rst cause:2, boot mode:(3,6) | |
| rBoot4LCM v0.0.2 | |
| 1ff8: 000000ff | |
| 1ff0: 00001fff | |
| count: 5 | |
| ets Jan 8 2013,rst cause:2, boot mode:(3,6) | |
| rBoot4LCM v0.0.2 | |
| 1ff8: 0000007f | |
| 1ff0: 00001fff | |
| count: 6 | |
| outcome: 2 | |
| user code done | |
| ets Jan 8 2013,rst cause:2, boot mode:(3,6) | |
| rBoot4LCM v0.0.2 | |
| 1ff8: 0000003f | |
| 1ff0: 0000003f | |
| count: 0 | |
| ets Jan 8 2013,rst cause:2, boot mode:(3,6) | |
| rBoot4LCM v0.0.2 | |
| 1ff8: 0000001f | |
| 1ff0: 0000003f | |
| count: 1 | |
| ets Jan 8 2013,rst cause:2, boot mode:(3,6) | |
| rBoot4LCM v0.0.2 | |
| 1ff8: 0000000f | |
| 1ff0: 0000003f | |
| count: 2 | |
| ets Jan 8 2013,rst cause:2, boot mode:(3,6) | |
| rBoot4LCM v0.0.2 | |
| 1ff8: 00000007 | |
| 1ff0: 0000003f | |
| count: 3 | |
| outcome: 1 | |
| user code done | |
| ets Jan 8 2013,rst cause:2, boot mode:(3,6) | |
| rBoot4LCM v0.0.2 | |
| 1ff8: 00000003 | |
| 1ff0: 00000003 | |
| count: 0 | |
| ets Jan 8 2013,rst cause:2, boot mode:(3,6) | |
| rBoot4LCM v0.0.2 | |
| 1ff8: 00000001 | |
| 1ff0: 00000003 | |
| count: 1 | |
| ets Jan 8 2013,rst cause:2, boot mode:(3,6) | |
| rBoot4LCM v0.0.2 | |
| 1ff8: 00000000 | |
| 1ffc: ffffffff | |
| 1ff4: ffffffff | |
| 1ff0: 00000003 | |
| count: 2 | |
| ets Jan 8 2013,rst cause:2, boot mode:(3,6) | |
| start_bits: ffffffff count: 3 | |
| rBoot4LCM v0.0.2 | |
| 1ff8: ffffffff | |
| 1ff0: ffffffff | |
| count: 0 | |
| ets Jan 8 2013,rst cause:2, boot mode:(3,6) | |
| rBoot4LCM v0.0.2 | |
| 1ff8: 7fffffff | |
| 1ff0: ffffffff | |
| count: 1 | |
| ets Jan 8 2013,rst cause:2, boot mode:(3,6) | |
| rBoot4LCM v0.0.2 | |
| 1ff8: 3fffffff | |
| 1ff0: ffffffff | |
| count: 2 | |
| ets Jan 8 2013,rst cause:2, boot mode:(3,6) | |
| rBoot4LCM v0.0.2 | |
| 1ff8: 1fffffff | |
| 1ff0: ffffffff | |
| count: 3 | |
| ets Jan 8 2013,rst cause:2, boot mode:(3,6) | |
| rBoot4LCM v0.0.2 | |
| 1ff8: 0fffffff | |
| 1ff0: ffffffff | |
| count: 4 | |
| ets Jan 8 2013,rst cause:2, boot mode:(3,6) | |
| rBoot4LCM v0.0.2 | |
| 1ff8: 07ffffff | |
| 1ff0: ffffffff | |
| count: 5 | |
| ets Jan 8 2013,rst cause:2, boot mode:(3,6) | |
| rBoot4LCM v0.0.2 | |
| 1ff8: 03ffffff | |
| 1ff0: ffffffff | |
| count: 6 | |
| outcome: 2 | |
| user code done | |
| ets Jan 8 2013,rst cause:2, boot mode:(3,6) | |
| rBoot4LCM v0.0.2 | |
| 1ff8: 01ffffff | |
| 1ff0: 01ffffff | |
| count: 0 | |
| outcome: 0 | |
| user code done |
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