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nes cycle table
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/*parse_ops - 0.0.1: auto generate C/C++ array from table data*/ | |
#ifndef CYCLE_TABLE_H | |
#define CYCLE_TABLE_H | |
static const unsigned char CYCLE_TABLE[0x100] = { | |
7,6,0,8,3,3,5,5,3,2,2,0,4,4,6,6, | |
2,5,0,8,4,4,6,6,2,4,2,7,4,4,7,7, | |
6,6,0,8,3,3,5,5,4,2,2,0,4,4,6,6, | |
2,5,0,8,4,4,6,6,2,4,2,7,4,4,7,7, | |
6,6,0,8,3,3,5,5,3,2,2,0,3,4,6,6, | |
2,5,0,8,4,4,6,6,0,4,2,7,4,4,7,7, | |
6,6,0,8,3,3,5,5,4,2,2,0,5,4,6,6, | |
2,5,0,8,4,4,6,6,2,4,2,7,4,4,7,7, | |
2,6,2,6,3,3,3,3,2,2,2,0,4,4,4,4, | |
2,6,0,0,4,4,4,4,2,5,2,0,0,5,0,0, | |
2,6,2,6,3,3,3,3,2,2,2,0,4,4,4,4, | |
2,5,0,5,4,4,4,4,2,4,2,0,4,4,4,4, | |
2,6,2,8,3,3,5,5,2,2,2,0,4,4,6,6, | |
2,5,0,8,4,4,6,6,2,4,2,7,4,4,7,7, | |
2,6,2,8,3,3,5,5,2,2,2,2,4,4,6,6, | |
2,5,0,8,4,4,6,6,2,4,2,7,4,4,7,7, | |
}; | |
static const unsigned char CYCLE_TABLE_BRANCH[0x100] = { | |
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, | |
1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, | |
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, | |
1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, | |
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, | |
1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, | |
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, | |
1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, | |
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, | |
1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, | |
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, | |
1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, | |
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, | |
1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, | |
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, | |
1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, | |
}; | |
static const unsigned char CYCLE_TABLE_PAGECROSS[0x100] = { | |
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, | |
1,1,0,0,0,0,0,0,0,1,0,0,1,1,0,0, | |
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, | |
1,1,0,0,0,0,0,0,0,1,0,0,1,1,0,0, | |
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, | |
1,1,0,0,0,0,0,0,0,1,0,0,1,1,0,0, | |
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, | |
1,1,0,0,0,0,0,0,0,1,0,0,1,1,0,0, | |
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, | |
1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, | |
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, | |
1,1,0,1,0,0,0,0,0,1,0,0,1,1,1,1, | |
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, | |
1,1,0,0,0,0,0,0,0,1,0,0,1,1,0,0, | |
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, | |
1,1,0,0,0,0,0,0,0,1,0,0,1,1,0,0, | |
}; | |
#endif /* CYCLE_TABLE_H */ |
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/*parse_ops - 0.0.1: auto generate C/C++ array from table data*/ | |
#ifndef OPCODE_INFO_TABLE_H | |
#define OPCODE_INFO_TABLE_H | |
enum NesAdressingMode { | |
ADDRESSING_MODE_IMPLIED, | |
ADDRESSING_MODE_ACCUMULATOR, | |
ADDRESSING_MODE_RELATIVE, | |
ADDRESSING_MODE_IMMEDIATE, | |
ADDRESSING_MODE_ABSOLUTE, | |
ADDRESSING_MODE_ABSOLUTE_X, | |
ADDRESSING_MODE_ABSOLUTE_Y, | |
ADDRESSING_MODE_ZEROPAGE, | |
ADDRESSING_MODE_ZEROPAGE_X, | |
ADDRESSING_MODE_ZEROPAGE_Y, | |
ADDRESSING_MODE_INDIRECT, | |
ADDRESSING_MODE_INDIRECT_X, | |
ADDRESSING_MODE_INDIRECT_Y | |
}; | |
struct OpcodeInfo { | |
const char* const name; /* name of the instruction. */ | |
const char* const flags; /* 0 = unset, 1 = set */ | |
const char* const summary; /* short description of the instruction. */ | |
const unsigned char opcode; /* opcode hex value. */ | |
const unsigned char addressing_mode; /* see enum NesAdressingMode. */ | |
const unsigned char length; /* */ | |
const unsigned char cycles; /* how many cycles the instruction takes. */ | |
const unsigned char extra_cycle_on_branch; /* boolean. */ | |
const unsigned char extra_cycle_on_pagecross; /* boolean. */ | |
const unsigned char illegal; /* boolean. */ | |
}; | |
static const char* ADDRESSING_MODE_STR[13] = { | |
"implied", | |
"accumulator", | |
"relative", | |
"immediate", | |
"absolute", | |
"absolute,X", | |
"absolute,Y", | |
"zeropage", | |
"zeropage,X", | |
"zeropage,Y", | |
"(indirect)", | |
"(indirect,X)", | |
"(indirect),Y" | |
}; | |
static const struct OpcodeInfo OPCODE_INFO_TABLE[0x100] = { | |
{"BRK","---1--","Force Break",0x00,0,1,7,0,0,0}, {"ORA","NZ----","OR Memory with Accumulator",0x01,11,2,6,0,0,0}, {"STP","------","Stop program counter (processor lock up)",0x02,0,1,0,0,0,1}, {"SLO","NZC---","Shift left memory then OR A register with result",0x03,11,2,8,0,0,1}, {"DOP","------","No Operation",0x04,7,2,3,0,0,1}, {"ORA","NZ----","OR Memory with Accumulator",0x05,7,2,3,0,0,0}, {"ASL","NZC---","Shift Left One Bit (Memory or Accumulator)",0x06,7,2,5,0,0,0}, {"SLO","NZC---","Shift left memory then OR A register with result",0x07,7,2,5,0,0,1}, {"PHP","------","Push Processor Status on Stack",0x08,0,1,3,0,0,0}, {"ORA","NZ----","OR Memory with Accumulator",0x09,3,2,2,0,0,0}, {"ASL","NZC---","Shift Left One Bit (Memory or Accumulator)",0x0A,1,1,2,0,0,0}, {"-","------","-",0x0B,0,0,0,0,0,0}, {"TOP","------","No Operation",0x0C,4,3,4,0,0,1}, {"ORA","NZ----","OR Memory with Accumulator",0x0D,4,3,4,0,0,0}, {"ASL","NZC---","Shift Left One Bit (Memory or Accumulator)",0x0E,4,3,6,0,0,0}, {"SLO","NZC---","Shift left memory then OR A register with result",0x0F,4,3,6,0,0,1}, | |
{"BPL","------","Branch on Result Plus",0x10,2,2,2,1,1,0}, {"ORA","NZ----","OR Memory with Accumulator",0x11,12,2,5,0,1,0}, {"STP","------","Stop program counter (processor lock up)",0x12,0,1,0,0,0,1}, {"SLO","NZC---","Shift left memory then OR A register with result",0x13,12,2,8,0,0,1}, {"DOP","------","No Operation",0x14,8,2,4,0,0,1}, {"ORA","NZ----","OR Memory with Accumulator",0x15,8,2,4,0,0,0}, {"ASL","NZC---","Shift Left One Bit (Memory or Accumulator)",0x16,8,2,6,0,0,0}, {"SLO","NZC---","Shift left memory then OR A register with result",0x17,8,2,6,0,0,1}, {"CLC","--0---","Clear Carry Flag",0x18,0,1,2,0,0,0}, {"ORA","NZ----","OR Memory with Accumulator",0x19,6,3,4,0,1,0}, {"NOP","------","No Operation",0x1A,0,1,2,0,0,1}, {"SLO","NZC---","Shift left memory then OR A register with result",0x1B,6,3,7,0,0,1}, {"TOP","------","No Operation",0x1C,5,3,4,0,1,1}, {"ORA","NZ----","OR Memory with Accumulator",0x1D,5,3,4,0,1,0}, {"ASL","NZC---","Shift Left One Bit (Memory or Accumulator)",0x1E,5,3,7,0,0,0}, {"SLO","NZC---","Shift left memory then OR A register with result",0x1F,5,3,7,0,0,1}, | |
{"JSR","------","Jump to New Location Saving Return Address",0x20,4,3,6,0,0,0}, {"AND","NZ----","AND Memory with Accumulator",0x21,11,2,6,0,0,0}, {"STP","------","Stop program counter (processor lock up)",0x22,0,1,0,0,0,1}, {"RLA","NZC---","Rotate memory left then AND A register with result",0x23,11,2,8,0,0,1}, {"BIT","NZ---V","Test Bits in Memory with Accumulator",0x24,7,2,3,0,0,0}, {"AND","NZ----","AND Memory with Accumulator",0x25,7,2,3,0,0,0}, {"ROL","NZC---","Rotate One Bit Left (Memory or Accumulator)",0x26,7,2,5,0,0,0}, {"RLA","NZC---","Rotate memory left then AND A register with result",0x27,7,2,5,0,0,1}, {"PLP","NZCIDV","Pull Processor Status from Stack",0x28,0,1,4,0,0,0}, {"AND","NZ----","AND Memory with Accumulator",0x29,3,2,2,0,0,0}, {"ROL","NZC---","Rotate One Bit Left (Memory or Accumulator)",0x2A,1,1,2,0,0,0}, {"-","------","-",0x2B,0,0,0,0,0,0}, {"BIT","NZ---V","Test Bits in Memory with Accumulator",0x2C,4,3,4,0,0,0}, {"AND","NZ----","AND Memory with Accumulator",0x2D,4,3,4,0,0,0}, {"ROL","NZC---","Rotate One Bit Left (Memory or Accumulator)",0x2E,4,3,6,0,0,0}, {"RLA","NZC---","Rotate memory left then AND A register with result",0x2F,4,3,6,0,0,1}, | |
{"BMI","------","Branch on Result Minus",0x30,2,2,2,1,1,0}, {"AND","NZ----","AND Memory with Accumulator",0x31,12,2,5,0,1,0}, {"STP","------","Stop program counter (processor lock up)",0x32,0,1,0,0,0,1}, {"RLA","NZC---","Rotate memory left then AND A register with result",0x33,12,2,8,0,0,1}, {"DOP","------","No Operation",0x34,8,2,4,0,0,1}, {"AND","NZ----","AND Memory with Accumulator",0x35,8,2,4,0,0,0}, {"ROL","NZC---","Rotate One Bit Left (Memory or Accumulator)",0x36,8,2,6,0,0,0}, {"RLA","NZC---","Rotate memory left then AND A register with result",0x37,8,3,6,0,0,1}, {"SEC","--1---","Set Carry Flag",0x38,0,1,2,0,0,0}, {"AND","NZ----","AND Memory with Accumulator",0x39,6,3,4,0,1,0}, {"NOP","------","No Operation",0x3A,0,1,2,0,0,1}, {"RLA","NZC---","Rotate memory left then AND A register with result",0x3B,6,3,7,0,0,1}, {"TOP","------","No Operation",0x3C,5,3,4,0,1,1}, {"AND","NZ----","AND Memory with Accumulator",0x3D,5,3,4,0,1,0}, {"ROL","NZC---","Rotate One Bit Left (Memory or Accumulator)",0x3E,5,3,7,0,0,0}, {"RLA","NZC---","Rotate memory left then AND A register with result",0x3F,5,3,7,0,0,1}, | |
{"RTI","NZCIDV","Return from Interrupt",0x40,0,1,6,0,0,0}, {"EOR","NZ----","Exclusive-OR Memory with Accumulator",0x41,11,2,6,0,0,0}, {"STP","------","Stop program counter (processor lock up)",0x42,0,1,0,0,0,1}, {"SRE","NZC---","Shift right memory then EOR A register with result",0x43,11,2,8,0,0,1}, {"DOP","------","No Operation",0x44,7,2,3,0,0,1}, {"EOR","NZ----","Exclusive-OR Memory with Accumulator",0x45,7,2,3,0,0,0}, {"LSR","0ZC---","Shift One Bit Right (Memory or Accumulator)",0x46,7,2,5,0,0,0}, {"SRE","NZC---","Shift right memory then EOR A register with result",0x47,7,2,5,0,0,1}, {"PHA","------","Push Accumulator on Stack",0x48,0,1,3,0,0,0}, {"EOR","NZ----","Exclusive-OR Memory with Accumulator",0x49,3,2,2,0,0,0}, {"LSR","0ZC---","Shift One Bit Right (Memory or Accumulator)",0x4A,1,1,2,0,0,0}, {"-","------","-",0x4B,0,0,0,0,0,0}, {"JMP","------","Jump to New Location",0x4C,4,3,3,0,0,0}, {"EOR","NZ----","Exclusive-OR Memory with Accumulator",0x4D,4,3,4,0,0,0}, {"LSR","0ZC---","Shift One Bit Right (Memory or Accumulator)",0x4E,4,3,6,0,0,0}, {"SRE","NZC---","Shift right memory then EOR A register with result",0x4F,4,3,6,0,0,1}, | |
{"BVC","------","Branch on Overflow Clear",0x50,2,2,2,1,1,0}, {"EOR","NZ----","Exclusive-OR Memory with Accumulator",0x51,12,2,5,0,1,0}, {"STP","------","Stop program counter (processor lock up)",0x52,0,1,0,0,0,1}, {"SRE","NZC---","Shift right memory then EOR A register with result",0x43,12,2,8,0,0,1}, {"DOP","------","No Operation",0x54,8,2,4,0,0,1}, {"EOR","NZ----","Exclusive-OR Memory with Accumulator",0x55,8,2,4,0,0,0}, {"LSR","0ZC---","Shift One Bit Right (Memory or Accumulator)",0x56,8,2,6,0,0,0}, {"SRE","NZC---","Shift right memory then EOR A register with result",0x57,8,2,6,0,0,1}, {"-","------","-",0x58,0,0,0,0,0,0}, {"EOR","NZ----","Exclusive-OR Memory with Accumulator",0x59,6,3,4,0,1,0}, {"NOP","------","No Operation",0x5A,0,1,2,0,0,1}, {"SRE","NZC---","Shift right memory then EOR A register with result",0x5B,6,3,7,0,0,1}, {"TOP","------","No Operation",0x5C,5,3,4,0,1,1}, {"EOR","NZ----","Exclusive-OR Memory with Accumulator",0x5D,5,3,4,0,1,0}, {"LSR","0ZC---","Shift One Bit Right (Memory or Accumulator)",0x5E,5,3,7,0,0,0}, {"SRE","NZC---","Shift right memory then EOR A register with result",0x5F,5,3,7,0,0,1}, | |
{"RTS","------","Return from Subroutine",0x60,0,1,6,0,0,0}, {"ADC","NZC--V","Add Memory to Accumulator with Carry",0x61,11,2,6,0,0,0}, {"STP","------","Stop program counter (processor lock up)",0x62,0,1,0,0,0,1}, {"RRA","NZC--V","Rotate memory right then ADC A register with result",0x63,11,2,8,0,0,1}, {"DOP","------","No Operation",0x64,7,2,3,0,0,1}, {"ADC","NZC--V","Add Memory to Accumulator with Carry",0x65,7,2,3,0,0,0}, {"ROR","NZC---","Rotate One Bit Right (Memory or Accumulator)",0x66,7,2,5,0,0,0}, {"RRA","NZC--V","Rotate memory right then ADC A register with result",0x67,7,2,5,0,0,1}, {"PLA","NZ----","Pull Accumulator from Stack",0x68,0,1,4,0,0,0}, {"ADC","NZC--V","Add Memory to Accumulator with Carry",0x69,3,2,2,0,0,0}, {"ROR","NZC---","Rotate One Bit Right (Memory or Accumulator)",0x6A,1,1,2,0,0,0}, {"-","------","-",0x6B,0,0,0,0,0,0}, {"JMP","------","Jump to New Location",0x6C,10,3,5,0,0,0}, {"ADC","NZC--V","Add Memory to Accumulator with Carry",0x6D,4,3,4,0,0,0}, {"ROR","NZC---","Rotate One Bit Right (Memory or Accumulator)",0x6E,4,3,6,0,0,0}, {"RRA","NZC--V","Rotate memory right then ADC A register with result",0x6F,4,3,6,0,0,1}, | |
{"BVS","------","Branch on Overflow Set",0x70,2,2,2,1,1,0}, {"ADC","NZC--V","Add Memory to Accumulator with Carry",0x71,12,2,5,0,1,0}, {"STP","------","Stop program counter (processor lock up)",0x72,0,1,0,0,0,1}, {"RRA","NZC--V","Rotate memory right then ADC A register with result",0x73,12,2,8,0,0,1}, {"DOP","------","No Operation",0x74,8,2,4,0,0,1}, {"ADC","NZC--V","Add Memory to Accumulator with Carry",0x75,8,2,4,0,0,0}, {"ROR","NZC---","Rotate One Bit Right (Memory or Accumulator)",0x76,8,2,6,0,0,0}, {"RRA","NZC--V","Rotate memory right then ADC A register with result",0x77,7,2,6,0,0,1}, {"SEI","---1--","Set Interrupt Disable Status",0x78,0,1,2,0,0,0}, {"ADC","NZC--V","Add Memory to Accumulator with Carry",0x79,6,3,4,0,1,0}, {"NOP","------","No Operation",0x7A,0,1,2,0,0,1}, {"RRA","NZC--V","Rotate memory right then ADC A register with result",0x7B,6,3,7,0,0,1}, {"TOP","------","No Operation",0x7C,5,3,4,0,1,1}, {"ADC","NZC--V","Add Memory to Accumulator with Carry",0x7D,5,3,4,0,1,0}, {"ROR","NZC---","Rotate One Bit Right (Memory or Accumulator)",0x7E,5,3,7,0,0,0}, {"RRA","NZC--V","Rotate memory right then ADC A register with result",0x7F,5,3,7,0,0,1}, | |
{"DOP","------","No Operation",0x80,3,2,2,0,0,1}, {"STA","------","Store Accumulator in Memory",0x81,11,2,6,0,0,0}, {"DOP","------","No Operation",0x82,3,2,2,0,0,1}, {"SAX","------","AND X register with accumulator and store result in memory",0x83,11,2,6,0,0,1}, {"STY","------","Store Index Y in Memory",0x84,7,2,3,0,0,0}, {"STA","------","Store Accumulator in Memory",0x85,7,2,3,0,0,0}, {"STX","------","Store Index X in Memory",0x86,7,2,3,0,0,0}, {"SAX","------","AND X register with accumulator and store result in memory",0x87,7,2,3,0,0,1}, {"DEY","NZ----","Decrement Index Y by One",0x88,0,1,2,0,0,0}, {"DOP","------","No Operation",0x89,3,2,2,0,0,1}, {"TXA","NZ----","Transfer Index X to Accumulator",0x8A,0,1,2,0,0,0}, {"-","------","-",0x8B,0,0,0,0,0,0}, {"STY","------","Store Index Y in Memory",0x8C,4,3,4,0,0,0}, {"STA","------","Store Accumulator in Memory",0x8D,4,3,4,0,0,0}, {"STX","------","Store Index X in Memory",0x8E,4,3,4,0,0,0}, {"SAX","------","AND X register with accumulator and store result in memory",0x8F,4,3,4,0,0,1}, | |
{"BCC","------","Branch on Carry Clear",0x90,2,2,2,1,1,0}, {"STA","------","Store Accumulator in Memory",0x91,12,2,6,0,0,0}, {"STP","------","Stop program counter (processor lock up)",0x92,0,1,0,0,0,1}, {"-","------","-",0x93,0,0,0,0,0,0}, {"STY","------","Store Index Y in Memory",0x94,8,2,4,0,0,0}, {"STA","------","Store Accumulator in Memory",0x95,8,2,4,0,0,0}, {"STX","------","Store Index X in Memory",0x96,9,2,4,0,0,0}, {"SAX","------","AND X register with accumulator and store result in memory",0x97,9,2,4,0,0,1}, {"TYA","------","Transfer Index Y to Accumulator",0x98,0,1,2,0,0,0}, {"STA","------","Store Accumulator in Memory",0x99,6,3,5,0,0,0}, {"TXS","------","Transfer Index X to Stack Register",0x9A,0,1,2,0,0,0}, {"-","------","-",0x9B,0,0,0,0,0,0}, {"-","------","-",0x9C,0,0,0,0,0,0}, {"STA","------","Store Accumulator in Memory",0x9D,5,3,5,0,0,0}, {"-","------","-",0x9E,0,0,0,0,0,0}, {"-","------","-",0x9F,0,0,0,0,0,0}, | |
{"LDY","NZ----","Load Index Y with Memory",0xA0,3,2,2,0,0,0}, {"LDA","NZ----","Load Accumulator with Memory",0xA1,11,2,6,0,0,0}, {"LDX","NZ----","Load Index X with Memory",0xA2,3,2,2,0,0,0}, {"LAX","NZ----","Load accumulator and X register with memory",0xA3,11,2,6,0,0,1}, {"LDY","NZ----","Load Index Y with Memory",0xA4,7,2,3,0,0,0}, {"LDA","NZ----","Load Accumulator with Memory",0xA5,7,2,3,0,0,0}, {"LDX","NZ----","Load Index X with Memory",0xA6,7,2,3,0,0,0}, {"LAX","NZ----","Load accumulator and X register with memory",0xA7,7,2,3,0,0,1}, {"TAY","NZ----","Transfer Accumulator to Index Y",0xA8,0,1,2,0,0,0}, {"LDA","NZ----","Load Accumulator with Memory",0xA9,3,2,2,0,0,0}, {"TAX","NZ----","Transfer Accumulator to Index X",0xAA,0,1,2,0,0,0}, {"-","------","-",0xAB,0,0,0,0,0,0}, {"LDY","NZ----","Load Index Y with Memory",0xAC,4,3,4,0,0,0}, {"LDA","NZ----","Load Accumulator with Memory",0xAD,4,3,4,0,0,0}, {"LDX","NZ----","Load Index X with Memory",0xAE,4,3,4,0,0,0}, {"LAX","NZ----","Load accumulator and X register with memory",0xAF,4,3,4,0,0,1}, | |
{"BCS","------","Branch on Carry Set",0xB0,2,2,2,1,1,0}, {"LDA","NZ----","Load Accumulator with Memory",0xB1,12,2,5,0,1,0}, {"STP","------","Stop program counter (processor lock up)",0xB2,0,1,0,0,0,1}, {"LAX","NZ----","Load accumulator and X register with memory",0xB3,12,2,5,0,1,1}, {"LDY","NZ----","Load Index Y with Memory",0xB4,8,2,4,0,0,0}, {"LDA","NZ----","Load Accumulator with Memory",0xB5,8,2,4,0,0,0}, {"LDX","NZ----","Load Index X with Memory",0xB6,9,2,4,0,0,0}, {"LAX","NZ----","Load accumulator and X register with memory",0xB7,9,2,4,0,0,1}, {"CLV","-----0","Clear Overflow Flag",0xB8,0,1,2,0,0,0}, {"LDA","NZ----","Load Accumulator with Memory",0xB9,6,3,4,0,1,0}, {"TSX","NZ----","Transfer Stack Pointer to Index X",0xBA,0,1,2,0,0,0}, {"-","------","-",0xBB,0,0,0,0,0,0}, {"LDY","NZ----","Load Index Y with Memory",0xBC,5,3,4,0,1,0}, {"LDA","NZ----","Load Accumulator with Memory",0xBD,5,3,4,0,1,0}, {"LDX","NZ----","Load Index X with Memory",0xBE,6,3,4,0,1,0}, {"LAX","NZ----","Load accumulator and X register with memory",0xBF,6,3,4,0,1,1}, | |
{"CPY","NZC---","Compare Memory and Index Y",0xC0,3,2,2,0,0,0}, {"CMP","NZC---","Compare Memory with Accumulator",0xC1,11,2,6,0,0,0}, {"DOP","------","No Operation",0xC2,3,2,2,0,0,1}, {"DCP","NZC---","DEC memory then CMP result with A register",0xC3,11,2,8,0,0,1}, {"CPY","NZC---","Compare Memory and Index Y",0xC4,7,2,3,0,0,0}, {"CMP","NZC---","Compare Memory with Accumulator",0xC5,7,2,3,0,0,0}, {"DEC","NZ----","Decrement Memory by One",0xC6,7,2,5,0,0,0}, {"DCP","NZC---","DEC memory then CMP result with A register",0xC7,7,2,5,0,0,1}, {"INY","NZ----","Increment Index Y by One",0xC8,0,1,2,0,0,0}, {"CMP","NZC---","Compare Memory with Accumulator",0xC9,3,2,2,0,0,0}, {"DEX","NZ----","Decrement Index X by One",0xCA,0,1,2,0,0,0}, {"-","------","-",0xCB,0,0,0,0,0,0}, {"CPY","NZC---","Compare Memory and Index Y",0xCC,4,3,4,0,0,0}, {"CMP","NZC---","Compare Memory with Accumulator",0xCD,4,3,4,0,0,0}, {"DEC","NZ----","Decrement Memory by One",0xCE,4,3,6,0,0,0}, {"DCP","NZC---","DEC memory then CMP result with A register",0xCF,4,3,6,0,0,1}, | |
{"BNE","------","Branch on Result not Zero",0xD0,2,2,2,1,1,0}, {"CMP","NZC---","Compare Memory with Accumulator",0xD1,12,2,5,0,1,0}, {"STP","------","Stop program counter (processor lock up)",0xD2,0,1,0,0,0,1}, {"DCP","NZC---","DEC memory then CMP result with A register",0xD3,12,2,8,0,0,1}, {"DOP","------","No Operation",0xD4,8,2,4,0,0,1}, {"CMP","NZC---","Compare Memory with Accumulator",0xD5,8,2,4,0,0,0}, {"DEC","NZ----","Decrement Memory by One",0xD6,8,2,6,0,0,0}, {"DCP","NZC---","DEC memory then CMP result with A register",0xD7,8,2,6,0,0,1}, {"CLD","----0-","Clear Decimal Mode",0xD8,0,1,2,0,0,0}, {"CMP","NZC---","Compare Memory with Accumulator",0xD9,6,3,4,0,1,0}, {"NOP","------","No Operation",0xDA,0,1,2,0,0,1}, {"DCP","NZC---","DEC memory then CMP result with A register",0xDB,6,3,7,0,0,1}, {"TOP","------","No Operation",0xDC,5,3,4,0,1,1}, {"CMP","NZC---","Compare Memory with Accumulator",0xDD,5,3,4,0,1,0}, {"DEC","NZ----","Decrement Memory by One",0xDE,5,3,7,0,0,0}, {"DCP","NZC---","DEC memory then CMP result with A register",0xDF,5,3,7,0,0,1}, | |
{"CPX","NZC---","Compare Memory and Index X",0xE0,3,2,2,0,0,0}, {"SBC","NZC--V","Subtract Memory from Accumulator with Borrow",0xE1,11,2,6,0,0,0}, {"NOP","------","No Operation",0xE2,3,2,2,0,0,1}, {"ISC","NZC--V","INC memory then SBC A register from result",0xE3,11,2,8,0,0,1}, {"CPX","NZC---","Compare Memory and Index X",0xE4,7,2,3,0,0,0}, {"SBC","NZC--V","Subtract Memory from Accumulator with Borrow",0xE5,7,2,3,0,0,0}, {"INC","NZ----","Increment Memory by One",0xE6,7,2,5,0,0,0}, {"ISC","NZC--V","INC memory then SBC result with A register",0xE7,7,2,5,0,0,1}, {"INX","NZ----","Increment Index X by One",0xE8,0,1,2,0,0,0}, {"SBC","NZC--V","Subtract Memory from Accumulator with Borrow",0xE9,3,2,2,0,0,0}, {"NOP","------","No Operation",0xEA,0,1,2,0,0,0}, {"SBC","NZC--V","Subtract Memory from Accumulator with Borrow",0xEB,3,2,2,0,0,1}, {"CPX","NZC---","Compare Memory and Index X",0xEC,4,3,4,0,0,0}, {"SBC","NZC--V","Subtract Memory from Accumulator with Borrow",0xED,4,3,4,0,0,0}, {"INC","NZ----","Increment Memory by One",0xEE,4,3,6,0,0,0}, {"ISC","NZC--V","INC memory then SBC result with A register",0xEF,4,3,6,0,0,1}, | |
{"BEQ","------","Branch on Result Zero",0xF0,2,2,2,1,1,0}, {"SBC","NZC--V","Subtract Memory from Accumulator with Borrow",0xF1,12,2,5,0,1,0}, {"STP","------","Stop program counter (processor lock up)",0xF2,0,1,0,0,0,1}, {"ISC","NZC--V","INC memory then SBC result with A register",0xF3,12,2,8,0,0,1}, {"DOP","------","No Operation",0xF4,8,2,4,0,0,1}, {"SBC","NZC--V","Subtract Memory from Accumulator with Borrow",0xF5,8,2,4,0,0,0}, {"INC","NZ----","Increment Memory by One",0xF6,8,2,6,0,0,0}, {"ISC","NZC--V","INC memory then SBC result with A register",0xF7,8,2,6,0,0,1}, {"SED","----1-","Set Decimal Flag",0xF8,0,1,2,0,0,0}, {"SBC","NZC--V","Subtract Memory from Accumulator with Borrow",0xF9,6,3,4,0,1,0}, {"NOP","------","No Operation",0xFA,0,1,2,0,0,1}, {"ISC","NZC--V","INC memory then SBC result with A register",0xFB,6,3,7,0,0,1}, {"TOP","------","No Operation",0xFC,5,3,4,0,1,1}, {"SBC","NZC--V","Subtract Memory from Accumulator with Borrow",0xFD,5,3,4,0,1,0}, {"INC","NZ----","Increment Memory by One",0xFE,5,3,7,0,0,0}, {"ISC","NZC--V","INC memory then SBC result with A register",0xFF,5,3,7,0,0,1}, | |
}; | |
#endif /* OPCODE_INFO_TABLE_H */ |
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