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September 8, 2022 16:37
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Star64 Tinymembench
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| tinymembench v0.4.9 (simple benchmark for memory throughput and latency) | |
| ========================================================================== | |
| == Memory bandwidth tests == | |
| == == | |
| == Note 1: 1MB = 1000000 bytes == | |
| == Note 2: Results for 'copy' tests show how many bytes can be == | |
| == copied per second (adding together read and writen == | |
| == bytes would have provided twice higher numbers) == | |
| == Note 3: 2-pass copy means that we are using a small temporary buffer == | |
| == to first fetch data into it, and only then write it to the == | |
| == destination (source -> L1 cache, L1 cache -> destination) == | |
| == Note 4: If sample standard deviation exceeds 0.1%, it is shown in == | |
| == brackets == | |
| ========================================================================== | |
| C copy backwards : 890.4 MB/s | |
| C copy backwards (32 byte blocks) : 888.8 MB/s | |
| C copy backwards (64 byte blocks) : 889.1 MB/s | |
| C copy : 889.9 MB/s | |
| C copy prefetched (32 bytes step) : 888.6 MB/s | |
| C copy prefetched (64 bytes step) : 888.4 MB/s | |
| C 2-pass copy : 767.1 MB/s (0.2%) | |
| C 2-pass copy prefetched (32 bytes step) : 763.1 MB/s (0.2%) | |
| C 2-pass copy prefetched (64 bytes step) : 760.4 MB/s | |
| C fill : 926.3 MB/s (0.4%) | |
| C fill (shuffle within 16 byte blocks) : 929.0 MB/s (0.4%) | |
| C fill (shuffle within 32 byte blocks) : 929.4 MB/s (0.4%) | |
| C fill (shuffle within 64 byte blocks) : 922.1 MB/s (0.2%) | |
| --- | |
| standard memcpy : 888.5 MB/s | |
| standard memset : 932.2 MB/s (0.6%) | |
| ========================================================================== | |
| == Memory latency test == | |
| == == | |
| == Average time is measured for random memory accesses in the buffers == | |
| == of different sizes. The larger is the buffer, the more significant == | |
| == are relative contributions of TLB, L1/L2 cache misses and SDRAM == | |
| == accesses. For extremely large buffer sizes we are expecting to see == | |
| == page table walk with several requests to SDRAM for almost every == | |
| == memory access (though 64MiB is not nearly large enough to experience == | |
| == this effect to its fullest). == | |
| == == | |
| == Note 1: All the numbers are representing extra time, which needs to == | |
| == be added to L1 cache latency. The cycle timings for L1 cache == | |
| == latency can be usually found in the processor documentation. == | |
| == Note 2: Dual random read means that we are simultaneously performing == | |
| == two independent memory accesses at a time. In the case if == | |
| == the memory subsystem can't handle multiple outstanding == | |
| == requests, dual random read has the same timings as two == | |
| == single reads performed one after another. == | |
| ========================================================================== | |
| block size : single random read / dual random read | |
| 1024 : 0.0 ns / 0.0 ns | |
| 2048 : 0.0 ns / 0.0 ns | |
| 4096 : 0.0 ns / 0.0 ns | |
| 8192 : 0.0 ns / 0.0 ns | |
| 16384 : 0.0 ns / 0.0 ns | |
| 32768 : 0.0 ns / 0.0 ns | |
| 65536 : 6.5 ns / 12.6 ns | |
| 131072 : 9.7 ns / 19.1 ns | |
| 262144 : 11.4 ns / 22.4 ns | |
| 524288 : 18.5 ns / 34.4 ns | |
| 1048576 : 19.2 ns / 36.8 ns | |
| 2097152 : 25.8 ns / 46.5 ns | |
| 4194304 : 89.8 ns / 177.4 ns | |
| 8388608 : 129.6 ns / 256.2 ns | |
| 16777216 : 151.8 ns / 301.7 ns | |
| 33554432 : 166.3 ns / 331.1 ns | |
| 67108864 : 177.2 ns / 353.6 ns |
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