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John-K/PSP HW Regs.md

Last active January 17, 2023 02:31
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PSP 0xBCxxxxxx Register Descriptions
Raw
PSP HW Regs.md

0xbc10003c

  • 0x1 - sceSysreg_driver_0x4841B2D2(int) (set), sceSysreg_driver_0x4E5C86AA (read, clear, restore)
    • also if (int == 0) reg &= 0xe0000000
  • 0x1 - sceSysregDoTimerEvent(0, 1 or 3) (set), sceSysregDoTimerEvent(0, 0 or 2) (clear)
  • 0x2 - sceSysregDoTimerEvent(1, 1 or 3) (set), sceSysregDoTimerEvent(1, 0 or 2) (clear)

0xbc100040

  • (>> 8) - sceSysregGetTachyonVersion
  • 0x100 - sceSysregSetAwEdramSize(arg1)
    • if (tachyonVersion >= 0x500000)
    • ret = ((0xbc100040 & 0x800) != 0)
    • if (arg1 == 0) reg &= 0xFF
    • else reg |= 0x100

0xbc100044

  • 0x1 - sceSysregInterruptToOther
  • sceSysregSetMasterPriv(arg1, enable)
    • if (enable == 0) reg &= ~arg1
    • else reg |= arg1

0xbc100048

  • sceSysreg_driver_0x0143E8A8
    • called from sceSysreg_driver_0x554E97F7
    • reg = getCopReg(0,CpuId) + 1
    • if ~(reg & 3) return 0
    • else return -1
  • set to 0 by sceSysregSemaUnlock
    • called from sceSysreg_driver_0x554E97F7

0xbc10004C

  • 0x1 - sceSysregTopResetEnable
  • 0x4 - sceSysregMeResetEnable / Disable
  • 0x8 - sceSysregAwResetEnable / Disable
  • 0x10 - sceSysregVmeResetEnable / Disable
  • 0x20 - sceSysregAvcResetEnable / Disable
  • 0x40 - sceSysregUsbResetEnable / Disable
  • 0x80 - sceSysregAtaResetEnable / Disable
  • 0x100 - sceSysregMsifResetEnable(0) / Disable
  • 0x200 - sceSysregMsifResetEnable(1) / Disable
  • 0x400 - sceSysregKirkResetDisable / Enable
  • 0x1000 - sceSysregAtahddResetEnable / Disable
  • 0x2000 - sceSysregUsbhostResetEnable / Disable
  • 0x4000 - sceSysreg_driver_0x0995F8F6(0) (clear), sceSysreg_driver_0xC6C75585(0) (set)
  • 0x8000 - sceSysreg_driver_0x0995F8F6(1) (clear), sceSysreg_driver_0xC6C75585(1) (set)
  • 0x10000 - sceSysreg_driver_0x32E02FDF (clear), sceSysreg_driver_0x72887197 (set)

0xbc100050

  • 0x7 - (bits 0-2) sceSysregMsifDelaySelect(0, 0-7)
  • 0x8 -
  • 0x70 - (bits 5-7) sceSysregMsifDelaySelect(1, 0-7)
  • 0x80 - sceSysregKirkBusClockDisable / Enable
  • 0x100 - sceSysregAtaBusClockDisable
  • 0x200 - sceSysregUsbBusClockDisable / Enable
  • 0x400 - sceSysregMsifBusClockEnable(0) / Disable
  • 0x800 - sceSysregMsifBusClockEnable(1) / Disable
  • 0x1000 - sceSysregEmcddrBusClockEnable / Disable
  • 0x2000 - sceSysregEmcsmBusClockDisable / Enable
  • 0x4000 - sceSysregApbBusClockEnable / Disable
  • 0x8000 - sceSysregAudioBusClockDisable(0) / Enable
  • 0x10000 - sceSysregAudioBusClockDisable(1) / Enable
  • 0x20000 - sceSysregAtahddBusClockDisable / Enable
  • 0x40000 - sceSysregUsbhostBusClockEnable
  • 0x80000 - sceSysreg_driver_0x3BB0B2C8(0) (set), sceSysreg_driver_0x76E57DC6(0) (clear)
  • 0x100000 - sceSysreg_driver_0x3BB0B2C8(1) (set), sceSysreg_driver_0x76E57DC6(1) (clear)

0xbc100054

  • 0x1 - sceSysregAtaClkEnable / Disable
  • 0x2 - sceSysregAtahddClkEnable / Disable
  • 0x10 - sceSysreg_driver_0xC9585F8E (clear), sceSysreg_driver_0xFC0131A7 (set)
  • 0x80 - sceSysreg_driver_0xC9585F8E (clear), sceSysreg_driver_0xFC0131A7 (set)
  • 0x100 - sceSysregMsifClkDisable(0) / Enable
  • 0x200 - sceSysregMsifClkDisable(1) / Enable
  • 0x1000 - sceSysregEmcddrBusClockEnable
  • 0x10000 - sceSysregUsbhostClkEnable / Disable
  • 0x1000000 - sceSysreg_driver_0xA7C82BDD(0) (set), sceSysreg_driver_0xFF0E07B1(0) (clear)
  • 0x2000000 - sceSysreg_driver_0xA7C82BDD(1) (set), sceSysreg_driver_0xFF0E07B1(1) (clear)
  • sceSysreg_driver_0x14EB1393
    • if 0xbc100040 bit 31 is set, clears bits 0x4010010, else clears bits 0x10080
  • sceSysreg_driver_0x68AE6434
    • if 0xbc100040 bit 31 is set, sets bits 0x4010010, else sets bits 0x10080
  • sceSysregUsbClkDisable(arg1)
    • reg = (reg & 0xf) | (((reg << 0x18) >> 0x1c) | arg1) << 4)
  • sceSysregUsbClkEnable(arg1)
    • reg = (reg & 0xf) | (((reg << 0x18) >> 0x1c) | arg1) << 4)
      • verify the above two, they shouldn't be the same
  • sceSysreg_driver_0xC9585F8E
    • if 0xbc100040 & 0x80000000
    • reg &= ~(0x10) (clear bit 4)
    • else reg &= ~(0x90) (clear bits 4 & 7)
  • sceSysreg_driver_0xFC0131A7
    • if 0xbc100040 & 0x80000000
    • reg = reg & ~(0x10) | 0x10 (set bit 4)
    • else reg = reg & ~(0x90) | 0x90 (set bits 4 & 7)

0xbc100058

  • 0x1 - sceSysregSpiClkEnable(0)
  • 0x2 - sceSysregSpiClkEnable(1)
  • 0x4 - sceSysregSpiClkEnable(2)
  • 0x8 - sceSysregSpiClkEnable(3)
  • 0x10 - sceSysregSpiClkEnable(4)
  • 0x20 - sceSysregSpiClkEnable(5)
  • 0x40 - sceSysregUartClkEnable(0)
  • 0x80 - sceSysregUartClkEnable(1)
  • 0x100 - sceSysregUartClkEnable(2)
  • 0x200 - sceSysregUartClkEnable(3)
  • 0x400 - sceSysregUartClkEnable(4)
  • 0x800 - sceSysregUartClkEnable(5)
  • 0x1000 - sceSysregApbTimerClkEnable(0) / Disable
  • 0x2000 - sceSysregApbTimerClkEnable(1) / Disable
  • 0x4000 - sceSysregApbTimerClkEnable(2) / Disable
  • 0x8000 - sceSysregApbTimerClkEnable(3) / Disable
  • 0x10000 - sceSysregAudioClkDisable(0) / Enable
  • 0x20000 - sceSysregAudioClkDisable(1) / Enable
  • 0x400000 - sceSysregSircsClkEnable
  • 0x800000 - sceSysregGpioClkEnable / Disable
  • 0x1000000 - sceSysregAudioClkoutClkEnable / Disable
  • 0x2000000 - sceSysreg_driver_0xB6296512 (clear), sceSysreg_driver_0xF9C93DD4 (set)

0xbc10005C

  • sceSysregMsifClkSelect(0-1, 0-2)
    • (3 << (arg1 << 1)) | (arg2 << (arg1 << 1))
  • sceSysregAtahddClkSelect(0-2)
    • = reg & 0xff | param_1 << 8
  • sceSysregAtaClkSelect(0-2)
    • = reg & 0xF | param_1 << 4
  • sceSysreg_driver_0xC2F3061F(0-1, 0-3)
    • temp = 2 * arg1 + 10
    • reg = (reg & ~(3 << temp)) | arg2 << temp)
    • clears 2 bits and then sets, 0, either, or both of them

0xbc100060

  • 0x40000 - sceSysregAudioClkoutClkSelect
    • (nothing after this? above does (reg & 0x3ffff | (1 << 0x12))
  • 0x1000000 - sceSysreg_driver_0x434E8AF1(0 or 1)
    • does (reg & 0xffffff | param_1 << 0x18)
  • sceSysregApbTimerClkSelect(0-3, 0-7)
    • ` reg &= ~(7 << ((param_1 << 2) & 0x1f)) | param_2 << ((param_1 << 2) & 0x1f);
  • sceSysregAudioClkSelect(0-1, 0-1)
    • temp = 2 * arg1 + 10
    • reg = (reg & ~(3 << temp)) | arg2 << temp)
    • clears 2 bits and then sets, 0, either, or both of them
    • same as sceSysreg_driver_0xC2F3061F

0xbc100064

  • see sceSysregSpiClkSelect

0xbc100068

  • 0xF - sceSysregPllGetOutSelect, sceSysregPllSetOutSelect(0-6)

0xbc100074

  • 0x1 - sceSysreg_driver_0x33EE43F0(0) (clear), sceSysreg_driver_0x6DA9347D(0) (set)
  • 0x2 - sceSysreg_driver_0x33EE43F0(1) (clear), sceSysreg_driver_0x9E2F8FD5(0) (clear)
  • 0x2 - sceSysreg_driver_4C0BED71(0) (set) -- (unsure here, seems strange)
  • 0x10 - sceSysreg_driver_4C0BED71(1) (set), sceSysreg_driver_0x6DA9347D(1) (set)
  • 0x20 - sceSysreg_driver_0x9E2F8FD5(1) (clear)
  • 0x100 - sceSysreg_driver_0x1561BCD (set), sceSysreg_driver_0x9275DD37 (clear)
  • 0x10000 - sceSysreg_driver_0x84E0F197(0) (set)
  • 0x40000 - sceSysreg_driver_0x84E0F197(1) (set)
  • sceSysreg_driver_0x9E2F8FD5(0) (clear)
  • sceSysreg_driver_0x9E2F8FD5(1) (clear)

0xbc100078

  • 0x2 - sceSysregEmcsmIoEnable, sceSysregEmcsmIoDisable
  • 0x4 - sceSysregUsbIoEnable / Disable
    • called by sceSysreg_driver_0x15786501
    • called by sceSysreg_driver_0x87B61303
  • 0x8 - sceSysregAtaIoEnable / Disable
  • 0x10 - sceSysregMsifIoDisable(0) / Enable
  • 0x20 - sceSysregMsifIoDisable(1) / Enable
  • 0x80 - sceSysregAudioIoEnable(0) / Disable
  • 0x100 - sceSysregAudioIoEnable(1) / Disable
  • 0x400 - sceSysregSircsIoEnable
  • 0x800 - sceSysregAudioClkoutIoEnable / Disable
  • 0x4000 - sceSysregAtahddIoEnable / Disable
  • 0x8000 - sceSysreg_driver_0x6F3B6D7D and sceSysreg_driver_0x87B61303 (both set), sceSysreg_driver_0x87B6130 (clear)
    • when PSP >= 4g Tachyon Version
  • 0x10000 - sceSysregUartIoEnable(0)
  • 0x20000 - sceSysregUartIoEnable(1)
  • 0x40000 - sceSysregUartIoEnable(2)
  • 0x80000 - sceSysregUartIoEnable(3)
  • 0x100000 - sceSysregUartIoEnable(4)
  • 0x200000 - sceSysregUartIoEnable(5)
  • 0x400000 - sceSysreg_driver_0x19F4C92D(0) (set), sceSysreg_driver_0xDA5B5ED9(0) (clear)
  • 0x800000 - sceSysreg_driver_0x19F4C92D(1) (set), sceSysreg_driver_0xDA5B5ED9(1) (clear)
  • 0x1000000 - sceSysregSpiIoEnable(0)
  • 0x2000000 - sceSysregSpiIoEnable(1)
  • 0x4000000 - sceSysregSpiIoEnable(2)
  • 0x8000000 - sceSysregSpiIoEnable(3)
  • 0x10000000 - sceSysregSpiIoEnable(4)
  • 0x20000000 - sceSysregSpiIoEnable(5)
  • 0x40000000 - sceSysreg_driver_0x0607A4C4 (set), sceSysreg_driver_0x803E5F37 (clear)

0xbc10007c

  • sceGpioSetPortMode calls sceSysregGpioIoEnable or sceSysregGpioIoDisable

0xbc100080

  • 0x1 - sceSysregUsbGetConnectStatus returns this bit
  • 0x2 - UsbIntr (see sceSysregUsbAcquireIntr and sceSysregUsbQueryIntr)
  • 0x4 - UsbIntr
  • 0x8 - UsbIntr
  • 0x100 - MemoryStick0 Connect Status (see sceSysregMsifGetConnectStatus)
  • 0x200 - MemoryStick1 Connect Status
  • 0x200 - MemoryStick0 Connect Intr (see sceSysregMsifQueryConnectIntr)
  • 0x400 - MemoryStick0 Connect Intr
  • 0x800 - MemoryStick0 Connect Intr
  • 0x1000 - MemoryStick1 Connect Intr
  • 0x2000 - MemoryStick1 Connect Intr
  • 0x4000 - MemoryStick1 Connect Intr
  • sceSysregMsifAcquireConnectIntr(0-1, int)
    • writes int to the three interrupts of MS0 or MS1
  • sceSysregUsbQueryIntr()
    • extract bits 1,2,3 and return

0xbc100090

  • sceSysregGetFuseId

0xbc100094

  • sceSysregGetFuseId

0xbc100098

  • sceSysregGetFuseConfig

0xbc1000b0

  • sceSysregUsbhostAcquireIntr(arg1)
    • = (reg & 7) & arg1
  • sceSysregUsbhostQueryIntr
    • return reg & 7

0xbc1000e8

  • sceSysreg_driver_0x6596EBC3(0-5, 0-2)
    • reg &= ~(3 << ((param_1 << 1)& 0x1f)) | param_2 << ((param_1 << 1) & 0x1f)

0xbc100100

  • sceSysreg_driver_0x434E8AF1(1)
    • when reg & 1, does reg & 0xe0000000
  • sceSysreg_driver_0x434E8AF1(0)
    • if ((0xbc1000e8 & 0xaaa) == 0) && ((0xbc100060 & 0x300000) != 0x300000) && ((0xbc100100 & 1) == 0)
      • reg |= 0x1
  • sceSysreg_driver_0x6596EBC3(0-5, 0-2)
    • if (reg & 1 && param2 == 2) reg &= 0xe0000000
    • if (bc1000e8 & 0xaaa) == 0 &&
      • (bc100060 & 0x300000) != 0x300000 &&
      • (bc100060 & 0x1000000) == 0 &&
      • (bc100100 & 1) == 0
        • then bc100100 |= _1

0xbc200000

  • sceSysreg_driver_0x2458B6AC (read)
  • sceSysreg_driver_0x3F6F2CC7 (write)

0xbc200004

  • sceSysreg_driver_0x63E1EE9C(0-0x1FF, arg2 !=0 && >= arg1)
    • reg = (param_1 & 0x1ff) << 0x10 | param_2 & 0x1ff;
  • sceSysreg_driver_0x7CF05E81(*arg1, *arg2)
    • *arg1 = (bc200004 << 7) >> 0x17
    • *arg2 = (bc200004 & 0x1ff)

0xBC800100

  • DMAC+ LCDC framebuffer address

0xBC800104

  • DMAC+ LCDC pixel format

0xBC800108

  • DMAC+ LCDC width

0xBC80010C

  • DMAC+ LCDC stride (power of 2)

0xBC800110

  • DMAC+ LCDC enable

0xbc800180

  • sceDmacplus

0xbd000000

  • sceDdr
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