WebAssembly Makefile

Makefile

## Makefile by jsarihan

EXEC = penn-os
TEST_EXEC = test

SRC_DIR = src
INC_DIR = include
OBJ_DIR = obj
BIN_DIR = bin
CIS_DIR = cis380
TEST_DIR = test

CC = clang
CFLAGS = -Wall -g

INC_DIR := $(addprefix -I,$(INC_DIR))
CFLAGS += -c -std=gnu99 $(INC_DIR)

FILES = $(shell find $(SRC_DIR) -name '*.c')
TAR_FILES = $(shell find $(SRC_DIR) $(TEST_DIR) $(MS2_DIR) include -name '*.c' -o -name '*.h')
TEST_FILES = $(shell find $(SRC_DIR) $(TEST_DIR) -name '*.c' ! -path "*$(EXEC)*")

SRC_DIRS = $(shell find . -name '*.c' -exec dirname {} \; | uniq)

OBJ_FILES = $(patsubst %.c,$(OBJ_DIR)/%.o,$(FILES))
TEST_OBJ_FILES = $(patsubst %.c,$(OBJ_DIR)/%.o,$(TEST_FILES))

.PHONY: all clean binclean ms2 test

all: $(BIN_DIR)/$(EXEC)

ms2: $(BIN_DIR)/$(MS2_EXEC)

test: /$(CIS_DIR)/$(TEST_EXEC)

clean:
	$(RM) -r $(OBJ_DIR)

binclean: clean
	$(RM) -r $(BIN_DIR)/$(EXEC)

builddir:
	@$(call make-dir)

tar: $(TAR_FILES) refman.pdf README.md setup.sh Makefile
	tar -zcvf stephshi-branlin-jsarihan-oshay-project2.tar.gz $(TAR_FILES) refman.pdf README.md setup.sh Makefile

$(BIN_DIR)/$(EXEC): builddir $(OBJ_FILES)
	@mkdir -p `dirname $@`
	@$(CC) $(OBJ_FILES) -o $@
	@echo "Done! See $@"

/$(CIS_DIR)/$(TEST_EXEC): builddir $(TEST_OBJ_FILES)
	@$(CC) $(TEST_OBJ_FILES) -o $@
	@echo "Done! Running $@"
	@/$(CIS_DIR)/$(TEST_EXEC)

$(OBJ_DIR)/%.o: %.c
	@$(call make-depend,$(subst .o,.d,$@),$@,$<)
	@echo "Compiling $<..."
	@$(CC) $(CFLAGS) $< -o $@

define make-dir
	mkdir -p bin
	mkdir -p log
   for dir in $(SRC_DIRS); \
   do \
	mkdir -p $(OBJ_DIR)/$$dir; \
   done
endef

define make-depend
  $(CC) $(CFLAGS) \
				-MP       \
				-MM				\
				-MF $1    \
        -MT $2    \
        $3
endef

WebMake.md

Bringing C to JavaScript

Background

This past semester I took an operating systems class and really enjoyed learning how to create a dynamic Makefile. My previous experience with Makefiles had been cursory, and usually involved copy pasting the example from the lecture slides. Without a real template for most of the code we wrote in this class, I was more or less on my own for the entire OS codebase.

Since we knew this project was going to involved over 10,000 lines of code, I wanted to write a Makefile that would easily support the folowing things:

• Testing
• Nested Directories
• Different Executables

While other groups placed their c and header files in a single directory, internal quality was a sticking point for me. Especially since there were four groupmembers, having a clean, understandable codebase was something I wanted to strictly enforce.

The Hunt

Differing from my previous computer science classes, we were allowed and encouraged to look to outside resources/textbooks for information. After browsing through several StackOverflow and online forum posts, I couldn't find a file that would complete everything I needed in a clear, concise way. With my Safari Books subscription, the first book available was Managing Projects with GNU Make, 3rd Edition. AFter reading it through, it offered a fundamental understanding of makefiles, but there was no clear solutions to build from.

It was an obscure post on linux forums that pointed out using shell scripts in makefiles to copy directories/files was very easy. This gave me a baseline and insight on how to manipulate files in Make. Combining this with what I learned from the textbook, I was able to create a Makefile that finally did everything I needed. While this Makefile was a significant time investment for so few lines of code, I know I'll be able to reuse this template or easily modify it in the future.

Makefile

I've attached the file below. Feel free to use this for your personal projects that are on the larger side.

Makefile 😍