B5 (181) |
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 |
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reg<1455> |
LDO0 Discharge resistor Enable (for SLG46580 and SLG46582) |
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LDO Discharge resistor Enable (for SLG46583) |
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reg<1454> |
LDO0 Over-current & Short-current Detection Enable (for SLG46580 and SLG46582) |
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LDO Over-current & Short-current Detection Enable (for SLG46583) |
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reg<1453> |
LDO0 Start-up Ramping Slope Divide Enable (for SLG46580 and SLG46582) |
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LDO Start-up Ramping Slope Divide Enable (for SLG46583) |
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reg<1452> |
LDO0 PS_Mode_Gate (LDO0 turn-on/off is controlled by LDO0_EN matrix output) (for SLG46580 and SLG46582) |
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LDO PS_Mode_Gate (LDO0 turn-on/off is controlled by LDO0_EN matrix output) (for SLG46583) |
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reg<1451> |
LDO1 Discharge resistor Enable (for SLG46580) |
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Reserved (for SLG46582 and SLG46583) |
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reg<1450> |
LDO1 Over-current & Short-current Detection Enable (for SLG46580) |
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Reserved (for SLG46582 and SLG46583) |
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reg<1449> |
LDO1 Start-up Ramping Slope Divide Enable (for SLG46580) |
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Reserved (for SLG46582 and SLG46583) |
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reg<1448> |
LDO1 PS_Mode_Gate (LDO1 turn-on/off is controlled by LDO1_EN matrix output) (for SLG46580) |
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Reserved (for SLG46582 and SLG46583) |
B6 (182) |
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 |
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reg<1463> |
LDO2 Discharge resistor Enable (for SLG46580) |
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LDO1 Discharge resistor Enable (for SLG46582) |
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Reserved (for SLG46583) |
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reg<1462> |
LDO2 Over-current & Short-current Detection Enable (for SLG46580) |
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LDO1 Over-current & Short-current Detection Enable (for SLG46582) |
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Reserved (for SLG46583) |
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reg<1461> |
LDO2 Start-up Ramping Slope Divide Enable (for SLG46580) |
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LDO1 Start-up Ramping Slope Divide Enable (for SLG46582) |
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Reserved (for SLG46583) |
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reg<1460> |
LDO2 PS_Mode_Gate (LDO2 turn-on/off is controlled by LDO2_EN matrix output) (for SLG46580) |
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LDO1 PS_Mode_Gate (LDO1 turn-on/off is controlled by LDO1_EN matrix output) (for SLG46582) |
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Reserved (for SLG46583) |
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reg<1459> |
LDO3 Discharge resistor Enable (for SLG46580) |
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Reserved (for SLG46582 and SLG46583) |
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reg<1458> |
LDO3 Over-current & Short-current Detection Enable (for SLG46580) |
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Reserved (for SLG46582 and SLG46583) |
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reg<1457> |
LDO3 Start-up Ramping Slope Divide Enable (for SLG46580) |
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Reserved (for SLG46582 and SLG46583) |
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reg<1456> |
LDO3 PS_Mode_Gate (LDO3 turn-on/off is controlled by LDO3_EN matrix output) (for SLG46580) |
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Reserved (for SLG46582 and SLG46583) |
B7 (183) |
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 |
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reg<1495> |
LDO0/1 VIN connection enable to ACMP0 (for SLG46580) |
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LDO0 VIN connection enable to ACMP0 (for SLG46582) |
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LDO VIN connection enable to ACMP0 (for SLG46583) |
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reg<1494> |
LDO2/3 VIN connection enable to ACMP1 (for SLG46580) |
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LDO1 VIN connection enable to ACMP1 (for SLG46582) |
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LDO VIN connection enable to ACMP1 (for SLG46583) |
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reg<1493> |
TS output connection enable to ACMP2 |
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reg<1492> |
LDO0 VOUT output connection enable to ACMP3 (for SLG46580 and SLG46582) |
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LDO VOUT output connection enable to ACMP3 (for SLG46583) |
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reg<1491> |
LDO2 VOUT output connection enable to ACMP3 (for SLG46580) |
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LDO1 VOUT output connection enable to ACMP3 (for SLG46582) |
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Reserved (for SLG46583) |
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reg<1490> |
Reserved |
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reg<1489> |
Reserved |
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reg<1488> |
ACMP1 100 uA Current Source Enable |
C6 (198) |
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 |
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reg<1591:1589> |
LDO0/1 VDD minimum Power Selection for LDO0 (for SLG46580) |
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LDO0 VDD minimum Power Selection for LDO0 (for SLG46582) |
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LDO VDD minimum Power Selection for LDO (for SLG46583) |
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reg<1588:1586> |
LDO0/1 VDD minimum Power Selection for LDO1 (for SLG46580) |
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Reserved (for SLG46582 and SLG46583) |
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reg<1585> |
UVLO0_HW_enable (Enable UVLO0 output Hard-Wire connection to LDO0/1) (for SLG46580) |
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UVLO0_HW_enable (Enable UVLO0 output Hard-Wire connection to LDO0) (for SLG46582) |
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UVLO_HW_enable0 (Enable UVLO output from ACMP0 Hard-Wire connection to LDO) (for SLG46583) |
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reg<1584> |
UVLO1_HW_enable (Enable UVLO1 output Hard-Wire connection to LDO2/3) (for SLG46580) |
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UVLO1_HW_enable (Enable UVLO1 output Hard-Wire connection to LDO1) (for SLG46582) |
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UVLO_HW_enable1 (Enable UVLO output from ACMP1 Hard-Wire connection to LDO) (for SLG46583) |
C7 (199) |
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 |
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reg<1599:1595> |
Vref Selection V1 Value |
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reg<1594:1593> |
Reserved |
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reg<1592> |
LDO0 Start-up Ramping Slope Selection (for SLG46580 and SLG46582) |
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LDO Start-up Ramping Slope Selection (for SLG46583) |
C8 (200) |
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 |
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reg<1607:1603> |
LDO1 Vref Selection (for SLG46580); |
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Reserved (for SLG46582 and SLG46583) |
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reg<1602:1601> |
Reserved |
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reg<1600> |
LDO1 Start-up Ramping Slope Selection (for SLG46580); |
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Reserved (for SLG46582 and SLG46583) |
C9 (201) |
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 |
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reg<1615:1611> |
LDO2 Vref Selection (for SLG46580); |
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LDO1 Vref Selection (for SLG46582); |
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Reserved (for SLG46583) |
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reg<1610:1609> |
Reserved |
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reg<1608> |
LDO2 Start-up Ramping Slope Selection (for SLG46580); |
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LDO1 Start-up Ramping Slope Selection (for SLG46582); |
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Reserved (for SLG46583) |
CA (202) |
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 |
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reg<1623:1619> |
LDO3 Vref Selection (for SLG46580); |
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Reserved (for SLG46582 and SLG46583) |
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reg<1618:1617> |
Reserved |
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reg<1616> |
LDO3 Start-up Ramping Slope Selection (for SLG46580); |
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Reserved (for SLG46582 and SLG46583) |
E0 (224) |
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 |
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reg<1799:1795> |
LDO0 2nd Vref Selection (for SLG46580 and SLG46582); |
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LDO 2nd Vref Selection (for SLG46583) |
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reg<1794> |
Mode1_EN_Gate (By this bit=1, Matrix Output: LDO MODE1_Enable for LDO0/1/2/3 will be enabled.) (for SLG46580); |
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|
Mode1_EN_Gate (By this bit=1, Matrix Output: LDO MODE1_Enable for LDO0/1 will be enabled.) (for SLG46582); |
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|
Mode1_EN_Gate (By this bit=1, Matrix Output: LDO MODE1_Enable for LDO will be enabled.) (for SLG46583) |
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reg<1793> |
LDO0 VOUT_SEL_Gate (for SLG46580 and SLG46582); |
|
|
LDO VOUT_SEL_Gate (for SLG46583) |
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reg<1792> |
LDO0_EN_Gate (By this bit=1, Matrix Output: LDO0_EN will be enabled.) (for SLG46580 and SLG46582); |
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|
LDO_EN_Gate (By this bit=1, Matrix Output: LDO_EN will be enabled.) (for SLG46583) |
E1 (225) |
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 |
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reg<1807:1803> |
LDO1 2nd Vref Selection (for SLG46580); |
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Reserved (for SLG46582 and SLG46583) |
|
reg<1802> |
Reserved |
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reg<1801> |
LDO1 VOUT_SEL_Gate (for SLG46580) |
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Reserved (for SLG46582 and SLG46583) |
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reg<1800> |
LDO1_EN_Gate (By this bit=1, Matrix Output: LDO1_EN will be enabled.) (for SLG46580) |
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Reserved (for SLG46582 and SLG46583) |
E2 (226) |
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 |
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reg<1815:1811> |
LDO2 2nd Vref Selection (for SLG46580); |
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LDO1 2nd Vref Selection (for SLG46582); |
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|
Reserved (for SLG46583) |
|
reg<1810> |
Reserved |
|
reg<1809> |
LDO2 VOUT_SEL_Gate (for SLG46580); |
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|
LDO1 VOUT_SEL_Gate (for SLG46582); |
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|
Reserved (for SLG46583) |
|
reg<1808> |
LDO2_EN_Gate (By this bit=1, Matrix Output: LDO2_EN will be enabled.) (for SLG46580); |
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|
LDO1_EN_Gate (By this bit=1, Matrix Output: LDO1_EN will be enabled.) (for SLG46582); |
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Reserved (for SLG46583) |
E3 (227) |
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 |
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reg<1823:1819> |
LDO3 2nd Vref Selection (for SLG46580) |
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Reserved (for SLG46582 and SLG46583) |
|
reg<1818> |
Reserved |
|
reg<1817> |
LDO3 VOUT_SEL_Gate (for SLG46580); |
|
|
Reserved (for SLG46582 and SLG46583) |
|
reg<1816> |
LDO3_EN_Gate (By this bit=1, Matrix Output: LDO3_EN will be enabled.) (for SLG46580); |
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Reserved (for SLG46582 and SLG46583) |
E4 (228) |
|
 |
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reg<1831:1824> |
Reserved |
