Created
May 2, 2023 13:37
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output of: dtc -I fs /sys/firmware/devicetree/base
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<stdout>: Warning (reg_format): /amba/ethernet@e000b000/ethernet-phy@1:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1) | |
<stdout>: Warning (reg_format): /axi/spi@e000d000/flash@0/partition@0:reg: property has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1) | |
<stdout>: Warning (reg_format): /axi/spi@e000d000/flash@0/partition@3:reg: property has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1) | |
<stdout>: Warning (reg_format): /axi/spi@e000d000/flash@0/partition@1:reg: property has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1) | |
<stdout>: Warning (reg_format): /axi/spi@e000d000/flash@0/partition@2:reg: property has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1) | |
<stdout>: Warning (unit_address_vs_reg): /amba/ethernet@e000b000: node has a unit name, but no reg or ranges property | |
<stdout>: Warning (unit_address_vs_reg): /memory: node has a reg or ranges property, but no unit name | |
<stdout>: Warning (unit_address_vs_reg): /phy0: node has a reg or ranges property, but no unit name | |
<stdout>: Warning (unit_address_vs_reg): /axi/spi@e000d000/flash@0: node has a unit name, but no reg or ranges property | |
<stdout>: Warning (pci_device_reg): Failed prerequisite 'reg_format' | |
<stdout>: Warning (pci_device_bus_num): Failed prerequisite 'reg_format' | |
<stdout>: Warning (simple_bus_reg): Failed prerequisite 'reg_format' | |
<stdout>: Warning (i2c_bus_reg): Failed prerequisite 'reg_format' | |
<stdout>: Warning (spi_bus_reg): Failed prerequisite 'reg_format' | |
<stdout>: Warning (avoid_default_addr_size): /amba/ethernet@e000b000/ethernet-phy@1: Relying on default #address-cells value | |
<stdout>: Warning (avoid_default_addr_size): /amba/ethernet@e000b000/ethernet-phy@1: Relying on default #size-cells value | |
<stdout>: Warning (avoid_default_addr_size): /axi/spi@e000d000/flash@0/partition@0: Relying on default #address-cells value | |
<stdout>: Warning (avoid_default_addr_size): /axi/spi@e000d000/flash@0/partition@0: Relying on default #size-cells value | |
<stdout>: Warning (avoid_default_addr_size): /axi/spi@e000d000/flash@0/partition@3: Relying on default #address-cells value | |
<stdout>: Warning (avoid_default_addr_size): /axi/spi@e000d000/flash@0/partition@3: Relying on default #size-cells value | |
<stdout>: Warning (avoid_default_addr_size): /axi/spi@e000d000/flash@0/partition@1: Relying on default #address-cells value | |
<stdout>: Warning (avoid_default_addr_size): /axi/spi@e000d000/flash@0/partition@1: Relying on default #size-cells value | |
<stdout>: Warning (avoid_default_addr_size): /axi/spi@e000d000/flash@0/partition@2: Relying on default #address-cells value | |
<stdout>: Warning (avoid_default_addr_size): /axi/spi@e000d000/flash@0/partition@2: Relying on default #size-cells value | |
<stdout>: Warning (avoid_unnecessary_addr_size): Failed prerequisite 'avoid_default_addr_size' | |
<stdout>: Warning (unique_unit_address): Failed prerequisite 'avoid_default_addr_size' | |
<stdout>: Warning (clocks_property): /xlnk:clocks: cell 0 is not a phandle reference | |
<stdout>: Warning (clocks_property): /xlnk:clocks: cell 2 is not a phandle reference | |
<stdout>: Warning (clocks_property): /xlnk:clocks: cell 4 is not a phandle reference | |
<stdout>: Warning (clocks_property): /xlnk:clocks: cell 6 is not a phandle reference | |
<stdout>: Warning (clocks_property): /cpus/cpu@1:clocks: cell 0 is not a phandle reference | |
<stdout>: Warning (clocks_property): /cpus/cpu@0:clocks: cell 0 is not a phandle reference | |
<stdout>: Warning (clocks_property): /replicator:clocks: cell 0 is not a phandle reference | |
<stdout>: Warning (clocks_property): /replicator:clocks: cell 2 is not a phandle reference | |
<stdout>: Warning (clocks_property): /replicator:clocks: cell 4 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/dmac@f8003000:clocks: cell 0 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/gpio@e000a000:clocks: cell 0 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/i2c@e0005000:clocks: cell 0 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/mmc@e0101000:clocks: cell 0 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/mmc@e0101000:clocks: cell 2 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/devcfg@f8007000:clocks: cell 0 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/devcfg@f8007000:clocks: cell 2 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/devcfg@f8007000:clocks: cell 4 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/devcfg@f8007000:clocks: cell 6 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/devcfg@f8007000:clocks: cell 8 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/ethernet@e000c000:clocks: cell 0 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/ethernet@e000c000:clocks: cell 2 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/ethernet@e000c000:clocks: cell 4 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/usb@e0003000:clocks: cell 0 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/timer@f8002000:clocks: cell 0 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/ptm@f889d000:clocks: cell 0 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/ptm@f889d000:clocks: cell 2 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/ptm@f889d000:clocks: cell 4 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/etb@f8801000:clocks: cell 0 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/etb@f8801000:clocks: cell 2 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/etb@f8801000:clocks: cell 4 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/serial@e0001000:clocks: cell 0 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/serial@e0001000:clocks: cell 2 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/spi@e000d000:clocks: cell 0 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/spi@e000d000:clocks: cell 2 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/can@e0009000:clocks: cell 0 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/can@e0009000:clocks: cell 2 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/tpiu@f8803000:clocks: cell 0 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/tpiu@f8803000:clocks: cell 2 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/tpiu@f8803000:clocks: cell 4 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/i2c@e0004000:clocks: cell 0 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/funnel@f8804000:clocks: cell 0 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/funnel@f8804000:clocks: cell 2 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/funnel@f8804000:clocks: cell 4 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/spi@e0007000:clocks: cell 0 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/spi@e0007000:clocks: cell 2 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/mmc@e0100000:clocks: cell 0 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/mmc@e0100000:clocks: cell 2 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/timer@f8f00600:clocks: cell 0 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/ethernet@e000b000:clocks: cell 0 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/ethernet@e000b000:clocks: cell 2 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/ethernet@e000b000:clocks: cell 4 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/usb@e0002000:clocks: cell 0 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/timer@f8001000:clocks: cell 0 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/ptm@f889c000:clocks: cell 0 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/ptm@f889c000:clocks: cell 2 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/ptm@f889c000:clocks: cell 4 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/serial@e0000000:clocks: cell 0 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/serial@e0000000:clocks: cell 2 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/can@e0008000:clocks: cell 0 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/can@e0008000:clocks: cell 2 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/adc@f8007100:clocks: cell 0 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/timer@f8f00200:clocks: cell 0 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/memory-controller@e000e000:clocks: cell 0 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/memory-controller@e000e000:clocks: cell 2 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/watchdog@f8005000:clocks: cell 0 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/spi@e0006000:clocks: cell 0 is not a phandle reference | |
<stdout>: Warning (clocks_property): /axi/spi@e0006000:clocks: cell 2 is not a phandle reference | |
<stdout>: Warning (interrupt_provider): /axi/gpio@e000a000: Missing #address-cells in interrupt provider | |
<stdout>: Warning (interrupt_provider): /axi/interrupt-controller@f8f01000: Missing #address-cells in interrupt provider | |
/dts-v1/; | |
/ { | |
compatible = "xlnx,zynq-7000"; | |
#address-cells = <0x01>; | |
#size-cells = <0x01>; | |
amba { | |
ethernet@e000b000 { | |
phy-handle = <0x14>; | |
ethernet-phy@1 { | |
phandle = <0x14>; | |
reg = <0x01>; | |
}; | |
}; | |
}; | |
fpga-full { | |
compatible = "fpga-region"; | |
fpga-mgr = <0x03>; | |
ranges; | |
#address-cells = <0x01>; | |
#size-cells = <0x01>; | |
phandle = <0x15>; | |
}; | |
__symbols__ { | |
ptm0_out_port = "/axi/ptm@f889c000/out-ports/port/endpoint"; | |
intc = "/axi/interrupt-controller@f8f01000"; | |
ocmc = "/axi/ocmc@f800c000"; | |
i2c1 = "/axi/i2c@e0005000"; | |
replicator_out_port1 = "/replicator/out-ports/port@1/endpoint"; | |
gpio0 = "/axi/gpio@e000a000"; | |
qspi = "/axi/spi@e000d000"; | |
spi0 = "/axi/spi@e0006000"; | |
slcr = "/axi/slcr@f8000000"; | |
usb1 = "/axi/usb@e0003000"; | |
regulator_vccpint = "/fixedregulator"; | |
amba = "/axi"; | |
ttc1 = "/axi/timer@f8002000"; | |
funnel0_in_port1 = "/axi/funnel@f8804000/in-ports/port@1/endpoint"; | |
fpga_full = "/fpga-full"; | |
watchdog0 = "/axi/watchdog@f8005000"; | |
sdhci0 = "/axi/mmc@e0100000"; | |
adc = "/axi/adc@f8007100"; | |
ptm1_out_port = "/axi/ptm@f889d000/out-ports/port/endpoint"; | |
gem1 = "/axi/ethernet@e000c000"; | |
cpu1 = "/cpus/cpu@1"; | |
ethernet_phy = "/amba/ethernet@e000b000/ethernet-phy@1"; | |
L2 = "/axi/cache-controller@f8f02000"; | |
pinctrl0 = "/axi/slcr@f8000000/pinctrl@700"; | |
can0 = "/axi/can@e0008000"; | |
etb_in_port = "/axi/etb@f8801000/in-ports/port/endpoint"; | |
clkc = "/axi/slcr@f8000000/clkc@100"; | |
uart0 = "/axi/serial@e0000000"; | |
flash0 = "/axi/spi@e000d000/flash@0"; | |
nfc0 = "/axi/memory-controller@e000e000/nand-controller@0,0"; | |
replicator_in_port0 = "/replicator/in-ports/port/endpoint"; | |
usb_phy0 = "/phy0"; | |
spi1 = "/axi/spi@e0007000"; | |
audio0 = "/audio-codec-ctrl@43c00000"; | |
i2c0 = "/axi/i2c@e0004000"; | |
tpiu_in_port = "/axi/tpiu@f8803000/in-ports/port/endpoint"; | |
global_timer = "/axi/timer@f8f00200"; | |
replicator_out_port0 = "/replicator/out-ports/port@0/endpoint"; | |
funnel_out_port = "/axi/funnel@f8804000/out-ports/port/endpoint"; | |
smcc = "/axi/memory-controller@e000e000"; | |
funnel0_in_port2 = "/axi/funnel@f8804000/in-ports/port@2/endpoint"; | |
usb0 = "/axi/usb@e0002000"; | |
ttc0 = "/axi/timer@f8001000"; | |
mc = "/axi/memory-controller@f8006000"; | |
sdhci1 = "/axi/mmc@e0101000"; | |
devcfg = "/axi/devcfg@f8007000"; | |
funnel0_in_port0 = "/axi/funnel@f8804000/in-ports/port@0/endpoint"; | |
nor0 = "/axi/memory-controller@e000e000/flash@1,0"; | |
scutimer = "/axi/timer@f8f00600"; | |
dmac_s = "/axi/dmac@f8003000"; | |
efuse = "/axi/efuse@f800d000"; | |
can1 = "/axi/can@e0009000"; | |
gem0 = "/axi/ethernet@e000b000"; | |
uart1 = "/axi/serial@e0001000"; | |
cpu0 = "/cpus/cpu@0"; | |
rstc = "/axi/slcr@f8000000/rstc@200"; | |
}; | |
audio-codec-ctrl@43c00000 { | |
compatible = "generic-uio"; | |
phandle = <0x38>; | |
reg = <0x43c00000 0x10000>; | |
}; | |
pmu@f8891000 { | |
compatible = "arm,cortex-a9-pmu"; | |
interrupt-parent = <0x04>; | |
interrupts = <0x00 0x05 0x04 0x00 0x06 0x04>; | |
reg = <0xf8891000 0x1000 0xf8893000 0x1000>; | |
}; | |
aliases { | |
spi0 = "/axi/spi@e000d000"; | |
ethernet0 = "/axi/ethernet@e000b000"; | |
serial0 = "/axi/serial@e0000000"; | |
}; | |
chosen { | |
stdout-path = "serial0:115200n8"; | |
bootargs = "root=/dev/mmcblk0p2 rw earlyprintk rootfstype=ext4 rootwait devtmpfs.mount=1 uio_pdrv_genirq.of_id=\"generic-uio\" clk_ignore_unused"; | |
pynq_board = "Pynq-Z2"; | |
}; | |
fabric@40000000 { | |
compatible = "generic-uio"; | |
interrupt-parent = <0x04>; | |
interrupts = <0x00 0x1d 0x04>; | |
reg = <0x40000000 0x10000>; | |
}; | |
xlnk { | |
compatible = "xlnx,xlnk-1.0"; | |
clocks = <0x01 0x0f 0x01 0x10 0x01 0x11 0x01 0x12>; | |
clock-names = "xclk0\0xclk1\0xclk2\0xclk3"; | |
}; | |
memory { | |
device_type = "memory"; | |
reg = <0x00 0x20000000>; | |
}; | |
phy0 { | |
compatible = "ulpi-phy"; | |
drv-vbus; | |
view-port = <0x170>; | |
phandle = <0x0a>; | |
reg = <0xe0002000 0x1000>; | |
#phy-cells = <0x00>; | |
}; | |
cpus { | |
#address-cells = <0x01>; | |
#size-cells = <0x00>; | |
cpu@1 { | |
compatible = "arm,cortex-a9"; | |
clocks = <0x01 0x03>; | |
device_type = "cpu"; | |
phandle = <0x12>; | |
reg = <0x01>; | |
}; | |
cpu@0 { | |
compatible = "arm,cortex-a9"; | |
clocks = <0x01 0x03>; | |
device_type = "cpu"; | |
cpu0-supply = <0x02>; | |
phandle = <0x10>; | |
reg = <0x00>; | |
operating-points = <0x9eb10 0xf4240 0x4f588 0xf4240>; | |
clock-latency = <0x3e8>; | |
}; | |
}; | |
replicator { | |
compatible = "arm,coresight-static-replicator"; | |
clocks = <0x01 0x1b 0x01 0x2e 0x01 0x2f>; | |
clock-names = "apb_pclk\0dbg_trc\0dbg_apb"; | |
in-ports { | |
port { | |
endpoint { | |
remote-endpoint = <0x07>; | |
phandle = <0x0d>; | |
}; | |
}; | |
}; | |
out-ports { | |
#address-cells = <0x01>; | |
#size-cells = <0x00>; | |
port@1 { | |
reg = <0x01>; | |
endpoint { | |
remote-endpoint = <0x06>; | |
phandle = <0x0b>; | |
}; | |
}; | |
port@0 { | |
reg = <0x00>; | |
endpoint { | |
remote-endpoint = <0x05>; | |
phandle = <0x0c>; | |
}; | |
}; | |
}; | |
}; | |
axi { | |
compatible = "simple-bus"; | |
ranges; | |
interrupt-parent = <0x04>; | |
#address-cells = <0x01>; | |
#size-cells = <0x01>; | |
phandle = <0x16>; | |
u-boot,dm-pre-reloc; | |
dmac@f8003000 { | |
#dma-cells = <0x01>; | |
compatible = "arm,pl330\0arm,primecell"; | |
clocks = <0x01 0x1b>; | |
clock-names = "apb_pclk"; | |
#dma-requests = <0x04>; | |
interrupt-parent = <0x04>; | |
interrupts = <0x00 0x0d 0x04 0x00 0x0e 0x04 0x00 0x0f 0x04 0x00 0x10 0x04 0x00 0x11 0x04 0x00 0x28 0x04 0x00 0x29 0x04 0x00 0x2a 0x04 0x00 0x2b 0x04>; | |
phandle = <0x2e>; | |
reg = <0xf8003000 0x1000>; | |
#dma-channels = <0x08>; | |
interrupt-names = "abort\0dma0\0dma1\0dma2\0dma3\0dma4\0dma5\0dma6\0dma7"; | |
}; | |
gpio@e000a000 { | |
compatible = "xlnx,zynq-gpio-1.0"; | |
clocks = <0x01 0x2a>; | |
gpio-mask-low = <0x5600>; | |
gpio-controller; | |
gpio-mask-high = <0x00>; | |
#interrupt-cells = <0x02>; | |
interrupt-parent = <0x04>; | |
interrupts = <0x00 0x14 0x04>; | |
phandle = <0x08>; | |
reg = <0xe000a000 0x1000>; | |
#gpio-cells = <0x02>; | |
emio-gpio-width = <0x40>; | |
interrupt-controller; | |
}; | |
cache-controller@f8f02000 { | |
compatible = "arm,pl310-cache"; | |
cache-level = <0x02>; | |
cache-unified; | |
arm,data-latency = <0x03 0x02 0x02>; | |
interrupts = <0x00 0x02 0x04>; | |
phandle = <0x1c>; | |
reg = <0xf8f02000 0x1000>; | |
arm,tag-latency = <0x02 0x02 0x02>; | |
}; | |
i2c@e0005000 { | |
compatible = "cdns,i2c-r1p10"; | |
clocks = <0x01 0x27>; | |
status = "okay"; | |
interrupt-parent = <0x04>; | |
#address-cells = <0x01>; | |
interrupts = <0x00 0x30 0x04>; | |
#size-cells = <0x00>; | |
phandle = <0x1b>; | |
reg = <0xe0005000 0x1000>; | |
}; | |
mmc@e0101000 { | |
compatible = "arasan,sdhci-8.9a"; | |
clocks = <0x01 0x16 0x01 0x21>; | |
clock-names = "clk_xin\0clk_ahb"; | |
status = "disabled"; | |
interrupt-parent = <0x04>; | |
interrupts = <0x00 0x2f 0x04>; | |
phandle = <0x2b>; | |
reg = <0xe0101000 0x1000>; | |
}; | |
devcfg@f8007000 { | |
compatible = "xlnx,zynq-devcfg-1.0"; | |
clocks = <0x01 0x0c 0x01 0x0f 0x01 0x10 0x01 0x11 0x01 0x12>; | |
clock-names = "ref_clk\0fclk0\0fclk1\0fclk2\0fclk3"; | |
interrupt-parent = <0x04>; | |
interrupts = <0x00 0x08 0x04>; | |
phandle = <0x03>; | |
reg = <0xf8007000 0x100>; | |
syscon = <0x09>; | |
}; | |
slcr@f8000000 { | |
compatible = "xlnx,zynq-slcr\0syscon\0simple-mfd"; | |
ranges; | |
#address-cells = <0x01>; | |
#size-cells = <0x01>; | |
phandle = <0x09>; | |
u-boot,dm-pre-reloc; | |
reg = <0xf8000000 0x1000>; | |
rstc@200 { | |
compatible = "xlnx,zynq-reset"; | |
#reset-cells = <0x01>; | |
phandle = <0x2c>; | |
reg = <0x200 0x48>; | |
syscon = <0x09>; | |
}; | |
pinctrl@700 { | |
compatible = "xlnx,pinctrl-zynq"; | |
phandle = <0x2d>; | |
reg = <0x700 0x200>; | |
syscon = <0x09>; | |
}; | |
clkc@100 { | |
compatible = "xlnx,ps7-clkc"; | |
ps-clk-frequency = <0x2faf080>; | |
#clock-cells = <0x01>; | |
phandle = <0x01>; | |
u-boot,dm-pre-reloc; | |
reg = <0x100 0x100>; | |
clock-output-names = "armpll\0ddrpll\0iopll\0cpu_6or4x\0cpu_3or2x\0cpu_2x\0cpu_1x\0ddr2x\0ddr3x\0dci\0lqspi\0smc\0pcap\0gem0\0gem1\0fclk0\0fclk1\0fclk2\0fclk3\0can0\0can1\0sdio0\0sdio1\0uart0\0uart1\0spi0\0spi1\0dma\0usb0_aper\0usb1_aper\0gem0_aper\0gem1_aper\0sdio0_aper\0sdio1_aper\0spi0_aper\0spi1_aper\0can0_aper\0can1_aper\0i2c0_aper\0i2c1_aper\0uart0_aper\0uart1_aper\0gpio_aper\0lqspi_aper\0smc_aper\0swdt\0dbg_trc\0dbg_apb"; | |
fclk-enable = <0x0f>; | |
}; | |
}; | |
ethernet@e000c000 { | |
compatible = "cdns,zynq-gem\0cdns,gem"; | |
clocks = <0x01 0x1f 0x01 0x1f 0x01 0x0e>; | |
clock-names = "pclk\0hclk\0tx_clk"; | |
status = "disabled"; | |
#address-cells = <0x01>; | |
interrupts = <0x00 0x2d 0x04>; | |
#size-cells = <0x00>; | |
phandle = <0x26>; | |
reg = <0xe000c000 0x1000>; | |
}; | |
usb@e0003000 { | |
compatible = "xlnx,zynq-usb-2.20a\0chipidea,usb2"; | |
clocks = <0x01 0x1d>; | |
status = "disabled"; | |
interrupt-parent = <0x04>; | |
interrupts = <0x00 0x2c 0x04>; | |
phandle = <0x35>; | |
reg = <0xe0003000 0x1000>; | |
phy_type = "ulpi"; | |
}; | |
memory-controller@f8006000 { | |
compatible = "xlnx,zynq-ddrc-a05"; | |
phandle = <0x1d>; | |
reg = <0xf8006000 0x1000>; | |
}; | |
timer@f8002000 { | |
compatible = "cdns,ttc"; | |
clocks = <0x01 0x06>; | |
interrupt-parent = <0x04>; | |
interrupts = <0x00 0x25 0x04 0x00 0x26 0x04 0x00 0x27 0x04>; | |
phandle = <0x32>; | |
reg = <0xf8002000 0x1000>; | |
}; | |
ptm@f889d000 { | |
compatible = "arm,coresight-etm3x\0arm,primecell"; | |
clocks = <0x01 0x1b 0x01 0x2e 0x01 0x2f>; | |
clock-names = "apb_pclk\0dbg_trc\0dbg_apb"; | |
cpu = <0x12>; | |
reg = <0xf889d000 0x1000>; | |
out-ports { | |
port { | |
endpoint { | |
remote-endpoint = <0x13>; | |
phandle = <0x0f>; | |
}; | |
}; | |
}; | |
}; | |
etb@f8801000 { | |
compatible = "arm,coresight-etb10\0arm,primecell"; | |
clocks = <0x01 0x1b 0x01 0x2e 0x01 0x2f>; | |
clock-names = "apb_pclk\0dbg_trc\0dbg_apb"; | |
reg = <0xf8801000 0x1000>; | |
in-ports { | |
port { | |
endpoint { | |
remote-endpoint = <0x0b>; | |
phandle = <0x06>; | |
}; | |
}; | |
}; | |
}; | |
zyxclmm_drm { | |
compatible = "xlnx,zocl"; | |
status = "okay"; | |
}; | |
serial@e0001000 { | |
compatible = "xlnx,xuartps\0cdns,uart-r1p8"; | |
clocks = <0x01 0x18 0x01 0x29>; | |
clock-names = "uart_clk\0pclk"; | |
status = "disabled"; | |
interrupts = <0x00 0x32 0x04>; | |
phandle = <0x20>; | |
reg = <0xe0001000 0x1000>; | |
}; | |
spi@e000d000 { | |
compatible = "xlnx,zynq-qspi-1.0"; | |
clocks = <0x01 0x0a 0x01 0x2b>; | |
clock-names = "ref_clk\0pclk"; | |
status = "okay"; | |
spi-rx-bus-width = <0x04>; | |
interrupt-parent = <0x04>; | |
#address-cells = <0x01>; | |
interrupts = <0x00 0x13 0x04>; | |
#size-cells = <0x00>; | |
phandle = <0x23>; | |
is-dual = <0x00>; | |
reg = <0xe000d000 0x1000>; | |
num-cs = <0x01>; | |
spi-tx-bus-width = <0x04>; | |
flash@0 { | |
phandle = <0x24>; | |
partition@0 { | |
label = "boot"; | |
reg = <0x00 0x500000>; | |
}; | |
partition@3 { | |
label = "spare"; | |
reg = <0xfa0000 0x00>; | |
}; | |
partition@1 { | |
label = "bootenv"; | |
reg = <0x500000 0x20000>; | |
}; | |
partition@2 { | |
label = "kernel"; | |
reg = <0x520000 0xa80000>; | |
}; | |
}; | |
}; | |
can@e0009000 { | |
compatible = "xlnx,zynq-can-1.0"; | |
clocks = <0x01 0x14 0x01 0x25>; | |
tx-fifo-depth = <0x40>; | |
clock-names = "can_clk\0pclk"; | |
status = "disabled"; | |
interrupt-parent = <0x04>; | |
interrupts = <0x00 0x33 0x04>; | |
phandle = <0x19>; | |
reg = <0xe0009000 0x1000>; | |
rx-fifo-depth = <0x40>; | |
}; | |
tpiu@f8803000 { | |
compatible = "arm,coresight-tpiu\0arm,primecell"; | |
clocks = <0x01 0x1b 0x01 0x2e 0x01 0x2f>; | |
clock-names = "apb_pclk\0dbg_trc\0dbg_apb"; | |
reg = <0xf8803000 0x1000>; | |
in-ports { | |
port { | |
endpoint { | |
remote-endpoint = <0x0c>; | |
phandle = <0x05>; | |
}; | |
}; | |
}; | |
}; | |
i2c@e0004000 { | |
compatible = "cdns,i2c-r1p10"; | |
clocks = <0x01 0x26>; | |
status = "okay"; | |
interrupt-parent = <0x04>; | |
#address-cells = <0x01>; | |
interrupts = <0x00 0x19 0x04>; | |
#size-cells = <0x00>; | |
phandle = <0x1a>; | |
reg = <0xe0004000 0x1000>; | |
}; | |
funnel@f8804000 { | |
compatible = "arm,coresight-static-funnel\0arm,primecell"; | |
clocks = <0x01 0x1b 0x01 0x2e 0x01 0x2f>; | |
clock-names = "apb_pclk\0dbg_trc\0dbg_apb"; | |
reg = <0xf8804000 0x1000>; | |
in-ports { | |
#address-cells = <0x01>; | |
#size-cells = <0x00>; | |
port@1 { | |
reg = <0x01>; | |
endpoint { | |
remote-endpoint = <0x0f>; | |
phandle = <0x13>; | |
}; | |
}; | |
port@2 { | |
reg = <0x02>; | |
endpoint { | |
phandle = <0x37>; | |
}; | |
}; | |
port@0 { | |
reg = <0x00>; | |
endpoint { | |
remote-endpoint = <0x0e>; | |
phandle = <0x11>; | |
}; | |
}; | |
}; | |
out-ports { | |
port { | |
endpoint { | |
remote-endpoint = <0x0d>; | |
phandle = <0x07>; | |
}; | |
}; | |
}; | |
}; | |
spi@e0007000 { | |
compatible = "xlnx,zynq-spi-r1p6"; | |
clocks = <0x01 0x1a 0x01 0x23>; | |
clock-names = "ref_clk\0pclk"; | |
status = "disabled"; | |
interrupt-parent = <0x04>; | |
#address-cells = <0x01>; | |
interrupts = <0x00 0x31 0x04>; | |
#size-cells = <0x00>; | |
phandle = <0x22>; | |
reg = <0xe0007000 0x1000>; | |
}; | |
mmc@e0100000 { | |
compatible = "arasan,sdhci-8.9a"; | |
clocks = <0x01 0x15 0x01 0x20>; | |
xlnx,has-wp = <0x00>; | |
clock-names = "clk_xin\0clk_ahb"; | |
status = "okay"; | |
interrupt-parent = <0x04>; | |
interrupts = <0x00 0x18 0x04>; | |
xlnx,has-cd = <0x01>; | |
phandle = <0x2a>; | |
reg = <0xe0100000 0x1000>; | |
xlnx,has-power = <0x00>; | |
}; | |
ocmc@f800c000 { | |
compatible = "xlnx,zynq-ocmc-1.0"; | |
interrupt-parent = <0x04>; | |
interrupts = <0x00 0x03 0x04>; | |
phandle = <0x1e>; | |
reg = <0xf800c000 0x1000>; | |
}; | |
timer@f8f00600 { | |
compatible = "arm,cortex-a9-twd-timer"; | |
clocks = <0x01 0x04>; | |
interrupt-parent = <0x04>; | |
interrupts = <0x01 0x0d 0x301>; | |
phandle = <0x33>; | |
reg = <0xf8f00600 0x20>; | |
}; | |
ethernet@e000b000 { | |
xlnx,ptp-enet-clock = <0x6750918>; | |
compatible = "cdns,zynq-gem\0cdns,gem"; | |
clocks = <0x01 0x1e 0x01 0x1e 0x01 0x0d>; | |
local-mac-address = [00 00 05 6b 03 42]; | |
clock-names = "pclk\0hclk\0tx_clk"; | |
status = "okay"; | |
#address-cells = <0x01>; | |
interrupts = <0x00 0x16 0x04>; | |
#size-cells = <0x00>; | |
phandle = <0x25>; | |
reg = <0xe000b000 0x1000>; | |
phy-mode = "rgmii-id"; | |
enet-reset = <0x08 0x09 0x00>; | |
}; | |
usb@e0002000 { | |
usb-phy = <0x0a>; | |
compatible = "xlnx,zynq-usb-2.20a\0chipidea,usb2"; | |
clocks = <0x01 0x1c>; | |
status = "okay"; | |
interrupt-parent = <0x04>; | |
interrupts = <0x00 0x15 0x04>; | |
phandle = <0x34>; | |
reg = <0xe0002000 0x1000>; | |
usb-reset = <0x08 0x2e 0x00>; | |
phy_type = "ulpi"; | |
}; | |
timer@f8001000 { | |
compatible = "cdns,ttc"; | |
clocks = <0x01 0x06>; | |
interrupt-parent = <0x04>; | |
interrupts = <0x00 0x0a 0x04 0x00 0x0b 0x04 0x00 0x0c 0x04>; | |
phandle = <0x31>; | |
reg = <0xf8001000 0x1000>; | |
}; | |
ptm@f889c000 { | |
compatible = "arm,coresight-etm3x\0arm,primecell"; | |
clocks = <0x01 0x1b 0x01 0x2e 0x01 0x2f>; | |
clock-names = "apb_pclk\0dbg_trc\0dbg_apb"; | |
cpu = <0x10>; | |
reg = <0xf889c000 0x1000>; | |
out-ports { | |
port { | |
endpoint { | |
remote-endpoint = <0x11>; | |
phandle = <0x0e>; | |
}; | |
}; | |
}; | |
}; | |
serial@e0000000 { | |
port-number = <0x00>; | |
compatible = "xlnx,xuartps\0cdns,uart-r1p8"; | |
clocks = <0x01 0x17 0x01 0x28>; | |
device_type = "serial"; | |
cts-override; | |
clock-names = "uart_clk\0pclk"; | |
status = "okay"; | |
interrupts = <0x00 0x1b 0x04>; | |
phandle = <0x1f>; | |
reg = <0xe0000000 0x1000>; | |
}; | |
efuse@f800d000 { | |
compatible = "xlnx,zynq-efuse"; | |
phandle = <0x2f>; | |
reg = <0xf800d000 0x20>; | |
}; | |
can@e0008000 { | |
compatible = "xlnx,zynq-can-1.0"; | |
clocks = <0x01 0x13 0x01 0x24>; | |
tx-fifo-depth = <0x40>; | |
clock-names = "can_clk\0pclk"; | |
status = "disabled"; | |
interrupt-parent = <0x04>; | |
interrupts = <0x00 0x1c 0x04>; | |
phandle = <0x18>; | |
reg = <0xe0008000 0x1000>; | |
rx-fifo-depth = <0x40>; | |
}; | |
adc@f8007100 { | |
compatible = "xlnx,zynq-xadc-1.00.a"; | |
clocks = <0x01 0x0c>; | |
interrupt-parent = <0x04>; | |
interrupts = <0x00 0x07 0x04>; | |
phandle = <0x17>; | |
reg = <0xf8007100 0x20>; | |
}; | |
timer@f8f00200 { | |
compatible = "arm,cortex-a9-global-timer"; | |
clocks = <0x01 0x04>; | |
interrupt-parent = <0x04>; | |
interrupts = <0x01 0x0b 0x301>; | |
phandle = <0x30>; | |
reg = <0xf8f00200 0x20>; | |
}; | |
memory-controller@e000e000 { | |
compatible = "arm,pl353-smc-r2p1\0arm,primecell"; | |
clocks = <0x01 0x0b 0x01 0x2c>; | |
clock-names = "memclk\0apb_pclk"; | |
ranges = <0x00 0x00 0xe1000000 0x1000000 0x01 0x00 0xe2000000 0x2000000 0x02 0x00 0xe4000000 0x2000000>; | |
status = "disabled"; | |
interrupt-parent = <0x04>; | |
#address-cells = <0x02>; | |
interrupts = <0x00 0x12 0x04>; | |
#size-cells = <0x01>; | |
phandle = <0x27>; | |
reg = <0xe000e000 0x1000>; | |
nand-controller@0,0 { | |
compatible = "arm,pl353-nand-r2p1"; | |
status = "disabled"; | |
#address-cells = <0x01>; | |
#size-cells = <0x00>; | |
phandle = <0x28>; | |
reg = <0x00 0x00 0x1000000>; | |
}; | |
flash@1,0 { | |
compatible = "cfi-flash"; | |
status = "disabled"; | |
#address-cells = <0x01>; | |
#size-cells = <0x01>; | |
phandle = <0x29>; | |
reg = <0x01 0x00 0x2000000>; | |
}; | |
}; | |
watchdog@f8005000 { | |
compatible = "cdns,wdt-r1p2"; | |
clocks = <0x01 0x2d>; | |
interrupt-parent = <0x04>; | |
interrupts = <0x00 0x09 0x01>; | |
phandle = <0x36>; | |
reg = <0xf8005000 0x1000>; | |
timeout-sec = <0x0a>; | |
}; | |
spi@e0006000 { | |
compatible = "xlnx,zynq-spi-r1p6"; | |
clocks = <0x01 0x19 0x01 0x22>; | |
clock-names = "ref_clk\0pclk"; | |
status = "disabled"; | |
interrupt-parent = <0x04>; | |
#address-cells = <0x01>; | |
interrupts = <0x00 0x1a 0x04>; | |
#size-cells = <0x00>; | |
phandle = <0x21>; | |
reg = <0xe0006000 0x1000>; | |
}; | |
interrupt-controller@f8f01000 { | |
compatible = "arm,cortex-a9-gic"; | |
num_cpus = <0x02>; | |
num_interrupts = <0x60>; | |
#interrupt-cells = <0x03>; | |
phandle = <0x04>; | |
reg = <0xf8f01000 0x1000 0xf8f00100 0x100>; | |
interrupt-controller; | |
}; | |
}; | |
fixedregulator { | |
compatible = "regulator-fixed"; | |
regulator-boot-on; | |
phandle = <0x02>; | |
regulator-min-microvolt = <0xf4240>; | |
regulator-max-microvolt = <0xf4240>; | |
regulator-always-on; | |
regulator-name = "VCCPINT"; | |
}; | |
}; |
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