SPC700 Core Definitions and Labels for ASAR 1.6

SPCCore.asm

;SPC700 Core Definitions and Labels
;For asar 1.6
;by KungFuFurby

includeonce

;Functions defined...
;The following code allows pointers to be split into two.
function LOWBYTE(wordData) = wordData&$FF
function HIGHBYTE(wordData) = (wordData&$FF00)>>8

;DSP Registers defined...
;Channel-specific registers go first.
;These can be ORed by the channel number.
!DSP_VxVOLL = $00 ;Left master volume for channel
!DSP_VxVOLR = $01 ;Right master volume for channel
!DSP_VxPITCHL = $02 ;Low byte of pitch
!DSP_VxPITCHH = $03 ;High byte of pitch
!DSP_VxSRCN = $04 ;Sample ID
!DSP_VxADSR1 = $05 ;Attack, Decay & ADSR/Gain Select
!DSP_VxADSR2 = $06 ;Sustain rate & level
!DSP_VxGAIN = $07 ;Custom volume envelopes/fixed volume
!DSP_VxENVX = $08 ;Envelope value
!DSP_VxOUTX = $09 ;Sample output
;Three free bytes specifiable by channel number:
!DSP_VxNA1 = $0A
!DSP_VxNA2 = $0B
!DSP_VxNA3 = $0E
;FIR coefficients are in the same scenario
;even though they're not relevant to channel numbers...
!DSP_FIRx = $0F
;Non-channel-specific registers go next.
!DSP_MVOLL = $0C ;Left Master Volume
!DSP_MVOLR = $1C ;Right Master Volume
!DSP_EVOLL = $2C ;Left Echo Volume
!DSP_EVOLR = $3C ;Right Echo Volume
!DSP_KON = $4C ;Key On
!DSP_KOFF = $5C ;Key Off
!DSP_FLG = $6C ;Noise frequency & echo enable & mute/key off
!DSP_ENDX = $7C ;Last BRR Block Flag
!DSP_EFB = $0D ;Echo Feedback
!DSP_NA = $1D ;Free byte... heh...
!DSP_PMON = $2D ;Pitch Modulation Enable
!DSP_NON = $3D ;Noise Enable
!DSP_EON = $4D ;Echo Enable
!DSP_DIR = $5D ;Sample directory
!DSP_ESA = $6D ;Echo address
!DSP_EDL = $7D ;Echo delay

!DSP_FLG_EchoWriteOff = $20
!DSP_FLG_Mute = $40
!DSP_FLG_SoftReset = $80
;TODO Noise Frequency?

pushpc

org $0000F0

;SPC700 Registers defined...
SPC_TEST: ;No comment.
!SPC_TEST_TimerOff = $01
!SPC_TEST_RAMWriteOn = $02
!SPC_TEST_RAMDisable = $04 ;WARNING: Don't set this bit!
!SPC_TEST_TimerOn = $08
!SPC_TEST_RAMWait2Cycle = $00
!SPC_TEST_RAMWait4Cycle = $10
!SPC_TEST_RAMWait8Cycle = $20
!SPC_TEST_RAMWait16Cycle = $30
!SPC_TEST_IOROMWait2Cycle = $00
!SPC_TEST_IOROMWait4Cycle = $40
!SPC_TEST_IOROMWait8Cycle = $80
!SPC_TEST_IOROMWait16Cycle = $C0
;TODO Waitstate Function for SPC_TEST
skip 1
SPC_CONTROL: ;Timer and ROM control
!SPC_CONTROL_Timer0On = $01
!SPC_CONTROL_Timer1On = $02
!SPC_CONTROL_Timer2On = $04
!SPC_CONTROL_ClearLatchF4F5 = $10
!SPC_CONTROL_ClearLatchF6F7 = $20
!SPC_CONTROL_IPLROMOn = $80
skip 1
SPC_DSPADDR: ;DSP Register ID
skip 1
SPC_DSPDATA: ;DSP Register Content
skip 1
SPC_CPUIO0: ;SPC<->SNES data byte 1
skip 1
SPC_CPUIO1: ;SPC<->SNES data byte 2
skip 1
SPC_CPUIO2: ;SPC<->SNES data byte 3
skip 1
SPC_CPUIO3: ;SPC<->SNES data byte 4
skip 1
SPC_AUXIO4: ;Free memory?
skip 1
SPC_AUXIO5: ;Free memory?
skip 1
SPC_T0DIV: ;8010hz timer divider
skip 1
SPC_T1DIV: ;8010hz timer divider
skip 1
SPC_T2DIV: ;64080hz timer divider
skip 1
SPC_T0OUT: ;8010hz timer output
skip 1
SPC_T1OUT: ;8010hz timer output
skip 1
SPC_T2OUT: ;64080hz timer output
skip 1

pullpc

;Stripe Table Generator
;Generates a striped table by low byte, then high byte
;You must create the define array beforehand suffixed by a decimal number
macro stripeTableGen(defineArr, lastIndex)
	%stripeTableGenLo(<defineArr>, <lastIndex>)
	%stripeTableGenHi(<defineArr>, <lastIndex>)
endmacro

macro stripeTableGenLo(defineArr, lastIndex)
	!stripeGenCounter = 0
	while !stripeGenCounter <= <lastIndex>
		db LOWBYTE(!{<defineArr>!{stripeGenCounter}})
		!stripeGenCounter #= !stripeGenCounter+1
	endif
endmacro

macro stripeTableGenHi(defineArr, lastIndex)
	!stripeGenCounter = 0
	while !stripeGenCounter <= <lastIndex>
		db HIGHBYTE(!{<defineArr>!{stripeGenCounter}})
		!stripeGenCounter #= !stripeGenCounter+1
	endif
endmacro