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@Kwiboo
Created April 26, 2023 15:45
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DDR V1.10 75d050770f typ 23/02/28-20:47:10
LPDDR4X, 2112MHz
channel[0] BW=16 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=2048MB
channel[1] BW=16 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=2048MB
channel[2] BW=16 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=2048MB
channel[3] BW=16 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=2048MB
Manufacturer ID:0x6
CH0 RX Vref:29.7%, TX Vref:21.8%,21.8%
CH1 RX Vref:28.9%, TX Vref:22.8%,22.8%
CH2 RX Vref:31.0%, TX Vref:22.8%,21.8%
CH3 RX Vref:30.5%, TX Vref:21.8%,21.8%
change to F1: 528MHz
change to F2: 1068MHz
change to F3: 1560MHz
change to F0: 2112MHz
out
U-Boot SPL 2023.04 (Apr 26 2023 - 15:42:05 +0000)
Trying to boot from MMC2
## Checking hash(es) for config config-1 ... OK
## Checking hash(es) for Image atf-1 ... sha256+ OK
## Checking hash(es) for Image u-boot ... sha256+ OK
## Checking hash(es) for Image fdt-1 ... sha256+ OK
## Checking hash(es) for Image atf-2 ... sha256+ OK
## Checking hash(es) for Image atf-3 ... sha256+ OK
INFO: Preloader serial: 2
NOTICE: BL31: v2.3():v2.3-557-g9609b9c19:derrick.huang
NOTICE: BL31: Built : 14:29:57, Mar 8 2023
INFO: spec: 0x1
INFO: ext 32k is not valid
INFO: ddr: stride-en 4CH
INFO: GICv3 without legacy support detected.
INFO: ARM GICv3 driver initialized in EL3
INFO: valid_cpu_msk=0xff bcore0_rst = 0x0, bcore1_rst = 0x0
INFO: system boots from cpu-hwid-0
INFO: idle_st=0x21fff, pd_st=0x11fff9, repair_st=0xfff70001
INFO: dfs DDR fsp_params[0].freq_mhz= 2112MHz
INFO: dfs DDR fsp_params[1].freq_mhz= 528MHz
INFO: dfs DDR fsp_params[2].freq_mhz= 1068MHz
INFO: dfs DDR fsp_params[3].freq_mhz= 1560MHz
INFO: BL31: Initialising Exception Handling Framework
INFO: BL31: Initializing runtime services
WARNING: No OPTEE provided by BL2 boot loader, Booting device without OPTEE initialization. SMC`s destined for OPTEE will return SMC_UNK
ERROR: Error initializing runtime service opteed_fast
INFO: BL31: Preparing for EL3 exit to normal world
INFO: Entry point address = 0xa00000
INFO: SPSR = 0x3c9
U-Boot 2023.04 (Apr 26 2023 - 15:42:05 +0000)
Model: Radxa ROCK 5 Model B
DRAM: 8 GiB (effective 7.7 GiB)
Core: 242 devices, 20 uclasses, devicetree: separate
MMC: mmc@fe2c0000: 1, mmc@fe2e0000: 0
Loading Environment from nowhere... OK
In: serial@feb50000
Out: serial@feb50000
Err: serial@feb50000
Model: Radxa ROCK 5 Model B
Net: No ethernet found.
Hit any key to stop autoboot: 0
=> mmc info
Device: mmc@fe2e0000
Manufacturer ID: 15
OEM: 0
Name: BJTD4R
Bus Speed: 52000000
Mode: MMC DDR52 (52MHz)
Rd Block Len: 512
MMC version 5.1
High Capacity: Yes
Capacity: 29.1 GiB
Bus Width: 8-bit DDR
Erase Group Size: 512 KiB
HC WP Group Size: 8 MiB
User Capacity: 29.1 GiB WRREL
Boot Capacity: 4 MiB ENH
RPMB Capacity: 4 MiB ENH
Boot area 0 is not write protected
Boot area 1 is not write protected
=> bdinfo
boot_params = 0x0000000000000000
DRAM bank = 0x0000000000000000
-> start = 0x0000000000200000
-> size = 0x00000000efe00000
DRAM bank = 0x0000000000000001
-> start = 0x0000000100000000
-> size = 0x0000000100000000
flashstart = 0x0000000000000000
flashsize = 0x0000000000000000
flashoffset = 0x0000000000000000
baudrate = 1500000 bps
relocaddr = 0x00000000eff37000
reloc off = 0x00000000ef537000
Build = 64-bit
current eth = unknown
ethaddr = e2:ca:1c:6b:14:e1
IP addr = <NULL>
fdt_blob = 0x00000000edf0a020
new_fdt = 0x00000000edf0a020
fdt_size = 0x000000000000dd80
lmb_dump_all:
memory.cnt = 0x2 / max = 0x10
memory[0] [0x200000-0xefffffff], 0xefe00000 bytes flags: 0
memory[1] [0x100000000-0x1ffffffff], 0x100000000 bytes flags: 0
reserved.cnt = 0x3 / max = 0x10
reserved[0] [0xecf06000-0xefffffff], 0x030fa000 bytes flags: 0
reserved[1] [0xedf05a20-0xefffffff], 0x020fa5e0 bytes flags: 0
reserved[2] [0x100000000-0x1ffffffff], 0x100000000 bytes flags: 0
devicetree = separate
arch_number = 0x0000000000000000
TLB addr = 0x00000000effe0000
irq_sp = 0x00000000edf0a010
sp start = 0x00000000edf0a010
Early malloc usage: 15e0 / 80000
=>
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