thisisextrafine.cpp

prog_snippet if_snippet(const dcpu16::instruction &ins, j5::op_t test_op, bool swap)
{
	prog_snippet b_snip = value_on_stack(ins.b);
	prog_snippet a_snip = value_on_stack(ins.a);
	prog_snippet ret;

	if (!swap) ret.insert(ret.end(), b_snip.begin(), b_snip.end());
	ret.insert(ret.end(), a_snip.begin(), a_snip.end());
	if (swap) ret.insert(ret.end(), b_snip.begin(), b_snip.end());

	ret.emplace_back(j5::make_instruction(test_op));

	/* Actual length is handled in the main loop, as this
	 * requires the generated length of the next instruction. */
	ret.emplace_back(j5::make_instruction(j5::op_t::BRZERO, 2));
	ret.emplace_back(j5::make_instruction(j5::op_t::DROP));
	ret.emplace_back(j5::make_instruction(j5::op_t::DROP));
	return ret;
}

/**
 * Whole point of this program. :)
 * Takes a register instruction and converts to a stack instruction.
 * @param r Register instruction.
 * @return List of stack instructions equivalent to the register instruction.
 */
prog_snippet instruction_convert(const dcpu16::instruction &r)
{
	using namespace std::placeholders;
	static const auto ifn_snippet = std::bind(&if_snippet, _1, j5::op_t::TEQ, false);
	static const auto ifg_snippet = std::bind(&if_snippet, _1, j5::op_t::TLT, true);

	static const std::map<dcpu16::op_t, std::function<prog_snippet(const dcpu16::instruction &)>> conv_map {
		{dcpu16::op_t::SET, &set_snippet},
		{dcpu16::op_t::ADD, &add_snippet},
		{dcpu16::op_t::SUB, &sub_snippet},
		{dcpu16::op_t::OUT, &out_snippet},
		{dcpu16::op_t::IFN, ifn_snippet},
		{dcpu16::op_t::IFG, ifg_snippet},
	};
//....
}