Created
January 14, 2017 10:00
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sun7i-a20-pcduino3.dts.stock - Linux pcduino3 4.9.3-sunxi
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| /dts-v1/; | |
| / { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| interrupt-parent = <0x1>; | |
| model = "LinkSprite pcDuino3"; | |
| compatible = "linksprite,pcduino3", "allwinner,sun7i-a20"; | |
| chosen { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| ranges; | |
| stdout-path = "serial0:115200n8"; | |
| framebuffer@0 { | |
| compatible = "allwinner,simple-framebuffer", "simple-framebuffer"; | |
| allwinner,pipeline = "de_be0-lcd0-hdmi"; | |
| clocks = <0x2 0x24 0x2 0x2b 0x2 0x2c 0x3 0x4 0x5 0x1a>; | |
| status = "disabled"; | |
| }; | |
| framebuffer@1 { | |
| compatible = "allwinner,simple-framebuffer", "simple-framebuffer"; | |
| allwinner,pipeline = "de_be0-lcd0"; | |
| clocks = <0x2 0x24 0x2 0x2c 0x3 0x6 0x5 0x1a>; | |
| status = "disabled"; | |
| }; | |
| framebuffer@2 { | |
| compatible = "allwinner,simple-framebuffer", "simple-framebuffer"; | |
| allwinner,pipeline = "de_be0-lcd0-tve0"; | |
| clocks = <0x2 0x22 0x2 0x24 0x2 0x2c 0x3 0x4 0x5 0x5 0x5 0x1a>; | |
| status = "disabled"; | |
| }; | |
| }; | |
| aliases { | |
| ethernet0 = "/soc@01c00000/ethernet@01c50000"; | |
| serial0 = "/soc@01c00000/serial@01c28000"; | |
| }; | |
| memory { | |
| device_type = "memory"; | |
| reg = <0x40000000 0x80000000>; | |
| }; | |
| cpus { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| cpu@0 { | |
| compatible = "arm,cortex-a7"; | |
| device_type = "cpu"; | |
| reg = <0x0>; | |
| clocks = <0x7>; | |
| clock-latency = <0x3b9b0>; | |
| operating-points = <0xea600 0x155cc0 0xdea80 0x155cc0 0xd2f00 0x13d620 0xafc80 0x124f80 0x80e80 0x10c8e0 0x4c2c0 0xf4240 0x23280 0xf4240>; | |
| #cooling-cells = <0x2>; | |
| cooling-min-level = <0x0>; | |
| cooling-max-level = <0x6>; | |
| cpu-supply = <0x8>; | |
| linux,phandle = <0xb>; | |
| phandle = <0xb>; | |
| }; | |
| cpu@1 { | |
| compatible = "arm,cortex-a7"; | |
| device_type = "cpu"; | |
| reg = <0x1>; | |
| }; | |
| }; | |
| thermal-zones { | |
| cpu_thermal { | |
| polling-delay-passive = <0xfa>; | |
| polling-delay = <0x3e8>; | |
| thermal-sensors = <0x9>; | |
| cooling-maps { | |
| map0 { | |
| trip = <0xa>; | |
| cooling-device = <0xb 0xffffffff 0xffffffff>; | |
| }; | |
| }; | |
| trips { | |
| cpu_alert0 { | |
| temperature = <0x124f8>; | |
| hysteresis = <0x7d0>; | |
| type = "passive"; | |
| linux,phandle = <0xa>; | |
| phandle = <0xa>; | |
| }; | |
| cpu_crit { | |
| temperature = <0x186a0>; | |
| hysteresis = <0x7d0>; | |
| type = "critical"; | |
| linux,phandle = <0x4c>; | |
| phandle = <0x4c>; | |
| }; | |
| }; | |
| }; | |
| }; | |
| timer { | |
| compatible = "arm,armv7-timer"; | |
| interrupts = <0x1 0xd 0xf08 0x1 0xe 0xf08 0x1 0xb 0xf08 0x1 0xa 0xf08>; | |
| }; | |
| pmu { | |
| compatible = "arm,cortex-a7-pmu", "arm,cortex-a15-pmu"; | |
| interrupts = <0x0 0x78 0x4 0x0 0x79 0x4>; | |
| }; | |
| clocks { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| ranges; | |
| clk@01c20050 { | |
| #clock-cells = <0x0>; | |
| compatible = "allwinner,sun4i-a10-osc-clk"; | |
| reg = <0x1c20050 0x4>; | |
| clock-frequency = <0x16e3600>; | |
| clock-output-names = "osc24M"; | |
| linux,phandle = <0xc>; | |
| phandle = <0xc>; | |
| }; | |
| osc3M_clk { | |
| #clock-cells = <0x0>; | |
| compatible = "fixed-factor-clock"; | |
| clock-div = <0x8>; | |
| clock-mult = <0x1>; | |
| clocks = <0xc>; | |
| clock-output-names = "osc3M"; | |
| linux,phandle = <0xd>; | |
| phandle = <0xd>; | |
| }; | |
| clk@0 { | |
| #clock-cells = <0x0>; | |
| compatible = "fixed-clock"; | |
| clock-frequency = <0x8000>; | |
| clock-output-names = "osc32k"; | |
| linux,phandle = <0x10>; | |
| phandle = <0x10>; | |
| }; | |
| clk@01c20000 { | |
| #clock-cells = <0x0>; | |
| compatible = "allwinner,sun4i-a10-pll1-clk"; | |
| reg = <0x1c20000 0x4>; | |
| clocks = <0xc>; | |
| clock-output-names = "pll1"; | |
| linux,phandle = <0x11>; | |
| phandle = <0x11>; | |
| }; | |
| clk@01c20008 { | |
| #clock-cells = <0x1>; | |
| compatible = "allwinner,sun4i-a10-pll2-clk"; | |
| reg = <0x1c20008 0x8>; | |
| clocks = <0xc>; | |
| clock-output-names = "pll2-1x", "pll2-2x", "pll2-4x", "pll2-8x"; | |
| linux,phandle = <0x18>; | |
| phandle = <0x18>; | |
| }; | |
| clk@01c20010 { | |
| #clock-cells = <0x0>; | |
| compatible = "allwinner,sun4i-a10-pll3-clk"; | |
| reg = <0x1c20010 0x4>; | |
| clocks = <0xd>; | |
| clock-output-names = "pll3"; | |
| linux,phandle = <0xe>; | |
| phandle = <0xe>; | |
| }; | |
| pll3x2_clk { | |
| #clock-cells = <0x0>; | |
| compatible = "fixed-factor-clock"; | |
| clocks = <0xe>; | |
| clock-div = <0x1>; | |
| clock-mult = <0x2>; | |
| clock-output-names = "pll3-2x"; | |
| linux,phandle = <0x19>; | |
| phandle = <0x19>; | |
| }; | |
| clk@01c20018 { | |
| #clock-cells = <0x0>; | |
| compatible = "allwinner,sun7i-a20-pll4-clk"; | |
| reg = <0x1c20018 0x4>; | |
| clocks = <0xc>; | |
| clock-output-names = "pll4"; | |
| linux,phandle = <0x1b>; | |
| phandle = <0x1b>; | |
| }; | |
| clk@01c20020 { | |
| #clock-cells = <0x1>; | |
| compatible = "allwinner,sun4i-a10-pll5-clk"; | |
| reg = <0x1c20020 0x4>; | |
| clocks = <0xc>; | |
| clock-output-names = "pll5_ddr", "pll5_other"; | |
| linux,phandle = <0x17>; | |
| phandle = <0x17>; | |
| }; | |
| clk@01c20028 { | |
| #clock-cells = <0x1>; | |
| compatible = "allwinner,sun4i-a10-pll6-clk"; | |
| reg = <0x1c20028 0x4>; | |
| clocks = <0xc>; | |
| clock-output-names = "pll6_sata", "pll6_other", "pll6", "pll6_div_4"; | |
| linux,phandle = <0x12>; | |
| phandle = <0x12>; | |
| }; | |
| clk@01c20030 { | |
| #clock-cells = <0x0>; | |
| compatible = "allwinner,sun4i-a10-pll3-clk"; | |
| reg = <0x1c20030 0x4>; | |
| clocks = <0xd>; | |
| clock-output-names = "pll7"; | |
| linux,phandle = <0xf>; | |
| phandle = <0xf>; | |
| }; | |
| pll7x2_clk { | |
| #clock-cells = <0x0>; | |
| compatible = "fixed-factor-clock"; | |
| clocks = <0xf>; | |
| clock-div = <0x1>; | |
| clock-mult = <0x2>; | |
| clock-output-names = "pll7-2x"; | |
| linux,phandle = <0x1a>; | |
| phandle = <0x1a>; | |
| }; | |
| clk@01c20040 { | |
| #clock-cells = <0x0>; | |
| compatible = "allwinner,sun7i-a20-pll4-clk"; | |
| reg = <0x1c20040 0x4>; | |
| clocks = <0xc>; | |
| clock-output-names = "pll8"; | |
| linux,phandle = <0x4d>; | |
| phandle = <0x4d>; | |
| }; | |
| cpu@01c20054 { | |
| #clock-cells = <0x0>; | |
| compatible = "allwinner,sun4i-a10-cpu-clk"; | |
| reg = <0x1c20054 0x4>; | |
| clocks = <0x10 0xc 0x11 0x12 0x1>; | |
| clock-output-names = "cpu"; | |
| linux,phandle = <0x7>; | |
| phandle = <0x7>; | |
| }; | |
| axi@01c20054 { | |
| #clock-cells = <0x0>; | |
| compatible = "allwinner,sun4i-a10-axi-clk"; | |
| reg = <0x1c20054 0x4>; | |
| clocks = <0x7>; | |
| clock-output-names = "axi"; | |
| linux,phandle = <0x13>; | |
| phandle = <0x13>; | |
| }; | |
| ahb@01c20054 { | |
| #clock-cells = <0x0>; | |
| compatible = "allwinner,sun5i-a13-ahb-clk"; | |
| reg = <0x1c20054 0x4>; | |
| clocks = <0x13 0x12 0x3 0x12 0x1>; | |
| clock-output-names = "ahb"; | |
| assigned-clocks = <0x14>; | |
| assigned-clock-parents = <0x12 0x3>; | |
| linux,phandle = <0x14>; | |
| phandle = <0x14>; | |
| }; | |
| clk@01c20060 { | |
| #clock-cells = <0x1>; | |
| compatible = "allwinner,sun7i-a20-ahb-gates-clk"; | |
| reg = <0x1c20060 0x8>; | |
| clocks = <0x14>; | |
| clock-indices = <0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xa 0xb 0xc 0xd 0xe 0x10 0x11 0x12 0x14 0x15 0x16 0x17 0x19 0x1c 0x20 0x21 0x22 0x23 0x24 0x25 0x28 0x29 0x2a 0x2b 0x2c 0x2d 0x2e 0x2f 0x31 0x32 0x34>; | |
| clock-output-names = "ahb_usb0", "ahb_ehci0", "ahb_ohci0", "ahb_ehci1", "ahb_ohci1", "ahb_ss", "ahb_dma", "ahb_bist", "ahb_mmc0", "ahb_mmc1", "ahb_mmc2", "ahb_mmc3", "ahb_ms", "ahb_nand", "ahb_sdram", "ahb_ace", "ahb_emac", "ahb_ts", "ahb_spi0", "ahb_spi1", "ahb_spi2", "ahb_spi3", "ahb_sata", "ahb_hstimer", "ahb_ve", "ahb_tvd", "ahb_tve0", "ahb_tve1", "ahb_lcd0", "ahb_lcd1", "ahb_csi0", "ahb_csi1", "ahb_hdmi1", "ahb_hdmi0", "ahb_de_be0", "ahb_de_be1", "ahb_de_fe0", "ahb_de_fe1", "ahb_gmac", "ahb_mp", "ahb_mali"; | |
| linux,phandle = <0x2>; | |
| phandle = <0x2>; | |
| }; | |
| apb0@01c20054 { | |
| #clock-cells = <0x0>; | |
| compatible = "allwinner,sun4i-a10-apb0-clk"; | |
| reg = <0x1c20054 0x4>; | |
| clocks = <0x14>; | |
| clock-output-names = "apb0"; | |
| linux,phandle = <0x15>; | |
| phandle = <0x15>; | |
| }; | |
| clk@01c20068 { | |
| #clock-cells = <0x1>; | |
| compatible = "allwinner,sun7i-a20-apb0-gates-clk"; | |
| reg = <0x1c20068 0x4>; | |
| clocks = <0x15>; | |
| clock-indices = <0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0xa>; | |
| clock-output-names = "apb0_codec", "apb0_spdif", "apb0_ac97", "apb0_i2s0", "apb0_i2s1", "apb0_pio", "apb0_ir0", "apb0_ir1", "apb0_i2s2", "apb0_keypad"; | |
| linux,phandle = <0x36>; | |
| phandle = <0x36>; | |
| }; | |
| clk@01c20058 { | |
| #clock-cells = <0x0>; | |
| compatible = "allwinner,sun4i-a10-apb1-clk"; | |
| reg = <0x1c20058 0x4>; | |
| clocks = <0xc 0x12 0x1 0x10>; | |
| clock-output-names = "apb1"; | |
| linux,phandle = <0x16>; | |
| phandle = <0x16>; | |
| }; | |
| clk@01c2006c { | |
| #clock-cells = <0x1>; | |
| compatible = "allwinner,sun7i-a20-apb1-gates-clk"; | |
| reg = <0x1c2006c 0x4>; | |
| clocks = <0x16>; | |
| clock-indices = <0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0xf 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17>; | |
| clock-output-names = "apb1_i2c0", "apb1_i2c1", "apb1_i2c2", "apb1_i2c3", "apb1_can", "apb1_scr", "apb1_ps20", "apb1_ps21", "apb1_i2c4", "apb1_uart0", "apb1_uart1", "apb1_uart2", "apb1_uart3", "apb1_uart4", "apb1_uart5", "apb1_uart6", "apb1_uart7"; | |
| linux,phandle = <0x38>; | |
| phandle = <0x38>; | |
| }; | |
| clk@01c20080 { | |
| #clock-cells = <0x0>; | |
| compatible = "allwinner,sun4i-a10-mod0-clk"; | |
| reg = <0x1c20080 0x4>; | |
| clocks = <0xc 0x12 0x1 0x17 0x1>; | |
| clock-output-names = "nand"; | |
| linux,phandle = <0x1f>; | |
| phandle = <0x1f>; | |
| }; | |
| clk@01c20084 { | |
| #clock-cells = <0x0>; | |
| compatible = "allwinner,sun4i-a10-mod0-clk"; | |
| reg = <0x1c20084 0x4>; | |
| clocks = <0xc 0x12 0x1 0x17 0x1>; | |
| clock-output-names = "ms"; | |
| linux,phandle = <0x4e>; | |
| phandle = <0x4e>; | |
| }; | |
| clk@01c20088 { | |
| #clock-cells = <0x1>; | |
| compatible = "allwinner,sun4i-a10-mmc-clk"; | |
| reg = <0x1c20088 0x4>; | |
| clocks = <0xc 0x12 0x1 0x17 0x1>; | |
| clock-output-names = "mmc0", "mmc0_output", "mmc0_sample"; | |
| linux,phandle = <0x24>; | |
| phandle = <0x24>; | |
| }; | |
| clk@01c2008c { | |
| #clock-cells = <0x1>; | |
| compatible = "allwinner,sun4i-a10-mmc-clk"; | |
| reg = <0x1c2008c 0x4>; | |
| clocks = <0xc 0x12 0x1 0x17 0x1>; | |
| clock-output-names = "mmc1", "mmc1_output", "mmc1_sample"; | |
| linux,phandle = <0x29>; | |
| phandle = <0x29>; | |
| }; | |
| clk@01c20090 { | |
| #clock-cells = <0x1>; | |
| compatible = "allwinner,sun4i-a10-mmc-clk"; | |
| reg = <0x1c20090 0x4>; | |
| clocks = <0xc 0x12 0x1 0x17 0x1>; | |
| clock-output-names = "mmc2", "mmc2_output", "mmc2_sample"; | |
| linux,phandle = <0x2a>; | |
| phandle = <0x2a>; | |
| }; | |
| clk@01c20094 { | |
| #clock-cells = <0x1>; | |
| compatible = "allwinner,sun4i-a10-mmc-clk"; | |
| reg = <0x1c20094 0x4>; | |
| clocks = <0xc 0x12 0x1 0x17 0x1>; | |
| clock-output-names = "mmc3", "mmc3_output", "mmc3_sample"; | |
| linux,phandle = <0x2b>; | |
| phandle = <0x2b>; | |
| }; | |
| clk@01c20098 { | |
| #clock-cells = <0x0>; | |
| compatible = "allwinner,sun4i-a10-mod0-clk"; | |
| reg = <0x1c20098 0x4>; | |
| clocks = <0xc 0x12 0x1 0x17 0x1>; | |
| clock-output-names = "ts"; | |
| linux,phandle = <0x4f>; | |
| phandle = <0x4f>; | |
| }; | |
| clk@01c2009c { | |
| #clock-cells = <0x0>; | |
| compatible = "allwinner,sun4i-a10-mod0-clk"; | |
| reg = <0x1c2009c 0x4>; | |
| clocks = <0xc 0x12 0x1 0x17 0x1>; | |
| clock-output-names = "ss"; | |
| linux,phandle = <0x32>; | |
| phandle = <0x32>; | |
| }; | |
| clk@01c200a0 { | |
| #clock-cells = <0x0>; | |
| compatible = "allwinner,sun4i-a10-mod0-clk"; | |
| reg = <0x1c200a0 0x4>; | |
| clocks = <0xc 0x12 0x1 0x17 0x1>; | |
| clock-output-names = "spi0"; | |
| linux,phandle = <0x21>; | |
| phandle = <0x21>; | |
| }; | |
| clk@01c200a4 { | |
| #clock-cells = <0x0>; | |
| compatible = "allwinner,sun4i-a10-mod0-clk"; | |
| reg = <0x1c200a4 0x4>; | |
| clocks = <0xc 0x12 0x1 0x17 0x1>; | |
| clock-output-names = "spi1"; | |
| linux,phandle = <0x22>; | |
| phandle = <0x22>; | |
| }; | |
| clk@01c200a8 { | |
| #clock-cells = <0x0>; | |
| compatible = "allwinner,sun4i-a10-mod0-clk"; | |
| reg = <0x1c200a8 0x4>; | |
| clocks = <0xc 0x12 0x1 0x17 0x1>; | |
| clock-output-names = "spi2"; | |
| linux,phandle = <0x33>; | |
| phandle = <0x33>; | |
| }; | |
| clk@01c200ac { | |
| #clock-cells = <0x0>; | |
| compatible = "allwinner,sun4i-a10-mod0-clk"; | |
| reg = <0x1c200ac 0x4>; | |
| clocks = <0xc 0x12 0x1 0x17 0x1>; | |
| clock-output-names = "pata"; | |
| linux,phandle = <0x50>; | |
| phandle = <0x50>; | |
| }; | |
| clk@01c200b0 { | |
| #clock-cells = <0x0>; | |
| compatible = "allwinner,sun4i-a10-mod0-clk"; | |
| reg = <0x1c200b0 0x4>; | |
| clocks = <0xc 0x12 0x1 0x17 0x1>; | |
| clock-output-names = "ir0"; | |
| linux,phandle = <0x39>; | |
| phandle = <0x39>; | |
| }; | |
| clk@01c200b4 { | |
| #clock-cells = <0x0>; | |
| compatible = "allwinner,sun4i-a10-mod0-clk"; | |
| reg = <0x1c200b4 0x4>; | |
| clocks = <0xc 0x12 0x1 0x17 0x1>; | |
| clock-output-names = "ir1"; | |
| linux,phandle = <0x3b>; | |
| phandle = <0x3b>; | |
| }; | |
| clk@01c200b8 { | |
| #clock-cells = <0x0>; | |
| compatible = "allwinner,sun4i-a10-mod1-clk"; | |
| reg = <0x1c200b8 0x4>; | |
| clocks = <0x18 0x3 0x18 0x2 0x18 0x1 0x18 0x0>; | |
| clock-output-names = "i2s0"; | |
| linux,phandle = <0x3d>; | |
| phandle = <0x3d>; | |
| }; | |
| clk@01c200bc { | |
| #clock-cells = <0x0>; | |
| compatible = "allwinner,sun4i-a10-mod1-clk"; | |
| reg = <0x1c200bc 0x4>; | |
| clocks = <0x18 0x3 0x18 0x2 0x18 0x1 0x18 0x0>; | |
| clock-output-names = "ac97"; | |
| linux,phandle = <0x51>; | |
| phandle = <0x51>; | |
| }; | |
| clk@01c200c0 { | |
| #clock-cells = <0x0>; | |
| compatible = "allwinner,sun4i-a10-mod1-clk"; | |
| reg = <0x1c200c0 0x4>; | |
| clocks = <0x18 0x3 0x18 0x2 0x18 0x1 0x18 0x0>; | |
| clock-output-names = "spdif"; | |
| linux,phandle = <0x37>; | |
| phandle = <0x37>; | |
| }; | |
| clk@01c200c4 { | |
| #clock-cells = <0x0>; | |
| compatible = "allwinner,sun4i-a10-mod0-clk"; | |
| reg = <0x1c200c4 0x4>; | |
| clocks = <0xc>; | |
| clock-output-names = "keypad"; | |
| linux,phandle = <0x52>; | |
| phandle = <0x52>; | |
| }; | |
| clk@01c200cc { | |
| #clock-cells = <0x1>; | |
| #reset-cells = <0x1>; | |
| compatible = "allwinner,sun4i-a10-usb-clk"; | |
| reg = <0x1c200cc 0x4>; | |
| clocks = <0x12 0x1>; | |
| clock-output-names = "usb_ohci0", "usb_ohci1", "usb_phy"; | |
| linux,phandle = <0x2e>; | |
| phandle = <0x2e>; | |
| }; | |
| clk@01c200d4 { | |
| #clock-cells = <0x0>; | |
| compatible = "allwinner,sun4i-a10-mod0-clk"; | |
| reg = <0x1c200d4 0x4>; | |
| clocks = <0xc 0x12 0x1 0x17 0x1>; | |
| clock-output-names = "spi3"; | |
| linux,phandle = <0x35>; | |
| phandle = <0x35>; | |
| }; | |
| clk@01c200d8 { | |
| #clock-cells = <0x0>; | |
| compatible = "allwinner,sun4i-a10-mod1-clk"; | |
| reg = <0x1c200d8 0x4>; | |
| clocks = <0x18 0x3 0x18 0x2 0x18 0x1 0x18 0x0>; | |
| clock-output-names = "i2s1"; | |
| linux,phandle = <0x3c>; | |
| phandle = <0x3c>; | |
| }; | |
| clk@01c200dc { | |
| #clock-cells = <0x0>; | |
| compatible = "allwinner,sun4i-a10-mod1-clk"; | |
| reg = <0x1c200dc 0x4>; | |
| clocks = <0x18 0x3 0x18 0x2 0x18 0x1 0x18 0x0>; | |
| clock-output-names = "i2s2"; | |
| linux,phandle = <0x3f>; | |
| phandle = <0x3f>; | |
| }; | |
| clk@01c20100 { | |
| #clock-cells = <0x1>; | |
| compatible = "allwinner,sun4i-a10-dram-gates-clk"; | |
| reg = <0x1c20100 0x4>; | |
| clocks = <0x17 0x0>; | |
| clock-indices = <0x0 0x1 0x2 0x3 0x4 0x5 0x6 0xf 0x18 0x19 0x1a 0x1b 0x1c 0x1d>; | |
| clock-output-names = "dram_ve", "dram_csi0", "dram_csi1", "dram_ts", "dram_tvd", "dram_tve0", "dram_tve1", "dram_output", "dram_de_fe1", "dram_de_fe0", "dram_de_be0", "dram_de_be1", "dram_de_mp", "dram_ace"; | |
| linux,phandle = <0x5>; | |
| phandle = <0x5>; | |
| }; | |
| clk@01c20104 { | |
| #clock-cells = <0x0>; | |
| #reset-cells = <0x0>; | |
| compatible = "allwinner,sun4i-a10-display-clk"; | |
| reg = <0x1c20104 0x4>; | |
| clocks = <0xe 0xf 0x17 0x1>; | |
| clock-output-names = "de-be0"; | |
| linux,phandle = <0x3>; | |
| phandle = <0x3>; | |
| }; | |
| clk@01c20108 { | |
| #clock-cells = <0x0>; | |
| #reset-cells = <0x0>; | |
| compatible = "allwinner,sun4i-a10-display-clk"; | |
| reg = <0x1c20108 0x4>; | |
| clocks = <0xe 0xf 0x17 0x1>; | |
| clock-output-names = "de-be1"; | |
| linux,phandle = <0x53>; | |
| phandle = <0x53>; | |
| }; | |
| clk@01c2010c { | |
| #clock-cells = <0x0>; | |
| #reset-cells = <0x0>; | |
| compatible = "allwinner,sun4i-a10-display-clk"; | |
| reg = <0x1c2010c 0x4>; | |
| clocks = <0xe 0xf 0x17 0x1>; | |
| clock-output-names = "de-fe0"; | |
| linux,phandle = <0x54>; | |
| phandle = <0x54>; | |
| }; | |
| clk@01c20110 { | |
| #clock-cells = <0x0>; | |
| #reset-cells = <0x0>; | |
| compatible = "allwinner,sun4i-a10-display-clk"; | |
| reg = <0x1c20110 0x4>; | |
| clocks = <0xe 0xf 0x17 0x1>; | |
| clock-output-names = "de-fe1"; | |
| linux,phandle = <0x55>; | |
| phandle = <0x55>; | |
| }; | |
| clk@01c20118 { | |
| #clock-cells = <0x0>; | |
| #reset-cells = <0x1>; | |
| compatible = "allwinner,sun4i-a10-tcon-ch0-clk"; | |
| reg = <0x1c20118 0x4>; | |
| clocks = <0xe 0xf 0x19 0x1a>; | |
| clock-output-names = "tcon0-ch0-sclk"; | |
| linux,phandle = <0x6>; | |
| phandle = <0x6>; | |
| }; | |
| clk@01c2011c { | |
| #clock-cells = <0x0>; | |
| #reset-cells = <0x1>; | |
| compatible = "allwinner,sun4i-a10-tcon-ch1-clk"; | |
| reg = <0x1c2011c 0x4>; | |
| clocks = <0xe 0xf 0x19 0x1a>; | |
| clock-output-names = "tcon1-ch0-sclk"; | |
| linux,phandle = <0x56>; | |
| phandle = <0x56>; | |
| }; | |
| clk@01c2012c { | |
| #clock-cells = <0x0>; | |
| compatible = "allwinner,sun4i-a10-tcon-ch0-clk"; | |
| reg = <0x1c2012c 0x4>; | |
| clocks = <0xe 0xf 0x19 0x1a>; | |
| clock-output-names = "tcon0-ch1-sclk"; | |
| linux,phandle = <0x4>; | |
| phandle = <0x4>; | |
| }; | |
| clk@01c20130 { | |
| #clock-cells = <0x0>; | |
| compatible = "allwinner,sun4i-a10-tcon-ch1-clk"; | |
| reg = <0x1c20130 0x4>; | |
| clocks = <0xe 0xf 0x19 0x1a>; | |
| clock-output-names = "tcon1-ch1-sclk"; | |
| linux,phandle = <0x57>; | |
| phandle = <0x57>; | |
| }; | |
| clk@01c2013c { | |
| #clock-cells = <0x0>; | |
| #reset-cells = <0x0>; | |
| compatible = "allwinner,sun4i-a10-ve-clk"; | |
| reg = <0x1c2013c 0x4>; | |
| clocks = <0x1b>; | |
| clock-output-names = "ve"; | |
| linux,phandle = <0x58>; | |
| phandle = <0x58>; | |
| }; | |
| clk@01c20140 { | |
| #clock-cells = <0x0>; | |
| compatible = "allwinner,sun4i-a10-codec-clk"; | |
| reg = <0x1c20140 0x4>; | |
| clocks = <0x18 0x0>; | |
| clock-output-names = "codec"; | |
| linux,phandle = <0x3e>; | |
| phandle = <0x3e>; | |
| }; | |
| clk@01c2015c { | |
| #clock-cells = <0x0>; | |
| compatible = "allwinner,sun5i-a13-mbus-clk"; | |
| reg = <0x1c2015c 0x4>; | |
| clocks = <0xc 0x12 0x2 0x17 0x1>; | |
| clock-output-names = "mbus"; | |
| linux,phandle = <0x59>; | |
| phandle = <0x59>; | |
| }; | |
| clk@2 { | |
| #clock-cells = <0x0>; | |
| compatible = "fixed-clock"; | |
| clock-frequency = <0x17d7840>; | |
| clock-output-names = "mii_phy_tx"; | |
| linux,phandle = <0x1c>; | |
| phandle = <0x1c>; | |
| }; | |
| clk@3 { | |
| #clock-cells = <0x0>; | |
| compatible = "fixed-clock"; | |
| clock-frequency = <0x7735940>; | |
| clock-output-names = "gmac_int_tx"; | |
| linux,phandle = <0x1d>; | |
| phandle = <0x1d>; | |
| }; | |
| clk@01c20164 { | |
| #clock-cells = <0x0>; | |
| compatible = "allwinner,sun7i-a20-gmac-clk"; | |
| reg = <0x1c20164 0x4>; | |
| clocks = <0x1c 0x1d>; | |
| clock-output-names = "gmac_tx"; | |
| linux,phandle = <0x43>; | |
| phandle = <0x43>; | |
| }; | |
| clk@1 { | |
| #clock-cells = <0x0>; | |
| compatible = "fixed-factor-clock"; | |
| clock-div = <0x2ee>; | |
| clock-mult = <0x1>; | |
| clocks = <0xc>; | |
| clock-output-names = "osc24M_32k"; | |
| linux,phandle = <0x1e>; | |
| phandle = <0x1e>; | |
| }; | |
| clk@01c201f0 { | |
| #clock-cells = <0x0>; | |
| compatible = "allwinner,sun7i-a20-out-clk"; | |
| reg = <0x1c201f0 0x4>; | |
| clocks = <0x1e 0x10 0xc>; | |
| clock-output-names = "clk_out_a"; | |
| linux,phandle = <0x5a>; | |
| phandle = <0x5a>; | |
| }; | |
| clk@01c201f4 { | |
| #clock-cells = <0x0>; | |
| compatible = "allwinner,sun7i-a20-out-clk"; | |
| reg = <0x1c201f4 0x4>; | |
| clocks = <0x1e 0x10 0xc>; | |
| clock-output-names = "clk_out_b"; | |
| linux,phandle = <0x5b>; | |
| phandle = <0x5b>; | |
| }; | |
| }; | |
| soc@01c00000 { | |
| compatible = "simple-bus"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| ranges; | |
| sram-controller@01c00000 { | |
| compatible = "allwinner,sun4i-a10-sram-controller"; | |
| reg = <0x1c00000 0x30>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| ranges; | |
| sram@00000000 { | |
| compatible = "mmio-sram"; | |
| reg = <0x0 0xc000>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| ranges = <0x0 0x0 0xc000>; | |
| linux,phandle = <0x5c>; | |
| phandle = <0x5c>; | |
| sram-section@8000 { | |
| compatible = "allwinner,sun4i-a10-sram-a3-a4"; | |
| reg = <0x8000 0x4000>; | |
| status = "disabled"; | |
| linux,phandle = <0x23>; | |
| phandle = <0x23>; | |
| }; | |
| }; | |
| sram@00010000 { | |
| compatible = "mmio-sram"; | |
| reg = <0x10000 0x1000>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| ranges = <0x0 0x10000 0x1000>; | |
| linux,phandle = <0x5d>; | |
| phandle = <0x5d>; | |
| sram-section@0000 { | |
| compatible = "allwinner,sun4i-a10-sram-d"; | |
| reg = <0x0 0x1000>; | |
| status = "okay"; | |
| linux,phandle = <0x2d>; | |
| phandle = <0x2d>; | |
| }; | |
| }; | |
| }; | |
| interrupt-controller@01c00030 { | |
| compatible = "allwinner,sun7i-a20-sc-nmi"; | |
| interrupt-controller; | |
| #interrupt-cells = <0x2>; | |
| reg = <0x1c00030 0xc>; | |
| interrupts = <0x0 0x0 0x4>; | |
| linux,phandle = <0x42>; | |
| phandle = <0x42>; | |
| }; | |
| dma-controller@01c02000 { | |
| compatible = "allwinner,sun4i-a10-dma"; | |
| reg = <0x1c02000 0x1000>; | |
| interrupts = <0x0 0x1b 0x4>; | |
| clocks = <0x2 0x6>; | |
| #dma-cells = <0x2>; | |
| linux,phandle = <0x20>; | |
| phandle = <0x20>; | |
| }; | |
| nand@01c03000 { | |
| compatible = "allwinner,sun4i-a10-nand"; | |
| reg = <0x1c03000 0x1000>; | |
| interrupts = <0x0 0x25 0x4>; | |
| clocks = <0x2 0xd 0x1f>; | |
| clock-names = "ahb", "mod"; | |
| dmas = <0x20 0x1 0x3>; | |
| dma-names = "rxtx"; | |
| status = "disabled"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| linux,phandle = <0x5e>; | |
| phandle = <0x5e>; | |
| }; | |
| spi@01c05000 { | |
| compatible = "allwinner,sun4i-a10-spi"; | |
| reg = <0x1c05000 0x1000>; | |
| interrupts = <0x0 0xa 0x4>; | |
| clocks = <0x2 0x14 0x21>; | |
| clock-names = "ahb", "mod"; | |
| dmas = <0x20 0x1 0x1b 0x20 0x1 0x1a>; | |
| dma-names = "rx", "tx"; | |
| status = "disabled"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| linux,phandle = <0x5f>; | |
| phandle = <0x5f>; | |
| }; | |
| spi@01c06000 { | |
| compatible = "allwinner,sun4i-a10-spi"; | |
| reg = <0x1c06000 0x1000>; | |
| interrupts = <0x0 0xb 0x4>; | |
| clocks = <0x2 0x15 0x22>; | |
| clock-names = "ahb", "mod"; | |
| dmas = <0x20 0x1 0x9 0x20 0x1 0x8>; | |
| dma-names = "rx", "tx"; | |
| status = "disabled"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| linux,phandle = <0x60>; | |
| phandle = <0x60>; | |
| }; | |
| ethernet@01c0b000 { | |
| compatible = "allwinner,sun4i-a10-emac"; | |
| reg = <0x1c0b000 0x1000>; | |
| interrupts = <0x0 0x37 0x4>; | |
| clocks = <0x2 0x11>; | |
| allwinner,sram = <0x23 0x1>; | |
| status = "disabled"; | |
| linux,phandle = <0x61>; | |
| phandle = <0x61>; | |
| }; | |
| mdio@01c0b080 { | |
| compatible = "allwinner,sun4i-a10-mdio"; | |
| reg = <0x1c0b080 0x14>; | |
| status = "disabled"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| linux,phandle = <0x62>; | |
| phandle = <0x62>; | |
| }; | |
| mmc@01c0f000 { | |
| compatible = "allwinner,sun7i-a20-mmc"; | |
| reg = <0x1c0f000 0x1000>; | |
| clocks = <0x2 0x8 0x24 0x0 0x24 0x1 0x24 0x2>; | |
| clock-names = "ahb", "mmc", "output", "sample"; | |
| interrupts = <0x0 0x20 0x4>; | |
| status = "okay"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x25 0x26>; | |
| vmmc-supply = <0x27>; | |
| bus-width = <0x4>; | |
| cd-gpios = <0x28 0x7 0x1 0x0>; | |
| cd-inverted; | |
| linux,phandle = <0x63>; | |
| phandle = <0x63>; | |
| }; | |
| mmc@01c10000 { | |
| compatible = "allwinner,sun7i-a20-mmc"; | |
| reg = <0x1c10000 0x1000>; | |
| clocks = <0x2 0x9 0x29 0x0 0x29 0x1 0x29 0x2>; | |
| clock-names = "ahb", "mmc", "output", "sample"; | |
| interrupts = <0x0 0x21 0x4>; | |
| status = "disabled"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| linux,phandle = <0x64>; | |
| phandle = <0x64>; | |
| }; | |
| mmc@01c11000 { | |
| compatible = "allwinner,sun7i-a20-mmc"; | |
| reg = <0x1c11000 0x1000>; | |
| clocks = <0x2 0xa 0x2a 0x0 0x2a 0x1 0x2a 0x2>; | |
| clock-names = "ahb", "mmc", "output", "sample"; | |
| interrupts = <0x0 0x22 0x4>; | |
| status = "disabled"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| linux,phandle = <0x65>; | |
| phandle = <0x65>; | |
| }; | |
| mmc@01c12000 { | |
| compatible = "allwinner,sun7i-a20-mmc"; | |
| reg = <0x1c12000 0x1000>; | |
| clocks = <0x2 0xb 0x2b 0x0 0x2b 0x1 0x2b 0x2>; | |
| clock-names = "ahb", "mmc", "output", "sample"; | |
| interrupts = <0x0 0x23 0x4>; | |
| status = "disabled"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| linux,phandle = <0x66>; | |
| phandle = <0x66>; | |
| }; | |
| usb@01c13000 { | |
| compatible = "allwinner,sun4i-a10-musb"; | |
| reg = <0x1c13000 0x400>; | |
| clocks = <0x2 0x0>; | |
| interrupts = <0x0 0x26 0x4>; | |
| interrupt-names = "mc"; | |
| phys = <0x2c 0x0>; | |
| phy-names = "usb"; | |
| extcon = <0x2c 0x0>; | |
| allwinner,sram = <0x2d 0x1>; | |
| status = "okay"; | |
| dr_mode = "otg"; | |
| linux,phandle = <0x67>; | |
| phandle = <0x67>; | |
| }; | |
| phy@01c13400 { | |
| #phy-cells = <0x1>; | |
| compatible = "allwinner,sun7i-a20-usb-phy"; | |
| reg = <0x1c13400 0x10 0x1c14800 0x4 0x1c1c800 0x4>; | |
| reg-names = "phy_ctrl", "pmu1", "pmu2"; | |
| clocks = <0x2e 0x8>; | |
| clock-names = "usb_phy"; | |
| resets = <0x2e 0x0 0x2e 0x1 0x2e 0x2>; | |
| reset-names = "usb0_reset", "usb1_reset", "usb2_reset"; | |
| status = "okay"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x2f>; | |
| usb0_id_det-gpio = <0x28 0x7 0x4 0x0>; | |
| usb1_vbus-supply = <0x30>; | |
| usb2_vbus-supply = <0x31>; | |
| linux,phandle = <0x2c>; | |
| phandle = <0x2c>; | |
| }; | |
| usb@01c14000 { | |
| compatible = "allwinner,sun7i-a20-ehci", "generic-ehci"; | |
| reg = <0x1c14000 0x100>; | |
| interrupts = <0x0 0x27 0x4>; | |
| clocks = <0x2 0x1>; | |
| phys = <0x2c 0x1>; | |
| phy-names = "usb"; | |
| status = "okay"; | |
| linux,phandle = <0x68>; | |
| phandle = <0x68>; | |
| }; | |
| usb@01c14400 { | |
| compatible = "allwinner,sun7i-a20-ohci", "generic-ohci"; | |
| reg = <0x1c14400 0x100>; | |
| interrupts = <0x0 0x40 0x4>; | |
| clocks = <0x2e 0x6 0x2 0x2>; | |
| phys = <0x2c 0x1>; | |
| phy-names = "usb"; | |
| status = "okay"; | |
| linux,phandle = <0x69>; | |
| phandle = <0x69>; | |
| }; | |
| crypto-engine@01c15000 { | |
| compatible = "allwinner,sun4i-a10-crypto"; | |
| reg = <0x1c15000 0x1000>; | |
| interrupts = <0x0 0x56 0x4>; | |
| clocks = <0x2 0x5 0x32>; | |
| clock-names = "ahb", "mod"; | |
| linux,phandle = <0x6a>; | |
| phandle = <0x6a>; | |
| }; | |
| spi@01c17000 { | |
| compatible = "allwinner,sun4i-a10-spi"; | |
| reg = <0x1c17000 0x1000>; | |
| interrupts = <0x0 0xc 0x4>; | |
| clocks = <0x2 0x16 0x33>; | |
| clock-names = "ahb", "mod"; | |
| dmas = <0x20 0x1 0x1d 0x20 0x1 0x1c>; | |
| dma-names = "rx", "tx"; | |
| status = "disabled"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| linux,phandle = <0x6b>; | |
| phandle = <0x6b>; | |
| }; | |
| sata@01c18000 { | |
| compatible = "allwinner,sun4i-a10-ahci"; | |
| reg = <0x1c18000 0x1000>; | |
| interrupts = <0x0 0x38 0x4>; | |
| clocks = <0x12 0x0 0x2 0x19>; | |
| status = "okay"; | |
| target-supply = <0x34>; | |
| linux,phandle = <0x6c>; | |
| phandle = <0x6c>; | |
| }; | |
| usb@01c1c000 { | |
| compatible = "allwinner,sun7i-a20-ehci", "generic-ehci"; | |
| reg = <0x1c1c000 0x100>; | |
| interrupts = <0x0 0x28 0x4>; | |
| clocks = <0x2 0x3>; | |
| phys = <0x2c 0x2>; | |
| phy-names = "usb"; | |
| status = "okay"; | |
| linux,phandle = <0x6d>; | |
| phandle = <0x6d>; | |
| }; | |
| usb@01c1c400 { | |
| compatible = "allwinner,sun7i-a20-ohci", "generic-ohci"; | |
| reg = <0x1c1c400 0x100>; | |
| interrupts = <0x0 0x41 0x4>; | |
| clocks = <0x2e 0x7 0x2 0x4>; | |
| phys = <0x2c 0x2>; | |
| phy-names = "usb"; | |
| status = "okay"; | |
| linux,phandle = <0x6e>; | |
| phandle = <0x6e>; | |
| }; | |
| spi@01c1f000 { | |
| compatible = "allwinner,sun4i-a10-spi"; | |
| reg = <0x1c1f000 0x1000>; | |
| interrupts = <0x0 0x32 0x4>; | |
| clocks = <0x2 0x17 0x35>; | |
| clock-names = "ahb", "mod"; | |
| dmas = <0x20 0x1 0x1f 0x20 0x1 0x1e>; | |
| dma-names = "rx", "tx"; | |
| status = "disabled"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| linux,phandle = <0x6f>; | |
| phandle = <0x6f>; | |
| }; | |
| pinctrl@01c20800 { | |
| compatible = "allwinner,sun7i-a20-pinctrl"; | |
| reg = <0x1c20800 0x400>; | |
| interrupts = <0x0 0x1c 0x4>; | |
| clocks = <0x36 0x5>; | |
| gpio-controller; | |
| interrupt-controller; | |
| #interrupt-cells = <0x3>; | |
| #gpio-cells = <0x3>; | |
| linux,phandle = <0x28>; | |
| phandle = <0x28>; | |
| clk_out_a@0 { | |
| allwinner,pins = "PI12"; | |
| allwinner,function = "clk_out_a"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x70>; | |
| phandle = <0x70>; | |
| }; | |
| clk_out_b@0 { | |
| allwinner,pins = "PI13"; | |
| allwinner,function = "clk_out_b"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x71>; | |
| phandle = <0x71>; | |
| }; | |
| emac0@0 { | |
| allwinner,pins = "PA0", "PA1", "PA2", "PA3", "PA4", "PA5", "PA6", "PA7", "PA8", "PA9", "PA10", "PA11", "PA12", "PA13", "PA14", "PA15", "PA16"; | |
| allwinner,function = "emac"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x72>; | |
| phandle = <0x72>; | |
| }; | |
| gmac_mii@0 { | |
| allwinner,pins = "PA0", "PA1", "PA2", "PA3", "PA4", "PA5", "PA6", "PA7", "PA8", "PA9", "PA10", "PA11", "PA12", "PA13", "PA14", "PA15", "PA16"; | |
| allwinner,function = "gmac"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x44>; | |
| phandle = <0x44>; | |
| }; | |
| gmac_rgmii@0 { | |
| allwinner,pins = "PA0", "PA1", "PA2", "PA3", "PA4", "PA5", "PA6", "PA7", "PA8", "PA10", "PA11", "PA12", "PA13", "PA15", "PA16"; | |
| allwinner,function = "gmac"; | |
| allwinner,drive = <0x3>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x73>; | |
| phandle = <0x73>; | |
| }; | |
| i2c0@0 { | |
| allwinner,pins = "PB0", "PB1"; | |
| allwinner,function = "i2c0"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x41>; | |
| phandle = <0x41>; | |
| }; | |
| i2c1@0 { | |
| allwinner,pins = "PB18", "PB19"; | |
| allwinner,function = "i2c1"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x74>; | |
| phandle = <0x74>; | |
| }; | |
| i2c2@0 { | |
| allwinner,pins = "PB20", "PB21"; | |
| allwinner,function = "i2c2"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x75>; | |
| phandle = <0x75>; | |
| }; | |
| i2c3@0 { | |
| allwinner,pins = "PI0", "PI1"; | |
| allwinner,function = "i2c3"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x76>; | |
| phandle = <0x76>; | |
| }; | |
| ir0@0 { | |
| allwinner,pins = "PB4"; | |
| allwinner,function = "ir0"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x3a>; | |
| phandle = <0x3a>; | |
| }; | |
| ir0@1 { | |
| allwinner,pins = "PB3"; | |
| allwinner,function = "ir0"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x77>; | |
| phandle = <0x77>; | |
| }; | |
| ir1@0 { | |
| allwinner,pins = "PB23"; | |
| allwinner,function = "ir1"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x78>; | |
| phandle = <0x78>; | |
| }; | |
| ir1@1 { | |
| allwinner,pins = "PB22"; | |
| allwinner,function = "ir1"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x79>; | |
| phandle = <0x79>; | |
| }; | |
| mmc0@0 { | |
| allwinner,pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; | |
| allwinner,function = "mmc0"; | |
| allwinner,drive = <0x2>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x25>; | |
| phandle = <0x25>; | |
| }; | |
| mmc0_cd_pin@0 { | |
| allwinner,pins = "PH1"; | |
| allwinner,function = "gpio_in"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x1>; | |
| linux,phandle = <0x26>; | |
| phandle = <0x26>; | |
| }; | |
| mmc2@0 { | |
| allwinner,pins = "PC6", "PC7", "PC8", "PC9", "PC10", "PC11"; | |
| allwinner,function = "mmc2"; | |
| allwinner,drive = <0x2>; | |
| allwinner,pull = <0x1>; | |
| linux,phandle = <0x7a>; | |
| phandle = <0x7a>; | |
| }; | |
| mmc3@0 { | |
| allwinner,pins = "PI4", "PI5", "PI6", "PI7", "PI8", "PI9"; | |
| allwinner,function = "mmc3"; | |
| allwinner,drive = <0x2>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x7b>; | |
| phandle = <0x7b>; | |
| }; | |
| can0@0 { | |
| allwinner,pins = "PH20", "PH21"; | |
| allwinner,function = "can"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x7c>; | |
| phandle = <0x7c>; | |
| }; | |
| ps20@0 { | |
| allwinner,pins = "PI20", "PI21"; | |
| allwinner,function = "ps2"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x7d>; | |
| phandle = <0x7d>; | |
| }; | |
| ps21@0 { | |
| allwinner,pins = "PH12", "PH13"; | |
| allwinner,function = "ps2"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x7e>; | |
| phandle = <0x7e>; | |
| }; | |
| pwm0@0 { | |
| allwinner,pins = "PB2"; | |
| allwinner,function = "pwm"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x7f>; | |
| phandle = <0x7f>; | |
| }; | |
| pwm1@0 { | |
| allwinner,pins = "PI3"; | |
| allwinner,function = "pwm"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x80>; | |
| phandle = <0x80>; | |
| }; | |
| spdif@0 { | |
| allwinner,pins = "PB13"; | |
| allwinner,function = "spdif"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x1>; | |
| linux,phandle = <0x81>; | |
| phandle = <0x81>; | |
| }; | |
| spi0@0 { | |
| allwinner,pins = "PI11", "PI12", "PI13"; | |
| allwinner,function = "spi0"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x82>; | |
| phandle = <0x82>; | |
| }; | |
| spi0_cs0@0 { | |
| allwinner,pins = "PI10"; | |
| allwinner,function = "spi0"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x83>; | |
| phandle = <0x83>; | |
| }; | |
| spi0_cs1@0 { | |
| allwinner,pins = "PI14"; | |
| allwinner,function = "spi0"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x84>; | |
| phandle = <0x84>; | |
| }; | |
| spi1@0 { | |
| allwinner,pins = "PI17", "PI18", "PI19"; | |
| allwinner,function = "spi1"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x85>; | |
| phandle = <0x85>; | |
| }; | |
| spi1_cs0@0 { | |
| allwinner,pins = "PI16"; | |
| allwinner,function = "spi1"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x86>; | |
| phandle = <0x86>; | |
| }; | |
| spi2@0 { | |
| allwinner,pins = "PC20", "PC21", "PC22"; | |
| allwinner,function = "spi2"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x87>; | |
| phandle = <0x87>; | |
| }; | |
| spi2@1 { | |
| allwinner,pins = "PB15", "PB16", "PB17"; | |
| allwinner,function = "spi2"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x88>; | |
| phandle = <0x88>; | |
| }; | |
| spi2_cs0@0 { | |
| allwinner,pins = "PC19"; | |
| allwinner,function = "spi2"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x89>; | |
| phandle = <0x89>; | |
| }; | |
| spi2_cs0@1 { | |
| allwinner,pins = "PB14"; | |
| allwinner,function = "spi2"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x8a>; | |
| phandle = <0x8a>; | |
| }; | |
| uart0@0 { | |
| allwinner,pins = "PB22", "PB23"; | |
| allwinner,function = "uart0"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x40>; | |
| phandle = <0x40>; | |
| }; | |
| uart2@0 { | |
| allwinner,pins = "PI16", "PI17", "PI18", "PI19"; | |
| allwinner,function = "uart2"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x8b>; | |
| phandle = <0x8b>; | |
| }; | |
| uart3@0 { | |
| allwinner,pins = "PG6", "PG7", "PG8", "PG9"; | |
| allwinner,function = "uart3"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x8c>; | |
| phandle = <0x8c>; | |
| }; | |
| uart3@1 { | |
| allwinner,pins = "PH0", "PH1"; | |
| allwinner,function = "uart3"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x8d>; | |
| phandle = <0x8d>; | |
| }; | |
| uart4@0 { | |
| allwinner,pins = "PG10", "PG11"; | |
| allwinner,function = "uart4"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x8e>; | |
| phandle = <0x8e>; | |
| }; | |
| uart4@1 { | |
| allwinner,pins = "PH4", "PH5"; | |
| allwinner,function = "uart4"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x8f>; | |
| phandle = <0x8f>; | |
| }; | |
| uart5@0 { | |
| allwinner,pins = "PI10", "PI11"; | |
| allwinner,function = "uart5"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x90>; | |
| phandle = <0x90>; | |
| }; | |
| uart6@0 { | |
| allwinner,pins = "PI12", "PI13"; | |
| allwinner,function = "uart6"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x91>; | |
| phandle = <0x91>; | |
| }; | |
| uart7@0 { | |
| allwinner,pins = "PI20", "PI21"; | |
| allwinner,function = "uart7"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x92>; | |
| phandle = <0x92>; | |
| }; | |
| nand_base0@0 { | |
| allwinner,pins = "PC0", "PC1", "PC2", "PC5", "PC8", "PC9", "PC10", "PC11", "PC12", "PC13", "PC14", "PC15", "PC16"; | |
| allwinner,function = "nand0"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x93>; | |
| phandle = <0x93>; | |
| }; | |
| nand_cs@0 { | |
| allwinner,pins = "PC4"; | |
| allwinner,function = "nand0"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x94>; | |
| phandle = <0x94>; | |
| }; | |
| nand_cs@1 { | |
| allwinner,pins = "PC3"; | |
| allwinner,function = "nand0"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x95>; | |
| phandle = <0x95>; | |
| }; | |
| nand_cs@2 { | |
| allwinner,pins = "PC17"; | |
| allwinner,function = "nand0"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x96>; | |
| phandle = <0x96>; | |
| }; | |
| nand_cs@3 { | |
| allwinner,pins = "PC18"; | |
| allwinner,function = "nand0"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x97>; | |
| phandle = <0x97>; | |
| }; | |
| nand_rb@0 { | |
| allwinner,pins = "PC6"; | |
| allwinner,function = "nand0"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x98>; | |
| phandle = <0x98>; | |
| }; | |
| nand_rb@1 { | |
| allwinner,pins = "PC7"; | |
| allwinner,function = "nand0"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x99>; | |
| phandle = <0x99>; | |
| }; | |
| ahci_pwr_pin@0 { | |
| allwinner,pins = "PH2"; | |
| allwinner,function = "gpio_out"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x46>; | |
| phandle = <0x46>; | |
| }; | |
| usb0_vbus_pin@0 { | |
| allwinner,pins = "PB9"; | |
| allwinner,function = "gpio_out"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x47>; | |
| phandle = <0x47>; | |
| }; | |
| usb1_vbus_pin@0 { | |
| allwinner,pins = "PH6"; | |
| allwinner,function = "gpio_out"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x48>; | |
| phandle = <0x48>; | |
| }; | |
| usb2_vbus_pin@0 { | |
| allwinner,pins = "PH3"; | |
| allwinner,function = "gpio_out"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x49>; | |
| phandle = <0x49>; | |
| }; | |
| led_pins@0 { | |
| allwinner,pins = "PH15", "PH16"; | |
| allwinner,function = "gpio_out"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x4a>; | |
| phandle = <0x4a>; | |
| }; | |
| key_pins@0 { | |
| allwinner,pins = "PH17", "PH18", "PH19"; | |
| allwinner,function = "gpio_in"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x0>; | |
| linux,phandle = <0x4b>; | |
| phandle = <0x4b>; | |
| }; | |
| usb0_id_detect_pin@0 { | |
| allwinner,pins = "PH4"; | |
| allwinner,function = "gpio_in"; | |
| allwinner,drive = <0x0>; | |
| allwinner,pull = <0x1>; | |
| linux,phandle = <0x2f>; | |
| phandle = <0x2f>; | |
| }; | |
| }; | |
| timer@01c20c00 { | |
| compatible = "allwinner,sun4i-a10-timer"; | |
| reg = <0x1c20c00 0x90>; | |
| interrupts = <0x0 0x16 0x4 0x0 0x17 0x4 0x0 0x18 0x4 0x0 0x19 0x4 0x0 0x43 0x4 0x0 0x44 0x4>; | |
| clocks = <0xc>; | |
| }; | |
| watchdog@01c20c90 { | |
| compatible = "allwinner,sun4i-a10-wdt"; | |
| reg = <0x1c20c90 0x10>; | |
| linux,phandle = <0x9a>; | |
| phandle = <0x9a>; | |
| }; | |
| rtc@01c20d00 { | |
| compatible = "allwinner,sun7i-a20-rtc"; | |
| reg = <0x1c20d00 0x20>; | |
| interrupts = <0x0 0x18 0x4>; | |
| linux,phandle = <0x9b>; | |
| phandle = <0x9b>; | |
| }; | |
| pwm@01c20e00 { | |
| compatible = "allwinner,sun7i-a20-pwm"; | |
| reg = <0x1c20e00 0xc>; | |
| clocks = <0xc>; | |
| #pwm-cells = <0x3>; | |
| status = "disabled"; | |
| linux,phandle = <0x9c>; | |
| phandle = <0x9c>; | |
| }; | |
| spdif@01c21000 { | |
| #sound-dai-cells = <0x0>; | |
| compatible = "allwinner,sun4i-a10-spdif"; | |
| reg = <0x1c21000 0x400>; | |
| interrupts = <0x0 0xd 0x4>; | |
| clocks = <0x36 0x1 0x37>; | |
| clock-names = "apb", "spdif"; | |
| dmas = <0x20 0x0 0x2 0x20 0x0 0x2>; | |
| dma-names = "rx", "tx"; | |
| status = "disabled"; | |
| linux,phandle = <0x9d>; | |
| phandle = <0x9d>; | |
| }; | |
| can@01c2bc00 { | |
| compatible = "allwinner,sun4i-a10-can"; | |
| reg = <0x1c2bc00 0x400>; | |
| interrupts = <0x0 0x1a 0x4>; | |
| clocks = <0x38 0x4>; | |
| status = "disabled"; | |
| linux,phandle = <0x9e>; | |
| phandle = <0x9e>; | |
| }; | |
| ir@01c21800 { | |
| compatible = "allwinner,sun4i-a10-ir"; | |
| clocks = <0x36 0x6 0x39>; | |
| clock-names = "apb", "ir"; | |
| interrupts = <0x0 0x5 0x4>; | |
| reg = <0x1c21800 0x40>; | |
| status = "okay"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x3a>; | |
| linux,phandle = <0x9f>; | |
| phandle = <0x9f>; | |
| }; | |
| ir@01c21c00 { | |
| compatible = "allwinner,sun4i-a10-ir"; | |
| clocks = <0x36 0x7 0x3b>; | |
| clock-names = "apb", "ir"; | |
| interrupts = <0x0 0x6 0x4>; | |
| reg = <0x1c21c00 0x40>; | |
| status = "disabled"; | |
| linux,phandle = <0xa0>; | |
| phandle = <0xa0>; | |
| }; | |
| i2s@01c22000 { | |
| #sound-dai-cells = <0x0>; | |
| compatible = "allwinner,sun4i-a10-i2s"; | |
| reg = <0x1c22000 0x400>; | |
| interrupts = <0x0 0x57 0x4>; | |
| clocks = <0x36 0x4 0x3c>; | |
| clock-names = "apb", "mod"; | |
| dmas = <0x20 0x0 0x4 0x20 0x0 0x4>; | |
| dma-names = "rx", "tx"; | |
| status = "disabled"; | |
| linux,phandle = <0xa1>; | |
| phandle = <0xa1>; | |
| }; | |
| i2s@01c22400 { | |
| #sound-dai-cells = <0x0>; | |
| compatible = "allwinner,sun4i-a10-i2s"; | |
| reg = <0x1c22400 0x400>; | |
| interrupts = <0x0 0x10 0x4>; | |
| clocks = <0x36 0x3 0x3d>; | |
| clock-names = "apb", "mod"; | |
| dmas = <0x20 0x0 0x3 0x20 0x0 0x3>; | |
| dma-names = "rx", "tx"; | |
| status = "disabled"; | |
| linux,phandle = <0xa2>; | |
| phandle = <0xa2>; | |
| }; | |
| lradc@01c22800 { | |
| compatible = "allwinner,sun4i-a10-lradc-keys"; | |
| reg = <0x1c22800 0x100>; | |
| interrupts = <0x0 0x1f 0x4>; | |
| status = "disabled"; | |
| linux,phandle = <0xa3>; | |
| phandle = <0xa3>; | |
| }; | |
| codec@01c22c00 { | |
| #sound-dai-cells = <0x0>; | |
| compatible = "allwinner,sun7i-a20-codec"; | |
| reg = <0x1c22c00 0x40>; | |
| interrupts = <0x0 0x1e 0x4>; | |
| clocks = <0x36 0x0 0x3e>; | |
| clock-names = "apb", "codec"; | |
| dmas = <0x20 0x0 0x13 0x20 0x0 0x13>; | |
| dma-names = "rx", "tx"; | |
| status = "okay"; | |
| linux,phandle = <0xa4>; | |
| phandle = <0xa4>; | |
| }; | |
| eeprom@01c23800 { | |
| compatible = "allwinner,sun7i-a20-sid"; | |
| reg = <0x1c23800 0x200>; | |
| linux,phandle = <0xa5>; | |
| phandle = <0xa5>; | |
| }; | |
| i2s@01c24400 { | |
| #sound-dai-cells = <0x0>; | |
| compatible = "allwinner,sun4i-a10-i2s"; | |
| reg = <0x1c24400 0x400>; | |
| interrupts = <0x0 0x5a 0x4>; | |
| clocks = <0x36 0x8 0x3f>; | |
| clock-names = "apb", "mod"; | |
| dmas = <0x20 0x0 0x6 0x20 0x0 0x6>; | |
| dma-names = "rx", "tx"; | |
| status = "disabled"; | |
| linux,phandle = <0xa6>; | |
| phandle = <0xa6>; | |
| }; | |
| rtp@01c25000 { | |
| compatible = "allwinner,sun5i-a13-ts"; | |
| reg = <0x1c25000 0x100>; | |
| interrupts = <0x0 0x1d 0x4>; | |
| #thermal-sensor-cells = <0x0>; | |
| linux,phandle = <0x9>; | |
| phandle = <0x9>; | |
| }; | |
| serial@01c28000 { | |
| compatible = "snps,dw-apb-uart"; | |
| reg = <0x1c28000 0x400>; | |
| interrupts = <0x0 0x1 0x4>; | |
| reg-shift = <0x2>; | |
| reg-io-width = <0x4>; | |
| clocks = <0x38 0x10>; | |
| status = "okay"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x40>; | |
| linux,phandle = <0xa7>; | |
| phandle = <0xa7>; | |
| }; | |
| serial@01c28400 { | |
| compatible = "snps,dw-apb-uart"; | |
| reg = <0x1c28400 0x400>; | |
| interrupts = <0x0 0x2 0x4>; | |
| reg-shift = <0x2>; | |
| reg-io-width = <0x4>; | |
| clocks = <0x38 0x11>; | |
| status = "disabled"; | |
| linux,phandle = <0xa8>; | |
| phandle = <0xa8>; | |
| }; | |
| serial@01c28800 { | |
| compatible = "snps,dw-apb-uart"; | |
| reg = <0x1c28800 0x400>; | |
| interrupts = <0x0 0x3 0x4>; | |
| reg-shift = <0x2>; | |
| reg-io-width = <0x4>; | |
| clocks = <0x38 0x12>; | |
| status = "disabled"; | |
| linux,phandle = <0xa9>; | |
| phandle = <0xa9>; | |
| }; | |
| serial@01c28c00 { | |
| compatible = "snps,dw-apb-uart"; | |
| reg = <0x1c28c00 0x400>; | |
| interrupts = <0x0 0x4 0x4>; | |
| reg-shift = <0x2>; | |
| reg-io-width = <0x4>; | |
| clocks = <0x38 0x13>; | |
| status = "disabled"; | |
| linux,phandle = <0xaa>; | |
| phandle = <0xaa>; | |
| }; | |
| serial@01c29000 { | |
| compatible = "snps,dw-apb-uart"; | |
| reg = <0x1c29000 0x400>; | |
| interrupts = <0x0 0x11 0x4>; | |
| reg-shift = <0x2>; | |
| reg-io-width = <0x4>; | |
| clocks = <0x38 0x14>; | |
| status = "disabled"; | |
| linux,phandle = <0xab>; | |
| phandle = <0xab>; | |
| }; | |
| serial@01c29400 { | |
| compatible = "snps,dw-apb-uart"; | |
| reg = <0x1c29400 0x400>; | |
| interrupts = <0x0 0x12 0x4>; | |
| reg-shift = <0x2>; | |
| reg-io-width = <0x4>; | |
| clocks = <0x38 0x15>; | |
| status = "disabled"; | |
| linux,phandle = <0xac>; | |
| phandle = <0xac>; | |
| }; | |
| serial@01c29800 { | |
| compatible = "snps,dw-apb-uart"; | |
| reg = <0x1c29800 0x400>; | |
| interrupts = <0x0 0x13 0x4>; | |
| reg-shift = <0x2>; | |
| reg-io-width = <0x4>; | |
| clocks = <0x38 0x16>; | |
| status = "disabled"; | |
| linux,phandle = <0xad>; | |
| phandle = <0xad>; | |
| }; | |
| serial@01c29c00 { | |
| compatible = "snps,dw-apb-uart"; | |
| reg = <0x1c29c00 0x400>; | |
| interrupts = <0x0 0x14 0x4>; | |
| reg-shift = <0x2>; | |
| reg-io-width = <0x4>; | |
| clocks = <0x38 0x17>; | |
| status = "disabled"; | |
| linux,phandle = <0xae>; | |
| phandle = <0xae>; | |
| }; | |
| i2c@01c2ac00 { | |
| compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c"; | |
| reg = <0x1c2ac00 0x400>; | |
| interrupts = <0x0 0x7 0x4>; | |
| clocks = <0x38 0x0>; | |
| status = "okay"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x41>; | |
| linux,phandle = <0xaf>; | |
| phandle = <0xaf>; | |
| pmic@34 { | |
| reg = <0x34>; | |
| interrupt-parent = <0x42>; | |
| interrupts = <0x0 0x8>; | |
| compatible = "x-powers,axp209"; | |
| interrupt-controller; | |
| #interrupt-cells = <0x1>; | |
| linux,phandle = <0xb0>; | |
| phandle = <0xb0>; | |
| gpio { | |
| compatible = "x-powers,axp209-gpio"; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| linux,phandle = <0xb1>; | |
| phandle = <0xb1>; | |
| }; | |
| regulators { | |
| x-powers,dcdc-freq = <0x5dc>; | |
| dcdc2 { | |
| regulator-name = "vdd-cpu"; | |
| regulator-always-on; | |
| regulator-min-microvolt = <0xf4240>; | |
| regulator-max-microvolt = <0x155cc0>; | |
| linux,phandle = <0x8>; | |
| phandle = <0x8>; | |
| }; | |
| dcdc3 { | |
| regulator-name = "vdd-int-pll"; | |
| regulator-always-on; | |
| regulator-min-microvolt = <0xf4240>; | |
| regulator-max-microvolt = <0x155cc0>; | |
| linux,phandle = <0xb2>; | |
| phandle = <0xb2>; | |
| }; | |
| ldo1 { | |
| regulator-always-on; | |
| regulator-min-microvolt = <0x13d620>; | |
| regulator-max-microvolt = <0x13d620>; | |
| regulator-name = "vdd-rtc"; | |
| linux,phandle = <0xb3>; | |
| phandle = <0xb3>; | |
| }; | |
| ldo2 { | |
| regulator-name = "avcc"; | |
| regulator-always-on; | |
| regulator-min-microvolt = <0x2dc6c0>; | |
| regulator-max-microvolt = <0x2dc6c0>; | |
| linux,phandle = <0xb4>; | |
| phandle = <0xb4>; | |
| }; | |
| ldo3 { | |
| regulator-name = "ldo3"; | |
| linux,phandle = <0xb5>; | |
| phandle = <0xb5>; | |
| }; | |
| ldo4 { | |
| regulator-name = "ldo4"; | |
| linux,phandle = <0xb6>; | |
| phandle = <0xb6>; | |
| }; | |
| ldo5 { | |
| regulator-name = "ldo5"; | |
| status = "disabled"; | |
| linux,phandle = <0xb7>; | |
| phandle = <0xb7>; | |
| }; | |
| }; | |
| usb_power_supply { | |
| compatible = "x-powers,axp202-usb-power-supply"; | |
| status = "disabled"; | |
| linux,phandle = <0xb8>; | |
| phandle = <0xb8>; | |
| }; | |
| }; | |
| }; | |
| i2c@01c2b000 { | |
| compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c"; | |
| reg = <0x1c2b000 0x400>; | |
| interrupts = <0x0 0x8 0x4>; | |
| clocks = <0x38 0x1>; | |
| status = "disabled"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| linux,phandle = <0xb9>; | |
| phandle = <0xb9>; | |
| }; | |
| i2c@01c2b400 { | |
| compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c"; | |
| reg = <0x1c2b400 0x400>; | |
| interrupts = <0x0 0x9 0x4>; | |
| clocks = <0x38 0x2>; | |
| status = "disabled"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| linux,phandle = <0xba>; | |
| phandle = <0xba>; | |
| }; | |
| i2c@01c2b800 { | |
| compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c"; | |
| reg = <0x1c2b800 0x400>; | |
| interrupts = <0x0 0x58 0x4>; | |
| clocks = <0x38 0x3>; | |
| status = "disabled"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| linux,phandle = <0xbb>; | |
| phandle = <0xbb>; | |
| }; | |
| i2c@01c2c000 { | |
| compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c"; | |
| reg = <0x1c2c000 0x400>; | |
| interrupts = <0x0 0x59 0x4>; | |
| clocks = <0x38 0xf>; | |
| status = "disabled"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| linux,phandle = <0xbc>; | |
| phandle = <0xbc>; | |
| }; | |
| ethernet@01c50000 { | |
| compatible = "allwinner,sun7i-a20-gmac"; | |
| reg = <0x1c50000 0x10000>; | |
| interrupts = <0x0 0x55 0x4>; | |
| interrupt-names = "macirq"; | |
| clocks = <0x2 0x31 0x43>; | |
| clock-names = "stmmaceth", "allwinner_gmac_tx"; | |
| snps,pbl = <0x2>; | |
| snps,fixed-burst; | |
| snps,force_sf_dma_mode; | |
| status = "okay"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x44>; | |
| phy = <0x45>; | |
| phy-mode = "mii"; | |
| linux,phandle = <0xbd>; | |
| phandle = <0xbd>; | |
| ethernet-phy@1 { | |
| reg = <0x1>; | |
| linux,phandle = <0x45>; | |
| phandle = <0x45>; | |
| }; | |
| }; | |
| hstimer@01c60000 { | |
| compatible = "allwinner,sun7i-a20-hstimer"; | |
| reg = <0x1c60000 0x1000>; | |
| interrupts = <0x0 0x51 0x4 0x0 0x52 0x4 0x0 0x53 0x4 0x0 0x54 0x4>; | |
| clocks = <0x2 0x1c>; | |
| }; | |
| interrupt-controller@01c81000 { | |
| compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic"; | |
| reg = <0x1c81000 0x1000 0x1c82000 0x1000 0x1c84000 0x2000 0x1c86000 0x2000>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x3>; | |
| interrupts = <0x1 0x9 0xf04>; | |
| linux,phandle = <0x1>; | |
| phandle = <0x1>; | |
| }; | |
| ps2@01c2a000 { | |
| compatible = "allwinner,sun4i-a10-ps2"; | |
| reg = <0x1c2a000 0x400>; | |
| interrupts = <0x0 0x3e 0x4>; | |
| clocks = <0x38 0x6>; | |
| status = "disabled"; | |
| linux,phandle = <0xbe>; | |
| phandle = <0xbe>; | |
| }; | |
| ps2@01c2a400 { | |
| compatible = "allwinner,sun4i-a10-ps2"; | |
| reg = <0x1c2a400 0x400>; | |
| interrupts = <0x0 0x3f 0x4>; | |
| clocks = <0x38 0x7>; | |
| status = "disabled"; | |
| linux,phandle = <0xbf>; | |
| phandle = <0xbf>; | |
| }; | |
| }; | |
| ahci-5v { | |
| compatible = "regulator-fixed"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x46>; | |
| regulator-name = "ahci-5v"; | |
| regulator-min-microvolt = <0x4c4b40>; | |
| regulator-max-microvolt = <0x4c4b40>; | |
| regulator-boot-on; | |
| enable-active-high; | |
| gpio = <0x28 0x7 0x2 0x0>; | |
| status = "okay"; | |
| linux,phandle = <0x34>; | |
| phandle = <0x34>; | |
| }; | |
| usb0-vbus { | |
| compatible = "regulator-fixed"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x47>; | |
| regulator-name = "usb0-vbus"; | |
| regulator-min-microvolt = <0x4c4b40>; | |
| regulator-max-microvolt = <0x4c4b40>; | |
| enable-active-high; | |
| gpio = <0x28 0x1 0x9 0x0>; | |
| status = "disabled"; | |
| linux,phandle = <0xc0>; | |
| phandle = <0xc0>; | |
| }; | |
| usb1-vbus { | |
| compatible = "regulator-fixed"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x48>; | |
| regulator-name = "usb1-vbus"; | |
| regulator-min-microvolt = <0x4c4b40>; | |
| regulator-max-microvolt = <0x4c4b40>; | |
| regulator-boot-on; | |
| enable-active-high; | |
| gpio = <0x28 0x7 0x6 0x0>; | |
| status = "okay"; | |
| linux,phandle = <0x30>; | |
| phandle = <0x30>; | |
| }; | |
| usb2-vbus { | |
| compatible = "regulator-fixed"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x49>; | |
| regulator-name = "usb2-vbus"; | |
| regulator-min-microvolt = <0x4c4b40>; | |
| regulator-max-microvolt = <0x4c4b40>; | |
| regulator-boot-on; | |
| enable-active-high; | |
| gpio = <0x28 0x7 0x3 0x0>; | |
| status = "okay"; | |
| linux,phandle = <0x31>; | |
| phandle = <0x31>; | |
| }; | |
| vcc3v0 { | |
| compatible = "regulator-fixed"; | |
| regulator-name = "vcc3v0"; | |
| regulator-min-microvolt = <0x2dc6c0>; | |
| regulator-max-microvolt = <0x2dc6c0>; | |
| linux,phandle = <0xc1>; | |
| phandle = <0xc1>; | |
| }; | |
| vcc3v3 { | |
| compatible = "regulator-fixed"; | |
| regulator-name = "vcc3v3"; | |
| regulator-min-microvolt = <0x325aa0>; | |
| regulator-max-microvolt = <0x325aa0>; | |
| linux,phandle = <0x27>; | |
| phandle = <0x27>; | |
| }; | |
| vcc5v0 { | |
| compatible = "regulator-fixed"; | |
| regulator-name = "vcc5v0"; | |
| regulator-min-microvolt = <0x4c4b40>; | |
| regulator-max-microvolt = <0x4c4b40>; | |
| linux,phandle = <0xc2>; | |
| phandle = <0xc2>; | |
| }; | |
| leds { | |
| compatible = "gpio-leds"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x4a>; | |
| tx { | |
| label = "pcduino3:green:tx"; | |
| gpios = <0x28 0x7 0xf 0x1>; | |
| }; | |
| rx { | |
| label = "pcduino3:green:rx"; | |
| gpios = <0x28 0x7 0x10 0x1>; | |
| }; | |
| }; | |
| gpio_keys { | |
| compatible = "gpio-keys"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x4b>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| button@0 { | |
| label = "Key Back"; | |
| linux,code = <0x9e>; | |
| gpios = <0x28 0x7 0x11 0x1>; | |
| }; | |
| button@1 { | |
| label = "Key Home"; | |
| linux,code = <0x66>; | |
| gpios = <0x28 0x7 0x12 0x1>; | |
| }; | |
| button@2 { | |
| label = "Key Menu"; | |
| linux,code = <0x8b>; | |
| gpios = <0x28 0x7 0x13 0x1>; | |
| }; | |
| }; | |
| __symbols__ { | |
| cpu0 = "/cpus/cpu@0"; | |
| cpu_alert0 = "/thermal-zones/cpu_thermal/trips/cpu_alert0"; | |
| cpu_crit = "/thermal-zones/cpu_thermal/trips/cpu_crit"; | |
| osc24M = "/clocks/clk@01c20050"; | |
| osc3M = "/clocks/osc3M_clk"; | |
| osc32k = "/clocks/clk@0"; | |
| pll1 = "/clocks/clk@01c20000"; | |
| pll2 = "/clocks/clk@01c20008"; | |
| pll3 = "/clocks/clk@01c20010"; | |
| pll3x2 = "/clocks/pll3x2_clk"; | |
| pll4 = "/clocks/clk@01c20018"; | |
| pll5 = "/clocks/clk@01c20020"; | |
| pll6 = "/clocks/clk@01c20028"; | |
| pll7 = "/clocks/clk@01c20030"; | |
| pll7x2 = "/clocks/pll7x2_clk"; | |
| pll8 = "/clocks/clk@01c20040"; | |
| cpu = "/clocks/cpu@01c20054"; | |
| axi = "/clocks/axi@01c20054"; | |
| ahb = "/clocks/ahb@01c20054"; | |
| ahb_gates = "/clocks/clk@01c20060"; | |
| apb0 = "/clocks/apb0@01c20054"; | |
| apb0_gates = "/clocks/clk@01c20068"; | |
| apb1 = "/clocks/clk@01c20058"; | |
| apb1_gates = "/clocks/clk@01c2006c"; | |
| nand_clk = "/clocks/clk@01c20080"; | |
| ms_clk = "/clocks/clk@01c20084"; | |
| mmc0_clk = "/clocks/clk@01c20088"; | |
| mmc1_clk = "/clocks/clk@01c2008c"; | |
| mmc2_clk = "/clocks/clk@01c20090"; | |
| mmc3_clk = "/clocks/clk@01c20094"; | |
| ts_clk = "/clocks/clk@01c20098"; | |
| ss_clk = "/clocks/clk@01c2009c"; | |
| spi0_clk = "/clocks/clk@01c200a0"; | |
| spi1_clk = "/clocks/clk@01c200a4"; | |
| spi2_clk = "/clocks/clk@01c200a8"; | |
| pata_clk = "/clocks/clk@01c200ac"; | |
| ir0_clk = "/clocks/clk@01c200b0"; | |
| ir1_clk = "/clocks/clk@01c200b4"; | |
| i2s0_clk = "/clocks/clk@01c200b8"; | |
| ac97_clk = "/clocks/clk@01c200bc"; | |
| spdif_clk = "/clocks/clk@01c200c0"; | |
| keypad_clk = "/clocks/clk@01c200c4"; | |
| usb_clk = "/clocks/clk@01c200cc"; | |
| spi3_clk = "/clocks/clk@01c200d4"; | |
| i2s1_clk = "/clocks/clk@01c200d8"; | |
| i2s2_clk = "/clocks/clk@01c200dc"; | |
| dram_gates = "/clocks/clk@01c20100"; | |
| de_be0_clk = "/clocks/clk@01c20104"; | |
| de_be1_clk = "/clocks/clk@01c20108"; | |
| de_fe0_clk = "/clocks/clk@01c2010c"; | |
| de_fe1_clk = "/clocks/clk@01c20110"; | |
| tcon0_ch0_clk = "/clocks/clk@01c20118"; | |
| tcon1_ch0_clk = "/clocks/clk@01c2011c"; | |
| tcon0_ch1_clk = "/clocks/clk@01c2012c"; | |
| tcon1_ch1_clk = "/clocks/clk@01c20130"; | |
| ve_clk = "/clocks/clk@01c2013c"; | |
| codec_clk = "/clocks/clk@01c20140"; | |
| mbus_clk = "/clocks/clk@01c2015c"; | |
| mii_phy_tx_clk = "/clocks/clk@2"; | |
| gmac_int_tx_clk = "/clocks/clk@3"; | |
| gmac_tx_clk = "/clocks/clk@01c20164"; | |
| osc24M_32k = "/clocks/clk@1"; | |
| clk_out_a = "/clocks/clk@01c201f0"; | |
| clk_out_b = "/clocks/clk@01c201f4"; | |
| sram_a = "/soc@01c00000/sram-controller@01c00000/sram@00000000"; | |
| emac_sram = "/soc@01c00000/sram-controller@01c00000/sram@00000000/sram-section@8000"; | |
| sram_d = "/soc@01c00000/sram-controller@01c00000/sram@00010000"; | |
| otg_sram = "/soc@01c00000/sram-controller@01c00000/sram@00010000/sram-section@0000"; | |
| nmi_intc = "/soc@01c00000/interrupt-controller@01c00030"; | |
| dma = "/soc@01c00000/dma-controller@01c02000"; | |
| nfc = "/soc@01c00000/nand@01c03000"; | |
| spi0 = "/soc@01c00000/spi@01c05000"; | |
| spi1 = "/soc@01c00000/spi@01c06000"; | |
| emac = "/soc@01c00000/ethernet@01c0b000"; | |
| mdio = "/soc@01c00000/mdio@01c0b080"; | |
| mmc0 = "/soc@01c00000/mmc@01c0f000"; | |
| mmc1 = "/soc@01c00000/mmc@01c10000"; | |
| mmc2 = "/soc@01c00000/mmc@01c11000"; | |
| mmc3 = "/soc@01c00000/mmc@01c12000"; | |
| usb_otg = "/soc@01c00000/usb@01c13000"; | |
| usbphy = "/soc@01c00000/phy@01c13400"; | |
| ehci0 = "/soc@01c00000/usb@01c14000"; | |
| ohci0 = "/soc@01c00000/usb@01c14400"; | |
| crypto = "/soc@01c00000/crypto-engine@01c15000"; | |
| spi2 = "/soc@01c00000/spi@01c17000"; | |
| ahci = "/soc@01c00000/sata@01c18000"; | |
| ehci1 = "/soc@01c00000/usb@01c1c000"; | |
| ohci1 = "/soc@01c00000/usb@01c1c400"; | |
| spi3 = "/soc@01c00000/spi@01c1f000"; | |
| pio = "/soc@01c00000/pinctrl@01c20800"; | |
| clk_out_a_pins_a = "/soc@01c00000/pinctrl@01c20800/clk_out_a@0"; | |
| clk_out_b_pins_a = "/soc@01c00000/pinctrl@01c20800/clk_out_b@0"; | |
| emac_pins_a = "/soc@01c00000/pinctrl@01c20800/emac0@0"; | |
| gmac_pins_mii_a = "/soc@01c00000/pinctrl@01c20800/gmac_mii@0"; | |
| gmac_pins_rgmii_a = "/soc@01c00000/pinctrl@01c20800/gmac_rgmii@0"; | |
| i2c0_pins_a = "/soc@01c00000/pinctrl@01c20800/i2c0@0"; | |
| i2c1_pins_a = "/soc@01c00000/pinctrl@01c20800/i2c1@0"; | |
| i2c2_pins_a = "/soc@01c00000/pinctrl@01c20800/i2c2@0"; | |
| i2c3_pins_a = "/soc@01c00000/pinctrl@01c20800/i2c3@0"; | |
| ir0_rx_pins_a = "/soc@01c00000/pinctrl@01c20800/ir0@0"; | |
| ir0_tx_pins_a = "/soc@01c00000/pinctrl@01c20800/ir0@1"; | |
| ir1_rx_pins_a = "/soc@01c00000/pinctrl@01c20800/ir1@0"; | |
| ir1_tx_pins_a = "/soc@01c00000/pinctrl@01c20800/ir1@1"; | |
| mmc0_pins_a = "/soc@01c00000/pinctrl@01c20800/mmc0@0"; | |
| mmc0_cd_pin_reference_design = "/soc@01c00000/pinctrl@01c20800/mmc0_cd_pin@0"; | |
| mmc2_pins_a = "/soc@01c00000/pinctrl@01c20800/mmc2@0"; | |
| mmc3_pins_a = "/soc@01c00000/pinctrl@01c20800/mmc3@0"; | |
| can0_pins_a = "/soc@01c00000/pinctrl@01c20800/can0@0"; | |
| ps20_pins_a = "/soc@01c00000/pinctrl@01c20800/ps20@0"; | |
| ps21_pins_a = "/soc@01c00000/pinctrl@01c20800/ps21@0"; | |
| pwm0_pins_a = "/soc@01c00000/pinctrl@01c20800/pwm0@0"; | |
| pwm1_pins_a = "/soc@01c00000/pinctrl@01c20800/pwm1@0"; | |
| spdif_tx_pins_a = "/soc@01c00000/pinctrl@01c20800/spdif@0"; | |
| spi0_pins_a = "/soc@01c00000/pinctrl@01c20800/spi0@0"; | |
| spi0_cs0_pins_a = "/soc@01c00000/pinctrl@01c20800/spi0_cs0@0"; | |
| spi0_cs1_pins_a = "/soc@01c00000/pinctrl@01c20800/spi0_cs1@0"; | |
| spi1_pins_a = "/soc@01c00000/pinctrl@01c20800/spi1@0"; | |
| spi1_cs0_pins_a = "/soc@01c00000/pinctrl@01c20800/spi1_cs0@0"; | |
| spi2_pins_a = "/soc@01c00000/pinctrl@01c20800/spi2@0"; | |
| spi2_pins_b = "/soc@01c00000/pinctrl@01c20800/spi2@1"; | |
| spi2_cs0_pins_a = "/soc@01c00000/pinctrl@01c20800/spi2_cs0@0"; | |
| spi2_cs0_pins_b = "/soc@01c00000/pinctrl@01c20800/spi2_cs0@1"; | |
| uart0_pins_a = "/soc@01c00000/pinctrl@01c20800/uart0@0"; | |
| uart2_pins_a = "/soc@01c00000/pinctrl@01c20800/uart2@0"; | |
| uart3_pins_a = "/soc@01c00000/pinctrl@01c20800/uart3@0"; | |
| uart3_pins_b = "/soc@01c00000/pinctrl@01c20800/uart3@1"; | |
| uart4_pins_a = "/soc@01c00000/pinctrl@01c20800/uart4@0"; | |
| uart4_pins_b = "/soc@01c00000/pinctrl@01c20800/uart4@1"; | |
| uart5_pins_a = "/soc@01c00000/pinctrl@01c20800/uart5@0"; | |
| uart6_pins_a = "/soc@01c00000/pinctrl@01c20800/uart6@0"; | |
| uart7_pins_a = "/soc@01c00000/pinctrl@01c20800/uart7@0"; | |
| nand_pins_a = "/soc@01c00000/pinctrl@01c20800/nand_base0@0"; | |
| nand_cs0_pins_a = "/soc@01c00000/pinctrl@01c20800/nand_cs@0"; | |
| nand_cs1_pins_a = "/soc@01c00000/pinctrl@01c20800/nand_cs@1"; | |
| nand_cs2_pins_a = "/soc@01c00000/pinctrl@01c20800/nand_cs@2"; | |
| nand_cs3_pins_a = "/soc@01c00000/pinctrl@01c20800/nand_cs@3"; | |
| nand_rb0_pins_a = "/soc@01c00000/pinctrl@01c20800/nand_rb@0"; | |
| nand_rb1_pins_a = "/soc@01c00000/pinctrl@01c20800/nand_rb@1"; | |
| ahci_pwr_pin_a = "/soc@01c00000/pinctrl@01c20800/ahci_pwr_pin@0"; | |
| usb0_vbus_pin_a = "/soc@01c00000/pinctrl@01c20800/usb0_vbus_pin@0"; | |
| usb1_vbus_pin_a = "/soc@01c00000/pinctrl@01c20800/usb1_vbus_pin@0"; | |
| usb2_vbus_pin_a = "/soc@01c00000/pinctrl@01c20800/usb2_vbus_pin@0"; | |
| led_pins_pcduino3 = "/soc@01c00000/pinctrl@01c20800/led_pins@0"; | |
| key_pins_pcduino3 = "/soc@01c00000/pinctrl@01c20800/key_pins@0"; | |
| usb0_id_detect_pin = "/soc@01c00000/pinctrl@01c20800/usb0_id_detect_pin@0"; | |
| wdt = "/soc@01c00000/watchdog@01c20c90"; | |
| rtc = "/soc@01c00000/rtc@01c20d00"; | |
| pwm = "/soc@01c00000/pwm@01c20e00"; | |
| spdif = "/soc@01c00000/spdif@01c21000"; | |
| can0 = "/soc@01c00000/can@01c2bc00"; | |
| ir0 = "/soc@01c00000/ir@01c21800"; | |
| ir1 = "/soc@01c00000/ir@01c21c00"; | |
| i2s1 = "/soc@01c00000/i2s@01c22000"; | |
| i2s0 = "/soc@01c00000/i2s@01c22400"; | |
| lradc = "/soc@01c00000/lradc@01c22800"; | |
| codec = "/soc@01c00000/codec@01c22c00"; | |
| sid = "/soc@01c00000/eeprom@01c23800"; | |
| i2s2 = "/soc@01c00000/i2s@01c24400"; | |
| rtp = "/soc@01c00000/rtp@01c25000"; | |
| uart0 = "/soc@01c00000/serial@01c28000"; | |
| uart1 = "/soc@01c00000/serial@01c28400"; | |
| uart2 = "/soc@01c00000/serial@01c28800"; | |
| uart3 = "/soc@01c00000/serial@01c28c00"; | |
| uart4 = "/soc@01c00000/serial@01c29000"; | |
| uart5 = "/soc@01c00000/serial@01c29400"; | |
| uart6 = "/soc@01c00000/serial@01c29800"; | |
| uart7 = "/soc@01c00000/serial@01c29c00"; | |
| i2c0 = "/soc@01c00000/i2c@01c2ac00"; | |
| axp209 = "/soc@01c00000/i2c@01c2ac00/pmic@34"; | |
| axp_gpio = "/soc@01c00000/i2c@01c2ac00/pmic@34/gpio"; | |
| reg_dcdc2 = "/soc@01c00000/i2c@01c2ac00/pmic@34/regulators/dcdc2"; | |
| reg_dcdc3 = "/soc@01c00000/i2c@01c2ac00/pmic@34/regulators/dcdc3"; | |
| reg_ldo1 = "/soc@01c00000/i2c@01c2ac00/pmic@34/regulators/ldo1"; | |
| reg_ldo2 = "/soc@01c00000/i2c@01c2ac00/pmic@34/regulators/ldo2"; | |
| reg_ldo3 = "/soc@01c00000/i2c@01c2ac00/pmic@34/regulators/ldo3"; | |
| reg_ldo4 = "/soc@01c00000/i2c@01c2ac00/pmic@34/regulators/ldo4"; | |
| reg_ldo5 = "/soc@01c00000/i2c@01c2ac00/pmic@34/regulators/ldo5"; | |
| usb_power_supply = "/soc@01c00000/i2c@01c2ac00/pmic@34/usb_power_supply"; | |
| i2c1 = "/soc@01c00000/i2c@01c2b000"; | |
| i2c2 = "/soc@01c00000/i2c@01c2b400"; | |
| i2c3 = "/soc@01c00000/i2c@01c2b800"; | |
| i2c4 = "/soc@01c00000/i2c@01c2c000"; | |
| gmac = "/soc@01c00000/ethernet@01c50000"; | |
| phy1 = "/soc@01c00000/ethernet@01c50000/ethernet-phy@1"; | |
| gic = "/soc@01c00000/interrupt-controller@01c81000"; | |
| ps20 = "/soc@01c00000/ps2@01c2a000"; | |
| ps21 = "/soc@01c00000/ps2@01c2a400"; | |
| reg_ahci_5v = "/ahci-5v"; | |
| reg_usb0_vbus = "/usb0-vbus"; | |
| reg_usb1_vbus = "/usb1-vbus"; | |
| reg_usb2_vbus = "/usb2-vbus"; | |
| reg_vcc3v0 = "/vcc3v0"; | |
| reg_vcc3v3 = "/vcc3v3"; | |
| reg_vcc5v0 = "/vcc5v0"; | |
| }; | |
| __local_fixups__ { | |
| interrupt-parent = <0x0>; | |
| chosen { | |
| framebuffer@0 { | |
| clocks = <0x0 0x8 0x10 0x18 0x1c 0x20>; | |
| }; | |
| framebuffer@1 { | |
| clocks = <0x0 0x8 0x10 0x14 0x18>; | |
| }; | |
| framebuffer@2 { | |
| clocks = <0x0 0x8 0x10 0x18 0x1c 0x20 0x28>; | |
| }; | |
| }; | |
| cpus { | |
| cpu@0 { | |
| clocks = <0x0>; | |
| cpu-supply = <0x0>; | |
| }; | |
| }; | |
| thermal-zones { | |
| cpu_thermal { | |
| thermal-sensors = <0x0>; | |
| cooling-maps { | |
| map0 { | |
| trip = <0x0>; | |
| cooling-device = <0x0>; | |
| }; | |
| }; | |
| }; | |
| }; | |
| clocks { | |
| osc3M_clk { | |
| clocks = <0x0>; | |
| }; | |
| clk@01c20000 { | |
| clocks = <0x0>; | |
| }; | |
| clk@01c20008 { | |
| clocks = <0x0>; | |
| }; | |
| clk@01c20010 { | |
| clocks = <0x0>; | |
| }; | |
| pll3x2_clk { | |
| clocks = <0x0>; | |
| }; | |
| clk@01c20018 { | |
| clocks = <0x0>; | |
| }; | |
| clk@01c20020 { | |
| clocks = <0x0>; | |
| }; | |
| clk@01c20028 { | |
| clocks = <0x0>; | |
| }; | |
| clk@01c20030 { | |
| clocks = <0x0>; | |
| }; | |
| pll7x2_clk { | |
| clocks = <0x0>; | |
| }; | |
| clk@01c20040 { | |
| clocks = <0x0>; | |
| }; | |
| cpu@01c20054 { | |
| clocks = <0x0 0x4 0x8 0xc>; | |
| }; | |
| axi@01c20054 { | |
| clocks = <0x0>; | |
| }; | |
| ahb@01c20054 { | |
| clocks = <0x0 0x4 0xc>; | |
| assigned-clocks = <0x0>; | |
| assigned-clock-parents = <0x0>; | |
| }; | |
| clk@01c20060 { | |
| clocks = <0x0>; | |
| }; | |
| apb0@01c20054 { | |
| clocks = <0x0>; | |
| }; | |
| clk@01c20068 { | |
| clocks = <0x0>; | |
| }; | |
| clk@01c20058 { | |
| clocks = <0x0 0x4 0xc>; | |
| }; | |
| clk@01c2006c { | |
| clocks = <0x0>; | |
| }; | |
| clk@01c20080 { | |
| clocks = <0x0 0x4 0xc>; | |
| }; | |
| clk@01c20084 { | |
| clocks = <0x0 0x4 0xc>; | |
| }; | |
| clk@01c20088 { | |
| clocks = <0x0 0x4 0xc>; | |
| }; | |
| clk@01c2008c { | |
| clocks = <0x0 0x4 0xc>; | |
| }; | |
| clk@01c20090 { | |
| clocks = <0x0 0x4 0xc>; | |
| }; | |
| clk@01c20094 { | |
| clocks = <0x0 0x4 0xc>; | |
| }; | |
| clk@01c20098 { | |
| clocks = <0x0 0x4 0xc>; | |
| }; | |
| clk@01c2009c { | |
| clocks = <0x0 0x4 0xc>; | |
| }; | |
| clk@01c200a0 { | |
| clocks = <0x0 0x4 0xc>; | |
| }; | |
| clk@01c200a4 { | |
| clocks = <0x0 0x4 0xc>; | |
| }; | |
| clk@01c200a8 { | |
| clocks = <0x0 0x4 0xc>; | |
| }; | |
| clk@01c200ac { | |
| clocks = <0x0 0x4 0xc>; | |
| }; | |
| clk@01c200b0 { | |
| clocks = <0x0 0x4 0xc>; | |
| }; | |
| clk@01c200b4 { | |
| clocks = <0x0 0x4 0xc>; | |
| }; | |
| clk@01c200b8 { | |
| clocks = <0x0 0x8 0x10 0x18>; | |
| }; | |
| clk@01c200bc { | |
| clocks = <0x0 0x8 0x10 0x18>; | |
| }; | |
| clk@01c200c0 { | |
| clocks = <0x0 0x8 0x10 0x18>; | |
| }; | |
| clk@01c200c4 { | |
| clocks = <0x0>; | |
| }; | |
| clk@01c200cc { | |
| clocks = <0x0>; | |
| }; | |
| clk@01c200d4 { | |
| clocks = <0x0 0x4 0xc>; | |
| }; | |
| clk@01c200d8 { | |
| clocks = <0x0 0x8 0x10 0x18>; | |
| }; | |
| clk@01c200dc { | |
| clocks = <0x0 0x8 0x10 0x18>; | |
| }; | |
| clk@01c20100 { | |
| clocks = <0x0>; | |
| }; | |
| clk@01c20104 { | |
| clocks = <0x0 0x4 0x8>; | |
| }; | |
| clk@01c20108 { | |
| clocks = <0x0 0x4 0x8>; | |
| }; | |
| clk@01c2010c { | |
| clocks = <0x0 0x4 0x8>; | |
| }; | |
| clk@01c20110 { | |
| clocks = <0x0 0x4 0x8>; | |
| }; | |
| clk@01c20118 { | |
| clocks = <0x0 0x4 0x8 0xc>; | |
| }; | |
| clk@01c2011c { | |
| clocks = <0x0 0x4 0x8 0xc>; | |
| }; | |
| clk@01c2012c { | |
| clocks = <0x0 0x4 0x8 0xc>; | |
| }; | |
| clk@01c20130 { | |
| clocks = <0x0 0x4 0x8 0xc>; | |
| }; | |
| clk@01c2013c { | |
| clocks = <0x0>; | |
| }; | |
| clk@01c20140 { | |
| clocks = <0x0>; | |
| }; | |
| clk@01c2015c { | |
| clocks = <0x0 0x4 0xc>; | |
| }; | |
| clk@01c20164 { | |
| clocks = <0x0 0x4>; | |
| }; | |
| clk@1 { | |
| clocks = <0x0>; | |
| }; | |
| clk@01c201f0 { | |
| clocks = <0x0 0x4 0x8>; | |
| }; | |
| clk@01c201f4 { | |
| clocks = <0x0 0x4 0x8>; | |
| }; | |
| }; | |
| soc@01c00000 { | |
| dma-controller@01c02000 { | |
| clocks = <0x0>; | |
| }; | |
| nand@01c03000 { | |
| clocks = <0x0 0x8>; | |
| dmas = <0x0>; | |
| }; | |
| spi@01c05000 { | |
| clocks = <0x0 0x8>; | |
| dmas = <0x0 0xc>; | |
| }; | |
| spi@01c06000 { | |
| clocks = <0x0 0x8>; | |
| dmas = <0x0 0xc>; | |
| }; | |
| ethernet@01c0b000 { | |
| clocks = <0x0>; | |
| allwinner,sram = <0x0>; | |
| }; | |
| mmc@01c0f000 { | |
| clocks = <0x0 0x8 0x10 0x18>; | |
| pinctrl-0 = <0x0 0x4>; | |
| vmmc-supply = <0x0>; | |
| cd-gpios = <0x0>; | |
| }; | |
| mmc@01c10000 { | |
| clocks = <0x0 0x8 0x10 0x18>; | |
| }; | |
| mmc@01c11000 { | |
| clocks = <0x0 0x8 0x10 0x18>; | |
| }; | |
| mmc@01c12000 { | |
| clocks = <0x0 0x8 0x10 0x18>; | |
| }; | |
| usb@01c13000 { | |
| clocks = <0x0>; | |
| phys = <0x0>; | |
| extcon = <0x0>; | |
| allwinner,sram = <0x0>; | |
| }; | |
| phy@01c13400 { | |
| clocks = <0x0>; | |
| resets = <0x0 0x8 0x10>; | |
| pinctrl-0 = <0x0>; | |
| usb0_id_det-gpio = <0x0>; | |
| usb1_vbus-supply = <0x0>; | |
| usb2_vbus-supply = <0x0>; | |
| }; | |
| usb@01c14000 { | |
| clocks = <0x0>; | |
| phys = <0x0>; | |
| }; | |
| usb@01c14400 { | |
| clocks = <0x0 0x8>; | |
| phys = <0x0>; | |
| }; | |
| crypto-engine@01c15000 { | |
| clocks = <0x0 0x8>; | |
| }; | |
| spi@01c17000 { | |
| clocks = <0x0 0x8>; | |
| dmas = <0x0 0xc>; | |
| }; | |
| sata@01c18000 { | |
| clocks = <0x0 0x8>; | |
| target-supply = <0x0>; | |
| }; | |
| usb@01c1c000 { | |
| clocks = <0x0>; | |
| phys = <0x0>; | |
| }; | |
| usb@01c1c400 { | |
| clocks = <0x0 0x8>; | |
| phys = <0x0>; | |
| }; | |
| spi@01c1f000 { | |
| clocks = <0x0 0x8>; | |
| dmas = <0x0 0xc>; | |
| }; | |
| pinctrl@01c20800 { | |
| clocks = <0x0>; | |
| }; | |
| timer@01c20c00 { | |
| clocks = <0x0>; | |
| }; | |
| pwm@01c20e00 { | |
| clocks = <0x0>; | |
| }; | |
| spdif@01c21000 { | |
| clocks = <0x0 0x8>; | |
| dmas = <0x0 0xc>; | |
| }; | |
| can@01c2bc00 { | |
| clocks = <0x0>; | |
| }; | |
| ir@01c21800 { | |
| clocks = <0x0 0x8>; | |
| pinctrl-0 = <0x0>; | |
| }; | |
| ir@01c21c00 { | |
| clocks = <0x0 0x8>; | |
| }; | |
| i2s@01c22000 { | |
| clocks = <0x0 0x8>; | |
| dmas = <0x0 0xc>; | |
| }; | |
| i2s@01c22400 { | |
| clocks = <0x0 0x8>; | |
| dmas = <0x0 0xc>; | |
| }; | |
| codec@01c22c00 { | |
| clocks = <0x0 0x8>; | |
| dmas = <0x0 0xc>; | |
| }; | |
| i2s@01c24400 { | |
| clocks = <0x0 0x8>; | |
| dmas = <0x0 0xc>; | |
| }; | |
| serial@01c28000 { | |
| clocks = <0x0>; | |
| pinctrl-0 = <0x0>; | |
| }; | |
| serial@01c28400 { | |
| clocks = <0x0>; | |
| }; | |
| serial@01c28800 { | |
| clocks = <0x0>; | |
| }; | |
| serial@01c28c00 { | |
| clocks = <0x0>; | |
| }; | |
| serial@01c29000 { | |
| clocks = <0x0>; | |
| }; | |
| serial@01c29400 { | |
| clocks = <0x0>; | |
| }; | |
| serial@01c29800 { | |
| clocks = <0x0>; | |
| }; | |
| serial@01c29c00 { | |
| clocks = <0x0>; | |
| }; | |
| i2c@01c2ac00 { | |
| clocks = <0x0>; | |
| pinctrl-0 = <0x0>; | |
| pmic@34 { | |
| interrupt-parent = <0x0>; | |
| }; | |
| }; | |
| i2c@01c2b000 { | |
| clocks = <0x0>; | |
| }; | |
| i2c@01c2b400 { | |
| clocks = <0x0>; | |
| }; | |
| i2c@01c2b800 { | |
| clocks = <0x0>; | |
| }; | |
| i2c@01c2c000 { | |
| clocks = <0x0>; | |
| }; | |
| ethernet@01c50000 { | |
| clocks = <0x0 0x8>; | |
| pinctrl-0 = <0x0>; | |
| phy = <0x0>; | |
| }; | |
| hstimer@01c60000 { | |
| clocks = <0x0>; | |
| }; | |
| ps2@01c2a000 { | |
| clocks = <0x0>; | |
| }; | |
| ps2@01c2a400 { | |
| clocks = <0x0>; | |
| }; | |
| }; | |
| ahci-5v { | |
| pinctrl-0 = <0x0>; | |
| gpio = <0x0>; | |
| }; | |
| usb0-vbus { | |
| pinctrl-0 = <0x0>; | |
| gpio = <0x0>; | |
| }; | |
| usb1-vbus { | |
| pinctrl-0 = <0x0>; | |
| gpio = <0x0>; | |
| }; | |
| usb2-vbus { | |
| pinctrl-0 = <0x0>; | |
| gpio = <0x0>; | |
| }; | |
| leds { | |
| pinctrl-0 = <0x0>; | |
| tx { | |
| gpios = <0x0>; | |
| }; | |
| rx { | |
| gpios = <0x0>; | |
| }; | |
| }; | |
| gpio_keys { | |
| pinctrl-0 = <0x0>; | |
| button@0 { | |
| gpios = <0x0>; | |
| }; | |
| button@1 { | |
| gpios = <0x0>; | |
| }; | |
| button@2 { | |
| gpios = <0x0>; | |
| }; | |
| }; | |
| }; | |
| }; |
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