JTAG Notes

JTAG.md

Resources

JTAG explained

https://blog.senr.io/blog/jtag-explained

OpenOCD and JTAG

https://stackoverflow.com/questions/38033130/how-to-use-the-gdb-gnu-debugger-and-openocd-for-microcontroller-debugging-fr

JTAG

https://electronics.stackexchange.com/questions/224924/what-is-a-jtag/224929

http://www.nynaeve.net/?p=80

https://www.youtube.com/watch?v=TDfrsI8GxSk&index=1&list=PLr5TGNTDWrmZBdvQjPeRCB49rsxGYI7QN

https://stackoverflow.com/questions/37294090/how-are-breakpoints-working-on-an-embedded-device

http://www.keil.com/forum/16400/how-debugger-breakpoint-works/

https://www.beningo.com/embedded-basics-hard-and-soft-breakpoints/

http://esp-idf.readthedocs.io/en/latest/api-guides/jtag-debugging/tips-and-quirks.html

https://sourceware.org/gdb/wiki/Internals/Breakpoint%20Handling

http://processors.wiki.ti.com/index.php/How_Do_Breakpoints_Work

https://events.static.linuxfound.org/sites/events/files/slides/slides_16.pdf

Looks like hardware breakpoints are supported by the CPU. May have to refer to CPU manual to find breakpoint specifications. The SoC which includes the CPU may not discuss the on chip debugger

This talks about breakpoint registers (this is the CPU used by the ESP32 see page 19. There are 2 'break address' registers) https://0a.fi/wp-content/uploads/2015/04/xtensalx_overview_handbook.pdf

I saw ARM TRMs have debug sections whereas the ESP32 does not.