boot32.s

.code32

# Define the contnts of the Multiboot Header
.set MAGIC,		0xE85250D6
.set ARCH,		0
.set LENGTH,	(multiboot_header_end - multiboot_header)
.set CHECKSUM,	-(MAGIC + ARCH + LENGTH)

# Store the contents of the Multiboot header at the beginning of the file.
.section .multiboot
.align 8								# Align the section on the 4kb boundary.
multiboot_header:
.long MAGIC
.long ARCH
.long LENGTH
.long CHECKSUM
multiboot_header_end:


.section .text
.global _start
# The entry point of the kernel
_start:
	cli									# Clear the Interrupt Flag
	mov $stack_bottom, %esp				# Move the address of the stack into the ESP register
	push %eax							# Push EAX(the Multiboot MAGIC value) onto the stack.
	push %ebx							# Push EBX(the Multiboot info location) onto the stack.

# Clear Page Tables	
page_clr:
	mov %cr0, %eax						# Move the contents of Control Register 0 into the EAX register.
	and $0x7FFFFFFF, %eax				# Clear the Paging bit of the value from CR0
	mov %eax, %cr0						# Store the contents of EAX into Control Register 0
	mov $page_buffer, %edi				# Move the location of page_buffer to the Destination Indes(EDI)
	mov %edi, %cr3						# Store the contents of EDI(page_buffer location) in Control Register 3
	xor %eax, %eax						# Clear the contents of the EAX register
	mov $4096, %ecx						# Set the counter register(ECX) for 4096
	rep stosl							# Clear the memory pointed to by EDI(page_buffer)

.global page_set
# Map the first 2 MB of memory
page_map:
	push $page_buffer					# Push the location of page_buffer onto the stack
	call page_set						# Call page_set() with the address of page_buffer as an argument.
	mov %cr4, %eax						# Move the contents of Control Register 4 into EAX
	or 1<<5, %eax						# Set the PAE(Page Address Extensions) bit in EAX
	mov %eax, %cr4						# Store the contents of EAX in Control Register 4

# Load 32-bit compatability mode
compat32:
	mov $0xC0000080, %ecx				# Store the register value into the ecx Register
	rdmsr								# Read the contents of the Model Specific Register into EAX
	or 1<<8, %eax						# Set the Long Mode bit in EAX
	wrmsr								# Write the contents of EAX to the Model Specific Register.
	mov %cr0, %eax						# Move the contents of Control Register 0 into EAX
	or 1<<31, %eax						# Set the Paging bit in EAX
	mov %eax, %cr0						# Store the contents of EAX in Control Register 0

.global setGDT
.extern gp
# Load the 64-bit GDT and jump to Long Mode
gdt64:
	call setGDT							# Call setGDT() to fill the Global Descriptor Table
	lgdt (gp)							# Use gp to load the Global Descriptor Table
	mov $0x10, %ax						# Move the offset of the Data Segment into AX
	mov %ax, %ds						# Move the contents of AX into the Data Segment register.
	mov %ax, %es						# Move the contents of AX into the Extra Segment register.
	mov %ax, %fs						# Move the contents of AX into the Second Extra Segment register.
	mov %ax, %gs						# Move the contents of AX into the Third Extra Segment register.
	mov %ax, %ss						# Move the contents of AX into the Stack Segment register.
	jmp $0x08, $boot64					# Use the Code Segment offset to jump into 64-bit mode

	
.section .bss

# 16 Kilobyte stack
stack_top:
.skip 16384
stack_bottom:


.align 4096
# 8 Kilobyte buffer for temporary page tables.
page_buffer:
.skip 8192

link.ld

OUTPUT_FORMAT(elf64-x86-64)
ENTRY(_start)

KERNEL_VMA = 0x0;

SECTIONS
{
	. = 0x100000;

	.bootstrap BLOCK(4K) : ALIGN(4K)
	{
		*(.multiboot)
		boot/boot32.o(.text)
	}

	.text :
	{
		_code = .;
		*(EXCLUDE_FILE(*boot/boot32.o) .text)
		*(.rodata*)
		. = ALIGN(4K);
	}

	.data BLOCK(4K) : ALIGN(4K)
	{
		*(.data)
	}

	.bss BLOCK(4K) : ALIGN(4K)
	{
		*(.bss)
		*(COMMON)
	}
}