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@MihuBot
Created October 5, 2023 02:06
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JIT diffs CoreLib regressions for https://github.com/MihuBot/runtime-utils/issues/202

Top method regressions

8 (0.784% of base) - System.Globalization.CalendarData:FixDefaultShortDatePattern(System.Collections.Generic.List`1[System.String])
 ; Assembly listing for method System.Globalization.CalendarData:FixDefaultShortDatePattern(System.Collections.Generic.List`1[System.String]) (FullOpts)
 ; Emitting BLENDED_CODE for generic ARM64 - Unix
 ; FullOpts code
 ; optimized code
 ; fp based frame
 ; fully interruptible
 ; No PGO data
 ; 0 inlinees with PGO data; 7 single block inlinees; 8 inlinees without PGO data
 ; Final local variable assignments
 ;
-;  V00 arg0         [V00,T06] ( 23, 23.50)     ref  ->  x19         class-hnd single-def <System.Collections.Generic.List`1[System.String]>
+;  V00 arg0         [V00,T05] ( 23, 23.50)     ref  ->  x19         class-hnd single-def <System.Collections.Generic.List`1[System.String]>
 ;  V01 loc0         [V01,T19] (  7,  3.50)     ref  ->  x20         class-hnd exact single-def <System.String>
 ;  V02 loc1         [V02    ] ( 17, 53.50)  struct (16) [fp-0x28]  do-not-enreg[XS] must-init addr-exposed ld-addr-op <System.Span`1[ushort]>
 ;  V03 loc2         [V03,T00] ( 28,150.50)     int  ->   x1        
-;  V04 loc3         [V04,T22] (  4,  2   )     int  ->   x1        
+;  V04 loc3         [V04,T21] (  4,  2   )     int  ->   x1        
 ;* V05 loc4         [V05    ] (  0,  0   )  struct (16) zero-ref    <System.Span`1[ushort]>
-;  V06 loc5         [V06,T07] (  9, 25.50)     int  ->  x21        
+;  V06 loc5         [V06,T06] (  9, 25.50)     int  ->  x21        
 ;# V07 OutArgs      [V07    ] (  1,  1   )  struct ( 0) [sp+0x00]  do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
 ;* V08 tmp1         [V08    ] (  0,  0   )  struct (16) zero-ref    ld-addr-op "NewObj constructor temp" <System.Span`1[ushort]>
-;  V09 tmp2         [V09,T04] (  5, 28   )     ref  ->   x0         class-hnd exact "impAppendStmt" <System.String>
-;  V10 tmp3         [V10,T26] (  2,  2   )    long  ->   x2         "Inlining Arg"
-;  V11 tmp4         [V11,T25] (  2,  2   )     ref  ->   x2         class-hnd exact single-def "Inlining Arg" <System.String>
-;  V12 tmp5         [V12,T05] (  5, 28   )     ref  ->   x1         class-hnd "Inlining Arg" <System.__Canon>
-;  V13 tmp6         [V13,T15] (  2,  4   )   ubyte  ->   x0         "Inline return value spill temp"
-;  V14 tmp7         [V14,T16] (  2,  8   )   byref  ->   x0         "impAppendStmt"
-;  V15 tmp8         [V15,T27] (  3,  1.50)     ref  ->  x14         class-hnd single-def "Inline stloc first use temp" <System.String[]>
-;  V16 tmp9         [V16,T23] (  4,  2   )     int  ->  x15         "Inline stloc first use temp"
-;  V17 tmp10        [V17    ] (  9, 27   )   byref  ->  [fp-0x28]  do-not-enreg[X] addr-exposed "field V02._reference (fldOffset=0x0)" P-DEP
-;  V18 tmp11        [V18    ] (  9, 27   )     int  ->  [fp-0x20]  do-not-enreg[X] addr-exposed "field V02._length (fldOffset=0x8)" P-DEP
-;* V19 tmp12        [V19    ] (  0,  0   )   byref  ->  zero-ref    "field V05._reference (fldOffset=0x0)" P-INDEP
-;* V20 tmp13        [V20    ] (  0,  0   )     int  ->  zero-ref    "field V05._length (fldOffset=0x8)" P-INDEP
-;  V21 tmp14        [V21,T30] (  2,  1   )   byref  ->   x2         single-def "field V08._reference (fldOffset=0x0)" P-INDEP
-;  V22 tmp15        [V22,T31] (  2,  1   )     int  ->   x1         "field V08._length (fldOffset=0x8)" P-INDEP
-;  V23 tmp16        [V23,T21] (  3,  3   )     ref  ->   x0         single-def "arr expr"
-;  V24 tmp17        [V24,T08] (  3, 24   )     ref  ->   x0         "arr expr"
-;  V25 tmp18        [V25,T09] (  2, 16   )     ref  ->   x1         "arr expr"
-;  V26 GsCookie     [V26    ] (  1,  1   )    long  ->  [fp-0x30]  do-not-enreg[X] addr-exposed "GSSecurityCookie"
-;  V27 cse0         [V27,T14] (  3, 10   )     int  ->   x3         "CSE - aggressive"
-;  V28 cse1         [V28,T28] (  3,  1.50)    long  ->   x4         "CSE - moderate"
-;  V29 cse2         [V29,T32] (  2,  1   )     int  ->  x12         "CSE - moderate"
-;  V30 cse3         [V30,T01] (  3, 48   )    long  ->   x4         "CSE - aggressive"
-;  V31 cse4         [V31,T11] (  3, 12   )    long  ->   x4         "CSE - aggressive"
-;  V32 cse5         [V32,T12] (  3, 12   )     int  ->   x2         "CSE - aggressive"
-;  V33 cse6         [V33,T10] (  3, 12   )     ref  ->   x1         "CSE - aggressive"
-;  V34 cse7         [V34,T03] ( 14, 34.50)     int  ->   x0         "CSE - aggressive"
-;  V35 cse8         [V35,T02] (  9, 46   )   byref  ->  registers   "CSE - aggressive"
-;  V36 cse9         [V36,T13] (  3, 12   )     int  ->   x2         "CSE - aggressive"
-;  V37 cse10        [V37,T17] (  2,  8   )     int  ->   x3         "CSE - aggressive"
-;  V38 cse11        [V38,T20] (  7,  3.50)     int  ->   x5         "CSE - aggressive"
-;  V39 cse12        [V39,T18] (  3,  6   )     int  ->   x2         "CSE - aggressive"
-;  V40 cse13        [V40,T24] (  4,  2   )     int  ->   x2         "CSE - moderate"
-;  V41 cse14        [V41,T29] (  3,  1.50)     int  ->   x1         "CSE - moderate"
+;  V09 tmp2         [V09,T04] (  5, 28   )     ref  ->   x1         class-hnd exact "impAppendStmt" <System.String>
+;* V10 tmp3         [V10    ] (  0,  0   )     ref  ->  zero-ref    class-hnd exact "Inline return value spill temp" <System.String>
+;  V11 tmp4         [V11,T26] (  3,  1.50)     ref  ->   x0         class-hnd single-def "Inline stloc first use temp" <System.String[]>
+;  V12 tmp5         [V12,T25] (  2,  2   )    long  ->   x2         "Inlining Arg"
+;  V13 tmp6         [V13,T24] (  2,  2   )     ref  ->   x2         class-hnd exact single-def "Inlining Arg" <System.String>
+;  V14 tmp7         [V14,T08] (  3, 12   )     ref  ->   x1         class-hnd "Inline stloc first use temp" <System.String[]>
+;  V15 tmp8         [V15,T07] (  5, 14   )     ref  ->   x0         class-hnd exact "Inline return value spill temp" <System.String>
+;  V16 tmp9         [V16,T16] (  2,  8   )     ref  ->   x2         class-hnd "Inline stloc first use temp" <System.String[]>
+;  V17 tmp10        [V17,T15] (  2,  4   )   ubyte  ->   x0         "Inline return value spill temp"
+;  V18 tmp11        [V18,T17] (  2,  8   )   byref  ->   x3         "impAppendStmt"
+;  V19 tmp12        [V19,T27] (  3,  1.50)     ref  ->  x14         class-hnd single-def "Inline stloc first use temp" <System.String[]>
+;  V20 tmp13        [V20,T22] (  4,  2   )     int  ->  x15         "Inline stloc first use temp"
+;  V21 tmp14        [V21    ] (  9, 27   )   byref  ->  [fp-0x28]  do-not-enreg[X] addr-exposed "field V02._reference (fldOffset=0x0)" P-DEP
+;  V22 tmp15        [V22    ] (  9, 27   )     int  ->  [fp-0x20]  do-not-enreg[X] addr-exposed "field V02._length (fldOffset=0x8)" P-DEP
+;* V23 tmp16        [V23    ] (  0,  0   )   byref  ->  zero-ref    "field V05._reference (fldOffset=0x0)" P-INDEP
+;* V24 tmp17        [V24    ] (  0,  0   )     int  ->  zero-ref    "field V05._length (fldOffset=0x8)" P-INDEP
+;  V25 tmp18        [V25,T30] (  2,  1   )   byref  ->   x2         single-def "field V08._reference (fldOffset=0x0)" P-INDEP
+;  V26 tmp19        [V26,T31] (  2,  1   )     int  ->   x1         "field V08._length (fldOffset=0x8)" P-INDEP
+;  V27 GsCookie     [V27    ] (  1,  1   )    long  ->  [fp-0x30]  do-not-enreg[X] addr-exposed "GSSecurityCookie"
+;  V28 cse0         [V28,T14] (  3, 10   )     int  ->   x3         "CSE - aggressive"
+;  V29 cse1         [V29,T28] (  3,  1.50)    long  ->   x4         "CSE - moderate"
+;  V30 cse2         [V30,T32] (  2,  1   )     int  ->   x1         "CSE - moderate"
+;  V31 cse3         [V31,T33] (  2,  1   )     int  ->  x12         "CSE - moderate"
+;  V32 cse4         [V32,T01] (  3, 48   )    long  ->   x4         "CSE - aggressive"
+;  V33 cse5         [V33,T10] (  3, 12   )    long  ->   x4         "CSE - aggressive"
+;  V34 cse6         [V34,T09] (  3, 12   )     ref  ->   x2         "CSE - aggressive"
+;  V35 cse7         [V35,T11] (  3, 12   )     int  ->   x0         "CSE - aggressive"
+;  V36 cse8         [V36,T03] ( 14, 34.50)     int  ->   x0         "CSE - aggressive"
+;  V37 cse9         [V37,T02] (  9, 46   )   byref  ->  registers   "CSE - aggressive"
+;  V38 cse10        [V38,T12] (  3, 12   )     int  ->   x3         "CSE - aggressive"
+;  V39 cse11        [V39,T13] (  3, 12   )     int  ->   x2         "CSE - aggressive"
+;  V40 cse12        [V40,T20] (  7,  3.50)     int  ->   x5         "CSE - aggressive"
+;  V41 cse13        [V41,T18] (  3,  6   )     int  ->   x2         "CSE - aggressive"
+;  V42 cse14        [V42,T23] (  4,  2   )     int  ->   x2         "CSE - moderate"
+;  V43 cse15        [V43,T29] (  3,  1.50)     int  ->   x1         "CSE - moderate"
 ;
 ; Lcl frame size = 24
 
 G_M28069_IG01:
             sub     sp, sp, #64
             stp     x19, x20, [sp, #0x18]
             str     x21, [sp, #0x28]
             stp     fp, lr, [sp, #0x30]
             add     fp, sp, #48
             str     xzr, [fp, #-0x28]	// [V02 loc1]
             movz    x1, #0xD1FFAB1E
-            movk    x1, #24 LSL #16
-            str     x1, [fp, #-0x30]	// [V26 GsCookie]
+            movk    x1, #25 LSL #16
+            str     x1, [fp, #-0x30]	// [V27 GsCookie]
             mov     x19, x0
 						;; size=40 bbWeight=1 PerfScore 7.50
 G_M28069_IG02:
             ldr     w0, [x19, #0x10]
             cbz     w0, G_M28069_IG25
 						;; size=8 bbWeight=1 PerfScore 4.00
 G_M28069_IG03:
-            ldr     w0, [x19, #0x10]
-            cbz     w0, G_M28069_IG29
             ldr     x0, [x19, #0x08]
+            ldr     w1, [x19, #0x10]
+            cbz     w1, G_M28069_IG29
             ldr     w1, [x0, #0x08]
-            cmp     w1, #0
-            bls     G_M28069_IG30
+            cbz     w1, G_M28069_IG29
             ldr     x20, [x0, #0x10]
             ldr     w0, [x20, #0x08]
             cmp     w0, #100
             bgt     G_M28069_IG25
             add     w1, w0, #2
             mov     w2, #2
             umull   x2, w1, w2
             tst     x2, x2
             beq     G_M28069_IG06
             mov     x3, x2
             add     x3, x3, #15
             and     x3, x3, #-16
             subs    x3, sp, x3
             bvc     G_M28069_IG04
             mov     x3, xzr
-						;; size=84 bbWeight=0.50 PerfScore 13.75
+						;; size=80 bbWeight=0.50 PerfScore 13.50
 G_M28069_IG04:
             ldr     wzr, [sp]
             sub     x4, sp, #1, LSL #12
             cmp     x4, x3
             blo     G_M28069_IG05
             mov     sp, x4
             b       G_M28069_IG04
 						;; size=24 bbWeight=0.50 PerfScore 2.75
 G_M28069_IG05:
             mov     sp, x3
             mov     x2, sp
 						;; size=8 bbWeight=0.50 PerfScore 0.50
 G_M28069_IG06:
             tbnz    w1, #31, G_M28069_IG28
-            str     x2, [fp, #-0x28]	// [V17 tmp10]
-            str     w1, [fp, #-0x20]	// [V18 tmp11]
+            str     x2, [fp, #-0x28]	// [V21 tmp14]
+            str     w1, [fp, #-0x20]	// [V22 tmp15]
             mov     w1, wzr
             cmp     w0, #0
             ble     G_M28069_IG15
             add     x2, x20, #12
 						;; size=28 bbWeight=0.50 PerfScore 2.75
 G_M28069_IG07:
             ldrh    w3, [x2, w1, UXTW #2]
             cmp     w3, #39
             bne     G_M28069_IG11
             align   [0 bytes for IG08]
             align   [0 bytes]
             align   [0 bytes]
             align   [0 bytes]
 						;; size=12 bbWeight=4 PerfScore 18.00
 G_M28069_IG08:
-            ldr     w3, [fp, #-0x20]	// [V18 tmp11]
+            ldr     w3, [fp, #-0x20]	// [V22 tmp15]
             cmp     w1, w3
             bhs     G_M28069_IG30
-            ldr     x3, [fp, #-0x28]	// [V17 tmp10]
+            ldr     x3, [fp, #-0x28]	// [V21 tmp14]
             ubfiz   x4, x1, #1, #32
             add     x3, x3, x4
             ldrh    w4, [x2, x4]
             strh    w4, [x3]
             add     w1, w1, #1
             cmp     w0, w1
             ble     G_M28069_IG09
             ldrh    w3, [x2, w1, UXTW #2]
             cmp     w3, #39
             bne     G_M28069_IG08
 						;; size=56 bbWeight=16 PerfScore 280.00
 G_M28069_IG09:
             cmp     w0, w1
             bgt     G_M28069_IG12
 						;; size=8 bbWeight=2 PerfScore 3.00
 G_M28069_IG10:
             b       G_M28069_IG25
             align   [4 bytes for IG17]
+            align   [4 bytes]
             align   [0 bytes]
             align   [0 bytes]
-            align   [0 bytes]
-						;; size=8 bbWeight=0.50 PerfScore 0.50
+						;; size=12 bbWeight=0.50 PerfScore 0.50
 G_M28069_IG11:
             cmp     w3, #121
             beq     G_M28069_IG14
 						;; size=8 bbWeight=2 PerfScore 3.00
 G_M28069_IG12:
-            ldr     w3, [fp, #-0x20]	// [V18 tmp11]
+            ldr     w3, [fp, #-0x20]	// [V22 tmp15]
             cmp     w1, w3
             bhs     G_M28069_IG30
-            ldr     x3, [fp, #-0x28]	// [V17 tmp10]
+            ldr     x3, [fp, #-0x28]	// [V21 tmp14]
             ubfiz   x4, x1, #1, #32
             add     x3, x3, x4
             ldrh    w4, [x2, x4]
             strh    w4, [x3]
             add     w1, w1, #1
             cmp     w0, w1
             bgt     G_M28069_IG07
 						;; size=44 bbWeight=4 PerfScore 52.00
 G_M28069_IG13:
             b       G_M28069_IG15
 						;; size=4 bbWeight=0.50 PerfScore 0.50
 G_M28069_IG14:
-            ldr     w2, [fp, #-0x20]	// [V18 tmp11]
+            ldr     w2, [fp, #-0x20]	// [V22 tmp15]
             cmp     w1, w2
             bhs     G_M28069_IG30
-            ldr     x2, [fp, #-0x28]	// [V17 tmp10]
+            ldr     x2, [fp, #-0x28]	// [V21 tmp14]
             mov     w3, #121
             strh    w3, [x2, w1, UXTW #2]
 						;; size=24 bbWeight=0.50 PerfScore 3.50
 G_M28069_IG15:
             sub     w2, w0, #1
             cmp     w2, w1
             ble     G_M28069_IG25
             add     w2, w1, #1
             cmp     w2, w0
             bhs     G_M28069_IG30
             add     x3, x20, #12
             ubfiz   x4, x2, #1, #32
             ldrh    w5, [x3, x4]
             cmp     w5, #121
             bne     G_M28069_IG25
             add     w5, w1, #2
             cmp     w0, w5
             ble     G_M28069_IG16
             cmp     w5, w0
             bhs     G_M28069_IG30
             ldrh    w6, [x3, w5, UXTW #2]
             cmp     w6, #121
             beq     G_M28069_IG25
 						;; size=76 bbWeight=0.50 PerfScore 9.00
 G_M28069_IG16:
-            ldr     w6, [fp, #-0x20]	// [V18 tmp11]
+            ldr     w6, [fp, #-0x20]	// [V22 tmp15]
             cmp     w2, w6
             bhs     G_M28069_IG30
-            ldr     x2, [fp, #-0x28]	// [V17 tmp10]
+            ldr     x2, [fp, #-0x28]	// [V21 tmp14]
             mov     w6, #121
             strh    w6, [x2, x4]
-            ldr     w2, [fp, #-0x20]	// [V18 tmp11]
+            ldr     w2, [fp, #-0x20]	// [V22 tmp15]
             cmp     w5, w2
             bhs     G_M28069_IG30
-            ldr     x2, [fp, #-0x28]	// [V17 tmp10]
+            ldr     x2, [fp, #-0x28]	// [V21 tmp14]
             strh    w6, [x2, w5, UXTW #2]
             add     w1, w1, #3
-            ldr     w2, [fp, #-0x20]	// [V18 tmp11]
+            ldr     w2, [fp, #-0x20]	// [V22 tmp15]
             cmp     w1, w2
             bhs     G_M28069_IG30
-            ldr     x2, [fp, #-0x28]	// [V17 tmp10]
+            ldr     x2, [fp, #-0x28]	// [V21 tmp14]
             strh    w6, [x2, w1, UXTW #2]
             sxtw    w1, w5
             cmp     w0, w1
             ble     G_M28069_IG18
 						;; size=80 bbWeight=0.50 PerfScore 11.25
 G_M28069_IG17:
             add     w2, w1, #2
-            ldr     w4, [fp, #-0x20]	// [V18 tmp11]
+            ldr     w4, [fp, #-0x20]	// [V22 tmp15]
             cmp     w2, w4
             bhs     G_M28069_IG30
-            ldr     x4, [fp, #-0x28]	// [V17 tmp10]
+            ldr     x4, [fp, #-0x28]	// [V21 tmp14]
             ubfiz   x2, x2, #1, #32
             add     x2, x4, x2
             cmp     w1, w0
             bhs     G_M28069_IG30
             ldrh    w4, [x3, w1, UXTW #2]
             strh    w4, [x2]
             add     w1, w1, #1
             cmp     w0, w1
             bgt     G_M28069_IG17
 						;; size=56 bbWeight=4 PerfScore 60.00
 G_M28069_IG18:
             sub     x0, fp, #40	// [V02 loc1]
             movz    x1, #0xD1FFAB1E      // code for System.Span`1[ushort]:ToString():System.String:this
             movk    x1, #0xD1FFAB1E LSL #16
             movk    x1, #0xD1FFAB1E LSL #32
             ldr     x1, [x1]
             blr     x1
             mov     x2, x0
             ldr     w0, [x19, #0x10]
             cbz     w0, G_M28069_IG29
             ldr     x0, [x19, #0x08]
             mov     x1, xzr
             bl      CORINFO_HELP_ARRADDR_ST
             ldr     w2, [x19, #0x14]
             add     w2, w2, #1
             str     w2, [x19, #0x14]
             mov     w21, #1
             ldr     w2, [x19, #0x10]
             cmp     w2, #1
             ble     G_M28069_IG22
 						;; size=76 bbWeight=0.50 PerfScore 12.25
 G_M28069_IG19:
-            ldr     w2, [x19, #0x10]
-            cmp     w21, w2
+            ldr     x2, [x19, #0x08]
+            mov     x1, x2
+            ldr     w0, [x19, #0x10]
+            cmp     w21, w0
             bhs     G_M28069_IG29
-            ldr     x1, [x19, #0x08]
-            mov     x0, x1
-            ldr     w3, [x0, #0x08]
-            cmp     w21, w3
-            bhs     G_M28069_IG30
-            add     x0, x0, #16
-            ldr     x0, [x0, w21, UXTW #3]
-            cbz     w2, G_M28069_IG29
-            ldr     x1, [x1, #0x10]
-            cmp     x0, x1
+            ldr     w3, [x1, #0x08]
+            cmp     w3, w21
+            bls     G_M28069_IG29
+            add     x1, x1, #16
+            ldr     x1, [x1, w21, UXTW #3]
+            cbz     w0, G_M28069_IG29
+            cbz     w3, G_M28069_IG29
+            ldr     x0, [x2, #0x10]
+            cmp     x1, x0
             beq     G_M28069_IG23
-						;; size=56 bbWeight=4 PerfScore 86.00
+						;; size=60 bbWeight=4 PerfScore 90.00
 G_M28069_IG20:
-            cbz     x0, G_M28069_IG21
             cbz     x1, G_M28069_IG21
-            ldr     w2, [x0, #0x08]
-            ldr     w3, [x1, #0x08]
+            cbz     x0, G_M28069_IG21
+            ldr     w2, [x1, #0x08]
+            ldr     w3, [x0, #0x08]
             cmp     w2, w3
             bne     G_M28069_IG21
-            add     x0, x0, #12
+            add     x3, x1, #12
             lsl     w2, w2, #1
             mov     w2, w2
-            add     x1, x1, #12
+            add     x1, x0, #12
+            mov     x0, x3
             movz    x3, #0xD1FFAB1E      // code for System.SpanHelpers:SequenceEqual(byref,byref,ulong):ubyte
             movk    x3, #0xD1FFAB1E LSL #16
             movk    x3, #0xD1FFAB1E LSL #32
             ldr     x3, [x3]
             blr     x3
             cbnz    w0, G_M28069_IG23
-						;; size=64 bbWeight=2 PerfScore 37.00
+						;; size=68 bbWeight=2 PerfScore 38.00
 G_M28069_IG21:
             add     w21, w21, #1
             ldr     w14, [x19, #0x10]
             cmp     w21, w14
             blt     G_M28069_IG19
 						;; size=16 bbWeight=4 PerfScore 20.00
 G_M28069_IG22:
             ldr     w14, [x19, #0x14]
             add     w14, w14, #1
             str     w14, [x19, #0x14]
             ldr     x14, [x19, #0x08]
             ldr     w15, [x19, #0x10]
             ldr     w12, [x14, #0x08]
             cmp     w12, w15
             bls     G_M28069_IG24
             add     w12, w15, #1
             str     w12, [x19, #0x10]
             add     x14, x14, #16
             add     x14, x14, x15,  LSL #3
             mov     x15, x20
             bl      CORINFO_HELP_ASSIGN_REF
             b       G_M28069_IG25
 						;; size=60 bbWeight=0.50 PerfScore 10.25
 G_M28069_IG23:
             ldr     w0, [x19, #0x10]
             cmp     w21, w0
             bhs     G_M28069_IG29
             ldr     x0, [x19, #0x08]
             sxtw    x1, w21
             mov     x2, x20
             bl      CORINFO_HELP_ARRADDR_ST
             ldr     w0, [x19, #0x14]
             add     w0, w0, #1
             str     w0, [x19, #0x14]
             b       G_M28069_IG25
 						;; size=44 bbWeight=0.50 PerfScore 7.50
 G_M28069_IG24:
             mov     x0, x19
             mov     x1, x20
             movz    x2, #0xD1FFAB1E      // code for System.Collections.Generic.List`1[System.__Canon]:AddWithResize(System.__Canon):this
             movk    x2, #0xD1FFAB1E LSL #16
             movk    x2, #0xD1FFAB1E LSL #32
             ldr     x2, [x2]
             blr     x2
 						;; size=28 bbWeight=0.50 PerfScore 3.25
 G_M28069_IG25:
             movz    xip0, #0xD1FFAB1E
-            movk    xip0, #24 LSL #16
-            ldr     xip1, [fp, #-0x30]	// [V26 GsCookie]
+            movk    xip0, #25 LSL #16
+            ldr     xip1, [fp, #-0x30]	// [V27 GsCookie]
             cmp     xip0, xip1
             beq     G_M28069_IG26
             bl      CORINFO_HELP_FAIL_FAST
 						;; size=24 bbWeight=1 PerfScore 5.50
 G_M28069_IG26:
             sub     sp, fp, #48
             ldp     fp, lr, [sp, #0x30]
             ldr     x21, [sp, #0x28]
             ldp     x19, x20, [sp, #0x18]
             add     sp, sp, #64
             ret     lr
 						;; size=24 bbWeight=1 PerfScore 6.00
 G_M28069_IG27:
             bl      CORINFO_HELP_OVERFLOW
 						;; size=4 bbWeight=0 PerfScore 0.00
 G_M28069_IG28:
             movz    x0, #0xD1FFAB1E      // code for System.ThrowHelper:ThrowArgumentOutOfRangeException()
             movk    x0, #0xD1FFAB1E LSL #16
             movk    x0, #0xD1FFAB1E LSL #32
             ldr     x0, [x0]
             blr     x0
             brk_unix #0
 						;; size=24 bbWeight=0 PerfScore 0.00
 G_M28069_IG29:
             movz    x0, #0xD1FFAB1E      // code for System.ThrowHelper:ThrowArgumentOutOfRange_IndexMustBeLessException()
             movk    x0, #0xD1FFAB1E LSL #16
             movk    x0, #0xD1FFAB1E LSL #32
             ldr     x0, [x0]
             blr     x0
             brk_unix #0
 						;; size=24 bbWeight=0 PerfScore 0.00
 G_M28069_IG30:
             bl      CORINFO_HELP_RNGCHKFAIL
             brk_unix #0
 						;; size=8 bbWeight=0 PerfScore 0.00
 
-; Total bytes of code 1020, prolog size 40, PerfScore 761.75, instruction count 262, allocated bytes for code 1020 (MethodHash=bd52925a) for method System.Globalization.CalendarData:FixDefaultShortDatePattern(System.Collections.Generic.List`1[System.String]) (FullOpts)
+; Total bytes of code 1028, prolog size 40, PerfScore 767.30, instruction count 263, allocated bytes for code 1028 (MethodHash=bd52925a) for method System.Globalization.CalendarData:FixDefaultShortDatePattern(System.Collections.Generic.List`1[System.String]) (FullOpts)
8 (0.508% of base) - System.Globalization.JapaneseCalendar:IcuGetJapaneseEras():System.Globalization.EraInfo[]
 ; Assembly listing for method System.Globalization.JapaneseCalendar:IcuGetJapaneseEras():System.Globalization.EraInfo[] (FullOpts)
 ; Emitting BLENDED_CODE for generic ARM64 - Unix
 ; FullOpts code
 ; optimized code
 ; fp based frame
 ; fully interruptible
 ; No PGO data
 ; 0 inlinees with PGO data; 20 single block inlinees; 8 inlinees without PGO data
 ; Final local variable assignments
 ;
 ;  V00 loc0         [V00    ] (  4, 13   )     ref  ->  [fp+0x78]  do-not-enreg[X] must-init addr-exposed ld-addr-op class-hnd <System.String[]>
-;  V01 loc1         [V01,T06] ( 11, 26   )     ref  ->  [fp+0x60]  class-hnd exact single-def <System.Collections.Generic.List`1[System.Globalization.EraInfo]>
-;  V02 loc2         [V02,T25] (  3,  8.50)     int  ->  x21        
+;  V01 loc1         [V01,T07] ( 11, 22.50)     ref  ->  [fp+0x60]  class-hnd exact single-def <System.Collections.Generic.List`1[System.Globalization.EraInfo]>
+;  V02 loc2         [V02,T26] (  3,  8.50)     int  ->  x21        
 ;* V03 loc3         [V03    ] (  0,  0   )     int  ->  zero-ref   
 ;  V04 loc4         [V04    ] ( 15, 14   )     ref  ->  [fp+0x70]  do-not-enreg[X] must-init addr-exposed ld-addr-op class-hnd <System.String[]>
-;  V05 loc5         [V05,T09] (  6, 16.50)     int  ->   x0        
+;  V05 loc5         [V05,T08] (  6, 16.50)     int  ->   x0        
 ;  V06 loc6         [V06,T03] ( 10, 33   )     int  ->  x20        
 ;  V07 loc7         [V07    ] (  8, 32   )  struct ( 8) [fp+0x68]  do-not-enreg[XS] addr-exposed ld-addr-op <System.DateTime>
 ;  V08 loc8         [V08,T05] (  8, 28.50)     int  ->   x2        
 ;# V09 OutArgs      [V09    ] (  1,  1   )  struct ( 0) [sp+0x00]  do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-;  V10 tmp1         [V10,T42] (  3,  3   )     ref  ->  x20         class-hnd exact single-def "NewObj constructor temp" <System.Collections.Generic.List`1[System.Globalization.EraInfo]>
+;  V10 tmp1         [V10,T45] (  3,  3   )     ref  ->  x20         class-hnd exact single-def "NewObj constructor temp" <System.Collections.Generic.List`1[System.Globalization.EraInfo]>
 ;* V11 tmp2         [V11    ] (  0,  0   )  struct ( 8) zero-ref    "folding static readonly field struct" <System.DateTime>
 ;  V12 tmp3         [V12,T01] (  8, 52   )     int  ->  x22         "non-inline candidate call"
 ;  V13 tmp4         [V13,T02] (  6, 48   )     int  ->  x23         "non-inline candidate call"
 ;  V14 tmp5         [V14,T04] (  4, 32   )     int  ->  x24         "non-inline candidate call"
 ;  V15 tmp6         [V15,T12] (  2, 16   )     int  ->  x25         "non-inline candidate call"
 ;  V16 tmp7         [V16,T13] (  2, 16   )     int  ->  x21         "impAppendStmt"
-;  V17 tmp8         [V17,T10] (  2, 16   )     ref  ->  x27         class-hnd exact "impAppendStmt" <System.String>
+;  V17 tmp8         [V17,T09] (  2, 16   )     ref  ->  x27         class-hnd exact "impAppendStmt" <System.String>
 ;  V18 tmp9         [V18,T00] ( 11, 80   )     ref  ->   x1         class-hnd exact "NewObj constructor temp" <System.Globalization.EraInfo>
-;  V19 tmp10        [V19,T47] (  3,  1.50)     int  ->   x0        
-;* V20 tmp11        [V20    ] (  0,  0   )     ref  ->  zero-ref    class-hnd exact "impAppendStmt" <System.Globalization.EraInfo>
+;  V19 tmp10        [V19,T51] (  3,  1.50)     int  ->   x0        
+;  V20 tmp11        [V20,T10] (  2, 16   )     ref  ->  x15         class-hnd exact "impAppendStmt" <System.Globalization.EraInfo>
 ;* V21 tmp12        [V21    ] (  0,  0   )  struct ( 8) zero-ref    ld-addr-op "Inlining Arg" <System.DateTime>
 ;* V22 tmp13        [V22    ] (  0,  0   )  struct ( 8) zero-ref    ld-addr-op "Inlining Arg" <System.DateTime>
 ;* V23 tmp14        [V23    ] (  0,  0   )    long  ->  zero-ref    "impAppendStmt"
 ;  V24 tmp15        [V24,T11] (  2, 16   )     ref  ->   x0         class-hnd exact "Inlining Arg" <System.String[]>
-;  V25 tmp16        [V25,T27] (  3,  8   )     ref  ->  x26         class-hnd "Inline return value spill temp" <System.String>
-;  V26 tmp17        [V26,T07] (  5, 24   )     ref  ->  x26         class-hnd exact "Inlining Arg" <System.String>
+;  V25 tmp16        [V25,T28] (  3,  8   )     ref  ->  x26         class-hnd "Inline return value spill temp" <System.String>
+;  V26 tmp17        [V26,T06] (  5, 24   )     ref  ->  x26         class-hnd exact "Inlining Arg" <System.String>
 ;* V27 tmp18        [V27    ] (  0,  0   )     ref  ->  zero-ref    class-hnd exact "Inline return value spill temp" <System.String>
-;  V28 tmp19        [V28,T26] (  4,  8   )     ref  ->   x0         class-hnd exact "Inline stloc first use temp" <System.String>
+;  V28 tmp19        [V28,T27] (  4,  8   )     ref  ->   x0         class-hnd exact "Inline stloc first use temp" <System.String>
 ;* V29 tmp20        [V29    ] (  0,  0   )    long  ->  zero-ref    "Inline stloc first use temp"
-;  V30 tmp21        [V30,T29] (  2,  8   )   byref  ->   x1         "Inlining Arg"
-;  V31 tmp22        [V31,T30] (  2,  8   )   byref  ->   x2         "Inlining Arg"
+;  V30 tmp21        [V30,T30] (  2,  8   )   byref  ->   x1         "Inlining Arg"
+;  V31 tmp22        [V31,T31] (  2,  8   )   byref  ->   x2         "Inlining Arg"
 ;* V32 tmp23        [V32    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V33 tmp24        [V33    ] (  0,  0   )  struct ( 8) zero-ref    ld-addr-op "NewObj constructor temp" <System.DateTime>
 ;* V34 tmp25        [V34    ] (  0,  0   )  struct ( 8) zero-ref    ld-addr-op "Inline stloc first use temp" <System.DateTime>
 ;* V35 tmp26        [V35    ] (  0,  0   )  struct (16) zero-ref    <System.ReadOnlySpan`1[uint]>
 ;* V36 tmp27        [V36    ] (  0,  0   )  struct (16) zero-ref    ld-addr-op "Inline stloc first use temp" <System.ReadOnlySpan`1[uint]>
-;  V37 tmp28        [V37,T31] (  2,  8   )     int  ->  x14         "Inline stloc first use temp"
-;* V38 tmp29        [V38,T38] (  0,  0   )   ubyte  ->  zero-ref    "Inline return value spill temp"
+;  V37 tmp28        [V37,T32] (  2,  8   )     int  ->  x14         "Inline stloc first use temp"
+;* V38 tmp29        [V38,T42] (  0,  0   )   ubyte  ->  zero-ref    "Inline return value spill temp"
 ;* V39 tmp30        [V39    ] (  0,  0   )  struct (16) zero-ref    "ReadOnlySpan<T> for CreateSpan<T>" <System.ReadOnlySpan`1[uint]>
 ;* V40 tmp31        [V40    ] (  0,  0   )  struct (16) zero-ref    "ReadOnlySpan<T> for CreateSpan<T>" <System.ReadOnlySpan`1[uint]>
-;  V41 tmp32        [V41,T18] (  3, 12   )     int  ->  x15         "Inline stloc first use temp"
-;  V42 tmp33        [V42,T19] (  3, 12   )     int  ->  x12         "Inline stloc first use temp"
-;  V43 tmp34        [V43,T23] (  3, 10   )     ref  ->  x14         class-hnd "Inline stloc first use temp" <System.Globalization.EraInfo[]>
+;  V41 tmp32        [V41,T19] (  3, 12   )     int  ->  x15         "Inline stloc first use temp"
+;  V42 tmp33        [V42,T20] (  3, 12   )     int  ->  x12         "Inline stloc first use temp"
+;  V43 tmp34        [V43,T24] (  3, 10   )     ref  ->  x14         class-hnd "Inline stloc first use temp" <System.Globalization.EraInfo[]>
 ;  V44 tmp35        [V44,T15] (  4, 12   )     int  ->  x15         "Inline stloc first use temp"
-;  V45 tmp36        [V45,T35] (  3,  4   )     ref  ->   x0         "Single return block return value"
-;  V46 FramesRoot   [V46,T34] (  6,  4   )    long  ->  x19         "Pinvoke FrameListRoot"
-;  V47 PInvokeFrame [V47    ] (  8,  6   )  struct (72) [fp+0x18]  do-not-enreg[XS] addr-exposed "Pinvoke FrameVar"
-;  V48 tmp39        [V48    ] (  8, 32   )    long  ->  [fp+0x68]  do-not-enreg[X] addr-exposed "field V07._dateData (fldOffset=0x0)" P-DEP
-;* V49 tmp40        [V49    ] (  0,  0   )    long  ->  zero-ref    "field V11._dateData (fldOffset=0x0)" P-INDEP
-;  V50 tmp41        [V50,T32] (  2,  8   )    long  ->   x0         "field V21._dateData (fldOffset=0x0)" P-INDEP
-;* V51 tmp42        [V51    ] (  0,  0   )    long  ->  zero-ref    "field V22._dateData (fldOffset=0x0)" P-INDEP
-;  V52 tmp43        [V52,T33] (  2,  8   )    long  ->  x14         "field V33._dateData (fldOffset=0x0)" P-INDEP
-;* V53 tmp44        [V53    ] (  0,  0   )    long  ->  zero-ref    "field V34._dateData (fldOffset=0x0)" P-INDEP
-;  V54 tmp45        [V54,T28] (  3,  8   )   byref  ->  x14         "field V35._reference (fldOffset=0x0)" P-INDEP
-;* V55 tmp46        [V55,T39] (  0,  0   )     int  ->  zero-ref    "field V35._length (fldOffset=0x8)" P-INDEP
-;  V56 tmp47        [V56,T16] (  3, 12   )   byref  ->  x14         "field V36._reference (fldOffset=0x0)" P-INDEP
-;* V57 tmp48        [V57,T41] (  0,  0   )     int  ->  zero-ref    "field V36._length (fldOffset=0x8)" P-INDEP
-;  V58 tmp49        [V58,T36] (  2,  4   )   byref  ->  x14         "field V39._reference (fldOffset=0x0)" P-INDEP
-;* V59 tmp50        [V59,T44] (  0,  0   )     int  ->  zero-ref    "field V39._length (fldOffset=0x8)" P-INDEP
-;  V60 tmp51        [V60,T37] (  2,  4   )   byref  ->  x14         "field V40._reference (fldOffset=0x0)" P-INDEP
-;* V61 tmp52        [V61,T45] (  0,  0   )     int  ->  zero-ref    "field V40._length (fldOffset=0x8)" P-INDEP
-;  V62 tmp53        [V62,T43] (  3,  3   )     ref  ->  x14         single-def "arr expr"
-;  V63 tmp54        [V63,T08] (  3, 24   )     ref  ->  x14         "arr expr"
-;* V64 tmp55        [V64,T40] (  0,  0   )     ref  ->  zero-ref    "arr expr"
-;  V65 cse0         [V65,T20] (  3, 12   )     int  ->  x14         "CSE - moderate"
-;  V66 cse1         [V66,T24] (  3, 10   )     ref  ->  x14         "CSE - moderate"
-;  V67 cse2         [V67,T17] (  3, 12   )     ref  ->  x26         "CSE - moderate"
-;  V68 cse3         [V68,T46] (  3,  1.50)   byref  ->  x14         "CSE - moderate"
-;  V69 cse4         [V69,T14] (  7, 14   )     int  ->   x1         "CSE - moderate"
-;  V70 cse5         [V70,T21] (  3, 12   )     int  ->  x12         "CSE - moderate"
-;  V71 cse6         [V71,T22] (  3, 12   )     int  ->   x0         "CSE - moderate"
+;  V45 tmp36        [V45,T16] (  3, 12   )     ref  ->  x14         class-hnd "Inline stloc first use temp" <System.Globalization.EraInfo[]>
+;  V46 tmp37        [V46,T39] (  2,  4   )     ref  ->  x14         class-hnd exact "Inline return value spill temp" <System.Globalization.EraInfo>
+;* V47 tmp38        [V47,T47] (  0,  0   )     ref  ->  zero-ref    class-hnd "Inline stloc first use temp" <System.Globalization.EraInfo[]>
+;  V48 tmp39        [V48,T38] (  3,  4   )     ref  ->   x0         "Single return block return value"
+;  V49 FramesRoot   [V49,T37] (  6,  4   )    long  ->  x19         "Pinvoke FrameListRoot"
+;  V50 PInvokeFrame [V50    ] (  8,  6   )  struct (72) [fp+0x18]  do-not-enreg[XS] addr-exposed "Pinvoke FrameVar"
+;  V51 tmp42        [V51    ] (  8, 32   )    long  ->  [fp+0x68]  do-not-enreg[X] addr-exposed "field V07._dateData (fldOffset=0x0)" P-DEP
+;* V52 tmp43        [V52    ] (  0,  0   )    long  ->  zero-ref    "field V11._dateData (fldOffset=0x0)" P-INDEP
+;  V53 tmp44        [V53,T33] (  2,  8   )    long  ->   x0         "field V21._dateData (fldOffset=0x0)" P-INDEP
+;* V54 tmp45        [V54    ] (  0,  0   )    long  ->  zero-ref    "field V22._dateData (fldOffset=0x0)" P-INDEP
+;  V55 tmp46        [V55,T34] (  2,  8   )    long  ->  x14         "field V33._dateData (fldOffset=0x0)" P-INDEP
+;* V56 tmp47        [V56    ] (  0,  0   )    long  ->  zero-ref    "field V34._dateData (fldOffset=0x0)" P-INDEP
+;  V57 tmp48        [V57,T29] (  3,  8   )   byref  ->  x14         "field V35._reference (fldOffset=0x0)" P-INDEP
+;* V58 tmp49        [V58,T43] (  0,  0   )     int  ->  zero-ref    "field V35._length (fldOffset=0x8)" P-INDEP
+;  V59 tmp50        [V59,T17] (  3, 12   )   byref  ->  x14         "field V36._reference (fldOffset=0x0)" P-INDEP
+;* V60 tmp51        [V60,T44] (  0,  0   )     int  ->  zero-ref    "field V36._length (fldOffset=0x8)" P-INDEP
+;  V61 tmp52        [V61,T40] (  2,  4   )   byref  ->  x14         "field V39._reference (fldOffset=0x0)" P-INDEP
+;* V62 tmp53        [V62,T48] (  0,  0   )     int  ->  zero-ref    "field V39._length (fldOffset=0x8)" P-INDEP
+;  V63 tmp54        [V63,T41] (  2,  4   )   byref  ->  x14         "field V40._reference (fldOffset=0x0)" P-INDEP
+;* V64 tmp55        [V64,T49] (  0,  0   )     int  ->  zero-ref    "field V40._length (fldOffset=0x8)" P-INDEP
+;  V65 tmp56        [V65,T46] (  3,  3   )     ref  ->  x14         single-def "arr expr"
+;  V66 cse0         [V66,T21] (  3, 12   )     int  ->  x14         "CSE - moderate"
+;  V67 cse1         [V67,T25] (  3, 10   )     ref  ->  x14         "CSE - moderate"
+;  V68 cse2         [V68,T18] (  3, 12   )     ref  ->  x26         "CSE - moderate"
+;  V69 cse3         [V69,T50] (  3,  1.50)   byref  ->  x14         "CSE - moderate"
+;  V70 cse4         [V70,T14] (  7, 14   )     int  ->   x1         "CSE - moderate"
+;  V71 cse5         [V71,T36] (  2,  4.50)     ref  ->   x3         "CSE - moderate"
+;  V72 cse6         [V72,T22] (  3, 12   )     int  ->  x12         "CSE - moderate"
+;  V73 cse7         [V73,T35] (  2,  8   )     int  ->  x15         "CSE - moderate"
+;  V74 cse8         [V74,T23] (  3, 12   )     int  ->   x0         "CSE - moderate"
 ;
 ; Lcl frame size = 112
 
 G_M53339_IG01:
             stp     fp, lr, [sp, #-0xD0]!
             stp     x19, x20, [sp, #0x80]
             stp     x21, x22, [sp, #0x90]
             stp     x23, x24, [sp, #0xA0]
             stp     x25, x26, [sp, #0xB0]
             stp     x27, x28, [sp, #0xC0]
             mov     fp, sp
             stp     xzr, xzr, [fp, #0x70]	// [V04 loc4], [V00 loc0]
 						;; size=32 bbWeight=1 PerfScore 7.50
 G_M53339_IG02:
-            add     x0, fp, #32	// [V47 PInvokeFrame+0x08]
+            add     x0, fp, #32	// [V50 PInvokeFrame+0x08]
             mov     x1, x12
             bl      CORINFO_HELP_INIT_PINVOKE_FRAME
             mov     x19, x0
             mov     x3, sp
-            str     x3, [fp, #0x40]	// [V47 PInvokeFrame+0x28]
+            str     x3, [fp, #0x40]	// [V50 PInvokeFrame+0x28]
             mov     x3, fp
-            str     x3, [fp, #0x50]	// [V47 PInvokeFrame+0x38]
+            str     x3, [fp, #0x50]	// [V50 PInvokeFrame+0x38]
             add     x3, fp, #120	// [V00 loc0]
             movz    x0, #0xD1FFAB1E
             movk    x0, #0xD1FFAB1E LSL #16
             movk    x0, #0xD1FFAB1E LSL #32
             mov     w1, #3
             mov     w2, #13
             movz    x4, #0xD1FFAB1E      // code for System.Globalization.CalendarData:EnumCalendarInfo(System.String,ushort,int,byref):ubyte
             movk    x4, #0xD1FFAB1E LSL #16
             movk    x4, #0xD1FFAB1E LSL #32
             ldr     x4, [x4]
             blr     x4
             cbnz    w0, G_M53339_IG04
 						;; size=80 bbWeight=1 PerfScore 15.00
 G_M53339_IG03:
             mov     x0, xzr
             b       G_M53339_IG32
 						;; size=8 bbWeight=0.50 PerfScore 0.75
 G_M53339_IG04:
             movz    x0, #0xD1FFAB1E
             movk    x0, #0xD1FFAB1E LSL #16
             movk    x0, #0xD1FFAB1E LSL #32
             bl      CORINFO_HELP_NEWSFAST
             mov     x20, x0
             movz    x0, #0xD1FFAB1E
             movk    x0, #0xD1FFAB1E LSL #16
             movk    x0, #0xD1FFAB1E LSL #32
             mov     w1, #180
             bl      CORINFO_HELP_CLASSINIT_SHARED_DYNAMICCLASS
             movz    x14, #0xD1FFAB1E      // data for System.Collections.Generic.List`1[System.Globalization.EraInfo]:s_emptyArray
             movk    x14, #0xD1FFAB1E LSL #16
             movk    x14, #0xD1FFAB1E LSL #32
             ldr     x15, [x14]
             add     x14, x20, #8
             bl      CORINFO_HELP_ASSIGN_REF
             str     x20, [fp, #0x60]	// [V01 loc1]
             mov     w21, #0xD1FFAB1E
             movz    x0, #0xD1FFAB1E
             movk    x0, #0xD1FFAB1E LSL #16
             movk    x0, #0xD1FFAB1E LSL #32
-            str     x0, [fp, #0x30]	// [V47 PInvokeFrame+0x18]
+            str     x0, [fp, #0x30]	// [V50 PInvokeFrame+0x18]
             adr     x0, [G_M53339_IG07]
-            str     x0, [fp, #0x48]	// [V47 PInvokeFrame+0x30]
-            add     x0, fp, #32	// [V47 PInvokeFrame+0x08]
+            str     x0, [fp, #0x48]	// [V50 PInvokeFrame+0x30]
+            add     x0, fp, #32	// [V50 PInvokeFrame+0x08]
             str     x0, [x19, #0x10]
             strb    wzr, [x19, #0x0C]
 						;; size=108 bbWeight=0.50 PerfScore 10.00
 G_M53339_IG05:
             movz    x0, #0xD1FFAB1E
             movk    x0, #0xD1FFAB1E LSL #16
             movk    x0, #0xD1FFAB1E LSL #32
 						;; size=12 bbWeight=0.50 PerfScore 0.75
 G_M53339_IG06:
             blr     x0
 						;; size=4 bbWeight=0.50 PerfScore 0.50
 G_M53339_IG07:
             mov     w20, w0
             mov     w0, #1
             strb    w0, [x19, #0x0C]
             movz    x0, #0xD1FFAB1E
             movk    x0, #0xD1FFAB1E LSL #16
             movk    x0, #0xD1FFAB1E LSL #32
             ldr     w0, [x0]
             cmp     w0, #0
             beq     G_M53339_IG08
             bl      CORINFO_HELP_STOP_FOR_GC
 						;; size=40 bbWeight=0.50 PerfScore 4.50
 G_M53339_IG08:
-            ldr     x1, [fp, #0x28]	// [V47 PInvokeFrame+0x10]
+            ldr     x1, [fp, #0x28]	// [V50 PInvokeFrame+0x10]
             str     x1, [x19, #0x10]
             tbnz    w20, #31, G_M53339_IG11
 						;; size=12 bbWeight=0.50 PerfScore 2.00
 G_M53339_IG09:
             add     x1, fp, #104	// [V07 loc7]
             mov     w0, w20
             movz    x2, #0xD1FFAB1E      // code for System.Globalization.JapaneseCalendar:GetJapaneseEraStartDate(int,byref):ubyte
             movk    x2, #0xD1FFAB1E LSL #16
             movk    x2, #0xD1FFAB1E LSL #32
             ldr     x2, [x2]
             blr     x2
             cbz     w0, G_M53339_IG03
-            ldp     x19, x0, [fp, #0x60]	// [V01 loc1], [V48 tmp39]
+            ldp     x19, x0, [fp, #0x60]	// [V01 loc1], [V51 tmp42]
             and     x0, x0, #0xD1FFAB1E
             movz    x1, #0xD1FFAB1E
             movk    x1, #0xD1FFAB1E LSL #16
             movk    x1, #0xD1FFAB1E LSL #32
             movk    x1, #0xD1FFAB1E LSL #48
             cmp     x0, x1
             blt     G_M53339_IG21
             add     x0, fp, #104	// [V07 loc7]
             movz    x1, #0xD1FFAB1E      // code for System.DateTime:get_Year():int:this
             movk    x1, #0xD1FFAB1E LSL #16
             movk    x1, #0xD1FFAB1E LSL #32
             ldr     x1, [x1]
             blr     x1
             sxtw    w22, w0
             add     x0, fp, #104	// [V07 loc7]
             movz    x1, #0xD1FFAB1E      // code for System.DateTime:get_Month():int:this
             movk    x1, #0xD1FFAB1E LSL #16
             movk    x1, #0xD1FFAB1E LSL #32
             ldr     x1, [x1]
             blr     x1
             sxtw    w23, w0
             add     x0, fp, #104	// [V07 loc7]
             movz    x1, #0xD1FFAB1E      // code for System.DateTime:get_Day():int:this
             movk    x1, #0xD1FFAB1E LSL #16
             movk    x1, #0xD1FFAB1E LSL #32
             ldr     x1, [x1]
             blr     x1
             sxtw    w24, w0
             add     x0, fp, #104	// [V07 loc7]
             movz    x1, #0xD1FFAB1E      // code for System.DateTime:get_Year():int:this
             movk    x1, #0xD1FFAB1E LSL #16
             movk    x1, #0xD1FFAB1E LSL #32
             ldr     x1, [x1]
             blr     x1
             sub     w25, w0, #1
             add     x0, fp, #104	// [V07 loc7]
             movz    x1, #0xD1FFAB1E      // code for System.DateTime:get_Year():int:this
             movk    x1, #0xD1FFAB1E LSL #16
             movk    x1, #0xD1FFAB1E LSL #32
             ldr     x1, [x1]
             blr     x1
             sub     w0, w21, w0
             add     w21, w0, #1
             ldr     x0, [fp, #0x78]	// [V00 loc0]
             ldr     w0, [x0, #0x08]
             cmp     w20, w0
             bhs     G_M53339_IG36
             ldr     x0, [fp, #0x78]	// [V00 loc0]
             add     x0, x0, #16
             ldr     x26, [x0, w20, UXTW #3]
             mov     x27, x26
             ldr     x0, [fp, #0x78]	// [V00 loc0]
             ldr     w0, [x0, #0x08]
             cmp     w20, w0
             bhs     G_M53339_IG36
             ldr     w0, [x26, #0x08]
             cbz     w0, G_M53339_IG34
             cmp     w0, #1
             bne     G_M53339_IG12
 						;; size=272 bbWeight=4 PerfScore 288.00
 G_M53339_IG10:
             b       G_M53339_IG13
 						;; size=4 bbWeight=2 PerfScore 2.00
 G_M53339_IG11:
             ldr     x19, [fp, #0x60]	// [V01 loc1]
             b       G_M53339_IG21
             align   [0 bytes for IG26]
             align   [0 bytes]
             align   [0 bytes]
             align   [0 bytes]
 						;; size=8 bbWeight=0.25 PerfScore 0.75
 G_M53339_IG12:
             mov     w0, #1
             bl      System.String:FastAllocateString(int):System.String
             ldrsb   wzr, [x0]
             add     x1, x0, #12
             add     x2, x26, #12
             ldrh    w3, [x2]
             strh    w3, [x1]
             mov     x26, x0
 						;; size=32 bbWeight=2 PerfScore 20.00
 G_M53339_IG13:
             movz    x0, #0xD1FFAB1E
             movk    x0, #0xD1FFAB1E LSL #16
             movk    x0, #0xD1FFAB1E LSL #32
             bl      CORINFO_HELP_NEWSFAST
             mov     x1, x0
             stp     w20, w25, [x1, #0x28]
             mov     w14, #1
             stp     w14, w21, [x1, #0x30]
             mov     w14, #0xD1FFAB1E
             cmp     w22, #0
             ccmp    w22, w14, 0, gt
             ccmp    w23, #0, nzc, le
             ccmp    w23, #12, 0, gt
             bgt     G_M53339_IG35
             cmp     w24, #0
             ble     G_M53339_IG35
             tst     w22, #3
             bne     G_M53339_IG15
 						;; size=72 bbWeight=4 PerfScore 48.00
 G_M53339_IG14:
             tst     w22, #15
             beq     G_M53339_IG16
             movz    w14, #0xD1FFAB1E
             movk    w14, #0xD1FFAB1E LSL #16
             umull   x14, w22, w14
             lsr     x14, x14, #35
             mov     w15, #25
             msub    w14, w14, w15, w22
             cbnz    w14, G_M53339_IG16
 						;; size=36 bbWeight=2 PerfScore 18.00
 G_M53339_IG15:
             movz    x14, #0xD1FFAB1E
             movk    x14, #0xD1FFAB1E LSL #16
             movk    x14, #0xD1FFAB1E LSL #32
             b       G_M53339_IG17
 						;; size=16 bbWeight=2 PerfScore 5.00
 G_M53339_IG16:
             movz    x14, #0xD1FFAB1E
             movk    x14, #0xD1FFAB1E LSL #16
             movk    x14, #0xD1FFAB1E LSL #32
 						;; size=12 bbWeight=2 PerfScore 3.00
 G_M53339_IG17:
             cmp     w23, #13
             bhs     G_M53339_IG36
             ldr     w15, [x14, w23, UXTW #2]
             sub     w12, w23, #1
             cmp     w12, #13
             bhs     G_M53339_IG36
             ldr     w14, [x14, w12, UXTW #2]
             sub     w15, w15, w14
             cmp     w15, w24
             blo     G_M53339_IG35
             sub     w15, w22, #1
             movz    w12, #0xD1FFAB1E
             movk    w12, #0xD1FFAB1E LSL #16
             umull   x12, w15, w12
             lsr     x12, x12, #37
             mov     wip0, #0xD1FFAB1E
             mul     w15, w15, wip0
             lsr     w15, w15, #2
             sub     w15, w15, w12
             add     w15, w15, w12,  LSR #2
             add     w14, w15, w14
             add     w14, w14, w24
             sub     w14, w14, #1
             mov     w14, w14
             movz    x15, #0xD1FFAB1E
             movk    x15, #0xD1FFAB1E LSL #16
             movk    x15, #201 LSL #32
             mul     x14, x14, x15
             and     x14, x14, #0xD1FFAB1E
             str     x14, [x1, #0x20]
             add     x14, x1, #8
             mov     x15, x27
             bl      CORINFO_HELP_ASSIGN_REF
             add     x14, x1, #16
             mov     x15, x26
             bl      CORINFO_HELP_ASSIGN_REF
             movz    x14, #0xD1FFAB1E
             movk    x14, #0xD1FFAB1E LSL #16
             movk    x14, #0xD1FFAB1E LSL #32
             str     x14, [x1, #0x18]
             ldr     w14, [x19, #0x14]
             add     w14, w14, #1
             str     w14, [x19, #0x14]
             ldr     x14, [x19, #0x08]
             ldr     w15, [x19, #0x10]
             ldr     w12, [x14, #0x08]
             cmp     w12, w15
             bls     G_M53339_IG19
 						;; size=192 bbWeight=4 PerfScore 198.00
 G_M53339_IG18:
             add     w12, w15, #1
             str     w12, [x19, #0x10]
             add     x14, x14, #16
             add     x14, x14, x15,  LSL #3
             mov     x15, x1
             bl      CORINFO_HELP_ASSIGN_REF
             b       G_M53339_IG20
 						;; size=28 bbWeight=2 PerfScore 11.00
 G_M53339_IG19:
             mov     x0, x19
             movz    x2, #0xD1FFAB1E      // code for System.Collections.Generic.List`1[System.__Canon]:AddWithResize(System.__Canon):this
             movk    x2, #0xD1FFAB1E LSL #16
             movk    x2, #0xD1FFAB1E LSL #32
             ldr     x2, [x2]
             blr     x2
 						;; size=24 bbWeight=2 PerfScore 12.00
 G_M53339_IG20:
             add     x0, fp, #104	// [V07 loc7]
             movz    x1, #0xD1FFAB1E      // code for System.DateTime:get_Year():int:this
             movk    x1, #0xD1FFAB1E LSL #16
             movk    x1, #0xD1FFAB1E LSL #32
             ldr     x1, [x1]
             blr     x1
             sxtw    w21, w0
             sub     w20, w20, #1
             tbz     w20, #31, G_M53339_IG30
 						;; size=36 bbWeight=4 PerfScore 32.00
 G_M53339_IG21:
             add     x3, fp, #112	// [V04 loc4]
             movz    x0, #0xD1FFAB1E
             movk    x0, #0xD1FFAB1E LSL #16
             movk    x0, #0xD1FFAB1E LSL #32
             mov     w1, #3
             mov     w2, #14
             movz    x4, #0xD1FFAB1E      // code for System.Globalization.CalendarData:EnumCalendarInfo(System.String,ushort,int,byref):ubyte
             movk    x4, #0xD1FFAB1E LSL #16
             movk    x4, #0xD1FFAB1E LSL #32
             ldr     x4, [x4]
             blr     x4
             cbnz    w0, G_M53339_IG22
             movz    x14, #0xD1FFAB1E
             movk    x14, #0xD1FFAB1E LSL #16
             movk    x14, #0xD1FFAB1E LSL #32
             ldr     x14, [x14]
             str     x14, [fp, #0x70]	// [V04 loc4]
 						;; size=68 bbWeight=0.50 PerfScore 7.50
 G_M53339_IG22:
             ldr     x14, [fp, #0x70]	// [V04 loc4]
             ldr     w14, [x14, #0x08]
             sub     w14, w14, #1
             ldr     x15, [fp, #0x70]	// [V04 loc4]
             ldr     w15, [x15, #0x08]
             cmp     w14, w15
             bhs     G_M53339_IG36
             ldr     x14, [fp, #0x70]	// [V04 loc4]
             add     x14, x14, #16
             ldr     x15, [fp, #0x70]	// [V04 loc4]
             ldr     w15, [x15, #0x08]
             sub     w15, w15, #1
             ldr     x15, [x14, w15, UXTW #3]
             ldr     w15, [x15, #0x08]
             cbz     w15, G_M53339_IG23
             ldr     x15, [fp, #0x70]	// [V04 loc4]
             ldr     w15, [x15, #0x08]
             sub     w15, w15, #1
             ldr     x12, [fp, #0x70]	// [V04 loc4]
             ldr     w12, [x12, #0x08]
             cmp     w15, w12
             bhs     G_M53339_IG36
             ldr     x15, [fp, #0x70]	// [V04 loc4]
             ldr     w15, [x15, #0x08]
             sub     w15, w15, #1
             ldr     x14, [x14, w15, UXTW #3]
             ldr     w15, [x14, #0x08]
             cmp     w15, #0
             bls     G_M53339_IG36
             ldrh    w14, [x14, #0x0C]
             cmp     w14, #127
             ble     G_M53339_IG24
 						;; size=128 bbWeight=0.50 PerfScore 28.25
 G_M53339_IG23:
             movz    x14, #0xD1FFAB1E
             movk    x14, #0xD1FFAB1E LSL #16
             movk    x14, #0xD1FFAB1E LSL #32
             ldr     x14, [x14]
             str     x14, [fp, #0x70]	// [V04 loc4]
 						;; size=20 bbWeight=0.50 PerfScore 2.75
 G_M53339_IG24:
             ldr     x14, [fp, #0x70]	// [V04 loc4]
             movz    x15, #0xD1FFAB1E
             movk    x15, #0xD1FFAB1E LSL #16
             movk    x15, #0xD1FFAB1E LSL #32
             ldr     x15, [x15]
             cmp     x14, x15
             beq     G_M53339_IG31
             ldr     x14, [fp, #0x70]	// [V04 loc4]
             ldr     w14, [x14, #0x08]
             sub     w0, w14, #1
 						;; size=40 bbWeight=0.50 PerfScore 6.75
 G_M53339_IG25:
             mov     w2, wzr
             ldr     w1, [x19, #0x10]
             cmp     w1, #0
             ble     G_M53339_IG29
-						;; size=16 bbWeight=0.50 PerfScore 2.50
+            ldr     x3, [x19, #0x08]
+						;; size=20 bbWeight=0.50 PerfScore 4.00
 G_M53339_IG26:
+            mov     x14, x3
             cmp     w2, w1
             bhs     G_M53339_IG33
-            ldr     x14, [x19, #0x08]
             ldr     w15, [x14, #0x08]
-            cmp     w2, w15
-            bhs     G_M53339_IG36
+            cmp     w15, w2
+            bls     G_M53339_IG33
             add     x14, x14, #16
             ldr     x14, [x14, w2, UXTW #3]
-            sub     w15, w1, w2
-            str     w15, [x14, #0x28]
+            mov     x15, x14
+            sub     w12, w1, w2
+            str     w12, [x15, #0x28]
             ldr     x15, [fp, #0x70]	// [V04 loc4]
             ldr     w15, [x15, #0x08]
             cmp     w15, w0
             ble     G_M53339_IG28
-						;; size=56 bbWeight=4 PerfScore 82.00
+						;; size=60 bbWeight=4 PerfScore 74.00
 G_M53339_IG27:
-            add     x14, x14, #24
             ldr     x15, [fp, #0x70]	// [V04 loc4]
             ldr     w15, [x15, #0x08]
             cmp     w0, w15
             bhs     G_M53339_IG36
             ldr     x15, [fp, #0x70]	// [V04 loc4]
             add     x15, x15, #16
             ldr     x15, [x15, w0, UXTW #3]
+            add     x14, x14, #24
             bl      CORINFO_HELP_ASSIGN_REF
 						;; size=36 bbWeight=2 PerfScore 27.00
 G_M53339_IG28:
             sub     w0, w0, #1
             add     w2, w2, #1
             cmp     w2, w1
             blt     G_M53339_IG26
 						;; size=16 bbWeight=4 PerfScore 10.00
 G_M53339_IG29:
             mov     x0, x19
             movz    x1, #0xD1FFAB1E      // code for System.Collections.Generic.List`1[System.__Canon]:ToArray():System.__Canon[]:this
             movk    x1, #0xD1FFAB1E LSL #16
             movk    x1, #0xD1FFAB1E LSL #32
             ldr     x1, [x1]
             blr     x1
             b       G_M53339_IG32
 						;; size=28 bbWeight=0.50 PerfScore 3.50
 G_M53339_IG30:
             str     x19, [fp, #0x60]	// [V01 loc1]
             b       G_M53339_IG09
 						;; size=8 bbWeight=2 PerfScore 4.00
 G_M53339_IG31:
             ldr     w1, [x19, #0x10]
             sub     w0, w1, #1
             b       G_M53339_IG25
 						;; size=12 bbWeight=0.50 PerfScore 2.25
 G_M53339_IG32:
             ldp     x27, x28, [sp, #0xC0]
             ldp     x25, x26, [sp, #0xB0]
             ldp     x23, x24, [sp, #0xA0]
             ldp     x21, x22, [sp, #0x90]
             ldp     x19, x20, [sp, #0x80]
             ldp     fp, lr, [sp], #0xD0
             ret     lr
 						;; size=28 bbWeight=1 PerfScore 7.00
 G_M53339_IG33:
             movz    x0, #0xD1FFAB1E      // code for System.ThrowHelper:ThrowArgumentOutOfRange_IndexMustBeLessException()
             movk    x0, #0xD1FFAB1E LSL #16
             movk    x0, #0xD1FFAB1E LSL #32
             ldr     x0, [x0]
             blr     x0
             brk_unix #0
 						;; size=24 bbWeight=0 PerfScore 0.00
 G_M53339_IG34:
             mov     x0, x26
             mov     w1, wzr
             mov     w2, #1
             movz    x3, #0xD1FFAB1E      // code for System.String:ThrowSubstringArgumentOutOfRange(int,int):this
             movk    x3, #0xD1FFAB1E LSL #16
             movk    x3, #0xD1FFAB1E LSL #32
             ldr     x3, [x3]
             blr     x3
             brk_unix #0
 						;; size=36 bbWeight=0 PerfScore 0.00
 G_M53339_IG35:
             movz    x0, #0xD1FFAB1E      // code for System.ThrowHelper:ThrowArgumentOutOfRange_BadYearMonthDay()
             movk    x0, #0xD1FFAB1E LSL #16
             movk    x0, #0xD1FFAB1E LSL #32
             ldr     x0, [x0]
             blr     x0
             brk_unix #0
 						;; size=24 bbWeight=0 PerfScore 0.00
 G_M53339_IG36:
             bl      CORINFO_HELP_RNGCHKFAIL
             brk_unix #0
 						;; size=8 bbWeight=0 PerfScore 0.00
 
-; Total bytes of code 1576, prolog size 32, PerfScore 1019.85, instruction count 398, allocated bytes for code 1576 (MethodHash=10d42fa4) for method System.Globalization.JapaneseCalendar:IcuGetJapaneseEras():System.Globalization.EraInfo[] (FullOpts)
+; Total bytes of code 1584, prolog size 32, PerfScore 1014.15, instruction count 400, allocated bytes for code 1584 (MethodHash=10d42fa4) for method System.Globalization.JapaneseCalendar:IcuGetJapaneseEras():System.Globalization.EraInfo[] (FullOpts)
4 (0.917% of base) - System.Threading.Tasks.TaskExceptionHolder:CreateExceptionObject(ubyte,System.Exception):System.AggregateException:this
 ; Assembly listing for method System.Threading.Tasks.TaskExceptionHolder:CreateExceptionObject(ubyte,System.Exception):System.AggregateException:this (FullOpts)
 ; Emitting BLENDED_CODE for generic ARM64 - Unix
 ; FullOpts code
 ; optimized code
 ; fp based frame
 ; fully interruptible
 ; No PGO data
 ; 0 inlinees with PGO data; 4 single block inlinees; 2 inlinees without PGO data
 ; Final local variable assignments
 ;
-;  V00 this         [V00,T04] (  6,  5   )     ref  ->  x19         this class-hnd single-def <System.Threading.Tasks.TaskExceptionHolder>
+;  V00 this         [V00,T05] (  6,  5   )     ref  ->  x19         this class-hnd single-def <System.Threading.Tasks.TaskExceptionHolder>
 ;  V01 arg1         [V01,T10] (  3,  2.50)   ubyte  ->   x1         single-def
 ;  V02 arg2         [V02,T08] (  4,  3.50)     ref  ->  x20         class-hnd single-def <System.Exception>
-;  V03 loc0         [V03,T07] (  4,  6   )     ref  ->  x21         class-hnd single-def <System.Collections.Generic.List`1[System.Runtime.ExceptionServices.ExceptionDispatchInfo]>
-;  V04 loc1         [V04,T05] (  5,  6   )     ref  ->  x22         class-hnd exact single-def <System.Exception[]>
+;  V03 loc0         [V03,T14] (  4,  2.50)     ref  ->  x21         class-hnd single-def <System.Collections.Generic.List`1[System.Runtime.ExceptionServices.ExceptionDispatchInfo]>
+;  V04 loc1         [V04,T06] (  5,  6   )     ref  ->  x22         class-hnd exact single-def <System.Exception[]>
 ;  V05 loc2         [V05,T00] (  7, 24.50)     int  ->   x0        
 ;# V06 OutArgs      [V06    ] (  1,  1   )  struct ( 0) [sp+0x00]  do-not-enreg[XS] addr-exposed "OutgoingArgSpace"
-;  V07 tmp1         [V07,T02] (  2, 16   )     ref  ->  x12         class-hnd "Strict ordering of exceptions for Array store" <System.Exception>
-;  V08 tmp2         [V08,T11] (  3,  3   )     ref  ->  x19         class-hnd exact single-def "NewObj constructor temp" <System.AggregateException>
-;  V09 tmp3         [V09,T12] (  3,  3   )     ref  ->  x20         class-hnd exact single-def "NewObj constructor temp" <System.AggregateException>
-;* V10 tmp4         [V10    ] (  0,  0   )     ref  ->  zero-ref    class-hnd "Inlining Arg" <System.__Canon>
-;  V11 tmp5         [V11,T13] (  2,  2   )     ref  ->   x1         single-def "argument with side effect"
-;  V12 tmp6         [V12,T01] (  3, 24   )     ref  ->  x14         "arr expr"
-;  V13 cse0         [V13,T06] (  5,  6   )     int  ->   x2         "CSE - aggressive"
+;  V07 tmp1         [V07,T01] (  2, 16   )     ref  ->  x12         class-hnd "Strict ordering of exceptions for Array store" <System.Exception>
+;  V08 tmp2         [V08,T12] (  3,  3   )     ref  ->  x19         class-hnd exact single-def "NewObj constructor temp" <System.AggregateException>
+;  V09 tmp3         [V09,T13] (  3,  3   )     ref  ->  x20         class-hnd exact single-def "NewObj constructor temp" <System.AggregateException>
+;* V10 tmp4         [V10    ] (  0,  0   )     ref  ->  zero-ref    class-hnd exact "Inline return value spill temp" <System.Runtime.ExceptionServices.ExceptionDispatchInfo>
+;  V11 tmp5         [V11,T02] (  3, 12   )     ref  ->  x14         class-hnd "Inline stloc first use temp" <System.Runtime.ExceptionServices.ExceptionDispatchInfo[]>
+;  V12 tmp6         [V12,T15] (  2,  2   )     ref  ->   x1         single-def "argument with side effect"
+;  V13 cse0         [V13,T07] (  5,  6   )     int  ->   x2         "CSE - aggressive"
 ;  V14 cse1         [V14,T09] (  3,  5   )     int  ->  x19         "CSE - aggressive"
-;  V15 cse2         [V15,T03] (  3, 12   )    long  ->  x15         "CSE - aggressive"
-;  V16 cse3         [V16,T14] (  3,  1.50)     int  ->   x1         "CSE - aggressive"
+;  V15 cse2         [V15,T11] (  2,  4.50)     ref  ->   x3         "CSE - aggressive"
+;  V16 cse3         [V16,T03] (  3, 12   )    long  ->  x15         "CSE - aggressive"
+;  V17 cse4         [V17,T16] (  3,  1.50)     int  ->   x1         "CSE - aggressive"
+;  V18 cse5         [V18,T04] (  2,  8   )     int  ->  x15         "CSE - aggressive"
 ;
 ; Lcl frame size = 0
 
 G_M26858_IG01:
             stp     fp, lr, [sp, #-0x30]!
             stp     x19, x20, [sp, #0x10]
             stp     x21, x22, [sp, #0x20]
             mov     fp, sp
             mov     x19, x0
             mov     x20, x2
 						;; size=24 bbWeight=1 PerfScore 4.50
 G_M26858_IG02:
             add     x0, x19, #16
             ldapr   x21, [x0]
             add     x0, x19, #32
             ldaprb  w0, [x0]
             cbnz    w0, G_M26858_IG05
 						;; size=20 bbWeight=1 PerfScore 8.00
 G_M26858_IG03:
             tst     w1, #255
             bne     G_M26858_IG04
             mov     x0, x19
             movz    x1, #0xD1FFAB1E      // code for System.GC:SuppressFinalize(System.Object)
             movk    x1, #0xD1FFAB1E LSL #16
             movk    x1, #0xD1FFAB1E LSL #32
             ldr     x1, [x1]
             blr     x1
 						;; size=32 bbWeight=0.50 PerfScore 3.75
 G_M26858_IG04:
             add     x0, x19, #32
             mov     w1, #1
             stlrb   w1, [x0]
 						;; size=12 bbWeight=0.50 PerfScore 1.00
 G_M26858_IG05:
             cbnz    x20, G_M26858_IG08
 						;; size=4 bbWeight=1 PerfScore 1.00
 G_M26858_IG06:
             movz    x0, #0xD1FFAB1E
             movk    x0, #0xD1FFAB1E LSL #16
             movk    x0, #0xD1FFAB1E LSL #32
             bl      CORINFO_HELP_NEWSFAST
             mov     x20, x0
             movz    x0, #0xD1FFAB1E
             movk    x0, #0xD1FFAB1E LSL #16
             movk    x0, #0xD1FFAB1E LSL #32
             movz    x1, #0xD1FFAB1E      // code for System.SR:GetResourceString(System.String):System.String
             movk    x1, #0xD1FFAB1E LSL #16
             movk    x1, #0xD1FFAB1E LSL #32
             ldr     x1, [x1]
             blr     x1
             mov     x1, x0
             mov     x0, x20
             mov     x2, x21
             movz    x3, #0xD1FFAB1E      // code for System.AggregateException:.ctor(System.String,System.Collections.Generic.List`1[System.Runtime.ExceptionServices.ExceptionDispatchInfo]):this
             movk    x3, #0xD1FFAB1E LSL #16
             movk    x3, #0xD1FFAB1E LSL #32
             ldr     x3, [x3]
             blr     x3
             mov     x0, x20
 						;; size=88 bbWeight=0.50 PerfScore 8.75
 G_M26858_IG07:
             ldp     x21, x22, [sp, #0x20]
             ldp     x19, x20, [sp, #0x10]
             ldp     fp, lr, [sp], #0x30
             ret     lr
 						;; size=16 bbWeight=0.50 PerfScore 2.00
 G_M26858_IG08:
             ldr     w19, [x21, #0x10]
             add     w1, w19, #1
             sxtw    x1, w1
             movz    x0, #0xD1FFAB1E
             movk    x0, #0xD1FFAB1E LSL #16
             movk    x0, #0xD1FFAB1E LSL #32
             bl      CORINFO_HELP_NEWARR_1_OBJ
             mov     x22, x0
             mov     w0, wzr
             ldr     w1, [x22, #0x08]
             sub     w2, w1, #1
             cmp     w2, #0
             ble     G_M26858_IG10
+            ldr     x3, [x21, #0x08]
             align   [0 bytes for IG09]
             align   [0 bytes]
             align   [0 bytes]
             align   [0 bytes]
-						;; size=52 bbWeight=0.50 PerfScore 6.25
+						;; size=56 bbWeight=0.50 PerfScore 7.75
 G_M26858_IG09:
+            mov     x14, x3
             cmp     w0, w19
             bhs     G_M26858_IG12
-            ldr     x14, [x21, #0x08]
             ldr     w15, [x14, #0x08]
-            cmp     w0, w15
-            bhs     G_M26858_IG13
+            cmp     w15, w0
+            bls     G_M26858_IG12
             add     x14, x14, #16
             ubfiz   x15, x0, #3, #32
             ldr     x14, [x14, x15]
             ldr     x12, [x14, #0x08]
             add     x14, x22, #16
             add     x14, x14, x15
             mov     x15, x12
             bl      CORINFO_HELP_ASSIGN_REF
             add     w0, w0, #1
             cmp     w2, w0
             bgt     G_M26858_IG09
-						;; size=68 bbWeight=4 PerfScore 84.00
+						;; size=68 bbWeight=4 PerfScore 74.00
 G_M26858_IG10:
             cmp     w2, w1
             bhs     G_M26858_IG13
             add     x14, x22, #16
             add     x14, x14, x2,  LSL #3
             mov     x15, x20
             bl      CORINFO_HELP_ASSIGN_REF
             movz    x0, #0xD1FFAB1E
             movk    x0, #0xD1FFAB1E LSL #16
             movk    x0, #0xD1FFAB1E LSL #32
             bl      CORINFO_HELP_NEWSFAST
             mov     x19, x0
             mov     x1, x22
             movz    x2, #0xD1FFAB1E      // code for System.AggregateException:.ctor(System.Exception[]):this
             movk    x2, #0xD1FFAB1E LSL #16
             movk    x2, #0xD1FFAB1E LSL #32
             ldr     x2, [x2]
             blr     x2
             mov     x0, x19
 						;; size=72 bbWeight=0.50 PerfScore 7.00
 G_M26858_IG11:
             ldp     x21, x22, [sp, #0x20]
             ldp     x19, x20, [sp, #0x10]
             ldp     fp, lr, [sp], #0x30
             ret     lr
 						;; size=16 bbWeight=0.50 PerfScore 2.00
 G_M26858_IG12:
             movz    x0, #0xD1FFAB1E      // code for System.ThrowHelper:ThrowArgumentOutOfRange_IndexMustBeLessException()
             movk    x0, #0xD1FFAB1E LSL #16
             movk    x0, #0xD1FFAB1E LSL #32
             ldr     x0, [x0]
             blr     x0
             brk_unix #0
 						;; size=24 bbWeight=0 PerfScore 0.00
 G_M26858_IG13:
             bl      CORINFO_HELP_RNGCHKFAIL
             brk_unix #0
 						;; size=8 bbWeight=0 PerfScore 0.00
 
-; Total bytes of code 436, prolog size 24, PerfScore 171.85, instruction count 113, allocated bytes for code 436 (MethodHash=a6ac9715) for method System.Threading.Tasks.TaskExceptionHolder:CreateExceptionObject(ubyte,System.Exception):System.AggregateException:this (FullOpts)
+; Total bytes of code 440, prolog size 24, PerfScore 163.75, instruction count 114, allocated bytes for code 440 (MethodHash=a6ac9715) for method System.Threading.Tasks.TaskExceptionHolder:CreateExceptionObject(ubyte,System.Exception):System.AggregateException:this (FullOpts)
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