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October 17, 2016 15:36
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z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
z80scc_channel::z80scc_channel(const machine_config&, const char*, device_t*, UINT32) | |
virtual void z80scc_device::device_start() | |
- SCC variant 20 | |
virtual void z80scc_channel::device_start() | |
virtual void z80scc_channel::device_start() | |
:ioc2:scc virtual void z80scc_device::device_reset() | |
virtual void z80scc_channel::device_reset() | |
void z80scc_channel::set_rts(int)(1) ":ioc2:scc": A | |
void z80scc_channel::set_dtr(int)(1) | |
:ioc2:scc void z80scc_device::reset_interrupts() | |
:ioc2:scc virtual int z80scc_device::z80daisy_irq_state() A:000 B:000 Interrupt State 0 | |
:ioc2:scc void z80scc_device::check_interrupts() | |
scc_irq_w: 0 | |
virtual void z80scc_channel::device_reset() | |
void z80scc_channel::set_rts(int)(1) ":ioc2:scc": B | |
void z80scc_channel::set_dtr(int)(1) | |
virtual void z80scc_channel::device_reset() | |
void z80scc_channel::set_rts(int)(1) ":ioc2:scc": A | |
void z80scc_channel::set_dtr(int)(1) | |
:ioc2:scc void z80scc_device::reset_interrupts() | |
:ioc2:scc virtual int z80scc_device::z80daisy_irq_state() A:000 B:000 Interrupt State 0 | |
:ioc2:scc void z80scc_device::check_interrupts() | |
scc_irq_w: 0 | |
virtual void z80scc_channel::device_reset() | |
void z80scc_channel::set_rts(int)(1) ":ioc2:scc": B | |
void z80scc_channel::set_dtr(int)(1) | |
z80scc_device::ba_cd_w ba:00 cd:00 | |
data_write: 09 | |
z80scc_device::ba_cd_w ba:00 cd:00 | |
data_write: c0 | |
z80scc_device::ba_cd_w ba:00 cd:00 | |
data_write: 04 | |
z80scc_device::ba_cd_w ba:00 cd:00 | |
data_write: 44 | |
z80scc_device::ba_cd_w ba:00 cd:00 | |
data_write: 03 | |
z80scc_device::ba_cd_w ba:00 cd:00 | |
data_write: c0 | |
z80scc_device::ba_cd_w ba:00 cd:00 | |
data_write: 05 | |
z80scc_device::ba_cd_w ba:00 cd:00 | |
data_write: e2 | |
z80scc_device::ba_cd_w ba:00 cd:00 | |
data_write: 0b | |
z80scc_device::ba_cd_w ba:00 cd:00 | |
data_write: 50 | |
z80scc_device::ba_cd_w ba:00 cd:00 | |
data_write: 0c | |
z80scc_device::ba_cd_w ba:00 cd:00 | |
data_write: 0a | |
z80scc_device::ba_cd_w ba:00 cd:00 | |
data_write: 0d | |
z80scc_device::ba_cd_w ba:00 cd:00 | |
data_write: 00 | |
z80scc_device::ba_cd_w ba:00 cd:00 | |
data_write: 0e | |
z80scc_device::ba_cd_w ba:00 cd:00 | |
data_write: 01 | |
z80scc_device::ba_cd_w ba:00 cd:00 | |
data_write: 03 | |
z80scc_device::ba_cd_w ba:00 cd:00 | |
data_write: c1 | |
z80scc_device::ba_cd_w ba:00 cd:00 | |
data_write: 05 | |
z80scc_device::ba_cd_w ba:00 cd:00 | |
data_write: ea | |
UINT8 z80scc_channel::data_read() ":ioc2:scc": A : Data Register Read: data_read: Attempt to read out character from empty FIFO | |
' ' 00 | |
UINT8 z80scc_channel::data_read() ":ioc2:scc": A : Data Register Read: data_read: Attempt to read out character from empty FIFO | |
' ' 00 | |
... | |
repeats from here | |
... | |
UINT8 z80scc_channel::data_read() ":ioc2:scc": A : Data Register Read: data_read: Attempt to read out character from empty FIFO | |
' ' 00 | |
... |
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