gistfile1.txt

+-------+      +-------+           +--------------------------------+   +---------+
|       +------>       |           |                                +--->         |
|  ALU  <------+       |           |       Output Buffer            <---+         |
|       |      |       |           +-----+--+------+--+------+--+---+   |         |
+-+---^-+      |Control|                 ^  |      ^  |      ^  |       |         |
  |   |        |  Unit |                 |  |      |  |      |  |       |         |
  |   |        |       |           +--------------------------------+   |         |
  |   |        |       |           |   +----v-+  +----v-+  +----v-+ |   |         |
  |   |        |       |           | A |      |  |      |  |      | |   |         |
+-v---+-+      |       |           | L |  ADD |  | AND  |  |  OR  | |   |         |
|       |      |       |           | U |      |  |      |  |      | |   | Control |
| Buffer<------+       |           |   +-^----+  +-^----+  +-^----+ |   |  Unit   |
|       |      |       |           +--------------------------------+   |         |
+--+--^-+      |       |                 |  |      |  |      |  |       |         |
   |  |        |       |                 |  |      |  |      |  |       |         |
   |  |        |       |                 |  ^      |  ^      |  ^       |         |
   v  +        +-------+            +----+--+------+--+------+--+----+  |         |
                                    |           Register File        <--+         |
                                    +--------------------------------+  +---------+
 Con^entional Design                                                               
                                                                                   
                                               Old Planned Design