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msp432 startup code
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/* This is the code that gets called when the processor first starts execution */ | |
/* following a reset event. Only the absolutely necessary set is performed, */ | |
/* after which the application supplied entry() routine is called. Any fancy */ | |
/* actions (such as making decisions based on the reset cause register, and */ | |
/* resetting the bits in that register) are left solely in the hands of the */ | |
/* application. */ | |
void resetISR(void) { | |
#ifdef WDTHOLD | |
WDTCTL = WDTPW + WDTHOLD; | |
#else | |
#define HWREG16(x) (*((volatile uint16_t *)(x))) | |
(HWREG16(0x4000480C)) = 0x5a80; | |
#endif | |
uint32_t* src; | |
uint32_t* dst; | |
/* copy initialized data section stored in flash to ram */ | |
extern uint32_t __data_load__; | |
extern uint32_t __data_start__; | |
extern uint32_t __data_end__; | |
src = &__data_load__; | |
dst = &__data_start__; | |
while (dst < &__data_end__) { | |
*dst++ = *src++; | |
} | |
/* clear BSS section */ | |
extern uint32_t __bss_start__; | |
extern uint32_t __bss_end__; | |
dst = &__bss_start__; | |
while (dst < &__bss_end__) { | |
*dst++ = 0; | |
} | |
#if 0 | |
/* enable FPU */ | |
SCB->CPACR |= ((3UL << 10*2) | (3UL << 11*2)); // Set CP10 & CP11 Full Access | |
__DSB();//Data barrier | |
__ISB();//Instruction barrier | |
#endif | |
#define GO_IT_ALONE /* no TI c runtime code needed */ | |
#if defined(GO_IT_ALONE) | |
/* invoke any constructors. */ | |
typedef void (*func_ptr)(); | |
extern func_ptr __init_array_start; | |
extern func_ptr __init_array_end; | |
func_ptr* global_init_func = &__init_array_start; | |
while (global_init_func < &__init_array_end) { | |
(*global_init_func++)(); | |
} | |
/* TOD0: setup frame ptr not 100% needed */ | |
/* Call the app entry point. */ | |
main(); | |
// we don't expect main to exit as it is in a while(1) loop | |
#else | |
extern void _start(void); /* newlib c runtime */ | |
/* _start establishes a frame pointer, invokes any constructors and calls main() */ | |
_start(); | |
#endif | |
} |
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//***************************************************************************** | |
// | |
// MSP432 main.c - test example to make sure data segment is being initialized | |
// | |
//**************************************************************************** | |
#include "msp.h" | |
#ifdef __GNUC__ | |
#define ALWAYS_INLINE inline __attribute__((always_inline)) | |
#define NEVER_INLINE __attribute__((noinline)) | |
#else | |
#define ALWAYS_INLINE inline | |
#define NEVER_INLINE | |
#endif | |
#define RED BIT0 | |
#define GREEN BIT1 | |
#define BLUE BIT2 | |
#define WHITE (RED|GREEN|BLUE) | |
#define BLACK 0 | |
#define USE_DATA_SEG /* this test usage with a data segment red dbl-blink */ | |
//#define USE_CONST /* this test that it ends up in flash green dbl-blink */ | |
//#define USE_STACK /* this test that the stack is used and initialized blue dbl-blink */ | |
#if defined(USE_DATA_SEG) | |
uint8_t led_states[] = { | |
RED, BLACK, | |
RED, BLACK, | |
GREEN, BLACK, | |
BLUE, BLACK, | |
WHITE, BLACK }; | |
#elif defined(USE_CONST) | |
const uint8_t led_states[] = { | |
RED, BLACK, | |
GREEN, BLACK, | |
GREEN, BLACK, | |
BLUE, BLACK, | |
WHITE, BLACK | |
}; | |
#endif | |
volatile unsigned tick_cnt_msec; | |
#ifdef __cplusplus | |
extern "C" | |
#endif | |
void sys_init(void) { | |
/* Enable SysTick Module */ | |
SYSTICK_STCSR |= SYSTICK_STCSR_CLKSOURCE | SYSTICK_STCSR_ENABLE; | |
/* Set SysTick period 1msec */ | |
SYSTICK_STRVR = (3006600 / 1000) - 1; | |
/* Enable SysTick interrupt */ | |
SYSTICK_STCSR |= SYSTICK_STCSR_TICKINT; | |
} | |
#ifdef __cplusplus | |
extern "C" | |
#endif | |
void SysTickIsrHandler(void) { | |
tick_cnt_msec++; | |
} | |
void delay(const unsigned msecs) { | |
const unsigned start = tick_cnt_msec; | |
do { | |
__asm(" wfi"); | |
} while (tick_cnt_msec-start < msecs); | |
} | |
class auto_delay { | |
public: | |
auto_delay() { | |
::delay(5000); | |
} | |
void delay(void) { | |
::delay(125); | |
} | |
}; | |
auto_delay glob_delay; | |
int main(void) { | |
#if defined(USE_STACK) | |
uint8_t led_states[] = { | |
RED, BLACK, | |
GREEN, BLACK, | |
BLUE, BLACK, | |
BLUE, BLACK, | |
WHITE, BLACK | |
}; | |
#endif | |
unsigned indx = 0; | |
/* WDTCTL = WDTPW | WDTHOLD; Stop watchdog timer handled in resetISR() code */ | |
P2DIR |= WHITE; // set rgb pins as output | |
P2OUT = BLACK; | |
//__enable_interrupt(); | |
//SCB_SCR |= SCB_SCR_SLEEPONEXIT; // Enable sleep on exit from ISR | |
while (1) { | |
#if 1 | |
P2OUT = led_states[indx++]; | |
if (indx >= sizeof(led_states) / sizeof(led_states[0])) | |
indx = 0; | |
{ | |
//De delay_125; | |
glob_delay.delay(); | |
} | |
//delay(125); | |
#else | |
P2OUT ^= BIT0; | |
delay(250); | |
#endif | |
} | |
return 0; | |
} |
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