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Latency Comparison Numbers | |
-------------------------- | |
L1 cache reference/hit 1.5 ns 4 cycles | |
Floating-point add/mult/FMA operation 1.5 ns 4 cycles | |
L2 cache reference/hit 5 ns 12 ~ 17 cycles | |
Branch mispredict 6 ns 15 ~ 20 cycles | |
L3 cache hit (unshared cache line) 16 ns 42 cycles | |
L3 cache hit (shared line in another core) 25 ns 65 cycles | |
Mutex lock/unlock 25 ns | |
L3 cache hit (modified in another core) 29 ns 75 cycles |
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### Keybase proof | |
I hereby claim: | |
* I am rjvs on github. | |
* I am rjvs (https://keybase.io/rjvs) on keybase. | |
* I have a public key whose fingerprint is 44AC BEB8 84BC E84C EA66 4F24 00DC 0B0A 51C6 18E7 | |
To claim this, I am signing this object: |