How to write verilog in macOS? #VHDL #Verilog

How to write verilog in macOS?.md

Software to use:

1. terminal app - iverilog
2. macOS waveform app - GTKWave

iverilog can be download using homebrew. $ brew install icarus-verilog GTKWave can be downloaded here: http://gtkwave.sourceforge.net/

To See Waveform in macOS for VHDL

1. Use Terminal: $iverilog -o <fileName1.v> <fileName2.v> <fileName3.v> # you can add as many files as you want... $vvp

2. Drag and Drop the generated .vcd file into GTKWave

Note the name of the .vcd file need to defined in the circuit file like, detail see reference [1]:

 initial begin
    $dumpfile("mytest.vcd");
    $dumpvars;
    //your test values
    #100 A=1'b1; B=1'b1; C=1'b1; 
  end

Reference Blog: [1] http://easonchang.logdown.com/posts/649863 Half Adder + Full Adder Blog: [2] https://www.elprocus.com/half-adder-and-full-adder/ [3] http://www.circuitstoday.com/half-adder-and-full-adder VHDL Logical: [4] https://www.utdallas.edu/~akshay.sridharan/index_files/Page5212.htm