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.method private hidebysig instance bool
CheckPassword(string text) cil managed
{
// Code size 7959 (0x1f17)
.maxstack 7
.locals init (class [mscorlib_6]System.Exception[] V_0,
int32 V_1,
int32 V_2,
uint8[] V_3,
uint8* V_4,
int32 V_5,
int32[] V_6,
int8[] pinned V_7,
uint8* V_8,
class [mscorlib_6]System.Exception V_9,
int64[] V_10,
int32 V_11,
class [mscorlib_6]System.Type[] V_12,
int32[] V_13,
int32 V_14,
class [mscorlib_6]System.Exception V_15,
uint8* V_16,
valuetype [mscorlib_6]System.RuntimeTypeHandle[] V_17,
int32 V_18,
uint8 V_19,
int64[] pinned V_20,
int32 V_21,
int32 V_22,
int32 V_23,
int32[] V_24,
int8[] V_25,
int32 V_26,
int32 V_27,
int32 V_28,
int32 V_29,
int32 V_30,
object[] V_31,
uint8* V_32,
object[] V_33,
int32 V_34,
int32 V_35,
int32 V_36,
int32 V_37,
int32 V_38,
int32 V_39)
IL_0000: ldloca V_29
IL_0004: dup
IL_0005: ldc.i4 0x1
IL_000a: stind.i4
IL_000b: ldind.i1
IL_000c: stloc V_22
IL_0010: ldloc V_22
IL_0014: ldc.i4 0x4
IL_0019: mul
IL_001a: stloc V_30
IL_001e: ldloc V_22
IL_0022: ldc.i4 0x8
IL_0027: mul
IL_0028: stloc V_28
IL_002c: ldc.i4 0x3
IL_0031: newarr [mscorlib]System.Byte
IL_0036: stloc V_3
IL_003a: ldc.i4 0x3
IL_003f: newarr [mscorlib]System.Object
IL_0044: stloc V_33
IL_0048: ldc.i4 0x3
IL_004d: newarr [mscorlib]System.Int32
IL_0052: stloc V_24
IL_0056: ldc.i4 0x1
IL_005b: newarr [mscorlib]System.SByte
IL_0060: dup
IL_0061: stloc V_7
IL_0065: stloc V_25
IL_0069: ldc.i4 0x3
IL_006e: newarr [mscorlib]System.Int64
IL_0073: dup
IL_0074: stloc V_20
IL_0078: stloc V_10
IL_007c: ldc.i4 0x3
IL_0081: newarr [mscorlib]System.Object
IL_0086: stloc V_31
IL_008a: ldloc V_31
IL_008e: ldc.i4 0x0
IL_0093: ldarg text
IL_0097: stelem.ref
IL_0098: ldc.i4 0x1
IL_009d: newarr [mscorlib]System.Int32
IL_00a2: stloc V_6
IL_00a6: ldc.i4 0x1
IL_00ab: newarr [mscorlib]System.Int32
IL_00b0: stloc V_13
IL_00b4: ldc.i4 0x1
IL_00b9: newarr [mscorlib_6]System.Exception
IL_00be: stloc V_0
IL_00c2: ldsflda valuetype ScavengegetUIFamilyCodePage ScavengegetUIFamilyCodePage::getEnumNameSignHash
IL_00c7: stloc V_4
IL_00cb: ldloc V_4
IL_00cf: stloc V_16
IL_00d3: ldloc V_16
IL_00d7: stloc V_8
IL_00db: nop
IL_00dc: ldloc V_18
IL_00e0: ldc.i4 0x1
IL_00e5: beq IL_1f00
.try
{
IL_00ea: ldloc V_16
IL_00ee: stloc V_8
IL_00f2: ldloc V_16
IL_00f6: ldind.i1
IL_00f7: stloc V_19
IL_00fb: ldloc V_16
IL_00ff: ldc.i4 0x1
IL_0104: add
IL_0105: stloc V_16
IL_0109: ldloc V_19
IL_010d: ldc.i4 0x1
IL_0112: blt IL_0494
IL_0117: ldloc V_19
IL_011b: ldc.i4 0x17
IL_0120: bgt IL_0494
IL_0125: ldc.i4 0xc
IL_012a: ldloc V_19
IL_012e: blt IL_02ed
IL_0133: ldc.i4 0xc
IL_0138: ldloc V_19
IL_013c: bgt IL_0146
IL_0141: br IL_0b9c
IL_0146: ldc.i4 0x6
IL_014b: ldloc V_19
IL_014f: blt IL_022a
IL_0154: ldc.i4 0x6
IL_0159: ldloc V_19
IL_015d: bgt IL_0167
IL_0162: br IL_0985
IL_0167: ldc.i4 0x3
IL_016c: ldloc V_19
IL_0170: blt IL_01d9
IL_0175: ldc.i4 0x3
IL_017a: ldloc V_19
IL_017e: bgt IL_0188
IL_0183: br IL_08b2
IL_0188: ldc.i4 0x1
IL_018d: ldloc V_19
IL_0191: blt IL_01ae
IL_0196: ldc.i4 0x1
IL_019b: ldloc V_19
IL_019f: bgt IL_01a9
IL_01a4: br IL_085f
IL_01a9: br IL_0494
IL_01ae: ldc.i4 0x2
IL_01b3: ldloc V_19
IL_01b7: blt IL_01d4
IL_01bc: ldc.i4 0x2
IL_01c1: ldloc V_19
IL_01c5: bgt IL_01cf
IL_01ca: br IL_0865
IL_01cf: br IL_0494
IL_01d4: br IL_0494
IL_01d9: ldc.i4 0x4
IL_01de: ldloc V_19
IL_01e2: blt IL_01ff
IL_01e7: ldc.i4 0x4
IL_01ec: ldloc V_19
IL_01f0: bgt IL_01fa
IL_01f5: br IL_08f1
IL_01fa: br IL_0494
IL_01ff: ldc.i4 0x5
IL_0204: ldloc V_19
IL_0208: blt IL_0225
IL_020d: ldc.i4 0x5
IL_0212: ldloc V_19
IL_0216: bgt IL_0220
IL_021b: br IL_0938
IL_0220: br IL_0494
IL_0225: br IL_0494
IL_022a: ldc.i4 0x9
IL_022f: ldloc V_19
IL_0233: blt IL_029c
IL_0238: ldc.i4 0x9
IL_023d: ldloc V_19
IL_0241: bgt IL_024b
IL_0246: br IL_0ace
IL_024b: ldc.i4 0x7
IL_0250: ldloc V_19
IL_0254: blt IL_0271
IL_0259: ldc.i4 0x7
IL_025e: ldloc V_19
IL_0262: bgt IL_026c
IL_0267: br IL_09cc
IL_026c: br IL_0494
IL_0271: ldc.i4 0x8
IL_0276: ldloc V_19
IL_027a: blt IL_0297
IL_027f: ldc.i4 0x8
IL_0284: ldloc V_19
IL_0288: bgt IL_0292
IL_028d: br IL_0a4d
IL_0292: br IL_0494
IL_0297: br IL_0494
IL_029c: ldc.i4 0xa
IL_02a1: ldloc V_19
IL_02a5: blt IL_02c2
IL_02aa: ldc.i4 0xa
IL_02af: ldloc V_19
IL_02b3: bgt IL_02bd
IL_02b8: br IL_0b0d
IL_02bd: br IL_0494
IL_02c2: ldc.i4 0xb
IL_02c7: ldloc V_19
IL_02cb: blt IL_02e8
IL_02d0: ldc.i4 0xb
IL_02d5: ldloc V_19
IL_02d9: bgt IL_02e3
IL_02de: br IL_0b54
IL_02e3: br IL_0494
IL_02e8: br IL_0494
IL_02ed: ldc.i4 0x12
IL_02f2: ldloc V_19
IL_02f6: blt IL_03d1
IL_02fb: ldc.i4 0x12
IL_0300: ldloc V_19
IL_0304: bgt IL_030e
IL_0309: br IL_1196
IL_030e: ldc.i4 0xf
IL_0313: ldloc V_19
IL_0317: blt IL_0380
IL_031c: ldc.i4 0xf
IL_0321: ldloc V_19
IL_0325: bgt IL_032f
IL_032a: br IL_0cf0
IL_032f: ldc.i4 0xd
IL_0334: ldloc V_19
IL_0338: blt IL_0355
IL_033d: ldc.i4 0xd
IL_0342: ldloc V_19
IL_0346: bgt IL_0350
IL_034b: br IL_0c07
IL_0350: br IL_0494
IL_0355: ldc.i4 0xe
IL_035a: ldloc V_19
IL_035e: blt IL_037b
IL_0363: ldc.i4 0xe
IL_0368: ldloc V_19
IL_036c: bgt IL_0376
IL_0371: br IL_0c88
IL_0376: br IL_0494
IL_037b: br IL_0494
IL_0380: ldc.i4 0x10
IL_0385: ldloc V_19
IL_0389: blt IL_03a6
IL_038e: ldc.i4 0x10
IL_0393: ldloc V_19
IL_0397: bgt IL_03a1
IL_039c: br IL_0d08
IL_03a1: br IL_0494
IL_03a6: ldc.i4 0x11
IL_03ab: ldloc V_19
IL_03af: blt IL_03cc
IL_03b4: ldc.i4 0x11
IL_03b9: ldloc V_19
IL_03bd: bgt IL_03c7
IL_03c2: br IL_0d52
IL_03c7: br IL_0494
IL_03cc: br IL_0494
IL_03d1: ldc.i4 0x15
IL_03d6: ldloc V_19
IL_03da: blt IL_0443
IL_03df: ldc.i4 0x15
IL_03e4: ldloc V_19
IL_03e8: bgt IL_03f2
IL_03ed: br IL_1a0f
IL_03f2: ldc.i4 0x13
IL_03f7: ldloc V_19
IL_03fb: blt IL_0418
IL_0400: ldc.i4 0x13
IL_0405: ldloc V_19
IL_0409: bgt IL_0413
IL_040e: br IL_11f1
IL_0413: br IL_0494
IL_0418: ldc.i4 0x14
IL_041d: ldloc V_19
IL_0421: blt IL_043e
IL_0426: ldc.i4 0x14
IL_042b: ldloc V_19
IL_042f: bgt IL_0439
IL_0434: br IL_123b
IL_0439: br IL_0494
IL_043e: br IL_0494
IL_0443: ldc.i4 0x16
IL_0448: ldloc V_19
IL_044c: blt IL_0469
IL_0451: ldc.i4 0x16
IL_0456: ldloc V_19
IL_045a: bgt IL_0464
IL_045f: br IL_1a6b
IL_0464: br IL_0494
IL_0469: ldc.i4 0x17
IL_046e: ldloc V_19
IL_0472: blt IL_048f
IL_0477: ldc.i4 0x17
IL_047c: ldloc V_19
IL_0480: bgt IL_048a
IL_0485: br IL_0495
IL_048a: br IL_0494
IL_048f: br IL_0494
IL_0494: nop
IL_0495: ldloc V_1
IL_0499: ldc.i4 0x1
IL_049e: sub
IL_049f: stloc V_1
IL_04a3: ldloc V_13
IL_04a7: ldloc V_1
IL_04ab: ldelem.i4
IL_04ac: stloc V_14
IL_04b0: ldloc V_0
IL_04b4: ldloc V_1
IL_04b8: ldelem.ref
IL_04b9: stloc V_15
IL_04bd: ldloc V_10
IL_04c1: ldloc V_21
IL_04c5: ldc.i4 0x1
IL_04ca: sub
IL_04cb: ldelema [mscorlib]System.Int64
IL_04d0: conv.u
IL_04d1: ldind.i4
IL_04d2: brfalse IL_0579
IL_04d7: ldloc V_4
IL_04db: ldloc V_14
IL_04df: add
IL_04e0: ldc.i4 0x18
IL_04e5: add
IL_04e6: ldloc V_30
IL_04ea: add
IL_04eb: ldind.i4
IL_04ec: stloc V_27
IL_04f0: ldc.i4 0x1
IL_04f5: stloc V_21
IL_04f9: ldloc V_3
IL_04fd: ldloc V_21
IL_0501: ldc.i4 0x1
IL_0506: sub
IL_0507: ldc.i4 0x5
IL_050c: stelem.i1
IL_050d: ldloc V_33
IL_0511: ldloc V_21
IL_0515: ldc.i4 0x1
IL_051a: sub
IL_051b: ldloc V_15
IL_051f: stelem.ref
IL_0520: ldloc V_4
IL_0524: ldloc V_4
IL_0528: ldloc V_14
IL_052c: add
IL_052d: ldc.i4 0x18
IL_0532: add
IL_0533: ldloc V_30
IL_0537: add
IL_0538: ldind.i4
IL_0539: add
IL_053a: stloc V_16
IL_053e: ldloc V_0
IL_0542: ldloc V_1
IL_0546: ldloc V_15
IL_054a: stelem.ref
IL_054b: ldloc V_13
IL_054f: ldloc V_1
IL_0553: ldloc V_14
IL_0557: stelem.i4
IL_0558: ldloc V_6
IL_055c: ldloc V_1
IL_0560: ldc.i4 0x2
IL_0565: stelem.i4
IL_0566: ldloc V_1
IL_056a: ldc.i4 0x1
IL_056f: add
IL_0570: stloc V_1
IL_0574: br IL_0859
IL_0579: nop
IL_057a: ldloc V_4
IL_057e: ldloc V_14
IL_0582: add
IL_0583: ldc.i4 0x28
IL_0588: add
IL_0589: ldloc V_30
IL_058d: add
IL_058e: ldind.i4
IL_058f: stloc V_37
IL_0593: ldloc V_37
IL_0597: stloc V_27
IL_059b: nop
IL_059c: ldloc V_27
IL_05a0: ldc.i4 0xffffffff
IL_05a5: beq IL_0849
IL_05aa: ldloc V_4
IL_05ae: ldloc V_27
IL_05b2: add
IL_05b3: ldc.i4 0x8
IL_05b8: add
IL_05b9: ldloc V_30
IL_05bd: add
IL_05be: ldind.i4
IL_05bf: ldc.i4 0x0
IL_05c4: bne.un IL_0652
IL_05c9: ldloc V_4
IL_05cd: ldloc V_27
IL_05d1: add
IL_05d2: ldc.i4 0x10
IL_05d7: add
IL_05d8: ldloc V_30
IL_05dc: add
IL_05dd: ldind.i4
IL_05de: stloc V_26
IL_05e2: ldloc V_26
IL_05e6: ldc.i4 0xffffffff
IL_05eb: beq IL_0652
IL_05f0: ldloc V_12
IL_05f4: ldloc V_26
IL_05f8: ldelem.ref
IL_05f9: dup
IL_05fa: ldnull
IL_05fb: bne.un IL_0625
IL_0600: pop
IL_0601: ldloc V_12
IL_0605: ldloc V_26
IL_0609: ldloc V_17
IL_060d: ldloc V_26
IL_0611: ldelem [mscorlib_6]System.RuntimeTypeHandle
IL_0616: call class [mscorlib_6]System.Type [mscorlib_6]System.Type::GetTypeFromHandle(valuetype [mscorlib_6]System.RuntimeTypeHandle)
IL_061b: stelem.ref
IL_061c: ldloc V_12
IL_0620: ldloc V_26
IL_0624: ldelem.ref
IL_0625: nop
IL_0626: ldloc V_15
IL_062a: call instance bool [mscorlib_6]System.Type::IsInstanceOfType(object)
IL_062f: brtrue IL_0652
IL_0634: ldloc V_4
IL_0638: ldloc V_27
IL_063c: add
IL_063d: ldc.i4 0x28
IL_0642: add
IL_0643: ldloc V_30
IL_0647: add
IL_0648: ldind.i4
IL_0649: stloc V_27
IL_064d: br IL_059b
IL_0652: nop
IL_0653: ldloc V_4
IL_0657: ldloc V_27
IL_065b: add
IL_065c: ldc.i4 0x8
IL_0661: add
IL_0662: ldloc V_30
IL_0666: add
IL_0667: ldind.i4
IL_0668: stloc V_35
IL_066c: ldloc V_35
IL_0670: ldc.i4 0x1
IL_0675: beq IL_072a
IL_067a: ldloc V_35
IL_067e: ldc.i4 0x2
IL_0683: beq IL_07cd
IL_0688: ldloc V_4
IL_068c: ldloc V_27
IL_0690: add
IL_0691: ldc.i4 0x18
IL_0696: add
IL_0697: ldloc V_30
IL_069b: add
IL_069c: ldind.i4
IL_069d: stloc V_2
IL_06a1: ldc.i4 0x1
IL_06a6: stloc V_21
IL_06aa: ldloc V_3
IL_06ae: ldloc V_21
IL_06b2: ldc.i4 0x1
IL_06b7: sub
IL_06b8: ldc.i4 0x5
IL_06bd: stelem.i1
IL_06be: ldloc V_33
IL_06c2: ldloc V_21
IL_06c6: ldc.i4 0x1
IL_06cb: sub
IL_06cc: ldloc V_15
IL_06d0: stelem.ref
IL_06d1: ldloc V_4
IL_06d5: ldloc V_4
IL_06d9: ldloc V_27
IL_06dd: add
IL_06de: ldc.i4 0x18
IL_06e3: add
IL_06e4: ldloc V_30
IL_06e8: add
IL_06e9: ldind.i4
IL_06ea: add
IL_06eb: stloc V_16
IL_06ef: ldloc V_0
IL_06f3: ldloc V_1
IL_06f7: ldloc V_15
IL_06fb: stelem.ref
IL_06fc: ldloc V_13
IL_0700: ldloc V_1
IL_0704: ldloc V_27
IL_0708: stelem.i4
IL_0709: ldloc V_6
IL_070d: ldloc V_1
IL_0711: ldc.i4 0x2
IL_0716: stelem.i4
IL_0717: ldloc V_1
IL_071b: ldc.i4 0x1
IL_0720: add
IL_0721: stloc V_1
IL_0725: br IL_0858
IL_072a: nop
IL_072b: ldloc V_4
IL_072f: ldloc V_27
IL_0733: add
IL_0734: ldc.i4 0x20
IL_0739: add
IL_073a: ldloc V_30
IL_073e: add
IL_073f: ldind.i4
IL_0740: stloc V_2
IL_0744: ldc.i4 0x1
IL_0749: stloc V_21
IL_074d: ldloc V_3
IL_0751: ldloc V_21
IL_0755: ldc.i4 0x1
IL_075a: sub
IL_075b: ldc.i4 0x5
IL_0760: stelem.i1
IL_0761: ldloc V_33
IL_0765: ldloc V_21
IL_0769: ldc.i4 0x1
IL_076e: sub
IL_076f: ldloc V_15
IL_0773: stelem.ref
IL_0774: ldloc V_4
IL_0778: ldloc V_4
IL_077c: ldloc V_27
IL_0780: add
IL_0781: ldc.i4 0x20
IL_0786: add
IL_0787: ldloc V_30
IL_078b: add
IL_078c: ldind.i4
IL_078d: add
IL_078e: stloc V_16
IL_0792: ldloc V_0
IL_0796: ldloc V_1
IL_079a: ldloc V_15
IL_079e: stelem.ref
IL_079f: ldloc V_13
IL_07a3: ldloc V_1
IL_07a7: ldloc V_27
IL_07ab: stelem.i4
IL_07ac: ldloc V_6
IL_07b0: ldloc V_1
IL_07b4: ldc.i4 0x1
IL_07b9: stelem.i4
IL_07ba: ldloc V_1
IL_07be: ldc.i4 0x1
IL_07c3: add
IL_07c4: stloc V_1
IL_07c8: br IL_0858
IL_07cd: nop
IL_07ce: ldloc V_4
IL_07d2: ldloc V_27
IL_07d6: add
IL_07d7: ldc.i4 0x18
IL_07dc: add
IL_07dd: ldloc V_30
IL_07e1: add
IL_07e2: ldind.i4
IL_07e3: stloc V_2
IL_07e7: ldc.i4 0x0
IL_07ec: stloc V_21
IL_07f0: ldloc V_4
IL_07f4: ldloc V_4
IL_07f8: ldloc V_27
IL_07fc: add
IL_07fd: ldc.i4 0x18
IL_0802: add
IL_0803: ldloc V_30
IL_0807: add
IL_0808: ldind.i4
IL_0809: add
IL_080a: stloc V_16
IL_080e: ldloc V_0
IL_0812: ldloc V_1
IL_0816: ldloc V_15
IL_081a: stelem.ref
IL_081b: ldloc V_13
IL_081f: ldloc V_1
IL_0823: ldloc V_27
IL_0827: stelem.i4
IL_0828: ldloc V_6
IL_082c: ldloc V_1
IL_0830: ldc.i4 0x0
IL_0835: stelem.i4
IL_0836: ldloc V_1
IL_083a: ldc.i4 0x1
IL_083f: add
IL_0840: stloc V_1
IL_0844: br IL_0858
IL_0849: nop
IL_084a: ldc.i4 0x1
IL_084f: stloc V_23
IL_0853: ldloc V_15
IL_0857: throw
IL_0858: nop
IL_0859: nop
IL_085a: leave IL_00dc
IL_085f: nop
IL_0860: leave IL_00dc
IL_0865: ldloc V_3
IL_0869: ldloc V_21
IL_086d: ldc.i4 0x5
IL_0872: stelem.i1
IL_0873: ldloc V_33
IL_0877: ldloc V_21
IL_087b: ldsfld native int[] XamarinObfuscationTest.MainActivity::FrameSecurityDescriptorWithResolverRSAPKCSSHASignatureDescription
IL_0880: ldloc V_16
IL_0884: ldloc V_30
IL_0888: add
IL_0889: ldind.i4
IL_088a: ldelem.i
IL_088b: calli class [mscorlib]System.Security.Cryptography.SHA256()
IL_0890: stelem.ref
IL_0891: ldloc V_21
IL_0895: ldc.i4 0x1
IL_089a: add
IL_089b: stloc V_21
IL_089f: ldloc V_16
IL_08a3: ldc.i4 0x8
IL_08a8: add
IL_08a9: stloc V_16
IL_08ad: leave IL_00dc
IL_08b2: ldloc V_31
IL_08b6: ldloc V_16
IL_08ba: ldloc V_30
IL_08be: add
IL_08bf: ldind.i4
IL_08c0: ldloc V_33
IL_08c4: ldloc V_21
IL_08c8: ldc.i4 0x1
IL_08cd: sub
IL_08ce: ldelem.ref
IL_08cf: stelem.ref
IL_08d0: ldloc V_16
IL_08d4: ldc.i4 0x8
IL_08d9: add
IL_08da: stloc V_16
IL_08de: ldloc V_21
IL_08e2: ldc.i4 0x1
IL_08e7: sub
IL_08e8: stloc V_21
IL_08ec: leave IL_00dc
IL_08f1: ldloc V_3
IL_08f5: ldloc V_21
IL_08f9: ldc.i4 0x5
IL_08fe: stelem.i1
IL_08ff: ldloc V_33
IL_0903: ldloc V_21
IL_0907: ldloc V_31
IL_090b: ldloc V_16
IL_090f: ldloc V_30
IL_0913: add
IL_0914: ldind.i4
IL_0915: ldelem.ref
IL_0916: stelem.ref
IL_0917: ldloc V_21
IL_091b: ldc.i4 0x1
IL_0920: add
IL_0921: stloc V_21
IL_0925: ldloc V_16
IL_0929: ldc.i4 0x8
IL_092e: add
IL_092f: stloc V_16
IL_0933: leave IL_00dc
IL_0938: ldloc V_3
IL_093c: ldloc V_21
IL_0940: ldc.i4 0x5
IL_0945: stelem.i1
IL_0946: ldloc V_33
IL_094a: ldloc V_21
IL_094e: ldsfld native int[] XamarinObfuscationTest.MainActivity::FrameSecurityDescriptorWithResolverRSAPKCSSHASignatureDescription
IL_0953: ldloc V_16
IL_0957: ldloc V_30
IL_095b: add
IL_095c: ldind.i4
IL_095d: ldelem.i
IL_095e: calli class [mscorlib]System.Text.Encoding()
IL_0963: stelem.ref
IL_0964: ldloc V_21
IL_0968: ldc.i4 0x1
IL_096d: add
IL_096e: stloc V_21
IL_0972: ldloc V_16
IL_0976: ldc.i4 0x8
IL_097b: add
IL_097c: stloc V_16
IL_0980: leave IL_00dc
IL_0985: ldloc V_33
IL_0989: ldloc V_21
IL_098d: ldloc V_31
IL_0991: ldloc V_16
IL_0995: ldloc V_30
IL_0999: add
IL_099a: ldind.i4
IL_099b: ldelem.ref
IL_099c: stelem.ref
IL_099d: ldloc V_3
IL_09a1: ldloc V_21
IL_09a5: ldc.i4 0x5
IL_09aa: stelem.i1
IL_09ab: ldloc V_21
IL_09af: ldc.i4 0x1
IL_09b4: add
IL_09b5: stloc V_21
IL_09b9: ldloc V_16
IL_09bd: ldc.i4 0x8
IL_09c2: add
IL_09c3: stloc V_16
IL_09c7: leave IL_00dc
IL_09cc: ldloc V_3
IL_09d0: ldloc V_21
IL_09d4: ldc.i4 0x2
IL_09d9: sub
IL_09da: ldc.i4 0x5
IL_09df: stelem.i1
IL_09e0: ldloc V_33
IL_09e4: ldloc V_21
IL_09e8: ldc.i4 0x2
IL_09ed: sub
IL_09ee: ldloc V_33
IL_09f2: ldloc V_21
IL_09f6: ldc.i4 0x2
IL_09fb: sub
IL_09fc: ldelem.ref
IL_09fd: castclass [mscorlib]System.Text.Encoding
IL_0a02: ldloc V_33
IL_0a06: ldloc V_21
IL_0a0a: ldc.i4 0x1
IL_0a0f: sub
IL_0a10: ldelem.ref
IL_0a11: castclass [mscorlib]System.String
IL_0a16: ldsfld native int[] XamarinObfuscationTest.MainActivity::FrameSecurityDescriptorWithResolverRSAPKCSSHASignatureDescription
IL_0a1b: ldloc V_16
IL_0a1f: ldloc V_30
IL_0a23: add
IL_0a24: ldind.i4
IL_0a25: ldelem.i
IL_0a26: calli uint8[](class [mscorlib]System.Text.Encoding,string)
IL_0a2b: stelem.ref
IL_0a2c: ldloc V_21
IL_0a30: ldc.i4 0x1
IL_0a35: sub
IL_0a36: stloc V_21
IL_0a3a: ldloc V_16
IL_0a3e: ldc.i4 0x8
IL_0a43: add
IL_0a44: stloc V_16
IL_0a48: leave IL_00dc
IL_0a4d: ldloc V_3
IL_0a51: ldloc V_21
IL_0a55: ldc.i4 0x2
IL_0a5a: sub
IL_0a5b: ldc.i4 0x5
IL_0a60: stelem.i1
IL_0a61: ldloc V_33
IL_0a65: ldloc V_21
IL_0a69: ldc.i4 0x2
IL_0a6e: sub
IL_0a6f: ldloc V_33
IL_0a73: ldloc V_21
IL_0a77: ldc.i4 0x2
IL_0a7c: sub
IL_0a7d: ldelem.ref
IL_0a7e: castclass [mscorlib]System.Security.Cryptography.SHA256
IL_0a83: ldloc V_33
IL_0a87: ldloc V_21
IL_0a8b: ldc.i4 0x1
IL_0a90: sub
IL_0a91: ldelem.ref
IL_0a92: castclass uint8[]
IL_0a97: ldsfld native int[] XamarinObfuscationTest.MainActivity::FrameSecurityDescriptorWithResolverRSAPKCSSHASignatureDescription
IL_0a9c: ldloc V_16
IL_0aa0: ldloc V_30
IL_0aa4: add
IL_0aa5: ldind.i4
IL_0aa6: ldelem.i
IL_0aa7: calli uint8[](class [mscorlib]System.Security.Cryptography.HashAlgorithm,uint8[])
IL_0aac: stelem.ref
IL_0aad: ldloc V_21
IL_0ab1: ldc.i4 0x1
IL_0ab6: sub
IL_0ab7: stloc V_21
IL_0abb: ldloc V_16
IL_0abf: ldc.i4 0x8
IL_0ac4: add
IL_0ac5: stloc V_16
IL_0ac9: leave IL_00dc
IL_0ace: ldloc V_31
IL_0ad2: ldloc V_16
IL_0ad6: ldloc V_30
IL_0ada: add
IL_0adb: ldind.i4
IL_0adc: ldloc V_33
IL_0ae0: ldloc V_21
IL_0ae4: ldc.i4 0x1
IL_0ae9: sub
IL_0aea: ldelem.ref
IL_0aeb: stelem.ref
IL_0aec: ldloc V_16
IL_0af0: ldc.i4 0x8
IL_0af5: add
IL_0af6: stloc V_16
IL_0afa: ldloc V_21
IL_0afe: ldc.i4 0x1
IL_0b03: sub
IL_0b04: stloc V_21
IL_0b08: leave IL_00dc
IL_0b0d: ldloc V_3
IL_0b11: ldloc V_21
IL_0b15: ldc.i4 0x5
IL_0b1a: stelem.i1
IL_0b1b: ldloc V_33
IL_0b1f: ldloc V_21
IL_0b23: ldloc V_31
IL_0b27: ldloc V_16
IL_0b2b: ldloc V_30
IL_0b2f: add
IL_0b30: ldind.i4
IL_0b31: ldelem.ref
IL_0b32: stelem.ref
IL_0b33: ldloc V_21
IL_0b37: ldc.i4 0x1
IL_0b3c: add
IL_0b3d: stloc V_21
IL_0b41: ldloc V_16
IL_0b45: ldc.i4 0x8
IL_0b4a: add
IL_0b4b: stloc V_16
IL_0b4f: leave IL_00dc
IL_0b54: ldloc V_10
IL_0b58: ldloc V_21
IL_0b5c: ldelema [mscorlib]System.Int64
IL_0b61: conv.u
IL_0b62: ldloc V_16
IL_0b66: ldloc V_30
IL_0b6a: add
IL_0b6b: ldind.i4
IL_0b6c: stind.i4
IL_0b6d: ldloc V_3
IL_0b71: ldloc V_21
IL_0b75: ldc.i4 0x0
IL_0b7a: stelem.i1
IL_0b7b: ldloc V_21
IL_0b7f: ldc.i4 0x1
IL_0b84: add
IL_0b85: stloc V_21
IL_0b89: ldloc V_16
IL_0b8d: ldc.i4 0x8
IL_0b92: add
IL_0b93: stloc V_16
IL_0b97: leave IL_00dc
IL_0b9c: ldloc V_10
IL_0ba0: ldloc V_21
IL_0ba4: ldc.i4 0x2
IL_0ba9: sub
IL_0baa: ldelema [mscorlib]System.Int64
IL_0baf: conv.u
IL_0bb0: ldloc V_33
IL_0bb4: ldloc V_21
IL_0bb8: ldc.i4 0x2
IL_0bbd: sub
IL_0bbe: ldelem.ref
IL_0bbf: castclass uint8[]
IL_0bc4: castclass uint8[]
IL_0bc9: ldloc V_10
IL_0bcd: ldloc V_21
IL_0bd1: ldc.i4 0x1
IL_0bd6: sub
IL_0bd7: ldelema [mscorlib]System.Int64
IL_0bdc: conv.u
IL_0bdd: ldind.i4
IL_0bde: ldelem.u1
IL_0bdf: stind.i4
IL_0be0: ldloc V_3
IL_0be4: ldloc V_21
IL_0be8: ldc.i4 0x2
IL_0bed: sub
IL_0bee: ldc.i4 0x0
IL_0bf3: stelem.i1
IL_0bf4: ldloc V_21
IL_0bf8: ldc.i4 0x1
IL_0bfd: sub
IL_0bfe: stloc V_21
IL_0c02: leave IL_00dc
IL_0c07: ldloc V_10
IL_0c0b: ldloc V_21
IL_0c0f: ldc.i4 0x2
IL_0c14: sub
IL_0c15: ldelema [mscorlib]System.Int64
IL_0c1a: conv.u
IL_0c1b: ldind.i4
IL_0c1c: ldloc V_10
IL_0c20: ldloc V_21
IL_0c24: ldc.i4 0x1
IL_0c29: sub
IL_0c2a: ldelema [mscorlib]System.Int64
IL_0c2f: conv.u
IL_0c30: ldind.i4
IL_0c31: ceq
IL_0c33: ldc.i4 0xffffffff
IL_0c38: add
IL_0c39: ldc.i4 0xffffffff
IL_0c3e: mul
IL_0c3f: ldloc V_16
IL_0c43: ldloc V_30
IL_0c47: add
IL_0c48: ldind.i4
IL_0c49: ldloc V_16
IL_0c4d: ldc.i4 0x8
IL_0c52: add
IL_0c53: ldloc V_30
IL_0c57: add
IL_0c58: ldind.i4
IL_0c59: sub
IL_0c5a: mul
IL_0c5b: ldloc V_16
IL_0c5f: ldc.i4 0x8
IL_0c64: add
IL_0c65: ldloc V_30
IL_0c69: add
IL_0c6a: ldind.i4
IL_0c6b: add
IL_0c6c: ldloc V_4
IL_0c70: add
IL_0c71: stloc V_16
IL_0c75: ldloc V_21
IL_0c79: ldc.i4 0x2
IL_0c7e: sub
IL_0c7f: stloc V_21
IL_0c83: leave IL_00dc
IL_0c88: ldloc V_10
IL_0c8c: ldloc V_21
IL_0c90: ldc.i4 0x2
IL_0c95: sub
IL_0c96: ldelema [mscorlib]System.Int64
IL_0c9b: conv.u
IL_0c9c: ldloc V_10
IL_0ca0: ldloc V_21
IL_0ca4: ldc.i4 0x2
IL_0ca9: sub
IL_0caa: ldelema [mscorlib]System.Int64
IL_0caf: conv.u
IL_0cb0: ldind.i4
IL_0cb1: ldloc V_10
IL_0cb5: ldloc V_21
IL_0cb9: ldc.i4 0x1
IL_0cbe: sub
IL_0cbf: ldelema [mscorlib]System.Int64
IL_0cc4: conv.u
IL_0cc5: ldind.i4
IL_0cc6: ceq
IL_0cc8: stind.i4
IL_0cc9: ldloc V_3
IL_0ccd: ldloc V_21
IL_0cd1: ldc.i4 0x2
IL_0cd6: sub
IL_0cd7: ldc.i4 0x0
IL_0cdc: stelem.i1
IL_0cdd: ldloc V_21
IL_0ce1: ldc.i4 0x1
IL_0ce6: sub
IL_0ce7: stloc V_21
IL_0ceb: leave IL_00dc
IL_0cf0: ldloc V_4
IL_0cf4: ldloc V_16
IL_0cf8: ldloc V_30
IL_0cfc: add
IL_0cfd: ldind.i4
IL_0cfe: add
IL_0cff: stloc V_16
IL_0d03: leave IL_00dc
IL_0d08: ldloc V_25
IL_0d0c: ldloc V_16
IL_0d10: ldloc V_30
IL_0d14: add
IL_0d15: ldind.i4
IL_0d16: ldelema [mscorlib]System.SByte
IL_0d1b: ldloc V_10
IL_0d1f: ldloc V_21
IL_0d23: ldc.i4 0x1
IL_0d28: sub
IL_0d29: ldelema [mscorlib]System.Int64
IL_0d2e: conv.u
IL_0d2f: ldind.i4
IL_0d30: stind.i1
IL_0d31: ldloc V_16
IL_0d35: ldc.i4 0x8
IL_0d3a: add
IL_0d3b: stloc V_16
IL_0d3f: ldloc V_21
IL_0d43: ldc.i4 0x1
IL_0d48: sub
IL_0d49: stloc V_21
IL_0d4d: leave IL_00dc
IL_0d52: ldc.i4 0x0
IL_0d57: stloc V_21
IL_0d5b: ldloc V_4
IL_0d5f: ldloc V_16
IL_0d63: ldloc V_30
IL_0d67: add
IL_0d68: ldind.i4
IL_0d69: add
IL_0d6a: stloc V_32
IL_0d6e: ldloc V_8
IL_0d72: ldloc V_4
IL_0d76: sub
IL_0d77: stloc V_35
IL_0d7b: ldc.i4 0x0
IL_0d80: stloc V_27
IL_0d84: ldc.i4 0x2
IL_0d89: stloc V_2
IL_0d8d: ldloc V_27
IL_0d91: ldloc V_2
IL_0d95: add
IL_0d96: ldc.i4 0x2
IL_0d9b: div
IL_0d9c: stloc V_5
IL_0da0: ldloc V_4
IL_0da4: ldc.i4 0x691
IL_0da9: add
IL_0daa: ldloc V_5
IL_0dae: ldc.i4 0x18
IL_0db3: mul
IL_0db4: add
IL_0db5: ldloc V_30
IL_0db9: add
IL_0dba: ldind.i4
IL_0dbb: stloc V_34
IL_0dbf: ldloc V_4
IL_0dc3: ldc.i4 0x691
IL_0dc8: add
IL_0dc9: ldloc V_5
IL_0dcd: ldc.i4 0x18
IL_0dd2: mul
IL_0dd3: add
IL_0dd4: ldc.i4 0x8
IL_0dd9: add
IL_0dda: ldloc V_30
IL_0dde: add
IL_0ddf: ldind.i4
IL_0de0: stloc V_11
IL_0de4: ldloc V_35
IL_0de8: ldloc V_34
IL_0dec: ldloc V_11
IL_0df0: add
IL_0df1: bge IL_0e0c
IL_0df6: ldloc V_34
IL_0dfa: ldloc V_35
IL_0dfe: bgt IL_0e1f
IL_0e03: ldloc V_5
IL_0e07: br IL_0e32
IL_0e0c: ldloc V_5
IL_0e10: ldc.i4 0x1
IL_0e15: add
IL_0e16: stloc V_27
IL_0e1a: br IL_0d8d
IL_0e1f: ldloc V_5
IL_0e23: ldc.i4 0x1
IL_0e28: sub
IL_0e29: stloc V_2
IL_0e2d: br IL_0d8d
IL_0e32: nop
IL_0e33: stloc V_14
IL_0e37: ldloc V_4
IL_0e3b: ldc.i4 0x691
IL_0e40: add
IL_0e41: ldloc V_14
IL_0e45: ldc.i4 0x18
IL_0e4a: mul
IL_0e4b: add
IL_0e4c: ldc.i4 0x10
IL_0e51: add
IL_0e52: ldloc V_30
IL_0e56: add
IL_0e57: ldind.i4
IL_0e58: stloc V_26
IL_0e5c: ldloc V_26
IL_0e60: stloc V_37
IL_0e64: ldc.i4 0xffffffff
IL_0e69: ldloc V_32
IL_0e6d: beq IL_1190
IL_0e72: ldloc V_8
IL_0e76: ldloc V_32
IL_0e7a: beq IL_117e
IL_0e7f: ldloc V_32
IL_0e83: ldloc V_4
IL_0e87: sub
IL_0e88: stloc V_26
IL_0e8c: nop
IL_0e8d: ldloc V_1
IL_0e91: ldc.i4 0x0
IL_0e96: beq IL_0fb2
IL_0e9b: ldloc V_1
IL_0e9f: ldc.i4 0x1
IL_0ea4: sub
IL_0ea5: stloc V_1
IL_0ea9: ldloc V_26
IL_0ead: stloc V_34
IL_0eb1: ldc.i4 0x0
IL_0eb6: stloc V_5
IL_0eba: ldc.i4 0x2
IL_0ebf: stloc V_2
IL_0ec3: ldloc V_5
IL_0ec7: ldloc V_2
IL_0ecb: add
IL_0ecc: ldc.i4 0x2
IL_0ed1: div
IL_0ed2: stloc V_27
IL_0ed6: ldloc V_4
IL_0eda: ldc.i4 0x6d9
IL_0edf: add
IL_0ee0: ldloc V_27
IL_0ee4: ldc.i4 0x18
IL_0ee9: mul
IL_0eea: add
IL_0eeb: ldloc V_30
IL_0eef: add
IL_0ef0: ldind.i4
IL_0ef1: stloc V_35
IL_0ef5: ldloc V_4
IL_0ef9: ldc.i4 0x6d9
IL_0efe: add
IL_0eff: ldloc V_27
IL_0f03: ldc.i4 0x18
IL_0f08: mul
IL_0f09: add
IL_0f0a: ldc.i4 0x8
IL_0f0f: add
IL_0f10: ldloc V_30
IL_0f14: add
IL_0f15: ldind.i4
IL_0f16: stloc V_39
IL_0f1a: ldloc V_34
IL_0f1e: ldloc V_35
IL_0f22: ldloc V_39
IL_0f26: add
IL_0f27: bge IL_0f42
IL_0f2c: ldloc V_35
IL_0f30: ldloc V_34
IL_0f34: bgt IL_0f55
IL_0f39: ldloc V_27
IL_0f3d: br IL_0f68
IL_0f42: ldloc V_27
IL_0f46: ldc.i4 0x1
IL_0f4b: add
IL_0f4c: stloc V_5
IL_0f50: br IL_0ec3
IL_0f55: ldloc V_27
IL_0f59: ldc.i4 0x1
IL_0f5e: sub
IL_0f5f: stloc V_2
IL_0f63: br IL_0ec3
IL_0f68: nop
IL_0f69: stloc V_38
IL_0f6d: ldloc V_4
IL_0f71: ldc.i4 0x6d9
IL_0f76: add
IL_0f77: ldloc V_38
IL_0f7b: ldc.i4 0x18
IL_0f80: mul
IL_0f81: add
IL_0f82: ldc.i4 0x10
IL_0f87: add
IL_0f88: ldloc V_30
IL_0f8c: add
IL_0f8d: ldind.i4
IL_0f8e: stloc V_11
IL_0f92: ldloc V_11
IL_0f96: ldloc V_13
IL_0f9a: ldloc V_1
IL_0f9e: ldelem.i4
IL_0f9f: bne.un IL_0e8c
IL_0fa4: ldloc V_1
IL_0fa8: ldc.i4 0x1
IL_0fad: add
IL_0fae: stloc V_1
IL_0fb2: nop
IL_0fb3: ldloc V_37
IL_0fb7: stloc V_14
IL_0fbb: nop
IL_0fbc: ldloc V_14
IL_0fc0: ldc.i4 0xffffffff
IL_0fc5: beq IL_117e
IL_0fca: nop
IL_0fcb: ldloc V_26
IL_0fcf: stloc V_36
IL_0fd3: ldc.i4 0x0
IL_0fd8: stloc V_39
IL_0fdc: ldc.i4 0x2
IL_0fe1: stloc V_35
IL_0fe5: ldloc V_39
IL_0fe9: ldloc V_35
IL_0fed: add
IL_0fee: ldc.i4 0x2
IL_0ff3: div
IL_0ff4: stloc V_27
IL_0ff8: ldloc V_4
IL_0ffc: ldc.i4 0x691
IL_1001: add
IL_1002: ldloc V_27
IL_1006: ldc.i4 0x18
IL_100b: mul
IL_100c: add
IL_100d: ldloc V_30
IL_1011: add
IL_1012: ldind.i4
IL_1013: stloc V_2
IL_1017: ldloc V_4
IL_101b: ldc.i4 0x691
IL_1020: add
IL_1021: ldloc V_27
IL_1025: ldc.i4 0x18
IL_102a: mul
IL_102b: add
IL_102c: ldc.i4 0x8
IL_1031: add
IL_1032: ldloc V_30
IL_1036: add
IL_1037: ldind.i4
IL_1038: stloc V_5
IL_103c: ldloc V_36
IL_1040: ldloc V_2
IL_1044: ldloc V_5
IL_1048: add
IL_1049: bge IL_1064
IL_104e: ldloc V_2
IL_1052: ldloc V_36
IL_1056: bgt IL_1077
IL_105b: ldloc V_27
IL_105f: br IL_108a
IL_1064: ldloc V_27
IL_1068: ldc.i4 0x1
IL_106d: add
IL_106e: stloc V_39
IL_1072: br IL_0fe5
IL_1077: ldloc V_27
IL_107b: ldc.i4 0x1
IL_1080: sub
IL_1081: stloc V_35
IL_1085: br IL_0fe5
IL_108a: nop
IL_108b: stloc V_11
IL_108f: ldloc V_4
IL_1093: ldc.i4 0x691
IL_1098: add
IL_1099: ldloc V_11
IL_109d: ldc.i4 0x18
IL_10a2: mul
IL_10a3: add
IL_10a4: ldc.i4 0x10
IL_10a9: add
IL_10aa: ldloc V_30
IL_10ae: add
IL_10af: ldind.i4
IL_10b0: stloc V_38
IL_10b4: ldloc V_38
IL_10b8: ldloc V_14
IL_10bc: beq IL_117e
IL_10c1: ldloc V_4
IL_10c5: ldloc V_14
IL_10c9: add
IL_10ca: ldc.i4 0x10
IL_10cf: add
IL_10d0: ldloc V_30
IL_10d4: add
IL_10d5: ldind.i4
IL_10d6: stloc V_38
IL_10da: ldloc V_38
IL_10de: ldc.i4 0xffffffff
IL_10e3: beq IL_1160
IL_10e8: ldloc V_4
IL_10ec: ldloc V_38
IL_10f0: add
IL_10f1: ldc.i4 0x18
IL_10f6: add
IL_10f7: ldloc V_30
IL_10fb: add
IL_10fc: ldind.i4
IL_10fd: stloc V_11
IL_1101: ldc.i4 0x0
IL_1106: stloc V_21
IL_110a: ldloc V_4
IL_110e: ldloc V_4
IL_1112: ldloc V_38
IL_1116: add
IL_1117: ldc.i4 0x18
IL_111c: add
IL_111d: ldloc V_30
IL_1121: add
IL_1122: ldind.i4
IL_1123: add
IL_1124: stloc V_16
IL_1128: ldloc V_0
IL_112c: ldloc V_1
IL_1130: ldnull
IL_1131: stelem.ref
IL_1132: ldloc V_13
IL_1136: ldloc V_1
IL_113a: ldloc V_38
IL_113e: stelem.i4
IL_113f: ldloc V_6
IL_1143: ldloc V_1
IL_1147: ldc.i4 0x0
IL_114c: stelem.i4
IL_114d: ldloc V_1
IL_1151: ldc.i4 0x1
IL_1156: add
IL_1157: stloc V_1
IL_115b: br IL_1190
IL_1160: nop
IL_1161: ldloc V_4
IL_1165: ldloc V_14
IL_1169: add
IL_116a: ldloc V_30
IL_116e: add
IL_116f: ldind.i4
IL_1170: stloc V_14
IL_1174: br IL_0fbb
IL_1179: br IL_1190
IL_117e: nop
IL_117f: ldloc V_32
IL_1183: stloc V_16
IL_1187: ldc.i4 0xffffffff
IL_118c: stloc V_32
IL_1190: nop
IL_1191: leave IL_00dc
IL_1196: ldloc V_33
IL_119a: ldloc V_21
IL_119e: ldc.i4 0x1
IL_11a3: sub
IL_11a4: ldelem.ref
IL_11a5: ldnull
IL_11a6: ceq
IL_11a8: ldloc V_16
IL_11ac: ldloc V_30
IL_11b0: add
IL_11b1: ldind.i4
IL_11b2: ldloc V_16
IL_11b6: ldc.i4 0x8
IL_11bb: add
IL_11bc: ldloc V_30
IL_11c0: add
IL_11c1: ldind.i4
IL_11c2: sub
IL_11c3: mul
IL_11c4: ldloc V_16
IL_11c8: ldc.i4 0x8
IL_11cd: add
IL_11ce: ldloc V_30
IL_11d2: add
IL_11d3: ldind.i4
IL_11d4: add
IL_11d5: ldloc V_4
IL_11d9: add
IL_11da: stloc V_16
IL_11de: ldloc V_21
IL_11e2: ldc.i4 0x1
IL_11e7: sub
IL_11e8: stloc V_21
IL_11ec: leave IL_00dc
IL_11f1: ldloc V_33
IL_11f5: ldloc V_21
IL_11f9: ldc.i4 0x1
IL_11fe: sub
IL_11ff: ldelem.ref
IL_1200: castclass [mscorlib]System.Security.Cryptography.SHA256
IL_1205: ldsfld native int[] XamarinObfuscationTest.MainActivity::FrameSecurityDescriptorWithResolverRSAPKCSSHASignatureDescription
IL_120a: ldloc V_16
IL_120e: ldloc V_30
IL_1212: add
IL_1213: ldind.i4
IL_1214: ldelem.i
IL_1215: calli void(class [mscorlib]System.IDisposable)
IL_121a: ldloc V_21
IL_121e: ldc.i4 0x1
IL_1223: sub
IL_1224: stloc V_21
IL_1228: ldloc V_16
IL_122c: ldc.i4 0x8
IL_1231: add
IL_1232: stloc V_16
IL_1236: leave IL_00dc
IL_123b: ldc.i4 0x0
IL_1240: stloc V_21
IL_1244: ldloc V_1
IL_1248: ldc.i4 0x1
IL_124d: sub
IL_124e: stloc V_1
IL_1252: ldloc V_0
IL_1256: ldloc V_1
IL_125a: ldelem.ref
IL_125b: stloc V_15
IL_125f: ldloc V_15
IL_1263: ldnull
IL_1264: beq IL_16b8
IL_1269: ldloc V_1
IL_126d: ldc.i4 0x0
IL_1272: beq IL_12c0
IL_1277: ldloc V_6
IL_127b: ldloc V_1
IL_127f: ldc.i4 0x1
IL_1284: sub
IL_1285: ldelem.i4
IL_1286: ldc.i4 0x1
IL_128b: bne.un IL_12c0
IL_1290: ldc.i4 0x1
IL_1295: stloc V_21
IL_1299: ldloc V_3
IL_129d: ldloc V_21
IL_12a1: ldc.i4 0x0
IL_12a6: stelem.i1
IL_12a7: ldloc V_10
IL_12ab: ldloc V_21
IL_12af: ldelema [mscorlib]System.Int64
IL_12b4: conv.u
IL_12b5: ldc.i4 0x0
IL_12ba: stind.i4
IL_12bb: leave IL_0495
IL_12c0: nop
IL_12c1: ldloc V_8
IL_12c5: ldloc V_4
IL_12c9: sub
IL_12ca: stloc V_34
IL_12ce: ldc.i4 0x0
IL_12d3: stloc V_5
IL_12d7: ldc.i4 0x2
IL_12dc: stloc V_2
IL_12e0: ldloc V_5
IL_12e4: ldloc V_2
IL_12e8: add
IL_12e9: ldc.i4 0x2
IL_12ee: div
IL_12ef: stloc V_27
IL_12f3: ldloc V_4
IL_12f7: ldc.i4 0x691
IL_12fc: add
IL_12fd: ldloc V_27
IL_1301: ldc.i4 0x18
IL_1306: mul
IL_1307: add
IL_1308: ldloc V_30
IL_130c: add
IL_130d: ldind.i4
IL_130e: stloc V_35
IL_1312: ldloc V_4
IL_1316: ldc.i4 0x691
IL_131b: add
IL_131c: ldloc V_27
IL_1320: ldc.i4 0x18
IL_1325: mul
IL_1326: add
IL_1327: ldc.i4 0x8
IL_132c: add
IL_132d: ldloc V_30
IL_1331: add
IL_1332: ldind.i4
IL_1333: stloc V_39
IL_1337: ldloc V_34
IL_133b: ldloc V_35
IL_133f: ldloc V_39
IL_1343: add
IL_1344: bge IL_135f
IL_1349: ldloc V_35
IL_134d: ldloc V_34
IL_1351: bgt IL_1372
IL_1356: ldloc V_27
IL_135a: br IL_1385
IL_135f: ldloc V_27
IL_1363: ldc.i4 0x1
IL_1368: add
IL_1369: stloc V_5
IL_136d: br IL_12e0
IL_1372: ldloc V_27
IL_1376: ldc.i4 0x1
IL_137b: sub
IL_137c: stloc V_2
IL_1380: br IL_12e0
IL_1385: nop
IL_1386: stloc V_26
IL_138a: ldloc V_4
IL_138e: ldc.i4 0x691
IL_1393: add
IL_1394: ldloc V_26
IL_1398: ldc.i4 0x18
IL_139d: mul
IL_139e: add
IL_139f: ldc.i4 0x10
IL_13a4: add
IL_13a5: ldloc V_30
IL_13a9: add
IL_13aa: ldind.i4
IL_13ab: stloc V_11
IL_13af: ldloc V_11
IL_13b3: stloc V_37
IL_13b7: ldc.i4 0xffffffff
IL_13bc: ldloc V_37
IL_13c0: bne.un IL_13d3
IL_13c5: ldc.i4 0x1
IL_13ca: stloc V_23
IL_13ce: ldloc V_15
IL_13d2: throw
IL_13d3: nop
IL_13d4: ldloc V_4
IL_13d8: ldloc V_37
IL_13dc: add
IL_13dd: ldc.i4 0x8
IL_13e2: add
IL_13e3: ldloc V_30
IL_13e7: add
IL_13e8: ldind.i4
IL_13e9: stloc V_38
IL_13ed: ldloc V_38
IL_13f1: stloc V_11
IL_13f5: nop
IL_13f6: ldloc V_11
IL_13fa: ldc.i4 0xffffffff
IL_13ff: beq IL_16a3
IL_1404: ldloc V_4
IL_1408: ldloc V_11
IL_140c: add
IL_140d: ldc.i4 0x8
IL_1412: add
IL_1413: ldloc V_30
IL_1417: add
IL_1418: ldind.i4
IL_1419: ldc.i4 0x0
IL_141e: bne.un IL_14ac
IL_1423: ldloc V_4
IL_1427: ldloc V_11
IL_142b: add
IL_142c: ldc.i4 0x10
IL_1431: add
IL_1432: ldloc V_30
IL_1436: add
IL_1437: ldind.i4
IL_1438: stloc V_36
IL_143c: ldloc V_36
IL_1440: ldc.i4 0xffffffff
IL_1445: beq IL_14ac
IL_144a: ldloc V_12
IL_144e: ldloc V_36
IL_1452: ldelem.ref
IL_1453: dup
IL_1454: ldnull
IL_1455: bne.un IL_147f
IL_145a: pop
IL_145b: ldloc V_12
IL_145f: ldloc V_36
IL_1463: ldloc V_17
IL_1467: ldloc V_36
IL_146b: ldelem [mscorlib_6]System.RuntimeTypeHandle
IL_1470: call class [mscorlib_6]System.Type [mscorlib_6]System.Type::GetTypeFromHandle(valuetype [mscorlib_6]System.RuntimeTypeHandle)
IL_1475: stelem.ref
IL_1476: ldloc V_12
IL_147a: ldloc V_36
IL_147e: ldelem.ref
IL_147f: nop
IL_1480: ldloc V_15
IL_1484: call instance bool [mscorlib_6]System.Type::IsInstanceOfType(object)
IL_1489: brtrue IL_14ac
IL_148e: ldloc V_4
IL_1492: ldloc V_11
IL_1496: add
IL_1497: ldc.i4 0x28
IL_149c: add
IL_149d: ldloc V_30
IL_14a1: add
IL_14a2: ldind.i4
IL_14a3: stloc V_11
IL_14a7: br IL_13f5
IL_14ac: nop
IL_14ad: ldloc V_4
IL_14b1: ldloc V_11
IL_14b5: add
IL_14b6: ldc.i4 0x8
IL_14bb: add
IL_14bc: ldloc V_30
IL_14c0: add
IL_14c1: ldind.i4
IL_14c2: stloc V_26
IL_14c6: ldloc V_26
IL_14ca: ldc.i4 0x1
IL_14cf: beq IL_1584
IL_14d4: ldloc V_26
IL_14d8: ldc.i4 0x2
IL_14dd: beq IL_1627
IL_14e2: ldloc V_4
IL_14e6: ldloc V_11
IL_14ea: add
IL_14eb: ldc.i4 0x18
IL_14f0: add
IL_14f1: ldloc V_30
IL_14f5: add
IL_14f6: ldind.i4
IL_14f7: stloc V_39
IL_14fb: ldc.i4 0x1
IL_1500: stloc V_21
IL_1504: ldloc V_3
IL_1508: ldloc V_21
IL_150c: ldc.i4 0x1
IL_1511: sub
IL_1512: ldc.i4 0x5
IL_1517: stelem.i1
IL_1518: ldloc V_33
IL_151c: ldloc V_21
IL_1520: ldc.i4 0x1
IL_1525: sub
IL_1526: ldloc V_15
IL_152a: stelem.ref
IL_152b: ldloc V_4
IL_152f: ldloc V_4
IL_1533: ldloc V_11
IL_1537: add
IL_1538: ldc.i4 0x18
IL_153d: add
IL_153e: ldloc V_30
IL_1542: add
IL_1543: ldind.i4
IL_1544: add
IL_1545: stloc V_16
IL_1549: ldloc V_0
IL_154d: ldloc V_1
IL_1551: ldloc V_15
IL_1555: stelem.ref
IL_1556: ldloc V_13
IL_155a: ldloc V_1
IL_155e: ldloc V_11
IL_1562: stelem.i4
IL_1563: ldloc V_6
IL_1567: ldloc V_1
IL_156b: ldc.i4 0x2
IL_1570: stelem.i4
IL_1571: ldloc V_1
IL_1575: ldc.i4 0x1
IL_157a: add
IL_157b: stloc V_1
IL_157f: br IL_16b2
IL_1584: nop
IL_1585: ldloc V_4
IL_1589: ldloc V_11
IL_158d: add
IL_158e: ldc.i4 0x20
IL_1593: add
IL_1594: ldloc V_30
IL_1598: add
IL_1599: ldind.i4
IL_159a: stloc V_39
IL_159e: ldc.i4 0x1
IL_15a3: stloc V_21
IL_15a7: ldloc V_3
IL_15ab: ldloc V_21
IL_15af: ldc.i4 0x1
IL_15b4: sub
IL_15b5: ldc.i4 0x5
IL_15ba: stelem.i1
IL_15bb: ldloc V_33
IL_15bf: ldloc V_21
IL_15c3: ldc.i4 0x1
IL_15c8: sub
IL_15c9: ldloc V_15
IL_15cd: stelem.ref
IL_15ce: ldloc V_4
IL_15d2: ldloc V_4
IL_15d6: ldloc V_11
IL_15da: add
IL_15db: ldc.i4 0x20
IL_15e0: add
IL_15e1: ldloc V_30
IL_15e5: add
IL_15e6: ldind.i4
IL_15e7: add
IL_15e8: stloc V_16
IL_15ec: ldloc V_0
IL_15f0: ldloc V_1
IL_15f4: ldloc V_15
IL_15f8: stelem.ref
IL_15f9: ldloc V_13
IL_15fd: ldloc V_1
IL_1601: ldloc V_11
IL_1605: stelem.i4
IL_1606: ldloc V_6
IL_160a: ldloc V_1
IL_160e: ldc.i4 0x1
IL_1613: stelem.i4
IL_1614: ldloc V_1
IL_1618: ldc.i4 0x1
IL_161d: add
IL_161e: stloc V_1
IL_1622: br IL_16b2
IL_1627: nop
IL_1628: ldloc V_4
IL_162c: ldloc V_11
IL_1630: add
IL_1631: ldc.i4 0x18
IL_1636: add
IL_1637: ldloc V_30
IL_163b: add
IL_163c: ldind.i4
IL_163d: stloc V_39
IL_1641: ldc.i4 0x0
IL_1646: stloc V_21
IL_164a: ldloc V_4
IL_164e: ldloc V_4
IL_1652: ldloc V_11
IL_1656: add
IL_1657: ldc.i4 0x18
IL_165c: add
IL_165d: ldloc V_30
IL_1661: add
IL_1662: ldind.i4
IL_1663: add
IL_1664: stloc V_16
IL_1668: ldloc V_0
IL_166c: ldloc V_1
IL_1670: ldloc V_15
IL_1674: stelem.ref
IL_1675: ldloc V_13
IL_1679: ldloc V_1
IL_167d: ldloc V_11
IL_1681: stelem.i4
IL_1682: ldloc V_6
IL_1686: ldloc V_1
IL_168a: ldc.i4 0x0
IL_168f: stelem.i4
IL_1690: ldloc V_1
IL_1694: ldc.i4 0x1
IL_1699: add
IL_169a: stloc V_1
IL_169e: br IL_16b2
IL_16a3: nop
IL_16a4: ldc.i4 0x1
IL_16a9: stloc V_23
IL_16ad: ldloc V_15
IL_16b1: throw
IL_16b2: nop
IL_16b3: br IL_1a09
IL_16b8: nop
IL_16b9: ldloc V_4
IL_16bd: ldloc V_4
IL_16c1: ldloc V_13
IL_16c5: ldloc V_1
IL_16c9: ldelem.i4
IL_16ca: add
IL_16cb: ldloc V_30
IL_16cf: add
IL_16d0: ldind.i4
IL_16d1: add
IL_16d2: ldloc V_30
IL_16d6: add
IL_16d7: ldind.i4
IL_16d8: stloc V_14
IL_16dc: ldc.i4 0xffffffff
IL_16e1: ldloc V_32
IL_16e5: beq IL_1a08
IL_16ea: ldloc V_8
IL_16ee: ldloc V_32
IL_16f2: beq IL_19f6
IL_16f7: ldloc V_32
IL_16fb: ldloc V_4
IL_16ff: sub
IL_1700: stloc V_38
IL_1704: nop
IL_1705: ldloc V_1
IL_1709: ldc.i4 0x0
IL_170e: beq IL_182a
IL_1713: ldloc V_1
IL_1717: ldc.i4 0x1
IL_171c: sub
IL_171d: stloc V_1
IL_1721: ldloc V_38
IL_1725: stloc V_11
IL_1729: ldc.i4 0x0
IL_172e: stloc V_39
IL_1732: ldc.i4 0x2
IL_1737: stloc V_35
IL_173b: ldloc V_39
IL_173f: ldloc V_35
IL_1743: add
IL_1744: ldc.i4 0x2
IL_1749: div
IL_174a: stloc V_27
IL_174e: ldloc V_4
IL_1752: ldc.i4 0x6d9
IL_1757: add
IL_1758: ldloc V_27
IL_175c: ldc.i4 0x18
IL_1761: mul
IL_1762: add
IL_1763: ldloc V_30
IL_1767: add
IL_1768: ldind.i4
IL_1769: stloc V_2
IL_176d: ldloc V_4
IL_1771: ldc.i4 0x6d9
IL_1776: add
IL_1777: ldloc V_27
IL_177b: ldc.i4 0x18
IL_1780: mul
IL_1781: add
IL_1782: ldc.i4 0x8
IL_1787: add
IL_1788: ldloc V_30
IL_178c: add
IL_178d: ldind.i4
IL_178e: stloc V_5
IL_1792: ldloc V_11
IL_1796: ldloc V_2
IL_179a: ldloc V_5
IL_179e: add
IL_179f: bge IL_17ba
IL_17a4: ldloc V_2
IL_17a8: ldloc V_11
IL_17ac: bgt IL_17cd
IL_17b1: ldloc V_27
IL_17b5: br IL_17e0
IL_17ba: ldloc V_27
IL_17be: ldc.i4 0x1
IL_17c3: add
IL_17c4: stloc V_39
IL_17c8: br IL_173b
IL_17cd: ldloc V_27
IL_17d1: ldc.i4 0x1
IL_17d6: sub
IL_17d7: stloc V_35
IL_17db: br IL_173b
IL_17e0: nop
IL_17e1: stloc V_36
IL_17e5: ldloc V_4
IL_17e9: ldc.i4 0x6d9
IL_17ee: add
IL_17ef: ldloc V_36
IL_17f3: ldc.i4 0x18
IL_17f8: mul
IL_17f9: add
IL_17fa: ldc.i4 0x10
IL_17ff: add
IL_1800: ldloc V_30
IL_1804: add
IL_1805: ldind.i4
IL_1806: stloc V_26
IL_180a: ldloc V_26
IL_180e: ldloc V_13
IL_1812: ldloc V_1
IL_1816: ldelem.i4
IL_1817: bne.un IL_1704
IL_181c: ldloc V_1
IL_1820: ldc.i4 0x1
IL_1825: add
IL_1826: stloc V_1
IL_182a: nop
IL_182b: ldloc V_14
IL_182f: stloc V_37
IL_1833: nop
IL_1834: ldloc V_37
IL_1838: ldc.i4 0xffffffff
IL_183d: beq IL_19f6
IL_1842: nop
IL_1843: ldloc V_38
IL_1847: stloc V_34
IL_184b: ldc.i4 0x0
IL_1850: stloc V_5
IL_1854: ldc.i4 0x2
IL_1859: stloc V_2
IL_185d: ldloc V_5
IL_1861: ldloc V_2
IL_1865: add
IL_1866: ldc.i4 0x2
IL_186b: div
IL_186c: stloc V_27
IL_1870: ldloc V_4
IL_1874: ldc.i4 0x691
IL_1879: add
IL_187a: ldloc V_27
IL_187e: ldc.i4 0x18
IL_1883: mul
IL_1884: add
IL_1885: ldloc V_30
IL_1889: add
IL_188a: ldind.i4
IL_188b: stloc V_35
IL_188f: ldloc V_4
IL_1893: ldc.i4 0x691
IL_1898: add
IL_1899: ldloc V_27
IL_189d: ldc.i4 0x18
IL_18a2: mul
IL_18a3: add
IL_18a4: ldc.i4 0x8
IL_18a9: add
IL_18aa: ldloc V_30
IL_18ae: add
IL_18af: ldind.i4
IL_18b0: stloc V_39
IL_18b4: ldloc V_34
IL_18b8: ldloc V_35
IL_18bc: ldloc V_39
IL_18c0: add
IL_18c1: bge IL_18dc
IL_18c6: ldloc V_35
IL_18ca: ldloc V_34
IL_18ce: bgt IL_18ef
IL_18d3: ldloc V_27
IL_18d7: br IL_1902
IL_18dc: ldloc V_27
IL_18e0: ldc.i4 0x1
IL_18e5: add
IL_18e6: stloc V_5
IL_18ea: br IL_185d
IL_18ef: ldloc V_27
IL_18f3: ldc.i4 0x1
IL_18f8: sub
IL_18f9: stloc V_2
IL_18fd: br IL_185d
IL_1902: nop
IL_1903: stloc V_26
IL_1907: ldloc V_4
IL_190b: ldc.i4 0x691
IL_1910: add
IL_1911: ldloc V_26
IL_1915: ldc.i4 0x18
IL_191a: mul
IL_191b: add
IL_191c: ldc.i4 0x10
IL_1921: add
IL_1922: ldloc V_30
IL_1926: add
IL_1927: ldind.i4
IL_1928: stloc V_36
IL_192c: ldloc V_36
IL_1930: ldloc V_37
IL_1934: beq IL_19f6
IL_1939: ldloc V_4
IL_193d: ldloc V_37
IL_1941: add
IL_1942: ldc.i4 0x10
IL_1947: add
IL_1948: ldloc V_30
IL_194c: add
IL_194d: ldind.i4
IL_194e: stloc V_36
IL_1952: ldloc V_36
IL_1956: ldc.i4 0xffffffff
IL_195b: beq IL_19d8
IL_1960: ldloc V_4
IL_1964: ldloc V_36
IL_1968: add
IL_1969: ldc.i4 0x18
IL_196e: add
IL_196f: ldloc V_30
IL_1973: add
IL_1974: ldind.i4
IL_1975: stloc V_26
IL_1979: ldc.i4 0x0
IL_197e: stloc V_21
IL_1982: ldloc V_4
IL_1986: ldloc V_4
IL_198a: ldloc V_36
IL_198e: add
IL_198f: ldc.i4 0x18
IL_1994: add
IL_1995: ldloc V_30
IL_1999: add
IL_199a: ldind.i4
IL_199b: add
IL_199c: stloc V_16
IL_19a0: ldloc V_0
IL_19a4: ldloc V_1
IL_19a8: ldnull
IL_19a9: stelem.ref
IL_19aa: ldloc V_13
IL_19ae: ldloc V_1
IL_19b2: ldloc V_36
IL_19b6: stelem.i4
IL_19b7: ldloc V_6
IL_19bb: ldloc V_1
IL_19bf: ldc.i4 0x0
IL_19c4: stelem.i4
IL_19c5: ldloc V_1
IL_19c9: ldc.i4 0x1
IL_19ce: add
IL_19cf: stloc V_1
IL_19d3: br IL_1a08
IL_19d8: nop
IL_19d9: ldloc V_4
IL_19dd: ldloc V_37
IL_19e1: add
IL_19e2: ldloc V_30
IL_19e6: add
IL_19e7: ldind.i4
IL_19e8: stloc V_37
IL_19ec: br IL_1833
IL_19f1: br IL_1a08
IL_19f6: nop
IL_19f7: ldloc V_32
IL_19fb: stloc V_16
IL_19ff: ldc.i4 0xffffffff
IL_1a04: stloc V_32
IL_1a08: nop
IL_1a09: nop
IL_1a0a: leave IL_00dc
IL_1a0f: ldloc V_3
IL_1a13: ldloc V_21
IL_1a17: ldc.i4 0x0
IL_1a1c: stelem.i1
IL_1a1d: ldloc V_10
IL_1a21: ldloc V_21
IL_1a25: ldelema [mscorlib]System.Int64
IL_1a2a: conv.u
IL_1a2b: ldloc V_25
IL_1a2f: ldloc V_16
IL_1a33: ldloc V_30
IL_1a37: add
IL_1a38: ldind.i4
IL_1a39: ldelema [mscorlib]System.SByte
IL_1a3e: ldind.u1
IL_1a3f: stind.i4
IL_1a40: ldloc V_33
IL_1a44: ldloc V_21
IL_1a48: ldnull
IL_1a49: stelem.ref
IL_1a4a: ldloc V_21
IL_1a4e: ldc.i4 0x1
IL_1a53: add
IL_1a54: stloc V_21
IL_1a58: ldloc V_16
IL_1a5c: ldc.i4 0x8
IL_1a61: add
IL_1a62: stloc V_16
IL_1a66: leave IL_00dc
IL_1a6b: ldloc V_16
IL_1a6f: call class [System_7]System.Diagnostics.Process [System_7]System.Diagnostics.Process::GetCurrentProcess()
IL_1a74: call instance int32 [System_7]System.Diagnostics.Process::get_Id()
IL_1a79: dup
IL_1a7a: ldsfld uint8 IsByRefLikeAttributeAwayFromZero
IL_1a7f: xor
IL_1a80: ldc.i4 0xaa
IL_1a85: sub
IL_1a86: ldc.i4 0x1
IL_1a8b: stloc V_18
IL_1a8f: mul
IL_1a90: add
IL_1a91: stloc V_16
IL_1a95: leave IL_00dc
} // end .try
catch [mscorlib_6]System.Exception
{
IL_1a9a: stloc V_9
IL_1a9e: ldloc V_23
IL_1aa2: ldc.i4 0x1
IL_1aa7: beq IL_1efb
IL_1aac: ldloc V_1
IL_1ab0: ldc.i4 0x0
IL_1ab5: beq IL_1b03
IL_1aba: ldloc V_6
IL_1abe: ldloc V_1
IL_1ac2: ldc.i4 0x1
IL_1ac7: sub
IL_1ac8: ldelem.i4
IL_1ac9: ldc.i4 0x1
IL_1ace: bne.un IL_1b03
IL_1ad3: ldc.i4 0x1
IL_1ad8: stloc V_21
IL_1adc: ldloc V_3
IL_1ae0: ldloc V_21
IL_1ae4: ldc.i4 0x0
IL_1ae9: stelem.i1
IL_1aea: ldloc V_10
IL_1aee: ldloc V_21
IL_1af2: ldelema [mscorlib]System.Int64
IL_1af7: conv.u
IL_1af8: ldc.i4 0x0
IL_1afd: stind.i4
IL_1afe: leave IL_0495
IL_1b03: nop
IL_1b04: ldloc V_8
IL_1b08: ldloc V_4
IL_1b0c: sub
IL_1b0d: stloc V_11
IL_1b11: ldc.i4 0x0
IL_1b16: stloc V_39
IL_1b1a: ldc.i4 0x2
IL_1b1f: stloc V_35
IL_1b23: ldloc V_39
IL_1b27: ldloc V_35
IL_1b2b: add
IL_1b2c: ldc.i4 0x2
IL_1b31: div
IL_1b32: stloc V_27
IL_1b36: ldloc V_4
IL_1b3a: ldc.i4 0x691
IL_1b3f: add
IL_1b40: ldloc V_27
IL_1b44: ldc.i4 0x18
IL_1b49: mul
IL_1b4a: add
IL_1b4b: ldloc V_30
IL_1b4f: add
IL_1b50: ldind.i4
IL_1b51: stloc V_2
IL_1b55: ldloc V_4
IL_1b59: ldc.i4 0x691
IL_1b5e: add
IL_1b5f: ldloc V_27
IL_1b63: ldc.i4 0x18
IL_1b68: mul
IL_1b69: add
IL_1b6a: ldc.i4 0x8
IL_1b6f: add
IL_1b70: ldloc V_30
IL_1b74: add
IL_1b75: ldind.i4
IL_1b76: stloc V_5
IL_1b7a: ldloc V_11
IL_1b7e: ldloc V_2
IL_1b82: ldloc V_5
IL_1b86: add
IL_1b87: bge IL_1ba2
IL_1b8c: ldloc V_2
IL_1b90: ldloc V_11
IL_1b94: bgt IL_1bb5
IL_1b99: ldloc V_27
IL_1b9d: br IL_1bc8
IL_1ba2: ldloc V_27
IL_1ba6: ldc.i4 0x1
IL_1bab: add
IL_1bac: stloc V_39
IL_1bb0: br IL_1b23
IL_1bb5: ldloc V_27
IL_1bb9: ldc.i4 0x1
IL_1bbe: sub
IL_1bbf: stloc V_35
IL_1bc3: br IL_1b23
IL_1bc8: nop
IL_1bc9: stloc V_38
IL_1bcd: ldloc V_4
IL_1bd1: ldc.i4 0x691
IL_1bd6: add
IL_1bd7: ldloc V_38
IL_1bdb: ldc.i4 0x18
IL_1be0: mul
IL_1be1: add
IL_1be2: ldc.i4 0x10
IL_1be7: add
IL_1be8: ldloc V_30
IL_1bec: add
IL_1bed: ldind.i4
IL_1bee: stloc V_26
IL_1bf2: ldloc V_26
IL_1bf6: stloc V_14
IL_1bfa: ldc.i4 0xffffffff
IL_1bff: ldloc V_14
IL_1c03: bne.un IL_1c16
IL_1c08: ldc.i4 0x1
IL_1c0d: stloc V_23
IL_1c11: ldloc V_9
IL_1c15: throw
IL_1c16: nop
IL_1c17: ldloc V_4
IL_1c1b: ldloc V_14
IL_1c1f: add
IL_1c20: ldc.i4 0x8
IL_1c25: add
IL_1c26: ldloc V_30
IL_1c2a: add
IL_1c2b: ldind.i4
IL_1c2c: stloc V_36
IL_1c30: ldloc V_36
IL_1c34: stloc V_26
IL_1c38: nop
IL_1c39: ldloc V_26
IL_1c3d: ldc.i4 0xffffffff
IL_1c42: beq IL_1ee6
IL_1c47: ldloc V_4
IL_1c4b: ldloc V_26
IL_1c4f: add
IL_1c50: ldc.i4 0x8
IL_1c55: add
IL_1c56: ldloc V_30
IL_1c5a: add
IL_1c5b: ldind.i4
IL_1c5c: ldc.i4 0x0
IL_1c61: bne.un IL_1cef
IL_1c66: ldloc V_4
IL_1c6a: ldloc V_26
IL_1c6e: add
IL_1c6f: ldc.i4 0x10
IL_1c74: add
IL_1c75: ldloc V_30
IL_1c79: add
IL_1c7a: ldind.i4
IL_1c7b: stloc V_34
IL_1c7f: ldloc V_34
IL_1c83: ldc.i4 0xffffffff
IL_1c88: beq IL_1cef
IL_1c8d: ldloc V_12
IL_1c91: ldloc V_34
IL_1c95: ldelem.ref
IL_1c96: dup
IL_1c97: ldnull
IL_1c98: bne.un IL_1cc2
IL_1c9d: pop
IL_1c9e: ldloc V_12
IL_1ca2: ldloc V_34
IL_1ca6: ldloc V_17
IL_1caa: ldloc V_34
IL_1cae: ldelem [mscorlib_6]System.RuntimeTypeHandle
IL_1cb3: call class [mscorlib_6]System.Type [mscorlib_6]System.Type::GetTypeFromHandle(valuetype [mscorlib_6]System.RuntimeTypeHandle)
IL_1cb8: stelem.ref
IL_1cb9: ldloc V_12
IL_1cbd: ldloc V_34
IL_1cc1: ldelem.ref
IL_1cc2: nop
IL_1cc3: ldloc V_9
IL_1cc7: call instance bool [mscorlib_6]System.Type::IsInstanceOfType(object)
IL_1ccc: brtrue IL_1cef
IL_1cd1: ldloc V_4
IL_1cd5: ldloc V_26
IL_1cd9: add
IL_1cda: ldc.i4 0x28
IL_1cdf: add
IL_1ce0: ldloc V_30
IL_1ce4: add
IL_1ce5: ldind.i4
IL_1ce6: stloc V_26
IL_1cea: br IL_1c38
IL_1cef: nop
IL_1cf0: ldloc V_4
IL_1cf4: ldloc V_26
IL_1cf8: add
IL_1cf9: ldc.i4 0x8
IL_1cfe: add
IL_1cff: ldloc V_30
IL_1d03: add
IL_1d04: ldind.i4
IL_1d05: stloc V_38
IL_1d09: ldloc V_38
IL_1d0d: ldc.i4 0x1
IL_1d12: beq IL_1dc7
IL_1d17: ldloc V_38
IL_1d1b: ldc.i4 0x2
IL_1d20: beq IL_1e6a
IL_1d25: ldloc V_4
IL_1d29: ldloc V_26
IL_1d2d: add
IL_1d2e: ldc.i4 0x18
IL_1d33: add
IL_1d34: ldloc V_30
IL_1d38: add
IL_1d39: ldind.i4
IL_1d3a: stloc V_5
IL_1d3e: ldc.i4 0x1
IL_1d43: stloc V_21
IL_1d47: ldloc V_3
IL_1d4b: ldloc V_21
IL_1d4f: ldc.i4 0x1
IL_1d54: sub
IL_1d55: ldc.i4 0x5
IL_1d5a: stelem.i1
IL_1d5b: ldloc V_33
IL_1d5f: ldloc V_21
IL_1d63: ldc.i4 0x1
IL_1d68: sub
IL_1d69: ldloc V_9
IL_1d6d: stelem.ref
IL_1d6e: ldloc V_4
IL_1d72: ldloc V_4
IL_1d76: ldloc V_26
IL_1d7a: add
IL_1d7b: ldc.i4 0x18
IL_1d80: add
IL_1d81: ldloc V_30
IL_1d85: add
IL_1d86: ldind.i4
IL_1d87: add
IL_1d88: stloc V_16
IL_1d8c: ldloc V_0
IL_1d90: ldloc V_1
IL_1d94: ldloc V_9
IL_1d98: stelem.ref
IL_1d99: ldloc V_13
IL_1d9d: ldloc V_1
IL_1da1: ldloc V_26
IL_1da5: stelem.i4
IL_1da6: ldloc V_6
IL_1daa: ldloc V_1
IL_1dae: ldc.i4 0x2
IL_1db3: stelem.i4
IL_1db4: ldloc V_1
IL_1db8: ldc.i4 0x1
IL_1dbd: add
IL_1dbe: stloc V_1
IL_1dc2: br IL_1ef5
IL_1dc7: nop
IL_1dc8: ldloc V_4
IL_1dcc: ldloc V_26
IL_1dd0: add
IL_1dd1: ldc.i4 0x20
IL_1dd6: add
IL_1dd7: ldloc V_30
IL_1ddb: add
IL_1ddc: ldind.i4
IL_1ddd: stloc V_5
IL_1de1: ldc.i4 0x1
IL_1de6: stloc V_21
IL_1dea: ldloc V_3
IL_1dee: ldloc V_21
IL_1df2: ldc.i4 0x1
IL_1df7: sub
IL_1df8: ldc.i4 0x5
IL_1dfd: stelem.i1
IL_1dfe: ldloc V_33
IL_1e02: ldloc V_21
IL_1e06: ldc.i4 0x1
IL_1e0b: sub
IL_1e0c: ldloc V_9
IL_1e10: stelem.ref
IL_1e11: ldloc V_4
IL_1e15: ldloc V_4
IL_1e19: ldloc V_26
IL_1e1d: add
IL_1e1e: ldc.i4 0x20
IL_1e23: add
IL_1e24: ldloc V_30
IL_1e28: add
IL_1e29: ldind.i4
IL_1e2a: add
IL_1e2b: stloc V_16
IL_1e2f: ldloc V_0
IL_1e33: ldloc V_1
IL_1e37: ldloc V_9
IL_1e3b: stelem.ref
IL_1e3c: ldloc V_13
IL_1e40: ldloc V_1
IL_1e44: ldloc V_26
IL_1e48: stelem.i4
IL_1e49: ldloc V_6
IL_1e4d: ldloc V_1
IL_1e51: ldc.i4 0x1
IL_1e56: stelem.i4
IL_1e57: ldloc V_1
IL_1e5b: ldc.i4 0x1
IL_1e60: add
IL_1e61: stloc V_1
IL_1e65: br IL_1ef5
IL_1e6a: nop
IL_1e6b: ldloc V_4
IL_1e6f: ldloc V_26
IL_1e73: add
IL_1e74: ldc.i4 0x18
IL_1e79: add
IL_1e7a: ldloc V_30
IL_1e7e: add
IL_1e7f: ldind.i4
IL_1e80: stloc V_5
IL_1e84: ldc.i4 0x0
IL_1e89: stloc V_21
IL_1e8d: ldloc V_4
IL_1e91: ldloc V_4
IL_1e95: ldloc V_26
IL_1e99: add
IL_1e9a: ldc.i4 0x18
IL_1e9f: add
IL_1ea0: ldloc V_30
IL_1ea4: add
IL_1ea5: ldind.i4
IL_1ea6: add
IL_1ea7: stloc V_16
IL_1eab: ldloc V_0
IL_1eaf: ldloc V_1
IL_1eb3: ldloc V_9
IL_1eb7: stelem.ref
IL_1eb8: ldloc V_13
IL_1ebc: ldloc V_1
IL_1ec0: ldloc V_26
IL_1ec4: stelem.i4
IL_1ec5: ldloc V_6
IL_1ec9: ldloc V_1
IL_1ecd: ldc.i4 0x0
IL_1ed2: stelem.i4
IL_1ed3: ldloc V_1
IL_1ed7: ldc.i4 0x1
IL_1edc: add
IL_1edd: stloc V_1
IL_1ee1: br IL_1ef5
IL_1ee6: nop
IL_1ee7: ldc.i4 0x1
IL_1eec: stloc V_23
IL_1ef0: ldloc V_9
IL_1ef4: throw
IL_1ef5: nop
IL_1ef6: leave IL_00dc
IL_1efb: ldloc V_9
IL_1eff: throw
} // end handler
IL_1f00: nop
IL_1f01: ldloc V_10
IL_1f05: ldloc V_21
IL_1f09: ldc.i4 0x1
IL_1f0e: sub
IL_1f0f: ldelema [mscorlib]System.Int64
IL_1f14: conv.u
IL_1f15: ldind.i4
IL_1f16: ret
} // end of method MainActivity::CheckPassword
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