STM8 eForth WS2812 LED Strip Demo

ws2812.fs

\ A STM8 eForth WS2812 demo with tested timing
\ for STM8S w/ 16MHz (HSI) clock
\ 3.3V MINDEV: PB4 with 1K pull-up to 5V works well

\res MCU: STM8S103
\res export PB_DDR PB_ODR PB_CR1

#require ]B!
#require ]CB

NVM
  \ starting from memory a transfer n bytes to a WS2812 chain
  : WS2812 ( a n -- )
     OVER + ( a a1 ) SWAP
     DO [
           $1601 ,         \     LDW  Y,(1,SP)
           $90F6 ,         \     LD   A,(Y)
           $88  C,         \     PUSH A
           $A608 ,         \     LD   A,#8
           HERE            \ 0$:
        ] [ 1 PB_ODR 4 ]B! [
           $0901 ,         \     RLC  (1,SP)
           $9D  C,         \     NOP
           $9D  C,         \     NOP
        ] [ PB_ODR 4 ]CB [
           $9D  C,         \     NOP
           $9D  C,         \     NOP
           $9D  C,         \     NOP
           $9D  C,         \     NOP
        ] [ 0 PB_ODR 4 ]B! [
           $9D  C,         \     NOP
           $4A  C,         \     DEC  A
           $4D  C,         \     TNZ  A
           $26  C,         \     JRNE ...
           HERE - 1- C,    \      ... 0$
           $84 C,          \     POP  A
        ]
     LOOP ;

  : init ( -- )
     [ 0 PB_ODR 4 ]B!
     [ 1 PB_DDR 4 ]B!
     [ 1 PB_CR1 4 ]B! ;
RAM

\\ Example

\ 8 x WS2812B on PCB with 470µF capacitor at 5V supply
\ STM8S103F3: PB4 is pin 12 - remember the 1K pull-up resistor!

#include ws2812.fs

8 3 * CONSTANT #leds         \ memory for 8 x WS2812 
VARIABLE wsmem #leds 2- ALLOT 

\ a very simple test with delay n
: test ( n -- )
  init
  255 FOR
     wsmem #leds I FILL
     wsmem #leds WS2812
     DUP FOR ( wait ) NEXT  \ pause
  NEXT DROP ;

\ e.g. 10000 test

Here is some support for the timing hypothesis: https://wp.josh.com/2014/05/13/ws2812-neopixels-are-not-so-finicky-once-you-get-to-know-them/
The author basically states that:

• T1H doesn't matter much ( > 0.55µs)
• T0L and T1L should be > 0.2µs and <= 5µs

This means that bit-banging can be simplified

New findings by testing the claims above and comparing (failed) timing with refreshed signals at the WS2812B output:

• the bit timing should be balanced and result in a cadence of no less than 0.9µs
• bit high time will be reshaped to spec (0.35µs, 0.7µs)
• bit low time and inter byte delay can be relaxed (0.3125 to 4.8µs)
• bit low time 0.25µs to 5µs still works

The code above has a cadence of 1µs independent of high/low. The inter byte delay is 4.8 µs.
Tested with WS2812 (64 units) and WS2812B (8 units).
Power supply is critical: 64 units WS2812 fully lit (0xFFFFFF) draws about 3A.

Thank you for this code, however I don't know what the #require ]B! & #require ]CB mean. If you could briefly explain that it would be very helpful.

Thank you

@criterionsignalworks #require is a code load request for e4thcom or a compatible transfer tool, e.g. codeload.py. The STM8 eForth library words ]B! and ]CB are immediate words that compile the STM8 assembler instructions BSET, BRES or BCCM. You can of course look up these library words and enter them without #require.

If you need more infos or help for getting started, please open an issue here :-)

@TG9541 Thank you for replying to our question. Since we're using a generic serial terminal, entering words from library manually does indeed seem to work. You've helped us a lot, thanks again.

Thanks. Did you ever consider using the SPI MOSI pin to send the wave forms to the LEDs?

@rlourette yes, I did - that would certainly work but unless one uses a STM8L device with DMA I don't expect any advantage over the timing-stable loop shown in the code.

In the case of using DMA the bit coding for an RGB byte group would have to be represented as (at least) 24 bytes. As both RAM and ROM aren't exactly an abundant resources in STM8L devices the use case would be limited to (very) timing sensitive applications.