Created
May 18, 2017 11:28
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| --- /dev/fd/63 2017-05-18 09:27:32.751503704 +0000 | |
| +++ /dev/fd/62 2017-05-18 09:27:32.751503704 +0000 | |
| @@ -336,7 +336,7 @@ | |
| phandle = <0x11e>; | |
| qcom,batt-id-range-pct = <0x5>; | |
| - qcom,2508175_bn41hdesay_4100mah_averaged_masterslave_jun27th2016 { | |
| + qcom,2508175_huaqin_bn41hdesay_4100mah_averaged_masterslave_jun27th2016 { | |
| qcom,batt-id-kohm = <0x52>; | |
| qcom,battery-beta = <0xd6b>; | |
| qcom,battery-type = "qrd_msm8953_desay_4100mah"; | |
| @@ -353,7 +353,7 @@ | |
| qcom,nom-batt-capacity-mah = <0x1004>; | |
| }; | |
| - qcom,2728170_mido_sunwoda_4100mah_averaged_masterslave_jan3rd2017 { | |
| + qcom,2728170_huaqin_c6sunwoda_4100mah_averaged_masterslave_jan3rd2017 { | |
| qcom,batt-id-kohm = <0x28>; | |
| qcom,battery-beta = <0xd6b>; | |
| qcom,battery-type = "qrd_msm8953_sunwoda_atl_4100mah"; | |
| @@ -368,7 +368,7 @@ | |
| qcom,nom-batt-capacity-mah = <0x1004>; | |
| }; | |
| - qcom,2781148_mido_desay_4100mah_averaged_masterslave_feb3rd2017 { | |
| + qcom,2781148_huaqin_c6desay_4100mah_averaged_masterslave_feb3rd2017 { | |
| qcom,batt-id-kohm = <0x3e>; | |
| qcom,battery-beta = <0xd6b>; | |
| qcom,battery-type = "batterydata-qrd-desay-lisheng-4v4-4100mah"; | |
| @@ -383,7 +383,7 @@ | |
| qcom,nom-batt-capacity-mah = <0x1004>; | |
| }; | |
| - qcom,2786095_mido_coslight_4100mah_averaged_masterslave_feb3rd2017 { | |
| + qcom,2786095_huaqin_c6coslight_4100mah_averaged_masterslave_feb3rd2017 { | |
| qcom,batt-id-kohm = <0x32>; | |
| qcom,battery-beta = <0xd6b>; | |
| qcom,battery-type = "qrd_msm8953_coslight_4100mah"; | |
| @@ -1663,7 +1663,7 @@ | |
| qcom,audio-ref-clk-gpio = <0xec 0x1 0x0>; | |
| qcom,lpass-mclk-id = "pri_mclk"; | |
| qcom,node_has_rpm_clock; | |
| - status = "disabled"; | |
| + status = "disable"; | |
| }; | |
| clock-controller@b011000 { | |
| @@ -1777,33 +1777,33 @@ | |
| regulator { | |
| linux,phandle = <0xfa>; | |
| phandle = <0xfa>; | |
| - qcom,allow-aging-voltage-adjustment = <0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x1 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x1 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x1 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x1>; | |
| + qcom,allow-aging-voltage-adjustment = <0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x1 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x1 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x1>; | |
| qcom,allow-quotient-interpolation; | |
| qcom,allow-voltage-interpolation; | |
| - qcom,corner-allow-temp-adjustment = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x0 0x0 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x0 0x0 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x0 0x0 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x0 0x0 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x0 0x0 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x0 0x0 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x0 0x0 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x0 0x0 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x0 0x0 0x0 0x0 0x0>; | |
| - qcom,corner-frequencies = <0x26e8f000 0x3dcc5000 0x538ab800 0x64b54000 0x6b931000 0x74bad000 0x7829b800 0x802c8000 0x839b6800 0x26e8f000 0x3dcc5000 0x538ab800 0x64b54000 0x6b931000 0x74bad000 0x7829b800 0x26e8f000 0x3dcc5000 0x538ab800 0x64b54000 0x6b931000 0x74bad000 0x7829b800 0x26e8f000 0x3dcc5000 0x538ab800 0x64b54000 0x6b931000 0x74bad000 0x7829b800 0x802c8000 0x839b6800>; | |
| + qcom,corner-allow-temp-adjustment = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x0 0x0 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x0 0x0 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x0 0x0 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x0 0x0 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x0 0x0 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x0 0x0 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x0 0x0 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x0 0x0 0x0 0x0 0x0 0x1 0x1 0x1 0x1 0x0 0x0 0x0 0x0 0x0>; | |
| + qcom,corner-frequencies = <0x26e8f000 0x3dcc5000 0x538ab800 0x64b54000 0x6ddd0000 0x74bad000 0x7829b800 0x802c8000 0x839b6800 0x26e8f000 0x3dcc5000 0x538ab800 0x64b54000 0x6ddd0000 0x74bad000 0x7829b800 0x26e8f000 0x3dcc5000 0x538ab800 0x64b54000 0x6ddd0000 0x74bad000 0x7829b800 0x802c8000 0x839b6800>; | |
| qcom,cpr-aging-max-voltage-adjustment = <0x3a98>; | |
| qcom,cpr-aging-ref-corner = <0x6>; | |
| qcom,cpr-aging-ro-scaling-factor = <0xaf0>; | |
| - qcom,cpr-closed-loop-voltage-fuse-adjustment = <0x0 0x0 0x0 0x0 0x2710 0xffffc568 0x0 0x61a8 0x2710 0xffffc568 0x0 0x61a8 0xffffec78 0xffff8ad0 0xffffc568 0x2710 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x2710 0xffffc568 0x0 0x61a8 0x2710 0xffffc568 0x0 0x61a8 0xffffec78 0xffff8ad0 0xffffc568 0x2710 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x2710 0xffffc568 0x0 0x61a8 0x2710 0xffffc568 0x0 0x61a8 0xffffec78 0xffff8ad0 0xffffc568 0x2710 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x2710 0xffffc568 0x0 0x61a8 0x2710 0xffffc568 0x0 0x61a8 0xffffec78 0xffff8ad0 0xffffc568 0x2710 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>; | |
| - qcom,cpr-corner-fmax-map = <0x1 0x2 0x4 0x9 0x0 0x0 0x0 0x0 0x1 0x2 0x4 0x7 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x1 0x2 0x4 0x7 0x1 0x2 0x4 0x9>; | |
| + qcom,cpr-closed-loop-voltage-fuse-adjustment = <0x0 0x0 0x0 0x0 0x2710 0xffffc568 0x0 0x61a8 0x2710 0xffffc568 0x0 0x61a8 0xffffec78 0xffff8ad0 0xffffc568 0x2710 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x2710 0xffffc568 0x0 0x61a8 0x2710 0xffffc568 0x0 0x61a8 0xffffec78 0xffff8ad0 0xffffc568 0x2710 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x2710 0xffffc568 0x0 0x61a8 0x2710 0xffffc568 0x0 0x61a8 0xffffec78 0xffff8ad0 0xffffc568 0x2710 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>; | |
| + qcom,cpr-corner-fmax-map = <0x1 0x2 0x4 0x9 0x0 0x0 0x0 0x0 0x1 0x2 0x4 0x7 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x1 0x2 0x4 0x9>; | |
| qcom,cpr-corner1-temp-core-voltage-adjustment = <0x0 0xffffec78 0xffffc568 0xffffb1e0>; | |
| qcom,cpr-corner2-temp-core-voltage-adjustment = <0x0 0xffffec78 0xffffc568 0xffffc568>; | |
| qcom,cpr-corner3-temp-core-voltage-adjustment = <0x0 0xffffec78 0xffffc568 0x0>; | |
| qcom,cpr-corner4-temp-core-voltage-adjustment = <0x0 0xffffec78 0xffffc568 0x0>; | |
| - qcom,cpr-corners = <0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x7 0x7 0x7 0x7 0x7 0x7 0x7 0x7 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x7 0x7 0x7 0x7 0x7 0x7 0x7 0x7 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9>; | |
| - qcom,cpr-floor-to-ceiling-max-range = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350>; | |
| + qcom,cpr-corners = <0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x7 0x7 0x7 0x7 0x7 0x7 0x7 0x7 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9>; | |
| + qcom,cpr-floor-to-ceiling-max-range = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350 0xc350>; | |
| qcom,cpr-fuse-combos = <0x40>; | |
| qcom,cpr-fuse-corners = <0x4>; | |
| - qcom,cpr-misc-fuse-voltage-adjustment = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x7530 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x7530 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x7530 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x7530 0x0 0x0 0x0 0x0 0x0 0x0>; | |
| - qcom,cpr-open-loop-voltage-fuse-adjustment = <0x0 0x0 0x0 0x0 0x61a8 0x0 0x1388 0x9c40 0x61a8 0x0 0x1388 0x9c40 0x61a8 0x0 0x1388 0x9c40 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x61a8 0x0 0x1388 0x9c40 0x61a8 0x0 0x1388 0x9c40 0x61a8 0x0 0x1388 0x9c40 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x61a8 0x0 0x1388 0x9c40 0x61a8 0x0 0x1388 0x9c40 0x61a8 0x0 0x1388 0x9c40 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x61a8 0x0 0x1388 0x9c40 0x61a8 0x0 0x1388 0x9c40 0x61a8 0x0 0x1388 0x9c40 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>; | |
| + qcom,cpr-misc-fuse-voltage-adjustment = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x7530 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x7530 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x7530 0x0 0x0 0x0 0x0 0x0 0x0>; | |
| + qcom,cpr-open-loop-voltage-fuse-adjustment = <0x0 0x0 0x0 0x0 0x61a8 0x0 0x1388 0x9c40 0x61a8 0x0 0x1388 0x9c40 0x61a8 0x0 0x1388 0x9c40 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x61a8 0x0 0x1388 0x9c40 0x61a8 0x0 0x1388 0x9c40 0x61a8 0x0 0x1388 0x9c40 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x61a8 0x0 0x1388 0x9c40 0x61a8 0x0 0x1388 0x9c40 0x61a8 0x0 0x1388 0x9c40 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>; | |
| qcom,cpr-ro-scaling-factor = <0xe1a 0xece 0x0 0x898 0x992 0x906 0x87a 0x8a2 0x91a 0x8a2 0x9a6 0x924 0x30c 0xa8c 0x992 0x82a 0xe1a 0xece 0x0 0x898 0x992 0x906 0x87a 0x8a2 0x91a 0x8a2 0x9a6 0x924 0x30c 0xa8c 0x992 0x82a 0xe1a 0xece 0x0 0x898 0x992 0x906 0x87a 0x8a2 0x91a 0x8a2 0x9a6 0x924 0x30c 0xa8c 0x992 0x82a 0xe1a 0xece 0x0 0x898 0x992 0x906 0x87a 0x8a2 0x91a 0x8a2 0x9a6 0x924 0x30c 0xa8c 0x992 0x82a>; | |
| qcom,cpr-scaled-open-loop-voltage-as-ceiling; | |
| - qcom,cpr-speed-bin-corners = <0x9 0x0 0x7 0x0 0x0 0x0 0x7 0x9>; | |
| + qcom,cpr-speed-bin-corners = <0x9 0x0 0x7 0x0 0x0 0x0 0x0 0x9>; | |
| qcom,cpr-speed-bins = <0x8>; | |
| - qcom,cpr-voltage-ceiling = <0xae8f8 0xc0df0 0xd1f60 0xd32e8 0xe09c0 0xf1b30 0x104028 0x104028 0x104028 0xae8f8 0xc0df0 0xd1f60 0xd32e8 0xe09c0 0xf1b30 0x104028 0xae8f8 0xc0df0 0xd1f60 0xd32e8 0xe09c0 0xf1b30 0x104028 0xae8f8 0xc0df0 0xd1f60 0xd32e8 0xe09c0 0xf1b30 0x104028 0x104028 0x104028>; | |
| - qcom,cpr-voltage-floor = <0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120>; | |
| - qcom,mem-acc-voltage = <0x1 0x1 0x2 0x2 0x2 0x2 0x2 0x2 0x2 0x1 0x1 0x2 0x2 0x2 0x2 0x2 0x1 0x1 0x2 0x2 0x2 0x2 0x2 0x1 0x1 0x2 0x2 0x2 0x2 0x2 0x2 0x2>; | |
| + qcom,cpr-voltage-ceiling = <0xae8f8 0xc0df0 0xd1f60 0xd32e8 0xe09c0 0xf1b30 0x104028 0x104028 0x104028 0xae8f8 0xc0df0 0xd1f60 0xd32e8 0xe09c0 0xf1b30 0x104028 0xae8f8 0xc0df0 0xd1f60 0xd32e8 0xe09c0 0xf1b30 0x104028 0x104028 0x104028>; | |
| + qcom,cpr-voltage-floor = <0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120 0x7a120>; | |
| + qcom,mem-acc-voltage = <0x1 0x1 0x2 0x2 0x2 0x2 0x2 0x2 0x2 0x1 0x1 0x2 0x2 0x2 0x2 0x2 0x1 0x1 0x2 0x2 0x2 0x2 0x2 0x2 0x2>; | |
| regulator-max-microvolt = <0x9>; | |
| regulator-min-microvolt = <0x1>; | |
| regulator-name = "apc_corner"; | |
| @@ -2301,7 +2301,7 @@ | |
| devfreq-cpufreq { | |
| cpubw-cpufreq { | |
| - cpu-to-dev-map = <0x9f600 0x64b 0xfd200 0xc95 0x156300 0x16e3 0x19c800 0x192d 0x1b8a00 0x1bc0 0x1de200 0x1bc0 0x21b100 0x1bc0>; | |
| + cpu-to-dev-map = <0x9f600 0x64b 0xfd200 0xc95 0x156300 0x16e3 0x19c800 0x192d 0x1c2000 0x1bc0 0x1de200 0x1bc0 0x21b100 0x1bc0>; | |
| target-dev = <0xfb>; | |
| }; | |
| @@ -2886,6 +2886,22 @@ | |
| vdd-supply = <0xde>; | |
| }; | |
| + goodix_ts@14 { | |
| + compatible = "goodix,gt9xx"; | |
| + goodix,cfg-group0 = [45 38 04 80 07 0a 35 41 01 0a 26 0b 5a 32 05 05 00 00 00 00 00 00 05 14 14 26 14 8c 2e 0e 4a 4c f4 0a f4 0a 00 ba 33 11 00 00 00 00 00 05 03 28 78 96 3a 1e 5a 8f 90 03 00 00 00 04 ce 21 00 b0 29 28 98 34 00 87 41 60 7b 51 00 7b 18 38 60 00 f0 55 40 aa a0 27 00 04 53 00 00 00 00 00 00 02 00 00 00 00 00 00 00 00 00 00 3c 00 00 00 00 28 02 04 06 08 0a 0c 0e 10 12 14 16 18 1a 1c 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 04 06 08 0a 0c 0f 10 12 13 14 16 18 1c 1d 1e 1f 20 21 22 24 26 28 29 2a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 23 01]; | |
| + goodix,irq-gpio = <0xbe 0x41 0x2008>; | |
| + goodix,rst-gpio = <0xbe 0x40 0x0>; | |
| + interrupt-parent = <0xbe>; | |
| + interrupts = <0x41 0x0>; | |
| + pinctrl-0 = <0xe4 0xe5>; | |
| + pinctrl-1 = <0xe6 0xe7>; | |
| + pinctrl-2 = <0xe8>; | |
| + pinctrl-names = "pmx_ts_active", "pmx_ts_suspend", "pmx_ts_release"; | |
| + reg = <0x14>; | |
| + vcc_i2c-supply = <0xe3>; | |
| + vdd_ana-supply = <0xde>; | |
| + }; | |
| + | |
| imagis@50 { | |
| compatible = "imagis,ist30xx-ts"; | |
| imagis,i2c-pull-up; | |
| @@ -2947,20 +2963,20 @@ | |
| reg-names = "qup_phys_addr"; | |
| nq@28 { | |
| - #qcom,clk-src = "BBCLK2"; | |
| - #qcom,nq-clkreq = <0xec 0x2 0x0>; | |
| clock-names = "ref_clk"; | |
| clocks = <0x37 0x498938e5>; | |
| - compatible = "nxp,nfc-548"; | |
| + compatible = "qcom,nq-nci"; | |
| interrupt-names = "nfc_irq"; | |
| interrupt-parent = <0xbe>; | |
| interrupts = <0x11 0x0>; | |
| - nxp-nfc-548,firm-gpio = <0xbe 0x3e 0x0>; | |
| - nxp-nfc-548,irq-gpio = <0xbe 0x11 0x0>; | |
| - nxp-nfc-548,ven-gpio = <0xbe 0x10 0x0>; | |
| pinctrl-0 = <0xed 0xee>; | |
| pinctrl-1 = <0xef 0xf0>; | |
| pinctrl-names = "nfc_active", "nfc_suspend"; | |
| + qcom,clk-src = "BBCLK2"; | |
| + qcom,nq-clkreq = <0xec 0x2 0x0>; | |
| + qcom,nq-firm = <0xbe 0x3e 0x0>; | |
| + qcom,nq-irq = <0xbe 0x11 0x0>; | |
| + qcom,nq-ven = <0xbe 0x10 0x0>; | |
| reg = <0x28>; | |
| }; | |
| }; | |
| @@ -4000,7 +4016,7 @@ | |
| }; | |
| mux { | |
| - function = "gpio"; | |
| + function = "mdp_vsync"; | |
| pins = "gpio24"; | |
| }; | |
| }; | |
| @@ -4016,7 +4032,7 @@ | |
| }; | |
| mux { | |
| - function = "gpio"; | |
| + function = "mdp_vsync"; | |
| pins = "gpio24"; | |
| }; | |
| }; | |
| @@ -6120,14 +6136,12 @@ | |
| linux,phandle = <0xb3>; | |
| phandle = <0xb3>; | |
| qcom,num-clusters = <0x2>; | |
| - qcom,speed0-bin-v0-cci = <0x0 0x0 0xf906000 0x1 0x18b82000 0x2 0x216ab000 0x3 0x28488000 0x4 0x2b07a000 0x5 0x2eb12000 0x6 0x3010b000 0x7>; | |
| - qcom,speed0-bin-v0-cl = <0x0 0x0 0x26e8f000 0x1 0x3dcc5000 0x2 0x538ab800 0x3 0x64b54000 0x4 0x6b931000 0x5 0x74bad000 0x6 0x7829b800 0x7>; | |
| - qcom,speed2-bin-v0-cci = <0x0 0x0 0xf906000 0x1 0x18b82000 0x2 0x216ab000 0x3 0x28488000 0x4 0x2b07a000 0x5 0x2eb12000 0x6 0x3010b000 0x7>; | |
| - qcom,speed2-bin-v0-cl = <0x0 0x0 0x26e8f000 0x1 0x3dcc5000 0x2 0x538ab800 0x3 0x64b54000 0x4 0x6b931000 0x5 0x74bad000 0x6 0x7829b800 0x7>; | |
| - qcom,speed6-bin-v0-cci = <0x0 0x0 0xf906000 0x1 0x18b82000 0x2 0x216ab000 0x3 0x28488000 0x4 0x2b07a000 0x5>; | |
| - qcom,speed6-bin-v0-cl = <0x0 0x0 0x26e8f000 0x1 0x3dcc5000 0x2 0x538ab800 0x3 0x64b54000 0x4 0x6b931000 0x5>; | |
| - qcom,speed7-bin-v0-cci = <0x0 0x0 0xf906000 0x1 0x18b82000 0x2 0x216ab000 0x3 0x28488000 0x4 0x2b07a000 0x5 0x2eb12000 0x6 0x3010b000 0x7 0x33450000 0x8 0x34a49000 0x9>; | |
| - qcom,speed7-bin-v0-cl = <0x0 0x0 0x26e8f000 0x1 0x3dcc5000 0x2 0x538ab800 0x3 0x64b54000 0x4 0x6b931000 0x5 0x74bad000 0x6 0x7829b800 0x7 0x802c8000 0x8 0x839b6800 0x9>; | |
| + qcom,speed0-bin-v0-cci = <0x0 0x0 0xf906000 0x1 0x18b82000 0x2 0x216ab000 0x3 0x28488000 0x4 0x2bf20000 0x5 0x2eb12000 0x6 0x3010b000 0x7>; | |
| + qcom,speed0-bin-v0-cl = <0x0 0x0 0x26e8f000 0x1 0x3dcc5000 0x2 0x538ab800 0x3 0x64b54000 0x4 0x6ddd0000 0x5 0x74bad000 0x6 0x7829b800 0x7>; | |
| + qcom,speed2-bin-v0-cci = <0x0 0x0 0xf906000 0x1 0x18b82000 0x2 0x216ab000 0x3 0x28488000 0x4 0x2bf20000 0x5 0x2eb12000 0x6 0x3010b000 0x7>; | |
| + qcom,speed2-bin-v0-cl = <0x0 0x0 0x26e8f000 0x1 0x3dcc5000 0x2 0x538ab800 0x3 0x64b54000 0x4 0x6ddd0000 0x5 0x74bad000 0x6 0x7829b800 0x7>; | |
| + qcom,speed7-bin-v0-cci = <0x0 0x0 0xf906000 0x1 0x18b82000 0x2 0x216ab000 0x3 0x28488000 0x4 0x2bf20000 0x5 0x2eb12000 0x6 0x3010b000 0x7 0x33450000 0x8 0x34a49000 0x9>; | |
| + qcom,speed7-bin-v0-cl = <0x0 0x0 0x26e8f000 0x1 0x3dcc5000 0x2 0x538ab800 0x3 0x64b54000 0x4 0x6ddd0000 0x5 0x74bad000 0x6 0x7829b800 0x7 0x802c8000 0x8 0x839b6800 0x9>; | |
| reg = <0xb114000 0x68 0xb014000 0x68 0xb116000 0x400 0xb111050 0x8 0xb011050 0x8 0xb1d1050 0x8 0xa4124 0x8>; | |
| reg-names = "rcgwr-c0-base", "rcgwr-c1-base", "c0-pll", "c0-mux", "c1-mux", "cci-mux", "efuse"; | |
| vdd-cl-supply = <0xfa>; | |
| @@ -6150,12 +6164,12 @@ | |
| qcom,csid@1b30000 { | |
| cell-index = <0x0>; | |
| - clock-names = "camss_top_ahb_clk", "ispif_ahb_clk", "csi_ahb_clk", "csi_src_clk", "csi0_phy_clk", "csi_clk", "csi_pix_clk", "csi_rdi_clk", "camss_ahb_clk"; | |
| - clocks = <0x37 0x4e814a78 0x37 0x3c0a858f 0x37 0x175d672a 0x37 0x227e65bc 0x37 0x6a41ff7 0x37 0x6b01b3e1 0x37 0x61a8a930 0x37 0x7053c7ae 0x37 0x9894b414>; | |
| + clock-names = "camss_top_ahb_clk", "ispif_ahb_clk", "csi_ahb_clk", "csi_src_clk", "csi_clk", "csi_pix_clk", "csi_rdi_clk", "camss_ahb_clk"; | |
| + clocks = <0x37 0x4e814a78 0x37 0x3c0a858f 0x37 0x175d672a 0x37 0x227e65bc 0x37 0x6b01b3e1 0x37 0x61a8a930 0x37 0x7053c7ae 0x37 0x9894b414>; | |
| compatible = "qcom,csid-v3.5.1", "qcom,csid"; | |
| interrupt-names = "csid"; | |
| interrupts = <0x0 0x33 0x0>; | |
| - qcom,clock-rates = <0x0 0x3ab06a0 0x0 0xbebc200 0x0 0x0 0x0 0x0 0x0>; | |
| + qcom,clock-rates = <0x0 0x3ab06a0 0x0 0xbebc200 0x0 0x0 0x0 0x0>; | |
| qcom,csi-vdd-voltage = <0x12b128>; | |
| qcom,mipi-csi-vdd-supply = <0x17b>; | |
| reg = <0x1b30000 0x400>; | |
| @@ -6165,12 +6179,12 @@ | |
| qcom,csid@1b30400 { | |
| cell-index = <0x1>; | |
| - clock-names = "camss_top_ahb_clk", "ispif_ahb_clk", "csi_ahb_clk", "csi_src_clk", "csi1_phy_clk", "csi_clk", "csi_pix_clk", "csi_rdi_clk", "camss_ahb_clk"; | |
| - clocks = <0x37 0x4e814a78 0x37 0x3c0a858f 0x37 0x2c2dc261 0x37 0x6a2a6c36 0x37 0xfd1d1fa 0x37 0x1aba4a8c 0x37 0x87fc98d8 0x37 0x6ac996fe 0x37 0x9894b414>; | |
| + clock-names = "camss_top_ahb_clk", "ispif_ahb_clk", "csi_ahb_clk", "csi_src_clk", "csi_clk", "csi_pix_clk", "csi_rdi_clk", "camss_ahb_clk"; | |
| + clocks = <0x37 0x4e814a78 0x37 0x3c0a858f 0x37 0x2c2dc261 0x37 0x6a2a6c36 0x37 0x1aba4a8c 0x37 0x87fc98d8 0x37 0x6ac996fe 0x37 0x9894b414>; | |
| compatible = "qcom,csid-v3.5.1", "qcom,csid"; | |
| interrupt-names = "csid"; | |
| interrupts = <0x0 0x34 0x0>; | |
| - qcom,clock-rates = <0x0 0x3ab06a0 0x0 0xbebc200 0x0 0x0 0x0 0x0 0x0>; | |
| + qcom,clock-rates = <0x0 0x3ab06a0 0x0 0xbebc200 0x0 0x0 0x0 0x0>; | |
| qcom,csi-vdd-voltage = <0x12b128>; | |
| qcom,mipi-csi-vdd-supply = <0x17b>; | |
| reg = <0x1b30400 0x400>; | |
| @@ -6180,12 +6194,12 @@ | |
| qcom,csid@1b30800 { | |
| cell-index = <0x2>; | |
| - clock-names = "camss_top_ahb_clk", "ispif_ahb_clk", "csi_ahb_clk", "csi_src_clk", "csi2_phy_clk", "csi_clk", "csi_pix_clk", "csi_rdi_clk", "camss_ahb_clk"; | |
| - clocks = <0x37 0x4e814a78 0x37 0x3c0a858f 0x37 0xf3f25940 0x37 0x4113589f 0x37 0xbeeffbcd 0x37 0xb6857fa2 0x37 0xa619561a 0x37 0x19fd3f1 0x37 0x9894b414>; | |
| + clock-names = "camss_top_ahb_clk", "ispif_ahb_clk", "csi_ahb_clk", "csi_src_clk", "csi_clk", "csi_pix_clk", "csi_rdi_clk", "camss_ahb_clk"; | |
| + clocks = <0x37 0x4e814a78 0x37 0x3c0a858f 0x37 0xf3f25940 0x37 0x4113589f 0x37 0xb6857fa2 0x37 0xa619561a 0x37 0x19fd3f1 0x37 0x9894b414>; | |
| compatible = "qcom,csid-v3.5.1", "qcom,csid"; | |
| interrupt-names = "csid"; | |
| interrupts = <0x0 0x99 0x0>; | |
| - qcom,clock-rates = <0x0 0x3ab06a0 0x0 0xbebc200 0x0 0x0 0x0 0x0 0x0>; | |
| + qcom,clock-rates = <0x0 0x3ab06a0 0x0 0xbebc200 0x0 0x0 0x0 0x0>; | |
| qcom,csi-vdd-voltage = <0x12b128>; | |
| qcom,mipi-csi-vdd-supply = <0x17b>; | |
| reg = <0x1b30800 0x400>; | |
| @@ -6195,12 +6209,12 @@ | |
| qcom,csiphy@1b34000 { | |
| cell-index = <0x0>; | |
| - clock-names = "camss_top_ahb_clk", "ispif_ahb_clk", "csiphy_timer_src_clk", "csiphy_timer_clk", "camss_ahb_src", "camss_ahb_clk"; | |
| - clocks = <0x37 0x4e814a78 0x37 0x3c0a858f 0x37 0xc8a309be 0x37 0xf8897589 0x37 0xf92304fb 0x37 0x9894b414>; | |
| + clock-names = "camss_top_ahb_clk", "ispif_ahb_clk", "csiphy_timer_src_clk", "csiphy_timer_clk", "camss_ahb_src", "csi_phy_clk", "camss_ahb_clk"; | |
| + clocks = <0x37 0x4e814a78 0x37 0x3c0a858f 0x37 0xc8a309be 0x37 0xf8897589 0x37 0xf92304fb 0x37 0x6a41ff7 0x37 0x9894b414>; | |
| compatible = "qcom,csiphy-v3.5", "qcom,csiphy"; | |
| interrupt-names = "csiphy"; | |
| interrupts = <0x0 0x4e 0x0>; | |
| - qcom,clock-rates = <0x0 0x3ab06a0 0xbebc200 0x0 0x0 0x0>; | |
| + qcom,clock-rates = <0x0 0x3ab06a0 0xbebc200 0x0 0x0 0x0 0x0>; | |
| reg = <0x1b34000 0x1000 0x1b00030 0x4>; | |
| reg-names = "csiphy", "csiphy_clk_mux"; | |
| status = "ok"; | |
| @@ -6208,12 +6222,12 @@ | |
| qcom,csiphy@1b35000 { | |
| cell-index = <0x1>; | |
| - clock-names = "camss_top_ahb_clk", "ispif_ahb_clk", "csiphy_timer_src_clk", "csiphy_timer_clk", "camss_ahb_src", "camss_ahb_clk"; | |
| - clocks = <0x37 0x4e814a78 0x37 0x3c0a858f 0x37 0x7c0fe23a 0x37 0x4d26438f 0x37 0xf92304fb 0x37 0x9894b414>; | |
| + clock-names = "camss_top_ahb_clk", "ispif_ahb_clk", "csiphy_timer_src_clk", "csiphy_timer_clk", "camss_ahb_src", "csi_phy_clk", "camss_ahb_clk"; | |
| + clocks = <0x37 0x4e814a78 0x37 0x3c0a858f 0x37 0x7c0fe23a 0x37 0x4d26438f 0x37 0xf92304fb 0x37 0xfd1d1fa 0x37 0x9894b414>; | |
| compatible = "qcom,csiphy-v3.5", "qcom,csiphy"; | |
| interrupt-names = "csiphy"; | |
| interrupts = <0x0 0x4f 0x0>; | |
| - qcom,clock-rates = <0x0 0x3ab06a0 0xbebc200 0x0 0x0 0x0>; | |
| + qcom,clock-rates = <0x0 0x3ab06a0 0xbebc200 0x0 0x0 0x0 0x0>; | |
| reg = <0x1b35000 0x1000 0x1b00038 0x4>; | |
| reg-names = "csiphy", "csiphy_clk_mux"; | |
| status = "ok"; | |
| @@ -6221,12 +6235,12 @@ | |
| qcom,csiphy@1b36000 { | |
| cell-index = <0x2>; | |
| - clock-names = "camss_top_ahb_clk", "ispif_ahb_clk", "csiphy_timer_src_clk", "csiphy_timer_clk", "camss_ahb_src", "camss_ahb_clk"; | |
| - clocks = <0x37 0x4e814a78 0x37 0x3c0a858f 0x37 0x62ffea9c 0x37 0xe768898c 0x37 0xf92304fb 0x37 0x9894b414>; | |
| + clock-names = "camss_top_ahb_clk", "ispif_ahb_clk", "csiphy_timer_src_clk", "csiphy_timer_clk", "camss_ahb_src", "csi_phy_clk", "camss_ahb_clk"; | |
| + clocks = <0x37 0x4e814a78 0x37 0x3c0a858f 0x37 0x62ffea9c 0x37 0xe768898c 0x37 0xf92304fb 0x37 0xbeeffbcd 0x37 0x9894b414>; | |
| compatible = "qcom,csiphy-v3.5", "qcom,csiphy"; | |
| interrupt-names = "csiphy"; | |
| interrupts = <0x0 0x13b 0x0>; | |
| - qcom,clock-rates = <0x0 0x3ab06a0 0xbebc200 0x0 0x0 0x0>; | |
| + qcom,clock-rates = <0x0 0x3ab06a0 0xbebc200 0x0 0x0 0x0 0x0>; | |
| reg = <0x1b36000 0x1000 0x1b00040 0x4>; | |
| reg-names = "csiphy", "csiphy_clk_mux"; | |
| status = "ok"; | |
| @@ -7806,7 +7820,7 @@ | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-off-command = [29 01 00 00 00 00 02 ff 00 05 01 00 00 14 00 02 28 00 05 01 00 00 3c 00 02 10 00 29 01 00 00 00 00 02 ff 00 29 01 00 00 14 00 02 4f 01]; | |
| qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; | |
| - qcom,mdss-dsi-on-command = [29 01 00 00 01 00 02 ff 05 29 01 00 00 00 00 02 fb 01 29 01 00 00 00 00 02 d6 22 29 01 00 00 00 00 02 ff 00 29 01 00 00 00 00 02 fb 01 29 01 00 00 00 00 02 35 00 29 01 00 00 00 00 02 51 ff 29 01 00 00 00 00 02 53 2c 29 01 00 00 00 00 02 55 00 29 01 00 00 00 00 02 d3 0e 29 01 00 00 00 00 02 d4 07 29 01 00 00 78 00 02 11 00 29 01 00 00 14 00 02 29 00]; | |
| + qcom,mdss-dsi-on-command = <0x29010000 0x10002ff 0x4290100 0x2 0xfb012901 0x0 0x2080529 0x1000001 0x2ff05 0x29010000 0x2fb 0x1290100 0x2 0xd6222901 0x0 0x2ff0029 0x1000000 0x2fb01 0x29010000 0x235 0x290100 0x2 0x51ff2901 0x0 0x2532c29 0x1000000 0x25500 0x29010000 0x2d3 0xe290100 0x2 0xd4072901 0x7800 0x2110029 0x1000014 0x22900>; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-panel-height = <0x780>; | |
| @@ -7818,7 +7832,7 @@ | |
| qcom,mdss-dsi-panel-status-read-length = <0x1>; | |
| qcom,mdss-dsi-panel-status-value = <0x9c>; | |
| qcom,mdss-dsi-panel-timings = <0x7d251d00 0x37332227 0x1e030400>; | |
| - qcom,mdss-dsi-panel-timings-8996 = <0x241f0809 0x50304a0 0x241f0809 0x50304a0 0x241f0809 0x50304a0 0x241f0809 0x50304a0 0x241b0809 0x50304a0>; | |
| + qcom,mdss-dsi-panel-timings-phy-v2 = <0x241f0809 0x50304a0 0x241f0809 0x50304a0 0x241f0809 0x50304a0 0x241f0809 0x50304a0 0x241b0809 0x50304a0>; | |
| qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-reset-sequence = <0x1 0xa 0x0 0xa 0x1 0xa>; | |
| @@ -7841,8 +7855,6 @@ | |
| }; | |
| qcom,mdss_dsi_nt35596_fhd_video { | |
| - linux,phandle = <0x1a6>; | |
| - phandle = <0x1a6>; | |
| qcom,esd-check-enabled; | |
| qcom,mdss-dsi-CABC_off-command = [29 01 00 00 01 00 02 ff 00 29 01 00 00 00 00 02 55 00]; | |
| qcom,mdss-dsi-CABC_off-command-state = "dsi_hs_mode"; | |
| @@ -7883,7 +7895,7 @@ | |
| qcom,mdss-dsi-panel-status-read-length = <0x1>; | |
| qcom,mdss-dsi-panel-status-valid-params = <0x1>; | |
| qcom,mdss-dsi-panel-status-value = <0x9c>; | |
| - qcom,mdss-dsi-panel-timings-8996 = <0x241f0809 0x50304a0 0x241f0809 0x50304a0 0x241f0809 0x50304a0 0x241f0809 0x50304a0 0x241b0808 0x50304a0>; | |
| + qcom,mdss-dsi-panel-timings-phy-v2 = <0x241f0809 0x50304a0 0x241f0809 0x50304a0 0x241f0809 0x50304a0 0x241f0809 0x50304a0 0x241b0808 0x50304a0>; | |
| qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-reset-sequence = <0x1 0x5 0x0 0x5 0x1 0x5 0x0 0x5 0x1 0x14>; | |
| @@ -7905,6 +7917,8 @@ | |
| }; | |
| qcom,mdss_dsi_nt35596_tianma_fhd_video { | |
| + linux,phandle = <0x1a6>; | |
| + phandle = <0x1a6>; | |
| qcom,esd-check-enabled; | |
| qcom,mdss-dsi-CABC_off-command = [29 01 00 00 00 00 02 ff 00 29 01 00 00 00 00 02 55 00]; | |
| qcom,mdss-dsi-CABC_off-command-state = "dsi_hs_mode"; | |
| @@ -7956,7 +7970,7 @@ | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-off-command = [29 01 00 00 00 00 02 ff 00 05 01 00 00 14 00 02 28 00 05 01 00 00 3c 00 02 10 00]; | |
| qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; | |
| - qcom,mdss-dsi-on-command = [29 01 00 00 01 00 02 ff 00 29 01 00 00 00 00 02 fb 01 29 01 00 00 00 00 02 35 00 29 01 00 00 00 00 02 36 00 29 01 00 00 00 00 02 51 ff 29 01 00 00 00 00 02 53 2c 29 01 00 00 00 00 02 55 00 29 01 00 00 00 00 02 d3 06 29 01 00 00 00 00 02 d4 0e 29 01 00 00 00 00 02 ff 01 29 01 00 00 00 00 02 fb 01 29 01 00 00 00 00 02 72 21 29 01 00 00 00 00 02 6d 33 29 01 00 00 00 00 02 ff 05 29 01 00 00 00 00 02 fb 01 29 01 00 00 00 00 02 e7 80 29 01 00 00 00 00 02 ff 00 29 01 00 00 78 00 02 11 00 29 01 00 00 14 00 02 29 00]; | |
| + qcom,mdss-dsi-on-command = [29 01 00 00 01 00 02 ff 04 29 01 00 00 00 00 02 fb 01 29 01 00 00 00 00 02 08 05 29 01 00 00 01 00 02 ff 00 29 01 00 00 00 00 02 fb 01 29 01 00 00 00 00 02 35 00 29 01 00 00 00 00 02 36 00 29 01 00 00 00 00 02 51 ff 29 01 00 00 00 00 02 53 2c 29 01 00 00 00 00 02 55 00 29 01 00 00 00 00 02 d3 06 29 01 00 00 00 00 02 d4 0e 29 01 00 00 00 00 02 ff 01 29 01 00 00 00 00 02 fb 01 29 01 00 00 00 00 02 72 21 29 01 00 00 00 00 02 6d 33 29 01 00 00 00 00 02 ff 05 29 01 00 00 00 00 02 fb 01 29 01 00 00 00 00 02 e7 80 29 01 00 00 00 00 02 ff 00 29 01 00 00 78 00 02 11 00 29 01 00 00 14 00 02 29 00]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-panel-height = <0x780>; | |
| @@ -7967,7 +7981,7 @@ | |
| qcom,mdss-dsi-panel-status-command-mode = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-status-read-length = <0x1>; | |
| qcom,mdss-dsi-panel-status-value = <0x9c>; | |
| - qcom,mdss-dsi-panel-timings-8996 = <0x231e0809 0x50304a0 0x231e0809 0x50304a0 0x231e0809 0x50304a0 0x231e0809 0x50304a0 0x231a0809 0x50304a0>; | |
| + qcom,mdss-dsi-panel-timings-phy-v2 = <0x241f0809 0x50304a0 0x241f0809 0x50304a0 0x241f0809 0x50304a0 0x241f0809 0x50304a0 0x241b0808 0x50304a0>; | |
| qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-reset-sequence = <0x1 0x5 0x0 0x5 0x1 0x5 0x0 0x5 0x1 0x14>; | |
| @@ -7990,6 +8004,61 @@ | |
| qcom,panel-supply-entries = <0x19f>; | |
| }; | |
| + qcom,mdss_dsi_otm1911_fhd_video { | |
| + qcom,mdss-dsi-bl-max-level = <0xfff>; | |
| + qcom,mdss-dsi-bl-min-level = <0x1>; | |
| + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; | |
| + qcom,mdss-dsi-bllp-eof-power-mode; | |
| + qcom,mdss-dsi-bllp-power-mode; | |
| + qcom,mdss-dsi-border-color = <0x0>; | |
| + qcom,mdss-dsi-bpp = <0x18>; | |
| + qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| + qcom,mdss-dsi-h-back-porch = <0x19>; | |
| + qcom,mdss-dsi-h-front-porch = <0x18>; | |
| + qcom,mdss-dsi-h-left-border = <0x0>; | |
| + qcom,mdss-dsi-h-pulse-width = <0x14>; | |
| + qcom,mdss-dsi-h-right-border = <0x0>; | |
| + qcom,mdss-dsi-h-sync-pulse = <0x1>; | |
| + qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| + qcom,mdss-dsi-lane-0-state; | |
| + qcom,mdss-dsi-lane-1-state; | |
| + qcom,mdss-dsi-lane-2-state; | |
| + qcom,mdss-dsi-lane-3-state; | |
| + qcom,mdss-dsi-mdp-trigger = "none"; | |
| + qcom,mdss-dsi-off-command = [39 01 00 00 32 00 02 28 00 39 01 00 00 78 00 02 10 00]; | |
| + qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| + qcom,mdss-dsi-on-command = [39 01 00 00 00 00 02 00 00 39 01 00 00 00 00 04 ff 19 11 01 39 01 00 00 00 00 02 00 80 39 01 00 00 00 00 03 ff 19 11 39 01 00 00 00 00 02 00 c0 39 01 00 00 00 00 0d cb fe f4 f4 f4 00 00 00 00 f4 07 00 00 39 01 00 00 00 00 02 51 ff 39 01 00 00 00 00 02 53 2c 39 01 00 00 00 00 02 55 00 39 01 00 00 78 00 02 11 00 39 01 00 00 14 00 02 29 00]; | |
| + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| + qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| + qcom,mdss-dsi-panel-height = <0x780>; | |
| + qcom,mdss-dsi-panel-max-error-count = <0x3>; | |
| + qcom,mdss-dsi-panel-name = "otm1911 fhd video mode dsi panel"; | |
| + qcom,mdss-dsi-panel-status-check-mode = "TE_check_NT35596"; | |
| + qcom,mdss-dsi-panel-status-command = <0x6010001 0x500010a>; | |
| + qcom,mdss-dsi-panel-status-command-mode = "dsi_lp_mode"; | |
| + qcom,mdss-dsi-panel-status-read-length = <0x1>; | |
| + qcom,mdss-dsi-panel-status-value = <0x9c>; | |
| + qcom,mdss-dsi-panel-timings = <0x7d251d00 0x37332227 0x1e030400>; | |
| + qcom,mdss-dsi-panel-timings-phy-v2 = <0x231e0708 0x50304a0 0x231e0708 0x50304a0 0x231e0708 0x50304a0 0x231e0708 0x50304a0 0x23180708 0x50304a0>; | |
| + qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| + qcom,mdss-dsi-panel-width = <0x438>; | |
| + qcom,mdss-dsi-reset-sequence = <0x1 0xa 0x0 0xa 0x1 0xa>; | |
| + qcom,mdss-dsi-stream = <0x0>; | |
| + qcom,mdss-dsi-t-clk-post = <0xd>; | |
| + qcom,mdss-dsi-t-clk-pre = <0x2d>; | |
| + qcom,mdss-dsi-traffic-mode = "burst_mode"; | |
| + qcom,mdss-dsi-underflow-color = <0xff>; | |
| + qcom,mdss-dsi-v-back-porch = <0x6>; | |
| + qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| + qcom,mdss-dsi-v-front-porch = <0xe>; | |
| + qcom,mdss-dsi-v-pulse-width = <0x2>; | |
| + qcom,mdss-dsi-v-top-border = <0x0>; | |
| + qcom,mdss-dsi-virtual-channel-id = <0x0>; | |
| + qcom,mdss-pan-physical-height-dimension = <0x7a>; | |
| + qcom,mdss-pan-physical-width-dimension = <0x45>; | |
| + qcom,panel-supply-entries = <0x19f>; | |
| + }; | |
| + | |
| qcom,mdss_dsi_r69006_1080p_cmd { | |
| qcom,esd-check-enabled; | |
| qcom,mdss-dsi-bl-max-level = <0xfff>; | |
| @@ -8559,7 +8628,7 @@ | |
| clock-names = "l2_clk", "cpu0_clk", "cpu1_clk", "cpu2_clk", "cpu3_clk", "cpu4_clk", "cpu5_clk", "cpu6_clk", "cpu7_clk"; | |
| clocks = <0xb3 0x96854074 0xb3 0x2e6af930 0xb3 0x2e6af930 0xb3 0x2e6af930 0xb3 0x2e6af930 0xb3 0x2e6af930 0xb3 0x2e6af930 0xb3 0x2e6af930 0xb3 0x2e6af930>; | |
| compatible = "qcom,msm-cpufreq"; | |
| - qcom,cpufreq-table = <0x9f600 0xfd200 0x156300 0x19c800 0x1b8a00 0x1de200 0x1ec300 0x20d000 0x21b100>; | |
| + qcom,cpufreq-table = <0x9f600 0xfd200 0x156300 0x19c800 0x1c2000 0x1de200 0x1ec300 0x20d000 0x21b100>; | |
| }; | |
| qcom,msm-dai-fe { | |
| @@ -10306,6 +10375,11 @@ | |
| }; | |
| gpio@c700 { | |
| + #qcom,invert = <0x0>; | |
| + #qcom,mode = <0x0>; | |
| + #qcom,pull = <0x0>; | |
| + #qcom,src-sel = <0x0>; | |
| + #status = "disabled"; | |
| qcom,master-en = <0x0>; | |
| qcom,pin-num = <0x8>; | |
| reg = <0xc700 0x100>; | |
| @@ -10402,6 +10476,7 @@ | |
| interrupt-names = "kpdpwr", "resin", "resin-bark", "kpdpwr-resin-bark"; | |
| interrupts = <0x0 0x8 0x0 0x0 0x8 0x1 0x0 0x8 0x4 0x0 0x8 0x5>; | |
| qcom,pon-dbc-delay = <0x3d09>; | |
| + qcom,store-hard-reset-reason; | |
| qcom,system-reset; | |
| reg = <0x800 0x100>; | |
| @@ -10420,15 +10495,6 @@ | |
| qcom,pon-type = <0x1>; | |
| qcom,pull-up = <0x1>; | |
| }; | |
| - | |
| - qcom,pon_3 { | |
| - qcom,pon-type = <0x3>; | |
| - qcom,pull-up = <0x1>; | |
| - qcom,s1-timer = <0x1a40>; | |
| - qcom,s2-timer = <0x7d0>; | |
| - qcom,s2-type = <0x7>; | |
| - qcom,support-reset = <0x1>; | |
| - }; | |
| }; | |
| qcom,revid@100 { | |
| @@ -10781,19 +10847,18 @@ | |
| qcom,bcl-mh-threshold-ma = <0x195>; | |
| qcom,capacity-learning-on; | |
| qcom,cold-bat-decidegc = <0x0>; | |
| - qcom,cool-bat-decidegc = <0x64>; | |
| + qcom,cool-bat-decidegc = <0x96>; | |
| qcom,cycle-counter-en; | |
| qcom,fg-cc-cv-threshold-mv = <0x111c>; | |
| qcom,fg-chg-iterm-ma = <0x64>; | |
| qcom,fg-cutoff-voltage-mv = <0xd48>; | |
| qcom,fg-iterm-ma = <0x96>; | |
| qcom,fg-vbat-estimate-diff-mv = <0xc8>; | |
| - qcom,hold-soc-while-full; | |
| qcom,hot-bat-decidegc = <0x226>; | |
| qcom,pmic-revid = <0x11d>; | |
| qcom,resume-soc = <0x63>; | |
| qcom,thermal-coefficients = [c8 86 c1 50 d3 37]; | |
| - qcom,warm-bat-decidegc = <0x1f4>; | |
| + qcom,warm-bat-decidegc = <0x1c2>; | |
| spmi-dev-container; | |
| status = "okay"; | |
| @@ -10854,14 +10919,14 @@ | |
| qcom,charge-unknown-battery; | |
| qcom,chg-inhibit-fg; | |
| qcom,fastchg-current-comp = <0x384>; | |
| - qcom,float-voltage-comp = <0xb>; | |
| + qcom,float-voltage-comp = <0x10>; | |
| qcom,float-voltage-mv = <0x1130>; | |
| qcom,force-aicl-rerun; | |
| qcom,iterm-ma = <0x64>; | |
| qcom,pmic-revid = <0x11d>; | |
| qcom,resume-delta-mv = <0x32>; | |
| qcom,rparasitic-uohm = <0x186a0>; | |
| - qcom,thermal-mitigation = <0xbb8 0x9c4 0x7d0 0x5dc 0x3e8 0x1f4 0x0>; | |
| + qcom,thermal-mitigation = <0xbb8 0x9c4 0x7d0 0x7d0 0x3e8 0x1f4 0x0>; | |
| spmi-dev-container; | |
| status = "okay"; | |
| @@ -11312,8 +11377,8 @@ | |
| qos-entries = <0x8>; | |
| qos-regs = <0x2c4 0x2c8 0x2cc 0x2d0 0x2d4 0x2d8 0x2dc 0x2e0>; | |
| qos-settings = <0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55>; | |
| - reg = <0x1b10000 0x1000 0x1b40000 0x200 0xa4174 0x8>; | |
| - reg-names = "vfe", "vfe_vbif", "vfe_fuse"; | |
| + reg = <0x1b10000 0x1000 0x1b40000 0x200>; | |
| + reg-names = "vfe", "vfe_vbif"; | |
| vbif-entries = <0x1>; | |
| vbif-regs = <0x124>; | |
| vbif-settings = <0x3>; | |
| @@ -11336,8 +11401,8 @@ | |
| qos-entries = <0x8>; | |
| qos-regs = <0x2c4 0x2c8 0x2cc 0x2d0 0x2d4 0x2d8 0x2dc 0x2e0>; | |
| qos-settings = <0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55>; | |
| - reg = <0x1b14000 0x1000 0x1ba0000 0x200 0xa4174 0x8>; | |
| - reg-names = "vfe", "vfe_vbif", "vfe_fuse"; | |
| + reg = <0x1b14000 0x1000 0x1ba0000 0x200>; | |
| + reg-names = "vfe", "vfe_vbif"; | |
| vbif-entries = <0x1>; | |
| vbif-regs = <0x124>; | |
| vbif-settings = <0x3>; | |
| @@ -11350,7 +11415,6 @@ | |
| compatible = "qcom,msm-vidc"; | |
| interrupts = <0x0 0x2c 0x0>; | |
| qcom,allowed-clock-rates = <0x1bb75640 0x17d78400 0x15752a00 0x127a3980 0xd9fb390 0x6cfed50>; | |
| - qcom,capability-version = <0x2000 0xd>; | |
| qcom,clock-configs = <0x1 0x0 0x0 0x0 0x0>; | |
| qcom,dcvs-limit = <0x7e90 0x18 0x7e90 0x18>; | |
| qcom,dcvs-tbl = <0xc7380 0xc7380 0xef100 0x3f00000c 0xdb240 0xc876c 0xef100 0x4000004 0xc7380 0xafc80 0xcc000 0x4000004>; | |
| @@ -11364,8 +11428,8 @@ | |
| qcom,reg-presets = <0xe0020 0x5555556 0xe0024 0x5555556 0x80124 0x3>; | |
| qcom,slave-side-cp; | |
| qcom,sw-power-collapse; | |
| - reg = <0x1d00000 0xff000 0xa4124 0x4 0xa0164 0x4>; | |
| - reg-names = "vidc", "efuse", "efuse2"; | |
| + reg = <0x1d00000 0xff000 0xa4124 0x4>; | |
| + reg-names = "vidc", "efuse"; | |
| venus-core0-supply = <0xb9>; | |
| venus-supply = <0xb8>; | |
| @@ -11536,7 +11600,7 @@ | |
| reg = <0xe3000 0x1000>; | |
| }; | |
| - qseecom@84a00000 { | |
| + qseecom@84A00000 { | |
| clock-names = "core_clk_src", "core_clk", "iface_clk", "bus_clk"; | |
| clocks = <0x37 0x37a21414 0x37 0xd390d2 0x37 0x94de4919 0x37 0xd4415c9b>; | |
| compatible = "qcom,qseecom"; | |
| @@ -11757,12 +11821,12 @@ | |
| qcom,ea-pc = <0x200>; | |
| reg = <0xc140000 0x2c000 0xc104000 0x2a000>; | |
| reg-names = "slimbus_physical", "slimbus_bam_physical"; | |
| - status = "disabled"; | |
| + status = "disable"; | |
| msm_dai_slim { | |
| compatible = "qcom,msm-dai-slim"; | |
| elemental-addr = [ff ff ff fe 17 02]; | |
| - status = "disabled"; | |
| + status = "disable"; | |
| }; | |
| tasha_codec { | |
| @@ -11802,7 +11866,7 @@ | |
| qcom,cdc-vdd-tx-h-current = <0x61a8>; | |
| qcom,cdc-vdd-tx-h-voltage = <0x1b7740 0x1b7740>; | |
| qcom,wcd-rst-gpio-node = <0xf2>; | |
| - status = "disabled"; | |
| + status = "disable"; | |
| swr_master { | |
| #address-cells = <0x2>; | |
| @@ -11916,7 +11980,7 @@ | |
| qcom,wsa-max-devs = <0x1>; | |
| reg = <0xc051000 0x4 0xc051004 0x4 0xc055000 0x4 0xc052000 0x4>; | |
| reg-names = "csr_gp_io_mux_mic_ctl", "csr_gp_io_mux_spkr_ctl", "csr_gp_io_lpaif_pri_pcm_pri_mode_muxsel", "csr_gp_io_mux_quin_ctl"; | |
| - status = "disabled"; | |
| + status = "disable"; | |
| }; | |
| spi@78b7000 { | |
| @@ -12339,7 +12403,7 @@ | |
| pinctrl-0 = <0x175>; | |
| pinctrl-names = "default"; | |
| qcom,gpio-connect = <0xbe 0x49 0x0>; | |
| - status = "disabled"; | |
| + status = "disable"; | |
| }; | |
| wcd_gpio_ctrl { | |
| @@ -12350,7 +12414,7 @@ | |
| pinctrl-1 = <0x177>; | |
| pinctrl-names = "aud_active", "aud_sleep"; | |
| qcom,cdc-rst-n-gpio = <0xbe 0x43 0x0>; | |
| - status = "disabled"; | |
| + status = "disable"; | |
| }; | |
| wcn_etm0 { |
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