fontrom.vhd

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-- Company: 
-- Engineer: 
-- 
-- Create Date:    17:33:05 12/22/2015 
-- Design Name: 
-- Module Name:    fontrom - Behavioral 
-- Project Name: 
-- Target Devices: 
-- Tool versions: 
-- Description: 
--
-- Dependencies: 
--
-- Revision: 
-- Revision 0.01 - File Created
-- Additional Comments: 

--The font rom is organized in a way that the lower 7 Bits of the address
--contains the ASCII code of the char to display
--all other address bits are used as scan line index 
--so in the rom the organisation is that the first 128 bytes contains the first scan lines
--of all 128 characters, the next 128 bytes contain the second scan line, and so on
--The initalisation files are organized the other way around
--InitFromFile will therefore do a matrix tanspostion
--It also ignores remaining data when there are more then 128 character definitions.
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library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.std_logic_textio.all; -- declares hread

-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
use IEEE.NUMERIC_STD.ALL;

library STD;
use STD.textio.all;

-- Uncomment the following library declaration if instantiating
-- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;

entity fontrom is
    generic (RamFileName : string := "";
	          ScanLineBits : integer := 4;
	          NumberOfScanlines : integer := 12);
    Port ( clka : in  STD_LOGIC;
           addra : in  STD_LOGIC_VECTOR (ScanLineBits+7-1 downto 0);
           douta : out  STD_LOGIC_VECTOR (7 downto 0));
end fontrom;

architecture Behavioral of fontrom is

  constant NumberOfChars : integer := 128;

  type tRam is array (0 to NumberOfScanlines*NumberOfChars) of STD_LOGIC_VECTOR (7 downto 0);
  


--design time code


impure function InitFromFile  return tRam is
FILE RamFile : text is in RamFileName;
variable RamFileLine : line;
variable byte : STD_LOGIC_VECTOR(7 downto 0);
variable r : tRam;
variable charIndex, scanLine : integer;

begin
  charIndex := 0;
  scanLine := 0;
  for I in tRam'range loop
    if not endfile(RamFile) then
      readline (RamFile, RamFileLine);
      hread (RamFileLine, byte);
	   r(scanLine*NumberOfChars+charIndex) :=  byte;
	 else
 	   r(scanLine*NumberOfChars+charIndex) := X"00";
    end if;	
    scanLine:=scanLine+1;
    if scanLine=NumberOfScanlines then
      scanLine:=0;
      charIndex:=charIndex+1;
    end if;		
  end loop;
  
  return r; 
end function;
  
  
  signal ram : tRam := InitFromFile;


begin

   process(clka) begin
    if rising_edge(clka) then
         douta <= ram(to_integer(unsigned(addra)));   
	 end if;
  
  end process;

end Behavioral;