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TravMurav/ZZ__booyi.c

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Code generator for downstream qcom panel dtsi's
Raw
mipi_display_headers.py
#!/usr/bin/env python3
"""This module stores const names from mipi_display.h"""
# SPDX-License-Identifier: GPL-2.0-only
# Defines for Mobile Industry Processor Interface (MIPI(R))
# Display Working Group standards: DSI, DCS, DBI, DPI
#
# Copyright (C) 2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
# Copyright (C) 2006 Nokia Corporation
# Author: Imre Deak <imre.deak@nokia.com>
# MIPI DSI Processor-to-Peripheral transaction types
DSI_PROC_TYPES = {
"0x01": "MIPI_DSI_V_SYNC_START",
"0x11": "MIPI_DSI_V_SYNC_END",
"0x21": "MIPI_DSI_H_SYNC_START",
"0x31": "MIPI_DSI_H_SYNC_END",
"0x02": "MIPI_DSI_COLOR_MODE_OFF",
"0x12": "MIPI_DSI_COLOR_MODE_ON",
"0x22": "MIPI_DSI_SHUTDOWN_PERIPHERAL",
"0x32": "MIPI_DSI_TURN_ON_PERIPHERAL",
"0x03": "MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM",
"0x13": "MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM",
"0x23": "MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM",
"0x04": "MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM",
"0x14": "MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM",
"0x24": "MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM",
"0x05": "MIPI_DSI_DCS_SHORT_WRITE",
"0x15": "MIPI_DSI_DCS_SHORT_WRITE_PARAM",
"0x06": "MIPI_DSI_DCS_READ",
"0x07": "MIPI_DSI_DCS_COMPRESSION_MODE",
"0x0A": "MIPI_DSI_PPS_LONG_WRITE",
"0x37": "MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE",
"0x08": "MIPI_DSI_END_OF_TRANSMISSION",
"0x09": "MIPI_DSI_NULL_PACKET",
"0x19": "MIPI_DSI_BLANKING_PACKET",
"0x29": "MIPI_DSI_GENERIC_LONG_WRITE",
"0x39": "MIPI_DSI_DCS_LONG_WRITE",
"0x0c": "MIPI_DSI_LOOSELY_PACKED_PIXEL_STREAM_YCBCR20",
"0x1c": "MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR24",
"0x2c": "MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16",
"0x0d": "MIPI_DSI_PACKED_PIXEL_STREAM_30",
"0x1d": "MIPI_DSI_PACKED_PIXEL_STREAM_36",
"0x3d": "MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR12",
"0x0e": "MIPI_DSI_PACKED_PIXEL_STREAM_16",
"0x1e": "MIPI_DSI_PACKED_PIXEL_STREAM_18",
"0x2e": "MIPI_DSI_PIXEL_STREAM_3BYTE_18",
"0x3e": "MIPI_DSI_PACKED_PIXEL_STREAM_24",
}
# MIPI DSI Peripheral-to-Processor transaction types
DSI_PER_TYPES = {
"0x02": "MIPI_DSI_RX_ACKNOWLEDGE_AND_ERROR_REPORT",
"0x08": "MIPI_DSI_RX_END_OF_TRANSMISSION",
"0x11": "MIPI_DSI_RX_GENERIC_SHORT_READ_RESPONSE_1BYTE",
"0x12": "MIPI_DSI_RX_GENERIC_SHORT_READ_RESPONSE_2BYTE",
"0x1a": "MIPI_DSI_RX_GENERIC_LONG_READ_RESPONSE",
"0x1c": "MIPI_DSI_RX_DCS_LONG_READ_RESPONSE",
"0x21": "MIPI_DSI_RX_DCS_SHORT_READ_RESPONSE_1BYTE",
"0x22": "MIPI_DSI_RX_DCS_SHORT_READ_RESPONSE_2BYTE",
}
# MIPI DCS commands
DSC_COMMANDS = {
"0x00": "MIPI_DCS_NOP",
"0x01": "MIPI_DCS_SOFT_RESET",
"0x04": "MIPI_DCS_GET_DISPLAY_ID",
"0x06": "MIPI_DCS_GET_RED_CHANNEL",
"0x07": "MIPI_DCS_GET_GREEN_CHANNEL",
"0x08": "MIPI_DCS_GET_BLUE_CHANNEL",
"0x09": "MIPI_DCS_GET_DISPLAY_STATUS",
"0x0A": "MIPI_DCS_GET_POWER_MODE",
"0x0B": "MIPI_DCS_GET_ADDRESS_MODE",
"0x0C": "MIPI_DCS_GET_PIXEL_FORMAT",
"0x0D": "MIPI_DCS_GET_DISPLAY_MODE",
"0x0E": "MIPI_DCS_GET_SIGNAL_MODE",
"0x0F": "MIPI_DCS_GET_DIAGNOSTIC_RESULT",
"0x10": "MIPI_DCS_ENTER_SLEEP_MODE",
"0x11": "MIPI_DCS_EXIT_SLEEP_MODE",
"0x12": "MIPI_DCS_ENTER_PARTIAL_MODE",
"0x13": "MIPI_DCS_ENTER_NORMAL_MODE",
"0x20": "MIPI_DCS_EXIT_INVERT_MODE",
"0x21": "MIPI_DCS_ENTER_INVERT_MODE",
"0x26": "MIPI_DCS_SET_GAMMA_CURVE",
"0x28": "MIPI_DCS_SET_DISPLAY_OFF",
"0x29": "MIPI_DCS_SET_DISPLAY_ON",
"0x2A": "MIPI_DCS_SET_COLUMN_ADDRESS",
"0x2B": "MIPI_DCS_SET_PAGE_ADDRESS",
"0x2C": "MIPI_DCS_WRITE_MEMORY_START",
"0x2D": "MIPI_DCS_WRITE_LUT",
"0x2E": "MIPI_DCS_READ_MEMORY_START",
"0x30": "MIPI_DCS_SET_PARTIAL_AREA",
"0x33": "MIPI_DCS_SET_SCROLL_AREA",
"0x34": "MIPI_DCS_SET_TEAR_OFF",
"0x35": "MIPI_DCS_SET_TEAR_ON",
"0x36": "MIPI_DCS_SET_ADDRESS_MODE",
"0x37": "MIPI_DCS_SET_SCROLL_START",
"0x38": "MIPI_DCS_EXIT_IDLE_MODE",
"0x39": "MIPI_DCS_ENTER_IDLE_MODE",
"0x3A": "MIPI_DCS_SET_PIXEL_FORMAT",
"0x3C": "MIPI_DCS_WRITE_MEMORY_CONTINUE",
"0x3E": "MIPI_DCS_READ_MEMORY_CONTINUE",
"0x44": "MIPI_DCS_SET_TEAR_SCANLINE",
"0x45": "MIPI_DCS_GET_SCANLINE",
"0x51": "MIPI_DCS_SET_DISPLAY_BRIGHTNESS",
"0x52": "MIPI_DCS_GET_DISPLAY_BRIGHTNESS",
"0x53": "MIPI_DCS_WRITE_CONTROL_DISPLAY",
"0x54": "MIPI_DCS_GET_CONTROL_DISPLAY",
"0x55": "MIPI_DCS_WRITE_POWER_SAVE",
"0x56": "MIPI_DCS_GET_POWER_SAVE",
"0x5E": "MIPI_DCS_SET_CABC_MIN_BRIGHTNESS",
"0x5F": "MIPI_DCS_GET_CABC_MIN_BRIGHTNESS",
"0xA1": "MIPI_DCS_READ_DDB_START",
"0xA8": "MIPI_DCS_READ_DDB_CONTINUE",
}
# MIPI DCS pixel formats
MIPI_DCS_PIXEL_FMT_24BIT = 7
MIPI_DCS_PIXEL_FMT_18BIT = 6
MIPI_DCS_PIXEL_FMT_16BIT = 5
MIPI_DCS_PIXEL_FMT_12BIT = 3
MIPI_DCS_PIXEL_FMT_8BIT = 2
MIPI_DCS_PIXEL_FMT_3BIT = 1
Raw
panel_blob_parser.py
#!/usr/bin/env python3
"""
This module allows you to parse qcom downstream panel commands
"""
from mipi_display_headers import DSI_PROC_TYPES, DSC_COMMANDS
TEMPLATE_PREFIX = """
static int %%PANEL_NAME%%_panel_%%PANEL_COMMAND_ST%%(struct %%PANEL_NAME%%_panel *%%PANEL_NAME%%)
{
\t/* NOTE: This code is autogenerated */
\tstruct mipi_dsi_device *dsi = %%PANEL_NAME%%->dsi;
\tstruct device *dev = &%%PANEL_NAME%%->dsi->dev;
\tint ret;
"""
TEMPLATE_IFSTATEMENT = """
\tif (ret < 0) {
\t\tdev_err(dev, "failed on dsc command ` %%ERROR_TEXT%%` : %d\\n", ret);
\t\treturn ret;
\t}\n"""
TEMPLATE_POSTFIX = """
\treturn 0;
}
"""
def alligned_hex(data_bytes):
"""Returns HEX string alligned to one byte"""
return "0x" + ''.join(format(data_bytes, '02x'))
def re_base16(data):
"""Returns multiple HEX values"""
data_str = ""
for data_byte in data:
data_str += alligned_hex(data_byte)[2:] + " "
return data_str
def parse_command(data, panel_name, command_st):
"""Parse command blob"""
code = ""
code += TEMPLATE_PREFIX.replace("%%PANEL_NAME%%",
panel_name).replace("%%PANEL_COMMAND_ST%%", command_st)
data_iter = iter(data)
for byte_dtype in data_iter:
byte_last, byte_vc, byte_ack = next(
data_iter), next(data_iter), next(data_iter)
byte_wait = next(data_iter)
dlen = next(data_iter) << 8 | next(data_iter)
byte_command = next(data_iter)
if alligned_hex(byte_dtype) in DSI_PROC_TYPES:
code += "\t/* NOTE: " + DSI_PROC_TYPES[alligned_hex(byte_dtype)] + " */\n"
code += "\tret = mipi_dsi_dcs_write(dsi, "
if alligned_hex(byte_command) in DSC_COMMANDS:
code += DSC_COMMANDS[alligned_hex(byte_command)] + ", (u8[]){ "
else:
code += alligned_hex(byte_command) + ", (u8[]){ "
# TODO: drm_mipi_dsi.h
payload = [byte_command]
for i in range(dlen - 1):
next_byte = next(data_iter)
payload.append(next_byte)
code += alligned_hex(next_byte)
if i < (dlen - 2):
code += ", "
code += " }, " + str(dlen - 1) + ");\n"
code += TEMPLATE_IFSTATEMENT.replace("%%ERROR_TEXT%%",
re_base16(payload))
if byte_wait:
code += "\tmsleep(" + str(byte_wait) + ");\n\n"
else:
code += "\n"
code += TEMPLATE_POSTFIX
return code
TEST_DATA = """
39010000010002000039010000010004ff12870139010000010002008039010000010003ff128739
010000010002009239010000010002ff303901000001000200803901000001000Ac00064000f1100
640f1139010000010002009039010000010007c0005c000100043901000001000200a43901000001
0002c0003901000001000200b339010000010003c0005539010000010002008139010000010002c1
5539010000010002009039010000010005f50211021539010000010002009039010000010002c550
39010000010002009439010000010002c5663901000001000200b239010000010003f50000390100
0001000200b639010000010003f5000039010000010002009439010000010003f500003901000001
000200d239010000010003f506153901000001000200b439010000010002c5cc3901000001000200
a03901000001000Fc405100602051510051007020515103901000001000200b039010000010003c4
000039010000010002009139010000010003c5195239010000010002000039010000010003d8bcbc
3901000001000200b339010000010002c5843901000001000200bb39010000010002c58a39010000
010002008239010000010002c40a39010000010002000039010000010015E105445461727F81A998
B0554156383A2E23190C0539010000010002000039010000010015E205445461728080A999B05441
56383A2F231A0D0539010000010002000039010000010002d9713901000001000200803901000001
000Ccb000000000000000000000039010000010002009039010000010010cb000000000000000000
0000000000003901000001000200a039010000010010cb0000000000000000000000000000003901
000001000200b039010000010010cb0000000000000000000000000000003901000001000200c039
010000010010cb0505050505050000000000000000003901000001000200d039010000010010cb00
00000000050505050505050500003901000001000200e03901000001000Fcb000000000000000000
00000005053901000001000200f03901000001000Ccbffffffffffffffffffffff39010000010002
008039010000010010CC090B0D0F0103000000000000000000390100000100020090390100000100
10CC00000000002E2D0A0C0E10020400003901000001000200A03901000001000FCC000000000000
0000000000002E2D3901000001000200B039010000010010CC100E0C0A0402000000000000000000
3901000001000200C039010000010010CC00000000002D2E0F0D0B09030100003901000001000200
D03901000001000FCC0000000000000000000000002D2E3901000001000200803901000001000DCE
8B03008A03008903008803003901000001000200903901000001000FCE0000000000000000000000
0000003901000001000200A03901000001000FCE380784FC8B0400380684FD8B0400390100000100
0200B03901000001000FCE380584FE8B0400380484FF8B04003901000001000200C0390100000100
0FCE380385008B0400380285018B04003901000001000200D03901000001000FCE380185028B0400
380085038B04003901000001000200803901000001000FCF00000000000000000000000000003901
000001000200903901000001000FCF00000000000000000000000000003901000001000200A03901
000001000FCF00000000000000000000000000003901000001000200B03901000001000FCF000000
00000000000000000000003901000001000200C03901000001000CCF010120200000010100020239
01000001000200b539010000010007c533f1ff33f1ff3901000001000200B139010000010002c605
39010000010002000039010000010002350139010000010002000039010000010004ffffffff0501
00007800021100050100000000022900
"""
def main():
print(parse_command(bytearray.fromhex(
"".join(TEST_DATA.split())), "booyi_OTM1287", "on"))
if __name__ == '__main__':
main()
Raw
ZZ__booyi.c
static int booyi_OTM1287_panel_on(struct booyi_OTM1287_panel *booyi_OTM1287)
{
/* NOTE: This code is autogenerated */
struct mipi_dsi_device *dsi = booyi_OTM1287->dsi;
struct device *dev = &booyi_OTM1287->dsi->dev;
int ret;
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0x00 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 00 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xff, (u8[]){ 0x12, 0x87, 0x01 }, 3);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` ff 12 87 01 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0x80 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 80 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xff, (u8[]){ 0x12, 0x87 }, 2);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` ff 12 87 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0x92 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 92 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xff, (u8[]){ 0x30 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` ff 30 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0x80 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 80 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xc0, (u8[]){ 0x00, 0x64, 0x00, 0x0f, 0x11, 0x00, 0x64, 0x0f, 0x11 }, 9);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` c0 00 64 00 0f 11 00 64 0f 11 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0x90 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 90 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xc0, (u8[]){ 0x00, 0x5c, 0x00, 0x01, 0x00, 0x04 }, 6);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` c0 00 5c 00 01 00 04 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0xa4 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 a4 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xc0, (u8[]){ 0x00 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` c0 00 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0xb3 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 b3 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xc0, (u8[]){ 0x00, 0x55 }, 2);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` c0 00 55 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0x81 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 81 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xc1, (u8[]){ 0x55 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` c1 55 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0x90 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 90 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xf5, (u8[]){ 0x02, 0x11, 0x02, 0x15 }, 4);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` f5 02 11 02 15 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0x90 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 90 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xc5, (u8[]){ 0x50 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` c5 50 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0x94 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 94 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xc5, (u8[]){ 0x66 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` c5 66 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0xb2 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 b2 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xf5, (u8[]){ 0x00, 0x00 }, 2);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` f5 00 00 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0xb6 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 b6 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xf5, (u8[]){ 0x00, 0x00 }, 2);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` f5 00 00 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0x94 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 94 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xf5, (u8[]){ 0x00, 0x00 }, 2);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` f5 00 00 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0xd2 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 d2 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xf5, (u8[]){ 0x06, 0x15 }, 2);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` f5 06 15 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0xb4 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 b4 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xc5, (u8[]){ 0xcc }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` c5 cc ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0xa0 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 a0 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xc4, (u8[]){ 0x05, 0x10, 0x06, 0x02, 0x05, 0x15, 0x10, 0x05, 0x10, 0x07, 0x02, 0x05, 0x15, 0x10 }, 14);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` c4 05 10 06 02 05 15 10 05 10 07 02 05 15 10 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0xb0 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 b0 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xc4, (u8[]){ 0x00, 0x00 }, 2);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` c4 00 00 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0x91 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 91 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xc5, (u8[]){ 0x19, 0x52 }, 2);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` c5 19 52 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0x00 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 00 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xd8, (u8[]){ 0xbc, 0xbc }, 2);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` d8 bc bc ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0xb3 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 b3 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xc5, (u8[]){ 0x84 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` c5 84 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0xbb }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 bb ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xc5, (u8[]){ 0x8a }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` c5 8a ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0x82 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 82 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xc4, (u8[]){ 0x0a }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` c4 0a ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0x00 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 00 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xe1, (u8[]){ 0x05, 0x44, 0x54, 0x61, 0x72, 0x7f, 0x81, 0xa9, 0x98, 0xb0, 0x55, 0x41, 0x56, 0x38, 0x3a, 0x2e, 0x23, 0x19, 0x0c, 0x05 }, 20);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` e1 05 44 54 61 72 7f 81 a9 98 b0 55 41 56 38 3a 2e 23 19 0c 05 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0x00 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 00 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xe2, (u8[]){ 0x05, 0x44, 0x54, 0x61, 0x72, 0x80, 0x80, 0xa9, 0x99, 0xb0, 0x54, 0x41, 0x56, 0x38, 0x3a, 0x2f, 0x23, 0x1a, 0x0d, 0x05 }, 20);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` e2 05 44 54 61 72 80 80 a9 99 b0 54 41 56 38 3a 2f 23 1a 0d 05 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0x00 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 00 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xd9, (u8[]){ 0x71 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` d9 71 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0x80 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 80 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xcb, (u8[]){ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, 11);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` cb 00 00 00 00 00 00 00 00 00 00 00 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0x90 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 90 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xcb, (u8[]){ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, 15);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` cb 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0xa0 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 a0 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xcb, (u8[]){ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, 15);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` cb 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0xb0 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 b0 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xcb, (u8[]){ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, 15);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` cb 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0xc0 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 c0 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xcb, (u8[]){ 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, 15);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` cb 05 05 05 05 05 05 00 00 00 00 00 00 00 00 00 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0xd0 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 d0 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xcb, (u8[]){ 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x00, 0x00 }, 15);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` cb 00 00 00 00 00 05 05 05 05 05 05 05 05 00 00 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0xe0 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 e0 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xcb, (u8[]){ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x05 }, 14);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` cb 00 00 00 00 00 00 00 00 00 00 00 00 05 05 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0xf0 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 f0 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xcb, (u8[]){ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }, 11);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` cb ff ff ff ff ff ff ff ff ff ff ff ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0x80 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 80 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xcc, (u8[]){ 0x09, 0x0b, 0x0d, 0x0f, 0x01, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, 15);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` cc 09 0b 0d 0f 01 03 00 00 00 00 00 00 00 00 00 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0x90 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 90 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xcc, (u8[]){ 0x00, 0x00, 0x00, 0x00, 0x00, 0x2e, 0x2d, 0x0a, 0x0c, 0x0e, 0x10, 0x02, 0x04, 0x00, 0x00 }, 15);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` cc 00 00 00 00 00 2e 2d 0a 0c 0e 10 02 04 00 00 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0xa0 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 a0 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xcc, (u8[]){ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2e, 0x2d }, 14);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` cc 00 00 00 00 00 00 00 00 00 00 00 00 2e 2d ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0xb0 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 b0 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xcc, (u8[]){ 0x10, 0x0e, 0x0c, 0x0a, 0x04, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, 15);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` cc 10 0e 0c 0a 04 02 00 00 00 00 00 00 00 00 00 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0xc0 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 c0 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xcc, (u8[]){ 0x00, 0x00, 0x00, 0x00, 0x00, 0x2d, 0x2e, 0x0f, 0x0d, 0x0b, 0x09, 0x03, 0x01, 0x00, 0x00 }, 15);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` cc 00 00 00 00 00 2d 2e 0f 0d 0b 09 03 01 00 00 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0xd0 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 d0 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xcc, (u8[]){ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2d, 0x2e }, 14);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` cc 00 00 00 00 00 00 00 00 00 00 00 00 2d 2e ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0x80 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 80 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xce, (u8[]){ 0x8b, 0x03, 0x00, 0x8a, 0x03, 0x00, 0x89, 0x03, 0x00, 0x88, 0x03, 0x00 }, 12);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` ce 8b 03 00 8a 03 00 89 03 00 88 03 00 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0x90 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 90 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xce, (u8[]){ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, 14);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` ce 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0xa0 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 a0 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xce, (u8[]){ 0x38, 0x07, 0x84, 0xfc, 0x8b, 0x04, 0x00, 0x38, 0x06, 0x84, 0xfd, 0x8b, 0x04, 0x00 }, 14);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` ce 38 07 84 fc 8b 04 00 38 06 84 fd 8b 04 00 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0xb0 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 b0 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xce, (u8[]){ 0x38, 0x05, 0x84, 0xfe, 0x8b, 0x04, 0x00, 0x38, 0x04, 0x84, 0xff, 0x8b, 0x04, 0x00 }, 14);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` ce 38 05 84 fe 8b 04 00 38 04 84 ff 8b 04 00 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0xc0 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 c0 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xce, (u8[]){ 0x38, 0x03, 0x85, 0x00, 0x8b, 0x04, 0x00, 0x38, 0x02, 0x85, 0x01, 0x8b, 0x04, 0x00 }, 14);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` ce 38 03 85 00 8b 04 00 38 02 85 01 8b 04 00 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0xd0 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 d0 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xce, (u8[]){ 0x38, 0x01, 0x85, 0x02, 0x8b, 0x04, 0x00, 0x38, 0x00, 0x85, 0x03, 0x8b, 0x04, 0x00 }, 14);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` ce 38 01 85 02 8b 04 00 38 00 85 03 8b 04 00 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0x80 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 80 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xcf, (u8[]){ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, 14);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` cf 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0x90 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 90 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xcf, (u8[]){ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, 14);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` cf 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0xa0 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 a0 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xcf, (u8[]){ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, 14);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` cf 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0xb0 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 b0 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xcf, (u8[]){ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, 14);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` cf 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0xc0 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 c0 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xcf, (u8[]){ 0x01, 0x01, 0x20, 0x20, 0x00, 0x00, 0x01, 0x01, 0x00, 0x02, 0x02 }, 11);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` cf 01 01 20 20 00 00 01 01 00 02 02 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0xb5 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 b5 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xc5, (u8[]){ 0x33, 0xf1, 0xff, 0x33, 0xf1, 0xff }, 6);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` c5 33 f1 ff 33 f1 ff ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0xb1 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 b1 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xc6, (u8[]){ 0x05 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` c6 05 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0x00 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 00 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_SET_TEAR_ON, (u8[]){ 0x01 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 35 01 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_NOP, (u8[]){ 0x00 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 00 00 ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_LONG_WRITE */
ret = mipi_dsi_dcs_write(dsi, 0xff, (u8[]){ 0xff, 0xff, 0xff }, 3);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` ff ff ff ff ` : %d\n", ret);
return ret;
}
msleep(1)
/* NOTE: MIPI_DSI_DCS_SHORT_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_EXIT_SLEEP_MODE, (u8[]){ 0x00 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 11 00 ` : %d\n", ret);
return ret;
}
msleep(120)
/* NOTE: MIPI_DSI_DCS_SHORT_WRITE */
ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_SET_DISPLAY_ON, (u8[]){ 0x00 }, 1);
if (ret < 0) {
dev_err(dev, "failed on dsc command ` 29 00 ` : %d\n", ret);
return ret;
}
return 0;
}
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