Udayraj123

-------------------------------------------------------------------------------
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.numeric_std.ALL;
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-- Matrix multiplication in parallel
-- Two set of states used for this assignment.
-- These handle the sending data to board : (Reset,initSendA,sendA,sendA_2,initSendB,sendB,sendB_2,changeCol,readC,Halt,NextHalt)
-- These handle the calculation part (defined in rowmodule) : (Reset,firstStore,StoreAt_j,StoreAt_j_2, WaitCalc,WaitCalc_2,initCalc,CalcAt_i,CalcAt_i_2,changeCol,Halt,Finish);
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Udayraj123

--------------- SQROOT ENTITIY ------------------
library ieee; 
use ieee.std_logic_1164.all; 
use ieee.numeric_std.all;
-- use IEEE.STD_LOGIC_unsigned.ALL;
-- use IEEE.STD_LOGIC_arith.ALL;

entity sqroot is port( 
	clock      : in std_logic;  
	data_in    : in std_logic_vector(7 downto 0); 

Udayraj123

Blogs/Tips -
http://electrosofts.com/vhdl/
http://vhdlguru.blogspot.in/2011/02/difference-between-c-and-vhdl.html
http://www.deathbylogic.com/2011/03/vhdl-debounce/
http://vhdlguru.blogspot.in/2010/09/johnson-counter-is-digital-circuit.html
http://vhdlguru.blogspot.in/2010/09/examples-for-gate-level-and-behavior.html
http://www.fpga4student.com/2017/09/vhdl-code-for-seven-segment-display.html
http://vhdlguru.blogspot.in/2011/01/block-a

Udayraj123

module
    assign4try1(
        // FX2 interface -----------------------------------------------------------------------------
        input  wire      fx2Clk_in,     // 48MHz clock from FX2
        output wire[1:0] fx2Addr_out,   // select FIFO: "10" for EP6OUT, "11" for EP8IN
        inout  wire[7:0] fx2Data_io,    // 8-bit data to/from FX2
 
        // When EP6OUT selected:
        output wire      fx2Read_out,   // asserted (active-low) when reading from FX2
        output wire      fx2OE_out,     // asserted (active-low) to tell FX2 to drive bus

Udayraj123

module
    try3(
        // FX2 interface -----------------------------------------------------------------------------
        input  wire      fx2Clk_in,     // 48MHz clock from FX2
        output wire[1:0] fx2Addr_out,   // select FIFO: "10" for EP6OUT, "11" for EP8IN
        inout  wire[7:0] fx2Data_io,    // 8-bit data to/from FX2
 
        // When EP6OUT selected:
        output wire      fx2Read_out,   // asserted (active-low) when reading from FX2
        output wire      fx2OE_out,     // asserted (active-low) to tell FX2 to drive bus

Udayraj123

# Sane settings for Gnome
gsettings set org.gnome.desktop.background show-desktop-icons true
gsettings set org.gnome.desktop.interface clock-show-date true
gsettings set org.gnome.settings-daemon.plugins.xsettings antialiasing 'grayscale'
gsettings set org.gnome.settings-daemon.plugins.xsettings hinting 'slight'
gsettings set org.gnome.desktop.interface text-scaling-factor '1.0'
gsettings set org.gnome.desktop.interface monospace-font-name "Monospace 10"
gsettings set org.gnome.desktop.interface document-font-name 'Sans 10'
gsettings set org.gnome.desktop.interface font-name 'Cantarell 10'
gsettings set org.gnome.desktop.wm.preferences titlebar-font 'Cantarell Bold 10'