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@WrathfulSpatula
Created October 30, 2019 22:33
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Provisional Qrack benchmarks, for review and discussion
TEST_CASE("test_quantum_supremacy", "[supreme]")
{
// This is an attempt to simulate the circuit argued to establish quantum supremacy.
const int depth = 20;
benchmarkLoop([](QInterfacePtr qReg, int n) {
// The test runs 2 bit gates according to a tiling sequence.
// The 1 bit indicates +/- column offset.
// The 2 bit indicates +/- row offset.
std::list<bitLenInt> gateSequence = { 0, 3, 1, 2, 1, 2, 0, 3 };
// Depending on which element of the sequential tiling we're running, per depth iteration,
// we need to start either with row "0" or row "1".
std::map<bitLenInt, bitLenInt> sequenceRowStart;
sequenceRowStart[0] = 1;
sequenceRowStart[1] = 1;
sequenceRowStart[2] = 0;
sequenceRowStart[3] = 0;
// We factor the qubit count into two integers, as close to a perfect square as we can.
int rowLen = std::sqrt(n);
while (((n / rowLen) * rowLen) != n) {
rowLen--;
}
int colLen = n / rowLen;
// "1/6 of a full CZ" is read to indicate the 6th root of the gate operator.
complex sixthRoot = std::pow(-ONE_CMPLX, (real1)(1.0 / 6.0));
real1 gateRand;
bitLenInt gate;
int b1, b2;
bitLenInt i, d;
int row, col;
int tempRow, tempCol;
bool startsEvenRow;
bitLenInt controls[1];
// We repeat the entire prepartion for "depth" iterations.
// We can avoid entangling the representation of the entire state as a single Schr{\"o}dinger method unit.
for (d = 0; d < depth; d++) {
for (i = 0; i < n; i++) {
gateRand = qReg->Rand();
// Each individual bit has one of these 3 gates applied at random.
// Qrack has optimizations for gates including X, Y, and particularly H, but these "Sqrt" variants are
// handled as general single bit gates.
if (gateRand < (ONE_R1 / 3)) {
qReg->SqrtX(i);
} else if (gateRand < (2 * ONE_R1 / 3)) {
qReg->SqrtY(i);
} else {
// "Square root of W" is understood to be the square root of the Walsh-Hadamard transform,
// (a.k.a "H" gate).
qReg->SqrtH(i);
}
// This is a QUnit specific optimization attempt method that can "compress" (or "Schmidt decompose") the
// representation without changing the logical state of the QUnit, up to float error:
// qReg->TrySeparate(i);
}
gate = gateSequence.front();
gateSequence.pop_front();
gateSequence.push_back(gate);
startsEvenRow = ((sequenceRowStart[gate] & 1U) == 0U);
for (row = sequenceRowStart[gate]; row < (n / rowLen); row += 2) {
for (col = 0; col < (n / colLen); col++) {
// The following pattern is isomorphic to a 45 degree bias on a rectangle, for couplers.
// In this test, the boundaries of the rectangle have no couplers.
// In the interior bulk, one 2 bit gate is applied for every pair of bits, (as many gates as 1/2 the
// number of bits). (Unless n is a perfect square, the "row length" has to be factored into a
// rectangular shape, and "n" is sometimes prime or factors awkwardly.)
tempRow = row;
tempCol = col;
tempRow += ((gate & 2U) ? 1 : -1);
if (startsEvenRow) {
tempCol += ((gate & 1U) ? 0 : -1);
} else {
tempCol += ((gate & 1U) ? 1 : 0);
}
if ((tempRow < 0) || (tempCol < 0) || (tempRow >= rowLen) || (tempCol >= colLen)) {
continue;
}
b1 = row * rowLen + col;
b2 = tempRow * rowLen + tempCol;
// For the efficiency of QUnit's mapper, we transpose the row and column.
tempCol = b1 / rowLen;
tempRow = b1 - (tempCol * rowLen);
b1 = (tempRow * rowLen) + tempCol;
tempCol = b2 / rowLen;
tempRow = b2 - (tempCol * rowLen);
b2 = (tempRow * rowLen) + tempCol;
// "iSWAP" is read to be a SWAP operation that imparts a phase factor of i if the bits are
// different.
qReg->ISwap(b1, b2);
// "1/6 of CZ" is read to indicate the 6th root.
controls[0] = b1;
qReg->ApplyControlledSinglePhase(controls, 1U, b2, ONE_CMPLX, sixthRoot);
// Note that these gates are both symmetric under exchange of "b1" and "b2".
}
}
}
// We measure all bits once, after the circuit is run.
qReg->MReg(0, n);
});
}
4.15.0-66-generic #75-Ubuntu SMP Tue Oct 1 05:24:09 UTC 2019 x86_64 x86_64 x86_64 GNU/Linux
Motherboard: Alienware 17 R5
# dmidecode 3.1
Getting SMBIOS data from sysfs.
SMBIOS 3.1.1 present.
Handle 0x002A, DMI type 17, 40 bytes
Memory Device
Array Handle: 0x0029
Error Information Handle: Not Provided
Total Width: 64 bits
Data Width: 64 bits
Size: 16384 MB
Form Factor: SODIMM
Set: None
Locator: JDIMM1
Bank Locator: Not Specified
Type: DDR4
Type Detail: Synchronous
Speed: 2667 MT/s
Manufacturer: 802C0000802C
Serial Number: [redacted by Dan]
Asset Tag: 0F181700
Part Number: 16ATF2G64HZ-2G6E1
Rank: 2
Configured Clock Speed: 2667 MT/s
Minimum Voltage: 1.2 V
Maximum Voltage: 1.2 V
Configured Voltage: 1.2 V
Handle 0x002B, DMI type 17, 40 bytes
Memory Device
Array Handle: 0x0029
Error Information Handle: Not Provided
Total Width: 64 bits
Data Width: 64 bits
Size: 16384 MB
Form Factor: SODIMM
Set: None
Locator: JDIMM2
Bank Locator: Not Specified
Type: DDR4
Type Detail: Synchronous
Speed: 2667 MT/s
Manufacturer: 802C0000802C
Serial Number: [redacted by Dan]
Asset Tag: 0F181700
Part Number: 16ATF2G64HZ-2G6E1
Rank: 2
Configured Clock Speed: 2667 MT/s
Minimum Voltage: 1.2 V
Maximum Voltage: 1.2 V
Configured Voltage: 1.2 V
./benchmarks --proc-opencl-single --layer-qunit --max-qubits=63 [supreme]
Random Seed: 1572472363 (Overridden by hardware generation!)
############ QUnit -> QEngine -> OpenCL ############
Device #0, Loaded binary from: /home/iamu/.qrack/qrack_ocl_dev_0.ir
Device #1, Loaded binary from: /home/iamu/.qrack/qrack_ocl_dev_1.ir
Device #2, Loaded binary from: /home/iamu/.qrack/qrack_ocl_dev_2.ir
Default platform: NVIDIA CUDA
Default device: GeForce GTX 1070
OpenCL device #0: Intel(R) Gen9 HD Graphics NEO
OpenCL device #1: Intel(R) Core(TM) i7-8750H CPU @ 2.20GHz
OpenCL device #2: GeForce GTX 1070
>>> 'test_quantum_supremacy':
100 iterations
# of Qubits, Average Time (ms), Sample Std. Deviation (ms), Fastest (ms), 1st Quartile (ms), Median (ms), 3rd Quartile (ms), Slowest (ms)
4, 9.21826,0.674456,8.573,8.917,9.072,9.313,14.753
5, 3.30852,0.0893153,3.158,3.246,3.289,3.342,3.574
6, 9.26004,0.458848,8.72,8.9485,9.085,9.4505,11.054
7, 3.57032,0.239679,3.275,3.4075,3.512,3.647,4.476
8, 9.24222,0.294529,8.73,9.031,9.1905,9.405,10.083
9, 14.3402,0.48535,13.824,14.081,14.1805,14.4375,17.414
10, 9.23944,0.232928,8.839,9.0845,9.199,9.3435,10.048
11, 3.55796,0.160939,3.348,3.479,3.515,3.5905,4.466
12, 25.6998,0.739039,24.67,25.185,25.417,26.008,27.851
13, 3.63003,0.109527,3.462,3.5615,3.605,3.6615,4.101
14, 9.36931,0.268427,8.915,9.1955,9.29,9.466,10.254
15, 25.8698,0.711673,24.815,25.357,25.56,26.3475,27.873
16, 40.261,0.756249,39.152,39.723,40.105,40.5785,43.552
17, 3.8003,0.167844,3.528,3.7265,3.7715,3.8295,4.851
18, 25.9987,0.707578,25.118,25.5315,25.71,26.325,28.386
19, 3.87608,0.157641,3.714,3.807,3.8435,3.886,4.988
20, 40.9063,0.984959,39.566,40.2755,40.6535,41.2825,44.349
21, 27.1243,1.80652,25.352,26.003,26.5415,27.628,36.658
22, 10.0619,0.188037,9.697,9.943,10.0385,10.131,10.837
23, 4.30504,0.351373,4.031,4.1665,4.216,4.284,6.166
24, 43.6831,3.33223,40.957,42.1475,42.68,43.47,58.509
25, 52.7067,1.12146,51.218,51.9595,52.4175,53.134,56.76
26, 9.98116,0.323514,9.437,9.7885,9.8805,10.0285,11.282
27, 26.7821,0.759936,25.703,26.2115,26.526,27.2175,28.854
28, 41.5977,0.867032,40.266,40.9555,41.42,42.115,44.103
29, 4.39286,0.160753,4.077,4.291,4.3595,4.462,5.27
30, 97.8069,3.90662,95.442,96.705,97.256,97.917,134.645
31, 4.42702,0.107932,4.254,4.3395,4.412,4.48,4.717
32, 41.6702,0.717583,40.414,41.115,41.5115,41.981,44.182
33, 27.0638,1.26908,26.096,26.5465,26.766,27.0345,37.793
34, 10.3593,0.295229,9.889,10.1755,10.2635,10.426,11.856
35, 99.7679,3.2821,96.424,97.877,98.3775,99.4915,107.864
36, 102.888,4.92316,97.992,99.5255,101.012,103.736,116.878
37, 4.70637,0.144621,4.504,4.6145,4.676,4.7525,5.611
38, 10.5289,0.292176,10.04,10.3525,10.457,10.605,11.777
39, 27.3461,0.656172,26.066,26.8835,27.0955,27.6325,29.359
40, 98.6419,0.895743,96.604,97.96,98.536,99.199,101.226
41, 4.91486,0.169851,4.689,4.815,4.886,4.96,6.077
42, 102.875,4.68082,98.587,100.132,101.029,102.487,118.612
43, 5.01239,0.154241,4.788,4.9175,4.999,5.056,6.087
44, 42.642,0.844974,41.262,41.9945,42.4705,43.158,44.992
45, 99.562,1.22678,97.328,98.799,99.272,100.178,105.105
46, 11.0084,0.29483,10.533,10.8015,10.9215,11.0875,11.84
47, 5.16622,0.170077,4.888,5.0755,5.1245,5.199,6.27
48, 102.352,2.14377,99.762,100.858,101.665,103.021,110.952
49, 133.165,2.08914,130.413,131.653,132.769,133.844,140.537
50, 99.9147,0.919325,98.488,99.308,99.701,100.497,102.797
51, 28.2078,0.705577,27.223,27.755,28.0705,28.491,30.567
52, 43.3397,0.752389,41.959,42.7295,43.258,43.8855,45.327
53, 5.48083,0.165456,5.211,5.3785,5.4335,5.534,6.085
54, 102.543,1.38363,100.235,101.548,102.342,103.405,107.871
55, 100.518,1.10624,97.792,99.7415,100.339,101.075,104.232
56, 1950.77,7.80826,1937.36,1943.59,1952.31,1955.51,1992.98
57, 28.0653,0.743371,26.879,27.581,27.9585,28.3785,30.216
58, 11.5234,0.265634,11.055,11.3365,11.456,11.595,12.344
59, 5.78749,0.183925,5.406,5.6495,5.7465,5.9315,6.248
60, 104.073,2.39783,100.293,102.285,103.523,105.396,111.577
61, 5.81505,0.133347,5.48,5.741,5.7925,5.8845,6.13
62, 11.7091,0.252173,11.254,11.5505,11.6485,11.805,12.49
63, 2003.35,56.2846,1893.51,1962.07,1976.52,2041.35,2236.31
Passed 1 test case (no assertions).
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