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@aaronferrucci
Last active February 8, 2021 05:15
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SystemVerilog constraint solution for 538 riddler express problem "cross product 1"
class CrossProduct1 #(
int R0 = 135,
int R1 = 45,
int R2 = 64,
int R3 = 280,
int R4 = 70,
int C0 = 3000,
int C1 = 3969,
int C2 = 640);
rand int digit[4:0][2:0];
int rowprods[] = '{R0, R1, R2, R3, R4};
int colprods[] = '{C0, C1, C2};
constraint c_isdigit {
foreach (digit[r, c])
digit[r][c] inside {[0:9]};
}
constraint c_rowproducts {
foreach (digit[r])
digit[r][0] * digit[r][1] * digit[r][2] == rowprods[r];
}
constraint c_colproducts {
foreach (digit[,c])
digit[0][c] * digit[1][c] * digit[2][c] * digit[3][c] * digit[4][c] == colprods[c];
}
function void printrow(int row, int rp);
$display("\t%0d\t%0d\t%0d\t%0d", digit[row][0], digit[row][1], digit[row][2], rp);
endfunction
function void print;
foreach (rowprods[row])
printrow(row, rowprods[row]);
$display("\t%0d\t%0d\t%0d", C0, C1, C2);
endfunction
function void printNumbers;
foreach (digit[r])
$display("%0d%0d%0d", digit[4-r][0], digit[4-r][1], digit[4-r][2]);
endfunction
endclass
module top;
CrossProduct1 cr = new;
initial begin
assert(cr.randomize());
cr.print;
cr.printNumbers;
end
endmodule
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