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abelardojarab/compile_verilate.sh

Created November 7, 2017 19:55
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Compile a System Verilog project with Verilator
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compile_verilate.sh
#!/bin/bash
verilator -Wno-STMTDLY -Wno-PINMISSING -Wno-LITENDIAN -Wno-CASEX -Wno-CASEINCOMPLETE -Wno-COMBDLY -Wno-WIDTH -Wno-UNOPTFLAT -f vlog_files.list +define+VENDOR_ALTERA +define+TOOL_QUARTUS +define+NUM_AFUS=1 +define+NLB400_MODE_0 +define+ASE_PLATFORM_MCP_SKYLAKE -I./nlb_rtl/rtl/include_files/common -I./sim_lib_verilated -I./sim_lib --top-module ccip_std_afu -cc test.c
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