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#include "pins_arduino.h"
#include "wiring_private.h"
void spiwrite(uint8_t c)
{
int8_t i;
// MSB first, clock low when inactive (CPOL 0), data valid on leading edge (CPHA 0)
// Make sure clock starts low
// slow version - built in shiftOut function
//shiftOut(_mosi, _clk, MSBFIRST, c); return;
volatile uint8_t *clkportreg, *mosiportreg;
uint8_t clkpin, mosipin;
clkportreg = portOutputRegister(digitalPinToPort(_clk));
clkpin = digitalPinToBitMask(_clk);
mosiportreg = portOutputRegister(digitalPinToPort(_mosi));
mosipin = digitalPinToBitMask(_mosi);
for (i=7; i>=0; i--) {
*clkportreg &= ~clkpin;
if (c & (1<<i)) {
*mosiportreg |= mosipin;
} else {
*mosiportreg &= ~mosipin;
}
*clkportreg |= clkpin;
}
*clkportreg &= ~clkpin;
// Make sure clock ends low
}
uint8_t spiread(void)
{
//return shiftIn(_miso, _clk, MSBFIRST);
int8_t i, x;
x = 0;
volatile uint8_t *clkportreg, *misoportreg;
uint8_t clkpin, misopin;
clkportreg = portOutputRegister(digitalPinToPort(_clk));
clkpin = digitalPinToBitMask(_clk);
misoportreg = portInputRegister(digitalPinToPort(_miso));
misopin = digitalPinToBitMask(_miso);
// MSB first, clock low when inactive (CPOL 0), data valid on leading edge (CPHA 0)
// Make sure clock starts low
for (i=7; i>=0; i--) {
*clkportreg &= ~clkpin;
asm("nop; nop");
if ((*misoportreg) & misopin)
x |= (1<<i);
*clkportreg |= clkpin;
}
// Make sure clock ends low
*clkportreg &= ~clkpin;
return x;
}
void spiwrite(uint8_t c)
{
int8_t i;
// MSB first, clock low when inactive (CPOL 0), data valid on leading edge (CPHA 0)
// Make sure clock starts low
// slow version - built in shiftOut function
//shiftOut(_mosi, _clk, MSBFIRST, c); return;
volatile uint8_t *clkportreg, *mosiportreg;
uint8_t clkpin, mosipin;
clkportreg = portOutputRegister(digitalPinToPort(_clk));
clkpin = digitalPinToBitMask(_clk);
mosiportreg = portOutputRegister(digitalPinToPort(_mosi));
mosipin = digitalPinToBitMask(_mosi);
for (i=7; i>=0; i--) {
*clkportreg &= ~clkpin;
if (c & (1<<i)) {
*mosiportreg |= mosipin;
} else {
*mosiportreg &= ~mosipin;
}
*clkportreg |= clkpin;
}
*clkportreg &= ~clkpin;
// Make sure clock ends low
}
uint8_t spiread(void)
{
//return shiftIn(_miso, _clk, MSBFIRST);
int8_t i, x;
x = 0;
volatile uint8_t *clkportreg, *misoportreg;
uint8_t clkpin, misopin;
clkportreg = portOutputRegister(digitalPinToPort(_clk));
clkpin = digitalPinToBitMask(_clk);
misoportreg = portInputRegister(digitalPinToPort(_miso));
misopin = digitalPinToBitMask(_miso);
// MSB first, clock low when inactive (CPOL 0), data valid on leading edge (CPHA 0)
// Make sure clock starts low
for (i=7; i>=0; i--) {
*clkportreg &= ~clkpin;
asm("nop; nop");
if ((*misoportreg) & misopin)
x |= (1<<i);
*clkportreg |= clkpin;
}
// Make sure clock ends low
*clkportreg &= ~clkpin;
return x;
}
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Owner Author

@ghost ghost commented Oct 24, 2011

include "pins_arduino.h"

include "wiring_private.h"

is also needed, at top!

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