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android_land_dts
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| /dts-v1/; | |
| / { | |
| #address-cells = <0x2>; | |
| #size-cells = <0x2>; | |
| model = "Qualcomm Technologies, Inc. MSM8937-PMI8950 QRD SKU1"; | |
| compatible = "qcom,msm8937-pmi8950-qrd-sku1", "qcom,msm8937-qrd", "qcom,msm8937", "qcom,qrd"; | |
| qcom,msm-id = <0x126 0x0>; | |
| interrupt-parent = <0x1>; | |
| qcom,board-id = <0x1000b 0x1 0x2000b 0x1>; | |
| cpus { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| cpu-map { | |
| cluster0 { | |
| core0 { | |
| cpu = <0x2>; | |
| }; | |
| core1 { | |
| cpu = <0x3>; | |
| }; | |
| core2 { | |
| cpu = <0x4>; | |
| }; | |
| core3 { | |
| cpu = <0x5>; | |
| }; | |
| }; | |
| cluster1 { | |
| core0 { | |
| cpu = <0x6>; | |
| }; | |
| core1 { | |
| cpu = <0x7>; | |
| }; | |
| core2 { | |
| cpu = <0x8>; | |
| }; | |
| core3 { | |
| cpu = <0x9>; | |
| }; | |
| }; | |
| }; | |
| cpu@100 { | |
| device_type = "cpu"; | |
| compatible = "arm,cortex-a53"; | |
| reg = <0x100>; | |
| enable-method = "psci"; | |
| qcom,acc = <0xa>; | |
| qcom,limits-info = <0xb>; | |
| next-level-cache = <0xc>; | |
| linux,phandle = <0x6>; | |
| phandle = <0x6>; | |
| l2-cache { | |
| compatible = "arm,arch-cache"; | |
| cache-level = <0x2>; | |
| power-domain = <0xd>; | |
| qcom,dump-size = <0x0>; | |
| linux,phandle = <0xc>; | |
| phandle = <0xc>; | |
| }; | |
| l1-icache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x8800>; | |
| linux,phandle = <0x1f>; | |
| phandle = <0x1f>; | |
| }; | |
| l1-dcache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x9000>; | |
| linux,phandle = <0x27>; | |
| phandle = <0x27>; | |
| }; | |
| }; | |
| cpu@101 { | |
| device_type = "cpu"; | |
| compatible = "arm,cortex-a53"; | |
| reg = <0x101>; | |
| enable-method = "psci"; | |
| qcom,acc = <0xe>; | |
| qcom,limits-info = <0xf>; | |
| next-level-cache = <0xc>; | |
| linux,phandle = <0x7>; | |
| phandle = <0x7>; | |
| l1-icache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x8800>; | |
| linux,phandle = <0x20>; | |
| phandle = <0x20>; | |
| }; | |
| l1-dcache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x9000>; | |
| linux,phandle = <0x28>; | |
| phandle = <0x28>; | |
| }; | |
| }; | |
| cpu@102 { | |
| device_type = "cpu"; | |
| compatible = "arm,cortex-a53"; | |
| reg = <0x102>; | |
| enable-method = "psci"; | |
| qcom,acc = <0x10>; | |
| qcom,limits-info = <0x11>; | |
| next-level-cache = <0xc>; | |
| linux,phandle = <0x8>; | |
| phandle = <0x8>; | |
| l1-icache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x8800>; | |
| linux,phandle = <0x21>; | |
| phandle = <0x21>; | |
| }; | |
| l1-dcache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x9000>; | |
| linux,phandle = <0x29>; | |
| phandle = <0x29>; | |
| }; | |
| }; | |
| cpu@103 { | |
| device_type = "cpu"; | |
| compatible = "arm,cortex-a53"; | |
| reg = <0x103>; | |
| enable-method = "psci"; | |
| qcom,acc = <0x12>; | |
| qcom,limits-info = <0x13>; | |
| next-level-cache = <0xc>; | |
| linux,phandle = <0x9>; | |
| phandle = <0x9>; | |
| l1-icache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x8800>; | |
| linux,phandle = <0x22>; | |
| phandle = <0x22>; | |
| }; | |
| l1-dcache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x9000>; | |
| linux,phandle = <0x2a>; | |
| phandle = <0x2a>; | |
| }; | |
| }; | |
| cpu@0 { | |
| device_type = "cpu"; | |
| compatible = "arm,cortex-a53"; | |
| reg = <0x0>; | |
| enable-method = "psci"; | |
| qcom,acc = <0x14>; | |
| qcom,limits-info = <0x15>; | |
| next-level-cache = <0x16>; | |
| linux,phandle = <0x2>; | |
| phandle = <0x2>; | |
| l2-cache { | |
| compatible = "arm,arch-cache"; | |
| cache-level = <0x2>; | |
| power-domain = <0x17>; | |
| qcom,dump-size = <0x0>; | |
| linux,phandle = <0x16>; | |
| phandle = <0x16>; | |
| }; | |
| l1-icache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x8800>; | |
| linux,phandle = <0x1b>; | |
| phandle = <0x1b>; | |
| }; | |
| l1-dcache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x9000>; | |
| linux,phandle = <0x23>; | |
| phandle = <0x23>; | |
| }; | |
| }; | |
| cpu@1 { | |
| device_type = "cpu"; | |
| compatible = "arm,cortex-a53"; | |
| reg = <0x1>; | |
| enable-method = "psci"; | |
| qcom,acc = <0x18>; | |
| qcom,limits-info = <0x15>; | |
| next-level-cache = <0x16>; | |
| linux,phandle = <0x3>; | |
| phandle = <0x3>; | |
| l1-icache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x8800>; | |
| linux,phandle = <0x1c>; | |
| phandle = <0x1c>; | |
| }; | |
| l1-dcache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x9000>; | |
| linux,phandle = <0x24>; | |
| phandle = <0x24>; | |
| }; | |
| }; | |
| cpu@2 { | |
| device_type = "cpu"; | |
| compatible = "arm,cortex-a53"; | |
| reg = <0x2>; | |
| enable-method = "psci"; | |
| qcom,acc = <0x19>; | |
| qcom,limits-info = <0x15>; | |
| next-level-cache = <0x16>; | |
| linux,phandle = <0x4>; | |
| phandle = <0x4>; | |
| l1-icache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x8800>; | |
| linux,phandle = <0x1d>; | |
| phandle = <0x1d>; | |
| }; | |
| l1-dcache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x9000>; | |
| linux,phandle = <0x25>; | |
| phandle = <0x25>; | |
| }; | |
| }; | |
| cpu@3 { | |
| device_type = "cpu"; | |
| compatible = "arm,cortex-a53"; | |
| reg = <0x3>; | |
| enable-method = "psci"; | |
| qcom,acc = <0x1a>; | |
| qcom,limits-info = <0x15>; | |
| next-level-cache = <0x16>; | |
| linux,phandle = <0x5>; | |
| phandle = <0x5>; | |
| l1-icache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x8800>; | |
| linux,phandle = <0x1e>; | |
| phandle = <0x1e>; | |
| }; | |
| l1-dcache { | |
| compatible = "arm,arch-cache"; | |
| qcom,dump-size = <0x9000>; | |
| linux,phandle = <0x26>; | |
| phandle = <0x26>; | |
| }; | |
| }; | |
| }; | |
| soc { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| ranges = <0x0 0x0 0x0 0xffffffff>; | |
| compatible = "simple-bus"; | |
| pinctrl@1000000 { | |
| compatible = "qcom,msm8937-pinctrl"; | |
| reg = <0x1000000 0x300000>; | |
| interrupts = <0x0 0xd0 0x0>; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x2>; | |
| linux,phandle = <0xa7>; | |
| phandle = <0xa7>; | |
| pmx-uartconsole { | |
| uart_console_active { | |
| linux,phandle = <0xbf>; | |
| phandle = <0xbf>; | |
| mux { | |
| pins = "gpio4", "gpio5"; | |
| function = "blsp_uart2"; | |
| }; | |
| config { | |
| pins = "gpio4", "gpio5"; | |
| drive-strength = <0x2>; | |
| bias-disable; | |
| }; | |
| }; | |
| uart_console_sleep { | |
| mux { | |
| pins = "gpio4", "gpio5"; | |
| function = "blsp_uart2"; | |
| }; | |
| config { | |
| pins = "gpio4", "gpio5"; | |
| drive-strength = <0x2>; | |
| bias-pull-down; | |
| }; | |
| }; | |
| }; | |
| i2c_2 { | |
| i2c_2_active { | |
| linux,phandle = <0xc0>; | |
| phandle = <0xc0>; | |
| mux { | |
| pins = "gpio6", "gpio7"; | |
| function = "blsp_i2c2"; | |
| }; | |
| config { | |
| pins = "gpio6", "gpio7"; | |
| drive-strength = <0x2>; | |
| bias-disable; | |
| }; | |
| }; | |
| i2c_2_sleep { | |
| linux,phandle = <0xc1>; | |
| phandle = <0xc1>; | |
| mux { | |
| pins = "gpio6", "gpio7"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio6", "gpio7"; | |
| drive-strength = <0x2>; | |
| bias-disable; | |
| }; | |
| }; | |
| }; | |
| i2c_3 { | |
| i2c_3_active { | |
| linux,phandle = <0xce>; | |
| phandle = <0xce>; | |
| mux { | |
| pins = "gpio10", "gpio11"; | |
| function = "blsp_i2c3"; | |
| }; | |
| config { | |
| pins = "gpio10", "gpio11"; | |
| drive-strength = <0x2>; | |
| bias-disable; | |
| }; | |
| }; | |
| i2c_3_sleep { | |
| linux,phandle = <0xcf>; | |
| phandle = <0xcf>; | |
| mux { | |
| pins = "gpio10", "gpio11"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio10", "gpio11"; | |
| drive-strength = <0x2>; | |
| bias-disable; | |
| }; | |
| }; | |
| }; | |
| i2c_5 { | |
| i2c_5_active { | |
| linux,phandle = <0xd5>; | |
| phandle = <0xd5>; | |
| mux { | |
| pins = "gpio18", "gpio19"; | |
| function = "blsp_i2c5"; | |
| }; | |
| config { | |
| pins = "gpio18", "gpio19"; | |
| drive-strength = <0x2>; | |
| bias-disable; | |
| }; | |
| }; | |
| i2c_5_sleep { | |
| linux,phandle = <0xd6>; | |
| phandle = <0xd6>; | |
| mux { | |
| pins = "gpio18", "gpio19"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio18", "gpio19"; | |
| drive-strength = <0x2>; | |
| bias-disable; | |
| }; | |
| }; | |
| }; | |
| pmx_rd_nfc_int { | |
| pins = "gpio17"; | |
| qcom,pin-func = <0x0>; | |
| qcom,num-grp-pins = <0x1>; | |
| label = "pmx_nfc_int"; | |
| active { | |
| drive-strength = <0x6>; | |
| bias-pull-up; | |
| linux,phandle = <0xd9>; | |
| phandle = <0xd9>; | |
| }; | |
| suspend { | |
| drive-strength = <0x6>; | |
| bias-pull-up; | |
| linux,phandle = <0xdb>; | |
| phandle = <0xdb>; | |
| }; | |
| }; | |
| pmx_nfc_reset { | |
| pins = "gpio16"; | |
| qcom,pin-func = <0x0>; | |
| qcom,num-grp-pins = <0x1>; | |
| label = "pmx_nfc_disable"; | |
| active { | |
| drive-strength = <0x6>; | |
| bias-pull-up; | |
| linux,phandle = <0xda>; | |
| phandle = <0xda>; | |
| }; | |
| suspend { | |
| drive-strength = <0x6>; | |
| bias-disable; | |
| linux,phandle = <0xdc>; | |
| phandle = <0xdc>; | |
| }; | |
| }; | |
| tlmm_pmi_flash_led { | |
| rear_flash_led_enable { | |
| mux { | |
| pins = "gpio33"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio33"; | |
| drive-strength = <0x10>; | |
| output-high; | |
| }; | |
| }; | |
| rear_flash_led_disable { | |
| mux { | |
| pins = "gpio33"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio33"; | |
| drive-strength = <0x2>; | |
| output-low; | |
| }; | |
| }; | |
| front_flash_led_enable { | |
| mux { | |
| pins = "gpio50"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio50"; | |
| drive-strength = <0x10>; | |
| output-high; | |
| }; | |
| }; | |
| front_flash_led_disable { | |
| mux { | |
| pins = "gpio50"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio50"; | |
| drive-strength = <0x2>; | |
| output-low; | |
| }; | |
| }; | |
| }; | |
| spi3 { | |
| spi3_default { | |
| linux,phandle = <0xdd>; | |
| phandle = <0xdd>; | |
| mux { | |
| pins = "gpio8", "gpio9", "gpio11"; | |
| function = "blsp_spi3"; | |
| }; | |
| config { | |
| pins = "gpio8", "gpio9", "gpio11"; | |
| drive-strength = <0xc>; | |
| bias-disable = <0x0>; | |
| }; | |
| }; | |
| spi3_sleep { | |
| linux,phandle = <0xdf>; | |
| phandle = <0xdf>; | |
| mux { | |
| pins = "gpio8", "gpio9", "gpio11"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio8", "gpio9", "gpio11"; | |
| drive-strength = <0x2>; | |
| bias-pull-down; | |
| }; | |
| }; | |
| cs0_active { | |
| linux,phandle = <0xde>; | |
| phandle = <0xde>; | |
| mux { | |
| pins = "gpio10"; | |
| function = "blsp_spi3"; | |
| }; | |
| config { | |
| pins = "gpio10"; | |
| drive-strength = <0x2>; | |
| bias-disable = <0x0>; | |
| }; | |
| }; | |
| cs0_sleep { | |
| linux,phandle = <0xe0>; | |
| phandle = <0xe0>; | |
| mux { | |
| pins = "gpio10"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio10"; | |
| drive-strength = <0x2>; | |
| bias-disable = <0x0>; | |
| }; | |
| }; | |
| }; | |
| wcnss_pmux_5wire { | |
| wcnss_default { | |
| linux,phandle = <0xf1>; | |
| phandle = <0xf1>; | |
| wcss_wlan2 { | |
| pins = "gpio76"; | |
| function = "wcss_wlan2"; | |
| }; | |
| wcss_wlan1 { | |
| pins = "gpio77"; | |
| function = "wcss_wlan1"; | |
| }; | |
| wcss_wlan0 { | |
| pins = "gpio78"; | |
| function = "wcss_wlan0"; | |
| }; | |
| wcss_wlan { | |
| pins = "gpio79", "gpio80"; | |
| function = "wcss_wlan"; | |
| }; | |
| config { | |
| pins = "gpio76", "gpio77", "gpio78", "gpio79", "gpio80"; | |
| drive-strength = <0x6>; | |
| bias-pull-up; | |
| }; | |
| }; | |
| wcnss_sleep { | |
| linux,phandle = <0xf2>; | |
| phandle = <0xf2>; | |
| wcss_wlan2 { | |
| pins = "gpio76"; | |
| function = "wcss_wlan2"; | |
| }; | |
| wcss_wlan1 { | |
| pins = "gpio77"; | |
| function = "wcss_wlan1"; | |
| }; | |
| wcss_wlan0 { | |
| pins = "gpio78"; | |
| function = "wcss_wlan0"; | |
| }; | |
| wcss_wlan { | |
| pins = "gpio79", "gpio80"; | |
| function = "wcss_wlan"; | |
| }; | |
| config { | |
| pins = "gpio76", "gpio77", "gpio78", "gpio79", "gpio80"; | |
| drive-strength = <0x2>; | |
| bias-pull-down; | |
| }; | |
| }; | |
| }; | |
| wcnss_pmux_gpio { | |
| wcnss_gpio_default { | |
| linux,phandle = <0xf3>; | |
| phandle = <0xf3>; | |
| mux { | |
| pins = "gpio76", "gpio77", "gpio78", "gpio79", "gpio80"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio76", "gpio77", "gpio78", "gpio79", "gpio80"; | |
| drive-strength = <0x6>; | |
| bias-pull-up; | |
| }; | |
| }; | |
| }; | |
| blsp2_uart1_active { | |
| linux,phandle = <0xec>; | |
| phandle = <0xec>; | |
| mux { | |
| pins = "gpio16", "gpio17", "gpio18", "gpio19"; | |
| function = "blsp_uart5"; | |
| }; | |
| config { | |
| pins = "gpio16", "gpio17", "gpio18", "gpio19"; | |
| drive-strength = <0x2>; | |
| bias-disable; | |
| }; | |
| }; | |
| blsp2_uart1_sleep { | |
| linux,phandle = <0xeb>; | |
| phandle = <0xeb>; | |
| mux { | |
| pins = "gpio16", "gpio17", "gpio18", "gpio19"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio16", "gpio17", "gpio18", "gpio19"; | |
| drive-strength = <0x2>; | |
| bias-disable; | |
| }; | |
| }; | |
| pmx_adv7533_int { | |
| adv7533_int_active { | |
| linux,phandle = <0xc4>; | |
| phandle = <0xc4>; | |
| mux { | |
| pins = "gpio126"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio126"; | |
| drive-strength = <0x10>; | |
| bias-disable; | |
| }; | |
| }; | |
| adv7533_int_suspend { | |
| linux,phandle = <0xc5>; | |
| phandle = <0xc5>; | |
| mux { | |
| pins = "gpio126"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio126"; | |
| drive-strength = <0x10>; | |
| bias-disable; | |
| }; | |
| }; | |
| }; | |
| pmx_mdss { | |
| mdss_dsi_active { | |
| mux { | |
| pins = "gpio60", "gpio98", "gpio99"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio60", "gpio98", "gpio99"; | |
| drive-strength = <0x8>; | |
| bias-disable = <0x0>; | |
| output-high; | |
| }; | |
| }; | |
| mdss_dsi_suspend { | |
| mux { | |
| pins = "gpio60", "gpio98", "gpio99"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio60", "gpio98", "gpio99"; | |
| drive-strength = <0x2>; | |
| bias-pull-down; | |
| input-enable; | |
| }; | |
| }; | |
| }; | |
| pmx_mdss_te { | |
| mdss_te_active { | |
| mux { | |
| pins = "gpio24"; | |
| function = "mdp_vsync"; | |
| }; | |
| config { | |
| pins = "gpio24"; | |
| drive-strength = <0x2>; | |
| bias-pull-down; | |
| }; | |
| }; | |
| mdss_te_suspend { | |
| mux { | |
| pins = "gpio24"; | |
| function = "mdp_vsync"; | |
| }; | |
| config { | |
| pins = "gpio24"; | |
| drive-strength = <0x2>; | |
| bias-pull-down; | |
| }; | |
| }; | |
| }; | |
| usbc_int_default { | |
| linux,phandle = <0xc3>; | |
| phandle = <0xc3>; | |
| mux { | |
| pins = "gpio97", "gpio131"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio97", "gpio131"; | |
| drive-strength = <0x2>; | |
| bias-pull-up; | |
| }; | |
| }; | |
| tlmm_gpio_key { | |
| gpio_key_active { | |
| linux,phandle = <0x189>; | |
| phandle = <0x189>; | |
| mux { | |
| pins = "gpio91", "gpio127", "gpio128"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio91", "gpio127", "gpio128"; | |
| drive-strength = <0x2>; | |
| bias-pull-up; | |
| }; | |
| }; | |
| gpio_key_suspend { | |
| linux,phandle = <0x18a>; | |
| phandle = <0x18a>; | |
| mux { | |
| pins = "gpio91", "gpio127", "gpio128"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio91", "gpio127", "gpio128"; | |
| drive-strength = <0x2>; | |
| bias-pull-up; | |
| }; | |
| }; | |
| }; | |
| pmx_ts_int_active { | |
| ts_int_active { | |
| linux,phandle = <0xd0>; | |
| phandle = <0xd0>; | |
| mux { | |
| pins = "gpio65"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio65"; | |
| drive-strength = <0x8>; | |
| bias-pull-up; | |
| }; | |
| }; | |
| }; | |
| pmx_ts_int_suspend { | |
| ts_int_suspend { | |
| linux,phandle = <0xd2>; | |
| phandle = <0xd2>; | |
| mux { | |
| pins = "gpio65"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio65"; | |
| drive-strength = <0x2>; | |
| bias-pull-down; | |
| }; | |
| }; | |
| }; | |
| pmx_ts_reset_active { | |
| ts_reset_active { | |
| linux,phandle = <0xd1>; | |
| phandle = <0xd1>; | |
| mux { | |
| pins = "gpio64"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio64"; | |
| drive-strength = <0x8>; | |
| bias-pull-up; | |
| }; | |
| }; | |
| }; | |
| pmx_ts_reset_suspend { | |
| ts_reset_suspend { | |
| linux,phandle = <0xd3>; | |
| phandle = <0xd3>; | |
| mux { | |
| pins = "gpio64"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio64"; | |
| drive-strength = <0x2>; | |
| bias-pull-down; | |
| }; | |
| }; | |
| }; | |
| pmx_ts_release { | |
| ts_release { | |
| linux,phandle = <0xd4>; | |
| phandle = <0xd4>; | |
| mux { | |
| pins = "gpio65", "gpio64"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio65", "gpio64"; | |
| drive-strength = <0x2>; | |
| bias-pull-down; | |
| }; | |
| }; | |
| }; | |
| pmx_qdsd_clk { | |
| clk_sdcard { | |
| linux,phandle = <0x35>; | |
| phandle = <0x35>; | |
| config { | |
| pins = "qdsd_clk"; | |
| bias-disable; | |
| drive-strength = <0x10>; | |
| }; | |
| }; | |
| clk_trace { | |
| linux,phandle = <0x3b>; | |
| phandle = <0x3b>; | |
| config { | |
| pins = "qdsd_clk"; | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| }; | |
| }; | |
| clk_swdtrc { | |
| linux,phandle = <0x46>; | |
| phandle = <0x46>; | |
| config { | |
| pins = "qdsd_clk"; | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| }; | |
| }; | |
| clk_spmi { | |
| linux,phandle = <0x51>; | |
| phandle = <0x51>; | |
| config { | |
| pins = "qdsd_clk"; | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| }; | |
| }; | |
| }; | |
| pmx_qdsd_cmd { | |
| cmd_sdcard { | |
| linux,phandle = <0x36>; | |
| phandle = <0x36>; | |
| config { | |
| pins = "qdsd_cmd"; | |
| bias-pull-down; | |
| drive-strength = <0x8>; | |
| }; | |
| }; | |
| cmd_trace { | |
| linux,phandle = <0x3c>; | |
| phandle = <0x3c>; | |
| config { | |
| pins = "qdsd_cmd"; | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| }; | |
| }; | |
| cmd_uart { | |
| linux,phandle = <0x41>; | |
| phandle = <0x41>; | |
| config { | |
| pins = "qdsd_cmd"; | |
| bias-pull-up; | |
| drive-strength = <0x2>; | |
| }; | |
| }; | |
| cmd_swdtrc { | |
| linux,phandle = <0x47>; | |
| phandle = <0x47>; | |
| config { | |
| pins = "qdsd_cmd"; | |
| bias-pull-up; | |
| drive-strength = <0x2>; | |
| }; | |
| }; | |
| cmd_jtag { | |
| linux,phandle = <0x4c>; | |
| phandle = <0x4c>; | |
| config { | |
| pins = "qdsd_cmd"; | |
| bias-disable; | |
| drive-strength = <0x8>; | |
| }; | |
| }; | |
| cmd_spmi { | |
| linux,phandle = <0x52>; | |
| phandle = <0x52>; | |
| config { | |
| pins = "qdsd_cmd"; | |
| bias-pull-down; | |
| drive-strength = <0xa>; | |
| }; | |
| }; | |
| }; | |
| pmx_qdsd_data0 { | |
| data0_sdcard { | |
| linux,phandle = <0x37>; | |
| phandle = <0x37>; | |
| config { | |
| pins = "qdsd_data0"; | |
| bias-pull-down; | |
| drive-strength = <0x8>; | |
| }; | |
| }; | |
| data0_trace { | |
| linux,phandle = <0x3d>; | |
| phandle = <0x3d>; | |
| config { | |
| pins = "qdsd_data0"; | |
| bias-pull-down; | |
| drive-strength = <0x8>; | |
| }; | |
| }; | |
| data0_uart { | |
| linux,phandle = <0x42>; | |
| phandle = <0x42>; | |
| config { | |
| pins = "qdsd_data0"; | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| }; | |
| }; | |
| data0_swdtrc { | |
| linux,phandle = <0x48>; | |
| phandle = <0x48>; | |
| config { | |
| pins = "qdsd_data0"; | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| }; | |
| }; | |
| data0_jtag { | |
| linux,phandle = <0x4d>; | |
| phandle = <0x4d>; | |
| config { | |
| pins = "qdsd_data0"; | |
| bias-pull-up; | |
| drive-strength = <0x2>; | |
| }; | |
| }; | |
| data0_spmi { | |
| linux,phandle = <0x53>; | |
| phandle = <0x53>; | |
| config { | |
| pins = "qdsd_data0"; | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| }; | |
| }; | |
| }; | |
| pmx_qdsd_data1 { | |
| data1_sdcard { | |
| linux,phandle = <0x38>; | |
| phandle = <0x38>; | |
| config { | |
| pins = "qdsd_data1"; | |
| bias-pull-down; | |
| drive-strength = <0x8>; | |
| }; | |
| }; | |
| data1_trace { | |
| linux,phandle = <0x3e>; | |
| phandle = <0x3e>; | |
| config { | |
| pins = "qdsd_data1"; | |
| bias-pull-down; | |
| drive-strength = <0x8>; | |
| }; | |
| }; | |
| data1_uart { | |
| linux,phandle = <0x43>; | |
| phandle = <0x43>; | |
| config { | |
| pins = "qdsd_data1"; | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| }; | |
| }; | |
| data1_swdtrc { | |
| linux,phandle = <0x49>; | |
| phandle = <0x49>; | |
| config { | |
| pins = "qdsd_data1"; | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| }; | |
| }; | |
| data1_jtag { | |
| linux,phandle = <0x4e>; | |
| phandle = <0x4e>; | |
| config { | |
| pins = "qdsd_data1"; | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| }; | |
| }; | |
| }; | |
| pmx_qdsd_data2 { | |
| data2_sdcard { | |
| linux,phandle = <0x39>; | |
| phandle = <0x39>; | |
| config { | |
| pins = "qdsd_data2"; | |
| bias-pull-down; | |
| drive-strength = <0x8>; | |
| }; | |
| }; | |
| data2_trace { | |
| linux,phandle = <0x3f>; | |
| phandle = <0x3f>; | |
| config { | |
| pins = "qdsd_data2"; | |
| bias-pull-down; | |
| drive-strength = <0x8>; | |
| }; | |
| }; | |
| data2_uart { | |
| linux,phandle = <0x44>; | |
| phandle = <0x44>; | |
| config { | |
| pins = "qdsd_data2"; | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| }; | |
| }; | |
| data2_swdtrc { | |
| linux,phandle = <0x4a>; | |
| phandle = <0x4a>; | |
| config { | |
| pins = "qdsd_data2"; | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| }; | |
| }; | |
| data2_jtag { | |
| linux,phandle = <0x4f>; | |
| phandle = <0x4f>; | |
| config { | |
| pins = "qdsd_data2"; | |
| bias-pull-up; | |
| drive-strength = <0x8>; | |
| }; | |
| }; | |
| }; | |
| pmx_qdsd_data3 { | |
| data3_sdcard { | |
| linux,phandle = <0x3a>; | |
| phandle = <0x3a>; | |
| config { | |
| pins = "qdsd_data3"; | |
| bias-pull-down; | |
| drive-strength = <0x8>; | |
| }; | |
| }; | |
| data3_trace { | |
| linux,phandle = <0x40>; | |
| phandle = <0x40>; | |
| config { | |
| pins = "qdsd_data3"; | |
| bias-pull-down; | |
| drive-strength = <0x8>; | |
| }; | |
| }; | |
| data3_uart { | |
| linux,phandle = <0x45>; | |
| phandle = <0x45>; | |
| config { | |
| pins = "qdsd_data3"; | |
| bias-pull-up; | |
| drive-strength = <0x2>; | |
| }; | |
| }; | |
| data3_swdtrc { | |
| linux,phandle = <0x4b>; | |
| phandle = <0x4b>; | |
| config { | |
| pins = "qdsd_data3"; | |
| bias-pull-up; | |
| drive-strength = <0x2>; | |
| }; | |
| }; | |
| data3_jtag { | |
| linux,phandle = <0x50>; | |
| phandle = <0x50>; | |
| config { | |
| pins = "qdsd_data3"; | |
| bias-pull-up; | |
| drive-strength = <0x2>; | |
| }; | |
| }; | |
| data3_spmi { | |
| linux,phandle = <0x54>; | |
| phandle = <0x54>; | |
| config { | |
| pins = "qdsd_data3"; | |
| bias-pull-down; | |
| drive-strength = <0x8>; | |
| }; | |
| }; | |
| }; | |
| pmx_sdc1_rclk { | |
| sdc1_rclk_on { | |
| linux,phandle = <0xff>; | |
| phandle = <0xff>; | |
| config { | |
| pins = "sdc1_rclk"; | |
| bias-pull-down; | |
| }; | |
| }; | |
| sdc1_rclk_off { | |
| linux,phandle = <0x103>; | |
| phandle = <0x103>; | |
| config { | |
| pins = "sdc1_rclk"; | |
| bias-pull-down; | |
| }; | |
| }; | |
| }; | |
| wcd9xxx_intr { | |
| wcd_intr_default { | |
| linux,phandle = <0x17b>; | |
| phandle = <0x17b>; | |
| mux { | |
| pins = "gpio73"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio73"; | |
| drive-strength = <0x2>; | |
| bias-pull-down; | |
| input-enable; | |
| }; | |
| }; | |
| }; | |
| cdc_reset_ctrl { | |
| cdc_reset_sleep { | |
| linux,phandle = <0x17d>; | |
| phandle = <0x17d>; | |
| mux { | |
| pins = "gpio68"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio68"; | |
| drive-strength = <0x10>; | |
| bias-disable; | |
| output-low; | |
| }; | |
| }; | |
| cdc_reset_active { | |
| linux,phandle = <0x17c>; | |
| phandle = <0x17c>; | |
| mux { | |
| pins = "gpio68"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio68"; | |
| drive-strength = <0x10>; | |
| bias-pull-down; | |
| output-high; | |
| }; | |
| }; | |
| }; | |
| cdc-pdm-2-lines { | |
| pdm_lines_2_on { | |
| linux,phandle = <0x140>; | |
| phandle = <0x140>; | |
| mux { | |
| pins = "gpio70", "gpio71", "gpio72"; | |
| function = "cdc_pdm0"; | |
| }; | |
| config { | |
| pins = "gpio70", "gpio71", "gpio72"; | |
| drive-strength = <0x8>; | |
| }; | |
| }; | |
| pdm_lines_2_off { | |
| linux,phandle = <0x13e>; | |
| phandle = <0x13e>; | |
| mux { | |
| pins = "gpio70", "gpio71", "gpio72"; | |
| function = "cdc_pdm0"; | |
| }; | |
| config { | |
| pins = "gpio70", "gpio71", "gpio72"; | |
| drive-strength = <0x2>; | |
| bias-disable; | |
| }; | |
| }; | |
| }; | |
| cdc-pdm-lines { | |
| pdm_lines_on { | |
| linux,phandle = <0x13f>; | |
| phandle = <0x13f>; | |
| mux { | |
| pins = "gpio69", "gpio73", "gpio74"; | |
| function = "cdc_pdm0"; | |
| }; | |
| config { | |
| pins = "gpio69", "gpio73", "gpio74"; | |
| drive-strength = <0x8>; | |
| }; | |
| }; | |
| pdm_lines_off { | |
| linux,phandle = <0x13d>; | |
| phandle = <0x13d>; | |
| mux { | |
| pins = "gpio69", "gpio73", "gpio74"; | |
| function = "cdc_pdm0"; | |
| }; | |
| config { | |
| pins = "gpio69", "gpio73", "gpio74"; | |
| drive-strength = <0x2>; | |
| bias-disable; | |
| }; | |
| }; | |
| }; | |
| cross-conn-det { | |
| lines_on { | |
| linux,phandle = <0x141>; | |
| phandle = <0x141>; | |
| mux { | |
| pins = "gpio63"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio63"; | |
| drive-strength = <0x8>; | |
| output-low; | |
| bias-pull-down; | |
| }; | |
| }; | |
| lines_off { | |
| linux,phandle = <0x144>; | |
| phandle = <0x144>; | |
| mux { | |
| pins = "gpio63"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio63"; | |
| drive-strength = <0x2>; | |
| bias-pull-down; | |
| }; | |
| }; | |
| }; | |
| wsa-vi { | |
| wsa_vi_on { | |
| linux,phandle = <0xcc>; | |
| phandle = <0xcc>; | |
| mux { | |
| pins = "gpio94", "gpio95"; | |
| function = "wsa_io"; | |
| }; | |
| config { | |
| pins = "gpio94", "gpio95"; | |
| drive-strength = <0x8>; | |
| bias-disable; | |
| }; | |
| }; | |
| wsa_vi_off { | |
| linux,phandle = <0xc9>; | |
| phandle = <0xc9>; | |
| mux { | |
| pins = "gpio94", "gpio95"; | |
| function = "wsa_io"; | |
| }; | |
| config { | |
| pins = "gpio94", "gpio95"; | |
| drive-strength = <0x2>; | |
| bias-pull-down; | |
| }; | |
| }; | |
| }; | |
| wsa_reset { | |
| wsa_reset_on { | |
| linux,phandle = <0xcb>; | |
| phandle = <0xcb>; | |
| mux { | |
| pins = "gpio96"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio96"; | |
| drive-strength = <0x2>; | |
| output-high; | |
| }; | |
| }; | |
| wsa_reset_off { | |
| linux,phandle = <0xc8>; | |
| phandle = <0xc8>; | |
| mux { | |
| pins = "gpio96"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio96"; | |
| drive-strength = <0x2>; | |
| output-low; | |
| }; | |
| }; | |
| }; | |
| wsa_clk { | |
| wsa_clk_on { | |
| linux,phandle = <0xca>; | |
| phandle = <0xca>; | |
| mux { | |
| pins = "gpio25"; | |
| function = "pri_mi2s_mclk_a"; | |
| }; | |
| config { | |
| pins = "gpio25"; | |
| drive-strength = <0x8>; | |
| output-high; | |
| }; | |
| }; | |
| wsa_clk_off { | |
| linux,phandle = <0xc7>; | |
| phandle = <0xc7>; | |
| mux { | |
| pins = "gpio25"; | |
| function = "pri_mi2s_mclk_a"; | |
| }; | |
| config { | |
| pins = "gpio25"; | |
| drive-strength = <0x2>; | |
| output-low; | |
| bias-pull-down; | |
| }; | |
| }; | |
| }; | |
| pri-tlmm-lines { | |
| pri_tlmm_lines_act { | |
| linux,phandle = <0x145>; | |
| phandle = <0x145>; | |
| mux { | |
| pins = "gpio85", "gpio88"; | |
| function = "pri_mi2s"; | |
| }; | |
| config { | |
| pins = "gpio85", "gpio88"; | |
| drive-strength = <0x8>; | |
| }; | |
| }; | |
| pri_tlmm_lines_sus { | |
| linux,phandle = <0x142>; | |
| phandle = <0x142>; | |
| mux { | |
| pins = "gpio85", "gpio88"; | |
| function = "pri_mi2s"; | |
| }; | |
| config { | |
| pins = "gpio85", "gpio88"; | |
| drive-strength = <0x2>; | |
| bias-pull-down; | |
| }; | |
| }; | |
| }; | |
| pri-tlmm-ws-lines { | |
| pri_tlmm_ws_act { | |
| linux,phandle = <0x146>; | |
| phandle = <0x146>; | |
| mux { | |
| pins = "gpio87"; | |
| function = "pri_mi2s_ws"; | |
| }; | |
| config { | |
| pins = "gpio87"; | |
| drive-strength = <0x8>; | |
| }; | |
| }; | |
| pri_tlmm_ws_sus { | |
| linux,phandle = <0x143>; | |
| phandle = <0x143>; | |
| mux { | |
| pins = "gpio87"; | |
| function = "pri_mi2s_ws"; | |
| }; | |
| config { | |
| pins = "gpio87"; | |
| drive-strength = <0x2>; | |
| bias-pull-down; | |
| }; | |
| }; | |
| }; | |
| pmx_sdc1_clk { | |
| sdc1_clk_on { | |
| linux,phandle = <0xfc>; | |
| phandle = <0xfc>; | |
| config { | |
| pins = "sdc1_clk"; | |
| bias-disable; | |
| drive-strength = <0x10>; | |
| }; | |
| }; | |
| sdc1_clk_off { | |
| linux,phandle = <0x100>; | |
| phandle = <0x100>; | |
| config { | |
| pins = "sdc1_clk"; | |
| bias-disable; | |
| drive-strength = <0x2>; | |
| }; | |
| }; | |
| }; | |
| pmx_sdc1_cmd { | |
| sdc1_cmd_on { | |
| linux,phandle = <0xfd>; | |
| phandle = <0xfd>; | |
| config { | |
| pins = "sdc1_cmd"; | |
| bias-pull-up; | |
| drive-strength = <0xa>; | |
| }; | |
| }; | |
| sdc1_cmd_off { | |
| linux,phandle = <0x101>; | |
| phandle = <0x101>; | |
| config { | |
| pins = "sdc1_cmd"; | |
| bias-pull-up; | |
| drive-strength = <0x2>; | |
| }; | |
| }; | |
| }; | |
| pmx_sdc1_data { | |
| sdc1_data_on { | |
| linux,phandle = <0xfe>; | |
| phandle = <0xfe>; | |
| config { | |
| pins = "sdc1_data"; | |
| bias-pull-up; | |
| drive-strength = <0xa>; | |
| }; | |
| }; | |
| sdc1_data_off { | |
| linux,phandle = <0x102>; | |
| phandle = <0x102>; | |
| config { | |
| pins = "sdc1_data"; | |
| bias-pull-up; | |
| drive-strength = <0x2>; | |
| }; | |
| }; | |
| }; | |
| sdhc2_cd_pin { | |
| cd_on { | |
| linux,phandle = <0x107>; | |
| phandle = <0x107>; | |
| mux { | |
| pins = "gpio67"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio67"; | |
| drive-strength = <0x2>; | |
| bias-pull-up; | |
| }; | |
| }; | |
| cd_off { | |
| linux,phandle = <0x10b>; | |
| phandle = <0x10b>; | |
| mux { | |
| pins = "gpio67"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio67"; | |
| drive-strength = <0x2>; | |
| bias-disable; | |
| bias-pull-up; | |
| }; | |
| }; | |
| }; | |
| pmx_sdc2_clk { | |
| sdc2_clk_on { | |
| linux,phandle = <0x104>; | |
| phandle = <0x104>; | |
| config { | |
| pins = "sdc2_clk"; | |
| drive-strength = <0x10>; | |
| bias-disable; | |
| }; | |
| }; | |
| sdc2_clk_off { | |
| linux,phandle = <0x108>; | |
| phandle = <0x108>; | |
| config { | |
| pins = "sdc2_clk"; | |
| bias-disable; | |
| drive-strength = <0x2>; | |
| }; | |
| }; | |
| }; | |
| pmx_sdc2_cmd { | |
| sdc2_cmd_on { | |
| linux,phandle = <0x105>; | |
| phandle = <0x105>; | |
| config { | |
| pins = "sdc2_cmd"; | |
| bias-pull-up; | |
| drive-strength = <0x10>; | |
| }; | |
| }; | |
| sdc2_cmd_off { | |
| linux,phandle = <0x109>; | |
| phandle = <0x109>; | |
| config { | |
| pins = "sdc2_cmd"; | |
| bias-pull-up; | |
| drive-strength = <0x2>; | |
| }; | |
| }; | |
| }; | |
| pmx_sdc2_data { | |
| sdc2_data_on { | |
| linux,phandle = <0x106>; | |
| phandle = <0x106>; | |
| config { | |
| pins = "sdc2_data"; | |
| bias-pull-up; | |
| drive-strength = <0x10>; | |
| }; | |
| }; | |
| sdc2_data_off { | |
| linux,phandle = <0x10a>; | |
| phandle = <0x10a>; | |
| config { | |
| pins = "sdc2_data"; | |
| bias-pull-up; | |
| drive-strength = <0x2>; | |
| }; | |
| }; | |
| }; | |
| cci { | |
| cci0_active { | |
| linux,phandle = <0x126>; | |
| phandle = <0x126>; | |
| mux { | |
| pins = "gpio29", "gpio30"; | |
| function = "cci_i2c"; | |
| }; | |
| config { | |
| pins = "gpio29", "gpio30"; | |
| drive-strength = <0x2>; | |
| bias-disable; | |
| }; | |
| }; | |
| cci0_suspend { | |
| linux,phandle = <0x128>; | |
| phandle = <0x128>; | |
| mux { | |
| pins = "gpio29", "gpio30"; | |
| function = "cci_i2c"; | |
| }; | |
| config { | |
| pins = "gpio29", "gpio30"; | |
| drive-strength = <0x2>; | |
| bias-disable; | |
| }; | |
| }; | |
| cci1_active { | |
| linux,phandle = <0x127>; | |
| phandle = <0x127>; | |
| mux { | |
| pins = "gpio31", "gpio32"; | |
| function = "cci_i2c"; | |
| }; | |
| config { | |
| pins = "gpio31", "gpio32"; | |
| drive-strength = <0x2>; | |
| bias-disable; | |
| }; | |
| }; | |
| cci1_suspend { | |
| linux,phandle = <0x129>; | |
| phandle = <0x129>; | |
| mux { | |
| pins = "gpio31", "gpio32"; | |
| function = "cci_i2c"; | |
| }; | |
| config { | |
| pins = "gpio31", "gpio32"; | |
| drive-strength = <0x2>; | |
| bias-disable; | |
| }; | |
| }; | |
| }; | |
| cam_sensor_mclk0_default { | |
| linux,phandle = <0x12e>; | |
| phandle = <0x12e>; | |
| mux { | |
| pins = "gpio26"; | |
| function = "cam_mclk"; | |
| }; | |
| config { | |
| pins = "gpio26"; | |
| bias-disable; | |
| drive-strength = <0x2>; | |
| }; | |
| }; | |
| cam_sensor_mclk0_sleep { | |
| linux,phandle = <0x130>; | |
| phandle = <0x130>; | |
| mux { | |
| pins = "gpio26"; | |
| function = "cam_mclk"; | |
| }; | |
| config { | |
| pins = "gpio26"; | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| }; | |
| }; | |
| cam_sensor_rear_default { | |
| linux,phandle = <0x12f>; | |
| phandle = <0x12f>; | |
| mux { | |
| pins = "gpio36", "gpio35"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio36", "gpio35"; | |
| bias-disable; | |
| drive-strength = <0x2>; | |
| }; | |
| }; | |
| cam_sensor_rear_sleep { | |
| linux,phandle = <0x131>; | |
| phandle = <0x131>; | |
| mux { | |
| pins = "gpio36", "gpio35"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio36", "gpio35"; | |
| bias-disable; | |
| drive-strength = <0x2>; | |
| }; | |
| }; | |
| cam_sensor_rear_vdig { | |
| mux { | |
| pins = "gpio62"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio62"; | |
| bias-disable; | |
| drive-strength = <0x2>; | |
| }; | |
| }; | |
| cam_sensor_rear_vdig_sleep { | |
| mux { | |
| pins = "gpio62"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio62"; | |
| bias-disable; | |
| drive-strength = <0x2>; | |
| }; | |
| }; | |
| cam_sensor_mclk1_default { | |
| mux { | |
| pins = "gpio27"; | |
| function = "cam_mclk"; | |
| }; | |
| config { | |
| pins = "gpio27"; | |
| bias-disable; | |
| drive-strength = <0x2>; | |
| }; | |
| }; | |
| cam_sensor_mclk1_sleep { | |
| mux { | |
| pins = "gpio27"; | |
| function = "cam_mclk"; | |
| }; | |
| config { | |
| pins = "gpio27"; | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| }; | |
| }; | |
| cam_sensor_front_default { | |
| mux { | |
| pins = "gpio38", "gpio50"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio38", "gpio50"; | |
| bias-disable; | |
| drive-strength = <0x2>; | |
| }; | |
| }; | |
| cam_sensor_front_sleep { | |
| mux { | |
| pins = "gpio38", "gpio50"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio38", "gpio50"; | |
| bias-disable; | |
| drive-strength = <0x2>; | |
| }; | |
| }; | |
| cam_sensor_mclk2_default { | |
| linux,phandle = <0x138>; | |
| phandle = <0x138>; | |
| mux { | |
| pins = "gpio28"; | |
| function = "cam_mclk"; | |
| }; | |
| config { | |
| pins = "gpio28"; | |
| bias-disable; | |
| drive-strength = <0x2>; | |
| }; | |
| }; | |
| cam_sensor_mclk2_sleep { | |
| linux,phandle = <0x13a>; | |
| phandle = <0x13a>; | |
| mux { | |
| pins = "gpio28"; | |
| function = "cam_mclk"; | |
| }; | |
| config { | |
| pins = "gpio28"; | |
| bias-pull-down; | |
| drive-strength = <0x2>; | |
| }; | |
| }; | |
| cam_sensor_front1_default { | |
| linux,phandle = <0x139>; | |
| phandle = <0x139>; | |
| mux { | |
| pins = "gpio40", "gpio39"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio40", "gpio39"; | |
| bias-disable; | |
| drive-strength = <0x2>; | |
| }; | |
| }; | |
| cam_sensor_front1_sleep { | |
| linux,phandle = <0x13b>; | |
| phandle = <0x13b>; | |
| mux { | |
| pins = "gpio40", "gpio39"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio40", "gpio39"; | |
| bias-disable; | |
| drive-strength = <0x2>; | |
| }; | |
| }; | |
| gpio_led_pins { | |
| gpio_led_off { | |
| linux,phandle = <0x18b>; | |
| phandle = <0x18b>; | |
| mux { | |
| pins = "gpio45"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio45"; | |
| drive-strength = <0x6>; | |
| bias-disable; | |
| output-high; | |
| }; | |
| }; | |
| }; | |
| fpc_spi_active { | |
| linux,phandle = <0x18c>; | |
| phandle = <0x18c>; | |
| mux { | |
| pins = "gpio20", "gpio21", "gpio22", "gpio23"; | |
| function = "blsp_spi6"; | |
| }; | |
| config { | |
| pins = "gpio20", "gpio21", "gpio22", "gpio23"; | |
| drive-strength = <0x2>; | |
| bias-disable = <0x0>; | |
| }; | |
| }; | |
| fpc_reset_reset { | |
| linux,phandle = <0x18d>; | |
| phandle = <0x18d>; | |
| mux { | |
| pins = "gpio8"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio8"; | |
| drive-strength = <0x2>; | |
| bias-disable = <0x0>; | |
| output-low; | |
| }; | |
| }; | |
| fpc_reset_active { | |
| linux,phandle = <0x18e>; | |
| phandle = <0x18e>; | |
| mux { | |
| pins = "gpio8"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio8"; | |
| drive-strength = <0x2>; | |
| bias-disable = <0x0>; | |
| output-high; | |
| }; | |
| }; | |
| fpc_irq_active { | |
| linux,phandle = <0x18f>; | |
| phandle = <0x18f>; | |
| mux { | |
| pins = "gpio9"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio9"; | |
| drive-strength = <0x2>; | |
| bias-disable = <0x0>; | |
| input-enable; | |
| }; | |
| }; | |
| goodix_spi_active { | |
| linux,phandle = <0x190>; | |
| phandle = <0x190>; | |
| mux { | |
| pins = "gpio20", "gpio21", "gpio22", "gpio23"; | |
| function = "blsp_spi6"; | |
| }; | |
| config { | |
| pins = "gpio20", "gpio21", "gpio22", "gpio23"; | |
| drive-strength = <0x2>; | |
| bias-disable = <0x0>; | |
| }; | |
| }; | |
| goodix_reset_reset { | |
| linux,phandle = <0x191>; | |
| phandle = <0x191>; | |
| mux { | |
| pins = "gpio8"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio8"; | |
| drive-strength = <0x2>; | |
| bias-disable = <0x0>; | |
| output-low; | |
| }; | |
| }; | |
| goodix_reset_active { | |
| linux,phandle = <0x192>; | |
| phandle = <0x192>; | |
| mux { | |
| pins = "gpio8"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio8"; | |
| drive-strength = <0x2>; | |
| bias-disable = <0x0>; | |
| output-high; | |
| }; | |
| }; | |
| goodix_irq_active { | |
| linux,phandle = <0x193>; | |
| phandle = <0x193>; | |
| mux { | |
| pins = "gpio9"; | |
| function = "gpio"; | |
| }; | |
| config { | |
| pins = "gpio9"; | |
| drive-strength = <0x2>; | |
| bias-disable = <0x0>; | |
| input-enable; | |
| }; | |
| }; | |
| }; | |
| clock-controller@b111000 { | |
| compatible = "qcom,8937-l2ccc"; | |
| reg = <0xb111000 0x1000>; | |
| linux,phandle = <0x17>; | |
| phandle = <0x17>; | |
| }; | |
| clock-controller@b011000 { | |
| compatible = "qcom,8937-l2ccc"; | |
| reg = <0xb011000 0x1000>; | |
| linux,phandle = <0xd>; | |
| phandle = <0xd>; | |
| }; | |
| clock-controller@b088000 { | |
| compatible = "qcom,arm-cortex-acc"; | |
| reg = <0xb088000 0x1000>; | |
| linux,phandle = <0xa>; | |
| phandle = <0xa>; | |
| }; | |
| clock-controller@b098000 { | |
| compatible = "qcom,arm-cortex-acc"; | |
| reg = <0xb098000 0x1000>; | |
| linux,phandle = <0xe>; | |
| phandle = <0xe>; | |
| }; | |
| clock-controller@b0a8000 { | |
| compatible = "qcom,arm-cortex-acc"; | |
| reg = <0xb0a8000 0x1000>; | |
| linux,phandle = <0x10>; | |
| phandle = <0x10>; | |
| }; | |
| clock-controller@b0b8000 { | |
| compatible = "qcom,arm-cortex-acc"; | |
| reg = <0xb0b8000 0x1000>; | |
| linux,phandle = <0x12>; | |
| phandle = <0x12>; | |
| }; | |
| clock-controller@b188000 { | |
| compatible = "qcom,arm-cortex-acc"; | |
| reg = <0xb188000 0x1000>; | |
| linux,phandle = <0x14>; | |
| phandle = <0x14>; | |
| }; | |
| clock-controller@b198000 { | |
| compatible = "qcom,arm-cortex-acc"; | |
| reg = <0xb198000 0x1000>; | |
| linux,phandle = <0x18>; | |
| phandle = <0x18>; | |
| }; | |
| clock-controller@b1a8000 { | |
| compatible = "qcom,arm-cortex-acc"; | |
| reg = <0xb1a8000 0x1000>; | |
| linux,phandle = <0x19>; | |
| phandle = <0x19>; | |
| }; | |
| clock-controller@b1b8000 { | |
| compatible = "qcom,arm-cortex-acc"; | |
| reg = <0xb1b8000 0x1000>; | |
| linux,phandle = <0x1a>; | |
| phandle = <0x1a>; | |
| }; | |
| cpuss_dump { | |
| compatible = "qcom,cpuss-dump"; | |
| qcom,l2_dump0 { | |
| qcom,dump-node = <0x16>; | |
| qcom,dump-id = <0xc0>; | |
| }; | |
| qcom,l2_dump1 { | |
| qcom,dump-node = <0xc>; | |
| qcom,dump-id = <0xc1>; | |
| }; | |
| qcom,l1_i_cache0 { | |
| qcom,dump-node = <0x1b>; | |
| qcom,dump-id = <0x60>; | |
| }; | |
| qcom,l1_i_cache1 { | |
| qcom,dump-node = <0x1c>; | |
| qcom,dump-id = <0x61>; | |
| }; | |
| qcom,l1_i_cache2 { | |
| qcom,dump-node = <0x1d>; | |
| qcom,dump-id = <0x62>; | |
| }; | |
| qcom,l1_i_cache3 { | |
| qcom,dump-node = <0x1e>; | |
| qcom,dump-id = <0x63>; | |
| }; | |
| qcom,l1_i_cache100 { | |
| qcom,dump-node = <0x1f>; | |
| qcom,dump-id = <0x64>; | |
| }; | |
| qcom,l1_i_cache101 { | |
| qcom,dump-node = <0x20>; | |
| qcom,dump-id = <0x65>; | |
| }; | |
| qcom,l1_i_cache102 { | |
| qcom,dump-node = <0x21>; | |
| qcom,dump-id = <0x66>; | |
| }; | |
| qcom,l1_i_cache103 { | |
| qcom,dump-node = <0x22>; | |
| qcom,dump-id = <0x67>; | |
| }; | |
| qcom,l1_d_cache0 { | |
| qcom,dump-node = <0x23>; | |
| qcom,dump-id = <0x80>; | |
| }; | |
| qcom,l1_d_cache1 { | |
| qcom,dump-node = <0x24>; | |
| qcom,dump-id = <0x81>; | |
| }; | |
| qcom,l1_d_cache2 { | |
| qcom,dump-node = <0x25>; | |
| qcom,dump-id = <0x82>; | |
| }; | |
| qcom,l1_d_cache3 { | |
| qcom,dump-node = <0x26>; | |
| qcom,dump-id = <0x83>; | |
| }; | |
| qcom,l1_d_cache100 { | |
| qcom,dump-node = <0x27>; | |
| qcom,dump-id = <0x84>; | |
| }; | |
| qcom,l1_d_cache101 { | |
| qcom,dump-node = <0x28>; | |
| qcom,dump-id = <0x85>; | |
| }; | |
| qcom,l1_d_cache102 { | |
| qcom,dump-node = <0x29>; | |
| qcom,dump-id = <0x86>; | |
| }; | |
| qcom,l1_d_cache103 { | |
| qcom,dump-node = <0x2a>; | |
| qcom,dump-id = <0x87>; | |
| }; | |
| }; | |
| qcom,kgsl-busmon { | |
| label = "kgsl-busmon"; | |
| compatible = "qcom,kgsl-busmon"; | |
| }; | |
| qcom,gpubw { | |
| compatible = "qcom,devbw"; | |
| governor = "bw_vbif"; | |
| qcom,src-dst-ports = <0x1a 0x200>; | |
| qcom,active-only; | |
| qcom,bw-tbl = <0x0 0x301 0x64b 0x84c 0xb71 0x1005 0x1098 0x14e2 0x1650 0x1808 0x1b77>; | |
| linux,phandle = <0x2c>; | |
| phandle = <0x2c>; | |
| }; | |
| qcom,kgsl-3d0@1c00000 { | |
| label = "kgsl-3d0"; | |
| compatible = "qcom,kgsl-3d0", "qcom,kgsl-3d"; | |
| status = "ok"; | |
| reg = <0x1c00000 0x40000 0xa0000 0x6fff>; | |
| reg-names = "kgsl_3d0_reg_memory", "qfprom_memory"; | |
| interrupts = <0x0 0x21 0x0>; | |
| interrupt-names = "kgsl_3d0_irq"; | |
| qcom,id = <0x0>; | |
| qcom,chipid = <0x5000500>; | |
| qcom,initial-pwrlevel = <0x2>; | |
| qcom,idle-timeout = <0x50>; | |
| qcom,strtstp-sleepwake; | |
| qcom,highest-bank-bit = <0xe>; | |
| qcom,snapshot-size = <0x100000>; | |
| clocks = <0x2b 0x49a51fd9 0x2b 0xd15c8a00 0x2b 0x3edd69ad 0x2b 0x19922503 0x2b 0x1180db06 0x2b 0xae18e54d>; | |
| clock-names = "core_clk", "iface_clk", "mem_iface_clk", "alt_mem_iface_clk", "rbbmtimer_clk", "alwayson_clk"; | |
| qcom,gpubw-dev = <0x2c>; | |
| qcom,bus-control; | |
| qcom,bus-width = <0x10>; | |
| qcom,msm-bus,name = "grp3d"; | |
| qcom,msm-bus,num-cases = <0xb>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0x1a 0x200 0x0 0x0 0x1a 0x200 0x0 0xc4e00 0x1a 0x200 0x0 0x19c800 0x1a 0x200 0x0 0x21fc00 0x1a 0x200 0x0 0x2ee000 0x1a 0x200 0x0 0x41a000 0x1a 0x200 0x0 0x43f800 0x1a 0x200 0x0 0x50dc00 0x1a 0x200 0x0 0x5b6800 0x1a 0x200 0x0 0x627000 0x1a 0x200 0x0 0x708000>; | |
| regulator-names = "vddcx", "vdd"; | |
| vddcx-supply = <0x2d>; | |
| vdd-supply = <0x2e>; | |
| qcom,pm-qos-active-latency = <0x168>; | |
| qcom,pm-qos-wakeup-latency = <0x168>; | |
| qcom,gpu-quirk-two-pass-use-wfi; | |
| qcom,gpu-quirk-dp2clockgating-disable; | |
| qcom,gpu-quirk-lmloadkill-disable; | |
| coresight-id = <0x43>; | |
| coresight-name = "coresight-gfx"; | |
| coresight-nr-inports = <0x0>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x2f>; | |
| coresight-child-ports = <0x6>; | |
| qcom,enable-ca-jump; | |
| qcom,ca-busy-penalty = <0x2ee0>; | |
| qcom,ca-target-pwrlevel = <0x1>; | |
| qcom,gpu-speed-bin = <0x6018 0x80000000 0x1f>; | |
| qcom,gpu-mempools { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| compatible = "qcom,gpu-mempools"; | |
| qcom,mempool-max-pages = <0x8000>; | |
| qcom,gpu-mempool@0 { | |
| reg = <0x0>; | |
| qcom,mempool-page-size = <0x1000>; | |
| }; | |
| qcom,gpu-mempool@1 { | |
| reg = <0x1>; | |
| qcom,mempool-page-size = <0x10000>; | |
| }; | |
| }; | |
| qcom,gpu-pwrlevels { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| compatible = "qcom,gpu-pwrlevels"; | |
| qcom,gpu-pwrlevel@0 { | |
| reg = <0x0>; | |
| qcom,gpu-freq = <0x1ad27480>; | |
| qcom,bus-freq = <0x9>; | |
| qcom,bus-min = <0x9>; | |
| qcom,bus-max = <0x9>; | |
| }; | |
| qcom,gpu-pwrlevel@1 { | |
| reg = <0x1>; | |
| qcom,gpu-freq = <0x17d78400>; | |
| qcom,bus-freq = <0x7>; | |
| qcom,bus-min = <0x6>; | |
| qcom,bus-max = <0x9>; | |
| }; | |
| qcom,gpu-pwrlevel@2 { | |
| reg = <0x2>; | |
| qcom,gpu-freq = <0x165a0bc0>; | |
| qcom,bus-freq = <0x6>; | |
| qcom,bus-min = <0x5>; | |
| qcom,bus-max = <0x8>; | |
| }; | |
| qcom,gpu-pwrlevel@3 { | |
| reg = <0x3>; | |
| qcom,gpu-freq = <0x11e1a300>; | |
| qcom,bus-freq = <0x5>; | |
| qcom,bus-min = <0x4>; | |
| qcom,bus-max = <0x7>; | |
| }; | |
| qcom,gpu-pwrlevel@4 { | |
| reg = <0x4>; | |
| qcom,gpu-freq = <0xcdfe600>; | |
| qcom,bus-freq = <0x3>; | |
| qcom,bus-min = <0x1>; | |
| qcom,bus-max = <0x4>; | |
| }; | |
| qcom,gpu-pwrlevel@5 { | |
| reg = <0x5>; | |
| qcom,gpu-freq = <0x124f800>; | |
| qcom,bus-freq = <0x0>; | |
| qcom,bus-min = <0x0>; | |
| qcom,bus-max = <0x0>; | |
| }; | |
| }; | |
| qcom,gpu-pwrlevel-bins { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| compatible = "qcom,gpu-pwrlevel-bins"; | |
| qcom,gpu-pwrlevels-0 { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| qcom,speed-bin = <0x0>; | |
| qcom,initial-pwrlevel = <0x2>; | |
| qcom,gpu-pwrlevel@0 { | |
| reg = <0x0>; | |
| qcom,gpu-freq = <0x1ad27480>; | |
| qcom,bus-freq = <0x9>; | |
| qcom,bus-min = <0x9>; | |
| qcom,bus-max = <0x9>; | |
| }; | |
| qcom,gpu-pwrlevel@1 { | |
| reg = <0x1>; | |
| qcom,gpu-freq = <0x17d78400>; | |
| qcom,bus-freq = <0x7>; | |
| qcom,bus-min = <0x6>; | |
| qcom,bus-max = <0x9>; | |
| }; | |
| qcom,gpu-pwrlevel@2 { | |
| reg = <0x2>; | |
| qcom,gpu-freq = <0x165a0bc0>; | |
| qcom,bus-freq = <0x6>; | |
| qcom,bus-min = <0x5>; | |
| qcom,bus-max = <0x8>; | |
| }; | |
| qcom,gpu-pwrlevel@3 { | |
| reg = <0x3>; | |
| qcom,gpu-freq = <0x11e1a300>; | |
| qcom,bus-freq = <0x5>; | |
| qcom,bus-min = <0x4>; | |
| qcom,bus-max = <0x7>; | |
| }; | |
| qcom,gpu-pwrlevel@4 { | |
| reg = <0x4>; | |
| qcom,gpu-freq = <0xcdfe600>; | |
| qcom,bus-freq = <0x3>; | |
| qcom,bus-min = <0x1>; | |
| qcom,bus-max = <0x4>; | |
| }; | |
| qcom,gpu-pwrlevel@5 { | |
| reg = <0x5>; | |
| qcom,gpu-freq = <0x124f800>; | |
| qcom,bus-freq = <0x0>; | |
| qcom,bus-min = <0x0>; | |
| qcom,bus-max = <0x0>; | |
| }; | |
| }; | |
| qcom,gpu-pwrlevels-1 { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| qcom,speed-bin = <0x1>; | |
| qcom,initial-pwrlevel = <0x3>; | |
| qcom,gpu-pwrlevel@0 { | |
| reg = <0x0>; | |
| qcom,gpu-freq = <0x1c4fecc0>; | |
| qcom,bus-freq = <0xa>; | |
| qcom,bus-min = <0xa>; | |
| qcom,bus-max = <0xa>; | |
| }; | |
| qcom,gpu-pwrlevel@1 { | |
| reg = <0x1>; | |
| qcom,gpu-freq = <0x1ad27480>; | |
| qcom,bus-freq = <0x9>; | |
| qcom,bus-min = <0x9>; | |
| qcom,bus-max = <0xa>; | |
| }; | |
| qcom,gpu-pwrlevel@2 { | |
| reg = <0x2>; | |
| qcom,gpu-freq = <0x17d78400>; | |
| qcom,bus-freq = <0x7>; | |
| qcom,bus-min = <0x6>; | |
| qcom,bus-max = <0x9>; | |
| }; | |
| qcom,gpu-pwrlevel@3 { | |
| reg = <0x3>; | |
| qcom,gpu-freq = <0x165a0bc0>; | |
| qcom,bus-freq = <0x6>; | |
| qcom,bus-min = <0x5>; | |
| qcom,bus-max = <0x8>; | |
| }; | |
| qcom,gpu-pwrlevel@4 { | |
| reg = <0x4>; | |
| qcom,gpu-freq = <0x11e1a300>; | |
| qcom,bus-freq = <0x5>; | |
| qcom,bus-min = <0x4>; | |
| qcom,bus-max = <0x7>; | |
| }; | |
| qcom,gpu-pwrlevel@5 { | |
| reg = <0x5>; | |
| qcom,gpu-freq = <0xcdfe600>; | |
| qcom,bus-freq = <0x3>; | |
| qcom,bus-min = <0x1>; | |
| qcom,bus-max = <0x4>; | |
| }; | |
| qcom,gpu-pwrlevel@6 { | |
| reg = <0x6>; | |
| qcom,gpu-freq = <0x124f800>; | |
| qcom,bus-freq = <0x0>; | |
| qcom,bus-min = <0x0>; | |
| qcom,bus-max = <0x0>; | |
| }; | |
| }; | |
| }; | |
| }; | |
| qcom,kgsl-iommu@1c40000 { | |
| compatible = "qcom,kgsl-smmu-v2"; | |
| reg = <0x1c40000 0x10000>; | |
| qcom,protect = <0x40000 0x10000>; | |
| qcom,micro-mmu-control = <0x6000>; | |
| clocks = <0x2b 0xd15c8a00 0x2b 0x3edd69ad>; | |
| clock-names = "gpu_ahb_clk", "gcc_bimc_gfx_clk"; | |
| qcom,secure_align_mask = <0xfff>; | |
| qcom,retention; | |
| gfx3d_user { | |
| compatible = "qcom,smmu-kgsl-cb"; | |
| label = "gfx3d_user"; | |
| iommus = <0x30 0x0>; | |
| qcom,gpu-offset = <0x48000>; | |
| }; | |
| }; | |
| qcom,ion { | |
| compatible = "qcom,msm-ion"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| qcom,ion-heap@25 { | |
| reg = <0x19>; | |
| qcom,ion-heap-type = "SYSTEM"; | |
| }; | |
| qcom,ion-heap@8 { | |
| reg = <0x8>; | |
| memory-region = <0x31>; | |
| qcom,ion-heap-type = "SECURE_DMA"; | |
| }; | |
| qcom,ion-heap@27 { | |
| reg = <0x1b>; | |
| memory-region = <0x32>; | |
| qcom,ion-heap-type = "DMA"; | |
| }; | |
| }; | |
| arm,smmu-kgsl@1c40000 { | |
| status = "ok"; | |
| compatible = "qcom,smmu-v2"; | |
| qcom,tz-device-id = "GPU"; | |
| reg = <0x1c40000 0x10000>; | |
| #iommu-cells = <0x1>; | |
| #global-interrupts = <0x1>; | |
| interrupts = <0x0 0xc7 0x0 0x0 0xe1 0x0 0x0 0xe8 0x0 0x0 0xe9 0x0 0x0 0xea 0x0>; | |
| qcom,deferred-regulator-disable-delay = <0x50>; | |
| qcom,register-save; | |
| qcom,skip-init; | |
| qcom,dynamic; | |
| qcom,enable-smmu-halt; | |
| vdd-supply = <0x2d>; | |
| clocks = <0x2b 0xd15c8a00 0x2b 0x3edd69ad>; | |
| clock-names = "gpu_ahb_clk", "gcc_bimc_gfx_clk"; | |
| #clock-cells = <0x1>; | |
| attach-impl-defs = <0x6000 0x270 0x6060 0x1055 0x6800 0x6 0x6900 0x3ff 0x6924 0x204 0x6928 0x10800 0x6930 0x400 0x6960 0xffffffff 0x6b64 0xa0000 0x6b68 0xaaab92a>; | |
| linux,phandle = <0x30>; | |
| phandle = <0x30>; | |
| }; | |
| qcom,iommu@1e00000 { | |
| compatible = "qcom,msm-smmu-v2", "qcom,msm-mmu-500"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| ranges; | |
| reg = <0x1e00000 0x40000>; | |
| reg-names = "iommu_base"; | |
| interrupts = <0x0 0x29 0x0 0x0 0x26 0x0>; | |
| interrupt-names = "global_cfg_NS_irq", "global_cfg_S_irq"; | |
| label = "apps_iommu"; | |
| qcom,iommu-secure-id = <0x11>; | |
| clocks = <0x2b 0x75eaefa5 0x2b 0xaf56a329>; | |
| clock-names = "iface_clk", "core_clk"; | |
| qcom,cb-base-offset = <0x20000>; | |
| status = "ok"; | |
| linux,phandle = <0x123>; | |
| phandle = <0x123>; | |
| qcom,iommu-ctx@1e20000 { | |
| compatible = "qcom,msm-smmu-v2-ctx"; | |
| reg = <0x1e20000 0x1000>; | |
| qcom,secure-context; | |
| interrupts = <0x0 0xfd 0x0 0x0 0xfd 0x0>; | |
| qcom,iommu-ctx-sids = <0x2000>; | |
| qcom,iommu-sid-mask = <0x3f0>; | |
| label = "q6"; | |
| }; | |
| qcom,iommu-ctx@1e21000 { | |
| compatible = "qcom,msm-smmu-v2-ctx"; | |
| reg = <0x1e21000 0x1000>; | |
| qcom,secure-context; | |
| interrupts = <0x0 0xfe 0x0 0x0 0xfe 0x0>; | |
| qcom,iommu-ctx-sids = <0x2002>; | |
| qcom,iommu-sid-mask = <0x3f1>; | |
| label = "adsp_sec_pixel"; | |
| }; | |
| qcom,iommu-ctx@1e22000 { | |
| compatible = "qcom,msm-smmu-v2-ctx"; | |
| reg = <0x1e22000 0x1000>; | |
| qcom,secure-context; | |
| interrupts = <0x0 0xff 0x0 0x0 0xff 0x0>; | |
| qcom,iommu-ctx-sids = <0x2801>; | |
| qcom,iommu-sid-mask = <0x3fe>; | |
| label = "mdp_1"; | |
| }; | |
| qcom,iommu-ctx@1e23000 { | |
| compatible = "qcom,msm-smmu-v2-ctx"; | |
| reg = <0x1e23000 0x1000>; | |
| qcom,secure-context; | |
| interrupts = <0x0 0x35 0x0 0x0 0x35 0x0>; | |
| qcom,iommu-ctx-sids = <0x980 0x986>; | |
| qcom,iommu-sid-mask = <0x200 0x200>; | |
| label = "venus_fw"; | |
| qcom,report-error-on-fault; | |
| }; | |
| qcom,iommu-ctx@1e24000 { | |
| compatible = "qcom,msm-smmu-v2-ctx"; | |
| reg = <0x1e24000 0x1000>; | |
| qcom,secure-context; | |
| interrupts = <0x0 0x36 0x0 0x0 0x36 0x0>; | |
| qcom,iommu-ctx-sids = <0x900 0x90a 0x909>; | |
| qcom,iommu-sid-mask = <0x200 0x20a4 0x222>; | |
| label = "venus_sec_non_pixel"; | |
| qcom,report-error-on-fault; | |
| linux,phandle = <0xab>; | |
| phandle = <0xab>; | |
| }; | |
| qcom,iommu-ctx@1e25000 { | |
| compatible = "qcom,msm-smmu-v2-ctx"; | |
| reg = <0x1e25000 0x1000>; | |
| qcom,secure-context; | |
| interrupts = <0x0 0x3a 0x0 0x0 0x3a 0x0>; | |
| qcom,iommu-ctx-sids = <0x90c>; | |
| qcom,iommu-sid-mask = <0x220>; | |
| label = "venus_sec_bitstream"; | |
| qcom,report-error-on-fault; | |
| linux,phandle = <0xa9>; | |
| phandle = <0xa9>; | |
| }; | |
| qcom,iommu-ctx@1e26000 { | |
| compatible = "qcom,msm-smmu-v2-ctx"; | |
| reg = <0x1e26000 0x1000>; | |
| qcom,secure-context; | |
| interrupts = <0x0 0x3c 0x0 0x0 0x3c 0x0>; | |
| qcom,iommu-ctx-sids = <0x940 0x907 0x908 0x90d>; | |
| qcom,iommu-sid-mask = <0x200 0x208 0x220 0x220>; | |
| label = "venus_sec_pixel"; | |
| qcom,report-error-on-fault; | |
| linux,phandle = <0xaa>; | |
| phandle = <0xaa>; | |
| }; | |
| qcom,iommu-ctx@1e28000 { | |
| compatible = "qcom,msm-smmu-v2-ctx"; | |
| reg = <0x1e28000 0x1000>; | |
| interrupts = <0x0 0x4c 0x0>; | |
| qcom,iommu-ctx-sids = <0x1401 0x1402 0x1404>; | |
| qcom,iommu-sid-mask = <0x3f2 0x3f0 0x3f0>; | |
| label = "pronto_pil"; | |
| }; | |
| qcom,iommu-ctx@1e29000 { | |
| compatible = "qcom,msm-smmu-v2-ctx"; | |
| reg = <0x1e29000 0x1000>; | |
| interrupts = <0x0 0x4d 0x0>; | |
| qcom,iommu-ctx-sids = <0x1000>; | |
| qcom,iommu-sid-mask = <0x3fe>; | |
| label = "mss_nav"; | |
| }; | |
| qcom,iommu-ctx@1e2a000 { | |
| compatible = "qcom,msm-smmu-v2-ctx"; | |
| reg = <0x1e2a000 0x1000>; | |
| interrupts = <0x0 0x50 0x0>; | |
| qcom,iommu-ctx-sids = <0x40>; | |
| qcom,iommu-sid-mask = <0x3f>; | |
| label = "periph_rpm"; | |
| }; | |
| qcom,iommu-ctx@1e2b000 { | |
| compatible = "qcom,msm-smmu-v2-ctx"; | |
| reg = <0x1e2b000 0x1000>; | |
| interrupts = <0x0 0x5e 0x0>; | |
| qcom,iommu-ctx-sids = <0x1c0 0x1ca 0x1cc 0x1d0 0x1d6 0x1d8 0x1e0 0x1e4 0x1e8 0x1f0>; | |
| qcom,iommu-sid-mask = <0x7 0x1 0x3 0x3 0x1 0x7 0x3 0x1 0x7 0x1>; | |
| label = "lpass"; | |
| }; | |
| qcom,iommu-ctx@1e2f000 { | |
| compatible = "qcom,msm-smmu-v2-ctx"; | |
| reg = <0x1e2f000 0x1000>; | |
| interrupts = <0x0 0x68 0x0>; | |
| qcom,iommu-ctx-sids = <0x2001>; | |
| qcom,iommu-sid-mask = <0x3f0>; | |
| label = "adsp_io"; | |
| qcom,virtual-addr-pool = <0x10000000 0xfffffff>; | |
| #iommu-cells = <0x1>; | |
| linux,phandle = <0x13c>; | |
| phandle = <0x13c>; | |
| }; | |
| qcom,iommu-ctx@1e30000 { | |
| compatible = "qcom,msm-smmu-v2-ctx"; | |
| reg = <0x1e30000 0x1000>; | |
| interrupts = <0x0 0x69 0x0>; | |
| qcom,iommu-ctx-sids = <0x2004>; | |
| qcom,iommu-sid-mask = <0x3f0>; | |
| label = "adsp_opendsp"; | |
| }; | |
| qcom,iommu-ctx@1e31000 { | |
| compatible = "qcom,msm-smmu-v2-ctx"; | |
| reg = <0x1e31000 0x1000>; | |
| interrupts = <0x0 0x6a 0x0>; | |
| qcom,iommu-ctx-sids = <0x2008>; | |
| qcom,iommu-sid-mask = <0x3f7>; | |
| label = "adsp_shared"; | |
| linux,phandle = <0xf9>; | |
| phandle = <0xf9>; | |
| }; | |
| qcom,iommu-ctx@1e32000 { | |
| compatible = "qcom,msm-smmu-v2-ctx"; | |
| reg = <0x1e32000 0x1000>; | |
| interrupts = <0x0 0x6d 0x0>; | |
| qcom,iommu-ctx-sids = <0x1c00>; | |
| qcom,iommu-sid-mask = <0x3fc>; | |
| label = "cpp"; | |
| }; | |
| qcom,iommu-ctx@1e33000 { | |
| compatible = "qcom,msm-smmu-v2-ctx"; | |
| reg = <0x1e33000 0x1000>; | |
| interrupts = <0x0 0x6e 0x0>; | |
| qcom,iommu-ctx-sids = <0x1800>; | |
| qcom,iommu-sid-mask = <0x3fe>; | |
| label = "jpeg_enc0"; | |
| }; | |
| qcom,iommu-ctx@1e34000 { | |
| compatible = "qcom,msm-smmu-v2-ctx"; | |
| reg = <0x1e34000 0x1000>; | |
| interrupts = <0x0 0x6f 0x0>; | |
| qcom,iommu-ctx-sids = <0x400 0x2400>; | |
| qcom,iommu-sid-mask = <0x3fc 0x3fc>; | |
| label = "vfe"; | |
| }; | |
| qcom,iommu-ctx@1e35000 { | |
| compatible = "qcom,msm-smmu-v2-ctx"; | |
| reg = <0x1e35000 0x1000>; | |
| interrupts = <0x0 0x70 0x0>; | |
| qcom,iommu-ctx-sids = <0x2800>; | |
| qcom,iommu-sid-mask = <0x3fe>; | |
| label = "mdp_0"; | |
| }; | |
| qcom,iommu-ctx@1e36000 { | |
| compatible = "qcom,msm-smmu-v2-ctx"; | |
| reg = <0x1e36000 0x1000>; | |
| interrupts = <0x0 0x71 0x0>; | |
| qcom,iommu-ctx-sids = <0x800 0x807 0x808 0x811>; | |
| qcom,iommu-sid-mask = <0x200 0x200 0x227 0x220>; | |
| label = "venus_ns"; | |
| qcom,report-error-on-fault; | |
| linux,phandle = <0xa8>; | |
| phandle = <0xa8>; | |
| }; | |
| qcom,iommu-ctx@1e38000 { | |
| compatible = "qcom,msm-smmu-v2-ctx"; | |
| reg = <0x1e38000 0x1000>; | |
| interrupts = <0x0 0x73 0x0>; | |
| qcom,iommu-ctx-sids = <0xc00>; | |
| qcom,iommu-sid-mask = <0x3fe>; | |
| label = "mss_mcdma"; | |
| }; | |
| qcom,iommu-ctx@1e37000 { | |
| compatible = "qcom,msm-smmu-v2-ctx"; | |
| reg = <0x1e37000 0x1000>; | |
| interrupts = <0x0 0x72 0x0>; | |
| qcom,iommu-ctx-sids = <0x1406 0x1408 0x140c 0x100 0x1d4 0x1e6 0x2c0 0x340>; | |
| qcom,iommu-sid-mask = <0x3f1 0x3f3 0x3f1 0x7f 0x1 0x1 0x3f 0x3f>; | |
| label = "access_control"; | |
| }; | |
| }; | |
| tmc@6028000 { | |
| compatible = "arm,coresight-tmc"; | |
| reg = <0x6028000 0x1000 0x6044000 0x15000>; | |
| reg-names = "tmc-base", "bam-base"; | |
| interrupts = <0x0 0xa6 0x0>; | |
| interrupt-names = "byte-cntr-irq"; | |
| qcom,memory-size = <0x2000000>; | |
| qcom,sg-enable; | |
| qcom,force-reg-dump; | |
| coresight-id = <0x0>; | |
| coresight-name = "coresight-tmc-etr"; | |
| coresight-nr-inports = <0x1>; | |
| coresight-ctis = <0x33 0x34>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| linux,phandle = <0x57>; | |
| phandle = <0x57>; | |
| }; | |
| tpiu@6020000 { | |
| compatible = "arm,coresight-tpiu"; | |
| reg = <0x6020000 0x1000 0x1100000 0xb0000>; | |
| reg-names = "tpiu-base", "nidnt-base"; | |
| coresight-id = <0x1>; | |
| coresight-name = "coresight-tpiu"; | |
| coresight-nr-inports = <0x1>; | |
| pinctrl-names = "sdcard", "trace", "swduart", "swdtrc", "jtag", "spmi"; | |
| pinctrl-0 = <0x35 0x36 0x37 0x38 0x39 0x3a>; | |
| pinctrl-1 = <0x3b 0x3c 0x3d 0x3e 0x3f 0x40>; | |
| pinctrl-2 = <0x41 0x42 0x43 0x44 0x45>; | |
| pinctrl-3 = <0x46 0x47 0x48 0x49 0x4a 0x4b>; | |
| pinctrl-4 = <0x4c 0x4d 0x4e 0x4f 0x50>; | |
| pinctrl-5 = <0x51 0x52 0x53 0x54>; | |
| qcom,nidnthw; | |
| qcom,nidnt-swduart; | |
| qcom,nidnt-swdtrc; | |
| qcom,nidnt-jtag; | |
| qcom,nidnt-spmi; | |
| nidnt-gpio = <0x43>; | |
| nidnt-gpio-polarity = <0x1>; | |
| interrupts = <0x0 0x52 0x0>; | |
| interrupt-names = "nidnt-irq"; | |
| vdd-supply = <0x55>; | |
| qcom,vdd-voltage-level = <0x2d0370 0x2d0370>; | |
| qcom,vdd-current-level = <0x3a98 0x61a80>; | |
| vdd-io-supply = <0x56>; | |
| qcom,vdd-io-voltage-level = <0x2d0370 0x2d0370>; | |
| qcom,vdd-io-current-level = <0xc8 0xc350>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| linux,phandle = <0x58>; | |
| phandle = <0x58>; | |
| }; | |
| replicator@6026000 { | |
| compatible = "qcom,coresight-replicator"; | |
| reg = <0x6026000 0x1000>; | |
| reg-names = "replicator-base"; | |
| coresight-id = <0x2>; | |
| coresight-name = "coresight-replicator"; | |
| coresight-nr-inports = <0x1>; | |
| coresight-outports = <0x0 0x1>; | |
| coresight-child-list = <0x57 0x58>; | |
| coresight-child-ports = <0x0 0x0>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| linux,phandle = <0x59>; | |
| phandle = <0x59>; | |
| }; | |
| tmc@6027000 { | |
| compatible = "arm,coresight-tmc"; | |
| reg = <0x6027000 0x1000>; | |
| reg-names = "tmc-base"; | |
| coresight-id = <0x3>; | |
| coresight-name = "coresight-tmc-etf"; | |
| coresight-nr-inports = <0x1>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x59>; | |
| coresight-child-ports = <0x0>; | |
| coresight-default-sink; | |
| coresight-ctis = <0x33 0x34>; | |
| qcom,force-reg-dump; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| linux,phandle = <0x5a>; | |
| phandle = <0x5a>; | |
| }; | |
| funnel@6021000 { | |
| compatible = "arm,coresight-funnel"; | |
| reg = <0x6021000 0x1000>; | |
| reg-names = "funnel-base"; | |
| coresight-id = <0x4>; | |
| coresight-name = "coresight-funnel-in0"; | |
| coresight-nr-inports = <0x8>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x5a>; | |
| coresight-child-ports = <0x0>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| linux,phandle = <0x5b>; | |
| phandle = <0x5b>; | |
| }; | |
| funnel@6130000 { | |
| compatible = "arm,coresight-funnel"; | |
| reg = <0x6130000 0x1000>; | |
| reg-names = "funnel-base"; | |
| coresight-id = <0x5>; | |
| coresight-name = "coresight-funnel-mm"; | |
| coresight-nr-inports = <0x8>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x5b>; | |
| coresight-child-ports = <0x5>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| linux,phandle = <0x2f>; | |
| phandle = <0x2f>; | |
| }; | |
| funnel@6100000 { | |
| compatible = "arm,coresight-funnel"; | |
| reg = <0x6100000 0x1000>; | |
| reg-names = "funnel-base"; | |
| coresight-id = <0x6>; | |
| coresight-name = "coresight-funnel-center"; | |
| coresight-nr-inports = <0x8>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x5b>; | |
| coresight-child-ports = <0x3>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| linux,phandle = <0x60>; | |
| phandle = <0x60>; | |
| }; | |
| funnel@6120000 { | |
| compatible = "arm,coresight-funnel"; | |
| reg = <0x6120000 0x1000>; | |
| reg-names = "funnel-base"; | |
| coresight-id = <0x7>; | |
| coresight-name = "coresight-funnel-right"; | |
| coresight-nr-inports = <0x8>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x5b>; | |
| coresight-child-ports = <0x4>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| linux,phandle = <0x5c>; | |
| phandle = <0x5c>; | |
| }; | |
| funnel@6132000 { | |
| compatible = "arm,coresight-funnel"; | |
| reg = <0x6132000 0x1000>; | |
| reg-names = "funnel-base"; | |
| coresight-id = <0x8>; | |
| coresight-name = "coresight-funnel-cam"; | |
| coresight-nr-inports = <0x8>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x2f>; | |
| coresight-child-ports = <0x4>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| funnel@61a1000 { | |
| compatible = "arm,coresight-funnel"; | |
| reg = <0x61a1000 0x1000>; | |
| reg-names = "funnel-base"; | |
| coresight-id = <0x9>; | |
| coresight-name = "coresight-funnel-apss"; | |
| coresight-nr-inports = <0x8>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x5c>; | |
| coresight-child-ports = <0x2>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| linux,phandle = <0x5d>; | |
| phandle = <0x5d>; | |
| }; | |
| etm@61bc000 { | |
| compatible = "arm,coresight-etmv4"; | |
| reg = <0x61bc000 0x1000>; | |
| reg-names = "etm-base"; | |
| coresight-id = <0xa>; | |
| coresight-name = "coresight-etm0"; | |
| coresight-nr-inports = <0x0>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x5d>; | |
| coresight-child-ports = <0x4>; | |
| coresight-etm-cpu = <0x6>; | |
| qcom,cpuss-debug-cgc = <0x5e>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| cluster-cgc { | |
| reg = <0xb011088 0x4>; | |
| cluster = <0x1>; | |
| linux,phandle = <0x5e>; | |
| phandle = <0x5e>; | |
| }; | |
| }; | |
| etm@61bd000 { | |
| compatible = "arm,coresight-etmv4"; | |
| reg = <0x61bd000 0x1000>; | |
| reg-names = "etm-base"; | |
| coresight-id = <0xb>; | |
| coresight-name = "coresight-etm1"; | |
| coresight-nr-inports = <0x0>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x5d>; | |
| coresight-child-ports = <0x5>; | |
| coresight-etm-cpu = <0x7>; | |
| qcom,cpuss-debug-cgc = <0x5e>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| etm@61be000 { | |
| compatible = "arm,coresight-etmv4"; | |
| reg = <0x61be000 0x1000>; | |
| reg-names = "etm-base"; | |
| coresight-id = <0xc>; | |
| coresight-name = "coresight-etm2"; | |
| coresight-nr-inports = <0x0>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x5d>; | |
| coresight-child-ports = <0x6>; | |
| coresight-etm-cpu = <0x8>; | |
| qcom,cpuss-debug-cgc = <0x5e>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| etm@61bf000 { | |
| compatible = "arm,coresight-etmv4"; | |
| reg = <0x61bf000 0x1000>; | |
| reg-names = "etm-base"; | |
| coresight-id = <0xd>; | |
| coresight-name = "coresight-etm3"; | |
| coresight-nr-inports = <0x0>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x5d>; | |
| coresight-child-ports = <0x7>; | |
| coresight-etm-cpu = <0x9>; | |
| qcom,cpuss-debug-cgc = <0x5e>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| etm@61b9c000 { | |
| compatible = "arm,coresight-etmv4"; | |
| reg = <0x619c000 0x1000>; | |
| reg-names = "etm-base"; | |
| coresight-id = <0xe>; | |
| coresight-name = "coresight-etm4"; | |
| coresight-nr-inports = <0x0>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x5d>; | |
| coresight-child-ports = <0x0>; | |
| coresight-etm-cpu = <0x2>; | |
| qcom,cpuss-debug-cgc = <0x5f>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| cluster-cgc { | |
| reg = <0xb111088 0x4>; | |
| cluster = <0x0>; | |
| linux,phandle = <0x5f>; | |
| phandle = <0x5f>; | |
| }; | |
| }; | |
| etm@61b9d000 { | |
| compatible = "arm,coresight-etmv4"; | |
| reg = <0x619d000 0x1000>; | |
| reg-names = "etm-base"; | |
| coresight-id = <0xf>; | |
| coresight-name = "coresight-etm5"; | |
| coresight-nr-inports = <0x0>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x5d>; | |
| coresight-child-ports = <0x1>; | |
| coresight-etm-cpu = <0x3>; | |
| qcom,cpuss-debug-cgc = <0x5f>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| etm@61b9e000 { | |
| compatible = "arm,coresight-etmv4"; | |
| reg = <0x619e000 0x1000>; | |
| reg-names = "etm-base"; | |
| coresight-id = <0x10>; | |
| coresight-name = "coresight-etm6"; | |
| coresight-nr-inports = <0x0>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x5d>; | |
| coresight-child-ports = <0x2>; | |
| coresight-etm-cpu = <0x4>; | |
| qcom,cpuss-debug-cgc = <0x5f>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| etm@61b97000 { | |
| compatible = "arm,coresight-etmv4"; | |
| reg = <0x619f000 0x1000>; | |
| reg-names = "etm-base"; | |
| coresight-id = <0x11>; | |
| coresight-name = "coresight-etm7"; | |
| coresight-nr-inports = <0x0>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x5d>; | |
| coresight-child-ports = <0x3>; | |
| coresight-etm-cpu = <0x5>; | |
| qcom,cpuss-debug-cgc = <0x5f>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| stm@6002000 { | |
| compatible = "arm,coresight-stm"; | |
| reg = <0x6002000 0x1000 0x9280000 0x180000>; | |
| reg-names = "stm-base", "stm-data-base"; | |
| coresight-id = <0x12>; | |
| coresight-name = "coresight-stm"; | |
| coresight-nr-inports = <0x0>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x5b>; | |
| coresight-child-ports = <0x7>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| cti@6010000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x6010000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x13>; | |
| coresight-name = "coresight-cti0"; | |
| coresight-nr-inports = <0x0>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| linux,phandle = <0x33>; | |
| phandle = <0x33>; | |
| }; | |
| cti@6011000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x6011000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x14>; | |
| coresight-name = "coresight-cti1"; | |
| coresight-nr-inports = <0x0>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| cti@6012000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x6012000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x15>; | |
| coresight-name = "coresight-cti2"; | |
| coresight-nr-inports = <0x0>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| cti@6013000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x6013000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x16>; | |
| coresight-name = "coresight-cti3"; | |
| coresight-nr-inports = <0x0>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| cti@6014000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x6014000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x17>; | |
| coresight-name = "coresight-cti4"; | |
| coresight-nr-inports = <0x0>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| cti@6015000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x6015000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x18>; | |
| coresight-name = "coresight-cti5"; | |
| coresight-nr-inports = <0x0>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| cti@6016000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x6016000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x19>; | |
| coresight-name = "coresight-cti6"; | |
| coresight-nr-inports = <0x0>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| cti@6017000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x6017000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x1a>; | |
| coresight-name = "coresight-cti7"; | |
| coresight-nr-inports = <0x0>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| cti@6018000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x6018000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x1b>; | |
| coresight-name = "coresight-cti8"; | |
| coresight-nr-inports = <0x0>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| linux,phandle = <0x34>; | |
| phandle = <0x34>; | |
| }; | |
| cti@6019000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x6019000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x1c>; | |
| coresight-name = "coresight-cti9"; | |
| coresight-nr-inports = <0x0>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| cti@601a000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x601a000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x1d>; | |
| coresight-name = "coresight-cti10"; | |
| coresight-nr-inports = <0x0>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| cti@601b000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x601b000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x1e>; | |
| coresight-name = "coresight-cti11"; | |
| coresight-nr-inports = <0x0>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| cti@601c000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x601c000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x1f>; | |
| coresight-name = "coresight-cti12"; | |
| coresight-nr-inports = <0x0>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| cti@601d000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x601d000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x20>; | |
| coresight-name = "coresight-cti13"; | |
| coresight-nr-inports = <0x0>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| cti@601e000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x601e000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x21>; | |
| coresight-name = "coresight-cti14"; | |
| coresight-nr-inports = <0x0>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| cti@601f000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x601f000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x22>; | |
| coresight-name = "coresight-cti15"; | |
| coresight-nr-inports = <0x0>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| cti@61b8000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x61b8000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x23>; | |
| coresight-name = "coresight-cti-cpu0"; | |
| coresight-nr-inports = <0x0>; | |
| coresight-cti-cpu = <0x6>; | |
| qcom,cti-save; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| cti@61b9000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x61b9000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x24>; | |
| coresight-name = "coresight-cti-cpu1"; | |
| coresight-nr-inports = <0x0>; | |
| coresight-cti-cpu = <0x7>; | |
| qcom,cti-save; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| cti@61ba000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x61ba000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x25>; | |
| coresight-name = "coresight-cti-cpu2"; | |
| coresight-nr-inports = <0x0>; | |
| coresight-cti-cpu = <0x8>; | |
| qcom,cti-save; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| cti@61bb000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x61bb000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x26>; | |
| coresight-name = "coresight-cti-cpu3"; | |
| coresight-nr-inports = <0x0>; | |
| coresight-cti-cpu = <0x9>; | |
| qcom,cti-save; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| cti@6198000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x6198000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x27>; | |
| coresight-name = "coresight-cti-cpu4"; | |
| coresight-nr-inports = <0x0>; | |
| coresight-cti-cpu = <0x2>; | |
| qcom,cti-save; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| cti@6199000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x6199000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x28>; | |
| coresight-name = "coresight-cti-cpu5"; | |
| coresight-nr-inports = <0x0>; | |
| coresight-cti-cpu = <0x3>; | |
| qcom,cti-save; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| cti@619a000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x619a000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x29>; | |
| coresight-name = "coresight-cti-cpu6"; | |
| coresight-nr-inports = <0x0>; | |
| coresight-cti-cpu = <0x4>; | |
| qcom,cti-save; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| cti@619b000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x619b000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x2a>; | |
| coresight-name = "coresight-cti-cpu7"; | |
| coresight-nr-inports = <0x0>; | |
| coresight-cti-cpu = <0x5>; | |
| qcom,cti-save; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| cti@6124000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x6124000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x2b>; | |
| coresight-name = "coresight-cti-modem-cpu0"; | |
| coresight-nr-inports = <0x0>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| cti@6139000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x6139000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x2c>; | |
| coresight-name = "coresight-cti-wcn-cpu0"; | |
| coresight-nr-inports = <0x0>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| cti@6134000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x6134000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x2d>; | |
| coresight-name = "coresight-cti-video-cpu0"; | |
| coresight-nr-inports = <0x0>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| cti@613c000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x613c000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x2e>; | |
| coresight-name = "coresight-cti-audio-cpu0"; | |
| coresight-nr-inports = <0x0>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| cti@610c000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0x610c000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x2f>; | |
| coresight-name = "coresight-cti-rpm-cpu0"; | |
| coresight-nr-inports = <0x0>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| wcn_etm0 { | |
| compatible = "qcom,coresight-remote-etm"; | |
| coresight-id = <0x30>; | |
| coresight-name = "coresight-wcn-etm0"; | |
| coresight-nr-inports = <0x0>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x2f>; | |
| coresight-child-ports = <0x0>; | |
| qcom,inst-id = <0x3>; | |
| }; | |
| rpm_etm0 { | |
| compatible = "qcom,coresight-remote-etm"; | |
| coresight-id = <0x31>; | |
| coresight-name = "coresight-rpm-etm0"; | |
| coresight-nr-inports = <0x0>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x60>; | |
| coresight-child-ports = <0x0>; | |
| qcom,inst-id = <0x4>; | |
| }; | |
| audio_etm0 { | |
| compatible = "qcom,coresight-remote-etm"; | |
| coresight-id = <0x32>; | |
| coresight-name = "coresight-audio-etm0"; | |
| coresight-nr-inports = <0x0>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x2f>; | |
| coresight-child-ports = <0x5>; | |
| qcom,inst-id = <0x5>; | |
| }; | |
| modem_etm0 { | |
| compatible = "qcom,coresight-remote-etm"; | |
| coresight-id = <0x33>; | |
| coresight-name = "coresight-modem-etm0"; | |
| coresight-nr-inports = <0x0>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x5c>; | |
| coresight-child-ports = <0x1>; | |
| qcom,inst-id = <0x2>; | |
| }; | |
| csr@6001000 { | |
| compatible = "qcom,coresight-csr"; | |
| reg = <0x6001000 0x1000>; | |
| reg-names = "csr-base"; | |
| coresight-id = <0x34>; | |
| coresight-name = "coresight-csr"; | |
| coresight-nr-inports = <0x0>; | |
| qcom,blk-size = <0x1>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| dbgui@6108000 { | |
| compatible = "qcom,coresight-dbgui"; | |
| reg = <0x6108000 0x1000>; | |
| reg-names = "dbgui-base"; | |
| coresight-id = <0x35>; | |
| coresight-name = "coresight-dbgui"; | |
| coresight-nr-inports = <0x0>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x60>; | |
| coresight-child-ports = <0x2>; | |
| qcom,dbgui-addr-offset = <0x30>; | |
| qcom,dbgui-data-offset = <0x130>; | |
| qcom,dbgui-size = <0x40>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| tpda@6003000 { | |
| compatible = "qcom,coresight-tpda"; | |
| reg = <0x6003000 0x1000>; | |
| reg-names = "tpda-base"; | |
| coresight-id = <0x36>; | |
| coresight-name = "coresight-tpda"; | |
| coresight-nr-inports = <0x2>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x5b>; | |
| coresight-child-ports = <0x6>; | |
| qcom,tpda-atid = <0x40>; | |
| qcom,cmb-elem-size = <0x0 0x20>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| linux,phandle = <0x61>; | |
| phandle = <0x61>; | |
| }; | |
| tpdm@6110000 { | |
| compatible = "qcom,coresight-tpdm"; | |
| reg = <0x6110000 0x1000>; | |
| reg-names = "tpdm-base"; | |
| coresight-id = <0x37>; | |
| coresight-name = "coresight-tpdm-dcc"; | |
| coresight-nr-inports = <0x1>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x61>; | |
| coresight-child-ports = <0x0>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| hwevent@6101000 { | |
| compatible = "qcom,coresight-hwevent"; | |
| reg = <0x6101000 0x148 0x6101fb0 0x4 0x6121000 0x148 0x6121fb0 0x4 0x6131000 0x148 0x6131fb0 0x4 0x78c5010 0x4 0x7885010 0x4>; | |
| reg-names = "center-wrapper-mux", "center-wrapper-lockaccess", "right-wrapper-mux", "right-wrapper-lockaccess", "mm-wrapper-mux", "mm-wrapper-lockaccess", "usbbam-mux", "blsp-mux"; | |
| coresight-id = <0x38>; | |
| coresight-name = "coresight-hwevent"; | |
| coresight-nr-inports = <0x0>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| fuse@a601c { | |
| compatible = "arm,coresight-fuse-v2"; | |
| reg = <0xa601c 0x8 0xa6004 0x4 0xa600c 0x4>; | |
| reg-names = "fuse-base", "nidnt-fuse-base", "qpdi-fuse-base"; | |
| coresight-id = <0x39>; | |
| coresight-name = "coresight-fuse"; | |
| coresight-nr-inports = <0x0>; | |
| }; | |
| qpdi@1941000 { | |
| compatible = "qcom,coresight-qpdi"; | |
| reg = <0x1941000 0x4>; | |
| reg-names = "qpdi-base"; | |
| coresight-id = <0x3a>; | |
| coresight-name = "coresight-qpdi"; | |
| coresight-nr-inports = <0x0>; | |
| vdd-supply = <0x55>; | |
| qcom,vdd-voltage-level = <0x2d0370 0x2d0370>; | |
| qcom,vdd-current-level = <0x3a98 0x61a80>; | |
| vdd-io-supply = <0x56>; | |
| qcom,vdd-io-voltage-level = <0x2d0370 0x2d0370>; | |
| qcom,vdd-io-current-level = <0xc8 0xc350>; | |
| }; | |
| ad-hoc-bus@580000 { | |
| compatible = "qcom,msm-bus-device"; | |
| reg = <0x580000 0x16080 0x580000 0x16080 0x400000 0x5a000 0x500000 0x13080>; | |
| reg-names = "snoc-base", "snoc-mm-base", "bimc-base", "pcnoc-base"; | |
| fab-bimc { | |
| cell-id = <0x0>; | |
| label = "fab-bimc"; | |
| qcom,fab-dev; | |
| qcom,base-name = "bimc-base"; | |
| qcom,bus-type = <0x2>; | |
| qcom,util-fact = <0x9a>; | |
| clock-names = "bus_clk", "bus_a_clk"; | |
| clocks = <0x2b 0xd212feea 0x2b 0x71d1a499>; | |
| coresight-id = <0xcb>; | |
| coresight-name = "coresight-bimc"; | |
| coresight-nr-inports = <0x0>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x5b>; | |
| coresight-child-ports = <0x2>; | |
| linux,phandle = <0x64>; | |
| phandle = <0x64>; | |
| }; | |
| fab-pcnoc { | |
| cell-id = <0x1000>; | |
| label = "fab-pcnoc"; | |
| qcom,fab-dev; | |
| qcom,base-name = "pcnoc-base"; | |
| qcom,base-offset = <0x7000>; | |
| qcom,qos-off = <0x1000>; | |
| qcom,bus-type = <0x1>; | |
| clock-names = "bus_clk", "bus_a_clk"; | |
| clocks = <0x2b 0x2b53b688 0x2b 0x9753a54f>; | |
| coresight-id = <0xc9>; | |
| coresight-name = "coresight-pcnoc"; | |
| coresight-nr-inports = <0x0>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x60>; | |
| coresight-child-ports = <0x3>; | |
| linux,phandle = <0x66>; | |
| phandle = <0x66>; | |
| }; | |
| fab-snoc { | |
| cell-id = <0x400>; | |
| label = "fab-snoc"; | |
| qcom,fab-dev; | |
| qcom,base-name = "snoc-base"; | |
| qcom,base-offset = <0x7000>; | |
| qcom,qos-off = <0x1000>; | |
| qcom,bus-type = <0x1>; | |
| clock-names = "bus_clk", "bus_a_clk"; | |
| clocks = <0x2b 0xe6900bb6 0x2b 0x5d4683bd>; | |
| coresight-id = <0xc8>; | |
| coresight-name = "coresight-snoc"; | |
| coresight-nr-inports = <0x0>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x60>; | |
| coresight-child-ports = <0x4>; | |
| linux,phandle = <0x6d>; | |
| phandle = <0x6d>; | |
| }; | |
| fab-snoc-mm { | |
| cell-id = <0x800>; | |
| label = "fab-snoc-mm"; | |
| qcom,fab-dev; | |
| qcom,base-name = "snoc-mm-base"; | |
| qcom,base-offset = <0x7000>; | |
| qcom,qos-off = <0x1000>; | |
| qcom,bus-type = <0x1>; | |
| qcom,util-fact = <0x9a>; | |
| clock-names = "bus_clk", "bus_a_clk"; | |
| clocks = <0x2b 0xd61e5721 0x2b 0x50600f1b>; | |
| linux,phandle = <0x72>; | |
| phandle = <0x72>; | |
| }; | |
| mas-apps-proc { | |
| cell-id = <0x1>; | |
| label = "mas-apps-proc"; | |
| qcom,buswidth = <0x8>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,ap-owned; | |
| qcom,qport = <0x0>; | |
| qcom,qos-mode = "fixed"; | |
| qcom,connections = <0x62 0x63>; | |
| qcom,prio-lvl = <0x0>; | |
| qcom,prio-rd = <0x0>; | |
| qcom,prio-wr = <0x0>; | |
| qcom,bus-dev = <0x64>; | |
| qcom,mas-rpm-id = <0x0>; | |
| }; | |
| mas-oxili { | |
| cell-id = <0x1a>; | |
| label = "mas-oxili"; | |
| qcom,buswidth = <0x8>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,ap-owned; | |
| qcom,qport = <0x2>; | |
| qcom,qos-mode = "fixed"; | |
| qcom,connections = <0x62 0x63>; | |
| qcom,prio-lvl = <0x0>; | |
| qcom,prio-rd = <0x0>; | |
| qcom,prio-wr = <0x0>; | |
| qcom,bus-dev = <0x64>; | |
| qcom,mas-rpm-id = <0x6>; | |
| }; | |
| mas-snoc-bimc-0 { | |
| cell-id = <0x2717>; | |
| label = "mas-snoc-bimc-0"; | |
| qcom,buswidth = <0x8>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,ap-owned; | |
| qcom,qport = <0x3>; | |
| qcom,qos-mode = "bypass"; | |
| qcom,connections = <0x62 0x63>; | |
| qcom,bus-dev = <0x64>; | |
| qcom,mas-rpm-id = <0x3>; | |
| linux,phandle = <0x9a>; | |
| phandle = <0x9a>; | |
| }; | |
| mas-snoc-bimc-2 { | |
| cell-id = <0x273d>; | |
| label = "mas-snoc-bimc-2"; | |
| qcom,buswidth = <0x8>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,ap-owned; | |
| qcom,qport = <0x4>; | |
| qcom,qos-mode = "bypass"; | |
| qcom,connections = <0x62 0x63>; | |
| qcom,bus-dev = <0x64>; | |
| qcom,mas-rpm-id = <0x6c>; | |
| linux,phandle = <0x9c>; | |
| phandle = <0x9c>; | |
| }; | |
| mas-snoc-bimc-1 { | |
| cell-id = <0x2718>; | |
| label = "mas-snoc-bimc-1"; | |
| qcom,buswidth = <0x8>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,qport = <0x5>; | |
| qcom,qos-mode = "bypass"; | |
| qcom,connections = <0x62>; | |
| qcom,bus-dev = <0x64>; | |
| qcom,mas-rpm-id = <0x4c>; | |
| linux,phandle = <0x9b>; | |
| phandle = <0x9b>; | |
| }; | |
| mas-tcu-0 { | |
| cell-id = <0x68>; | |
| label = "mas-tcu-0"; | |
| qcom,buswidth = <0x8>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,ap-owned; | |
| qcom,qport = <0x6>; | |
| qcom,qos-mode = "fixed"; | |
| qcom,connections = <0x62 0x63>; | |
| qcom,prio-lvl = <0x2>; | |
| qcom,prio-rd = <0x2>; | |
| qcom,bus-dev = <0x64>; | |
| qcom,mas-rpm-id = <0x66>; | |
| }; | |
| mas-spdm { | |
| cell-id = <0x24>; | |
| label = "mas-spdm"; | |
| qcom,buswidth = <0x4>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,ap-owned; | |
| qcom,connections = <0x65>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x32>; | |
| }; | |
| mas-blsp-1 { | |
| cell-id = <0x56>; | |
| label = "mas-blsp-1"; | |
| qcom,buswidth = <0x4>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,connections = <0x67>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x29>; | |
| }; | |
| mas-blsp-2 { | |
| cell-id = <0x54>; | |
| label = "mas-blsp-2"; | |
| qcom,buswidth = <0x4>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,connections = <0x67>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x27>; | |
| }; | |
| mas-usb-hs1 { | |
| cell-id = <0x57>; | |
| label = "mas-usb-hs1"; | |
| qcom,buswidth = <0x4>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,ap-owned; | |
| qcom,qport = <0xc>; | |
| qcom,qos-mode = "fixed"; | |
| qcom,prio1 = <0x1>; | |
| qcom,prio0 = <0x1>; | |
| qcom,connections = <0x68>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x2a>; | |
| }; | |
| mas-xi-usb-hs1 { | |
| cell-id = <0x6e>; | |
| label = "mas-xi-usb-hs1"; | |
| qcom,buswidth = <0x8>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,qport = <0xb>; | |
| qcom,qos-mode = "fixed"; | |
| qcom,connections = <0x68>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x8a>; | |
| }; | |
| mas-crypto { | |
| cell-id = <0x37>; | |
| label = "mas-crypto"; | |
| qcom,buswidth = <0x8>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,ap-owned; | |
| qcom,qport = <0x0>; | |
| qcom,qos-mode = "fixed"; | |
| qcom,connections = <0x68>; | |
| qcom,prio1 = <0x1>; | |
| qcom,prio0 = <0x1>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x17>; | |
| }; | |
| mas-sdcc-1 { | |
| cell-id = <0x4e>; | |
| label = "mas-sdcc-1"; | |
| qcom,buswidth = <0x8>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,qport = <0x7>; | |
| qcom,qos-mode = "fixed"; | |
| qcom,connections = <0x68>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x21>; | |
| }; | |
| mas-sdcc-2 { | |
| cell-id = <0x51>; | |
| label = "mas-sdcc-2"; | |
| qcom,buswidth = <0x8>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,qport = <0x8>; | |
| qcom,qos-mode = "fixed"; | |
| qcom,connections = <0x68>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x23>; | |
| }; | |
| mas-snoc-pcnoc { | |
| cell-id = <0x2739>; | |
| label = "mas-snoc-pcnoc"; | |
| qcom,buswidth = <0x8>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,qport = <0x9>; | |
| qcom,qos-mode = "fixed"; | |
| qcom,connections = <0x69 0x6a 0x6b>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x4d>; | |
| linux,phandle = <0x9d>; | |
| phandle = <0x9d>; | |
| }; | |
| mas-qdss-bam { | |
| cell-id = <0x35>; | |
| label = "mas-qdss-bam"; | |
| qcom,buswidth = <0x4>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,ap-owned; | |
| qcom,qport = <0xb>; | |
| qcom,qos-mode = "fixed"; | |
| qcom,connections = <0x6c>; | |
| qcom,prio1 = <0x1>; | |
| qcom,prio0 = <0x1>; | |
| qcom,bus-dev = <0x6d>; | |
| qcom,mas-rpm-id = <0x13>; | |
| }; | |
| mas-bimc-snoc { | |
| cell-id = <0x2720>; | |
| label = "mas-bimc-snoc"; | |
| qcom,buswidth = <0x8>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,connections = <0x6e 0x6f 0x70>; | |
| qcom,bus-dev = <0x6d>; | |
| qcom,mas-rpm-id = <0x15>; | |
| linux,phandle = <0x98>; | |
| phandle = <0x98>; | |
| }; | |
| mas-jpeg { | |
| cell-id = <0x3e>; | |
| label = "mas-jpeg"; | |
| qcom,buswidth = <0x10>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,ap-owned; | |
| qcom,qport = <0x6>; | |
| qcom,qos-mode = "bypass"; | |
| qcom,connections = <0x71>; | |
| qcom,bus-dev = <0x72>; | |
| qcom,mas-rpm-id = <0x7>; | |
| }; | |
| mas-mdp { | |
| cell-id = <0x16>; | |
| label = "mas-mdp"; | |
| qcom,buswidth = <0x10>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,ap-owned; | |
| qcom,qport = <0x7>; | |
| qcom,qos-mode = "bypass"; | |
| qcom,connections = <0x73>; | |
| qcom,bus-dev = <0x72>; | |
| qcom,mas-rpm-id = <0x8>; | |
| }; | |
| mas-pcnoc-snoc { | |
| cell-id = <0x271a>; | |
| label = "mas-pcnoc-snoc"; | |
| qcom,buswidth = <0x8>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,qport = <0x5>; | |
| qcom,qos-mode = "fixed"; | |
| qcom,connections = <0x6e 0x6f 0x74>; | |
| qcom,bus-dev = <0x6d>; | |
| qcom,mas-rpm-id = <0x1d>; | |
| qcom,blacklist = <0x75>; | |
| linux,phandle = <0x99>; | |
| phandle = <0x99>; | |
| }; | |
| mas-venus { | |
| cell-id = <0x3f>; | |
| label = "mas-venus"; | |
| qcom,buswidth = <0x10>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,ap-owned; | |
| qcom,qport = <0x8>; | |
| qcom,qos-mode = "bypass"; | |
| qcom,connections = <0x71>; | |
| qcom,bus-dev = <0x72>; | |
| qcom,mas-rpm-id = <0x9>; | |
| }; | |
| mas-vfe0 { | |
| cell-id = <0x1d>; | |
| label = "mas-vfe0"; | |
| qcom,buswidth = <0x10>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,ap-owned; | |
| qcom,qport = <0x9>; | |
| qcom,qos-mode = "bypass"; | |
| qcom,connections = <0x73>; | |
| qcom,bus-dev = <0x72>; | |
| qcom,mas-rpm-id = <0xb>; | |
| }; | |
| mas-vfe1 { | |
| cell-id = <0x6d>; | |
| label = "mas-vfe1"; | |
| qcom,buswidth = <0x10>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,ap-owned; | |
| qcom,qport = <0xd>; | |
| qcom,qos-mode = "bypass"; | |
| qcom,connections = <0x73>; | |
| qcom,bus-dev = <0x72>; | |
| qcom,mas-rpm-id = <0x85>; | |
| }; | |
| mas-cpp { | |
| cell-id = <0x6a>; | |
| label = "mas-cpp"; | |
| qcom,buswidth = <0x10>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,ap-owned; | |
| qcom,qport = <0xc>; | |
| qcom,qos-mode = "bypass"; | |
| qcom,connections = <0x71>; | |
| qcom,bus-dev = <0x72>; | |
| qcom,mas-rpm-id = <0x73>; | |
| }; | |
| mas-qdss-etr { | |
| cell-id = <0x3c>; | |
| label = "mas-qdss-etr"; | |
| qcom,buswidth = <0x8>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,ap-owned; | |
| qcom,qport = <0xa>; | |
| qcom,qos-mode = "fixed"; | |
| qcom,connections = <0x6c>; | |
| qcom,prio1 = <0x1>; | |
| qcom,prio0 = <0x1>; | |
| qcom,bus-dev = <0x6d>; | |
| qcom,mas-rpm-id = <0x1f>; | |
| }; | |
| pcnoc-m-0 { | |
| cell-id = <0x271e>; | |
| label = "pcnoc-m-0"; | |
| qcom,buswidth = <0x4>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,ap-owned; | |
| qcom,qport = <0x5>; | |
| qcom,qos-mode = "fixed"; | |
| qcom,connections = <0x68>; | |
| qcom,prio1 = <0x1>; | |
| qcom,prio0 = <0x1>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x57>; | |
| qcom,slv-rpm-id = <0x74>; | |
| linux,phandle = <0x65>; | |
| phandle = <0x65>; | |
| }; | |
| pcnoc-m-1 { | |
| cell-id = <0x271f>; | |
| label = "pcnoc-m-1"; | |
| qcom,buswidth = <0x4>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,connections = <0x68>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x58>; | |
| qcom,slv-rpm-id = <0x75>; | |
| linux,phandle = <0x67>; | |
| phandle = <0x67>; | |
| }; | |
| pcnoc-int-0 { | |
| cell-id = <0x271c>; | |
| label = "pcnoc-int-0"; | |
| qcom,buswidth = <0x8>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,connections = <0x76 0x69 0x6b 0x6a>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x55>; | |
| qcom,slv-rpm-id = <0x72>; | |
| linux,phandle = <0x68>; | |
| phandle = <0x68>; | |
| }; | |
| pcnoc-int-1 { | |
| cell-id = <0x271d>; | |
| label = "pcnoc-int-1"; | |
| qcom,buswidth = <0x8>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,connections = <0x76 0x69 0x6b 0x6a>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x56>; | |
| qcom,slv-rpm-id = <0x73>; | |
| }; | |
| pcnoc-int-2 { | |
| cell-id = <0x2741>; | |
| label = "pcnoc-int-2"; | |
| qcom,buswidth = <0x8>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,connections = <0x77 0x78 0x79 0x7a>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x7c>; | |
| qcom,slv-rpm-id = <0xb8>; | |
| linux,phandle = <0x6a>; | |
| phandle = <0x6a>; | |
| }; | |
| pcnoc-int-3 { | |
| cell-id = <0x2742>; | |
| label = "pcnoc-int-3"; | |
| qcom,buswidth = <0x8>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,connections = <0x7b 0x7c 0x7d 0x7e 0x7f>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x7d>; | |
| qcom,slv-rpm-id = <0xb9>; | |
| linux,phandle = <0x6b>; | |
| phandle = <0x6b>; | |
| }; | |
| pcnoc-s-0 { | |
| cell-id = <0x2722>; | |
| label = "pcnoc-s-0"; | |
| qcom,buswidth = <0x4>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,connections = <0x80 0x81 0x82 0x83>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x59>; | |
| qcom,slv-rpm-id = <0x76>; | |
| linux,phandle = <0x7c>; | |
| phandle = <0x7c>; | |
| }; | |
| pcnoc-s-1 { | |
| cell-id = <0x2723>; | |
| label = "pcnoc-s-1"; | |
| qcom,buswidth = <0x4>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,connections = <0x84>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x5a>; | |
| qcom,slv-rpm-id = <0x77>; | |
| linux,phandle = <0x7b>; | |
| phandle = <0x7b>; | |
| }; | |
| pcnoc-s-2 { | |
| cell-id = <0x2724>; | |
| label = "pcnoc-s-2"; | |
| qcom,buswidth = <0x4>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,connections = <0x85>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x5b>; | |
| qcom,slv-rpm-id = <0x78>; | |
| linux,phandle = <0x77>; | |
| phandle = <0x77>; | |
| }; | |
| pcnoc-s-3 { | |
| cell-id = <0x2725>; | |
| label = "pcnoc-s-3"; | |
| qcom,buswidth = <0x4>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,connections = <0x86>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x5c>; | |
| qcom,slv-rpm-id = <0x79>; | |
| linux,phandle = <0x78>; | |
| phandle = <0x78>; | |
| }; | |
| pcnoc-s-4 { | |
| cell-id = <0x2726>; | |
| label = "pcnoc-s-4"; | |
| qcom,buswidth = <0x4>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,ap-owned; | |
| qcom,connections = <0x87 0x88 0x89>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x5d>; | |
| qcom,slv-rpm-id = <0x7a>; | |
| linux,phandle = <0x7d>; | |
| phandle = <0x7d>; | |
| }; | |
| pcnoc-s-6 { | |
| cell-id = <0x2d1>; | |
| label = "pcnoc-s-6"; | |
| qcom,buswidth = <0x4>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,connections = <0x8a 0x8b 0x8c>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x5e>; | |
| qcom,slv-rpm-id = <0x7b>; | |
| linux,phandle = <0x79>; | |
| phandle = <0x79>; | |
| }; | |
| pcnoc-s-7 { | |
| cell-id = <0x2740>; | |
| label = "pcnoc-s-7"; | |
| qcom,buswidth = <0x4>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,connections = <0x8d 0x8e>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x5f>; | |
| qcom,slv-rpm-id = <0x7c>; | |
| linux,phandle = <0x69>; | |
| phandle = <0x69>; | |
| }; | |
| pcnoc-s-8 { | |
| cell-id = <0x2727>; | |
| label = "pcnoc-s-8"; | |
| qcom,buswidth = <0x4>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,connections = <0x8f 0x90>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,mas-rpm-id = <0x60>; | |
| qcom,slv-rpm-id = <0x7d>; | |
| linux,phandle = <0x7a>; | |
| phandle = <0x7a>; | |
| }; | |
| qdss-int { | |
| cell-id = <0x2719>; | |
| label = "qdss-int"; | |
| qcom,buswidth = <0x8>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,ap-owned; | |
| qcom,connections = <0x6f 0x74>; | |
| qcom,bus-dev = <0x6d>; | |
| qcom,mas-rpm-id = <0x62>; | |
| qcom,slv-rpm-id = <0x80>; | |
| linux,phandle = <0x6c>; | |
| phandle = <0x6c>; | |
| }; | |
| snoc-int-0 { | |
| cell-id = <0x2714>; | |
| label = "snoc-int-0"; | |
| qcom,buswidth = <0x8>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,ap-owned; | |
| qcom,connections = <0x91 0x92 0x93>; | |
| qcom,bus-dev = <0x6d>; | |
| qcom,mas-rpm-id = <0x63>; | |
| qcom,slv-rpm-id = <0x82>; | |
| linux,phandle = <0x6e>; | |
| phandle = <0x6e>; | |
| }; | |
| snoc-int-1 { | |
| cell-id = <0x2715>; | |
| label = "snoc-int-1"; | |
| qcom,buswidth = <0x8>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,connections = <0x94 0x95 0x75>; | |
| qcom,bus-dev = <0x6d>; | |
| qcom,mas-rpm-id = <0x64>; | |
| qcom,slv-rpm-id = <0x83>; | |
| linux,phandle = <0x6f>; | |
| phandle = <0x6f>; | |
| }; | |
| snoc-int-2 { | |
| cell-id = <0x2752>; | |
| label = "snoc-int-2"; | |
| qcom,buswidth = <0x8>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,ap-owned; | |
| qcom,connections = <0x96 0x97>; | |
| qcom,bus-dev = <0x6d>; | |
| qcom,mas-rpm-id = <0x86>; | |
| qcom,slv-rpm-id = <0xc5>; | |
| linux,phandle = <0x70>; | |
| phandle = <0x70>; | |
| }; | |
| slv-ebi { | |
| cell-id = <0x200>; | |
| label = "slv-ebi"; | |
| qcom,buswidth = <0x8>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,bus-dev = <0x64>; | |
| qcom,slv-rpm-id = <0x0>; | |
| linux,phandle = <0x62>; | |
| phandle = <0x62>; | |
| }; | |
| slv-bimc-snoc { | |
| cell-id = <0x2721>; | |
| label = "slv-bimc-snoc"; | |
| qcom,buswidth = <0x8>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,bus-dev = <0x64>; | |
| qcom,connections = <0x98>; | |
| qcom,slv-rpm-id = <0x2>; | |
| linux,phandle = <0x63>; | |
| phandle = <0x63>; | |
| }; | |
| slv-sdcc-2 { | |
| cell-id = <0x260>; | |
| label = "slv-sdcc-2"; | |
| qcom,buswidth = <0x4>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,slv-rpm-id = <0x21>; | |
| linux,phandle = <0x83>; | |
| phandle = <0x83>; | |
| }; | |
| slv-spdm { | |
| cell-id = <0x279>; | |
| label = "slv-spdm"; | |
| qcom,buswidth = <0x4>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,ap-owned; | |
| qcom,bus-dev = <0x66>; | |
| qcom,slv-rpm-id = <0x3c>; | |
| linux,phandle = <0x80>; | |
| phandle = <0x80>; | |
| }; | |
| slv-pdm { | |
| cell-id = <0x267>; | |
| label = "slv-pdm"; | |
| qcom,buswidth = <0x4>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,slv-rpm-id = <0x29>; | |
| linux,phandle = <0x81>; | |
| phandle = <0x81>; | |
| }; | |
| slv-prng { | |
| cell-id = <0x26a>; | |
| label = "slv-prng"; | |
| qcom,buswidth = <0x4>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,slv-rpm-id = <0x2c>; | |
| linux,phandle = <0x82>; | |
| phandle = <0x82>; | |
| }; | |
| slv-tcsr { | |
| cell-id = <0x26f>; | |
| label = "slv-tcsr"; | |
| qcom,buswidth = <0x4>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,slv-rpm-id = <0x32>; | |
| linux,phandle = <0x84>; | |
| phandle = <0x84>; | |
| }; | |
| slv-snoc-cfg { | |
| cell-id = <0x282>; | |
| label = "slv-snoc-cfg"; | |
| qcom,buswidth = <0x4>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,slv-rpm-id = <0x46>; | |
| linux,phandle = <0x85>; | |
| phandle = <0x85>; | |
| }; | |
| slv-message-ram { | |
| cell-id = <0x274>; | |
| label = "slv-message-ram"; | |
| qcom,buswidth = <0x4>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,slv-rpm-id = <0x37>; | |
| linux,phandle = <0x86>; | |
| phandle = <0x86>; | |
| }; | |
| slv-camera-ss-cfg { | |
| cell-id = <0x24d>; | |
| label = "slv-camera-ss-cfg"; | |
| qcom,buswidth = <0x4>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,ap-owned; | |
| qcom,bus-dev = <0x66>; | |
| qcom,slv-rpm-id = <0x3>; | |
| linux,phandle = <0x87>; | |
| phandle = <0x87>; | |
| }; | |
| slv-disp-ss-cfg { | |
| cell-id = <0x24e>; | |
| label = "slv-disp-ss-cfg"; | |
| qcom,buswidth = <0x4>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,ap-owned; | |
| qcom,bus-dev = <0x66>; | |
| qcom,slv-rpm-id = <0x4>; | |
| linux,phandle = <0x88>; | |
| phandle = <0x88>; | |
| }; | |
| slv-venus-cfg { | |
| cell-id = <0x254>; | |
| label = "slv-venus-cfg"; | |
| qcom,buswidth = <0x4>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,ap-owned; | |
| qcom,bus-dev = <0x66>; | |
| qcom,slv-rpm-id = <0xa>; | |
| linux,phandle = <0x89>; | |
| phandle = <0x89>; | |
| }; | |
| slv-gpu-cfg { | |
| cell-id = <0x256>; | |
| label = "slv-gpu-cfg"; | |
| qcom,buswidth = <0x8>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,ap-owned; | |
| qcom,bus-dev = <0x66>; | |
| qcom,slv-rpm-id = <0xb>; | |
| linux,phandle = <0x7e>; | |
| phandle = <0x7e>; | |
| }; | |
| slv-tlmm { | |
| cell-id = <0x270>; | |
| label = "slv-tlmm"; | |
| qcom,buswidth = <0x4>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,slv-rpm-id = <0x33>; | |
| linux,phandle = <0x8a>; | |
| phandle = <0x8a>; | |
| }; | |
| slv-blsp-1 { | |
| cell-id = <0x265>; | |
| label = "slv-blsp-1"; | |
| qcom,buswidth = <0x4>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,slv-rpm-id = <0x27>; | |
| linux,phandle = <0x8b>; | |
| phandle = <0x8b>; | |
| }; | |
| slv-blsp-2 { | |
| cell-id = <0x263>; | |
| label = "slv-blsp-2"; | |
| qcom,buswidth = <0x4>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,slv-rpm-id = <0x25>; | |
| linux,phandle = <0x8c>; | |
| phandle = <0x8c>; | |
| }; | |
| slv-pmic-arb { | |
| cell-id = <0x278>; | |
| label = "slv-pmic-arb"; | |
| qcom,buswidth = <0x4>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,slv-rpm-id = <0x3b>; | |
| linux,phandle = <0x8e>; | |
| phandle = <0x8e>; | |
| }; | |
| slv-sdcc-1 { | |
| cell-id = <0x25e>; | |
| label = "slv-sdcc-1"; | |
| qcom,buswidth = <0x4>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,slv-rpm-id = <0x1f>; | |
| linux,phandle = <0x8d>; | |
| phandle = <0x8d>; | |
| }; | |
| slv-crypto-0-cfg { | |
| cell-id = <0x271>; | |
| label = "slv-crypto-0-cfg"; | |
| qcom,buswidth = <0x4>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,slv-rpm-id = <0x34>; | |
| linux,phandle = <0x90>; | |
| phandle = <0x90>; | |
| }; | |
| slv-usb-hs { | |
| cell-id = <0x266>; | |
| label = "slv-usb-hs"; | |
| qcom,buswidth = <0x4>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,slv-rpm-id = <0x28>; | |
| linux,phandle = <0x8f>; | |
| phandle = <0x8f>; | |
| }; | |
| slv-tcu { | |
| cell-id = <0x2a0>; | |
| label = "slv-tcu"; | |
| qcom,buswidth = <0x8>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,ap-owned; | |
| qcom,bus-dev = <0x66>; | |
| qcom,slv-rpm-id = <0x85>; | |
| linux,phandle = <0x7f>; | |
| phandle = <0x7f>; | |
| }; | |
| slv-pcnoc-snoc { | |
| cell-id = <0x271b>; | |
| label = "slv-pcnoc-snoc"; | |
| qcom,buswidth = <0x8>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,bus-dev = <0x66>; | |
| qcom,connections = <0x99>; | |
| qcom,slv-rpm-id = <0x2d>; | |
| linux,phandle = <0x76>; | |
| phandle = <0x76>; | |
| }; | |
| slv-kpss-ahb { | |
| cell-id = <0x2a1>; | |
| label = "slv-kpss-ahb"; | |
| qcom,buswidth = <0x4>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,ap-owned; | |
| qcom,bus-dev = <0x6d>; | |
| qcom,slv-rpm-id = <0x14>; | |
| linux,phandle = <0x93>; | |
| phandle = <0x93>; | |
| }; | |
| slv-wcss { | |
| cell-id = <0x248>; | |
| label = "slv-wcss"; | |
| qcom,buswidth = <0x4>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,ap-owned; | |
| qcom,bus-dev = <0x6d>; | |
| qcom,slv-rpm-id = <0x17>; | |
| linux,phandle = <0x92>; | |
| phandle = <0x92>; | |
| }; | |
| slv-snoc-bimc-0 { | |
| cell-id = <0x2729>; | |
| label = "slv-snoc-bimc-0"; | |
| qcom,buswidth = <0x10>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,ap-owned; | |
| qcom,bus-dev = <0x72>; | |
| qcom,connections = <0x9a>; | |
| qcom,slv-rpm-id = <0x18>; | |
| linux,phandle = <0x73>; | |
| phandle = <0x73>; | |
| }; | |
| slv-snoc-bimc-1 { | |
| cell-id = <0x272a>; | |
| label = "slv-snoc-bimc-1"; | |
| qcom,buswidth = <0x8>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,bus-dev = <0x6d>; | |
| qcom,connections = <0x9b>; | |
| qcom,slv-rpm-id = <0x68>; | |
| linux,phandle = <0x74>; | |
| phandle = <0x74>; | |
| }; | |
| slv-snoc-bimc-2 { | |
| cell-id = <0x273e>; | |
| label = "slv-snoc-bimc-2"; | |
| qcom,buswidth = <0x10>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,ap-owned; | |
| qcom,bus-dev = <0x72>; | |
| qcom,connections = <0x9c>; | |
| qcom,slv-rpm-id = <0x89>; | |
| linux,phandle = <0x71>; | |
| phandle = <0x71>; | |
| }; | |
| slv-imem { | |
| cell-id = <0x249>; | |
| label = "slv-imem"; | |
| qcom,buswidth = <0x8>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,bus-dev = <0x6d>; | |
| qcom,slv-rpm-id = <0x1a>; | |
| linux,phandle = <0x95>; | |
| phandle = <0x95>; | |
| }; | |
| slv-snoc-pcnoc { | |
| cell-id = <0x273a>; | |
| label = "slv-snoc-pcnoc"; | |
| qcom,buswidth = <0x8>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,bus-dev = <0x6d>; | |
| qcom,connections = <0x9d>; | |
| qcom,slv-rpm-id = <0x1c>; | |
| linux,phandle = <0x75>; | |
| phandle = <0x75>; | |
| }; | |
| slv-qdss-stm { | |
| cell-id = <0x24c>; | |
| label = "slv-qdss-stm"; | |
| qcom,buswidth = <0x4>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,bus-dev = <0x6d>; | |
| qcom,slv-rpm-id = <0x1e>; | |
| linux,phandle = <0x94>; | |
| phandle = <0x94>; | |
| }; | |
| slv-cats-0 { | |
| cell-id = <0x297>; | |
| label = "slv-cats-0"; | |
| qcom,buswidth = <0x10>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,ap-owned; | |
| qcom,bus-dev = <0x72>; | |
| qcom,slv-rpm-id = <0x6a>; | |
| linux,phandle = <0x96>; | |
| phandle = <0x96>; | |
| }; | |
| slv-cats-1 { | |
| cell-id = <0x298>; | |
| label = "slv-cats-1"; | |
| qcom,buswidth = <0x8>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,ap-owned; | |
| qcom,bus-dev = <0x6d>; | |
| qcom,slv-rpm-id = <0x6b>; | |
| linux,phandle = <0x97>; | |
| phandle = <0x97>; | |
| }; | |
| slv-lpass { | |
| cell-id = <0x20a>; | |
| label = "slv-lpass"; | |
| qcom,buswidth = <0x8>; | |
| qcom,agg-ports = <0x1>; | |
| qcom,ap-owned; | |
| qcom,bus-dev = <0x6d>; | |
| qcom,slv-rpm-id = <0x15>; | |
| linux,phandle = <0x91>; | |
| phandle = <0x91>; | |
| }; | |
| }; | |
| devfreq_spdm_cpu { | |
| compatible = "qcom,devfreq_spdm"; | |
| qcom,msm-bus,name = "devfreq_spdm"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0x1 0x200 0x0 0x0 0x1 0x200 0x0 0x0>; | |
| qcom,msm-bus,active-only; | |
| qcom,spdm-client = <0x0>; | |
| clock-names = "cci_clk"; | |
| clocks = <0x9e 0x96854074>; | |
| qcom,bw-upstep = <0x190>; | |
| qcom,bw-dwnstep = <0xe38>; | |
| qcom,max-vote = <0xe38>; | |
| qcom,up-step-multp = <0x1>; | |
| qcom,spdm-interval = <0x32>; | |
| qcom,ports = <0xb>; | |
| qcom,alpha-up = <0x8>; | |
| qcom,alpha-down = <0xf>; | |
| qcom,bucket-size = <0x8>; | |
| qcom,pl-freqs = <0x7ef40 0xafc80>; | |
| qcom,reject-rate = <0x1388 0x1388 0x1388 0x1388 0x1388 0x1388>; | |
| qcom,response-time-us = <0x1388 0x1388 0x1388 0x1388 0x1388 0x1388>; | |
| qcom,cci-response-time-us = <0x1388 0x1388 0x1388 0x1388 0x1388 0x1388>; | |
| qcom,max-cci-freq = <0x7a120>; | |
| }; | |
| devfreq_spdm_gov { | |
| compatible = "qcom,gov_spdm_hyp"; | |
| interrupt-names = "spdm-irq"; | |
| interrupts = <0x0 0xc0 0x0>; | |
| }; | |
| qcom,smp2p-modem@0xb011008 { | |
| compatible = "qcom,smp2p"; | |
| reg = <0xb011008 0x4>; | |
| qcom,remote-pid = <0x1>; | |
| qcom,irq-bitmask = <0x4000>; | |
| interrupts = <0x0 0x1b 0x1>; | |
| }; | |
| qcom,smp2p-wcnss@0xb011008 { | |
| compatible = "qcom,smp2p"; | |
| reg = <0xb011008 0x4>; | |
| qcom,remote-pid = <0x4>; | |
| qcom,irq-bitmask = <0x40000>; | |
| interrupts = <0x0 0x8f 0x1>; | |
| }; | |
| qcom,smp2p-adsp@0xb011008 { | |
| compatible = "qcom,smp2p"; | |
| reg = <0xb011008 0x4>; | |
| qcom,remote-pid = <0x2>; | |
| qcom,irq-bitmask = <0x400>; | |
| interrupts = <0x0 0x123 0x1>; | |
| }; | |
| qcom,smp2pgpio-smp2p-15-in { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "smp2p"; | |
| qcom,remote-pid = <0xf>; | |
| qcom,is-inbound; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x2>; | |
| linux,phandle = <0x9f>; | |
| phandle = <0x9f>; | |
| }; | |
| qcom,smp2pgpio_test_smp2p_15_in { | |
| compatible = "qcom,smp2pgpio_test_smp2p_15_in"; | |
| gpios = <0x9f 0x0 0x0>; | |
| }; | |
| qcom,smp2pgpio-smp2p-15-out { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "smp2p"; | |
| qcom,remote-pid = <0xf>; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x2>; | |
| linux,phandle = <0xa0>; | |
| phandle = <0xa0>; | |
| }; | |
| qcom,smp2pgpio_test_smp2p_15_out { | |
| compatible = "qcom,smp2pgpio_test_smp2p_15_out"; | |
| gpios = <0xa0 0x0 0x0>; | |
| }; | |
| qcom,smp2pgpio-smp2p-1-in { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "smp2p"; | |
| qcom,remote-pid = <0x1>; | |
| qcom,is-inbound; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x2>; | |
| linux,phandle = <0xa1>; | |
| phandle = <0xa1>; | |
| }; | |
| qcom,smp2pgpio_test_smp2p_1_in { | |
| compatible = "qcom,smp2pgpio_test_smp2p_1_in"; | |
| gpios = <0xa1 0x0 0x0>; | |
| }; | |
| qcom,smp2pgpio-smp2p-1-out { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "smp2p"; | |
| qcom,remote-pid = <0x1>; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x2>; | |
| linux,phandle = <0xa2>; | |
| phandle = <0xa2>; | |
| }; | |
| qcom,smp2pgpio_test_smp2p_1_out { | |
| compatible = "qcom,smp2pgpio_test_smp2p_1_out"; | |
| gpios = <0xa2 0x0 0x0>; | |
| }; | |
| qcom,smp2pgpio-smp2p-4-in { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "smp2p"; | |
| qcom,remote-pid = <0x4>; | |
| qcom,is-inbound; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x2>; | |
| linux,phandle = <0xa3>; | |
| phandle = <0xa3>; | |
| }; | |
| qcom,smp2pgpio_test_smp2p_4_in { | |
| compatible = "qcom,smp2pgpio_test_smp2p_4_in"; | |
| gpios = <0xa3 0x0 0x0>; | |
| }; | |
| qcom,smp2pgpio-smp2p-4-out { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "smp2p"; | |
| qcom,remote-pid = <0x4>; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x2>; | |
| linux,phandle = <0xa4>; | |
| phandle = <0xa4>; | |
| }; | |
| qcom,smp2pgpio_test_smp2p_4_out { | |
| compatible = "qcom,smp2pgpio_test_smp2p_4_out"; | |
| gpios = <0xa4 0x0 0x0>; | |
| }; | |
| qcom,smp2pgpio-smp2p-2-in { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "smp2p"; | |
| qcom,remote-pid = <0x2>; | |
| qcom,is-inbound; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x2>; | |
| linux,phandle = <0xa5>; | |
| phandle = <0xa5>; | |
| }; | |
| qcom,smp2pgpio_test_smp2p_2_in { | |
| compatible = "qcom,smp2pgpio_test_smp2p_2_in"; | |
| gpios = <0xa5 0x0 0x0>; | |
| }; | |
| qcom,smp2pgpio-smp2p-2-out { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "smp2p"; | |
| qcom,remote-pid = <0x2>; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x2>; | |
| linux,phandle = <0xa6>; | |
| phandle = <0xa6>; | |
| }; | |
| qcom,smp2pgpio_test_smp2p_2_out { | |
| compatible = "qcom,smp2pgpio_test_smp2p_2_out"; | |
| gpios = <0xa6 0x0 0x0>; | |
| }; | |
| qcom,smp2pgpio-ssr-smp2p-1-in { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "slave-kernel"; | |
| qcom,remote-pid = <0x1>; | |
| qcom,is-inbound; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x2>; | |
| linux,phandle = <0x115>; | |
| phandle = <0x115>; | |
| }; | |
| qcom,smp2pgpio-ssr-smp2p-1-out { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "master-kernel"; | |
| qcom,remote-pid = <0x1>; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x2>; | |
| linux,phandle = <0x116>; | |
| phandle = <0x116>; | |
| }; | |
| qcom,smp2pgpio-ssr-smp2p-2-in { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "slave-kernel"; | |
| qcom,remote-pid = <0x2>; | |
| qcom,is-inbound; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x2>; | |
| linux,phandle = <0x118>; | |
| phandle = <0x118>; | |
| }; | |
| qcom,smp2pgpio-ssr-smp2p-2-out { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "master-kernel"; | |
| qcom,remote-pid = <0x2>; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x2>; | |
| linux,phandle = <0x119>; | |
| phandle = <0x119>; | |
| }; | |
| qcom,smp2pgpio-ssr-smp2p-4-in { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "slave-kernel"; | |
| qcom,remote-pid = <0x4>; | |
| qcom,is-inbound; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x2>; | |
| linux,phandle = <0x11b>; | |
| phandle = <0x11b>; | |
| }; | |
| qcom,smp2pgpio-ssr-smp2p-4-out { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "master-kernel"; | |
| qcom,remote-pid = <0x4>; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x2>; | |
| linux,phandle = <0x11c>; | |
| phandle = <0x11c>; | |
| }; | |
| qcom,spm@b1d2000 { | |
| compatible = "qcom,spm-v2"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| reg = <0xb1d2000 0x1000>; | |
| qcom,name = "system-cci"; | |
| qcom,saw2-ver-reg = <0xfd0>; | |
| qcom,saw2-cfg = <0x14>; | |
| qcom,saw2-spm-dly = <0x3c102800>; | |
| qcom,saw2-spm-ctl = <0xe>; | |
| qcom,cpu-vctl-list = <0x6 0x7 0x8 0x9 0x2 0x3 0x4 0x5>; | |
| qcom,vctl-timeout-us = <0x1f4>; | |
| qcom,vctl-port = <0x0>; | |
| qcom,phase-port = <0x1>; | |
| qcom,pfm-port = <0x2>; | |
| }; | |
| qcom,lpm-levels { | |
| compatible = "qcom,lpm-levels"; | |
| qcom,use-psci; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| clock-names = "l2_clk", "cpu0_clk", "cpu1_clk", "cpu2_clk", "cpu3_clk", "cpu4_clk", "cpu5_clk", "cpu6_clk", "cpu7_clk"; | |
| clocks = <0x9e 0x96854074 0x9e 0xcf28e63a 0x9e 0xcf28e63a 0x9e 0xcf28e63a 0x9e 0xcf28e63a 0x9e 0xc69f0878 0x9e 0xc69f0878 0x9e 0xc69f0878 0x9e 0xc69f0878>; | |
| qcom,pm-cluster@0 { | |
| reg = <0x0>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| label = "system"; | |
| qcom,spm-device-names = "cci"; | |
| qcom,default-level = <0x0>; | |
| qcom,psci-mode-shift = <0x8>; | |
| qcom,psci-mode-mask = <0xf>; | |
| qcom,pm-cluster-level@0 { | |
| reg = <0x0>; | |
| label = "system-active"; | |
| qcom,psci-mode = <0x0>; | |
| qcom,latency-us = <0x19f>; | |
| qcom,ss-power = <0x195>; | |
| qcom,energy-overhead = <0x885d5>; | |
| qcom,time-overhead = <0x3d4>; | |
| }; | |
| qcom,pm-cluster-level@1 { | |
| reg = <0x1>; | |
| label = "system-wfi"; | |
| qcom,psci-mode = <0x1>; | |
| qcom,latency-us = <0x1db>; | |
| qcom,ss-power = <0x15a>; | |
| qcom,energy-overhead = <0xaf851>; | |
| qcom,time-overhead = <0x41a>; | |
| qcom,min-child-idx = <0x1>; | |
| }; | |
| qcom,pm-cluster-level@2 { | |
| reg = <0x2>; | |
| label = "system-ret"; | |
| qcom,psci-mode = <0x2>; | |
| qcom,latency-us = <0x384>; | |
| qcom,ss-power = <0x140>; | |
| qcom,energy-overhead = <0xe049f>; | |
| qcom,time-overhead = <0x4e2>; | |
| qcom,min-child-idx = <0x1>; | |
| qcom,reset-level = <0x1>; | |
| }; | |
| qcom,pm-cluster-level@3 { | |
| reg = <0x3>; | |
| label = "system-pc"; | |
| qcom,psci-mode = <0x3>; | |
| qcom,latency-us = <0x2a1e>; | |
| qcom,ss-power = <0x132>; | |
| qcom,energy-overhead = <0x102cc8>; | |
| qcom,time-overhead = <0x592>; | |
| qcom,min-child-idx = <0x2>; | |
| qcom,notify-rpm; | |
| qcom,is-reset; | |
| qcom,reset-level = <0x3>; | |
| }; | |
| qcom,pm-cluster@0 { | |
| reg = <0x0>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| label = "perf"; | |
| qcom,spm-device-names = "l2"; | |
| qcom,default-level = <0x0>; | |
| qcom,cpu = <0x6 0x7 0x8 0x9>; | |
| qcom,psci-mode-shift = <0x4>; | |
| qcom,psci-mode-mask = <0xf>; | |
| qcom,pm-cluster-level@0 { | |
| reg = <0x0>; | |
| label = "perf-l2-wfi"; | |
| qcom,psci-mode = <0x1>; | |
| qcom,latency-us = <0xd2>; | |
| qcom,ss-power = <0x1d8>; | |
| qcom,energy-overhead = <0x38fa7>; | |
| qcom,time-overhead = <0x146>; | |
| }; | |
| qcom,pm-cluster-level@1 { | |
| reg = <0x1>; | |
| label = "perf-l2-gdhs"; | |
| qcom,psci-mode = <0x4>; | |
| qcom,latency-us = <0x10b>; | |
| qcom,ss-power = <0x1b3>; | |
| qcom,energy-overhead = <0x5ebac>; | |
| qcom,time-overhead = <0x273>; | |
| qcom,min-child-idx = <0x1>; | |
| qcom,reset-level = <0x2>; | |
| }; | |
| qcom,pm-cluster-level@2 { | |
| reg = <0x2>; | |
| label = "perf-l2-pc"; | |
| qcom,psci-mode = <0x5>; | |
| qcom,latency-us = <0x131>; | |
| qcom,ss-power = <0x195>; | |
| qcom,energy-overhead = <0x89e3a>; | |
| qcom,time-overhead = <0x36f>; | |
| qcom,min-child-idx = <0x1>; | |
| qcom,is-reset; | |
| qcom,reset-level = <0x3>; | |
| }; | |
| qcom,pm-cpu { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| qcom,psci-mode-shift = <0x0>; | |
| qcom,psci-mode-mask = <0xf>; | |
| qcom,pm-cpu-level@0 { | |
| reg = <0x0>; | |
| qcom,psci-cpu-mode = <0x0>; | |
| qcom,spm-cpu-mode = "wfi"; | |
| qcom,latency-us = <0x1>; | |
| qcom,ss-power = <0x212>; | |
| qcom,energy-overhead = <0xf556>; | |
| qcom,time-overhead = <0x43>; | |
| }; | |
| qcom,pm-cpu-level@1 { | |
| reg = <0x1>; | |
| qcom,psci-cpu-mode = <0x3>; | |
| qcom,spm-cpu-mode = "pc"; | |
| qcom,latency-us = <0xbe>; | |
| qcom,ss-power = <0x1d8>; | |
| qcom,energy-overhead = <0x38fa7>; | |
| qcom,time-overhead = <0x146>; | |
| qcom,use-broadcast-timer; | |
| qcom,is-reset; | |
| qcom,reset-level = <0x3>; | |
| }; | |
| }; | |
| }; | |
| qcom,pm-cluster@1 { | |
| reg = <0x1>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| label = "pwr"; | |
| qcom,spm-device-names = "l2"; | |
| qcom,default-level = <0x0>; | |
| qcom,cpu = <0x2 0x3 0x4 0x5>; | |
| qcom,psci-mode-shift = <0x4>; | |
| qcom,psci-mode-mask = <0xf>; | |
| qcom,pm-cluster-level@0 { | |
| reg = <0x0>; | |
| label = "pwr-l2-wfi"; | |
| qcom,psci-mode = <0x1>; | |
| qcom,latency-us = <0xdd>; | |
| qcom,ss-power = <0x1cc>; | |
| qcom,energy-overhead = <0x3596b>; | |
| qcom,time-overhead = <0x190>; | |
| }; | |
| qcom,pm-cluster-level@1 { | |
| reg = <0x1>; | |
| label = "pwr-l2-gdhs"; | |
| qcom,psci-mode = <0x4>; | |
| qcom,latency-us = <0x151>; | |
| qcom,ss-power = <0x1b1>; | |
| qcom,energy-overhead = <0x5aecd>; | |
| qcom,time-overhead = <0x2cd>; | |
| qcom,min-child-idx = <0x1>; | |
| qcom,reset-level = <0x2>; | |
| }; | |
| qcom,pm-cluster-level@2 { | |
| reg = <0x2>; | |
| label = "pwr-l2-pc"; | |
| qcom,psci-mode = <0x5>; | |
| qcom,latency-us = <0x19f>; | |
| qcom,ss-power = <0x195>; | |
| qcom,energy-overhead = <0x885d5>; | |
| qcom,time-overhead = <0x3d4>; | |
| qcom,min-child-idx = <0x1>; | |
| qcom,is-reset; | |
| qcom,reset-level = <0x3>; | |
| }; | |
| qcom,pm-cpu { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| qcom,psci-mode-shift = <0x0>; | |
| qcom,psci-mode-mask = <0xf>; | |
| qcom,pm-cpu-level@0 { | |
| reg = <0x0>; | |
| qcom,psci-cpu-mode = <0x0>; | |
| qcom,spm-cpu-mode = "wfi"; | |
| qcom,latency-us = <0x1>; | |
| qcom,ss-power = <0x21c>; | |
| qcom,energy-overhead = <0x16b60>; | |
| qcom,time-overhead = <0x39>; | |
| }; | |
| qcom,pm-cpu-level@1 { | |
| reg = <0x1>; | |
| qcom,psci-cpu-mode = <0x3>; | |
| qcom,spm-cpu-mode = "pc"; | |
| qcom,latency-us = <0xdd>; | |
| qcom,ss-power = <0x1cc>; | |
| qcom,energy-overhead = <0x3596b>; | |
| qcom,time-overhead = <0x190>; | |
| qcom,use-broadcast-timer; | |
| qcom,is-reset; | |
| qcom,reset-level = <0x3>; | |
| }; | |
| }; | |
| }; | |
| }; | |
| }; | |
| qcom,mpm@601d0 { | |
| compatible = "qcom,mpm-v2"; | |
| reg = <0x601d0 0x1000 0xb011008 0x4>; | |
| reg-names = "vmpm", "ipc"; | |
| interrupts = <0x0 0xab 0x1>; | |
| clocks = <0x2b 0x2be48257>; | |
| clock-names = "xo"; | |
| qcom,ipc-bit-offset = <0x1>; | |
| qcom,gic-parent = <0x1>; | |
| qcom,gic-map = <0x2 0xd8 0x31 0xac 0x3a 0xa6 0x35 0x68 0x3e 0xde 0xff 0x12 0xff 0x13 0xff 0x14 0xff 0x23 0xff 0x27 0xff 0x28 0xff 0x2f 0xff 0x38 0xff 0x39 0xff 0x3a 0xff 0x3b 0xff 0x3c 0xff 0x3d 0xff 0x41 0xff 0x45 0xff 0x49 0xff 0x4a 0xff 0x4b 0xff 0x4c 0xff 0x4e 0xff 0x4f 0xff 0x55 0xff 0x56 0xff 0x5a 0xff 0x5c 0xff 0x5d 0xff 0x61 0xff 0x66 0xff 0x6c 0xff 0x6d 0xff 0x70 0xff 0x72 0xff 0x7e 0xff 0x80 0xff 0x81 0xff 0x83 0xff 0x88 0xff 0x89 0xff 0x8a 0xff 0x8c 0xff 0x8d 0xff 0x8e 0xff 0x8f 0xff 0x90 0xff 0x91 0xff 0x92 0xff 0x93 0xff 0x94 0xff 0x95 0xff 0x96 0xff 0x97 0xff 0x98 0xff 0x99 0xff 0x9b 0xff 0x9d 0xff 0xa7 0xff 0xaa 0xff 0xad 0xff 0xae 0xff 0xaf 0xff 0xb0 0xff 0xb1 0xff 0xb2 0xff 0xb3 0xff 0xb5 0xff 0xbc 0xff 0xbd 0xff 0xbe 0xff 0xbf 0xff 0xc0 0xff 0xc1 0xff 0xc2 0xff 0xc3 0xff 0xc4 0xff 0xc5 0xff 0xc6 0xff 0xc8 0xff 0xc9 0xff 0xca 0xff 0xcb 0xff 0xcc 0xff 0xcd 0xff 0xce 0xff 0xcf 0xff 0xd7 0xff 0xe0 0xff 0xe7 0xff 0xef 0xff 0xf0 0xff 0xfd 0xff 0x101 0xff 0x104 0xff 0x106 0xff 0x10d 0xff 0x10e 0xff 0x10f 0xff 0x110 0xff 0x111 0xff 0x112 0xff 0x113 0xff 0x114 0xff 0x115 0xff 0x11d 0xff 0x11e 0xff 0x11f 0xff 0x141 0xff 0x142 0xff 0x143 0xff 0x145 0xff 0x158>; | |
| qcom,gpio-parent = <0xa7>; | |
| qcom,gpio-map = <0x3 0x26 0x4 0x1 0x5 0x5 0x6 0x9 0x8 0x25 0x9 0x24 0xa 0xd 0xb 0x23 0xc 0x11 0xd 0x15 0xe 0x36 0xf 0x22 0x10 0x1f 0x11 0x3a 0x12 0x1c 0x13 0x2a 0x14 0x19 0x15 0xc 0x16 0x2b 0x17 0x2c 0x18 0x2d 0x19 0x2e 0x1a 0x30 0x1b 0x41 0x1c 0x5d 0x1d 0x61 0x1e 0x3f 0x1f 0x46 0x20 0x47 0x21 0x48 0x22 0x51 0x23 0x7e 0x24 0x5a 0x25 0x80 0x26 0x5b 0x27 0x29 0x28 0x7f 0x29 0x56 0x32 0x43 0x33 0x49 0x34 0x4a 0x35 0x3e 0x36 0x7c 0x37 0x3d 0x38 0x82 0x39 0x3b 0x3b 0x32>; | |
| }; | |
| qcom,cpu-sleep-status { | |
| compatible = "qcom,cpu-sleep-status"; | |
| }; | |
| qcom,rpm-log@29dc00 { | |
| compatible = "qcom,rpm-log"; | |
| reg = <0x29dc00 0x4000>; | |
| qcom,rpm-addr-phys = <0x200000>; | |
| qcom,offset-version = <0x4>; | |
| qcom,offset-page-buffer-addr = <0x24>; | |
| qcom,offset-log-len = <0x28>; | |
| qcom,offset-log-len-mask = <0x2c>; | |
| qcom,offset-page-indices = <0x38>; | |
| }; | |
| qcom,rpm-stats@29dba0 { | |
| compatible = "qcom,rpm-stats"; | |
| reg = <0x200000 0x1000 0x290014 0x4 0x29001c 0x4>; | |
| reg-names = "phys_addr_base", "offset_addr", "heap_phys_addrbase"; | |
| qcom,sleep-stats-version = <0x2>; | |
| }; | |
| qcom,rpm-master-stats@60150 { | |
| compatible = "qcom,rpm-master-stats"; | |
| reg = <0x60150 0x5000>; | |
| qcom,masters = "APSS", "MPSS", "PRONTO", "TZ", "LPASS"; | |
| qcom,master-stats-version = <0x2>; | |
| qcom,master-offset = <0x1000>; | |
| }; | |
| qcom,iommu-domains { | |
| compatible = "qcom,iommu-domains"; | |
| qcom,iommu-domain2 { | |
| label = "venus_ns"; | |
| qcom,iommu-contexts = <0xa8>; | |
| qcom,virtual-addr-pool = <0x5dc00000 0x7f000000 0xdcc00000 0x1000000>; | |
| linux,phandle = <0xae>; | |
| phandle = <0xae>; | |
| }; | |
| qcom,iommu-domain3 { | |
| label = "venus_sec_bitstream"; | |
| qcom,iommu-contexts = <0xa9>; | |
| qcom,virtual-addr-pool = <0x4b000000 0x12c00000>; | |
| qcom,secure-domain; | |
| linux,phandle = <0xaf>; | |
| phandle = <0xaf>; | |
| }; | |
| qcom,iommu-domain4 { | |
| label = "venus_sec_pixel"; | |
| qcom,iommu-contexts = <0xaa>; | |
| qcom,virtual-addr-pool = <0x25800000 0x25800000>; | |
| qcom,secure-domain; | |
| linux,phandle = <0xb0>; | |
| phandle = <0xb0>; | |
| }; | |
| qcom,iommu-domain5 { | |
| label = "venus_sec_non_pixel"; | |
| qcom,iommu-contexts = <0xab>; | |
| qcom,virtual-addr-pool = <0x1000000 0x24800000>; | |
| qcom,secure-domain; | |
| linux,phandle = <0xb1>; | |
| phandle = <0xb1>; | |
| }; | |
| }; | |
| qcom,vidc@1d00000 { | |
| compatible = "qcom,msm-vidc"; | |
| reg = <0x1d00000 0xff000>; | |
| interrupts = <0x0 0x2c 0x0>; | |
| qcom,hfi-version = "3xx"; | |
| venus-supply = <0xac>; | |
| venus-core0-supply = <0xad>; | |
| clocks = <0x2b 0xf76a02bb 0x2b 0x83a7f549 0x2b 0x8d778c6 0x2b 0xcdf4c8f6>; | |
| clock-names = "core_clk", "core0_clk", "iface_clk", "bus_clk"; | |
| qcom,clock-configs = <0x1 0x0 0x0 0x0>; | |
| qcom,sw-power-collapse; | |
| qcom,slave-side-cp; | |
| qcom,dcvs-tbl = <0x1a5e0 0x1a5e0 0x3bc40 0x4 0x1a5e0 0x1a5e0 0x3bc40 0xf00000c>; | |
| qcom,dcvs-limit = <0x1fe0 0x1e 0x1fe0 0x1e>; | |
| qcom,hfi = "venus"; | |
| qcom,reg-presets = <0xe0020 0x5555556 0xe0024 0x5555556 0x80124 0x3>; | |
| qcom,qdss-presets = <0x826000 0x1000 0x827000 0x1000 0x822000 0x1000 0x803000 0x1000 0x9180000 0x1000 0x9181000 0x1000>; | |
| qcom,max-hw-load = <0x56220>; | |
| qcom,firmware-name = "venus"; | |
| qcom,allowed-clock-rates = <0x15752a00 0x1312d000 0x12646790 0xe4e1c00 0x9e73f70>; | |
| qcom,clock-freq-tbl { | |
| qcom,profile-enc { | |
| qcom,codec-mask = <0x55555555>; | |
| qcom,cycles-per-mb = <0x90c>; | |
| qcom,low-power-mode-factor = <0x8000>; | |
| }; | |
| qcom,profile-dec { | |
| qcom,codec-mask = <0xf3ffffff>; | |
| qcom,cycles-per-mb = <0x314>; | |
| }; | |
| qcom,profile-hevcdec { | |
| qcom,codec-mask = <0xc000000>; | |
| qcom,cycles-per-mb = <0x3f7>; | |
| }; | |
| }; | |
| qcom,vidc-iommu-domains { | |
| qcom,domain-ns { | |
| qcom,vidc-domain-phandle = <0xae>; | |
| qcom,vidc-buffer-types = <0xfff>; | |
| }; | |
| qcom,domain-sec-bs { | |
| qcom,vidc-domain-phandle = <0xaf>; | |
| qcom,vidc-buffer-types = <0x241>; | |
| }; | |
| qcom,domain-sec-px { | |
| qcom,vidc-domain-phandle = <0xb0>; | |
| qcom,vidc-buffer-types = <0x106>; | |
| }; | |
| qcom,domain-sec-np { | |
| qcom,vidc-domain-phandle = <0xb1>; | |
| qcom,vidc-buffer-types = <0x480>; | |
| }; | |
| }; | |
| venus_bus_ddr { | |
| compatible = "qcom,msm-vidc,bus"; | |
| label = "venus-ddr"; | |
| qcom,bus-master = <0x3f>; | |
| qcom,bus-slave = <0x200>; | |
| qcom,bus-governor = "venus-ddr-gov"; | |
| qcom,bus-range-kbps = <0x3e8 0xdfe08>; | |
| }; | |
| arm9_bus_ddr { | |
| compatible = "qcom,msm-vidc,bus"; | |
| label = "venus-arm9-ddr"; | |
| qcom,bus-master = <0x3f>; | |
| qcom,bus-slave = <0x200>; | |
| qcom,bus-governor = "performance"; | |
| qcom,bus-range-kbps = <0x1 0x1>; | |
| }; | |
| }; | |
| venus-ddr-gov { | |
| compatible = "qcom,msm-vidc,governor,table"; | |
| status = "ok"; | |
| qcom,bus-freq-table { | |
| qcom,profile-enc { | |
| qcom,codec-mask = <0x55555555>; | |
| qcom,load-busfreq-tbl = <0x3bc40 0xcd528 0x34bc0 0xb4aa0 0x2f760 0xa6040 0x23280 0x79180 0x1a5e0 0x5a550 0x17bb0 0x53020 0xbdd8 0x29810 0x11940 0x3c8c0 0x8ca0 0x1e460 0x4650 0x11170 0x2328 0x88b8 0x0 0x0>; | |
| }; | |
| qcom,profile-dec { | |
| qcom,codec-mask = <0xffffffff>; | |
| qcom,load-busfreq-tbl = <0x3bc40 0x93b48 0x34bc0 0x83d60 0x2f760 0x762a0 0x23280 0x57e40 0x1a5e0 0x41eb0 0x17bb0 0x3b150 0xbdd8 0x1d8a8 0x11940 0x2bf20 0x8ca0 0x15f90 0x4650 0xafc8 0x0 0x0>; | |
| }; | |
| }; | |
| }; | |
| interrupt-controller@b000000 { | |
| compatible = "qcom,msm-qgic2"; | |
| interrupt-controller; | |
| #interrupt-cells = <0x3>; | |
| reg = <0xb000000 0x1000 0xb002000 0x1000>; | |
| linux,phandle = <0x1>; | |
| phandle = <0x1>; | |
| }; | |
| timer { | |
| compatible = "arm,armv8-timer"; | |
| interrupts = <0x1 0x2 0xff08 0x1 0x3 0xff08 0x1 0x4 0xff08 0x1 0x1 0xff08>; | |
| clock-frequency = <0x124f800>; | |
| }; | |
| timer@b120000 { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| ranges; | |
| compatible = "arm,armv7-timer-mem"; | |
| reg = <0xb120000 0x1000>; | |
| clock-frequency = <0x124f800>; | |
| frame@b121000 { | |
| frame-number = <0x0>; | |
| interrupts = <0x0 0x8 0x4 0x0 0x7 0x4>; | |
| reg = <0xb121000 0x1000 0xb122000 0x1000>; | |
| }; | |
| frame@b123000 { | |
| frame-number = <0x1>; | |
| interrupts = <0x0 0x9 0x4>; | |
| reg = <0xb123000 0x1000>; | |
| status = "disabled"; | |
| }; | |
| frame@b124000 { | |
| frame-number = <0x2>; | |
| interrupts = <0x0 0xa 0x4>; | |
| reg = <0xb124000 0x1000>; | |
| status = "disabled"; | |
| }; | |
| frame@b125000 { | |
| frame-number = <0x3>; | |
| interrupts = <0x0 0xb 0x4>; | |
| reg = <0xb125000 0x1000>; | |
| status = "disabled"; | |
| }; | |
| frame@b126000 { | |
| frame-number = <0x4>; | |
| interrupts = <0x0 0xc 0x4>; | |
| reg = <0xb126000 0x1000>; | |
| status = "disabled"; | |
| }; | |
| frame@b127000 { | |
| frame-number = <0x5>; | |
| interrupts = <0x0 0xd 0x4>; | |
| reg = <0xb127000 0x1000>; | |
| status = "disabled"; | |
| }; | |
| frame@b128000 { | |
| frame-number = <0x6>; | |
| interrupts = <0x0 0xe 0x4>; | |
| reg = <0xb128000 0x1000>; | |
| status = "disabled"; | |
| }; | |
| }; | |
| qcom,rmtfs_sharedmem@00000000 { | |
| compatible = "qcom,sharedmem-uio"; | |
| reg = <0x0 0x180000>; | |
| reg-names = "rmtfs"; | |
| qcom,client-id = <0x1>; | |
| }; | |
| restart@4ab000 { | |
| compatible = "qcom,pshold"; | |
| reg = <0x4ab000 0x4 0x193d100 0x4>; | |
| reg-names = "pshold-base", "tcsr-boot-misc-detect"; | |
| }; | |
| qcom,mpm2-sleep-counter@4a3000 { | |
| compatible = "qcom,mpm2-sleep-counter"; | |
| reg = <0x4a3000 0x1000>; | |
| clock-frequency = <0x8000>; | |
| }; | |
| cpu-pmu { | |
| compatible = "arm,armv8-pmuv3"; | |
| interrupts = <0x1 0x7 0xff00>; | |
| }; | |
| qcom,sps { | |
| compatible = "qcom,msm_sps_4k"; | |
| qcom,pipe-attr-ee; | |
| }; | |
| tsens@4a8000 { | |
| compatible = "qcom,msm8937-tsens"; | |
| reg = <0x4a8000 0x2000 0xa4000 0x1000>; | |
| reg-names = "tsens_physical", "tsens_eeprom_physical"; | |
| interrupts = <0x0 0xb8 0x0>; | |
| interrupt-names = "tsens-upper-lower"; | |
| qcom,sensors = <0xb>; | |
| qcom,slope = <0xc80 0xc80 0xc80 0xc80 0xc80 0xc80 0xc80 0xc80 0xc80 0xc80 0xc80>; | |
| qcom,sensor-id = <0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xa>; | |
| qcom,valid-status-check; | |
| qcom,temp1-offset = <0x1 0xfffffff7 0xfffffffa 0xfffffffc 0x0 0xfffffffd 0xfffffffe 0x0 0x2 0xfffffffe 0xfffffffd>; | |
| qcom,temp2-offset = <0x0 0xa 0xffffffff 0x5 0xfffffffe 0xfffffff7 0xfffffff3 0x1 0x1 0x0 0x2>; | |
| }; | |
| slim@c140000 { | |
| cell-index = <0x1>; | |
| compatible = "qcom,slim-ngd"; | |
| reg = <0xc140000 0x2c000 0xc104000 0x2a000>; | |
| reg-names = "slimbus_physical", "slimbus_bam_physical"; | |
| interrupts = <0x0 0xa3 0x0 0x0 0xb4 0x0>; | |
| interrupt-names = "slimbus_irq", "slimbus_bam_irq"; | |
| qcom,apps-ch-pipes = <0x600000>; | |
| qcom,ea-pc = <0x230>; | |
| status = "disabled"; | |
| msm_dai_slim { | |
| status = "disabled"; | |
| compatible = "qcom,msm-dai-slim"; | |
| elemental-addr = [ff ff ff fe 17 02]; | |
| }; | |
| tasha_codec { | |
| status = "disabled"; | |
| compatible = "qcom,tasha-slim-pgd"; | |
| elemental-addr = [00 01 a0 01 17 02]; | |
| interrupt-parent = <0xb2>; | |
| interrupts = <0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xa 0xb 0xc 0xd 0xe 0xf 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e>; | |
| qcom,wcd-rst-gpio-node = <0xb3>; | |
| clock-names = "wcd_clk"; | |
| clocks = <0xb4 0xb7ba2274>; | |
| qcom,cdc-static-supplies = "cdc-vdd-buck", "cdc-buck-sido", "cdc-vdd-tx-h", "cdc-vdd-rx-h", "cdc-vdd-px"; | |
| qcom,cdc-on-demand-supplies = "cdc-vdd-mic-bias"; | |
| qcom,cdc-micbias1-mv = <0x708>; | |
| qcom,cdc-micbias2-mv = <0x708>; | |
| qcom,cdc-micbias3-mv = <0x708>; | |
| qcom,cdc-micbias4-mv = <0x708>; | |
| qcom,cdc-mclk-clk-rate = <0x927c00>; | |
| qcom,cdc-slim-ifd = "tasha-slim-ifd"; | |
| qcom,cdc-slim-ifd-elemental-addr = [00 00 a0 01 17 02]; | |
| qcom,cdc-dmic-sample-rate = <0x249f00>; | |
| cdc-vdd-buck-supply = <0xb5>; | |
| qcom,cdc-vdd-buck-voltage = <0x1b7740 0x1b7740>; | |
| qcom,cdc-vdd-buck-current = <0x9eb10>; | |
| cdc-buck-sido-supply = <0xb5>; | |
| qcom,cdc-buck-sido-voltage = <0x1b7740 0x1b7740>; | |
| qcom,cdc-buck-sido-current = <0x3d090>; | |
| cdc-vdd-tx-h-supply = <0xb6>; | |
| qcom,cdc-vdd-tx-h-voltage = <0x1b7740 0x1b7740>; | |
| qcom,cdc-vdd-tx-h-current = <0x61a8>; | |
| cdc-vdd-rx-h-supply = <0xb6>; | |
| qcom,cdc-vdd-rx-h-voltage = <0x1b7740 0x1b7740>; | |
| qcom,cdc-vdd-rx-h-current = <0x61a8>; | |
| cdc-vdd-px-supply = <0xb6>; | |
| qcom,cdc-vdd-px-voltage = <0x1b7740 0x1b7740>; | |
| qcom,cdc-vdd-px-current = <0x2710>; | |
| cdc-vdd-mic-bias-supply = <0xb7>; | |
| qcom,cdc-vdd-mic-bias-voltage = <0x2eebb8 0x2eebb8>; | |
| qcom,cdc-vdd-mic-bias-current = <0x3a98>; | |
| swr_master { | |
| compatible = "qcom,swr-wcd"; | |
| #address-cells = <0x2>; | |
| #size-cells = <0x0>; | |
| wsa881x@20170211 { | |
| compatible = "qcom,wsa881x"; | |
| reg = <0x0 0x20170211>; | |
| qcom,spkr-sd-n-gpio = <0xa7 0x60 0x0>; | |
| linux,phandle = <0x177>; | |
| phandle = <0x177>; | |
| }; | |
| wsa881x@20170212 { | |
| compatible = "qcom,wsa881x"; | |
| reg = <0x0 0x20170212>; | |
| qcom,spkr-sd-n-gpio = <0xa7 0x60 0x0>; | |
| linux,phandle = <0x178>; | |
| phandle = <0x178>; | |
| }; | |
| wsa881x@21170213 { | |
| compatible = "qcom,wsa881x"; | |
| reg = <0x0 0x21170213>; | |
| qcom,spkr-sd-n-gpio = <0xa7 0x60 0x0>; | |
| linux,phandle = <0x179>; | |
| phandle = <0x179>; | |
| }; | |
| wsa881x@21170214 { | |
| compatible = "qcom,wsa881x"; | |
| reg = <0x0 0x21170214>; | |
| qcom,spkr-sd-n-gpio = <0xa7 0x60 0x0>; | |
| linux,phandle = <0x17a>; | |
| phandle = <0x17a>; | |
| }; | |
| }; | |
| }; | |
| }; | |
| qcom,sensor-information { | |
| compatible = "qcom,sensor-information"; | |
| qcom,sensor-information-0 { | |
| qcom,sensor-type = "tsens"; | |
| qcom,sensor-name = "tsens_tz_sensor0"; | |
| }; | |
| qcom,sensor-information-1 { | |
| qcom,sensor-type = "tsens"; | |
| qcom,sensor-name = "tsens_tz_sensor1"; | |
| }; | |
| qcom,sensor-information-2 { | |
| qcom,sensor-type = "tsens"; | |
| qcom,sensor-name = "tsens_tz_sensor2"; | |
| qcom,alias-name = "pop_mem"; | |
| }; | |
| qcom,sensor-information-3 { | |
| qcom,sensor-type = "tsens"; | |
| qcom,sensor-name = "tsens_tz_sensor3"; | |
| }; | |
| qcom,sensor-information-4 { | |
| qcom,sensor-type = "tsens"; | |
| qcom,sensor-name = "tsens_tz_sensor4"; | |
| qcom,alias-name = "L2_cache_1"; | |
| }; | |
| qcom,sensor-information-5 { | |
| qcom,sensor-type = "tsens"; | |
| qcom,sensor-name = "tsens_tz_sensor5"; | |
| linux,phandle = <0xb8>; | |
| phandle = <0xb8>; | |
| }; | |
| qcom,sensor-information-6 { | |
| qcom,sensor-type = "tsens"; | |
| qcom,sensor-name = "tsens_tz_sensor6"; | |
| linux,phandle = <0xb9>; | |
| phandle = <0xb9>; | |
| }; | |
| qcom,sensor-information-7 { | |
| qcom,sensor-type = "tsens"; | |
| qcom,sensor-name = "tsens_tz_sensor7"; | |
| linux,phandle = <0xba>; | |
| phandle = <0xba>; | |
| }; | |
| qcom,sensor-information-8 { | |
| qcom,sensor-type = "tsens"; | |
| qcom,sensor-name = "tsens_tz_sensor8"; | |
| linux,phandle = <0xbb>; | |
| phandle = <0xbb>; | |
| }; | |
| qcom,sensor-information-9 { | |
| qcom,sensor-type = "tsens"; | |
| qcom,sensor-name = "tsens_tz_sensor9"; | |
| linux,phandle = <0xbc>; | |
| phandle = <0xbc>; | |
| }; | |
| qcom,sensor-information-10 { | |
| qcom,sensor-type = "tsens"; | |
| qcom,sensor-name = "tsens_tz_sensor10"; | |
| qcom,alias-name = "gpu"; | |
| }; | |
| qcom,sensor-information-11 { | |
| qcom,sensor-type = "adc"; | |
| qcom,sensor-name = "pa_therm0"; | |
| }; | |
| qcom,sensor-information-12 { | |
| qcom,sensor-type = "adc"; | |
| qcom,sensor-name = "pa_therm1"; | |
| }; | |
| qcom,sensor-information-13 { | |
| qcom,sensor-type = "adc"; | |
| qcom,sensor-name = "xo_therm"; | |
| }; | |
| qcom,sensor-information-14 { | |
| qcom,sensor-type = "adc"; | |
| qcom,sensor-name = "xo_therm_buf"; | |
| }; | |
| qcom,sensor-information-15 { | |
| qcom,sensor-type = "adc"; | |
| qcom,sensor-name = "case_therm"; | |
| }; | |
| qcom,sensor-information-16 { | |
| qcom,sensor-type = "alarm"; | |
| qcom,sensor-name = "pm8937_tz"; | |
| qcom,scaling-factor = <0x3e8>; | |
| }; | |
| }; | |
| qcom,limit_info-0 { | |
| qcom,temperature-sensor = <0xb8>; | |
| qcom,boot-frequency-mitigate; | |
| qcom,hotplug-mitigation-enable; | |
| qcom,emergency-frequency-mitigate; | |
| linux,phandle = <0xb>; | |
| phandle = <0xb>; | |
| }; | |
| qcom,limit_info-1 { | |
| qcom,temperature-sensor = <0xb9>; | |
| qcom,boot-frequency-mitigate; | |
| qcom,hotplug-mitigation-enable; | |
| qcom,emergency-frequency-mitigate; | |
| linux,phandle = <0xf>; | |
| phandle = <0xf>; | |
| }; | |
| qcom,limit_info-2 { | |
| qcom,temperature-sensor = <0xba>; | |
| qcom,boot-frequency-mitigate; | |
| qcom,hotplug-mitigation-enable; | |
| qcom,emergency-frequency-mitigate; | |
| linux,phandle = <0x11>; | |
| phandle = <0x11>; | |
| }; | |
| qcom,limit_info-3 { | |
| qcom,temperature-sensor = <0xbb>; | |
| qcom,boot-frequency-mitigate; | |
| qcom,hotplug-mitigation-enable; | |
| qcom,emergency-frequency-mitigate; | |
| linux,phandle = <0x13>; | |
| phandle = <0x13>; | |
| }; | |
| qcom,limit_info-4 { | |
| qcom,temperature-sensor = <0xbc>; | |
| qcom,boot-frequency-mitigate; | |
| qcom,hotplug-mitigation-enable; | |
| qcom,emergency-frequency-mitigate; | |
| linux,phandle = <0x15>; | |
| phandle = <0x15>; | |
| }; | |
| qcom,msm-thermal { | |
| compatible = "qcom,msm-thermal"; | |
| qcom,sensor-id = <0x5>; | |
| qcom,poll-ms = <0xfa>; | |
| qcom,limit-temp = <0x3c>; | |
| qcom,temp-hysteresis = <0xa>; | |
| qcom,freq-step = <0x2>; | |
| qcom,core-limit-temp = <0x50>; | |
| qcom,core-temp-hysteresis = <0xa>; | |
| qcom,hotplug-temp = <0x69>; | |
| qcom,hotplug-temp-hysteresis = <0xf>; | |
| qcom,freq-mitigation-temp = <0x69>; | |
| qcom,freq-mitigation-temp-hysteresis = <0xf>; | |
| qcom,freq-mitigation-value = <0x61a80>; | |
| qcom,online-hotplug-core; | |
| qcom,synchronous-cluster-id = <0x0 0x1>; | |
| qcom,synchronous-cluster-map = <0x1 0x4 0x6 0x7 0x8 0x9 0x0 0x4 0x2 0x3 0x4 0x5>; | |
| qcom,disable-cx-phase-ctrl; | |
| qcom,disable-gfx-phase-ctrl; | |
| qcom,disable-vdd-mx; | |
| qcom,disable-psm; | |
| qcom,disable-ocr; | |
| qcom,vdd-restriction-temp = <0x5>; | |
| qcom,vdd-restriction-temp-hysteresis = <0xa>; | |
| vdd-dig-supply = <0xbd>; | |
| qcom,vdd-dig-rstr { | |
| qcom,vdd-rstr-reg = "vdd-dig"; | |
| qcom,levels = <0x140 0x180 0x180>; | |
| qcom,min-level = <0x10>; | |
| }; | |
| qcom,vdd-apps-rstr { | |
| qcom,vdd-rstr-reg = "vdd-apps"; | |
| qcom,levels = <0xdbba0>; | |
| qcom,freq-req; | |
| linux,phandle = <0xbe>; | |
| phandle = <0xbe>; | |
| }; | |
| }; | |
| qcom,bcl { | |
| compatible = "qcom,bcl"; | |
| qcom,bcl-enable; | |
| qcom,bcl-framework-interface; | |
| qcom,bcl-freq-control-list = <0x6 0x7 0x8 0x9 0x2 0x3 0x4 0x5>; | |
| qcom,bcl-hotplug-list = <0x8 0x9>; | |
| qcom,bcl-soc-hotplug-list = <0x6 0x7 0x8 0x9>; | |
| qcom,ibat-monitor { | |
| qcom,low-threshold-uamp = <0x33e140>; | |
| qcom,high-threshold-uamp = <0x401640>; | |
| qcom,mitigation-freq-khz = <0xf3c00>; | |
| qcom,vph-high-threshold-uv = <0x3567e0>; | |
| qcom,vph-low-threshold-uv = <0x30d400>; | |
| qcom,soc-low-threshold = <0xa>; | |
| qcom,thermal-handle = <0xbe>; | |
| }; | |
| }; | |
| serial@78b0000 { | |
| compatible = "qcom,msm-lsuart-v14"; | |
| reg = <0x78b0000 0x200>; | |
| interrupts = <0x0 0x6c 0x0>; | |
| status = "ok"; | |
| clocks = <0x2b 0xf8a61c96 0x2b 0x8caa5b4f>; | |
| clock-names = "core_clk", "iface_clk"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0xbf>; | |
| }; | |
| qcom,sps-dma@7884000 { | |
| #dma-cells = <0x4>; | |
| compatible = "qcom,sps-dma"; | |
| reg = <0x7884000 0x1f000>; | |
| interrupts = <0x0 0xee 0x0>; | |
| qcom,summing-threshold = <0xa>; | |
| linux,phandle = <0xc2>; | |
| phandle = <0xc2>; | |
| }; | |
| qcom,sps-dma@7ac4000 { | |
| #dma-cells = <0x4>; | |
| compatible = "qcom,sps-dma"; | |
| reg = <0x7ac4000 0x1f000>; | |
| interrupts = <0x0 0xef 0x0>; | |
| qcom,summing-threshold = <0xa>; | |
| linux,phandle = <0xd7>; | |
| phandle = <0xd7>; | |
| }; | |
| i2c@78b6000 { | |
| compatible = "qcom,i2c-msm-v2"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| reg-names = "qup_phys_addr"; | |
| reg = <0x78b6000 0x600>; | |
| interrupt-names = "qup_irq"; | |
| interrupts = <0x0 0x60 0x0>; | |
| qcom,clk-freq-out = <0x61a80>; | |
| qcom,clk-freq-in = <0x124f800>; | |
| clock-names = "iface_clk", "core_clk"; | |
| clocks = <0x2b 0x8caa5b4f 0x2b 0x1076f220>; | |
| pinctrl-names = "i2c_active", "i2c_sleep"; | |
| pinctrl-0 = <0xc0>; | |
| pinctrl-1 = <0xc1>; | |
| qcom,noise-rjct-scl = <0x0>; | |
| qcom,noise-rjct-sda = <0x0>; | |
| qcom,master-id = <0x56>; | |
| dmas = <0xc2 0x6 0x40 0x20000020 0x20 0xc2 0x7 0x20 0x20000020 0x20>; | |
| dma-names = "tx", "rx"; | |
| pericom-type-c@1d { | |
| compatible = "pericom,usb-type-c"; | |
| reg = <0x1d>; | |
| vdd_io-supply = <0xb6>; | |
| interrupt-parent = <0xa7>; | |
| interrupts = <0x61 0x2>; | |
| pericom,enb-gpio = <0xa7 0x83 0x1>; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0xc3>; | |
| status = "disabled"; | |
| }; | |
| adv7533@39 { | |
| compatible = "adv7533"; | |
| reg = <0x39>; | |
| instance_id = <0x0>; | |
| adi,video-mode = <0x3>; | |
| adi,main-addr = <0x39>; | |
| adi,cec-dsi-addr = <0x3c>; | |
| adi,enable-audio; | |
| pinctrl-names = "pmx_adv7533_active", "pmx_adv7533_suspend"; | |
| pinctrl-0 = <0xc4>; | |
| pinctrl-1 = <0xc5>; | |
| adi,irq-gpio = <0xa7 0x7e 0x2002>; | |
| hpd-5v-en-supply = <0xc6>; | |
| qcom,supply-names = "hpd-5v-en"; | |
| qcom,min-voltage-level = <0x0>; | |
| qcom,max-voltage-level = <0x0>; | |
| qcom,enable-load = <0x0>; | |
| qcom,disable-load = <0x0>; | |
| }; | |
| wsa881x-i2c-codec@e { | |
| status = "disabled"; | |
| compatible = "qcom,wsa881x-i2c-codec"; | |
| reg = <0xe>; | |
| qcom,msm-gpios = "wsa_clk", "wsa_reset", "wsa_vi"; | |
| qcom,pinctrl-names = "all_off", "wsa_clk", "wsa_active", "wsa_clk_active", "wsa_vi", "wsa_clk_vi", "wsa_active_vi", "wsa_all"; | |
| pinctrl-names = "all_off", "wsa_clk", "wsa_active", "wsa_clk_active", "wsa_vi", "wsa_clk_vi", "wsa_active_vi", "wsa_all"; | |
| pinctrl-0 = <0xc7 0xc8 0xc9>; | |
| pinctrl-1 = <0xca 0xc8 0xc9>; | |
| pinctrl-2 = <0xc7 0xcb 0xc9>; | |
| pinctrl-3 = <0xca 0xcb 0xc9>; | |
| pinctrl-4 = <0xc7 0xc8 0xcc>; | |
| pinctrl-5 = <0xca 0xc8 0xcc>; | |
| pinctrl-6 = <0xc7 0xcb 0xcc>; | |
| pinctrl-7 = <0xca 0xcb 0xcc>; | |
| }; | |
| wsa881x-i2c-codec@44 { | |
| status = "disabled"; | |
| compatible = "qcom,wsa881x-i2c-codec"; | |
| reg = <0x44>; | |
| }; | |
| wsa881x-i2c-codec@f { | |
| status = "disabled"; | |
| compatible = "qcom,wsa881x-i2c-codec"; | |
| reg = <0xf>; | |
| qcom,msm-gpios = "wsa_clk", "wsa_reset", "wsa_vi"; | |
| qcom,pinctrl-names = "all_off", "wsa_clk", "wsa_active", "wsa_clk_active", "wsa_vi", "wsa_clk_vi", "wsa_active_vi", "wsa_all"; | |
| pinctrl-names = "all_off", "wsa_clk", "wsa_active", "wsa_clk_active", "wsa_vi", "wsa_clk_vi", "wsa_active_vi", "wsa_all"; | |
| pinctrl-0 = <0xc7 0xc8 0xc9>; | |
| pinctrl-1 = <0xca 0xc8 0xc9>; | |
| pinctrl-2 = <0xc7 0xcb 0xc9>; | |
| pinctrl-3 = <0xca 0xcb 0xc9>; | |
| pinctrl-4 = <0xc7 0xc8 0xcc>; | |
| pinctrl-5 = <0xca 0xc8 0xcc>; | |
| pinctrl-6 = <0xc7 0xcb 0xcc>; | |
| pinctrl-7 = <0xca 0xcb 0xcc>; | |
| }; | |
| wsa881x-i2c-codec@45 { | |
| status = "disabled"; | |
| compatible = "qcom,wsa881x-i2c-codec"; | |
| reg = <0x45>; | |
| }; | |
| aw2013@45 { | |
| compatible = "awinic,aw2013"; | |
| reg = <0x45>; | |
| rgb_led-supply = <0xcd>; | |
| red { | |
| label = "red"; | |
| linux,default-trigger = "battery-red"; | |
| default-state = "off"; | |
| retain-state-suspended; | |
| }; | |
| green { | |
| label = "green"; | |
| linux,default-trigger = "battery-green"; | |
| default-state = "off"; | |
| retain-state-suspended; | |
| }; | |
| blue { | |
| label = "blue"; | |
| linux,default-trigger = "battery-blue"; | |
| default-state = "off"; | |
| retain-state-suspended; | |
| }; | |
| white { | |
| label = "white"; | |
| linux,default-trigger = "none"; | |
| default-state = "off"; | |
| retain-state-suspended; | |
| }; | |
| yellow { | |
| label = "yellow"; | |
| linux,default-trigger = "none"; | |
| default-state = "off"; | |
| retain-state-suspended; | |
| }; | |
| cyan { | |
| label = "cyan"; | |
| linux,default-trigger = "none"; | |
| default-state = "off"; | |
| retain-state-suspended; | |
| }; | |
| purple { | |
| label = "purple"; | |
| linux,default-trigger = "none"; | |
| default-state = "off"; | |
| retain-state-suspended; | |
| }; | |
| }; | |
| }; | |
| i2c@78b7000 { | |
| compatible = "qcom,i2c-msm-v2"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| reg-names = "qup_phys_addr"; | |
| reg = <0x78b7000 0x600>; | |
| interrupt-names = "qup_irq"; | |
| interrupts = <0x0 0x61 0x0>; | |
| qcom,clk-freq-out = <0x186a0>; | |
| qcom,clk-freq-in = <0x124f800>; | |
| clock-names = "iface_clk", "core_clk"; | |
| clocks = <0x2b 0x8caa5b4f 0x2b 0x9e25ac82>; | |
| pinctrl-names = "i2c_active", "i2c_sleep"; | |
| pinctrl-0 = <0xce>; | |
| pinctrl-1 = <0xcf>; | |
| qcom,noise-rjct-scl = <0x0>; | |
| qcom,noise-rjct-sda = <0x0>; | |
| qcom,master-id = <0x56>; | |
| dmas = <0xc2 0x8 0x40 0x20000020 0x20 0xc2 0x9 0x20 0x20000020 0x20>; | |
| dma-names = "tx", "rx"; | |
| status = "okay"; | |
| ftech@3E { | |
| compatible = "focaltech,5336"; | |
| reg = <0x3e>; | |
| interrupt-parent = <0xa7>; | |
| interrupts = <0x41 0x2008>; | |
| vdd-supply = <0xcd>; | |
| vcc_i2c-supply = <0xb6>; | |
| pinctrl-names = "pmx_ts_active", "pmx_ts_suspend", "pmx_ts_release"; | |
| pinctrl-0 = <0xd0 0xd1>; | |
| pinctrl-1 = <0xd2 0xd3>; | |
| pinctrl-2 = <0xd4>; | |
| ftech,name = "ft5336"; | |
| ftech,family-id = <0x36>; | |
| ftech,reset-gpio = <0xa7 0x40 0x0>; | |
| ftech,irq-gpio = <0xa7 0x41 0x2008>; | |
| ftech,display-coords = <0x0 0x0 0x2d0 0x500>; | |
| ftech,panel-coords = <0x0 0x0 0x2d0 0x500>; | |
| ftech,button-map = <0x8b 0xac 0x9e>; | |
| ftech,button-y-coord = <0x7f8>; | |
| ftech,button-x-coords = <0x78 0x1f4 0x384>; | |
| ftech,no-force-update; | |
| ftech,i2c-pull-up; | |
| ftech,group-id = <0x1>; | |
| ftech,hard-reset-delay-ms = <0x14>; | |
| ftech,soft-reset-delay-ms = <0xc8>; | |
| ftech,num-max-touches = <0xa>; | |
| ftech,fw-delay-aa-ms = <0x1e>; | |
| ftech,fw-delay-55-ms = <0x1e>; | |
| ftech,fw-upgrade-id1 = <0x79>; | |
| ftech,fw-upgrade-id2 = <0x18>; | |
| ftech,fw-delay-readid-ms = <0xa>; | |
| ftech,fw-delay-era-flsh-ms = <0x7d0>; | |
| ftech,fw-auto-cal; | |
| ftech,ignore-id-check; | |
| }; | |
| ist30xx@50 { | |
| compatible = "imagis,ist30xx-ts"; | |
| reg = <0x50>; | |
| interrupt-parent = <0xa7>; | |
| interrupts = <0x41 0x2008>; | |
| vdd-supply = <0xcd>; | |
| vcc_i2c-supply = <0xb6>; | |
| pinctrl-names = "pmx_ts_active", "pmx_ts_suspend", "pmx_ts_release"; | |
| pinctrl-0 = <0xd0 0xd1>; | |
| pinctrl-1 = <0xd2 0xd3>; | |
| pinctrl-2 = <0xd4>; | |
| ist30xx,name = "ist30xx"; | |
| ist30xx,family-id = <0x36>; | |
| ist30xx,reset-gpio = <0xa7 0x40 0x0>; | |
| ist30xx,irq-gpio = <0xa7 0x41 0x2008>; | |
| }; | |
| }; | |
| i2c@7af5000 { | |
| compatible = "qcom,i2c-msm-v2"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| reg-names = "qup_phys_addr"; | |
| reg = <0x7af5000 0x600>; | |
| interrupt-names = "qup_irq"; | |
| interrupts = <0x0 0x12b 0x0>; | |
| qcom,clk-freq-out = <0x61a80>; | |
| qcom,clk-freq-in = <0x124f800>; | |
| clock-names = "iface_clk", "core_clk"; | |
| clocks = <0x2b 0x8f283c1d 0x2b 0x9ace11dd>; | |
| pinctrl-names = "i2c_active", "i2c_sleep"; | |
| pinctrl-0 = <0xd5>; | |
| pinctrl-1 = <0xd6>; | |
| qcom,noise-rjct-scl = <0x0>; | |
| qcom,noise-rjct-sda = <0x0>; | |
| qcom,master-id = <0x54>; | |
| dmas = <0xd7 0x4 0x40 0x20000020 0x20 0xd7 0x5 0x20 0x20000020 0x20>; | |
| dma-names = "tx", "rx"; | |
| nq@28 { | |
| compatible = "qcom,nq-nci"; | |
| reg = <0x28>; | |
| qcom,nq-irq = <0xa7 0x11 0x0>; | |
| qcom,nq-ven = <0xa7 0x10 0x0>; | |
| qcom,nq-firm = <0xa7 0x82 0x0>; | |
| qcom,nq-clkreq = <0xd8 0x5 0x0>; | |
| interrupt-parent = <0xa7>; | |
| qcom,clk-src = "BBCLK2"; | |
| interrupts = <0x11 0x0>; | |
| interrupt-names = "nfc_irq"; | |
| pinctrl-names = "nfc_active", "nfc_suspend"; | |
| pinctrl-0 = <0xd9 0xda>; | |
| pinctrl-1 = <0xdb 0xdc>; | |
| clocks = <0x2b 0x498938e5>; | |
| clock-names = "ref_clk"; | |
| }; | |
| }; | |
| spi@78b7000 { | |
| compatible = "qcom,spi-qup-v2"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| reg-names = "spi_physical", "spi_bam_physical"; | |
| reg = <0x78b7000 0x600 0x7884000 0x1f000>; | |
| interrupt-names = "spi_irq", "spi_bam_irq"; | |
| interrupts = <0x0 0x61 0x0 0x0 0xee 0x0>; | |
| spi-max-frequency = <0x124f800>; | |
| pinctrl-names = "spi_default", "spi_sleep"; | |
| pinctrl-0 = <0xdd 0xde>; | |
| pinctrl-1 = <0xdf 0xe0>; | |
| clocks = <0x2b 0x8caa5b4f 0x2b 0xfb978880>; | |
| clock-names = "iface_clk", "core_clk"; | |
| qcom,infinite-mode = <0x0>; | |
| qcom,use-bam; | |
| qcom,use-pinctrl; | |
| qcom,ver-reg-exists; | |
| qcom,bam-consumer-pipe-index = <0x8>; | |
| qcom,bam-producer-pipe-index = <0x9>; | |
| qcom,master-id = <0x56>; | |
| status = "disabled"; | |
| }; | |
| qcom,gcc@1800000 { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| compatible = "qcom,gcc-8937"; | |
| reg = <0x1800000 0x80000 0xb016000 0x40 0xb116000 0x40 0xa6018 0x4>; | |
| reg-names = "cc_base", "apcs_c1_base", "apcs_c0_base", "efuse"; | |
| vdd_dig-supply = <0xe1>; | |
| vdd_sr2_dig-supply = <0xe2>; | |
| vdd_sr2_pll-supply = <0xe3>; | |
| vdd_hf_dig-supply = <0xe2>; | |
| vdd_hf_pll-supply = <0xe3>; | |
| #clock-cells = <0x1>; | |
| ranges; | |
| linux,phandle = <0x2b>; | |
| phandle = <0x2b>; | |
| qcom,spm@0 { | |
| compatible = "qcom,gcc-spm-8937"; | |
| reg = <0xb111200 0x100 0xb011200 0x100>; | |
| reg-names = "spm_c0_base", "spm_c1_base"; | |
| }; | |
| }; | |
| qcom,cc-debug@1874000 { | |
| compatible = "qcom,cc-debug-8937"; | |
| reg = <0x1874000 0x4 0xb11101c 0x8>; | |
| reg-names = "cc_base", "meas"; | |
| #clock-cells = <0x1>; | |
| linux,phandle = <0xf4>; | |
| phandle = <0xf4>; | |
| }; | |
| qcom,gcc-mdss@1800000 { | |
| compatible = "qcom,gcc-mdss-8937"; | |
| clocks = <0xe4 0x5767c287 0xe4 0x44539836 0xe5 0xce233fcf 0xe5 0x73e88d02>; | |
| clock-names = "pixel_src", "byte_src", "pclk1_src", "byte1_src"; | |
| #clock-cells = <0x1>; | |
| linux,phandle = <0x17e>; | |
| phandle = <0x17e>; | |
| }; | |
| qcom,cpu-clock-8939@b111050 { | |
| compatible = "qcom,cpu-clock-8939"; | |
| reg = <0xb011050 0x8 0xb111050 0x8 0xb1d1050 0x8 0xa412c 0x8>; | |
| reg-names = "apcs-c1-rcg-base", "apcs-c0-rcg-base", "apcs-cci-rcg-base", "efuse"; | |
| vdd-c0-supply = <0xe6>; | |
| vdd-c1-supply = <0xe6>; | |
| vdd-cci-supply = <0xe6>; | |
| clocks = <0x2b 0x6b2fb034 0x2b 0xf761da94 0x2b 0x6b2fb034 0x2b 0xfbc57bbd 0x2b 0x6b2fb034 0x2b 0x6b2fb034>; | |
| clock-names = "clk-c0-4", "clk-c0-5", "clk-c1-4", "clk-c1-5", "clk-cci-4", "clk-cci-2"; | |
| qcom,speed0-bin-v0-c0 = <0x0 0x0 0x2dc6c000 0x1 0x35c98800 0x2 0x3b826000 0x4 0x413b3800 0x6>; | |
| qcom,speed0-bin-v0-c1 = <0x0 0x0 0x39387000 0x1 0x413b3800 0x2 0x4a62f800 0x4 0x501bd000 0x5 0x53819040 0x6>; | |
| qcom,speed0-bin-v0-cci = <0x0 0x0 0x17d78400 0x1 0x1fca0555 0x3>; | |
| qcom,speed1-bin-v0-c0 = <0x0 0x0 0x2dc6c000 0x1 0x35c98800 0x2 0x3b826000 0x4 0x413b3800 0x6 0x48190800 0x7>; | |
| qcom,speed1-bin-v0-c1 = <0x0 0x0 0x39387000 0x1 0x413b3800 0x2 0x4a62f800 0x4 0x501bd000 0x5 0x53819040 0x6 0x59439000 0x7>; | |
| qcom,speed1-bin-v0-cci = <0x0 0x0 0x17d78400 0x1 0x1fca0555 0x3>; | |
| qcom,speed2-bin-v0-c0 = <0x0 0x0 0x2dc6c000 0x1 0x35c98800 0x2 0x3b826000 0x3>; | |
| qcom,speed2-bin-v0-c1 = <0x0 0x0 0x39387000 0x1 0x413b3800 0x2 0x48190800 0x3>; | |
| qcom,speed2-bin-v0-cci = <0x0 0x0 0x17d78400 0x1 0x1fca0555 0x3>; | |
| #clock-cells = <0x1>; | |
| linux,phandle = <0x9e>; | |
| phandle = <0x9e>; | |
| }; | |
| qcom,msm-cpufreq { | |
| compatible = "qcom,msm-cpufreq"; | |
| clock-names = "l2_clk", "cpu0_clk", "cpu1_clk", "cpu2_clk", "cpu3_clk", "cpu4_clk", "cpu5_clk", "cpu6_clk", "cpu7_clk"; | |
| clocks = <0x9e 0x96854074 0x9e 0xcf28e63a 0x9e 0xcf28e63a 0x9e 0xcf28e63a 0x9e 0xcf28e63a 0x9e 0xc69f0878 0x9e 0xc69f0878 0x9e 0xc69f0878 0x9e 0xc69f0878>; | |
| qcom,governor-per-policy; | |
| qcom,cpufreq-table-0 = <0xea600 0x10b300 0x127500 0x130b00 0x148200 0x1560a8 0x16da00>; | |
| qcom,cpufreq-table-4 = <0xbb800 0xdc500 0xf3c00 0x10b300 0x127500>; | |
| }; | |
| qcom,cci { | |
| compatible = "devfreq-simple-dev"; | |
| clock-names = "devfreq_clk"; | |
| clocks = <0x9e 0x96854074>; | |
| governor = "cpufreq"; | |
| freq-tbl-khz = <0x61a80 0x82355>; | |
| linux,phandle = <0xe8>; | |
| phandle = <0xe8>; | |
| }; | |
| qcom,cpubw { | |
| compatible = "qcom,devbw"; | |
| governor = "cpufreq"; | |
| qcom,src-dst-ports = <0x1 0x200>; | |
| qcom,active-only; | |
| qcom,bw-tbl = <0x301 0x64b 0x84c 0xb71 0x1005 0x1098 0x13bd 0x1650 0x1808 0x1b77>; | |
| linux,phandle = <0xe7>; | |
| phandle = <0xe7>; | |
| }; | |
| qcom,cpu-bwmon { | |
| compatible = "qcom,bimc-bwmon2"; | |
| reg = <0x408000 0x300 0x401000 0x200>; | |
| reg-names = "base", "global_base"; | |
| interrupts = <0x0 0xb7 0x4>; | |
| qcom,mport = <0x0>; | |
| qcom,target-dev = <0xe7>; | |
| }; | |
| qcom,mincpubw { | |
| compatible = "qcom,devbw"; | |
| governor = "cpufreq"; | |
| qcom,src-dst-ports = <0x1 0x200>; | |
| qcom,active-only; | |
| qcom,bw-tbl = <0x301 0x64b 0x84c 0xb71 0x1005 0x1098 0x13bd 0x1650 0x1808 0x1b77>; | |
| linux,phandle = <0xe9>; | |
| phandle = <0xe9>; | |
| }; | |
| devfreq-cpufreq { | |
| cpubw-cpufreq { | |
| target-dev = <0xe7>; | |
| cpu-to-dev-map-0 = <0xf3c00 0xb71 0x10b300 0x13bd 0x130b00 0x1650 0x148200 0x1b77 0x16da00 0x1b77>; | |
| cpu-to-dev-map-4 = <0xc4e00 0xb71 0xdc500 0x13bd 0xf3c00 0x1808 0x127500 0x1b77>; | |
| }; | |
| cci-cpufreq { | |
| target-dev = <0xe8>; | |
| cpu-to-dev-map-0 = <0xf3c00 0x61a80 0x10b300 0x61a80 0x130b00 0x82355 0x148200 0x82355 0x16da00 0x82355>; | |
| cpu-to-dev-map-4 = <0xc4e00 0x61a80 0xdc500 0x61a80 0xf3c00 0x82355 0x127500 0x82355>; | |
| }; | |
| mincpubw-cpufreq { | |
| target-dev = <0xe9>; | |
| cpu-to-dev-map-0 = <0x10b300 0xb71 0x16da00 0x1098>; | |
| cpu-to-dev-map-4 = <0xf3c00 0xb71 0x127500 0x1098>; | |
| }; | |
| }; | |
| uart@7aef000 { | |
| compatible = "qcom,msm-hsuart-v14"; | |
| reg = <0x7aef000 0x200 0x7ac4000 0x1f000>; | |
| reg-names = "core_mem", "bam_mem"; | |
| interrupt-names = "core_irq", "bam_irq", "wakeup_irq"; | |
| #address-cells = <0x0>; | |
| interrupt-parent = <0xea>; | |
| interrupts = <0x0 0x1 0x2>; | |
| #interrupt-cells = <0x1>; | |
| interrupt-map-mask = <0xffffffff>; | |
| interrupt-map = <0x0 0x1 0x0 0x132 0x0 0x1 0x1 0x0 0xef 0x0 0x2 0xa7 0x11 0x0>; | |
| qcom,inject-rx-on-wakeup; | |
| qcom,rx-char-to-inject = <0xfd>; | |
| qcom,bam-tx-ep-pipe-index = <0x0>; | |
| qcom,bam-rx-ep-pipe-index = <0x1>; | |
| qcom,master-id = <0x54>; | |
| clock-names = "core_clk", "iface_clk"; | |
| clocks = <0x2b 0x8c3512ff 0x2b 0x8f283c1d>; | |
| pinctrl-names = "sleep", "default"; | |
| pinctrl-0 = <0xeb>; | |
| pinctrl-1 = <0xec>; | |
| qcom,msm-bus,name = "blsp2_uart1"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0x54 0x200 0x0 0x0 0x54 0x200 0x1f4 0x320>; | |
| status = "disabled"; | |
| linux,phandle = <0xea>; | |
| phandle = <0xea>; | |
| }; | |
| dcc@b3000 { | |
| compatible = "qcom,dcc"; | |
| reg = <0xb3000 0x1000 0xb4000 0x2000>; | |
| reg-names = "dcc-base", "dcc-ram-base"; | |
| clocks = <0x2b 0xd1000c50>; | |
| clock-names = "dcc_clk"; | |
| qcom,save-reg; | |
| }; | |
| qcom,ipc-spinlock@1905000 { | |
| compatible = "qcom,ipc-spinlock-sfpb"; | |
| reg = <0x1905000 0x8000>; | |
| qcom,num-locks = <0x8>; | |
| }; | |
| qcom,smem@86300000 { | |
| compatible = "qcom,smem"; | |
| reg = <0x86300000 0x100000 0xb011008 0x4 0x60000 0x8000 0x193d000 0x8>; | |
| reg-names = "smem", "irq-reg-base", "aux-mem1", "smem_targ_info_reg"; | |
| qcom,mpu-enabled; | |
| qcom,smd-modem { | |
| compatible = "qcom,smd"; | |
| qcom,smd-edge = <0x0>; | |
| qcom,smd-irq-offset = <0x0>; | |
| qcom,smd-irq-bitmask = <0x1000>; | |
| interrupts = <0x0 0x19 0x1>; | |
| label = "modem"; | |
| qcom,not-loadable; | |
| }; | |
| qcom,smsm-modem { | |
| compatible = "qcom,smsm"; | |
| qcom,smsm-edge = <0x0>; | |
| qcom,smsm-irq-offset = <0x0>; | |
| qcom,smsm-irq-bitmask = <0x2000>; | |
| interrupts = <0x0 0x1a 0x1>; | |
| }; | |
| qcom,smd-wcnss { | |
| compatible = "qcom,smd"; | |
| qcom,smd-edge = <0x6>; | |
| qcom,smd-irq-offset = <0x0>; | |
| qcom,smd-irq-bitmask = <0x20000>; | |
| interrupts = <0x0 0x8e 0x1>; | |
| label = "wcnss"; | |
| }; | |
| qcom,smsm-wcnss { | |
| compatible = "qcom,smsm"; | |
| qcom,smsm-edge = <0x6>; | |
| qcom,smsm-irq-offset = <0x0>; | |
| qcom,smsm-irq-bitmask = <0x80000>; | |
| interrupts = <0x0 0x90 0x1>; | |
| }; | |
| qcom,smd-adsp { | |
| compatible = "qcom,smd"; | |
| qcom,smd-edge = <0x1>; | |
| qcom,smd-irq-offset = <0x0>; | |
| qcom,smd-irq-bitmask = <0x100>; | |
| interrupts = <0x0 0x121 0x1>; | |
| label = "adsp"; | |
| }; | |
| qcom,smsm-adsp { | |
| compatible = "qcom,smsm"; | |
| qcom,smsm-edge = <0x1>; | |
| qcom,smsm-irq-offset = <0x0>; | |
| qcom,smsm-irq-bitmask = <0x200>; | |
| interrupts = <0x0 0x122 0x1>; | |
| }; | |
| qcom,smd-rpm { | |
| compatible = "qcom,smd"; | |
| qcom,smd-edge = <0xf>; | |
| qcom,smd-irq-offset = <0x0>; | |
| qcom,smd-irq-bitmask = <0x1>; | |
| interrupts = <0x0 0xa8 0x1>; | |
| label = "rpm"; | |
| qcom,irq-no-suspend; | |
| qcom,not-loadable; | |
| }; | |
| }; | |
| qcom,rpm-smd { | |
| compatible = "qcom,rpm-smd"; | |
| rpm-channel-name = "rpm_requests"; | |
| rpm-channel-type = <0xf>; | |
| rpm-regulator-smpa1 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "smpa"; | |
| qcom,resource-id = <0x1>; | |
| qcom,regulator-type = <0x1>; | |
| qcom,hpm-min-load = <0x186a0>; | |
| status = "okay"; | |
| regulator-s1 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_s1"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0xf4240>; | |
| regulator-max-microvolt = <0x12b128>; | |
| qcom,init-voltage = <0xf4240>; | |
| linux,phandle = <0x114>; | |
| phandle = <0x114>; | |
| }; | |
| }; | |
| rpm-regulator-smpa2 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "smpa"; | |
| qcom,resource-id = <0x2>; | |
| qcom,regulator-type = <0x1>; | |
| qcom,hpm-min-load = <0x186a0>; | |
| status = "okay"; | |
| regulator-s2 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_s2"; | |
| qcom,set = <0x3>; | |
| status = "disabled"; | |
| }; | |
| regulator-s2-level { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_s2_level"; | |
| qcom,set = <0x3>; | |
| regulator-min-microvolt = <0x10>; | |
| regulator-max-microvolt = <0x180>; | |
| qcom,use-voltage-level; | |
| linux,phandle = <0xe1>; | |
| phandle = <0xe1>; | |
| }; | |
| regulator-s2-floor-level { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_s2_floor_level"; | |
| qcom,set = <0x3>; | |
| regulator-min-microvolt = <0x10>; | |
| regulator-max-microvolt = <0x180>; | |
| qcom,use-voltage-floor-level; | |
| qcom,always-send-voltage; | |
| linux,phandle = <0xbd>; | |
| phandle = <0xbd>; | |
| }; | |
| regulator-s2-level-ao { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_s2_level_ao"; | |
| qcom,set = <0x1>; | |
| regulator-min-microvolt = <0x10>; | |
| regulator-max-microvolt = <0x180>; | |
| qcom,use-voltage-level; | |
| linux,phandle = <0xe2>; | |
| phandle = <0xe2>; | |
| }; | |
| }; | |
| rpm-regulator-smpa3 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "smpa"; | |
| qcom,resource-id = <0x3>; | |
| qcom,regulator-type = <0x1>; | |
| qcom,hpm-min-load = <0x186a0>; | |
| status = "okay"; | |
| regulator-s3 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_s3"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x13d620>; | |
| regulator-max-microvolt = <0x13d620>; | |
| qcom,init-voltage = <0x13d620>; | |
| }; | |
| }; | |
| rpm-regulator-smpa4 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "smpa"; | |
| qcom,resource-id = <0x4>; | |
| qcom,regulator-type = <0x1>; | |
| qcom,hpm-min-load = <0x186a0>; | |
| status = "okay"; | |
| regulator-s4 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_s4"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x1f47d0>; | |
| regulator-max-microvolt = <0x1f47d0>; | |
| qcom,init-voltage = <0x1f47d0>; | |
| linux,phandle = <0x10e>; | |
| phandle = <0x10e>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa2 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x2>; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l2 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_l2"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x124f80>; | |
| regulator-max-microvolt = <0x124f80>; | |
| qcom,init-voltage = <0x124f80>; | |
| linux,phandle = <0xf6>; | |
| phandle = <0xf6>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa3 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x3>; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l3 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_l3"; | |
| qcom,set = <0x3>; | |
| status = "disabled"; | |
| }; | |
| regulator-l3-level-ao { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_l3_level_ao"; | |
| qcom,set = <0x1>; | |
| regulator-min-microvolt = <0x10>; | |
| regulator-max-microvolt = <0x180>; | |
| qcom,use-voltage-level; | |
| qcom,always-send-voltage; | |
| linux,phandle = <0xed>; | |
| phandle = <0xed>; | |
| }; | |
| regulator-l3-level-so { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_l3_level_so"; | |
| qcom,set = <0x2>; | |
| regulator-min-microvolt = <0x10>; | |
| regulator-max-microvolt = <0x180>; | |
| qcom,init-voltage-level = <0x10>; | |
| qcom,use-voltage-level; | |
| }; | |
| }; | |
| rpm-regulator-ldoa5 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x5>; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l5 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_l5"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-max-microvolt = <0x1b7740>; | |
| qcom,init-voltage = <0x1b7740>; | |
| linux,phandle = <0xb6>; | |
| phandle = <0xb6>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa6 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x6>; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l6 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_l6"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-max-microvolt = <0x1b7740>; | |
| qcom,init-voltage = <0x1b7740>; | |
| regulator-always-on; | |
| linux,phandle = <0x12d>; | |
| phandle = <0x12d>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa7 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x7>; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l7 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_l7"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-max-microvolt = <0x1b7740>; | |
| qcom,init-voltage = <0x1b7740>; | |
| linux,phandle = <0xee>; | |
| phandle = <0xee>; | |
| }; | |
| regulator-l7-ao { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_l7_ao"; | |
| qcom,set = <0x1>; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-max-microvolt = <0x1b7740>; | |
| qcom,init-voltage = <0x1b7740>; | |
| linux,phandle = <0xe3>; | |
| phandle = <0xe3>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa8 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x8>; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l8 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_l8"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x2b7cd0>; | |
| regulator-max-microvolt = <0x2c4020>; | |
| qcom,init-voltage = <0x2c4020>; | |
| linux,phandle = <0xfb>; | |
| phandle = <0xfb>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa9 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x9>; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l9 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_l9"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x2dc6c0>; | |
| regulator-max-microvolt = <0x325aa0>; | |
| qcom,init-voltage = <0x2dc6c0>; | |
| linux,phandle = <0xf0>; | |
| phandle = <0xf0>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa10 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0xa>; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l10 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_l10"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x2ab980>; | |
| regulator-max-microvolt = <0x2dc6c0>; | |
| qcom,init-voltage = <0x2ab980>; | |
| linux,phandle = <0xcd>; | |
| phandle = <0xcd>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa11 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0xb>; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l11 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_l11"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x2d0370>; | |
| regulator-max-microvolt = <0x2d0370>; | |
| qcom,init-voltage = <0x2d0370>; | |
| linux,phandle = <0x55>; | |
| phandle = <0x55>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa12 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0xc>; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l12 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_l12"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-max-microvolt = <0x2d0370>; | |
| qcom,init-voltage = <0x1b7740>; | |
| linux,phandle = <0x56>; | |
| phandle = <0x56>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa13 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0xd>; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x1388>; | |
| status = "okay"; | |
| regulator-l13 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_l13"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x2eebb8>; | |
| regulator-max-microvolt = <0x2eebb8>; | |
| qcom,init-voltage = <0x2eebb8>; | |
| linux,phandle = <0xb7>; | |
| phandle = <0xb7>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa14 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0xe>; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x1388>; | |
| status = "okay"; | |
| regulator-l14 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_l14"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-max-microvolt = <0x325aa0>; | |
| qcom,init-voltage = <0x1b7740>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa15 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0xf>; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x1388>; | |
| status = "okay"; | |
| regulator-l15 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_l15"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-max-microvolt = <0x325aa0>; | |
| qcom,init-voltage = <0x1b7740>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa16 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x10>; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x1388>; | |
| status = "okay"; | |
| regulator-l16 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_l16"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-max-microvolt = <0x1b7740>; | |
| qcom,init-voltage = <0x1b7740>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa17 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x11>; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l17 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_l17"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x2ab980>; | |
| regulator-max-microvolt = <0x2c4020>; | |
| qcom,init-voltage = <0x2ab980>; | |
| linux,phandle = <0x12a>; | |
| phandle = <0x12a>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa19 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x13>; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l19 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_l19"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x12b128>; | |
| regulator-max-microvolt = <0x149970>; | |
| qcom,init-voltage = <0x12b128>; | |
| linux,phandle = <0xef>; | |
| phandle = <0xef>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa22 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x16>; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l22 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_l22"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x2ab980>; | |
| regulator-max-microvolt = <0x2ab980>; | |
| qcom,init-voltage = <0x2ab980>; | |
| linux,phandle = <0x12c>; | |
| phandle = <0x12c>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa23 { | |
| compatible = "qcom,rpm-smd-regulator-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x17>; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l23 { | |
| compatible = "qcom,rpm-smd-regulator"; | |
| regulator-name = "pm8937_l23"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x124f80>; | |
| regulator-max-microvolt = <0x124f80>; | |
| qcom,init-voltage = <0x124f80>; | |
| linux,phandle = <0x12b>; | |
| phandle = <0x12b>; | |
| }; | |
| }; | |
| }; | |
| qcom,wcnss-wlan@0a000000 { | |
| compatible = "qcom,wcnss_wlan"; | |
| reg = <0xa000000 0x280000 0xb011008 0x4 0xa21b000 0x3000 0x3204000 0x100 0x3200800 0x200 0xa100400 0x200 0xa205050 0x200 0xa219000 0x20 0xa080488 0x8 0xa080fb0 0x8 0xa08040c 0x8 0xa0120a8 0x8 0xa012448 0x8 0xa080c00 0x1>; | |
| reg-names = "wcnss_mmio", "wcnss_fiq", "pronto_phy_base", "riva_phy_base", "riva_ccu_base", "pronto_a2xb_base", "pronto_ccpu_base", "pronto_saw2_base", "wlan_tx_phy_aborts", "wlan_brdg_err_source", "wlan_tx_status", "alarms_txctl", "alarms_tactl", "pronto_mcu_base"; | |
| interrupts = <0x0 0x91 0x0 0x0 0x92 0x0>; | |
| interrupt-names = "wcnss_wlantx_irq", "wcnss_wlanrx_irq"; | |
| qcom,pronto-vddmx-supply = <0xed>; | |
| qcom,pronto-vddcx-supply = <0xe1>; | |
| qcom,pronto-vddpx-supply = <0xb6>; | |
| qcom,iris-vddxo-supply = <0xee>; | |
| qcom,iris-vddrfa-supply = <0xef>; | |
| qcom,iris-vddpa-supply = <0xf0>; | |
| qcom,iris-vdddig-supply = <0xb6>; | |
| qcom,iris-vddxo-voltage-level = <0x1b7740 0x0 0x1b7740>; | |
| qcom,iris-vddrfa-voltage-level = <0x13d620 0x0 0x13d620>; | |
| qcom,iris-vddpa-voltage-level = <0x325aa0 0x0 0x325aa0>; | |
| qcom,iris-vdddig-voltage-level = <0x1b7740 0x0 0x1b7740>; | |
| qcom,vddmx-voltage-level = <0x180 0x0 0x180>; | |
| qcom,vddcx-voltage-level = <0x100 0x0 0x200>; | |
| qcom,vddpx-voltage-level = <0x1b7740 0x0 0x1b7740>; | |
| qcom,iris-vddxo-current = <0x2710>; | |
| qcom,iris-vddrfa-current = <0x186a0>; | |
| qcom,iris-vddpa-current = <0x7dbb8>; | |
| qcom,iris-vdddig-current = <0x2710>; | |
| qcom,pronto-vddmx-current = <0x0>; | |
| qcom,pronto-vddcx-current = <0x0>; | |
| qcom,pronto-vddpx-current = <0x0>; | |
| pinctrl-names = "wcnss_default", "wcnss_sleep", "wcnss_gpio_default"; | |
| pinctrl-0 = <0xf1>; | |
| pinctrl-1 = <0xf2>; | |
| pinctrl-2 = <0xf3>; | |
| gpios = <0xa7 0x4c 0x0 0xa7 0x4d 0x0 0xa7 0x4e 0x0 0xa7 0x4f 0x0 0xa7 0x50 0x0>; | |
| clocks = <0x2b 0x116b76f 0x2b 0x24a30992 0xf4 0x917968c2 0x2b 0x709f430b 0x2b 0xd3949ebc>; | |
| clock-names = "xo", "rf_clk", "measure", "wcnss_debug", "snoc_wcnss"; | |
| qcom,snoc-wcnss-clock-freq = <0xbebc200>; | |
| qcom,has-autodetect-xo; | |
| qcom,is-pronto-v3; | |
| qcom,has-pronto-hw; | |
| qcom,has-vsys-adc-channel; | |
| qcom,wcnss-adc_tm = <0xf5>; | |
| }; | |
| usb@78db000 { | |
| compatible = "qcom,hsusb-otg"; | |
| reg = <0x78db000 0x400 0x6c000 0x200>; | |
| reg-names = "core", "phy_csr"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| ranges; | |
| interrupts = <0x0 0x86 0x0 0x0 0x8c 0x0>; | |
| interrupt-names = "core_irq", "async_irq"; | |
| hsusb_vdd_dig-supply = <0xf6>; | |
| HSUSB_1p8-supply = <0xee>; | |
| HSUSB_3p3-supply = <0xb7>; | |
| qcom,vdd-voltage-level = <0x0 0x124f80 0x124f80>; | |
| vbus_otg-supply = <0xf7>; | |
| qcom,hsusb-otg-phy-type = <0x3>; | |
| qcom,hsusb-otg-mode = <0x3>; | |
| qcom,hsusb-otg-otg-control = <0x2>; | |
| qcom,dp-manual-pullup; | |
| qcom,hsusb-otg-mpm-dpsehv-int = <0x31>; | |
| qcom,hsusb-otg-mpm-dmsehv-int = <0x3a>; | |
| qcom,phy-dvdd-always-on; | |
| qcom,boost-sysclk-with-streaming; | |
| qcom,axi-prefetch-enable; | |
| qcom,enable-sdp-typec-current-limit; | |
| qcom,hsusb-otg-delay-lpm; | |
| qcom,msm-bus,name = "usb2"; | |
| qcom,msm-bus,num-cases = <0x3>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0x57 0x200 0x0 0x0 0x57 0x200 0x13880 0x0 0x57 0x200 0x1770 0x1770>; | |
| clocks = <0x2b 0x72ce8032 0x2b 0xa11972e5 0x2b 0x6caa736f 0x2b 0xea410834 0x2b 0x34b7821b 0x2b 0x11d6a74e 0x2b 0x996884d5 0x2b 0x47179d 0x2b 0xe13808fd 0x2b 0x79bca5cc>; | |
| clock-names = "iface_clk", "core_clk", "sleep_clk", "bimc_clk", "snoc_clk", "pcnoc_clk", "phy_reset_clk", "phy_por_clk", "phy_csr_clk", "xo"; | |
| qcom,bus-clk-rate = <0x2ca1c800 0xbebc200 0x5f5e100>; | |
| qcom,max-nominal-sysclk-rate = <0x7f27450>; | |
| qcom,hsusb-otg-phy-init-seq = <0x53 0x80 0x32 0x81 0x7 0x82 0x13 0x83 0xffffffff>; | |
| qcom,usbbam@78c4000 { | |
| compatible = "qcom,usb-bam-msm"; | |
| reg = <0x78c4000 0x17000>; | |
| interrupt-parent = <0x1>; | |
| interrupts = <0x0 0x87 0x0>; | |
| qcom,bam-type = <0x1>; | |
| qcom,usb-bam-num-pipes = <0x4>; | |
| qcom,usb-bam-fifo-baseaddr = "\b`P"; | |
| qcom,ignore-core-reset-ack; | |
| qcom,disable-clk-gating; | |
| qcom,usb-bam-max-mbps-highspeed = <0x190>; | |
| qcom,reset-bam-on-disconnect; | |
| qcom,pipe0 { | |
| label = "hsusb-qdss-in-0"; | |
| qcom,usb-bam-mem-type = <0x2>; | |
| qcom,dir = <0x1>; | |
| qcom,pipe-num = <0x0>; | |
| qcom,peer-bam = <0x0>; | |
| qcom,peer-bam-physical-address = <0x6044000>; | |
| qcom,src-bam-pipe-index = <0x0>; | |
| qcom,dst-bam-pipe-index = <0x0>; | |
| qcom,data-fifo-offset = <0x0>; | |
| qcom,data-fifo-size = <0xe00>; | |
| qcom,descriptor-fifo-offset = <0xe00>; | |
| qcom,descriptor-fifo-size = <0x200>; | |
| }; | |
| }; | |
| }; | |
| android_usb@86000c8 { | |
| compatible = "qcom,android-usb"; | |
| reg = <0x86000c8 0xc8>; | |
| qcom,pm-qos-latency = <0x2 0x3e9 0x319d>; | |
| }; | |
| qcom,wdt@b017000 { | |
| compatible = "qcom,msm-watchdog"; | |
| reg = <0xb017000 0x1000>; | |
| reg-names = "wdt-base"; | |
| interrupts = <0x0 0x3 0x0 0x0 0x4 0x0>; | |
| qcom,bark-time = <0x2af8>; | |
| qcom,pet-time = <0x2710>; | |
| qcom,ipi-ping; | |
| qcom,wakeup-enable; | |
| status = "okay"; | |
| }; | |
| qcom,chd { | |
| compatible = "qcom,core-hang-detect"; | |
| qcom,threshold-arr = <0xb088094 0xb098094 0xb0a8094 0xb0b8094 0xb188094 0xb198094 0xb1a8094 0xb1a8094>; | |
| qcom,config-arr = <0xb08809c 0xb09809c 0xb0a809c 0xb0b809c 0xb18809c 0xb19809c 0xb1a809c 0xb1b809c>; | |
| }; | |
| qcom,msm-rtb { | |
| compatible = "qcom,msm-rtb"; | |
| qcom,rtb-size = <0x100000>; | |
| }; | |
| qcom,msm-imem@8600000 { | |
| compatible = "qcom,msm-imem"; | |
| reg = <0x8600000 0x1000>; | |
| ranges = <0x0 0x8600000 0x1000>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| mem_dump_table@10 { | |
| compatible = "qcom,msm-imem-mem_dump_table"; | |
| reg = <0x10 0x8>; | |
| }; | |
| dload_type@1c { | |
| compatible = "qcom,msm-imem-dload-type"; | |
| reg = <0x1c 0x4>; | |
| }; | |
| restart_reason@65c { | |
| compatible = "qcom,msm-imem-restart_reason"; | |
| reg = <0x65c 0x4>; | |
| }; | |
| boot_stats@6b0 { | |
| compatible = "qcom,msm-imem-boot_stats"; | |
| reg = <0x6b0 0x20>; | |
| }; | |
| pil@94c { | |
| compatible = "qcom,msm-imem-pil"; | |
| reg = <0x94c 0xc8>; | |
| }; | |
| }; | |
| jtagfuse@a601c { | |
| compatible = "qcom,jtag-fuse-v2"; | |
| reg = <0xa601c 0x8>; | |
| reg-names = "fuse-base"; | |
| }; | |
| jtagmm@61bc000 { | |
| compatible = "qcom,jtagv8-mm"; | |
| reg = <0x61bc000 0x1000 0x61b0000 0x1000>; | |
| reg-names = "etm-base", "debug-base"; | |
| qcom,coresight-jtagmm-cpu = <0x6>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| jtagmm@61bd000 { | |
| compatible = "qcom,jtagv8-mm"; | |
| reg = <0x61bd000 0x1000 0x61b2000 0x1000>; | |
| reg-names = "etm-base", "debug-base"; | |
| qcom,coresight-jtagmm-cpu = <0x7>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| jtagmm@61be000 { | |
| compatible = "qcom,jtagv8-mm"; | |
| reg = <0x61be000 0x1000 0x61b4000 0x1000>; | |
| reg-names = "etm-base", "debug-base"; | |
| qcom,coresight-jtagmm-cpu = <0x8>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| jtagmm@61bf000 { | |
| compatible = "qcom,jtagv8-mm"; | |
| reg = <0x61bf000 0x1000 0x61b6000 0x1000>; | |
| reg-names = "etm-base", "debug-base"; | |
| qcom,coresight-jtagmm-cpu = <0x9>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| jtagmm@619c000 { | |
| compatible = "qcom,jtagv8-mm"; | |
| reg = <0x619c000 0x1000 0x6190000 0x1000>; | |
| reg-names = "etm-base", "debug-base"; | |
| qcom,coresight-jtagmm-cpu = <0x2>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| jtagmm@619d000 { | |
| compatible = "qcom,jtagv8-mm"; | |
| reg = <0x619d000 0x1000 0x6192000 0x1000>; | |
| reg-names = "etm-base", "debug-base"; | |
| qcom,coresight-jtagmm-cpu = <0x3>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| jtagmm@619e000 { | |
| compatible = "qcom,jtagv8-mm"; | |
| reg = <0x619e000 0x1000 0x6194000 0x1000>; | |
| reg-names = "etm-base", "debug-base"; | |
| qcom,coresight-jtagmm-cpu = <0x4>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| jtagmm@619f000 { | |
| compatible = "qcom,jtagv8-mm"; | |
| reg = <0x619f000 0x1000 0x6196000 0x1000>; | |
| reg-names = "etm-base", "debug-base"; | |
| qcom,coresight-jtagmm-cpu = <0x5>; | |
| clocks = <0x2b 0x1492202a 0x2b 0xdd121669>; | |
| clock-names = "core_clk", "core_a_clk"; | |
| }; | |
| qcom,smdtty { | |
| compatible = "qcom,smdtty"; | |
| qcom,smdtty-apps-fm { | |
| qcom,smdtty-remote = "wcnss"; | |
| qcom,smdtty-port-name = "APPS_FM"; | |
| }; | |
| smdtty-apps-riva-bt-acl { | |
| qcom,smdtty-remote = "wcnss"; | |
| qcom,smdtty-port-name = "APPS_RIVA_BT_ACL"; | |
| }; | |
| qcom,smdtty-apps-riva-bt-cmd { | |
| qcom,smdtty-remote = "wcnss"; | |
| qcom,smdtty-port-name = "APPS_RIVA_BT_CMD"; | |
| }; | |
| qcom,smdtty-mbalbridge { | |
| qcom,smdtty-remote = "modem"; | |
| qcom,smdtty-port-name = "MBALBRIDGE"; | |
| }; | |
| smdtty-apps-riva-ant-cmd { | |
| qcom,smdtty-remote = "wcnss"; | |
| qcom,smdtty-port-name = "APPS_RIVA_ANT_CMD"; | |
| }; | |
| smdtty-apps-riva-ant-data { | |
| qcom,smdtty-remote = "wcnss"; | |
| qcom,smdtty-port-name = "APPS_RIVA_ANT_DATA"; | |
| }; | |
| qcom,smdtty-data1 { | |
| qcom,smdtty-remote = "modem"; | |
| qcom,smdtty-port-name = "DATA1"; | |
| }; | |
| qcom,smdtty-data4 { | |
| qcom,smdtty-remote = "modem"; | |
| qcom,smdtty-port-name = "DATA4"; | |
| }; | |
| qcom,smdtty-data11 { | |
| qcom,smdtty-remote = "modem"; | |
| qcom,smdtty-port-name = "DATA11"; | |
| }; | |
| qcom,smdtty-data21 { | |
| qcom,smdtty-remote = "modem"; | |
| qcom,smdtty-port-name = "DATA21"; | |
| }; | |
| smdtty-loopback { | |
| qcom,smdtty-remote = "modem"; | |
| qcom,smdtty-port-name = "LOOPBACK"; | |
| qcom,smdtty-dev-name = "LOOPBACK_TTY"; | |
| }; | |
| }; | |
| qcom,smdpkt { | |
| compatible = "qcom,smdpkt"; | |
| qcom,smdpkt-data5-cntl { | |
| qcom,smdpkt-remote = "modem"; | |
| qcom,smdpkt-port-name = "DATA5_CNTL"; | |
| qcom,smdpkt-dev-name = "smdcntl0"; | |
| }; | |
| qcom,smdpkt-data22 { | |
| qcom,smdpkt-remote = "modem"; | |
| qcom,smdpkt-port-name = "DATA22"; | |
| qcom,smdpkt-dev-name = "smd22"; | |
| }; | |
| qcom,smdpkt-data40-cntl { | |
| qcom,smdpkt-remote = "modem"; | |
| qcom,smdpkt-port-name = "DATA40_CNTL"; | |
| qcom,smdpkt-dev-name = "smdcntl8"; | |
| }; | |
| qcom,smdpkt-apr-apps2 { | |
| qcom,smdpkt-remote = "adsp"; | |
| qcom,smdpkt-port-name = "apr_apps2"; | |
| qcom,smdpkt-dev-name = "apr_apps2"; | |
| }; | |
| qcom,smdpkt-loopback { | |
| qcom,smdpkt-remote = "modem"; | |
| qcom,smdpkt-port-name = "LOOPBACK"; | |
| qcom,smdpkt-dev-name = "smd_pkt_loopback"; | |
| }; | |
| }; | |
| qcom,iris-fm { | |
| compatible = "qcom,iris_fm"; | |
| }; | |
| qrng@e3000 { | |
| compatible = "qcom,msm-rng"; | |
| reg = <0xe3000 0x1000>; | |
| qcom,msm-rng-iface-clk; | |
| qcom,no-qrng-config; | |
| qcom,msm-bus,name = "msm-rng-noc"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0x1 0x26a 0x0 0x0 0x1 0x26a 0x0 0x320>; | |
| clocks = <0x2b 0x397e7eaa>; | |
| clock-names = "iface_clk"; | |
| }; | |
| tz-log@08600720 { | |
| compatible = "qcom,tz-log"; | |
| reg = "\b`\a ", "", " "; | |
| }; | |
| qcrypto@720000 { | |
| compatible = "qcom,qcrypto"; | |
| reg = <0x720000 0x20000 0x704000 0x20000>; | |
| reg-names = "crypto-base", "crypto-bam-base"; | |
| interrupts = <0x0 0xcf 0x0>; | |
| qcom,bam-pipe-pair = <0x2>; | |
| qcom,ce-hw-instance = <0x0>; | |
| qcom,ce-device = <0x0>; | |
| qcom,ce-hw-shared; | |
| qcom,clk-mgmt-sus-res; | |
| qcom,msm-bus,name = "qcrypto-noc"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0x37 0x200 0x0 0x0 0x37 0x200 0x60180 0x60180>; | |
| clocks = <0x2b 0x37a21414 0x2b 0xd390d2 0x2b 0x94de4919 0x2b 0xd4415c9b>; | |
| clock-names = "core_clk_src", "core_clk", "iface_clk", "bus_clk"; | |
| qcom,use-sw-aes-cbc-ecb-ctr-algo; | |
| qcom,use-sw-aes-xts-algo; | |
| qcom,use-sw-aes-ccm-algo; | |
| qcom,use-sw-ahash-algo; | |
| qcom,use-sw-hmac-algo; | |
| qcom,use-sw-aead-algo; | |
| qcom,ce-opp-freq = <0x5f5e100>; | |
| }; | |
| qcedev@720000 { | |
| compatible = "qcom,qcedev"; | |
| reg = <0x720000 0x20000 0x704000 0x20000>; | |
| reg-names = "crypto-base", "crypto-bam-base"; | |
| interrupts = <0x0 0xcf 0x0>; | |
| qcom,bam-pipe-pair = <0x1>; | |
| qcom,ce-hw-instance = <0x0>; | |
| qcom,ce-device = <0x0>; | |
| qcom,ce-hw-shared; | |
| qcom,msm-bus,name = "qcedev-noc"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0x37 0x200 0x0 0x0 0x37 0x200 0x60180 0x60180>; | |
| clocks = <0x2b 0x37a21414 0x2b 0xd390d2 0x2b 0x94de4919 0x2b 0xd4415c9b>; | |
| clock-names = "core_clk_src", "core_clk", "iface_clk", "bus_clk"; | |
| qcom,ce-opp-freq = <0x5f5e100>; | |
| }; | |
| qcom,ipc_router { | |
| compatible = "qcom,ipc_router"; | |
| qcom,node-id = <0x1>; | |
| }; | |
| qcom,ipc_router_modem_xprt { | |
| compatible = "qcom,ipc_router_smd_xprt"; | |
| qcom,ch-name = "IPCRTR"; | |
| qcom,xprt-remote = "modem"; | |
| qcom,xprt-linkid = <0x1>; | |
| qcom,xprt-version = <0x1>; | |
| qcom,fragmented-data; | |
| qcom,disable-pil-loading; | |
| }; | |
| qcom,ipc_router_q6_xprt { | |
| compatible = "qcom,ipc_router_smd_xprt"; | |
| qcom,ch-name = "IPCRTR"; | |
| qcom,xprt-remote = "adsp"; | |
| qcom,xprt-linkid = <0x1>; | |
| qcom,xprt-version = <0x1>; | |
| qcom,fragmented-data; | |
| }; | |
| qcom,ipc_router_wcnss_xprt { | |
| compatible = "qcom,ipc_router_smd_xprt"; | |
| qcom,ch-name = "IPCRTR"; | |
| qcom,xprt-remote = "wcnss"; | |
| qcom,xprt-linkid = <0x1>; | |
| qcom,xprt-version = <0x1>; | |
| qcom,fragmented-data; | |
| }; | |
| qcom,adsprpc-mem { | |
| compatible = "qcom,msm-adsprpc-mem-region"; | |
| memory-region = <0xf8>; | |
| }; | |
| qcom,adsprpc_domains { | |
| compatible = "qcom,msm-fastrpc-legacy-compute-cb"; | |
| qcom,msm_fastrpc_compute_cb { | |
| qcom,adsp-shared-phandle = <0xf9>; | |
| qcom,adsp-shared-sids = <0x8 0x9 0xa 0xb 0xc 0xd 0xe 0xf>; | |
| qcom,virtual-addr-pool = <0x80000000 0x7fffffff>; | |
| }; | |
| }; | |
| qcom,bam_dmux@4044000 { | |
| compatible = "qcom,bam_dmux"; | |
| reg = <0x4044000 0x19000>; | |
| interrupts = <0x0 0xa2 0x1>; | |
| qcom,rx-ring-size = <0x20>; | |
| qcom,max-rx-mtu = <0x1000>; | |
| qcom,fast-shutdown; | |
| qcom,no-cpu-affinity; | |
| }; | |
| sdcc1ice@7803000 { | |
| compatible = "qcom,ice"; | |
| reg = <0x7803000 0x8000>; | |
| interrupt-names = "sdcc_ice_nonsec_level_irq", "sdcc_ice_sec_level_irq"; | |
| interrupts = <0x0 0x138 0x0 0x0 0x139 0x0>; | |
| qcom,enable-ice-clk; | |
| clock-names = "ice_core_clk_src", "ice_core_clk", "bus_clk", "iface_clk"; | |
| clocks = <0x2b 0xfd6a4301 0x2b 0xfd5680a 0x2b 0x9ad6fb96 0x2b 0x691e0caa>; | |
| qcom,op-freq-hz = <0xbebc200 0x0 0x0 0x0>; | |
| qcom,msm-bus,name = "sdcc_ice_noc"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0x4e 0x200 0x0 0x0 0x4e 0x200 0x3e8 0x0>; | |
| qcom,bus-vector-names = "MIN", "MAX"; | |
| qcom,instance-type = "sdcc"; | |
| linux,phandle = <0xfa>; | |
| phandle = <0xfa>; | |
| }; | |
| sdhci@7824900 { | |
| compatible = "qcom,sdhci-msm"; | |
| reg = <0x7824900 0x500 0x7824000 0x800 0x7824e00 0x200>; | |
| reg-names = "hc_mem", "core_mem", "cmdq_mem"; | |
| interrupts = <0x0 0x7b 0x0 0x0 0x8a 0x0>; | |
| interrupt-names = "hc_irq", "pwr_irq"; | |
| sdhc-msm-crypto = <0xfa>; | |
| qcom,bus-width = <0x8>; | |
| qcom,large-address-bus; | |
| qcom,devfreq,freq-table = <0x2faf080 0xbebc200>; | |
| qcom,pm-qos-irq-type = "affine_irq"; | |
| qcom,pm-qos-irq-latency = <0x2 0xc8>; | |
| qcom,pm-qos-cpu-groups = <0xf 0xf0>; | |
| qcom,pm-qos-cmdq-latency-us = <0x2 0xc8 0x2 0xc8>; | |
| qcom,pm-qos-legacy-latency-us = <0x2 0xc8 0x2 0xc8>; | |
| qcom,msm-bus,name = "sdhc1"; | |
| qcom,msm-bus,num-cases = <0x9>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0x4e 0x200 0x0 0x0 0x4e 0x200 0x416 0xc80 0x4e 0x200 0xcc3e 0x27100 0x4e 0x200 0xff50 0x30d40 0x4e 0x200 0x1fe9e 0x61a80 0x4e 0x200 0x1fe9e 0x61a80 0x4e 0x200 0x3fd3e 0xc3500 0x4e 0x200 0x3fd3e 0xc3500 0x4e 0x200 0x146cc2 0x3e8000>; | |
| qcom,bus-bw-vectors-bps = <0x0 0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100 0xbebc200 0x17d78400 0xffffffff>; | |
| clocks = <0x2b 0x691e0caa 0x2b 0x9ad6fb96 0x2b 0xfd5680a>; | |
| clock-names = "iface_clk", "core_clk", "ice_core_clk"; | |
| qcom,ice-clk-rates = <0xbebc200 0x5f5e100>; | |
| qcom,scaling-lower-bus-speed-mode = "DDR52"; | |
| status = "ok"; | |
| vdd-supply = <0xfb>; | |
| qcom,vdd-voltage-level = <0x2c4020 0x2c4020>; | |
| qcom,vdd-current-level = <0xc8 0x8b290>; | |
| vdd-io-supply = <0xb6>; | |
| qcom,vdd-io-always-on; | |
| qcom,vdd-io-lpm-sup; | |
| qcom,vdd-io-voltage-level = <0x1b7740 0x1b7740>; | |
| qcom,vdd-io-current-level = <0xc8 0x4f588>; | |
| pinctrl-names = "active", "sleep"; | |
| pinctrl-0 = <0xfc 0xfd 0xfe 0xff>; | |
| pinctrl-1 = <0x100 0x101 0x102 0x103>; | |
| qcom,clk-rates = <0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100 0xb71b000 0x16e36000>; | |
| qcom,nonremovable; | |
| qcom,bus-speed-mode = "HS400_1p8v", "HS200_1p8v", "DDR_1p8v"; | |
| qcom,vdd-always-on; | |
| }; | |
| sdhci@7864900 { | |
| compatible = "qcom,sdhci-msm"; | |
| reg = <0x7864900 0x500 0x7864000 0x800>; | |
| reg-names = "hc_mem", "core_mem"; | |
| interrupts = <0x0 0x1 0x2>; | |
| interrupt-names = "hc_irq", "pwr_irq", "status_irq"; | |
| qcom,bus-width = <0x4>; | |
| qcom,large-address-bus; | |
| qcom,pm-qos-irq-type = "affine_irq"; | |
| qcom,pm-qos-irq-latency = <0x2 0xc8>; | |
| qcom,pm-qos-cpu-groups = <0xf 0xf0>; | |
| qcom,pm-qos-legacy-latency-us = <0x2 0xc8 0x2 0xc8>; | |
| qcom,msm-bus,name = "sdhc2"; | |
| qcom,msm-bus,num-cases = <0x8>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0x51 0x200 0x0 0x0 0x51 0x200 0x416 0xc80 0x51 0x200 0xcc3e 0x27100 0x51 0x200 0xff50 0x30d40 0x51 0x200 0x1fe9e 0x61a80 0x51 0x200 0x3fd3e 0xc3500 0x51 0x200 0x3fd3e 0xc3500 0x51 0x200 0x146cc2 0x3e8000>; | |
| qcom,bus-bw-vectors-bps = <0x0 0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100 0xbebc200 0xffffffff>; | |
| qcom,devfreq,freq-table = <0x2faf080 0xbebc200>; | |
| clocks = <0x2b 0x23d5727f 0x2b 0x861b20ac>; | |
| clock-names = "iface_clk", "core_clk"; | |
| status = "ok"; | |
| vdd-supply = <0x55>; | |
| qcom,vdd-voltage-level = <0x2d0370 0x2d0370>; | |
| qcom,vdd-current-level = <0x3a98 0xc3500>; | |
| vdd-io-supply = <0x56>; | |
| qcom,vdd-io-voltage-level = <0x1b7740 0x2d0370>; | |
| qcom,vdd-io-current-level = <0xc8 0x55f0>; | |
| pinctrl-names = "active", "sleep"; | |
| pinctrl-0 = <0x104 0x105 0x106 0x107>; | |
| pinctrl-1 = <0x108 0x109 0x10a 0x10b>; | |
| #address-cells = <0x0>; | |
| interrupt-parent = <0x10c>; | |
| #interrupt-cells = <0x1>; | |
| interrupt-map-mask = <0xffffffff>; | |
| interrupt-map = <0x0 0x1 0x0 0x7d 0x0 0x1 0x1 0x0 0xdd 0x0 0x2 0xa7 0x43 0x0>; | |
| cd-gpios = <0xa7 0x43 0x1>; | |
| qcom,clk-rates = <0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100 0xbebc200>; | |
| qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104"; | |
| linux,phandle = <0x10c>; | |
| phandle = <0x10c>; | |
| }; | |
| qcom,spmi@200f000 { | |
| compatible = "qcom,spmi-pmic-arb"; | |
| reg = <0x200f000 0x1000 0x2400000 0x800000 0x2c00000 0x800000 0x3800000 0x200000 0x200a000 0x2100>; | |
| reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; | |
| interrupts = <0x0 0xbe 0x0>; | |
| qcom,pmic-arb-channel = <0x0>; | |
| qcom,pmic-arb-max-peripherals = <0x100>; | |
| qcom,pmic-arb-max-periph-interrupts = <0x100>; | |
| qcom,pmic-arb-ee = <0x0>; | |
| #interrupt-cells = <0x3>; | |
| interrupt-controller; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| cell-index = <0x0>; | |
| linux,phandle = <0x10d>; | |
| phandle = <0x10d>; | |
| qcom,pm8937@1 { | |
| spmi-slave-container; | |
| reg = <0x1>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| spm-regulator@2000 { | |
| compatible = "qcom,spm-regulator"; | |
| reg = <0x2000 0x100>; | |
| regulator-name = "pm8937_s5"; | |
| regulator-min-microvolt = <0x100590>; | |
| regulator-max-microvolt = <0x149970>; | |
| linux,phandle = <0x11f>; | |
| phandle = <0x11f>; | |
| }; | |
| pwm@bc00 { | |
| status = "disabled"; | |
| compatible = "qcom,qpnp-pwm"; | |
| reg = <0xbc00 0x100>; | |
| reg-names = "qpnp-lpg-channel-base"; | |
| qcom,channel-id = <0x0>; | |
| qcom,supported-sizes = <0x6 0x9>; | |
| #pwm-cells = <0x2>; | |
| }; | |
| 8952_wcd_codec@f000 { | |
| compatible = "qcom,msm8x16_wcd_codec"; | |
| reg = <0xf000 0x100>; | |
| interrupt-parent = <0x10d>; | |
| interrupts = <0x1 0xf0 0x0 0x1 0xf0 0x1 0x1 0xf0 0x2 0x1 0xf0 0x3 0x1 0xf0 0x4 0x1 0xf0 0x5 0x1 0xf0 0x6 0x1 0xf0 0x7>; | |
| interrupt-names = "spk_cnp_int", "spk_clip_int", "spk_ocp_int", "ins_rem_det1", "but_rel_det", "but_press_det", "ins_rem_det", "mbhc_int"; | |
| cdc-vdda-cp-supply = <0x10e>; | |
| qcom,cdc-vdda-cp-voltage = <0x1f47d0 0x1f47d0>; | |
| qcom,cdc-vdda-cp-current = <0x33450>; | |
| cdc-vdd-io-supply = <0xb6>; | |
| qcom,cdc-vdd-io-voltage = <0x1b7740 0x1b7740>; | |
| qcom,cdc-vdd-io-current = <0x1388>; | |
| cdc-vdd-pa-supply = <0x10e>; | |
| qcom,cdc-vdd-pa-voltage = <0x1f47d0 0x1f47d0>; | |
| qcom,cdc-vdd-pa-current = <0x3f7a0>; | |
| cdc-vdd-mic-bias-supply = <0xb7>; | |
| qcom,cdc-vdd-mic-bias-voltage = <0x2eebb8 0x2eebb8>; | |
| qcom,cdc-vdd-mic-bias-current = <0x1388>; | |
| qcom,cdc-mclk-clk-rate = <0x927c00>; | |
| qcom,cdc-static-supplies = "cdc-vdd-io", "cdc-vdd-pa", "cdc-vdda-cp"; | |
| qcom,cdc-on-demand-supplies = "cdc-vdd-mic-bias"; | |
| qcom,dig-cdc-base-addr = <0xc0f0000>; | |
| status = "okay"; | |
| linux,phandle = <0x16f>; | |
| phandle = <0x16f>; | |
| }; | |
| 8952_wcd_codec@f100 { | |
| compatible = "qcom,msm8x16_wcd_codec"; | |
| reg = <0xf100 0x100>; | |
| interrupt-parent = <0x10d>; | |
| interrupts = <0x1 0xf1 0x0 0x1 0xf1 0x1 0x1 0xf1 0x2 0x1 0xf1 0x3 0x1 0xf1 0x4 0x1 0xf1 0x5>; | |
| interrupt-names = "ear_ocp_int", "hphr_ocp_int", "hphl_ocp_det", "ear_cnp_int", "hphr_cnp_int", "hphl_cnp_int"; | |
| qcom,dig-cdc-base-addr = <0xc0f0000>; | |
| status = "okay"; | |
| }; | |
| }; | |
| qcom,pm8937@0 { | |
| spmi-slave-container; | |
| reg = <0x0>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| qcom,revid@100 { | |
| compatible = "qcom,qpnp-revid"; | |
| reg = <0x100 0x100>; | |
| }; | |
| qcom,power-on@800 { | |
| compatible = "qcom,qpnp-power-on"; | |
| reg = <0x800 0x100>; | |
| interrupts = <0x0 0x8 0x0 0x0 0x8 0x1 0x0 0x8 0x4 0x0 0x8 0x5>; | |
| interrupt-names = "kpdpwr", "resin", "resin-bark", "kpdpwr-resin-bark"; | |
| qcom,pon-dbc-delay = <0x3d09>; | |
| qcom,system-reset; | |
| qcom,store-hard-reset-reason; | |
| qcom,pon_1 { | |
| qcom,pon-type = <0x0>; | |
| qcom,pull-up = <0x1>; | |
| linux,code = <0x74>; | |
| qcom,support-reset = <0x1>; | |
| qcom,s2-timer = <0x7d0>; | |
| qcom,s2-type = <0x7>; | |
| qcom,s1-timer = <0x2810>; | |
| }; | |
| qcom,pon_2 { | |
| qcom,pon-type = <0x1>; | |
| qcom,pull-up = <0x1>; | |
| linux,code = <0x72>; | |
| }; | |
| }; | |
| qcom,temp-alarm@2400 { | |
| compatible = "qcom,qpnp-temp-alarm"; | |
| reg = <0x2400 0x100>; | |
| interrupts = <0x0 0x24 0x0>; | |
| label = "pm8937_tz"; | |
| qcom,channel-num = <0x8>; | |
| qcom,threshold-set = <0x0>; | |
| qcom,temp_alarm-vadc = <0x10f>; | |
| }; | |
| qcom,coincell@2800 { | |
| compatible = "qcom,qpnp-coincell"; | |
| reg = <0x2800 0x100>; | |
| }; | |
| qcom,pm8937_rtc { | |
| spmi-dev-container; | |
| compatible = "qcom,qpnp-rtc"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| qcom,qpnp-rtc-write = <0x0>; | |
| qcom,qpnp-rtc-alarm-pwrup = <0x0>; | |
| qcom,pm8937_rtc_rw@6000 { | |
| reg = <0x6000 0x100>; | |
| }; | |
| qcom,pm8937_rtc_alarm@6100 { | |
| reg = <0x6100 0x100>; | |
| interrupts = <0x0 0x61 0x1>; | |
| }; | |
| }; | |
| mpps { | |
| compatible = "qcom,qpnp-pin"; | |
| spmi-dev-container; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| label = "pm8937-mpp"; | |
| mpp@a000 { | |
| reg = <0xa000 0x100>; | |
| qcom,pin-num = <0x1>; | |
| status = "disabled"; | |
| }; | |
| mpp@a100 { | |
| reg = <0xa100 0x100>; | |
| qcom,pin-num = <0x2>; | |
| qcom,mode = <0x4>; | |
| qcom,invert = <0x1>; | |
| qcom,ain-route = <0x1>; | |
| qcom,master-en = <0x1>; | |
| qcom,src-sel = <0x0>; | |
| }; | |
| mpp@a200 { | |
| reg = <0xa200 0x100>; | |
| qcom,pin-num = <0x3>; | |
| status = "disabled"; | |
| }; | |
| mpp@a300 { | |
| reg = <0xa300 0x100>; | |
| qcom,pin-num = <0x4>; | |
| qcom,mode = <0x4>; | |
| qcom,invert = <0x1>; | |
| qcom,ain-route = <0x3>; | |
| qcom,master-en = <0x1>; | |
| qcom,src-sel = <0x0>; | |
| }; | |
| }; | |
| gpios { | |
| spmi-dev-container; | |
| compatible = "qcom,qpnp-pin"; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| label = "pm8937-gpio"; | |
| linux,phandle = <0xd8>; | |
| phandle = <0xd8>; | |
| gpio@c000 { | |
| reg = <0xc000 0x100>; | |
| qcom,pin-num = <0x1>; | |
| status = "disabled"; | |
| }; | |
| gpio@c100 { | |
| reg = <0xc100 0x100>; | |
| qcom,pin-num = <0x2>; | |
| status = "disabled"; | |
| }; | |
| gpio@c200 { | |
| reg = <0xc200 0x100>; | |
| qcom,pin-num = <0x3>; | |
| status = "disabled"; | |
| }; | |
| gpio@c300 { | |
| reg = <0xc300 0x100>; | |
| qcom,pin-num = <0x4>; | |
| status = "disabled"; | |
| }; | |
| gpio@c400 { | |
| reg = <0xc400 0x100>; | |
| qcom,pin-num = <0x5>; | |
| status = "okay"; | |
| qcom,mode = <0x0>; | |
| qcom,output-type = <0x0>; | |
| qcom,pull = <0x0>; | |
| qcom,vin-sel = <0x2>; | |
| qcom,out-strength = <0x3>; | |
| qcom,src-sel = <0x0>; | |
| qcom,master-en = <0x1>; | |
| }; | |
| gpio@c500 { | |
| reg = <0xc500 0x100>; | |
| qcom,pin-num = <0x6>; | |
| status = "disabled"; | |
| }; | |
| gpio@c600 { | |
| reg = <0xc600 0x100>; | |
| qcom,pin-num = <0x7>; | |
| status = "disabled"; | |
| }; | |
| gpio@c700 { | |
| reg = <0xc700 0x100>; | |
| qcom,pin-num = <0x8>; | |
| status = "disabled"; | |
| }; | |
| }; | |
| vadc@3100 { | |
| compatible = "qcom,qpnp-vadc"; | |
| reg = <0x3100 0x100>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| interrupts = <0x0 0x31 0x0>; | |
| interrupt-names = "eoc-int-en-set"; | |
| qcom,adc-bit-resolution = <0xf>; | |
| qcom,adc-vdd-reference = <0x708>; | |
| qcom,vadc-poll-eoc; | |
| linux,phandle = <0x10f>; | |
| phandle = <0x10f>; | |
| chan@5 { | |
| label = "vcoin"; | |
| reg = <0x5>; | |
| qcom,decimation = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x1>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x0>; | |
| qcom,hw-settle-time = <0x0>; | |
| qcom,fast-avg-setup = <0x0>; | |
| }; | |
| chan@7 { | |
| label = "vph_pwr"; | |
| reg = <0x7>; | |
| qcom,decimation = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x1>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x0>; | |
| qcom,hw-settle-time = <0x0>; | |
| qcom,fast-avg-setup = <0x0>; | |
| }; | |
| chan@8 { | |
| label = "die_temp"; | |
| reg = <0x8>; | |
| qcom,decimation = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x0>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x3>; | |
| qcom,hw-settle-time = <0x0>; | |
| qcom,fast-avg-setup = <0x0>; | |
| }; | |
| chan@9 { | |
| label = "ref_625mv"; | |
| reg = <0x9>; | |
| qcom,decimation = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x0>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x0>; | |
| qcom,hw-settle-time = <0x0>; | |
| qcom,fast-avg-setup = <0x0>; | |
| }; | |
| chan@a { | |
| label = "ref_1250v"; | |
| reg = <0xa>; | |
| qcom,decimation = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x0>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x0>; | |
| qcom,hw-settle-time = <0x0>; | |
| qcom,fast-avg-setup = <0x0>; | |
| }; | |
| chan@c { | |
| label = "ref_buf_625mv"; | |
| reg = <0xc>; | |
| qcom,decimation = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x0>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x0>; | |
| qcom,hw-settle-time = <0x0>; | |
| qcom,fast-avg-setup = <0x0>; | |
| }; | |
| chan@36 { | |
| label = "pa_therm0"; | |
| reg = <0x36>; | |
| qcom,decimation = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x0>; | |
| qcom,calibration-type = "ratiometric"; | |
| qcom,scale-function = <0x2>; | |
| qcom,hw-settle-time = <0x2>; | |
| qcom,fast-avg-setup = <0x0>; | |
| }; | |
| chan@32 { | |
| label = "xo_therm"; | |
| reg = <0x32>; | |
| qcom,decimation = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x0>; | |
| qcom,calibration-type = "ratiometric"; | |
| qcom,scale-function = <0x4>; | |
| qcom,hw-settle-time = <0x2>; | |
| qcom,fast-avg-setup = <0x0>; | |
| qcom,vadc-thermal-node; | |
| }; | |
| chan@3c { | |
| label = "xo_therm_buf"; | |
| reg = <0x3c>; | |
| qcom,decimation = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x0>; | |
| qcom,calibration-type = "ratiometric"; | |
| qcom,scale-function = <0x4>; | |
| qcom,hw-settle-time = <0x2>; | |
| qcom,fast-avg-setup = <0x0>; | |
| qcom,vadc-thermal-node; | |
| }; | |
| chan@13 { | |
| label = "case_therm"; | |
| reg = <0x13>; | |
| qcom,decimation = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x0>; | |
| qcom,calibration-type = "ratiometric"; | |
| qcom,scale-function = <0x2>; | |
| qcom,hw-settle-time = <0x2>; | |
| qcom,fast-avg-setup = <0x0>; | |
| qcom,vadc-thermal-node; | |
| }; | |
| }; | |
| vadc@3400 { | |
| compatible = "qcom,qpnp-adc-tm"; | |
| reg = <0x3400 0x100>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| interrupts = <0x0 0x34 0x0 0x0 0x34 0x3 0x0 0x34 0x4>; | |
| interrupt-names = "eoc-int-en-set", "high-thr-en-set", "low-thr-en-set"; | |
| qcom,adc-bit-resolution = <0xf>; | |
| qcom,adc-vdd-reference = <0x708>; | |
| qcom,adc_tm-vadc = <0x10f>; | |
| linux,phandle = <0xf5>; | |
| phandle = <0xf5>; | |
| chan@36 { | |
| label = "pa_therm0"; | |
| reg = <0x36>; | |
| qcom,decimation = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x0>; | |
| qcom,calibration-type = "ratiometric"; | |
| qcom,scale-function = <0x2>; | |
| qcom,hw-settle-time = <0x2>; | |
| qcom,fast-avg-setup = <0x0>; | |
| qcom,btm-channel-number = <0x48>; | |
| qcom,thermal-node; | |
| }; | |
| chan@7 { | |
| label = "vph_pwr"; | |
| reg = <0x7>; | |
| qcom,decimation = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x1>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x0>; | |
| qcom,hw-settle-time = <0x0>; | |
| qcom,fast-avg-setup = <0x0>; | |
| qcom,btm-channel-number = <0x68>; | |
| }; | |
| }; | |
| }; | |
| qcom,pmi8950@2 { | |
| spmi-slave-container; | |
| reg = <0x2>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| qcom,revid@100 { | |
| compatible = "qcom,qpnp-revid"; | |
| reg = <0x100 0x100>; | |
| linux,phandle = <0x110>; | |
| phandle = <0x110>; | |
| }; | |
| qcom,power-on@800 { | |
| compatible = "qcom,qpnp-power-on"; | |
| reg = <0x800 0x100>; | |
| qcom,secondary-pon-reset; | |
| qcom,hard-reset-poweroff-type = <0x4>; | |
| qcom,pon_perph_reg { | |
| regulator-name = "pon_spare_reg"; | |
| qcom,pon-spare-reg-addr = <0x8c>; | |
| qcom,pon-spare-reg-bit = <0x1>; | |
| linux,phandle = <0x112>; | |
| phandle = <0x112>; | |
| }; | |
| }; | |
| vadc@3100 { | |
| compatible = "qcom,qpnp-vadc"; | |
| reg = <0x3100 0x100>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| interrupts = <0x2 0x31 0x0>; | |
| interrupt-names = "eoc-int-en-set"; | |
| qcom,adc-bit-resolution = <0xf>; | |
| qcom,adc-vdd-reference = <0x708>; | |
| qcom,vadc-poll-eoc; | |
| chan@0 { | |
| label = "usbin"; | |
| reg = <0x0>; | |
| qcom,decimation = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x4>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x0>; | |
| qcom,hw-settle-time = <0x0>; | |
| qcom,fast-avg-setup = <0x0>; | |
| }; | |
| chan@1 { | |
| label = "dcin"; | |
| reg = <0x1>; | |
| qcom,decimation = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x4>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x0>; | |
| qcom,hw-settle-time = <0x0>; | |
| qcom,fast-avg-setup = <0x0>; | |
| }; | |
| chan@3 { | |
| label = "vchg_sns"; | |
| reg = <0x3>; | |
| qcom,decimation = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x1>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x0>; | |
| qcom,hw-settle-time = <0x0>; | |
| qcom,fast-avg-setup = <0x0>; | |
| }; | |
| chan@9 { | |
| label = "ref_625mv"; | |
| reg = <0x9>; | |
| qcom,decimation = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x0>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x0>; | |
| qcom,hw-settle-time = <0x0>; | |
| qcom,fast-avg-setup = <0x0>; | |
| }; | |
| chan@a { | |
| label = "ref_1250v"; | |
| reg = <0xa>; | |
| qcom,decimation = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x0>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x0>; | |
| qcom,hw-settle-time = <0x0>; | |
| qcom,fast-avg-setup = <0x0>; | |
| }; | |
| chan@d { | |
| label = "chg_temp"; | |
| reg = <0xd>; | |
| qcom,decimation = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x0>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x10>; | |
| qcom,hw-settle-time = <0x0>; | |
| qcom,fast-avg-setup = <0x0>; | |
| qcom,vadc-thermal-node; | |
| }; | |
| chan@43 { | |
| label = "usb_dp"; | |
| reg = <0x43>; | |
| qcom,decimation = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x1>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x0>; | |
| qcom,hw-settle-time = <0x0>; | |
| qcom,fast-avg-setup = <0x0>; | |
| }; | |
| chan@44 { | |
| label = "usb_dm"; | |
| reg = <0x44>; | |
| qcom,decimation = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x1>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x0>; | |
| qcom,hw-settle-time = <0x0>; | |
| qcom,fast-avg-setup = <0x0>; | |
| }; | |
| }; | |
| gpios { | |
| spmi-dev-container; | |
| compatible = "qcom,qpnp-pin"; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| label = "pmi8950-gpio"; | |
| gpio@c000 { | |
| reg = <0xc000 0x100>; | |
| qcom,pin-num = <0x1>; | |
| status = "disabled"; | |
| }; | |
| gpio@c100 { | |
| reg = <0xc100 0x100>; | |
| qcom,pin-num = <0x2>; | |
| status = "disabled"; | |
| }; | |
| }; | |
| mpps { | |
| spmi-dev-container; | |
| compatible = "qcom,qpnp-pin"; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| label = "pmi8950-mpp"; | |
| mpp@a000 { | |
| reg = <0xa000 0x100>; | |
| qcom,pin-num = <0x1>; | |
| status = "disabled"; | |
| }; | |
| mpp@a100 { | |
| reg = <0xa100 0x100>; | |
| qcom,pin-num = <0x2>; | |
| status = "disabled"; | |
| }; | |
| mpp@a200 { | |
| reg = <0xa200 0x100>; | |
| qcom,pin-num = <0x3>; | |
| status = "disabled"; | |
| }; | |
| mpp@a300 { | |
| reg = <0xa300 0x100>; | |
| qcom,pin-num = <0x4>; | |
| status = "disabled"; | |
| }; | |
| }; | |
| qcom,qpnp-smbcharger { | |
| spmi-dev-container; | |
| compatible = "qcom,qpnp-smbcharger"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| qcom,iterm-ma = <0x64>; | |
| qcom,float-voltage-mv = <0x1130>; | |
| qcom,resume-delta-mv = <0xc8>; | |
| qcom,chg-inhibit-fg; | |
| qcom,rparasitic-uohm = <0x186a0>; | |
| qcom,bms-psy-name = "bms"; | |
| qcom,thermal-mitigation = <0x7d0 0x5dc 0x4b0 0x320 0x320>; | |
| qcom,parallel-usb-min-current-ma = <0x578>; | |
| qcom,parallel-usb-9v-min-current-ma = <0x384>; | |
| qcom,parallel-allowed-lowering-ma = <0x1f4>; | |
| qcom,pmic-revid = <0x110>; | |
| qcom,force-aicl-rerun; | |
| qcom,aicl-rerun-period-s = <0xb4>; | |
| qcom,autoadjust-vfloat; | |
| qcom,battery-data = <0x111>; | |
| status = "okay"; | |
| qcom,chgr@1000 { | |
| reg = <0x1000 0x100>; | |
| interrupts = <0x2 0x10 0x0 0x2 0x10 0x1 0x2 0x10 0x2 0x2 0x10 0x3 0x2 0x10 0x4 0x2 0x10 0x5 0x2 0x10 0x6 0x2 0x10 0x7>; | |
| interrupt-names = "chg-error", "chg-inhibit", "chg-prechg-sft", "chg-complete-chg-sft", "chg-p2f-thr", "chg-rechg-thr", "chg-taper-thr", "chg-tcc-thr"; | |
| }; | |
| qcom,otg@1100 { | |
| reg = <0x1100 0x100>; | |
| interrupts = <0x2 0x11 0x0 0x2 0x11 0x1 0x2 0x11 0x3>; | |
| interrupt-names = "otg-fail", "otg-oc", "usbid-change"; | |
| }; | |
| qcom,bat-if@1200 { | |
| reg = <0x1200 0x100>; | |
| interrupts = <0x2 0x12 0x0 0x2 0x12 0x1 0x2 0x12 0x2 0x2 0x12 0x3 0x2 0x12 0x4 0x2 0x12 0x5 0x2 0x12 0x6 0x2 0x12 0x7>; | |
| interrupt-names = "batt-hot", "batt-warm", "batt-cold", "batt-cool", "batt-ov", "batt-low", "batt-missing", "batt-term-missing"; | |
| }; | |
| qcom,usb-chgpth@1300 { | |
| reg = <0x1300 0x100>; | |
| interrupts = <0x2 0x13 0x0 0x2 0x13 0x1 0x2 0x13 0x2 0x2 0x13 0x5>; | |
| interrupt-names = "usbin-uv", "usbin-ov", "usbin-src-det", "aicl-done"; | |
| }; | |
| qcom,dc-chgpth@1400 { | |
| reg = <0x1400 0x100>; | |
| interrupts = <0x2 0x14 0x0 0x2 0x14 0x1>; | |
| interrupt-names = "dcin-uv", "dcin-ov"; | |
| }; | |
| qcom,chgr-misc@1600 { | |
| reg = <0x1600 0x100>; | |
| interrupts = <0x2 0x16 0x0 0x2 0x16 0x1 0x2 0x16 0x2 0x2 0x16 0x3 0x2 0x16 0x4 0x2 0x16 0x5>; | |
| interrupt-names = "power-ok", "temp-shutdown", "wdog-timeout", "flash-fail", "otst2", "otst3"; | |
| }; | |
| qcom,smbcharger-boost-otg { | |
| regulator-name = "smbcharger_charger_otg"; | |
| linux,phandle = <0xf7>; | |
| phandle = <0xf7>; | |
| }; | |
| qcom,qpnp-smbcharger { | |
| qcom,thermal-mitigation = <0x7d0 0x3e8 0x320 0x320>; | |
| }; | |
| }; | |
| qcom,fg { | |
| spmi-dev-container; | |
| compatible = "qcom,qpnp-fg"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| qcom,resume-soc = <0x63>; | |
| status = "okay"; | |
| qcom,bcl-lm-threshold-ma = <0x7f>; | |
| qcom,bcl-mh-threshold-ma = <0x195>; | |
| qcom,fg-iterm-ma = <0xc8>; | |
| qcom,fg-chg-iterm-ma = <0x96>; | |
| qcom,pmic-revid = <0x110>; | |
| qcom,fg-cutoff-voltage-mv = <0xdac>; | |
| qcom,cycle-counter-en; | |
| qcom,capacity-learning-on; | |
| qcom,fg-cc-cv-threshold-mv = <0x1126>; | |
| qcom,battery-data = <0x111>; | |
| qcom,cold-bat-decidegc = <0x0>; | |
| qcom,cool-bat-decidegc = <0x64>; | |
| qcom,hot-bat-decidegc = <0x258>; | |
| qcom,warm-bat-decidegc = <0x1c2>; | |
| qcom,warm-bat-india-decidegc = <0x1f4>; | |
| qcom,cl-max-increment-deciperc = <0x1>; | |
| qcom,cl-max-decrement-deciperc = <0x1>; | |
| qcom,fg-delta-soc = <0x1>; | |
| qcom,bad-battery-detection-enable; | |
| qcom,hold-soc-while-full; | |
| qcom,fg-soc@4000 { | |
| status = "okay"; | |
| reg = <0x4000 0x100>; | |
| interrupts = <0x2 0x40 0x0 0x2 0x40 0x1 0x2 0x40 0x2 0x2 0x40 0x3 0x2 0x40 0x4 0x2 0x40 0x5 0x2 0x40 0x6>; | |
| interrupt-names = "high-soc", "low-soc", "full-soc", "empty-soc", "delta-soc", "first-est-done", "update-soc"; | |
| }; | |
| qcom,fg-batt@4100 { | |
| reg = <0x4100 0x100>; | |
| interrupts = <0x2 0x41 0x0 0x2 0x41 0x1 0x2 0x41 0x2 0x2 0x41 0x3 0x2 0x41 0x4 0x2 0x41 0x5 0x2 0x41 0x6 0x2 0x41 0x7>; | |
| interrupt-names = "soft-cold", "soft-hot", "vbatt-low", "batt-ided", "batt-id-req", "batt-unknown", "batt-missing", "batt-match"; | |
| }; | |
| qcom,revid-tp-rev@1f1 { | |
| reg = <0x1f1 0x1>; | |
| }; | |
| qcom,fg-memif@4400 { | |
| status = "okay"; | |
| reg = <0x4400 0x100>; | |
| interrupts = <0x2 0x44 0x0 0x2 0x44 0x2>; | |
| interrupt-names = "mem-avail", "data-rcvry-sug"; | |
| }; | |
| }; | |
| bcl@4200 { | |
| compatible = "qcom,msm-bcl"; | |
| reg = <0x4200 0xff 0x88e 0x2>; | |
| reg-names = "fg_user_adc", "pon_spare"; | |
| interrupts = <0x2 0x42 0x0 0x2 0x42 0x1>; | |
| interrupt-names = "bcl-high-ibat-int", "bcl-low-vbat-int"; | |
| qcom,vbat-scaling-factor = <0x9858>; | |
| qcom,vbat-gain-numerator = <0x1>; | |
| qcom,vbat-gain-denominator = <0x80>; | |
| qcom,vbat-polling-delay-ms = <0x64>; | |
| qcom,ibat-scaling-factor = <0x9858>; | |
| qcom,ibat-gain-numerator = <0x1>; | |
| qcom,ibat-gain-denominator = <0x80>; | |
| qcom,ibat-offset-numerator = <0x4b0>; | |
| qcom,ibat-offset-denominator = <0x1>; | |
| qcom,ibat-polling-delay-ms = <0x64>; | |
| qcom,inhibit-derating-ua = <0x86470>; | |
| }; | |
| qcom,leds@a100 { | |
| compatible = "qcom,leds-qpnp"; | |
| reg = <0xa100 0x100>; | |
| label = "mpp"; | |
| }; | |
| }; | |
| qcom,pmi8950@3 { | |
| spmi-slave-container; | |
| reg = <0x3>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| pwm@b000 { | |
| status = "disabled"; | |
| compatible = "qcom,qpnp-pwm"; | |
| reg = <0xb000 0x100>; | |
| reg-names = "qpnp-lpg-channel-base"; | |
| qcom,channel-id = <0x0>; | |
| qcom,supported-sizes = <0x6 0x9>; | |
| #pwm-cells = <0x2>; | |
| }; | |
| qpnp-labibb-regulator { | |
| status = "disabled"; | |
| spmi-dev-container; | |
| compatible = "qcom,qpnp-labibb-regulator"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| qcom,pmic-revid = <0x110>; | |
| qcom,ibb@dc00 { | |
| reg = <0xdc00 0x100>; | |
| reg-names = "ibb_reg"; | |
| regulator-name = "ibb_reg"; | |
| regulator-min-microvolt = <0x4630c0>; | |
| regulator-max-microvolt = <0x5b8d80>; | |
| qcom,qpnp-ibb-min-voltage = <0x155cc0>; | |
| qcom,qpnp-ibb-step-size = <0x186a0>; | |
| qcom,qpnp-ibb-slew-rate = <0x1e8480>; | |
| qcom,qpnp-ibb-init-voltage = <0x53ec60>; | |
| qcom,qpnp-ibb-init-amoled-voltage = <0x3d0900>; | |
| qcom,qpnp-ibb-init-lcd-voltage = <0x4c4b40>; | |
| qcom,qpnp-ibb-soft-start = <0x3e8>; | |
| qcom,qpnp-ibb-discharge-resistor = <0x20>; | |
| qcom,qpnp-ibb-lab-pwrup-delay = <0x1f40>; | |
| qcom,qpnp-ibb-lab-pwrdn-delay = <0x1f40>; | |
| qcom,qpnp-ibb-en-discharge; | |
| qcom,qpnp-ibb-full-pull-down; | |
| qcom,qpnp-ibb-pull-down-enable; | |
| qcom,qpnp-ibb-switching-clock-frequency = <0x5c8>; | |
| qcom,qpnp-ibb-limit-maximum-current = <0x60e>; | |
| qcom,qpnp-ibb-debounce-cycle = <0x10>; | |
| qcom,qpnp-ibb-limit-max-current-enable; | |
| qcom,qpnp-ibb-ps-enable; | |
| }; | |
| qcom,lab@de00 { | |
| reg = <0xde00 0x100>; | |
| reg-names = "lab"; | |
| regulator-name = "lab_reg"; | |
| regulator-min-microvolt = <0x4630c0>; | |
| regulator-max-microvolt = <0x5b8d80>; | |
| qcom,qpnp-lab-min-voltage = <0x4630c0>; | |
| qcom,qpnp-lab-step-size = <0x186a0>; | |
| qcom,qpnp-lab-slew-rate = <0x1388>; | |
| qcom,qpnp-lab-use-default-voltage; | |
| qcom,qpnp-lab-init-voltage = <0x53ec60>; | |
| qcom,qpnp-lab-init-amoled-voltage = <0x4630c0>; | |
| qcom,qpnp-lab-init-lcd-voltage = <0x53ec60>; | |
| qcom,qpnp-lab-soft-start = <0x320>; | |
| qcom,qpnp-lab-full-pull-down; | |
| qcom,qpnp-lab-pull-down-enable; | |
| qcom,qpnp-lab-switching-clock-frequency = <0x640>; | |
| qcom,qpnp-lab-limit-maximum-current = <0x320>; | |
| qcom,qpnp-lab-limit-max-current-enable; | |
| qcom,qpnp-lab-ps-threshold = <0x28>; | |
| qcom,qpnp-lab-ps-enable; | |
| qcom,qpnp-lab-nfet-size = <0x64>; | |
| qcom,qpnp-lab-pfet-size = <0x64>; | |
| qcom,qpnp-lab-max-precharge-time = <0x1f4>; | |
| qcom,qpnp-ibb-init-lcd-voltage = <0x4c4b40>; | |
| }; | |
| }; | |
| qcom,leds@d800 { | |
| compatible = "qcom,qpnp-wled"; | |
| reg = <0xd800 0x100 0xd900 0x100 0xdc00 0x100 0xde00 0x100>; | |
| reg-names = "qpnp-wled-ctrl-base", "qpnp-wled-sink-base", "qpnp-wled-ibb-base", "qpnp-wled-lab-base"; | |
| interrupts = <0x3 0xd8 0x2>; | |
| interrupt-names = "sc-irq"; | |
| status = "okay"; | |
| linux,name = "wled"; | |
| linux,default-trigger = "bkl-trigger"; | |
| qcom,fdbk-output = "auto"; | |
| qcom,vref-mv = <0x15e>; | |
| qcom,switch-freq-khz = <0x320>; | |
| qcom,ovp-mv = <0x733c>; | |
| qcom,ilim-ma = <0x3d4>; | |
| qcom,boost-duty-ns = <0x1a>; | |
| qcom,mod-freq-khz = <0x2580>; | |
| qcom,dim-mode = "hybrid"; | |
| qcom,dim-method = "linear"; | |
| qcom,hyb-thres = <0x271>; | |
| qcom,sync-dly-us = <0x320>; | |
| qcom,fs-curr-ua = <0x4e20>; | |
| qcom,led-strings-list = [00 01]; | |
| qcom,en-ext-pfet-sc-pro; | |
| qcom,cons-sync-write-delay-us = <0x3e8>; | |
| }; | |
| qcom,leds@d300 { | |
| compatible = "qcom,qpnp-flash-led"; | |
| status = "okay"; | |
| reg = <0xd300 0x100>; | |
| label = "flash"; | |
| qcom,headroom = <0x1f4>; | |
| qcom,startup-dly = <0x80>; | |
| qcom,clamp-curr = <0xc8>; | |
| qcom,pmic-charger-support; | |
| qcom,self-check-enabled; | |
| qcom,thermal-derate-enabled; | |
| qcom,thermal-derate-threshold = <0x64>; | |
| qcom,thermal-derate-rate = "5_PERCENT"; | |
| qcom,current-ramp-enabled; | |
| qcom,ramp_up_step = "6P7_US"; | |
| qcom,ramp_dn_step = "6P7_US"; | |
| qcom,vph-pwr-droop-enabled; | |
| qcom,vph-pwr-droop-threshold = <0xbb8>; | |
| qcom,vph-pwr-droop-debounce-time = <0xa>; | |
| qcom,headroom-sense-ch0-enabled; | |
| qcom,headroom-sense-ch1-enabled; | |
| qcom,pmic-revid = <0x110>; | |
| qcom,flash_0 { | |
| label = "flash"; | |
| qcom,led-name = "led:flash_0"; | |
| qcom,default-led-trigger = "flash0_trigger"; | |
| qcom,max-current = <0x3e8>; | |
| qcom,duration = <0x500>; | |
| qcom,id = <0x0>; | |
| qcom,current = <0x253>; | |
| linux,phandle = <0x194>; | |
| phandle = <0x194>; | |
| }; | |
| qcom,flash_1 { | |
| label = "flash"; | |
| qcom,led-name = "led:flash_1"; | |
| qcom,default-led-trigger = "flash1_trigger"; | |
| qcom,max-current = <0x3e8>; | |
| qcom,duration = <0x500>; | |
| qcom,id = <0x1>; | |
| qcom,current = <0x253>; | |
| linux,phandle = <0x195>; | |
| phandle = <0x195>; | |
| }; | |
| qcom,torch_0 { | |
| label = "torch"; | |
| qcom,led-name = "led:torch_0"; | |
| qcom,default-led-trigger = "torch0_trigger"; | |
| qcom,max-current = <0xc8>; | |
| qcom,id = <0x0>; | |
| qcom,current = <0x64>; | |
| linux,phandle = <0x196>; | |
| phandle = <0x196>; | |
| }; | |
| qcom,torch_1 { | |
| label = "torch"; | |
| qcom,led-name = "led:torch_1"; | |
| qcom,default-led-trigger = "torch1_trigger"; | |
| qcom,max-current = <0xc8>; | |
| qcom,id = <0x1>; | |
| qcom,current = <0x64>; | |
| linux,phandle = <0x197>; | |
| phandle = <0x197>; | |
| }; | |
| qcom,torch_2 { | |
| label = "torch"; | |
| qcom,led-name = "flashlight"; | |
| qcom,default-led-trigger = "torch2_trigger"; | |
| qcom,max-current = <0xc8>; | |
| qcom,id = <0x1>; | |
| qcom,current = <0x64>; | |
| }; | |
| qcom,switch { | |
| label = "switch"; | |
| qcom,led-name = "led:switch"; | |
| qcom,default-led-trigger = "switch_trigger"; | |
| qcom,max-current = <0x3e8>; | |
| qcom,duration = <0x500>; | |
| qcom,id = <0x2>; | |
| qcom,current = <0x271>; | |
| linux,phandle = <0x198>; | |
| phandle = <0x198>; | |
| reg0 { | |
| regulator-name = "pon_spare_reg"; | |
| }; | |
| }; | |
| }; | |
| qcom,haptic@c000 { | |
| compatible = "qcom,qpnp-haptic"; | |
| reg = <0xc000 0x100>; | |
| interrupts = <0x3 0xc0 0x0 0x3 0xc0 0x1>; | |
| interrupt-names = "sc-irq", "play-irq"; | |
| qcom,pmic-revid = <0x110>; | |
| vcc_pon-supply = <0x112>; | |
| qcom,play-mode = "direct"; | |
| qcom,wave-play-rate-us = <0x148f>; | |
| qcom,actuator-type = "erm"; | |
| qcom,wave-shape = "square"; | |
| qcom,vmax-mv = <0xa8c>; | |
| qcom,ilim-ma = <0x320>; | |
| qcom,sc-deb-cycles = <0x8>; | |
| qcom,int-pwm-freq-khz = <0x1f9>; | |
| qcom,en-brake; | |
| qcom,brake-pattern = <0x3030000>; | |
| qcom,use-play-irq; | |
| qcom,use-sc-irq; | |
| qcom,wave-samples = <0x3e3e3e3e 0x3e3e3e3e>; | |
| qcom,wave-rep-cnt = <0x1>; | |
| qcom,wave-samp-rep-cnt = <0x1>; | |
| }; | |
| }; | |
| }; | |
| qcom,inrush-current { | |
| compatible = "qcom,msm-inrush-current-mitigation"; | |
| qcom,dependent-subsystems = "modem", "adsp"; | |
| vdd-supply = <0x113>; | |
| }; | |
| qcom,mss@4080000 { | |
| compatible = "qcom,pil-q6v55-mss"; | |
| reg = <0x4080000 0x100 0x194f000 0x10 0x1950000 0x8 0x1951000 0x8 0x4020000 0x40 0x1871000 0x4>; | |
| reg-names = "qdsp6_base", "halt_q6", "halt_modem", "halt_nc", "rmb_base", "restart_reg"; | |
| interrupts = <0x0 0x18 0x1>; | |
| vdd_mss-supply = <0x114>; | |
| vdd_cx-supply = <0xe1>; | |
| vdd_cx-voltage = <0x180>; | |
| vdd_mx-supply = <0xed>; | |
| vdd_mx-uV = <0x180>; | |
| vdd_pll-supply = <0xee>; | |
| qcom,vdd_pll = <0x1b7740>; | |
| clocks = <0x2b 0xe97a8354 0x2b 0x111cde81 0x2b 0x67544d62 0x2b 0xde2adeb1>; | |
| clock-names = "xo", "iface_clk", "bus_clk", "mem_clk"; | |
| qcom,proxy-clock-names = "xo"; | |
| qcom,active-clock-names = "iface_clk", "bus_clk", "mem_clk"; | |
| qcom,pas-id = <0x5>; | |
| qcom,pil-mss-memsetup; | |
| qcom,firmware-name = "modem"; | |
| qcom,pil-self-auth; | |
| qcom,override-acc-1 = <0x80800000>; | |
| qcom,sysmon-id = <0x0>; | |
| qcom,ssctl-instance-id = <0x12>; | |
| qcom,qdsp6v56-1-8-inrush-current; | |
| qcom,gpio-err-fatal = <0x115 0x0 0x0>; | |
| qcom,gpio-err-ready = <0x115 0x1 0x0>; | |
| qcom,gpio-proxy-unvote = <0x115 0x2 0x0>; | |
| qcom,gpio-stop-ack = <0x115 0x3 0x0>; | |
| qcom,gpio-shutdown-ack = <0x115 0x7 0x0>; | |
| qcom,gpio-force-stop = <0x116 0x0 0x0>; | |
| memory-region = <0x117>; | |
| }; | |
| qcom,memshare { | |
| compatible = "qcom,memshare"; | |
| qcom,client_1 { | |
| compatible = "qcom,memshare-peripheral"; | |
| qcom,peripheral-size = <0x200000>; | |
| qcom,client-id = <0x0>; | |
| qcom,allocate-boot-time; | |
| label = "modem"; | |
| }; | |
| qcom,client_2 { | |
| compatible = "qcom,memshare-peripheral"; | |
| qcom,peripheral-size = <0x300000>; | |
| qcom,client-id = <0x2>; | |
| label = "modem"; | |
| }; | |
| qcom,client_3 { | |
| compatible = "qcom,memshare-peripheral"; | |
| qcom,peripheral-size = <0x0>; | |
| qcom,client-id = <0x1>; | |
| label = "modem"; | |
| }; | |
| }; | |
| qcom,lpass@c200000 { | |
| compatible = "qcom,pil-tz-generic"; | |
| reg = <0xc200000 0x100>; | |
| interrupts = <0x0 0x125 0x1>; | |
| vdd_cx-supply = <0xe1>; | |
| qcom,proxy-reg-names = "vdd_cx"; | |
| qcom,vdd_cx-uV-uA = <0x180 0x186a0>; | |
| clocks = <0x2b 0xb72aa4c9 0x2b 0xd390d2 0x2b 0x94de4919 0x2b 0xd4415c9b 0x2b 0x37a21414>; | |
| clock-names = "xo", "scm_core_clk", "scm_iface_clk", "scm_bus_clk", "scm_core_clk_src"; | |
| qcom,proxy-clock-names = "xo", "scm_core_clk", "scm_iface_clk", "scm_bus_clk", "scm_core_clk_src"; | |
| qcom,scm_core_clk_src-freq = <0x4c4b400>; | |
| qcom,pas-id = <0x1>; | |
| qcom,proxy-timeout-ms = <0x2710>; | |
| qcom,smem-id = <0x1a7>; | |
| qcom,sysmon-id = <0x1>; | |
| qcom,ssctl-instance-id = <0x14>; | |
| qcom,firmware-name = "adsp"; | |
| qcom,gpio-err-fatal = <0x118 0x0 0x0>; | |
| qcom,gpio-proxy-unvote = <0x118 0x2 0x0>; | |
| qcom,gpio-err-ready = <0x118 0x1 0x0>; | |
| qcom,gpio-stop-ack = <0x118 0x3 0x0>; | |
| qcom,gpio-force-stop = <0x119 0x0 0x0>; | |
| memory-region = <0x11a>; | |
| }; | |
| qcom,pronto@a21b000 { | |
| compatible = "qcom,pil-tz-generic"; | |
| reg = <0xa21b000 0x3000>; | |
| interrupts = <0x0 0x95 0x1>; | |
| vdd_pronto_pll-supply = <0xee>; | |
| proxy-reg-names = "vdd_pronto_pll"; | |
| vdd_pronto_pll-uV-uA = <0x1b7740 0x4650>; | |
| clocks = <0x2b 0x89dae6d0 0x2b 0xd390d2 0x2b 0x94de4919 0x2b 0xd4415c9b 0x2b 0x37a21414>; | |
| clock-names = "xo", "scm_core_clk", "scm_iface_clk", "scm_bus_clk", "scm_core_clk_src"; | |
| qcom,proxy-clock-names = "xo", "scm_core_clk", "scm_iface_clk", "scm_bus_clk", "scm_core_clk_src"; | |
| qcom,scm_core_clk_src = <0x4c4b400>; | |
| qcom,pas-id = <0x6>; | |
| qcom,proxy-timeout-ms = <0x2710>; | |
| qcom,smem-id = <0x1a6>; | |
| qcom,sysmon-id = <0x6>; | |
| qcom,ssctl-instance-id = <0x13>; | |
| qcom,firmware-name = "wcnss"; | |
| qcom,gpio-err-fatal = <0x11b 0x0 0x0>; | |
| qcom,gpio-err-ready = <0x11b 0x1 0x0>; | |
| qcom,gpio-proxy-unvote = <0x11b 0x2 0x0>; | |
| qcom,gpio-stop-ack = <0x11b 0x3 0x0>; | |
| qcom,gpio-force-stop = <0x11c 0x0 0x0>; | |
| memory-region = <0x11d>; | |
| }; | |
| qcom,venus@1de0000 { | |
| compatible = "qcom,pil-tz-generic"; | |
| reg = <0x1de0000 0x4000>; | |
| vdd-supply = <0xac>; | |
| qcom,proxy-reg-names = "vdd"; | |
| clocks = <0x2b 0xf76a02bb 0x2b 0x8d778c6 0x2b 0xcdf4c8f6 0x2b 0xd390d2 0x2b 0x94de4919 0x2b 0xd4415c9b 0x2b 0x37a21414>; | |
| clock-names = "core_clk", "iface_clk", "bus_clk", "scm_core_clk", "scm_iface_clk", "scm_bus_clk", "scm_core_clk_src"; | |
| qcom,proxy-clock-names = "core_clk", "iface_clk", "bus_clk", "scm_core_clk", "scm_iface_clk", "scm_bus_clk", "scm_core_clk_src"; | |
| qcom,scm_core_clk_src-freq = <0x4c4b400>; | |
| qcom,msm-bus,name = "pil-venus"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0x3f 0x200 0x0 0x0 0x3f 0x200 0x0 0x4a380>; | |
| qcom,pas-id = <0x9>; | |
| qcom,proxy-timeout-ms = <0x64>; | |
| qcom,firmware-name = "venus"; | |
| memory-region = <0x11e>; | |
| }; | |
| qcom,msm-ssc-sensors { | |
| compatible = "qcom,msm-ssc-sensors"; | |
| }; | |
| regulator@01946004 { | |
| compatible = "qcom,mem-acc-regulator"; | |
| regulator-name = "mem_acc_corner"; | |
| regulator-min-microvolt = <0x1>; | |
| regulator-max-microvolt = <0x3>; | |
| qcom,acc-reg-addr-list = <0x1942138 0x1942130 0x1942120 0x1942124 0x1946000 0x1946004>; | |
| qcom,acc-init-reg-config = <0x1 0xff 0x2 0x5555 0x6 0x55>; | |
| qcom,num-acc-corners = <0x3>; | |
| qcom,boot-acc-corner = <0x2>; | |
| qcom,corner1-reg-config = <0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0x3 0x1041041 0x4 0x1041 0x5 0x2020202 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0x3 0x1041041 0x4 0x1041 0x5 0x2020202 0x3 0x0 0x4 0x0 0x5 0x0>; | |
| qcom,corner2-reg-config = <0x3 0x30c30c3 0x4 0x30c3 0x5 0x6060606 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0x3 0x0 0x4 0x0 0x5 0x0>; | |
| qcom,corner3-reg-config = <0x3 0x1041041 0x4 0x1041 0x5 0x2020202 0x3 0x30c30c3 0x4 0x30c3 0x5 0x6060606 0x3 0x1041041 0x4 0x1041 0x5 0x2020202 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff>; | |
| linux,phandle = <0x120>; | |
| phandle = <0x120>; | |
| }; | |
| regulator@b018000 { | |
| compatible = "qcom,cpr-regulator"; | |
| reg = <0xb018000 0x1000 0xb011064 0x4 0xa4000 0x1000>; | |
| reg-names = "rbcpr", "rbcpr_clk", "efuse_addr"; | |
| interrupts = <0x0 0xf 0x0>; | |
| regulator-name = "apc_corner"; | |
| regulator-min-microvolt = <0x1>; | |
| regulator-max-microvolt = <0x7>; | |
| qcom,cpr-fuse-corners = <0x3>; | |
| qcom,cpr-voltage-ceiling = <0x119fb8 0x12b128 0x149970>; | |
| qcom,cpr-voltage-floor = <0x118c30 0x118c30 0x1312d0>; | |
| vdd-apc-supply = <0x11f>; | |
| mem-acc-supply = <0x120>; | |
| qcom,cpr-ref-clk = <0x4b00>; | |
| qcom,cpr-timer-delay = <0x1388>; | |
| qcom,cpr-timer-cons-up = <0x0>; | |
| qcom,cpr-timer-cons-down = <0x2>; | |
| qcom,cpr-irq-line = <0x0>; | |
| qcom,cpr-step-quotient = <0xa>; | |
| qcom,cpr-up-threshold = <0x2>; | |
| qcom,cpr-down-threshold = <0x4>; | |
| qcom,cpr-idle-clocks = <0xf>; | |
| qcom,cpr-gcnt-time = <0x1>; | |
| qcom,vdd-apc-step-up-limit = <0x1>; | |
| qcom,vdd-apc-step-down-limit = <0x1>; | |
| qcom,cpr-apc-volt-step = <0x1388>; | |
| qcom,cpr-fuse-row = <0x43 0x0>; | |
| qcom,cpr-fuse-target-quot = <0x2a 0x18 0x6>; | |
| qcom,cpr-fuse-ro-sel = <0x3c 0x39 0x36>; | |
| qcom,cpr-init-voltage-ref = <0x119fb8 0x12b128 0x149970>; | |
| qcom,cpr-fuse-init-voltage = <0x43 0x24 0x6 0x0 0x43 0x12 0x6 0x0 0x43 0x0 0x6 0x0>; | |
| qcom,cpr-fuse-quot-offset = <0x47 0x1a 0x6 0x0 0x47 0x14 0x6 0x0 0x46 0x36 0x7 0x0>; | |
| qcom,cpr-fuse-quot-offset-scale = <0x5 0x5 0x5>; | |
| qcom,cpr-init-voltage-step = <0x2710>; | |
| qcom,cpr-corner-map = <0x1 0x2 0x3 0x3 0x3 0x3 0x3>; | |
| qcom,cpr-corner-frequency-map = <0x1 0x39387000 0x2 0x413b3800 0x3 0x48190800 0x4 0x4a62f800 0x5 0x501bd000 0x6 0x53819040 0x7 0x59439000>; | |
| qcom,speed-bin-fuse-sel = <0x25 0x22 0x3 0x0>; | |
| qcom,cpr-speed-bin-max-corners = <0x0 0x0 0x1 0x2 0x6 0x1 0x0 0x1 0x2 0x7 0x2 0x0 0x1 0x2 0x3>; | |
| qcom,cpr-fuse-revision = <0x45 0x27 0x3 0x0>; | |
| qcom,cpr-quot-adjust-scaling-factor-max = <0x0 0x578 0x578>; | |
| qcom,cpr-voltage-scaling-factor-max = <0x0 0x7d0 0x7d0>; | |
| qcom,cpr-scaled-init-voltage-as-ceiling; | |
| qcom,cpr-fuse-version-map = <0x0 0xffffffff 0x1 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0x2 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0x3 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff>; | |
| qcom,cpr-quotient-adjustment = <0xffffffec 0xffffffd8 0xffffffec 0x0 0xffffffd8 0x14 0x0 0x0 0x14 0x0 0x0 0x0>; | |
| qcom,cpr-init-voltage-adjustment = <0x0 0x0 0x0 0x2710 0x3a98 0x4e20 0x0 0x0 0x0 0x0 0x0 0x0>; | |
| qcom,cpr-enable; | |
| linux,phandle = <0xe6>; | |
| phandle = <0xe6>; | |
| }; | |
| eldo2 { | |
| compatible = "regulator-fixed"; | |
| regulator-name = "eldo2_pm8937"; | |
| startup-delay-us = <0x0>; | |
| enable-active-high; | |
| gpio = <0xd8 0x7 0x0>; | |
| regulator-always-on; | |
| linux,phandle = <0xb5>; | |
| phandle = <0xb5>; | |
| }; | |
| adv_vreg { | |
| compatible = "regulator-fixed"; | |
| regulator-name = "adv_vreg"; | |
| startup-delay-us = <0x190>; | |
| enable-active-high; | |
| gpio = <0xd8 0x8 0x0>; | |
| linux,phandle = <0xc6>; | |
| phandle = <0xc6>; | |
| }; | |
| qcom,gdsc@184c018 { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_venus"; | |
| reg = <0x184c018 0x4>; | |
| status = "okay"; | |
| clock-names = "bus_clk", "core_clk"; | |
| clocks = <0x2b 0xcdf4c8f6 0x2b 0xf76a02bb>; | |
| linux,phandle = <0xac>; | |
| phandle = <0xac>; | |
| }; | |
| qcom,gdsc@184d078 { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_mdss"; | |
| reg = <0x184d078 0x4>; | |
| status = "okay"; | |
| clock-names = "core_clk", "bus_clk"; | |
| clocks = <0x2b 0x22f3521f 0x2b 0x668f51de>; | |
| qcom,disallow-clear; | |
| linux,phandle = <0x113>; | |
| phandle = <0x113>; | |
| }; | |
| qcom,gdsc@185701c { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_jpeg"; | |
| reg = <0x185701c 0x4>; | |
| status = "okay"; | |
| clock-names = "core_clk", "bus_clk"; | |
| clocks = <0x2b 0x1ed3f032 0x2b 0x3e278896>; | |
| linux,phandle = <0x124>; | |
| phandle = <0x124>; | |
| }; | |
| qcom,gdsc@1858034 { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_vfe"; | |
| reg = <0x1858034 0x4>; | |
| status = "okay"; | |
| clock-names = "core_clk", "bus_clk", "micro_clk", "csi_clk"; | |
| clocks = <0x2b 0xaaa3cd97 0x2b 0x77fe2384 0x2b 0xfbbee8cf 0x2b 0xcc73453c>; | |
| linux,phandle = <0x121>; | |
| phandle = <0x121>; | |
| }; | |
| qcom,gdsc@185806c { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_vfe1"; | |
| reg = <0x185806c 0x4>; | |
| status = "okay"; | |
| clock-names = "core_clk", "bus_clk", "micro_clk", "csi_clk"; | |
| clocks = <0x2b 0xcaf20d99 0x2b 0xaf7463b3 0x2b 0xfbbee8cf 0x2b 0xb1ef6e8b>; | |
| linux,phandle = <0x122>; | |
| phandle = <0x122>; | |
| }; | |
| qcom,gdsc@1858078 { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_cpp"; | |
| reg = <0x1858078 0x4>; | |
| status = "okay"; | |
| clock-names = "core_clk", "bus_clk"; | |
| clocks = <0x2b 0x7118a0de 0x2b 0xbbf73861>; | |
| linux,phandle = <0x125>; | |
| phandle = <0x125>; | |
| }; | |
| qcom,gdsc@185901c { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_oxili_gx"; | |
| reg = <0x185901c 0x4>; | |
| status = "okay"; | |
| clock-names = "core_root_clk"; | |
| clocks = <0x2b 0x917f76ef>; | |
| qcom,enable-root-clk; | |
| qcom,clk-dis-wait-val = <0x5>; | |
| linux,phandle = <0x2e>; | |
| phandle = <0x2e>; | |
| }; | |
| qcom,gdsc@184c028 { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_venus_core0"; | |
| reg = <0x184c028 0x4>; | |
| status = "okay"; | |
| qcom,support-hw-trigger; | |
| clock-names = "core0_clk"; | |
| clocks = <0x2b 0x83a7f549>; | |
| linux,phandle = <0xad>; | |
| phandle = <0xad>; | |
| }; | |
| qcom,gdsc@184c030 { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_venus_core1"; | |
| reg = <0x184c030 0x4>; | |
| status = "disabled"; | |
| }; | |
| qcom,gdsc@185904c { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_oxili_cx"; | |
| reg = <0x1859044 0x4>; | |
| status = "okay"; | |
| clock-names = "core_clk"; | |
| clocks = <0x2b 0x49a51fd9>; | |
| linux,phandle = <0x2d>; | |
| phandle = <0x2d>; | |
| }; | |
| qcom,gdsc@183f078 { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_usb30"; | |
| reg = <0x183f078 0x4>; | |
| status = "disabled"; | |
| }; | |
| qcom,msm-cam@1b00000 { | |
| compatible = "qcom,msm-cam"; | |
| reg = <0x1b00000 0x40000>; | |
| reg-names = "msm-cam"; | |
| status = "ok"; | |
| bus-vectors = "suspend", "svs", "nominal", "turbo"; | |
| qcom,bus-votes = <0x0 0x9896800 0x1312d000 0x1312d000>; | |
| }; | |
| qcom,csiphy@1b34000 { | |
| status = "ok"; | |
| cell-index = <0x0>; | |
| compatible = "qcom,csiphy-v3.4.2", "qcom,csiphy"; | |
| reg = <0x1b34000 0x1000 0x1b00030 0x4>; | |
| reg-names = "csiphy", "csiphy_clk_mux"; | |
| interrupts = <0x0 0x4e 0x0>; | |
| interrupt-names = "csiphy"; | |
| clocks = <0x2b 0x4e814a78 0x2b 0x3c0a858f 0x2b 0xc8a309be 0x2b 0xf8897589 0x2b 0xf92304fb 0x2b 0x6a41ff7 0x2b 0x9894b414>; | |
| clock-names = "camss_top_ahb_clk", "ispif_ahb_clk", "csiphy_timer_src_clk", "csiphy_timer_clk", "camss_ahb_src", "csi_phy_clk", "camss_ahb_clk"; | |
| qcom,clock-rates = <0x0 0x3ab06a0 0xbebc200 0x0 0x0 0x0 0x0>; | |
| }; | |
| qcom,csiphy@1b35000 { | |
| status = "ok"; | |
| cell-index = <0x1>; | |
| compatible = "qcom,csiphy-v3.4.2", "qcom,csiphy"; | |
| reg = <0x1b35000 0x1000 0x1b00038 0x4>; | |
| reg-names = "csiphy", "csiphy_clk_mux"; | |
| interrupts = <0x0 0x4f 0x0>; | |
| interrupt-names = "csiphy"; | |
| clocks = <0x2b 0x4e814a78 0x2b 0x3c0a858f 0x2b 0x7c0fe23a 0x2b 0x4d26438f 0x2b 0xf92304fb 0x2b 0xfd1d1fa 0x2b 0x9894b414>; | |
| clock-names = "camss_top_ahb_clk", "ispif_ahb_clk", "csiphy_timer_src_clk", "csiphy_timer_clk", "camss_ahb_src", "csi_phy_clk", "camss_ahb_clk"; | |
| qcom,clock-rates = <0x0 0x3ab06a0 0xbebc200 0x0 0x0 0x0 0x0>; | |
| }; | |
| qcom,csid@1b30000 { | |
| status = "ok"; | |
| cell-index = <0x0>; | |
| compatible = "qcom,csid-v3.4.2", "qcom,csid"; | |
| reg = <0x1b30000 0x400>; | |
| reg-names = "csid"; | |
| interrupts = <0x0 0x33 0x0>; | |
| interrupt-names = "csid"; | |
| qcom,csi-vdd-voltage = <0x124f80>; | |
| qcom,mipi-csi-vdd-supply = <0xf6>; | |
| clocks = <0x2b 0x4e814a78 0x2b 0x3c0a858f 0x2b 0x175d672a 0x2b 0x227e65bc 0x2b 0x6b01b3e1 0x2b 0x61a8a930 0x2b 0x7053c7ae 0x2b 0x9894b414>; | |
| clock-names = "camss_top_ahb_clk", "ispif_ahb_clk", "csi_ahb_clk", "csi_src_clk", "csi_clk", "csi_pix_clk", "csi_rdi_clk", "camss_ahb_clk"; | |
| qcom,clock-rates = <0x0 0x3ab06a0 0x0 0xbebc200 0x0 0x0 0x0 0x0>; | |
| }; | |
| qcom,csid@1b30400 { | |
| status = "ok"; | |
| cell-index = <0x1>; | |
| compatible = "qcom,csid-v3.4.2", "qcom,csid"; | |
| reg = <0x1b30400 0x400>; | |
| reg-names = "csid"; | |
| interrupts = <0x0 0x34 0x0>; | |
| interrupt-names = "csid"; | |
| qcom,csi-vdd-voltage = <0x124f80>; | |
| qcom,mipi-csi-vdd-supply = <0xf6>; | |
| clocks = <0x2b 0x4e814a78 0x2b 0x3c0a858f 0x2b 0x2c2dc261 0x2b 0x6a2a6c36 0x2b 0x1aba4a8c 0x2b 0x87fc98d8 0x2b 0x6ac996fe 0x2b 0x9894b414>; | |
| clock-names = "camss_top_ahb_clk", "ispif_ahb_clk", "csi_ahb_clk", "csi_src_clk", "csi_clk", "csi_pix_clk", "csi_rdi_clk", "camss_ahb_clk"; | |
| qcom,clock-rates = <0x0 0x3ab06a0 0x0 0xbebc200 0x0 0x0 0x0 0x0>; | |
| }; | |
| qcom,csid@1b30800 { | |
| status = "ok"; | |
| cell-index = <0x2>; | |
| compatible = "qcom,csid-v3.4.2", "qcom,csid"; | |
| reg = <0x1b30800 0x400>; | |
| reg-names = "csid"; | |
| interrupts = <0x0 0x99 0x0>; | |
| interrupt-names = "csid"; | |
| qcom,csi-vdd-voltage = <0x124f80>; | |
| qcom,mipi-csi-vdd-supply = <0xf6>; | |
| clocks = <0x2b 0x4e814a78 0x2b 0x3c0a858f 0x2b 0xf3f25940 0x2b 0x4113589f 0x2b 0xb6857fa2 0x2b 0xa619561a 0x2b 0x19fd3f1 0x2b 0x9894b414>; | |
| clock-names = "camss_top_ahb_clk", "ispif_ahb_clk", "csi_ahb_clk", "csi_src_clk", "csi_clk", "csi_pix_clk", "csi_rdi_clk", "camss_ahb_clk"; | |
| qcom,clock-rates = <0x0 0x3ab06a0 0x0 0xbebc200 0x0 0x0 0x0 0x0>; | |
| }; | |
| qcom,ispif@1b31000 { | |
| cell-index = <0x0>; | |
| compatible = "qcom,ispif-v3.0", "qcom,ispif"; | |
| reg = <0x1b31000 0x500 0x1b00020 0x10>; | |
| reg-names = "ispif", "csi_clk_mux"; | |
| interrupts = <0x0 0x37 0x0>; | |
| interrupt-names = "ispif"; | |
| qcom,num-isps = <0x2>; | |
| vfe0-vdd-supply = <0x121>; | |
| vfe1-vdd-supply = <0x122>; | |
| qcom,vdd-names = "vfe0-vdd", "vfe1-vdd"; | |
| clocks = <0x2b 0x3c0a858f 0x2b 0x9894b414 0x2b 0x4e814a78 0x2b 0xf92304fb 0x2b 0x227e65bc 0x2b 0x6b01b3e1 0x2b 0x7053c7ae 0x2b 0x61a8a930 0x2b 0x6a2a6c36 0x2b 0x1aba4a8c 0x2b 0x6ac996fe 0x2b 0x87fc98d8 0x2b 0x4113589f 0x2b 0xb6857fa2 0x2b 0x19fd3f1 0x2b 0xa619561a 0x2b 0xa0c2bd8f 0x2b 0xaaa3cd97 0x2b 0xcc73453c 0x2b 0x4e357366 0x2b 0xcaf20d99 0x2b 0xb1ef6e8b>; | |
| clock-names = "ispif_ahb_clk", "camss_ahb_clk", "camss_top_ahb_clk", "camss_ahb_src", "csi0_src_clk", "csi0_clk", "csi0_rdi_clk", "csi0_pix_clk", "csi1_src_clk", "csi1_clk", "csi1_rdi_clk", "csi1_pix_clk", "csi2_src_clk", "csi2_clk", "csi2_rdi_clk", "csi2_pix_clk", "vfe0_clk_src", "camss_vfe_vfe0_clk", "camss_csi_vfe0_clk", "vfe1_clk_src", "camss_vfe_vfe1_clk", "camss_csi_vfe1_clk"; | |
| qcom,clock-rates = <0x3ab06a0 0x0 0x0 0x0 0xbebc200 0x0 0x0 0x0 0xbebc200 0x0 0x0 0x0 0xbebc200 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>; | |
| qcom,clock-cntl-support; | |
| qcom,clock-control = "SET_RATE", "NO_SET_RATE", "NO_SET_RATE", "NO_SET_RATE", "SET_RATE", "NO_SET_RATE", "NO_SET_RATE", "NO_SET_RATE", "SET_RATE", "NO_SET_RATE", "NO_SET_RATE", "NO_SET_RATE", "SET_RATE", "NO_SET_RATE", "NO_SET_RATE", "NO_SET_RATE", "INIT_RATE", "NO_SET_RATE", "NO_SET_RATE", "INIT_RATE", "NO_SET_RATE", "NO_SET_RATE"; | |
| }; | |
| qcom,vfe0@1b10000 { | |
| cell-index = <0x0>; | |
| compatible = "qcom,vfe40"; | |
| reg = <0x1b10000 0x1000 0x1b40000 0x200>; | |
| reg-names = "vfe", "vfe_vbif"; | |
| interrupts = <0x0 0x39 0x0>; | |
| interrupt-names = "vfe"; | |
| vdd-supply = <0x121>; | |
| clocks = <0x2b 0x4e814a78 0x2b 0x9894b414 0x2b 0xa0c2bd8f 0x2b 0xaaa3cd97 0x2b 0xcc73453c 0x2b 0x4050f47a 0x2b 0x77fe2384 0x2b 0x3c0a858f>; | |
| clock-names = "camss_top_ahb_clk", "camss_ahb_clk", "vfe_clk_src", "camss_vfe_vfe_clk", "camss_csi_vfe_clk", "iface_clk", "bus_clk", "iface_ahb_clk"; | |
| qcom,clock-rates = <0x0 0x0 0xfe50fb0 0x0 0x0 0x0 0x0 0x0>; | |
| qos-entries = <0x8>; | |
| qos-regs = <0x2c4 0x2c8 0x2cc 0x2d0 0x2d4 0x2d8 0x2dc 0x2e0>; | |
| qos-settings = <0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55>; | |
| vbif-entries = <0x1>; | |
| vbif-regs = <0x124>; | |
| vbif-settings = <0x3>; | |
| ds-entries = <0x11>; | |
| ds-regs = <0x988 0x98c 0x990 0x994 0x998 0x99c 0x9a0 0x9a4 0x9a8 0x9ac 0x9b0 0x9b4 0x9b8 0x9bc 0x9c0 0x9c4 0x9c8>; | |
| ds-settings = <0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0x110>; | |
| max-clk-nominal = <0x17d78400>; | |
| max-clk-turbo = <0x19bfcc00>; | |
| }; | |
| qcom,vfe1@1b14000 { | |
| cell-index = <0x1>; | |
| compatible = "qcom,vfe40"; | |
| reg = <0x1b14000 0x1000 0x1ba0000 0x200>; | |
| reg-names = "vfe", "vfe_vbif"; | |
| interrupts = <0x0 0x1d 0x0>; | |
| interrupt-names = "vfe"; | |
| vdd-supply = <0x122>; | |
| clocks = <0x2b 0x4e814a78 0x2b 0x9894b414 0x2b 0x4e357366 0x2b 0xcaf20d99 0x2b 0xb1ef6e8b 0x2b 0x634a738a 0x2b 0xaf7463b3 0x2b 0x3c0a858f>; | |
| clock-names = "camss_top_ahb_clk", "camss_ahb_clk", "vfe_clk_src", "camss_vfe_vfe_clk", "camss_csi_vfe_clk", "iface_clk", "bus_clk", "iface_ahb_clk"; | |
| qcom,clock-rates = <0x0 0x0 0xfe50fb0 0x0 0x0 0x0 0x0 0x0>; | |
| qos-entries = <0x8>; | |
| qos-regs = <0x2c4 0x2c8 0x2cc 0x2d0 0x2d4 0x2d8 0x2dc 0x2e0>; | |
| qos-settings = <0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55 0xaa55aa55>; | |
| vbif-entries = <0x1>; | |
| vbif-regs = <0x124>; | |
| vbif-settings = <0x3>; | |
| ds-entries = <0x11>; | |
| ds-regs = <0x988 0x98c 0x990 0x994 0x998 0x99c 0x9a0 0x9a4 0x9a8 0x9ac 0x9b0 0x9b4 0x9b8 0x9bc 0x9c0 0x9c4 0x9c8>; | |
| ds-settings = <0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0xcccc1111 0x110>; | |
| max-clk-nominal = <0x17d78400>; | |
| max-clk-turbo = <0x19bfcc00>; | |
| }; | |
| qcom,vfe { | |
| compatible = "qcom,vfe"; | |
| num_child = <0x2>; | |
| }; | |
| qcom,cam_smmu { | |
| status = "ok"; | |
| compatible = "qcom,msm-cam-smmu"; | |
| msm_cam_smmu_cb1 { | |
| compatible = "qcom,qsmmu-cam-cb"; | |
| iommus = <0x123 0x400 0x123 0x2400>; | |
| label = "vfe"; | |
| qcom,scratch-buf-support; | |
| }; | |
| msm_cam_smmu_cb2 { | |
| compatible = "qcom,qsmmu-cam-cb"; | |
| label = "vfe_secure"; | |
| qcom,secure-context; | |
| }; | |
| msm_cam_smmu_cb3 { | |
| compatible = "qcom,qsmmu-cam-cb"; | |
| iommus = <0x123 0x1c00>; | |
| label = "cpp"; | |
| }; | |
| msm_cam_smmu_cb4 { | |
| compatible = "qcom,qsmmu-cam-cb"; | |
| iommus = <0x123 0x1800>; | |
| label = "jpeg_enc0"; | |
| }; | |
| }; | |
| qcom,jpeg@1b1c000 { | |
| status = "ok"; | |
| cell-index = <0x0>; | |
| compatible = "qcom,jpeg"; | |
| reg = <0x1b1c000 0x400 0x1b60000 0xc30>; | |
| reg-names = "jpeg_hw", "jpeg_vbif"; | |
| interrupts = <0x0 0x3b 0x0>; | |
| interrupt-names = "jpeg"; | |
| vdd-supply = <0x124>; | |
| qcom,vdd-names = "vdd"; | |
| clock-names = "core_clk", "iface_clk", "bus_clk0", "camss_top_ahb_clk", "camss_ahb_clk"; | |
| clocks = <0x2b 0x1ed3f032 0x2b 0x3bfa7603 0x2b 0x3e278896 0x2b 0x4e814a78 0x2b 0x9894b414>; | |
| qcom,clock-rates = <0xfe50fb0 0x0 0x0 0x0 0x0>; | |
| qcom,qos-reg-settings = <0x28 0x555e 0xc8 0x5555>; | |
| qcom,vbif-reg-settings = <0xc0 0x10101000 0xb0 0x10100010>; | |
| qcom,msm-bus,name = "msm_camera_jpeg0"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0x3e 0x200 0x0 0x0 0x3e 0x200 0xc3500 0xc3500>; | |
| }; | |
| qcom,irqrouter@1b00000 { | |
| status = "ok"; | |
| cell-index = <0x0>; | |
| compatible = "qcom,irqrouter"; | |
| reg = <0x1b00000 0x100>; | |
| reg-names = "irqrouter"; | |
| }; | |
| qcom,cpp@1b04000 { | |
| status = "ok"; | |
| cell-index = <0x0>; | |
| compatible = "qcom,cpp"; | |
| reg = <0x1b04000 0x100 0x1b80000 0x200 0x1b18000 0x18 0x1858078 0x4>; | |
| reg-names = "cpp", "cpp_vbif", "cpp_hw", "camss_cpp"; | |
| interrupts = <0x0 0x31 0x0>; | |
| interrupt-names = "cpp"; | |
| vdd-supply = <0x125>; | |
| qcom,vdd-names = "vdd"; | |
| clocks = <0x2b 0x3c0a858f 0x2b 0x8382f56d 0x2b 0x4e814a78 0x2b 0x4ac95e14 0x2b 0xbbf73861 0x2b 0x7118a0de 0x2b 0xfbbee8cf 0x2b 0x9894b414>; | |
| clock-names = "ispif_ahb_clk", "cpp_core_clk", "camss_top_ahb_clk", "camss_vfe_cpp_ahb_clk", "camss_vfe_cpp_axi_clk", "camss_vfe_cpp_clk", "micro_iface_clk", "camss_ahb_clk"; | |
| qcom,clock-rates = <0x3ab06a0 0xaba9500 0x0 0x0 0x0 0xaba9500 0x0 0x0>; | |
| qcom,min-clock-rate = <0x7ed6b40>; | |
| qcom,bus-master = <0x1>; | |
| qcom,msm-bus,name = "msm_camera_cpp"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0x6a 0x200 0x0 0x0 0x6a 0x200 0x0 0x0>; | |
| qcom,msm-bus-vector-dyn-vote; | |
| qcom,cpp-fw-payload-info { | |
| qcom,stripe-base = <0x9c>; | |
| qcom,plane-base = <0x8d>; | |
| qcom,stripe-size = <0x1b>; | |
| qcom,plane-size = <0x5>; | |
| qcom,fe-ptr-off = <0x5>; | |
| qcom,we-ptr-off = <0xb>; | |
| }; | |
| }; | |
| qcom,cci@1b0c000 { | |
| status = "ok"; | |
| cell-index = <0x0>; | |
| compatible = "qcom,cci"; | |
| reg = <0x1b0c000 0x4000>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| reg-names = "cci"; | |
| interrupts = <0x0 0x32 0x0>; | |
| interrupt-names = "cci"; | |
| clocks = <0x2b 0x3c0a858f 0x2b 0x822f3d97 0x2b 0xa81c11ba 0x2b 0xb7dd8824 0x2b 0x9894b414 0x2b 0x4e814a78>; | |
| clock-names = "ispif_ahb_clk", "cci_src_clk", "cci_ahb_clk", "camss_cci_clk", "camss_ahb_clk", "camss_top_ahb_clk"; | |
| qcom,clock-rates = <0x3ab06a0 0x124f800 0x0 0x0 0x0 0x0 0x3ab06a0 0x23c3460 0x0 0x0 0x0 0x0>; | |
| pinctrl-names = "cci_default", "cci_suspend"; | |
| pinctrl-0 = <0x126 0x127>; | |
| pinctrl-1 = <0x128 0x129>; | |
| gpios = <0xa7 0x1d 0x0 0xa7 0x1e 0x0 0xa7 0x1f 0x0 0xa7 0x20 0x0>; | |
| qcom,gpio-tbl-num = <0x0 0x1 0x2 0x3>; | |
| qcom,gpio-tbl-flags = <0x1 0x1 0x1 0x1>; | |
| qcom,gpio-tbl-label = "CCI_I2C_DATA0", "CCI_I2C_CLK0", "CCI_I2C_DATA1", "CCI_I2C_CLK1"; | |
| qcom,i2c_standard_mode { | |
| status = "disabled"; | |
| qcom,hw-thigh = <0x4e>; | |
| qcom,hw-tlow = <0x72>; | |
| qcom,hw-tsu-sto = <0x1c>; | |
| qcom,hw-tsu-sta = <0x1c>; | |
| qcom,hw-thd-dat = <0xa>; | |
| qcom,hw-thd-sta = <0x4d>; | |
| qcom,hw-tbuf = <0x76>; | |
| qcom,hw-scl-stretch-en = <0x0>; | |
| qcom,hw-trdhld = <0x6>; | |
| qcom,hw-tsp = <0x1>; | |
| }; | |
| qcom,i2c_fast_mode { | |
| status = "ok"; | |
| qcom,hw-thigh = <0x14>; | |
| qcom,hw-tlow = <0x1c>; | |
| qcom,hw-tsu-sto = <0x15>; | |
| qcom,hw-tsu-sta = <0x15>; | |
| qcom,hw-thd-dat = <0xd>; | |
| qcom,hw-thd-sta = <0x12>; | |
| qcom,hw-tbuf = <0x20>; | |
| qcom,hw-scl-stretch-en = <0x0>; | |
| qcom,hw-trdhld = <0x6>; | |
| qcom,hw-tsp = <0x3>; | |
| }; | |
| qcom,i2c_custom_mode { | |
| status = "ok"; | |
| qcom,hw-thigh = <0xf>; | |
| qcom,hw-tlow = <0x1c>; | |
| qcom,hw-tsu-sto = <0x15>; | |
| qcom,hw-tsu-sta = <0x15>; | |
| qcom,hw-thd-dat = <0xd>; | |
| qcom,hw-thd-sta = <0x12>; | |
| qcom,hw-tbuf = <0x19>; | |
| qcom,hw-scl-stretch-en = <0x1>; | |
| qcom,hw-trdhld = <0x6>; | |
| qcom,hw-tsp = <0x3>; | |
| }; | |
| qcom,i2c_fast_plus_mode { | |
| status = "ok"; | |
| qcom,hw-thigh = <0x10>; | |
| qcom,hw-tlow = <0x16>; | |
| qcom,hw-tsu-sto = <0x11>; | |
| qcom,hw-tsu-sta = <0x12>; | |
| qcom,hw-thd-dat = <0x10>; | |
| qcom,hw-thd-sta = <0xf>; | |
| qcom,hw-tbuf = <0x13>; | |
| qcom,hw-scl-stretch-en = <0x1>; | |
| qcom,hw-trdhld = <0x3>; | |
| qcom,hw-tsp = <0x3>; | |
| qcom,cci-clk-src = <0x23c3460>; | |
| }; | |
| qcom,actuator@0 { | |
| cell-index = <0x0>; | |
| reg = <0x0>; | |
| compatible = "qcom,actuator"; | |
| qcom,cci-master = <0x0>; | |
| cam_vaf-supply = <0x12a>; | |
| qcom,cam-vreg-name = "cam_vaf"; | |
| qcom,cam-vreg-min-voltage = <0x2b7cd0>; | |
| qcom,cam-vreg-max-voltage = <0x2b7cd0>; | |
| qcom,cam-vreg-op-mode = <0x13880>; | |
| linux,phandle = <0x132>; | |
| phandle = <0x132>; | |
| }; | |
| qcom,eeprom@0 { | |
| cell-index = <0x0>; | |
| compatible = "qcom,eeprom"; | |
| qcom,cci-master = <0x0>; | |
| reg = <0x0>; | |
| cam_vdig-supply = <0x12b>; | |
| cam_vana-supply = <0x12c>; | |
| cam_vio-supply = <0x12d>; | |
| cam_vaf-supply = <0x12a>; | |
| qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana", "cam_vaf"; | |
| qcom,cam-vreg-min-voltage = <0x124f80 0x1b7740 0x2ab980 0x2b7cd0>; | |
| qcom,cam-vreg-max-voltage = <0x124f80 0x1b7740 0x2ab980 0x2b7cd0>; | |
| qcom,cam-vreg-op-mode = <0x30d40 0x30d40 0x13880 0x186a0>; | |
| pinctrl-names = "cam_default", "cam_suspend"; | |
| pinctrl-0 = <0x12e 0x12f>; | |
| pinctrl-1 = <0x130 0x131>; | |
| gpios = <0xa7 0x1a 0x0 0xa7 0x24 0x0 0xa7 0x23 0x0>; | |
| qcom,gpio-reset = <0x1>; | |
| qcom,gpio-standby = <0x2>; | |
| qcom,gpio-req-tbl-num = <0x0 0x1 0x2>; | |
| qcom,gpio-req-tbl-flags = <0x1 0x0 0x0>; | |
| qcom,gpio-req-tbl-label = "CAMIF_MCLK0", "MCAM_RESET0", "MCAM_STANDBY0"; | |
| status = "ok"; | |
| clocks = <0x2b 0x266b3853 0x2b 0x80902deb>; | |
| clock-names = "cam_src_clk", "cam_clk"; | |
| qcom,clock-rates = <0x124f800 0x0>; | |
| qcom,eeprom-name = "s5k3l8"; | |
| qcom,slave-addr = <0xa0>; | |
| qcom,num-blocks = <0x1>; | |
| qcom,page0 = <0x0 0x0 0x2 0x1 0x1 0x1>; | |
| qcom,poll0 = <0x0 0x0 0x2 0x0 0x1 0x1>; | |
| qcom,mem0 = <0x86f 0x0 0x2 0x0 0x1 0x0>; | |
| qcom,cam-power-seq-type = "sensor_vreg", "sensor_vreg", "sensor_vreg", "sensor_clk", "sensor_gpio", "sensor_gpio", "sensor_gpio", "sensor_gpio"; | |
| qcom,cam-power-seq-val = "cam_vio", "cam_vana", "cam_vdig", "sensor_cam_mclk", "sensor_gpio_reset", "sensor_gpio_standby", "sensor_gpio_reset", "sensor_gpio_standby"; | |
| qcom,cam-power-seq-cfg-val = <0x1 0x1 0x1 0x16e3600 0x0 0x0 0x1 0x1>; | |
| qcom,cam-power-seq-delay = <0x1 0x1 0x5 0xa 0x5 0x5 0x5 0x5>; | |
| linux,phandle = <0x134>; | |
| phandle = <0x134>; | |
| }; | |
| qcom,camera@0 { | |
| cell-index = <0x0>; | |
| compatible = "qcom,camera"; | |
| reg = <0x0>; | |
| qcom,csiphy-sd-index = <0x0>; | |
| qcom,csid-sd-index = <0x0>; | |
| qcom,mount-angle = <0x5a>; | |
| qcom,actuator-src = <0x132>; | |
| qcom,led-flash-src = <0x133>; | |
| qcom,eeprom-src = <0x134 0x135>; | |
| cam_vdig-supply = <0x12b>; | |
| cam_vana-supply = <0x12c>; | |
| cam_vio-supply = <0x12d>; | |
| cam_vaf-supply = <0x12a>; | |
| qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana", "cam_vaf"; | |
| qcom,cam-vreg-min-voltage = <0x124f80 0x1b7740 0x2ab980 0x2b7cd0>; | |
| qcom,cam-vreg-max-voltage = <0x124f80 0x1b7740 0x2ab980 0x2b7cd0>; | |
| qcom,cam-vreg-op-mode = <0x30d40 0x13880 0x13880 0x186a0>; | |
| pinctrl-names = "cam_default", "cam_suspend"; | |
| pinctrl-0 = <0x12e 0x12f>; | |
| pinctrl-1 = <0x130 0x131>; | |
| gpios = <0xa7 0x1a 0x0 0xa7 0x24 0x0 0xa7 0x23 0x0>; | |
| qcom,gpio-reset = <0x1>; | |
| qcom,gpio-standby = <0x2>; | |
| qcom,gpio-req-tbl-num = <0x0 0x1 0x2>; | |
| qcom,gpio-req-tbl-flags = <0x1 0x0 0x0>; | |
| qcom,gpio-req-tbl-label = "CAMIF_MCLK0", "CAM_RESET0", "CAM_STANDBY0"; | |
| qcom,sensor-position = <0x0>; | |
| qcom,sensor-mode = <0x0>; | |
| qcom,cci-master = <0x0>; | |
| clocks = <0x2b 0x266b3853 0x2b 0x80902deb>; | |
| clock-names = "cam_src_clk", "cam_clk"; | |
| qcom,clock-rates = <0x16e3600 0x0>; | |
| }; | |
| qcom,camera@2 { | |
| cell-index = <0x2>; | |
| compatible = "qcom,camera"; | |
| reg = <0x2>; | |
| qcom,csiphy-sd-index = <0x1>; | |
| qcom,csid-sd-index = <0x1>; | |
| qcom,eeprom-src = <0x136 0x137>; | |
| qcom,mount-angle = <0x10e>; | |
| cam_vdig-supply = <0x12b>; | |
| cam_vana-supply = <0x12c>; | |
| cam_vio-supply = <0x12d>; | |
| qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana"; | |
| qcom,cam-vreg-min-voltage = <0x124f80 0x0 0x2ab980>; | |
| qcom,cam-vreg-max-voltage = <0x124f80 0x0 0x2ab980>; | |
| qcom,cam-vreg-op-mode = <0x19a28 0x0 0x13880>; | |
| qcom,gpio-no-mux = <0x0>; | |
| pinctrl-names = "cam_default", "cam_suspend"; | |
| pinctrl-0 = <0x138 0x139>; | |
| pinctrl-1 = <0x13a 0x13b>; | |
| gpios = <0xa7 0x1c 0x0 0xa7 0x28 0x0 0xa7 0x27 0x0>; | |
| qcom,gpio-reset = <0x1>; | |
| qcom,gpio-standby = <0x2>; | |
| qcom,gpio-req-tbl-num = <0x0 0x1 0x2>; | |
| qcom,gpio-req-tbl-flags = <0x1 0x0 0x0>; | |
| qcom,gpio-req-tbl-label = "CAMIF_MCLK2", "CAM_RESET2", "CAM_STANDBY2"; | |
| qcom,sensor-position = <0x1>; | |
| qcom,sensor-mode = <0x0>; | |
| qcom,cci-master = <0x0>; | |
| clocks = <0x2b 0x42545468 0x2b 0x222f8fff>; | |
| clock-names = "cam_src_clk", "cam_clk"; | |
| qcom,clock-rates = <0x16e3600 0x0>; | |
| }; | |
| qcom,eeprom@1 { | |
| cell-index = <0x1>; | |
| reg = <0x1>; | |
| qcom,eeprom-name = "ov5670"; | |
| compatible = "qcom,eeprom"; | |
| qcom,slave-addr = <0x6c>; | |
| qcom,cci-master = <0x0>; | |
| qcom,num-blocks = <0x4>; | |
| qcom,page0 = <0x1 0x3d88 0x2 0x1b62 0x2 0x1>; | |
| qcom,poll0 = <0x1 0x3d88 0x2 0x1b62 0x2 0x1>; | |
| qcom,mem0 = <0x0 0x0 0x2 0x0 0x1 0x0>; | |
| qcom,page1 = <0x1 0x3d8a 0x2 0x710f 0x2 0x1>; | |
| qcom,poll1 = <0x1 0x3d8a 0x2 0x710f 0x2 0x1>; | |
| qcom,mem1 = <0x0 0x3d00 0x2 0x0 0x1 0x0>; | |
| qcom,page2 = <0x1 0x3d85 0x2 0x6 0x1 0x1>; | |
| qcom,poll2 = <0x1 0x3d85 0x2 0x6 0x1 0x1>; | |
| qcom,mem2 = <0x0 0x3d00 0x2 0x0 0x1 0x0>; | |
| qcom,page3 = <0x1 0x100 0x2 0x1 0x1 0x1>; | |
| qcom,pageen3 = <0x0 0x3d85 0x2 0x16 0x1 0x0>; | |
| qcom,poll3 = <0x0 0x3d85 0x2 0x16 0x1 0x0>; | |
| qcom,mem3 = <0x1e 0x7010 0x2 0x0 0x1 0x1>; | |
| cam_vdig-supply = <0x12b>; | |
| cam_vana-supply = <0x12c>; | |
| cam_vio-supply = <0x12d>; | |
| qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana"; | |
| qcom,cam-vreg-min-voltage = <0x124f80 0x1b7740 0x2ab980>; | |
| qcom,cam-vreg-max-voltage = <0x124f80 0x1b7740 0x2ab980>; | |
| qcom,cam-vreg-op-mode = <0x30d40 0x13880 0x186a0>; | |
| qcom,gpio-no-mux = <0x0>; | |
| pinctrl-names = "cam_default", "cam_suspend"; | |
| pinctrl-0 = <0x138 0x139>; | |
| pinctrl-1 = <0x13a 0x13b>; | |
| gpios = <0xa7 0x1c 0x0 0xa7 0x28 0x0 0xa7 0x27 0x0>; | |
| qcom,gpio-reset = <0x1>; | |
| qcom,gpio-standby = <0x2>; | |
| qcom,gpio-req-tbl-num = <0x0 0x1 0x2>; | |
| qcom,gpio-req-tbl-flags = <0x1 0x0 0x0>; | |
| qcom,gpio-req-tbl-label = "CAMIF_MCLK2", "CAM_RESET2", "CAM_STANDBY2"; | |
| qcom,cam-power-seq-type = "sensor_gpio", "sensor_gpio", "sensor_clk", "sensor_vreg", "sensor_vreg", "sensor_vreg", "sensor_gpio", "sensor_gpio"; | |
| qcom,cam-power-seq-val = "sensor_gpio_reset", "sensor_gpio_standby", "sensor_cam_mclk", "cam_vdig", "cam_vana", "cam_vio", "sensor_gpio_reset", "sensor_gpio_standby"; | |
| qcom,cam-power-seq-cfg-val = <0x0 0x0 0x16e3600 0x1 0x1 0x1 0x1 0x1>; | |
| qcom,cam-power-seq-delay = <0x5 0x5 0xa 0x1 0x1 0x1 0x5 0x5>; | |
| status = "ok"; | |
| clocks = <0x2b 0x42545468 0x2b 0x222f8fff>; | |
| clock-names = "cam_src_clk", "cam_clk"; | |
| linux,phandle = <0x136>; | |
| phandle = <0x136>; | |
| }; | |
| qcom,eeprom@5a { | |
| cell-index = <0x2>; | |
| reg = <0x5a>; | |
| qcom,eeprom-name = "s5k5e8"; | |
| compatible = "qcom,eeprom"; | |
| qcom,slave-addr = <0x5a>; | |
| qcom,cci-master = <0x0>; | |
| qcom,num-blocks = <0x5>; | |
| qcom,page0 = <0x1 0xa00 0x2 0x4 0x1 0x1>; | |
| qcom,poll0 = <0x0 0xa00 0x2 0x4 0x1 0x1>; | |
| qcom,mem0 = <0x0 0x0 0x2 0x0 0x1 0x0>; | |
| qcom,page1 = <0x1 0xa02 0x2 0x4 0x1 0x1>; | |
| qcom,poll1 = <0x0 0xa02 0x2 0x4 0x2 0x1>; | |
| qcom,mem1 = <0x0 0x0 0x2 0x0 0x1 0x0>; | |
| qcom,page2 = <0x1 0xa00 0x2 0x1 0x1 0x1>; | |
| qcom,poll2 = <0x0 0xa00 0x2 0x1 0x1 0x1>; | |
| qcom,mem2 = <0x30 0xa04 0x2 0x0 0x1 0x1>; | |
| qcom,page3 = <0x1 0xa00 0x2 0x4 0x1 0x1>; | |
| qcom,poll3 = <0x0 0xa00 0x2 0x4 0x1 0x1>; | |
| qcom,mem3 = <0x0 0x0 0x2 0x0 0x1 0x0>; | |
| qcom,page4 = <0x1 0xa00 0x2 0x0 0x1 0x1>; | |
| qcom,poll4 = <0x0 0xa00 0x2 0x0 0x1 0x0>; | |
| qcom,mem4 = <0x0 0x0 0x2 0x0 0x1 0x0>; | |
| cam_vdig-supply = <0x12b>; | |
| cam_vana-supply = <0x12c>; | |
| cam_vio-supply = <0x12d>; | |
| qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana"; | |
| qcom,cam-vreg-min-voltage = <0x124f80 0x1b7740 0x2ab980>; | |
| qcom,cam-vreg-max-voltage = <0x124f80 0x1b7740 0x2ab980>; | |
| qcom,cam-vreg-op-mode = <0x30d40 0x13880 0x186a0>; | |
| qcom,gpio-no-mux = <0x0>; | |
| pinctrl-names = "cam_default", "cam_suspend"; | |
| pinctrl-0 = <0x138 0x139>; | |
| pinctrl-1 = <0x13a 0x13b>; | |
| gpios = <0xa7 0x1c 0x0 0xa7 0x28 0x0 0xa7 0x27 0x0>; | |
| qcom,gpio-reset = <0x1>; | |
| qcom,gpio-standby = <0x2>; | |
| qcom,gpio-req-tbl-num = <0x0 0x1 0x2>; | |
| qcom,gpio-req-tbl-flags = <0x1 0x0 0x0>; | |
| qcom,gpio-req-tbl-label = "CAMIF_MCLK2", "CAM_RESET2", "CAM_STANDBY2"; | |
| qcom,cam-power-seq-type = "sensor_gpio", "sensor_gpio", "sensor_clk", "sensor_vreg", "sensor_vreg", "sensor_vreg", "sensor_gpio", "sensor_gpio"; | |
| qcom,cam-power-seq-val = "sensor_gpio_reset", "sensor_gpio_standby", "sensor_cam_mclk", "cam_vdig", "cam_vana", "cam_vio", "sensor_gpio_reset", "sensor_gpio_standby"; | |
| qcom,cam-power-seq-cfg-val = <0x0 0x0 0x16e3600 0x1 0x1 0x1 0x1 0x1>; | |
| qcom,cam-power-seq-delay = <0x1 0x1 0x5 0x0 0x0 0x0 0x5 0x5>; | |
| status = "ok"; | |
| clocks = <0x2b 0x42545468 0x2b 0x222f8fff>; | |
| clock-names = "cam_src_clk", "cam_clk"; | |
| qcom,clock-rates = <0x124f800 0x0>; | |
| linux,phandle = <0x137>; | |
| phandle = <0x137>; | |
| }; | |
| qcom,eeprom@4 { | |
| cell-index = <0x4>; | |
| reg = <0x4>; | |
| qcom,eeprom-name = "ov13853"; | |
| compatible = "qcom,eeprom"; | |
| qcom,slave-addr = <0xa0>; | |
| qcom,cci-master = <0x0>; | |
| qcom,num-blocks = <0x1>; | |
| qcom,page0 = <0x0 0x0 0x2 0x1 0x1 0x1>; | |
| qcom,poll0 = <0x0 0x0 0x2 0x0 0x1 0x1>; | |
| qcom,mem0 = <0xc6e 0x0 0x2 0x0 0x1 0x0>; | |
| cam_vdig-supply = <0x12b>; | |
| cam_vana-supply = <0x12c>; | |
| cam_vio-supply = <0x12d>; | |
| qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana"; | |
| qcom,cam-vreg-min-voltage = <0x124f80 0x0 0x2b7cd0>; | |
| qcom,cam-vreg-max-voltage = <0x124f80 0x0 0x2b7cd0>; | |
| qcom,cam-vreg-op-mode = <0x30d40 0x0 0x13880>; | |
| pinctrl-names = "cam_default", "cam_suspend"; | |
| pinctrl-0 = <0x12e 0x12f>; | |
| pinctrl-1 = <0x130 0x131>; | |
| gpios = <0xa7 0x1a 0x0 0xa7 0x24 0x0 0xa7 0x23 0x0>; | |
| qcom,gpio-reset = <0x1>; | |
| qcom,gpio-standby = <0x2>; | |
| qcom,gpio-req-tbl-num = <0x0 0x1 0x2>; | |
| qcom,gpio-req-tbl-flags = <0x1 0x0 0x0>; | |
| qcom,gpio-req-tbl-label = "CAMIF_MCLK0", "MCAM_RESET0", "MCAM_STANDBY0"; | |
| qcom,cam-power-seq-type = "sensor_vreg", "sensor_vreg", "sensor_vreg", "sensor_clk", "sensor_gpio", "sensor_gpio"; | |
| qcom,cam-power-seq-val = "cam_vio", "cam_vana", "cam_vdig", "sensor_cam_mclk", "sensor_gpio_reset", "sensor_gpio_standby"; | |
| qcom,cam-power-seq-cfg-val = <0x1 0x1 0x1 0x16e3600 0x1 0x1>; | |
| qcom,cam-power-seq-delay = <0x1 0x1 0x1 0x1 0x1 0xa>; | |
| status = "ok"; | |
| clocks = <0x2b 0x266b3853 0x2b 0x80902deb>; | |
| clock-names = "cam_src_clk", "cam_clk"; | |
| linux,phandle = <0x135>; | |
| phandle = <0x135>; | |
| }; | |
| }; | |
| qcom,msm-pcm { | |
| compatible = "qcom,msm-pcm-dsp"; | |
| qcom,msm-pcm-dsp-id = <0x0>; | |
| linux,phandle = <0x147>; | |
| phandle = <0x147>; | |
| }; | |
| qcom,msm-pcm-routing { | |
| compatible = "qcom,msm-pcm-routing"; | |
| linux,phandle = <0x151>; | |
| phandle = <0x151>; | |
| }; | |
| qcom,msm-ultra-low-latency { | |
| compatible = "qcom,msm-pcm-dsp"; | |
| qcom,msm-pcm-dsp-id = <0x2>; | |
| qcom,msm-pcm-low-latency; | |
| qcom,latency-level = "ultra"; | |
| linux,phandle = <0x149>; | |
| phandle = <0x149>; | |
| }; | |
| qcom,msm-pcm-low-latency { | |
| compatible = "qcom,msm-pcm-dsp"; | |
| qcom,msm-pcm-dsp-id = <0x1>; | |
| qcom,msm-pcm-low-latency; | |
| qcom,latency-level = "regular"; | |
| linux,phandle = <0x148>; | |
| phandle = <0x148>; | |
| }; | |
| qcom,msm-cpe-lsm { | |
| compatible = "qcom,msm-cpe-lsm"; | |
| linux,phandle = <0x171>; | |
| phandle = <0x171>; | |
| }; | |
| qcom,msm-pcm-lpa { | |
| compatible = "qcom,msm-pcm-lpa"; | |
| linux,phandle = <0x152>; | |
| phandle = <0x152>; | |
| }; | |
| qcom,msm-compress-dsp { | |
| compatible = "qcom,msm-compress-dsp"; | |
| linux,phandle = <0x14d>; | |
| phandle = <0x14d>; | |
| }; | |
| qcom,msm-voip-dsp { | |
| compatible = "qcom,msm-voip-dsp"; | |
| linux,phandle = <0x14a>; | |
| phandle = <0x14a>; | |
| }; | |
| qcom,msm-pcm-voice { | |
| compatible = "qcom,msm-pcm-voice"; | |
| qcom,destroy-cvd; | |
| linux,phandle = <0x14b>; | |
| phandle = <0x14b>; | |
| }; | |
| qcom,msm-stub-codec { | |
| compatible = "qcom,msm-stub-codec"; | |
| linux,phandle = <0x16e>; | |
| phandle = <0x16e>; | |
| }; | |
| qcom,msm-dai-fe { | |
| compatible = "qcom,msm-dai-fe"; | |
| }; | |
| qcom,msm-pcm-afe { | |
| compatible = "qcom,msm-pcm-afe"; | |
| linux,phandle = <0x14f>; | |
| phandle = <0x14f>; | |
| }; | |
| qcom,msm-pcm-loopback { | |
| compatible = "qcom,msm-pcm-loopback"; | |
| linux,phandle = <0x14c>; | |
| phandle = <0x14c>; | |
| }; | |
| qcom,msm-dai-mi2s { | |
| compatible = "qcom,msm-dai-mi2s"; | |
| qcom,msm-dai-q6-mi2s-prim { | |
| compatible = "qcom,msm-dai-q6-mi2s"; | |
| qcom,msm-dai-q6-mi2s-dev-id = <0x0>; | |
| qcom,msm-mi2s-rx-lines = <0x3>; | |
| qcom,msm-mi2s-tx-lines = <0x0>; | |
| linux,phandle = <0x154>; | |
| phandle = <0x154>; | |
| }; | |
| qcom,msm-dai-q6-mi2s-sec { | |
| compatible = "qcom,msm-dai-q6-mi2s"; | |
| qcom,msm-dai-q6-mi2s-dev-id = <0x1>; | |
| qcom,msm-mi2s-rx-lines = <0x1>; | |
| qcom,msm-mi2s-tx-lines = <0x0>; | |
| linux,phandle = <0x155>; | |
| phandle = <0x155>; | |
| }; | |
| qcom,msm-dai-q6-mi2s-quat { | |
| compatible = "qcom,msm-dai-q6-mi2s"; | |
| qcom,msm-dai-q6-mi2s-dev-id = <0x3>; | |
| qcom,msm-mi2s-rx-lines = <0x1>; | |
| qcom,msm-mi2s-tx-lines = <0x2>; | |
| linux,phandle = <0x157>; | |
| phandle = <0x157>; | |
| }; | |
| qcom,msm-dai-q6-mi2s-tert { | |
| compatible = "qcom,msm-dai-q6-mi2s"; | |
| qcom,msm-dai-q6-mi2s-dev-id = <0x2>; | |
| qcom,msm-mi2s-rx-lines = <0x0>; | |
| qcom,msm-mi2s-tx-lines = <0x3>; | |
| linux,phandle = <0x156>; | |
| phandle = <0x156>; | |
| }; | |
| qcom,msm-dai-q6-mi2s-quin { | |
| compatible = "qcom,msm-dai-q6-mi2s"; | |
| qcom,msm-dai-q6-mi2s-dev-id = <0x5>; | |
| qcom,msm-mi2s-rx-lines = <0x1>; | |
| qcom,msm-mi2s-tx-lines = <0x2>; | |
| linux,phandle = <0x158>; | |
| phandle = <0x158>; | |
| }; | |
| qcom,msm-dai-q6-mi2s-senary { | |
| compatible = "qcom,msm-dai-q6-mi2s"; | |
| qcom,msm-dai-q6-mi2s-dev-id = <0x6>; | |
| qcom,msm-mi2s-rx-lines = <0x0>; | |
| qcom,msm-mi2s-tx-lines = <0x3>; | |
| linux,phandle = <0x159>; | |
| phandle = <0x159>; | |
| }; | |
| }; | |
| qcom,msm-lsm-client { | |
| compatible = "qcom,msm-lsm-client"; | |
| linux,phandle = <0x150>; | |
| phandle = <0x150>; | |
| }; | |
| qcom,msm-dai-q6 { | |
| compatible = "qcom,msm-dai-q6"; | |
| qcom,msm-dai-q6-sb-0-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x4000>; | |
| linux,phandle = <0x15a>; | |
| phandle = <0x15a>; | |
| }; | |
| qcom,msm-dai-q6-sb-0-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x4001>; | |
| linux,phandle = <0x15b>; | |
| phandle = <0x15b>; | |
| }; | |
| qcom,msm-dai-q6-sb-1-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x4002>; | |
| linux,phandle = <0x15c>; | |
| phandle = <0x15c>; | |
| }; | |
| qcom,msm-dai-q6-sb-1-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x4003>; | |
| linux,phandle = <0x15d>; | |
| phandle = <0x15d>; | |
| }; | |
| qcom,msm-dai-q6-sb-2-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x4004>; | |
| linux,phandle = <0x172>; | |
| phandle = <0x172>; | |
| }; | |
| qcom,msm-dai-q6-sb-2-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x4005>; | |
| linux,phandle = <0x173>; | |
| phandle = <0x173>; | |
| }; | |
| qcom,msm-dai-q6-sb-3-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x4006>; | |
| linux,phandle = <0x15e>; | |
| phandle = <0x15e>; | |
| }; | |
| qcom,msm-dai-q6-sb-3-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x4007>; | |
| linux,phandle = <0x15f>; | |
| phandle = <0x15f>; | |
| }; | |
| qcom,msm-dai-q6-sb-4-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x4008>; | |
| linux,phandle = <0x160>; | |
| phandle = <0x160>; | |
| }; | |
| qcom,msm-dai-q6-sb-4-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x4009>; | |
| linux,phandle = <0x161>; | |
| phandle = <0x161>; | |
| }; | |
| qcom,msm-dai-q6-sb-5-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x400b>; | |
| linux,phandle = <0x174>; | |
| phandle = <0x174>; | |
| }; | |
| qcom,msm-dai-q6-sb-5-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x400a>; | |
| linux,phandle = <0x175>; | |
| phandle = <0x175>; | |
| }; | |
| qcom,msm-dai-q6-bt-sco-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x3000>; | |
| linux,phandle = <0x162>; | |
| phandle = <0x162>; | |
| }; | |
| qcom,msm-dai-q6-bt-sco-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x3001>; | |
| linux,phandle = <0x163>; | |
| phandle = <0x163>; | |
| }; | |
| qcom,msm-dai-q6-int-fm-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x3004>; | |
| linux,phandle = <0x164>; | |
| phandle = <0x164>; | |
| }; | |
| qcom,msm-dai-q6-int-fm-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x3005>; | |
| linux,phandle = <0x165>; | |
| phandle = <0x165>; | |
| }; | |
| qcom,msm-dai-q6-be-afe-pcm-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0xe0>; | |
| linux,phandle = <0x166>; | |
| phandle = <0x166>; | |
| }; | |
| qcom,msm-dai-q6-be-afe-pcm-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0xe1>; | |
| linux,phandle = <0x167>; | |
| phandle = <0x167>; | |
| }; | |
| qcom,msm-dai-q6-afe-proxy-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0xf1>; | |
| linux,phandle = <0x168>; | |
| phandle = <0x168>; | |
| }; | |
| qcom,msm-dai-q6-afe-proxy-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0xf0>; | |
| linux,phandle = <0x169>; | |
| phandle = <0x169>; | |
| }; | |
| qcom,msm-dai-q6-afe-loopback-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x6001>; | |
| }; | |
| qcom,msm-dai-q6-incall-record-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x8003>; | |
| linux,phandle = <0x16a>; | |
| phandle = <0x16a>; | |
| }; | |
| qcom,msm-dai-q6-incall-record-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x8004>; | |
| linux,phandle = <0x16b>; | |
| phandle = <0x16b>; | |
| }; | |
| qcom,msm-dai-q6-incall-music-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x8005>; | |
| linux,phandle = <0x16c>; | |
| phandle = <0x16c>; | |
| }; | |
| qcom,msm-dai-q6-incall-music-2-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x8002>; | |
| linux,phandle = <0x16d>; | |
| phandle = <0x16d>; | |
| }; | |
| qcom,msm-dai-q6-sb-6-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x400c>; | |
| linux,phandle = <0x176>; | |
| phandle = <0x176>; | |
| }; | |
| }; | |
| qcom,msm-pcm-hostless { | |
| compatible = "qcom,msm-pcm-hostless"; | |
| linux,phandle = <0x14e>; | |
| phandle = <0x14e>; | |
| }; | |
| qcom,msm-pri-auxpcm { | |
| compatible = "qcom,msm-auxpcm-dev"; | |
| qcom,msm-cpudai-auxpcm-mode = <0x0 0x0>; | |
| qcom,msm-cpudai-auxpcm-sync = <0x1 0x1>; | |
| qcom,msm-cpudai-auxpcm-frame = <0x5 0x4>; | |
| qcom,msm-cpudai-auxpcm-quant = <0x2 0x2>; | |
| qcom,msm-cpudai-auxpcm-num-slots = <0x1 0x1>; | |
| qcom,msm-cpudai-auxpcm-slot-mapping = <0x1 0x1>; | |
| qcom,msm-cpudai-auxpcm-data = <0x0 0x0>; | |
| qcom,msm-cpudai-auxpcm-pcm-clk-rate = <0x1f4000 0x1f4000>; | |
| qcom,msm-auxpcm-interface = "primary"; | |
| linux,phandle = <0x153>; | |
| phandle = <0x153>; | |
| }; | |
| qcom,msm-hdmi-dba-codec-rx { | |
| compatible = "qcom,msm-hdmi-dba-codec-rx"; | |
| qcom,dba-bridge-chip = "adv7533"; | |
| linux,phandle = <0x170>; | |
| phandle = <0x170>; | |
| }; | |
| qcom,msm-audio-ion { | |
| compatible = "qcom,msm-audio-ion"; | |
| qcom,smmu-version = <0x1>; | |
| qcom,smmu-enabled; | |
| iommus = <0x13c 0x1>; | |
| }; | |
| qcom,msm-adsp-loader { | |
| compatible = "qcom,adsp-loader"; | |
| qcom,adsp-state = <0x0>; | |
| }; | |
| qcom,avtimer@c0a300c { | |
| compatible = "qcom,avtimer"; | |
| reg = <0xc0a300c 0x4 0xc0a3010 0x4>; | |
| reg-names = "avtimer_lsb_addr", "avtimer_msb_addr"; | |
| qcom,clk-div = <0x1b>; | |
| }; | |
| sound { | |
| status = "okay"; | |
| compatible = "qcom,msm8952-audio-codec"; | |
| qcom,model = "msm8952-sku1-snd-card"; | |
| reg = <0xc051000 0x4 0xc051004 0x4 0xc055000 0x4 0xc052000 0x4>; | |
| reg-names = "csr_gp_io_mux_mic_ctl", "csr_gp_io_mux_spkr_ctl", "csr_gp_io_lpaif_pri_pcm_pri_mode_muxsel", "csr_gp_io_mux_quin_ctl"; | |
| qcom,msm-ext-pa = "primary"; | |
| qcom,msm-mclk-freq = <0x927c00>; | |
| qcom,msm-mbhc-hphl-swh = <0x1>; | |
| qcom,msm-mbhc-gnd-swh = <0x0>; | |
| qcom,msm-hs-micbias-type = "internal"; | |
| qcom,msm-micbias1-ext-cap; | |
| qcom,audio-routing = "RX_BIAS", "MCLK", "SPK_RX_BIAS", "MCLK", "INT_LDO_H", "MCLK", "MIC BIAS External", "Handset Mic", "MIC BIAS Internal2", "Headset Mic", "MIC BIAS External", "Secondary Mic", "AMIC1", "MIC BIAS External", "AMIC2", "MIC BIAS Internal2", "AMIC3", "MIC BIAS External", "WSA_SPK OUT", "VDD_WSA_SWITCH", "SpkrMono WSA_IN", "WSA_SPK OUT"; | |
| qcom,hdmi-dba-codec-rx; | |
| qcom,msm-gpios = "pri_i2s"; | |
| qcom,pinctrl-names = "all_off", "pri_i2s_act"; | |
| pinctrl-names = "all_off", "pri_i2s_act"; | |
| pinctrl-0 = <0x13d 0x13e>; | |
| pinctrl-1 = <0x13f 0x140>; | |
| pinctrl-2 = <0x13d 0x13e 0x141 0x142 0x143>; | |
| pinctrl-3 = <0x13f 0x140 0x141 0x142 0x143>; | |
| pinctrl-4 = <0x13d 0x13e 0x144 0x145 0x146>; | |
| pinctrl-5 = <0x13f 0x140 0x144 0x145 0x146>; | |
| pinctrl-6 = <0x13d 0x13e 0x141 0x145 0x146>; | |
| pinctrl-7 = <0x13f 0x140 0x141 0x145 0x146>; | |
| asoc-platform = <0x147 0x148 0x149 0x14a 0x14b 0x14c 0x14d 0x14e 0x14f 0x150 0x151 0x152>; | |
| asoc-platform-names = "msm-pcm-dsp.0", "msm-pcm-dsp.1", "msm-pcm-dsp.2", "msm-voip-dsp", "msm-pcm-voice", "msm-pcm-loopback", "msm-compress-dsp", "msm-pcm-hostless", "msm-pcm-afe", "msm-lsm-client", "msm-pcm-routing", "msm-pcm-lpa"; | |
| asoc-cpu = <0x153 0x154 0x155 0x156 0x157 0x158 0x159 0x15a 0x15b 0x15c 0x15d 0x15e 0x15f 0x160 0x161 0x162 0x163 0x164 0x165 0x166 0x167 0x168 0x169 0x16a 0x16b 0x16c 0x16d>; | |
| asoc-cpu-names = "msm-dai-q6-auxpcm.1", "msm-dai-q6-mi2s.0", "msm-dai-q6-mi2s.1", "msm-dai-q6-mi2s.2", "msm-dai-q6-mi2s.3", "msm-dai-q6-mi2s.5", "msm-dai-q6-mi2s.6", "msm-dai-q6-dev.16384", "msm-dai-q6-dev.16385", "msm-dai-q6-dev.16386", "msm-dai-q6-dev.16387", "msm-dai-q6-dev.16390", "msm-dai-q6-dev.16391", "msm-dai-q6-dev.16392", "msm-dai-q6-dev.16393", "msm-dai-q6-dev.12288", "msm-dai-q6-dev.12289", "msm-dai-q6-dev.12292", "msm-dai-q6-dev.12293", "msm-dai-q6-dev.224", "msm-dai-q6-dev.225", "msm-dai-q6-dev.241", "msm-dai-q6-dev.240", "msm-dai-q6-dev.32771", "msm-dai-q6-dev.32772", "msm-dai-q6-dev.32773", "msm-dai-q6-dev.32770"; | |
| qcom,cdc-us-euro-gpios; | |
| asoc-codec = <0x16e 0x16f 0x170>; | |
| asoc-codec-names = "msm-stub-codec.1", "cajon_codec", "msm-hdmi-dba-codec-rx"; | |
| ext-spk-amp-gpio = <0xa7 0x7c 0x0>; | |
| headset-gpio = <0xa7 0x81 0x0>; | |
| }; | |
| sound-9335 { | |
| status = "disabled"; | |
| compatible = "qcom,msm8952-audio-slim-codec"; | |
| qcom,model = "msm8952-tasha-snd-card"; | |
| reg = <0xc051000 0x4 0xc051004 0x4 0xc055000 0x4 0xc052000 0x4>; | |
| reg-names = "csr_gp_io_mux_mic_ctl", "csr_gp_io_mux_spkr_ctl", "csr_gp_io_lpaif_pri_pcm_pri_mode_muxsel", "csr_gp_io_mux_quin_ctl"; | |
| qcom,audio-routing = "AIF4 VI", "MCLK", "AIF4 VI", "MICBIAS_REGULATOR", "RX_BIAS", "MCLK", "MADINPUT", "MCLK", "AIF4 MAD", "MICBIAS_REGULATOR", "AMIC2", "MIC BIAS2", "MIC BIAS2", "Headset Mic", "AMIC3", "MIC BIAS2", "MIC BIAS2", "ANCRight Headset Mic", "AMIC4", "MIC BIAS2", "MIC BIAS2", "ANCLeft Headset Mic", "AMIC5", "MIC BIAS3", "MIC BIAS3", "Handset Mic", "AMIC6", "MIC BIAS4", "MIC BIAS4", "Analog Mic6", "DMIC0", "MIC BIAS1", "MIC BIAS1", "Digital Mic0", "DMIC1", "MIC BIAS1", "MIC BIAS1", "Digital Mic1", "DMIC2", "MIC BIAS3", "MIC BIAS3", "Digital Mic2", "DMIC3", "MIC BIAS3", "MIC BIAS3", "Digital Mic3", "DMIC4", "MIC BIAS4", "MIC BIAS4", "Digital Mic4", "DMIC5", "MIC BIAS4", "MIC BIAS4", "Digital Mic5", "MIC BIAS1", "MICBIAS_REGULATOR", "MIC BIAS2", "MICBIAS_REGULATOR", "MIC BIAS3", "MICBIAS_REGULATOR", "MIC BIAS4", "MICBIAS_REGULATOR", "SpkrLeft IN", "SPK1 OUT", "SpkrRight IN", "SPK2 OUT"; | |
| qcom,hdmi-dba-codec-rx; | |
| qcom,msm-gpios = "quin_i2s", "us_eu_gpio"; | |
| qcom,pinctrl-names = "all_off", "quin_act", "us_eu_gpio_act", "quin_us_eu_gpio_act"; | |
| pinctrl-names = "all_off", "quin_act", "us_eu_gpio_act", "quin_us_eu_gpio_act"; | |
| pinctrl-0 = <0x142 0x143 0x144>; | |
| pinctrl-1 = <0x145 0x146 0x144>; | |
| pinctrl-2 = <0x142 0x143 0x141>; | |
| pinctrl-3 = <0x145 0x146 0x141>; | |
| qcom,msm-mbhc-hphl-swh = <0x0>; | |
| qcom,msm-mbhc-gnd-swh = <0x0>; | |
| qcom,tasha-mclk-clk-freq = <0x927c00>; | |
| asoc-platform = <0x147 0x148 0x149 0x14a 0x14b 0x14c 0x14d 0x14e 0x14f 0x150 0x151 0x171 0x152>; | |
| asoc-platform-names = "msm-pcm-dsp.0", "msm-pcm-dsp.1", "msm-pcm-dsp.2", "msm-voip-dsp", "msm-pcm-voice", "msm-pcm-loopback", "msm-compress-dsp", "msm-pcm-hostless", "msm-pcm-afe", "msm-lsm-client", "msm-pcm-routing", "msm-cpe-lsm", "msm-pcm-lpa"; | |
| asoc-cpu = <0x153 0x156 0x157 0x158 0x15a 0x15b 0x15c 0x15d 0x172 0x173 0x15e 0x15f 0x160 0x161 0x174 0x166 0x167 0x168 0x169 0x16a 0x16b 0x16c 0x16d 0x175 0x162 0x163 0x164 0x165 0x176>; | |
| asoc-cpu-names = "msm-dai-q6-auxpcm.1", "msm-dai-q6-mi2s.2", "msm-dai-q6-mi2s.3", "msm-dai-q6-mi2s.5", "msm-dai-q6-dev.16384", "msm-dai-q6-dev.16385", "msm-dai-q6-dev.16386", "msm-dai-q6-dev.16387", "msm-dai-q6-dev.16388", "msm-dai-q6-dev.16389", "msm-dai-q6-dev.16390", "msm-dai-q6-dev.16391", "msm-dai-q6-dev.16392", "msm-dai-q6-dev.16393", "msm-dai-q6-dev.16395", "msm-dai-q6-dev.224", "msm-dai-q6-dev.225", "msm-dai-q6-dev.241", "msm-dai-q6-dev.240", "msm-dai-q6-dev.32771", "msm-dai-q6-dev.32772", "msm-dai-q6-dev.32773", "msm-dai-q6-dev.32770", "msm-dai-q6-dev.16394", "msm-dai-q6-dev.12288", "msm-dai-q6-dev.12289", "msm-dai-q6-dev.12292", "msm-dai-q6-dev.12293", "msm-dai-q6-dev.16396"; | |
| asoc-codec = <0x16e 0x170>; | |
| asoc-codec-names = "msm-stub-codec.1", "msm-hdmi-dba-codec-rx"; | |
| qcom,cdc-us-euro-gpios = <0xa7 0x3f 0x0>; | |
| qcom,wsa-max-devs = <0x2>; | |
| qcom,wsa-devs = <0x177 0x178 0x179 0x17a>; | |
| qcom,wsa-aux-dev-prefix = "SpkrLeft", "SpkrRight", "SpkrLeft", "SpkrRight"; | |
| }; | |
| wcd9xxx-irq { | |
| status = "disabled"; | |
| compatible = "qcom,wcd9xxx-irq"; | |
| interrupt-controller; | |
| #interrupt-cells = <0x1>; | |
| interrupt-names = "cdc-int"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x17b>; | |
| interrupt-parent = <0xa7>; | |
| interrupts = <0x49 0x0>; | |
| qcom,gpio-connect = <0xa7 0x49 0x0>; | |
| linux,phandle = <0xb2>; | |
| phandle = <0xb2>; | |
| }; | |
| wcd_gpio_ctrl { | |
| status = "disabled"; | |
| compatible = "qcom,wcd-gpio-ctrl"; | |
| pinctrl-names = "aud_active", "aud_sleep"; | |
| pinctrl-0 = <0x17c>; | |
| pinctrl-1 = <0x17d>; | |
| qcom,cdc-rst-n-gpio = <0xa7 0x44 0x0>; | |
| linux,phandle = <0xb3>; | |
| phandle = <0xb3>; | |
| }; | |
| audio_ext_clk { | |
| status = "disabled"; | |
| compatible = "qcom,audio-ref-clk"; | |
| clock-names = "osr_clk"; | |
| qcom,node_has_rpm_clock; | |
| #clock-cells = <0x1>; | |
| qcom,audio-ref-clk-gpio = <0xd8 0x1 0x0>; | |
| clocks = <0x2b 0xd454019f>; | |
| linux,phandle = <0xb4>; | |
| phandle = <0xb4>; | |
| }; | |
| qcom,mdss_mdp@1a00000 { | |
| compatible = "qcom,mdss_mdp"; | |
| reg = <0x1a00000 0x90000 0x1ab0000 0x1040>; | |
| reg-names = "mdp_phys", "vbif_phys"; | |
| interrupts = <0x0 0x48 0x0>; | |
| vdd-supply = <0x113>; | |
| qcom,msm-bus,name = "mdss_mdp"; | |
| qcom,msm-bus,num-cases = <0x3>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0x16 0x200 0x0 0x0 0x16 0x200 0x0 0x61a800 0x16 0x200 0x0 0x61a800>; | |
| qcom,mdss-ab-factor = <0x1 0x1>; | |
| qcom,mdss-ib-factor = <0x1 0x1>; | |
| qcom,mdss-clk-factor = <0x69 0x64>; | |
| qcom,max-mixer-width = <0x800>; | |
| qcom,max-pipe-width = <0x800>; | |
| qcom,mdss-vbif-qos-rt-setting = <0x1 0x2 0x2 0x2>; | |
| qcom,mdss-vbif-qos-nrt-setting = <0x1 0x1 0x1 0x1>; | |
| qcom,mdss-has-panic-ctrl; | |
| qcom,mdss-per-pipe-panic-luts = <0xf 0xffff 0xfffc 0xff00>; | |
| qcom,mdss-mdp-reg-offset = <0x1000>; | |
| qcom,max-bandwidth-low-kbps = <0x2f4d60>; | |
| qcom,max-bandwidth-high-kbps = <0x2f4d60>; | |
| qcom,max-bandwidth-per-pipe-kbps = <0x231860>; | |
| qcom,max-bw-settings = <0x1 0x2f4d60 0x2 0x19f0a0>; | |
| qcom,max-clk-rate = <0x1312d000>; | |
| qcom,mdss-default-ot-rd-limit = <0x20>; | |
| qcom,mdss-default-ot-wr-limit = <0x10>; | |
| qcom,mdss-pipe-vig-off = <0x5000>; | |
| qcom,mdss-pipe-rgb-off = <0x15000 0x17000>; | |
| qcom,mdss-pipe-dma-off = <0x25000>; | |
| qcom,mdss-pipe-cursor-off = <0x35000>; | |
| qcom,mdss-pipe-vig-xin-id = <0x0>; | |
| qcom,mdss-pipe-rgb-xin-id = <0x1 0x5>; | |
| qcom,mdss-pipe-dma-xin-id = <0x2>; | |
| qcom,mdss-pipe-cursor-xin-id = <0x7>; | |
| qcom,mdss-pipe-vig-clk-ctrl-offsets = <0x2ac 0x0 0x0>; | |
| qcom,mdss-pipe-rgb-clk-ctrl-offsets = <0x2ac 0x4 0x8 0x2b4 0x4 0x8>; | |
| qcom,mdss-pipe-dma-clk-ctrl-offsets = <0x2ac 0x8 0xc>; | |
| qcom,mdss-pipe-cursor-clk-ctrl-offsets = <0x3a8 0x10 0xf>; | |
| qcom,mdss-ctl-off = <0x2000 0x2200 0x2400>; | |
| qcom,mdss-mixer-intf-off = <0x45000 0x46000>; | |
| qcom,mdss-dspp-off = <0x55000>; | |
| qcom,mdss-wb-off = <0x65000 0x66000>; | |
| qcom,mdss-intf-off = <0x0 0x6b800 0x6c000>; | |
| qcom,mdss-pingpong-off = <0x71000 0x71800>; | |
| qcom,mdss-slave-pingpong-off = <0x73000>; | |
| qcom,mdss-cdm-off = <0x7a200>; | |
| qcom,mdss-wfd-mode = "intf"; | |
| qcom,mdss-highest-bank-bit = <0x1>; | |
| qcom,mdss-has-decimation; | |
| qcom,mdss-has-non-scalar-rgb; | |
| qcom,mdss-has-rotator-downscale; | |
| qcom,mdss-rot-downscale-min = <0x2>; | |
| qcom,mdss-rot-downscale-max = <0x10>; | |
| qcom,mdss-idle-power-collapse-enabled; | |
| qcom,mdss-rot-block-size = <0x40>; | |
| clocks = <0x2b 0xbfb92ed3 0x2b 0x668f51de 0x2b 0x6dc1f8f1 0x17e 0x588460a4 0x2b 0x32a09f1f>; | |
| clock-names = "iface_clk", "bus_clk", "core_clk_src", "core_clk", "vsync_clk"; | |
| qcom,mdp-settings = <0x506c 0x0 0x1506c 0x0 0x1706c 0x0 0x2506c 0x0>; | |
| qcom,vbif-settings = <0xd0 0x10>; | |
| qcom,regs-dump-mdp = <0x1000 0x1454 0x2000 0x2064 0x2200 0x2264 0x2400 0x2464 0x5000 0x5150 0x5200 0x5230 0x15000 0x15150 0x17000 0x17150 0x25000 0x25150 0x35000 0x35150 0x45000 0x452bc 0x46000 0x462bc 0x55000 0x5522c 0x65000 0x652c0 0x66000 0x662c0 0x6b800 0x6ba68 0x6c000 0x6c268 0x71000 0x710d4 0x71800 0x718d4>; | |
| qcom,regs-dump-names-mdp = "MDP", "CTL_0", "CTL_1", "CTL_2", "VIG0_SSPP", "VIG0", "RGB0_SSPP", "RGB1_SSPP", "DMA0_SSPP", "CURSOR0_SSPP", "LAYER_0", "LAYER_1", "DSPP_0", "WB_0", "WB_2", "INTF_1", "INTF_2", "PP_0", "PP_1"; | |
| qcom,mdss-prefill-outstanding-buffer-bytes = <0x0>; | |
| qcom,mdss-prefill-y-buffer-bytes = <0x0>; | |
| qcom,mdss-prefill-scaler-buffer-lines-bilinear = <0x2>; | |
| qcom,mdss-prefill-scaler-buffer-lines-caf = <0x4>; | |
| qcom,mdss-prefill-post-scaler-buffer-pixels = <0x800>; | |
| qcom,mdss-prefill-pingpong-buffer-pixels = <0x1000>; | |
| linux,phandle = <0x184>; | |
| phandle = <0x184>; | |
| qcom,mdss-pp-offsets { | |
| qcom,mdss-sspp-mdss-igc-lut-off = <0x2000>; | |
| qcom,mdss-sspp-vig-pcc-off = <0x1780>; | |
| qcom,mdss-sspp-rgb-pcc-off = <0x380>; | |
| qcom,mdss-sspp-dma-pcc-off = <0x380>; | |
| qcom,mdss-lm-pgc-off = <0x3c0>; | |
| qcom,mdss-dspp-pcc-off = <0x1700>; | |
| qcom,mdss-dspp-pgc-off = <0x17c0>; | |
| }; | |
| qcom,mdss-reg-bus { | |
| qcom,msm-bus,name = "mdss_reg"; | |
| qcom,msm-bus,num-cases = <0x4>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,active-only; | |
| qcom,msm-bus,vectors-KBps = <0x1 0x24e 0x0 0x0 0x1 0x24e 0x0 0x12c00 0x1 0x24e 0x0 0x27100 0x1 0x24e 0x0 0x4e200>; | |
| }; | |
| qcom,mdss-hw-rt-bus { | |
| qcom,msm-bus,name = "mdss_hw_rt"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0x16 0x200 0x0 0x0 0x16 0x200 0x0 0x3e8>; | |
| }; | |
| qcom,smmu_mdp_unsec_cb { | |
| compatible = "qcom,smmu_mdp_unsec"; | |
| }; | |
| qcom,smmu_mdp_sec_cb { | |
| compatible = "qcom,smmu_mdp_sec"; | |
| }; | |
| qcom,mdss_fb_primary { | |
| cell-index = <0x0>; | |
| compatible = "qcom,mdss-fb"; | |
| linux,phandle = <0x182>; | |
| phandle = <0x182>; | |
| qcom,cont-splash-memory { | |
| linux,contiguous-region = <0x17f>; | |
| }; | |
| }; | |
| qcom,mdss_fb_wfd { | |
| cell-index = <0x1>; | |
| compatible = "qcom,mdss-fb"; | |
| linux,phandle = <0x188>; | |
| phandle = <0x188>; | |
| }; | |
| qcom,mdss_fb_secondary { | |
| cell-index = <0x2>; | |
| compatible = "qcom,mdss-fb"; | |
| linux,phandle = <0x183>; | |
| phandle = <0x183>; | |
| }; | |
| qcom,mdss_dsi_sim_video { | |
| qcom,mdss-dsi-panel-name = "Simulator video mode dsi panel"; | |
| qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x0>; | |
| qcom,mdss-dsi-stream = <0x0>; | |
| qcom,mdss-dsi-panel-width = <0x280>; | |
| qcom,mdss-dsi-panel-height = <0x1e0>; | |
| qcom,mdss-dsi-h-front-porch = <0x8>; | |
| qcom,mdss-dsi-h-back-porch = <0x8>; | |
| qcom,mdss-dsi-h-pulse-width = <0x8>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-v-back-porch = <0x6>; | |
| qcom,mdss-dsi-v-front-porch = <0x6>; | |
| qcom,mdss-dsi-v-pulse-width = <0x2>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-border-color = <0x0>; | |
| qcom,mdss-dsi-on-command = [32 01 00 00 00 00 02 00 00]; | |
| qcom,mdss-dsi-off-command = [22 01 00 00 00 00 02 00 00]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-panel-timings = <0x0 0x0 0x0>; | |
| qcom,mdss-dsi-t-clk-post = <0x4>; | |
| qcom,mdss-dsi-t-clk-pre = <0x1b>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-reset-sequence = <0x1 0x0 0x0 0x0 0x1 0x0>; | |
| qcom,panel-ack-disabled; | |
| }; | |
| qcom,mdss_dsi_sim_cmd { | |
| qcom,mdss-dsi-panel-name = "Simulator cmd mode dsi panel"; | |
| qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x0>; | |
| qcom,mdss-dsi-stream = <0x0>; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-panel-height = <0x780>; | |
| qcom,mdss-dsi-h-front-porch = <0x60>; | |
| qcom,mdss-dsi-h-back-porch = <0x40>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-v-back-porch = <0x10>; | |
| qcom,mdss-dsi-v-front-porch = <0x4>; | |
| qcom,mdss-dsi-v-pulse-width = <0x1>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-color-order = "rgb_swap_rgb"; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-border-color = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-hor-line-idle = <0x0 0x28 0x100 0x28 0x78 0x80 0x78 0xf0 0x40>; | |
| qcom,mdss-dsi-panel-timings = <0xcd322200 0x60642634 0x29030400>; | |
| qcom,mdss-dsi-reset-sequence = <0x1 0xa 0x0 0xa 0x1 0xa>; | |
| qcom,mdss-dsi-t-clk-post = <0x3>; | |
| qcom,mdss-dsi-t-clk-pre = <0x27>; | |
| qcom,mdss-dsi-bl-max-level = <0xfff>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-te-pin-select = <0x1>; | |
| qcom,mdss-dsi-wr-mem-start = <0x2c>; | |
| qcom,mdss-dsi-wr-mem-continue = <0x3c>; | |
| qcom,mdss-dsi-te-dcs-command = <0x1>; | |
| qcom,mdss-dsi-te-check-enable; | |
| qcom,mdss-dsi-te-using-te-pin; | |
| qcom,mdss-dsi-on-command = <0x29010000 0x2b0 0x3050100 0xa0001 0x150100 0xa0002 0x3a773901 0xa00 0x52a0000 0x4ff3901 0xa00 0x52b0000 0x59f1501 0xa00 0x2350039 0x100000a 0x34400 0x150100 0xa0002 0x51ff1501 0xa00 0x2532415 0x100000a 0x25500 0x5010000 0x78000111 0x5010000 0x10000129>; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 32 00 02 28 00 05 01 00 00 78 00 02 10 00]; | |
| qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; | |
| qcom,panel-ack-disabled; | |
| }; | |
| qcom,mdss_dsi_truly_1080p_video { | |
| qcom,mdss-dsi-panel-name = "truly 1080p video mode dsi panel"; | |
| qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x0>; | |
| qcom,mdss-dsi-stream = <0x0>; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-panel-height = <0x780>; | |
| qcom,mdss-dsi-h-front-porch = <0x60>; | |
| qcom,mdss-dsi-h-back-porch = <0x40>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-v-back-porch = <0x10>; | |
| qcom,mdss-dsi-v-front-porch = <0x4>; | |
| qcom,mdss-dsi-v-pulse-width = <0x1>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-border-color = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-traffic-mode = "burst_mode"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-panel-timings = <0xe6382600 0x686e2a3c 0x44030400>; | |
| qcom,mdss-dsi-t-clk-post = <0x2>; | |
| qcom,mdss-dsi-t-clk-pre = <0x2d>; | |
| qcom,mdss-dsi-bl-min-level = <0x1>; | |
| qcom,mdss-dsi-bl-max-level = <0xfff>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-on-command = [15 01 00 00 00 00 02 35 00 15 01 00 00 00 00 02 51 ff 15 01 00 00 00 00 02 53 2c 15 01 00 00 00 00 02 55 00 05 01 00 00 78 00 02 11 00 23 01 00 00 00 00 02 b0 00 29 01 00 00 00 00 07 b3 14 00 00 00 00 00 29 01 00 00 00 00 03 b6 3a d3 29 01 00 00 00 00 03 c0 00 00 29 01 00 00 00 00 23 c1 84 60 10 eb ff 6f ce ff ff 17 02 58 73 ae b1 20 c6 ff ff 1f f3 ff 5f 10 10 10 10 00 02 01 22 22 00 01 29 01 00 00 00 00 08 c2 31 f7 80 06 08 00 00 29 01 00 00 00 00 17 c4 70 00 00 00 00 04 00 00 00 0c 06 00 00 00 00 00 04 00 00 00 0c 06 29 01 00 00 00 00 29 c6 00 69 00 69 00 69 00 00 00 00 00 69 00 69 00 69 10 19 07 00 01 00 69 00 69 00 69 00 00 00 00 00 69 00 69 00 69 10 19 07 29 01 00 00 00 00 0a cb 31 fc 3f 8c 00 00 00 00 c0 23 01 00 00 00 00 02 cc 0b 29 01 00 00 00 00 0b d0 11 81 bb 1e 1e 4c 19 19 0c 00 29 01 00 00 00 00 1a d3 1b 33 bb bb b3 33 33 33 00 01 00 a0 d8 a0 0d 4e 4e 33 3b 22 72 07 3d bf 33 29 01 00 00 00 00 08 d5 06 00 00 01 51 01 32 29 01 00 00 00 00 1f c7 01 0a 11 18 26 33 3e 50 38 42 52 60 67 6e 77 01 0a 11 18 26 33 3e 50 38 42 52 60 67 6e 77 29 01 00 00 14 00 14 c8 01 00 00 00 00 fc 00 00 00 00 00 fc 00 00 00 00 00 fc 00 05 01 00 00 14 00 02 29 00]; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 14 00 02 28 00 05 01 00 00 78 00 02 10 00]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; | |
| qcom,mdss-dsi-reset-sequence = <0x1 0xa 0x0 0xa 0x1 0xa>; | |
| qcom,mdss-dsi-tx-eot-append; | |
| qcom,mdss-dsi-post-init-delay = <0x1>; | |
| }; | |
| qcom,mdss_dsi_truly_1080p_cmd { | |
| qcom,mdss-dsi-panel-name = "truly 1080p cmd mode dsi panel"; | |
| qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x0>; | |
| qcom,mdss-dsi-stream = <0x0>; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-panel-height = <0x780>; | |
| qcom,mdss-dsi-h-front-porch = <0x60>; | |
| qcom,mdss-dsi-h-back-porch = <0x40>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-v-back-porch = <0x10>; | |
| qcom,mdss-dsi-v-front-porch = <0x4>; | |
| qcom,mdss-dsi-v-pulse-width = <0x1>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-border-color = <0x0>; | |
| qcom,mdss-dsi-te-pin-select = <0x1>; | |
| qcom,mdss-dsi-te-dcs-command = <0x1>; | |
| qcom,mdss-dsi-te-check-enable; | |
| qcom,mdss-dsi-te-using-te-pin; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-traffic-mode = "burst_mode"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-panel-timings = <0xe6382600 0x686e2a3c 0x44030400>; | |
| qcom,mdss-dsi-t-clk-post = <0x2>; | |
| qcom,mdss-dsi-t-clk-pre = <0x2d>; | |
| qcom,mdss-dsi-tx-eot-append; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-on-command = [23 01 00 00 00 00 02 d6 01 15 01 00 00 00 00 02 35 00 15 01 00 00 00 00 02 51 ff 15 01 00 00 00 00 02 53 2c 15 01 00 00 00 00 02 55 00 05 01 00 00 78 00 02 11 00 23 01 00 00 00 00 02 b0 04 29 01 00 00 00 00 07 b3 04 00 00 00 00 00 29 01 00 00 00 00 03 b6 3a d3 29 01 00 00 00 00 03 c0 00 00 29 01 00 00 00 00 23 c1 84 60 10 eb ff 6f ce ff ff 17 02 58 73 ae b1 20 c6 ff ff 1f f3 ff 5f 10 10 10 10 00 02 01 22 22 00 01 29 01 00 00 00 00 08 c2 31 f7 80 06 08 00 00 29 01 00 00 00 00 17 c4 70 00 00 00 00 04 00 00 00 0c 06 00 00 00 00 00 04 00 00 00 0c 06 29 01 00 00 00 00 29 c6 78 69 00 69 00 69 00 00 00 00 00 69 00 69 00 69 10 19 07 00 78 00 69 00 69 00 69 00 00 00 00 00 69 00 69 00 69 10 19 07 29 01 00 00 00 00 0a cb 31 fc 3f 8c 00 00 00 00 c0 23 01 00 00 00 00 02 cc 0b 29 01 00 00 00 00 0b d0 11 81 bb 1e 1e 4c 19 19 0c 00 29 01 00 00 00 00 1a d3 1b 33 bb bb b3 33 33 33 00 01 00 a0 d8 a0 0d 4e 4e 33 3b 22 72 07 3d bf 33 29 01 00 00 00 00 08 d5 06 00 00 01 51 01 32 29 01 00 00 00 00 1f c7 01 0a 11 18 26 33 3e 50 38 42 52 60 67 6e 77 01 0a 11 18 26 33 3e 50 38 42 52 60 67 6e 77 29 01 00 00 14 00 14 c8 01 00 00 00 00 fc 00 00 00 00 00 fc 00 00 00 00 00 fc 00 05 01 00 00 14 00 02 29 00]; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 14 00 02 28 00 05 01 00 00 78 00 02 10 00]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-bl-min-level = <0x1>; | |
| qcom,mdss-dsi-bl-max-level = <0xfff>; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; | |
| qcom,mdss-dsi-reset-sequence = <0x1 0xa 0x0 0xa 0x1 0xa>; | |
| qcom,mdss-dsi-post-init-delay = <0x1>; | |
| }; | |
| qcom,mdss_dsi_r69006_1080p_cmd { | |
| qcom,mdss-dsi-panel-name = "r69006 1080p cmd mode dsi panel"; | |
| qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x0>; | |
| qcom,mdss-dsi-stream = <0x0>; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-panel-height = <0x780>; | |
| qcom,mdss-dsi-h-front-porch = <0x64>; | |
| qcom,mdss-dsi-h-back-porch = <0x52>; | |
| qcom,mdss-dsi-h-pulse-width = <0x14>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-v-back-porch = <0x9>; | |
| qcom,mdss-dsi-v-front-porch = <0x3>; | |
| qcom,mdss-dsi-v-pulse-width = <0xf>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-border-color = <0x0>; | |
| qcom,mdss-dsi-on-command = [23 01 00 00 00 00 02 b0 00 29 01 00 00 00 00 06 b3 04 10 00 00 00 29 01 00 00 00 00 03 b4 0c 00 29 01 00 00 00 00 04 b6 3b d3 00 23 01 00 00 00 00 02 c0 00 15 01 00 00 00 00 02 36 98 23 01 00 00 00 00 02 cc 04 29 01 00 00 00 00 20 c1 84 00 10 ef 8b f1 ff ff df 9c c5 9a 73 8d ad 63 fe ff ff cb f8 01 00 aa 40 02 c2 01 08 00 01 29 01 00 00 00 00 0a cb 0d fe 1f 2c 00 00 00 00 00 29 01 00 00 00 00 0b c2 01 f7 80 04 63 00 60 00 01 30 29 01 00 00 00 00 07 c3 55 01 00 01 00 00 29 01 00 00 00 00 12 c4 70 00 00 00 00 00 00 00 00 02 01 00 05 01 00 00 00 29 01 00 00 00 00 0f c6 57 07 4a 07 4a 01 0e 01 02 01 02 09 15 07 29 01 00 00 00 00 1f c7 00 06 0c 16 27 35 3f 4d 33 3c 49 5b 64 66 67 00 06 0c 16 27 35 3f 4d 33 3c 49 5b 64 66 67 29 01 00 00 00 00 14 c8 00 00 fe 01 08 e7 00 00 fd 02 03 a8 00 00 fc e7 e9 c9 00 29 01 00 00 00 00 09 c9 1f 68 1f 68 4c 4c c4 11 29 01 00 00 00 00 11 d0 11 01 91 0b d9 19 19 00 00 00 19 99 00 00 00 00 29 01 00 00 00 00 1d d3 1b 3b bb ad a5 33 33 33 00 80 ad a8 37 33 33 33 33 f7 f2 1f 7d 7c ff 0f 99 00 ff ff 29 01 00 00 00 00 04 d4 57 33 03 29 01 00 00 00 00 0c d5 66 00 00 01 32 01 32 00 0b 00 0b 29 01 00 00 00 00 02 be 04 29 01 00 00 00 00 11 cf 40 10 00 00 00 00 32 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 06 de 00 00 3f ff 10 29 01 00 00 00 00 02 e9 00 29 01 00 00 00 00 02 f2 00 23 01 00 00 00 00 02 d6 01 39 01 00 00 00 00 02 35 00 39 01 00 00 00 00 02 51 ff 39 01 00 00 00 00 02 53 2c 39 01 00 00 00 00 02 55 00 05 01 00 00 78 00 02 11 00 05 01 00 00 14 00 02 29 00]; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 0a 00 02 28 00 29 01 00 00 00 00 1d d3 13 3b bb a5 a5 33 33 33 00 80 a4 a8 37 33 33 33 33 f7 f2 1f 7d 7c ff 0f 99 00 ff ff 05 01 00 00 5a 00 02 10 00]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-traffic-mode = "burst_mode"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-te-pin-select = <0x1>; | |
| qcom,mdss-dsi-wr-mem-start = <0x2c>; | |
| qcom,mdss-dsi-wr-mem-continue = <0x3c>; | |
| qcom,mdss-dsi-te-dcs-command = <0x1>; | |
| qcom,mdss-dsi-te-check-enable; | |
| qcom,mdss-dsi-te-using-te-pin; | |
| qcom,mdss-dsi-panel-timings = <0x6e3f3600 0x5a4f3841 0x54030400>; | |
| qcom,mdss-dsi-t-clk-post = <0x1e>; | |
| qcom,mdss-dsi-t-clk-pre = <0x30>; | |
| qcom,mdss-dsi-bl-min-level = <0x1>; | |
| qcom,mdss-dsi-bl-max-level = <0xfff>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; | |
| qcom,mdss-dsi-reset-sequence = <0x1 0xa 0x0 0xa 0x1 0xa>; | |
| qcom,mdss-dsi-panel-status-command = <0x6010001 0x500010a>; | |
| qcom,mdss-dsi-panel-status-command-mode = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-status-check-mode = "reg_read"; | |
| qcom,mdss-dsi-panel-status-read-length = <0x1>; | |
| qcom,mdss-dsi-panel-status-value = <0x1c>; | |
| qcom,mdss-dsi-panel-max-error-count = <0x3>; | |
| qcom,mdss-dsi-rx-eot-ignore; | |
| qcom,mdss-dsi-tx-eot-append; | |
| }; | |
| qcom,mdss_dsi_r69006_1080p_video { | |
| qcom,mdss-dsi-panel-name = "r69006 1080p video mode dsi panel"; | |
| qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x0>; | |
| qcom,mdss-dsi-stream = <0x0>; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-panel-height = <0x780>; | |
| qcom,mdss-dsi-h-front-porch = <0x64>; | |
| qcom,mdss-dsi-h-back-porch = <0x52>; | |
| qcom,mdss-dsi-h-pulse-width = <0x14>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-v-back-porch = <0x9>; | |
| qcom,mdss-dsi-v-front-porch = <0x3>; | |
| qcom,mdss-dsi-v-pulse-width = <0xf>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-border-color = <0x0>; | |
| qcom,mdss-dsi-on-command = [23 01 00 00 00 00 02 b0 00 29 01 00 00 00 00 06 b3 05 10 00 00 00 29 01 00 00 00 00 03 b4 0c 00 29 01 00 00 00 00 04 b6 3b c3 00 23 01 00 00 00 00 02 c0 00 15 01 00 00 00 00 02 36 98 23 01 00 00 00 00 02 cc 04 29 01 00 00 00 00 20 c1 84 00 10 ef 8b f1 ff ff df 9c c5 9a 73 8d ad 63 fe ff ff cb f8 01 00 aa 40 00 c2 01 08 00 01 29 01 00 00 00 00 0a cb 0d fe 1f 2c 00 00 00 00 00 29 01 00 00 00 00 0b c2 01 f7 80 04 63 00 60 00 01 30 29 01 00 00 00 00 07 c3 55 01 00 01 00 00 29 01 00 00 00 00 12 c4 70 00 00 00 00 00 00 00 00 02 01 00 05 01 00 00 00 29 01 00 00 00 00 0f c6 59 07 4a 07 4a 01 0e 01 02 01 02 09 15 07 29 01 00 00 00 00 1f c7 00 30 32 34 42 4e 56 62 44 4a 54 62 6b 73 7f 08 30 32 34 42 4e 56 62 44 4a 54 62 6b 73 7f 29 01 00 00 00 00 14 c8 00 00 00 00 00 fc 00 00 00 00 00 fc 00 00 00 00 00 fc 00 29 01 00 00 00 00 09 c9 1f 68 1f 68 4c 4c c4 11 29 01 00 00 00 00 11 d0 33 01 91 0b d9 19 19 00 00 00 19 99 00 00 00 00 29 01 00 00 00 00 1d d3 1b 3b bb ad a5 33 33 33 00 80 ad a8 6f 6f 33 33 33 f7 f2 1f 7d 7c ff 0f 99 00 ff ff 29 01 00 00 00 00 04 d4 57 33 03 29 01 00 00 00 00 0c d5 66 00 00 01 27 01 27 00 6d 00 6d 23 01 00 00 00 00 02 d6 81 05 01 00 00 78 00 02 11 00 05 01 00 00 78 00 02 29 00]; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 78 00 02 28 00 05 01 00 00 96 00 02 10 00]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-h-sync-pulse = <0x1>; | |
| qcom,mdss-dsi-traffic-mode = "burst_mode"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-panel-timings = <0x7d251d00 0x37332227 0x1e030400>; | |
| qcom,mdss-dsi-t-clk-post = <0x20>; | |
| qcom,mdss-dsi-t-clk-pre = <0x2c>; | |
| qcom,mdss-dsi-bl-min-level = <0x1>; | |
| qcom,mdss-dsi-bl-max-level = <0xfff>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; | |
| qcom,mdss-dsi-reset-sequence = <0x1 0x14 0x0 0x2 0x1 0x14>; | |
| qcom,mdss-dsi-panel-status-command = <0x6010001 0x500010a>; | |
| qcom,mdss-dsi-panel-status-command-mode = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-status-check-mode = "reg_read"; | |
| qcom,mdss-dsi-panel-status-read-length = <0x1>; | |
| qcom,mdss-dsi-panel-status-value = <0x1c>; | |
| qcom,mdss-dsi-panel-max-error-count = <0x3>; | |
| }; | |
| qcom,mdss_dsi_hx8394f_720p_video { | |
| qcom,mdss-dsi-panel-name = "hx8394f 720p video mode dsi panel"; | |
| qcom,mdss-dsi-panel-controller = <0x180>; | |
| qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| qcom,mdss-dsi-panel-destination = "display_1"; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x0>; | |
| qcom,mdss-dsi-stream = <0x0>; | |
| qcom,mdss-dsi-panel-width = <0x2d0>; | |
| qcom,mdss-dsi-panel-height = <0x500>; | |
| qcom,mdss-dsi-h-front-porch = <0x10>; | |
| qcom,mdss-dsi-h-back-porch = <0x10>; | |
| qcom,mdss-dsi-h-pulse-width = <0xa>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-v-back-porch = <0xc>; | |
| qcom,mdss-dsi-v-front-porch = <0xf>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-border-color = <0x0>; | |
| qcom,mdss-dsi-on-command = [39 01 00 00 00 00 04 b9 ff 83 94 39 01 00 00 00 00 07 ba 63 03 68 6b b2 c0 39 01 00 00 00 00 0b b1 50 12 72 09 33 54 b1 31 6b 2f 39 01 00 00 00 00 07 b2 00 80 64 0e 0d 2f 39 01 00 00 00 00 16 b4 73 74 73 74 73 74 01 0c 86 75 00 3f 73 74 73 74 73 74 01 0c 86 39 01 00 00 00 00 22 d3 00 00 07 07 40 07 10 00 08 10 08 00 08 54 15 0e 05 0e 02 15 06 05 06 47 44 0a 0a 4b 10 07 07 0e 40 39 01 00 00 00 00 2d d5 1a 1a 1b 1b 00 01 02 03 04 05 06 07 08 09 0a 0b 24 25 18 18 26 27 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 20 21 18 18 18 18 39 01 00 00 00 00 2d d6 1a 1a 1b 1b 0b 0a 09 08 07 06 05 04 03 02 01 00 21 20 18 18 27 26 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 25 24 18 18 18 18 39 01 00 00 00 00 3b e0 00 0c 19 20 23 26 29 28 51 61 70 6f 76 86 89 8d 99 9a 95 a1 b0 57 55 58 5c 5e 64 6b 7f 00 0c 19 20 23 26 29 28 51 61 70 6f 76 86 89 8d 99 9a 95 a1 b0 57 55 58 5c 5e 64 6b 7f 39 01 00 00 00 00 03 c0 1f 31 15 01 00 00 00 00 02 cc 0b 15 01 00 00 00 00 02 d4 02 15 01 00 00 00 00 02 bd 02 39 01 00 00 00 00 0d d8 ff ff ff ff ff ff ff ff ff ff ff ff 15 01 00 00 00 00 02 bd 00 15 01 00 00 00 00 02 bd 01 15 01 00 00 00 00 02 b1 00 15 01 00 00 00 00 02 bd 00 39 01 00 00 00 00 08 bf 40 81 50 00 1a fc 01 39 01 00 00 00 00 03 b6 7d 7d 05 01 00 00 78 00 02 11 00 39 01 00 00 00 00 0d b2 00 80 64 0e 0d 2f 00 00 00 00 c0 18 05 01 00 00 14 00 02 29 00]; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 78 00 02 28 00 05 01 00 00 96 00 02 10 00]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-h-sync-pulse = <0x1>; | |
| qcom,mdss-dsi-traffic-mode = "burst_mode"; | |
| qcom,mdss-dsi-lane-map = "lane_map_0123"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-panel-timings = <0x72160e00 0x383c121a 0x10030400>; | |
| qcom,mdss-dsi-t-clk-post = <0x4>; | |
| qcom,mdss-dsi-t-clk-pre = <0x18>; | |
| qcom,mdss-dsi-bl-min-level = <0x1>; | |
| qcom,mdss-dsi-bl-max-level = <0xfff>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; | |
| qcom,mdss-dsi-reset-sequence = <0x1 0x14 0x0 0x2 0x1 0x14>; | |
| qcom,mdss-dsi-panel-status-command = <0x6010001 0x50001d9 0x6010001 0x5000109 0x6010001 0x5000145>; | |
| qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-status-check-mode = "reg_read"; | |
| qcom,mdss-dsi-panel-status-read-length = <0x4 0x4 0x3>; | |
| qcom,mdss-dsi-panel-status-valid-params = <0x1 0x3 0x2>; | |
| qcom,mdss-dsi-panel-status-value = <0x80 0x80 0x73 0x4 0x5 0xf 0x80 0x80 0x73 0x4 0x5 0x1e>; | |
| qcom,mdss-dsi-panel-max-error-count = <0x3>; | |
| }; | |
| qcom,mdss_dsi_adv7533_1080p { | |
| label = "adv7533 1080p video mode dsi panel"; | |
| qcom,mdss-dsi-panel-name = "dsi_adv7533_1080p"; | |
| qcom,mdss-dsi-panel-controller = <0x180>; | |
| qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| qcom,mdss-dsi-panel-destination = "display_1"; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x0>; | |
| qcom,mdss-dsi-stream = <0x0>; | |
| qcom,mdss-dsi-panel-width = <0x780>; | |
| qcom,mdss-dsi-panel-height = <0x438>; | |
| qcom,mdss-dsi-h-front-porch = <0x58>; | |
| qcom,mdss-dsi-h-back-porch = <0x94>; | |
| qcom,mdss-dsi-h-pulse-width = <0x2c>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-v-back-porch = <0x24>; | |
| qcom,mdss-dsi-v-front-porch = <0x4>; | |
| qcom,mdss-dsi-v-pulse-width = <0x5>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-border-color = <0x0>; | |
| qcom,mdss-dsi-on-command = [05 01 00 00 c8 00 02 11 00 05 01 00 00 0a 00 02 29 00]; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 00 00 02 28 00 05 01 00 00 00 00 02 10 00]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-h-sync-pulse = <0x1>; | |
| qcom,mdss-dsi-traffic-mode = "non_burst_sync_pulse"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-panel-timings = <0xe6382600 0x686c2a3a 0x2c030400>; | |
| qcom,mdss-dsi-t-clk-post = <0x2>; | |
| qcom,mdss-dsi-t-clk-pre = <0x2b>; | |
| qcom,mdss-dsi-bl-min-level = <0x1>; | |
| qcom,mdss-dsi-bl-max-level = <0xfff>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-reset-sequence = <0x1 0x14 0x0 0x1 0x1 0x14>; | |
| qcom,mdss-pan-physical-width-dimension = <0xa0>; | |
| qcom,mdss-pan-physical-height-dimension = <0x5a>; | |
| qcom,mdss-dsi-force-clock-lane-hs; | |
| qcom,mdss-dsi-always-on; | |
| qcom,mdss-dsi-panel-timings-phy-v2 = <0x1d1a0305 0x10304a0 0x1d1a0305 0x10304a0 0x1d1a0305 0x10304a0 0x1d1a0305 0x10304a0 0x1d1a0305 0x10304a0>; | |
| qcom,dba-panel; | |
| qcom,bridge-name = "adv7533"; | |
| }; | |
| qcom,mdss_dsi_adv7533_720p { | |
| label = "adv7533 720p video mode dsi panel"; | |
| qcom,mdss-dsi-panel-name = "dsi_adv7533_720p"; | |
| qcom,mdss-dsi-panel-controller = <0x180>; | |
| qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| qcom,mdss-dsi-panel-destination = "display_1"; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x0>; | |
| qcom,mdss-dsi-stream = <0x0>; | |
| qcom,mdss-dsi-panel-width = <0x500>; | |
| qcom,mdss-dsi-panel-height = <0x2d0>; | |
| qcom,mdss-dsi-h-front-porch = <0x6e>; | |
| qcom,mdss-dsi-h-back-porch = <0xdc>; | |
| qcom,mdss-dsi-h-pulse-width = <0x28>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-v-back-porch = <0x14>; | |
| qcom,mdss-dsi-v-front-porch = <0x5>; | |
| qcom,mdss-dsi-v-pulse-width = <0x5>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-border-color = <0x0>; | |
| qcom,mdss-dsi-on-command = [05 01 00 00 c8 00 02 11 00 05 01 00 00 0a 00 02 29 00]; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 00 00 02 28 00 05 01 00 00 00 00 02 10 00]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-h-sync-pulse = <0x1>; | |
| qcom,mdss-dsi-traffic-mode = "non_burst_sync_pulse"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-panel-timings = <0xa4241800 0x4e521c28 0x1c030400>; | |
| qcom,mdss-dsi-t-clk-post = <0x3>; | |
| qcom,mdss-dsi-t-clk-pre = <0x20>; | |
| qcom,mdss-dsi-bl-min-level = <0x1>; | |
| qcom,mdss-dsi-bl-max-level = <0xfff>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-reset-sequence = <0x1 0x14 0x0 0x1 0x1 0x14>; | |
| qcom,mdss-pan-physical-width-dimension = <0xa0>; | |
| qcom,mdss-pan-physical-height-dimension = <0x5a>; | |
| qcom,mdss-dsi-force-clock-lane-hs; | |
| qcom,mdss-dsi-always-on; | |
| qcom,mdss-dsi-panel-timings-phy-v2 = <0x1c190203 0x10304a0 0x1c190203 0x10304a0 0x1c190203 0x10304a0 0x1c190203 0x10304a0 0x1c080203 0x10304a0>; | |
| qcom,dba-panel; | |
| qcom,bridge-name = "adv7533"; | |
| }; | |
| qcom,mdss_dsi_truly_720p_video { | |
| qcom,mdss-dsi-panel-name = "truly 720p video mode dsi panel"; | |
| qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x0>; | |
| qcom,mdss-dsi-stream = <0x0>; | |
| qcom,mdss-dsi-panel-width = <0x2d0>; | |
| qcom,mdss-dsi-panel-height = <0x500>; | |
| qcom,mdss-dsi-h-front-porch = <0x64>; | |
| qcom,mdss-dsi-h-back-porch = <0x64>; | |
| qcom,mdss-dsi-h-pulse-width = <0x6>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-v-back-porch = <0x20>; | |
| qcom,mdss-dsi-v-front-porch = <0x20>; | |
| qcom,mdss-dsi-v-pulse-width = <0x2>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-border-color = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-traffic-mode = "burst_mode"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-panel-timings = <0x872c1200 0x4044161e 0x17030400>; | |
| qcom,mdss-dsi-t-clk-post = <0x4>; | |
| qcom,mdss-dsi-t-clk-pre = <0x1b>; | |
| qcom,mdss-dsi-bl-min-level = <0x1>; | |
| qcom,mdss-dsi-bl-max-level = <0xfff>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-on-command = <0x29010000 0x6f0 0x55aa5208 0x290100 0x3 0xb1782123 0x1000000 0x2b60f 0x29010000 0x3bc 0x2901 0x0 0x6bd02b0 0x1e1e0029 0x1000000 0xbe7f2 0xe6d8ccbf 0xb2a59999 0x95290100 0xb 0xe8f2e6d8 0xccbfb2a5 0x99999529 0x1000000 0x6f055 0xaa520801 0x29010000 0x3bc 0xa0002901 0x0 0x3bda000 0x23010000 0x2ca 0x1230100 0x2 0xc00c2301 0x0 0x2be4e29 0x1000000 0x3b338 0x38290100 0x3 0xb4111129 0x1000000 0x3b605 0x5290100 0x3 0xb9454529 0x1000000 0x3ba25 0x25290100 0x3 0xc4111123 0x1000000 0x2c666 0x29010000 0x6f0 0x55aa5208 0x2230100 0x2 0xee002901 0x0 0x11b00037 0x480069 0x8a00ab 0xcb00eb 0x11c2901 0x0 0x11b10141 0x17c01aa 0x1f3022d 0x22e0263 0x29d2901 0x0 0x11b202c3 0x2f60319 0x3540385 0x3b203c1 0x3d12901 0x0 0x5b303e0 0x3e82901 0x0 0x11bc0037 0x480069 0x8a00ab 0xcb00eb 0x11c2901 0x0 0x11bd0141 0x17c01aa 0x1f3022d 0x22e0263 0x29d2901 0x0 0x11be02c3 0x2f60319 0x3540385 0x3b203c1 0x3d12901 0x0 0x5bf03e0 0x3e82901 0x0 0x11b400d1 0xd700e4 0xf100fe 0x1120126 0x1482901 0x0 0x11b50164 0x19501bd 0x2010236 0x238026c 0x2a72901 0x0 0x11b602ce 0x304032b 0x35b0389 0x3b203c1 0x3d12901 0x0 0x5b703e0 0x3e82901 0x0 0x11c000d1 0xd700e4 0xf100fe 0x1120126 0x1482901 0x0 0x11c10164 0x19501bd 0x2010236 0x238026c 0x2a72901 0x0 0x11c202ce 0x304032b 0x35b0389 0x3b203c1 0x3d12901 0x0 0x5c303e0 0x3e82901 0x0 0x11b80037 0x450061 0x7d009a 0xbb00dc 0x10b2901 0x0 0x11b90131 0x16e019e 0x1ea0224 0x2250258 0x2902901 0x0 0x11ba02b4 0x2e40304 0x344037f 0x3b203c1 0x3d12901 0x0 0x5bb03e0 0x3e82901 0x0 0x11c40037 0x450061 0x7d009a 0xbb00dc 0x10b2901 0x0 0x11c50131 0x16e019e 0x1ea0224 0x2250258 0x2902901 0x0 0x11c602b4 0x2e40304 0x344037f 0x3b203c1 0x3d12901 0x0 0x5c703e0 0x3e82901 0x0 0x6f055aa 0x52080629 0x1000000 0x3b029 0x2a290100 0x3 0xb1101229 0x1000000 0x3b214 0x16290100 0x3 0xb3181a29 0x1000000 0x3b402 0x4290100 0x3 0xb5343429 0x1000000 0x3b634 0x2e290100 0x3 0xb72e2e29 0x1000000 0x3b834 0x290100 0x3 0xb9343429 0x1000000 0x3ba34 0x34290100 0x3 0xbb013429 0x1000000 0x3bc2e 0x2e290100 0x3 0xbd2e3429 0x1000000 0x3be34 0x34290100 0x3 0xbf050329 0x1000000 0x3c01b 0x19290100 0x3 0xc1171529 0x1000000 0x3c213 0x11290100 0x3 0xc32a2929 0x1000000 0x3e52e 0x2e290100 0x3 0xc4292a29 0x1000000 0x3c51b 0x19290100 0x3 0xc6171529 0x1000000 0x3c713 0x11290100 0x3 0xc8010529 0x1000000 0x3c934 0x34290100 0x3 0xca342e29 0x1000000 0x3cb2e 0x2e290100 0x3 0xcc340329 0x1000000 0x3cd34 0x34290100 0x3 0xce343429 0x1000000 0x3cf02 0x34290100 0x3 0xd02e2e29 0x1000000 0x3d12e 0x34290100 0x3 0xd2343429 0x1000000 0x3d304 0x290100 0x3 0xd4101229 0x1000000 0x3d514 0x16290100 0x3 0xd6181a29 0x1000000 0x3d72a 0x29290100 0x3 0xe62e2e29 0x1000000 0x6d800 0x5400 0x29010000 0x6d9 0x150000 0x230100 0x2 0xe7002901 0x0 0x6f055aa 0x52080329 0x1000000 0x3b100 0x290100 0x3 0xb0000029 0x1000000 0x6b205 0x0 0x29010000 0x6b3 0x5000000 0x290100 0x6 0xb4050000 0x2901 0x0 0x6b50500 0x17000029 0x1000000 0x6b612 0x190000 0x29010000 0x6b7 0x12001900 0x290100 0x6 0xb8120019 0x2901 0x0 0x6b91200 0x19000029 0x1000000 0x6ba57 0x0 0x29010000 0x6bb 0x57000000 0x290100 0x6 0xbc75001a 0x2901 0x0 0x6bd5300 0x1a000029 0x1000000 0x5c000 0x34000029 0x1000000 0x5c100 0x34000029 0x1000000 0x5c200 0x34000029 0x1000000 0x5c300 0x34000023 0x1000000 0x2c420 0x23010000 0x2c5 0x230100 0x2 0xc6002301 0x0 0x2c70029 0x1000000 0x6f055 0xaa520805 0x23010000 0x2ed 0x30290100 0x3 0xb0170623 0x1000000 0x2b808 0x29010000 0x6bd 0x3070003 0x290100 0x3 0xb1170623 0x1000000 0x2b900 0x29010000 0x3b2 0x2301 0x0 0x2ba0029 0x1000000 0x3b317 0x6230100 0x2 0xbb0a2901 0x0 0x3b41706 0x29010000 0x3b5 0x17062901 0x0 0x3b61403 0x29010000 0x3b7 0x2301 0x0 0x2bc0223 0x1000000 0x2e506 0x23010000 0x2e6 0x6230100 0x2 0xe7002301 0x0 0x2e80623 0x1000000 0x2e906 0x23010000 0x2ea 0x6230100 0x2 0xeb002301 0x0 0x2ec0023 0x1000000 0x2c007 0x23010000 0x2c1 0x80230100 0x2 0xc2a42301 0x0 0x2c30523 0x1000000 0x2c400 0x23010000 0x2c5 0x2230100 0x2 0xc6222301 0x0 0x2c70329 0x1000000 0x3c805 0x30290100 0x3 0xc9013129 0x1000000 0x3ca03 0x21290100 0x3 0xcb012029 0x1000000 0x6d100 0x5090710 0x29010000 0x6d2 0x10050e03 0x10290100 0x6 0xd3200048 0x7102901 0x0 0x6d43000 0x43071023 0x1000000 0x2d000 0x29010000 0x4cc 0x3e29 0x1000000 0x4cd00 0x3e2901 0x0 0x4ce0000 0x2290100 0x4 0xcf000002 0x23010000 0x26f 0x11230100 0x2 0xf3011501 0x0 0x251ff15 0x1000000 0x2532c 0x15010000 0x255 0x3150100 0xc80002 0x35000501 0x7800 0x2110005 0x100000a 0x22900>; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 14 00 02 28 00 05 01 00 00 78 00 02 10 00]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; | |
| qcom,mdss-dsi-reset-sequence = <0x1 0xa 0x0 0xa 0x1 0xa>; | |
| qcom,mdss-dsi-tx-eot-append; | |
| qcom,mdss-dsi-lp11-init; | |
| qcom,mdss-dsi-post-init-delay = <0x1>; | |
| }; | |
| qcom,mdss_dsi_truly_wuxga_video { | |
| qcom,mdss-dsi-panel-name = "truly wuxga video mode dsi panel"; | |
| qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x0>; | |
| qcom,mdss-dsi-stream = <0x0>; | |
| qcom,mdss-dsi-panel-width = <0x780>; | |
| qcom,mdss-dsi-panel-height = <0x4b0>; | |
| qcom,mdss-dsi-h-front-porch = <0x60>; | |
| qcom,mdss-dsi-h-back-porch = <0x40>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-v-back-porch = <0x10>; | |
| qcom,mdss-dsi-v-front-porch = <0x4>; | |
| qcom,mdss-dsi-v-pulse-width = <0x1>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-border-color = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-traffic-mode = "burst_mode"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-panel-timings = <0xf33a2600 0x6c6e2c3e 0x2f030400>; | |
| qcom,mdss-dsi-t-clk-post = <0x2>; | |
| qcom,mdss-dsi-t-clk-pre = <0x2d>; | |
| qcom,mdss-dsi-bl-min-level = <0x1>; | |
| qcom,mdss-dsi-bl-max-level = <0xfff>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-on-command = [32 01 00 00 00 00 02 00 00]; | |
| qcom,mdss-dsi-off-command = [22 01 00 00 00 00 02 00 00]; | |
| qcom,mdss-dsi-on-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; | |
| qcom,mdss-dsi-reset-sequence = <0x1 0xc8 0x0 0xc8 0x1 0xc8>; | |
| }; | |
| qcom,mdss_dsi_truly_720p_cmd { | |
| qcom,mdss-dsi-panel-name = "truly 720p cmd mode dsi panel"; | |
| qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x0>; | |
| qcom,mdss-dsi-stream = <0x0>; | |
| qcom,mdss-dsi-panel-width = <0x2d0>; | |
| qcom,mdss-dsi-panel-height = <0x500>; | |
| qcom,mdss-dsi-h-front-porch = <0x64>; | |
| qcom,mdss-dsi-h-back-porch = <0x64>; | |
| qcom,mdss-dsi-h-pulse-width = <0x6>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-v-back-porch = <0x20>; | |
| qcom,mdss-dsi-v-front-porch = <0x20>; | |
| qcom,mdss-dsi-v-pulse-width = <0x2>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-border-color = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-traffic-mode = "burst_mode"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-panel-timings = <0x872c1200 0x4044161e 0x17030400>; | |
| qcom,mdss-dsi-t-clk-post = <0x4>; | |
| qcom,mdss-dsi-t-clk-pre = <0x1b>; | |
| qcom,mdss-dsi-bl-min-level = <0x1>; | |
| qcom,mdss-dsi-bl-max-level = <0xfff>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-te-pin-select = <0x1>; | |
| qcom,mdss-dsi-te-dcs-command = <0x1>; | |
| qcom,mdss-dsi-te-check-enable; | |
| qcom,mdss-dsi-te-using-te-pin; | |
| qcom,mdss-dsi-on-command = <0x29010000 0x6f0 0x55aa5208 0x290100 0x3 0xb1782123 0x1000000 0x2b60f 0x29010000 0x3bc 0x2901 0x0 0x6bd0267 0x20200029 0x1000000 0xbe7f2 0xe6d8ccbf 0xb2a59999 0x95290100 0xb 0xe8f2e6d8 0xccbfb2a5 0x99999529 0x1000000 0x6f055 0xaa520801 0x29010000 0x3bc 0xa0002901 0x0 0x3bda000 0x23010000 0x2ca 0x1230100 0x2 0xc00c2301 0x0 0x2be4e29 0x1000000 0x3b338 0x38290100 0x3 0xb4111129 0x1000000 0x3b605 0x5290100 0x3 0xb9454529 0x1000000 0x3ba25 0x25290100 0x3 0xc4111123 0x1000000 0x2c666 0x29010000 0x6f0 0x55aa5208 0x2230100 0x2 0xee002901 0x0 0x11b00037 0x480069 0x8a00ab 0xcb00eb 0x11c2901 0x0 0x11b10141 0x17c01aa 0x1f3022d 0x22e0263 0x29d2901 0x0 0x11b202c3 0x2f60319 0x3540385 0x3b203c1 0x3d12901 0x0 0x5b303e0 0x3e82901 0x0 0x11bc0037 0x480069 0x8a00ab 0xcb00eb 0x11c2901 0x0 0x11bd0141 0x17c01aa 0x1f3022d 0x22e0263 0x29d2901 0x0 0x11be02c3 0x2f60319 0x3540385 0x3b203c1 0x3d12901 0x0 0x5bf03e0 0x3e82901 0x0 0x11b400d1 0xd700e4 0xf100fe 0x1120126 0x1482901 0x0 0x11b50164 0x19501bd 0x2010236 0x238026c 0x2a72901 0x0 0x11b602ce 0x304032b 0x35b0389 0x3b203c1 0x3d12901 0x0 0x5b703e0 0x3e82901 0x0 0x11c000d1 0xd700e4 0xf100fe 0x1120126 0x1482901 0x0 0x11c10164 0x19501bd 0x2010236 0x238026c 0x2a72901 0x0 0x11c202ce 0x304032b 0x35b0389 0x3b203c1 0x3d12901 0x0 0x5c303e0 0x3e82901 0x0 0x11b80037 0x450061 0x7d009a 0xbb00dc 0x10b2901 0x0 0x11b90131 0x16e019e 0x1ea0224 0x2250258 0x2902901 0x0 0x11ba02b4 0x2e40304 0x344037f 0x3b203c1 0x3d12901 0x0 0x5bb03e0 0x3e82901 0x0 0x11c40037 0x450061 0x7d009a 0xbb00dc 0x10b2901 0x0 0x11c50131 0x16e019e 0x1ea0224 0x2250258 0x2902901 0x0 0x11c602b4 0x2e40304 0x344037f 0x3b203c1 0x3d12901 0x0 0x5c703e0 0x3e82901 0x0 0x6f055aa 0x52080629 0x1000000 0x3b029 0x2a290100 0x3 0xb1101229 0x1000000 0x3b214 0x16290100 0x3 0xb3181a29 0x1000000 0x3b402 0x4290100 0x3 0xb5343429 0x1000000 0x3b634 0x2e290100 0x3 0xb72e2e29 0x1000000 0x3b834 0x290100 0x3 0xb9343429 0x1000000 0x3ba34 0x34290100 0x3 0xbb013429 0x1000000 0x3bc2e 0x2e290100 0x3 0xbd2e3429 0x1000000 0x3be34 0x34290100 0x3 0xbf050329 0x1000000 0x3c01b 0x19290100 0x3 0xc1171529 0x1000000 0x3c213 0x11290100 0x3 0xc32a2929 0x1000000 0x3e52e 0x2e290100 0x3 0xc4292a29 0x1000000 0x3c51b 0x19290100 0x3 0xc6171529 0x1000000 0x3c713 0x11290100 0x3 0xc8010529 0x1000000 0x3c934 0x34290100 0x3 0xca342e29 0x1000000 0x3cb2e 0x2e290100 0x3 0xcc340329 0x1000000 0x3cd34 0x34290100 0x3 0xce343429 0x1000000 0x3cf02 0x34290100 0x3 0xd02e2e29 0x1000000 0x3d12e 0x34290100 0x3 0xd2343429 0x1000000 0x3d304 0x290100 0x3 0xd4101229 0x1000000 0x3d514 0x16290100 0x3 0xd6181a29 0x1000000 0x3d72a 0x29290100 0x3 0xe62e2e29 0x1000000 0x6d800 0x5400 0x29010000 0x6d9 0x150000 0x230100 0x2 0xe7002901 0x0 0x6f055aa 0x52080329 0x1000000 0x3b100 0x290100 0x3 0xb0000029 0x1000000 0x6b205 0x0 0x29010000 0x6b3 0x5000000 0x290100 0x6 0xb4050000 0x2901 0x0 0x6b50500 0x17000029 0x1000000 0x6b612 0x190000 0x29010000 0x6b7 0x12001900 0x290100 0x6 0xb8120019 0x2901 0x0 0x6b91200 0x19000029 0x1000000 0x6ba57 0x0 0x29010000 0x6bb 0x57000000 0x290100 0x6 0xbc75001a 0x2901 0x0 0x6bd5300 0x1a000029 0x1000000 0x5c000 0x34000029 0x1000000 0x5c100 0x34000029 0x1000000 0x5c200 0x34000029 0x1000000 0x5c300 0x34000023 0x1000000 0x2c420 0x23010000 0x2c5 0x230100 0x2 0xc6002301 0x0 0x2c70029 0x1000000 0x6f055 0xaa520805 0x23010000 0x2ed 0x30290100 0x3 0xb0170623 0x1000000 0x2b808 0x29010000 0x6bd 0x3070003 0x290100 0x3 0xb1170623 0x1000000 0x2b900 0x29010000 0x3b2 0x2301 0x0 0x2ba0029 0x1000000 0x3b317 0x6230100 0x2 0xbb0a2901 0x0 0x3b41706 0x29010000 0x3b5 0x17062901 0x0 0x3b61403 0x29010000 0x3b7 0x2301 0x0 0x2bc0223 0x1000000 0x2e506 0x23010000 0x2e6 0x6230100 0x2 0xe7002301 0x0 0x2e80623 0x1000000 0x2e906 0x23010000 0x2ea 0x6230100 0x2 0xeb002301 0x0 0x2ec0023 0x1000000 0x2c007 0x23010000 0x2c1 0x80230100 0x2 0xc2a42301 0x0 0x2c30523 0x1000000 0x2c400 0x23010000 0x2c5 0x2230100 0x2 0xc6222301 0x0 0x2c70329 0x1000000 0x3c805 0x30290100 0x3 0xc9013129 0x1000000 0x3ca03 0x21290100 0x3 0xcb012029 0x1000000 0x6d100 0x5090710 0x29010000 0x6d2 0x10050e03 0x10290100 0x6 0xd3200048 0x7102901 0x0 0x6d43000 0x43071023 0x1000000 0x2d000 0x29010000 0x4cc 0x3e29 0x1000000 0x4cd00 0x3e2901 0x0 0x4ce0000 0x2290100 0x4 0xcf000002 0x23010000 0x26f 0x11230100 0x2 0xf3011501 0x0 0x251ff15 0x1000000 0x2532c 0x15010000 0x255 0x3150100 0xc80002 0x35000501 0x7800 0x2110005 0x100000a 0x22900>; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 14 00 02 28 00 05 01 00 00 78 00 02 10 00]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; | |
| qcom,mdss-dsi-reset-sequence = <0x1 0xa 0x0 0xa 0x1 0xa>; | |
| qcom,mdss-dsi-tx-eot-append; | |
| qcom,mdss-dsi-lp11-init; | |
| qcom,mdss-dsi-post-init-delay = <0x1>; | |
| qcom,mdss-dsi-wr-mem-start = <0x2c>; | |
| qcom,mdss-dsi-wr-mem-continue = <0x3c>; | |
| }; | |
| qcom,mdss_dsi_lead_fl10802_fwvga_video { | |
| qcom,mdss-dsi-panel-name = "lead fl10802 fwvga video mode dsi panel"; | |
| qcom,mdss-dsi-panel-controller = <0x180>; | |
| qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| qcom,mdss-dsi-panel-destination = "display_1"; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x0>; | |
| qcom,mdss-dsi-stream = <0x0>; | |
| qcom,mdss-pan-physical-height-dimension = <0x6e>; | |
| qcom,mdss-pan-physical-width-dimension = <0x3e>; | |
| qcom,mdss-dsi-panel-width = <0x1e0>; | |
| qcom,mdss-dsi-panel-height = <0x356>; | |
| qcom,mdss-dsi-h-front-porch = <0x5e>; | |
| qcom,mdss-dsi-h-back-porch = <0x54>; | |
| qcom,mdss-dsi-h-pulse-width = <0x3c>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-v-back-porch = <0xc>; | |
| qcom,mdss-dsi-v-front-porch = <0x12>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-color-order = "rgb_swap_rgb"; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-border-color = <0x0>; | |
| qcom,mdss-dsi-on-command = [29 01 00 00 00 00 04 b9 f1 08 01 29 01 00 00 00 00 08 b1 2a 1a 1a 87 30 01 ab 29 01 00 00 00 00 02 b2 22 29 01 00 00 00 00 09 b3 01 00 06 06 18 13 39 35 29 01 00 00 00 00 12 ba 31 00 44 25 91 0a 00 00 c1 00 00 00 0d 02 4f b9 ee 29 01 00 00 00 00 06 e3 09 09 03 03 00 29 01 00 00 00 00 02 b4 00 29 01 00 00 00 00 03 b5 07 07 29 01 00 00 00 00 03 b6 32 32 29 01 00 00 00 00 03 b8 64 22 29 01 00 00 00 00 02 c7 a0 29 01 00 00 00 00 03 c8 10 00 29 01 00 00 00 00 02 cc 00 29 01 00 00 00 00 02 bc 47 29 01 00 00 00 00 34 e9 00 00 09 03 65 0a 8a 10 01 00 37 0d 0a 8a 37 00 00 18 00 00 00 25 09 80 40 00 42 60 00 00 00 09 81 50 01 53 70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 13 ea 94 00 00 00 08 95 10 07 35 10 00 00 00 08 94 00 06 24 29 01 00 00 00 00 23 e0 00 00 11 0f 10 2a 26 34 0c 0f 10 14 17 14 16 13 17 00 00 11 0f 10 2a 26 34 0c 0f 10 14 17 14 16 13 17 39 01 00 00 00 00 02 53 24 05 01 00 00 78 00 02 11 00 05 01 00 00 78 00 02 29 00]; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 32 00 02 28 00 05 01 00 00 78 00 02 10 00]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-traffic-mode = "burst_mode"; | |
| qcom,mdss-dsi-lane-map = "lane_map_0123"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lp11-init; | |
| qcom,mdss-dsi-init-delay-us = <0x1b58>; | |
| qcom,mdss-dsi-panel-timings = <0x871c1200 0x42441820 0x17030400>; | |
| qcom,mdss-dsi-t-clk-post = <0x4>; | |
| qcom,mdss-dsi-t-clk-pre = <0x1b>; | |
| qcom,mdss-dsi-bl-min-level = <0x1>; | |
| qcom,mdss-dsi-bl-max-level = <0xff>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; | |
| qcom,mdss-dsi-reset-sequence = <0x1 0x14 0x0 0xa 0x1 0x14>; | |
| }; | |
| qcom,mdss_dsi_icn9706_720_1440p_video { | |
| qcom,mdss-dsi-panel-name = "icn9706 720 1440p video mode dsi panel"; | |
| qcom,mdss-dsi-panel-controller = <0x180>; | |
| qcom,mdss-dsi-panel-destination = "display_1"; | |
| qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x0>; | |
| qcom,mdss-dsi-stream = <0x0>; | |
| qcom,mdss-dsi-panel-width = <0x2d0>; | |
| qcom,mdss-dsi-panel-height = <0x5a0>; | |
| qcom,mdss-dsi-h-front-porch = <0x54>; | |
| qcom,mdss-dsi-h-back-porch = <0x54>; | |
| qcom,mdss-dsi-h-pulse-width = <0x18>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-v-back-porch = <0x14>; | |
| qcom,mdss-dsi-v-front-porch = <0x18>; | |
| qcom,mdss-dsi-v-pulse-width = <0x8>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-border-color = <0x0>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x1>; | |
| qcom,mdss-dsi-traffic-mode = "burst_mode"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-lane-map = "lane_map_0123"; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-panel-timings = <0x8b1e1400 0x44481822 0x19030400>; | |
| qcom,mdss-dsi-t-clk-post = <0x4>; | |
| qcom,mdss-dsi-t-clk-pre = <0x1c>; | |
| qcom,mdss-dsi-bl-min-level = <0x1>; | |
| qcom,mdss-dsi-bl-max-level = <0xfff>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-on-command = <0x39010000 0x64000201 0x390100 0x3 0xf05a5a39 0x1000000 0x3f15a 0x5a390100 0x3 0xf0b44b39 0x1000000 0x3b610 0x10390100 0x15 0xb40a0812 0x100e0c00 0x300 0x3030303 0x3030304 0x6390100 0x15 0xb30b0913 0x110f0d00 0x300 0x3030303 0x3030305 0x7390100 0xd 0xb0543223 0x45444444 0x44600160 0x1390100 0x9 0xb1328402 0x83150157 0x1390100 0x2 0xb2333901 0x0 0x7bd5414 0x6a6a2019 0x39010000 0x12b7 0x1010911 0xd15190d 0x211d0000 0x200002ff 0x3c390100 0x6 0xb8230130 0x34533901 0x0 0x5b9a12c 0xffc43901 0x0 0x3ba8823 0x39010000 0x7c1 0x1616040c 0x10043901 0x0 0x3c21268 0x39010000 0x4c3 0x22310439 0x1000000 0x6c705 0x236b4100 0x39010000 0x27c8 0x7c543d2d 0x26161b08 0x25282d4f 0x3e483d3d 0x3525067c 0x543d2d26 0x161b0825 0x282d4f3e 0x483d3d35 0x25063901 0x0 0x9c60000 0x68000060 0x36000501 0x6400 0x2110005 0x1000032 0x22900>; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 32 00 02 28 00 05 01 00 00 32 00 02 10 00]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,esd-check-enabled; | |
| qcom,mdss-dsi-panel-status-check-mode = "bta_check"; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; | |
| qcom,mdss-dsi-reset-sequence = <0x1 0x2 0x0 0x14 0x1 0x32>; | |
| qcom,mdss-dsi-tx-eot-append; | |
| qcom,mdss-pan-physical-width-dimension = <0x3f>; | |
| qcom,mdss-pan-physical-height-dimension = <0x70>; | |
| }; | |
| qcom,mdss_dsi_hx8394f_boe_720p_video { | |
| qcom,mdss-dsi-panel-name = "hx8394F_HD720p_video_BOE"; | |
| qcom,mdss-dsi-panel-controller = <0x180>; | |
| qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| qcom,mdss-dsi-panel-destination = "display_1"; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x0>; | |
| qcom,mdss-dsi-stream = <0x0>; | |
| qcom,mdss-dsi-panel-width = <0x2d0>; | |
| qcom,mdss-dsi-panel-height = <0x500>; | |
| qcom,mdss-dsi-h-front-porch = <0xa0>; | |
| qcom,mdss-dsi-h-back-porch = <0xa0>; | |
| qcom,mdss-dsi-h-pulse-width = <0x18>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-v-back-porch = <0xc>; | |
| qcom,mdss-dsi-v-front-porch = <0xf>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-color-order = "rgb_swap_rgb"; | |
| qcom,mdss-dsi-underflow-color = <0x0>; | |
| qcom,mdss-dsi-border-color = <0x0>; | |
| qcom,mdss-dsi-on-command = [39 01 00 00 00 00 04 b9 ff 83 94 05 01 00 00 78 00 02 11 00 05 01 00 00 14 00 02 29 00]; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 32 00 02 28 00 05 01 00 00 78 00 02 10 00]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-panel-warm-command = [39 01 00 00 00 00 3b e0 07 08 09 0d 10 14 16 13 24 36 48 4a 58 6f 76 80 97 a5 a8 b5 c6 62 63 68 6f 72 78 7f 7f 00 02 08 0d 0c 0e 0f 10 24 36 48 4a 58 6f 78 82 99 a4 a0 b1 c0 5e 5e 64 6b 6c 73 7f 7f 39 01 00 00 00 00 02 bd 00 39 01 00 00 00 00 2c c1 01 00 0c 18 24 30 3a 43 4a 52 59 5f 66 6d 74 7b 83 8a 91 99 a0 a7 ae b5 bc c3 ca d1 d9 e0 e7 ef f7 ff 15 b3 59 b8 1e 00 ac 63 c0 39 01 00 00 00 00 02 bd 01 39 01 00 00 00 00 2b c1 00 0b 16 21 2c 36 3e 46 4d 54 5a 60 66 6c 73 79 7f 86 8d 93 9b a0 a6 ad b3 b9 bf c6 cd d3 da e0 e6 06 9d 40 21 e3 3c 6e 62 c0 39 01 00 00 00 00 02 bd 02 39 01 00 00 00 00 2b c1 00 0a 14 1e 28 32 3b 43 4a 51 57 5d 62 69 6f 75 7b 82 88 8f 95 9c a2 a7 ae b4 ba c0 c6 cd d2 d9 de 16 be 95 db cd e3 01 8c c0 39 01 00 00 00 00 02 bd 00]; | |
| qcom,mdss-dsi-panel-cool-command = [39 01 00 00 00 00 3b e0 07 08 09 0d 10 14 16 13 24 36 48 4a 58 6f 76 80 97 a5 a8 b5 c6 62 63 68 6f 72 78 7f 7f 00 02 08 0d 0c 0e 11 10 24 36 48 4a 58 6f 78 82 99 a4 a0 b1 c0 5e 5e 64 6b 6c 73 7f 7f 39 01 00 00 00 00 02 bd 00 39 01 00 00 00 00 2c c1 01 00 0a 14 1e 28 32 3c 43 4b 52 59 5f 66 6d 74 7b 82 8a 92 9a a0 a8 af b7 bd c7 ce d5 dd e6 ee f7 ff 16 e3 11 59 a4 8d c3 84 c0 39 01 00 00 00 00 02 bd 01 39 01 00 00 00 00 2b c1 00 0a 13 1d 27 31 3b 43 4a 51 57 5e 64 6b 72 79 80 87 8f 97 9e a4 ab b3 ba c1 c9 d0 d7 df e6 ee f6 0f f0 1d aa b4 7c 01 c8 00 39 01 00 00 00 00 02 bd 02 39 01 00 00 00 00 2b c1 00 0a 13 1d 27 32 3c 44 4c 53 5a 60 68 6f 76 7d 85 8c 94 9c a3 aa b2 b9 c0 c8 d0 d8 df e7 ee f6 fe 0e 56 27 1b 7e b5 f8 8b 00 39 01 00 00 00 00 02 bd 00]; | |
| qcom,mdss-dsi-panel-nature-command = [39 01 00 00 00 00 3b e0 07 08 09 0d 10 14 16 13 24 36 48 4a 58 6f 76 80 97 a5 a8 b5 c6 62 63 68 6f 72 78 7f 7f 00 02 08 0d 0c 0e 0f 10 24 36 48 4a 58 6f 78 82 99 a4 a0 b1 c0 5e 5e 64 6b 6c 73 7f 7f 39 01 00 00 00 00 02 bd 00 39 01 00 00 00 00 2c c1 01 00 0a 14 1e 28 32 3b 43 4a 52 58 5f 65 6d 74 7b 82 8a 92 99 a1 a8 ae b6 be c5 cd d6 dc e5 ed f6 ff 15 8f c9 c5 97 4f 3c cb c0 39 01 00 00 00 00 02 bd 01 39 01 00 00 00 00 2b c1 00 09 13 1d 26 30 39 41 48 4f 55 5c 62 68 6f 76 7d 84 8b 92 9a a0 a7 ae b5 bc c3 cb d2 d9 e0 e7 ef 24 85 5c 39 07 79 44 1a 80 39 01 00 00 00 00 02 bd 02 39 01 00 00 00 00 2b c1 00 09 12 1b 24 2e 38 41 48 4f 56 5c 62 69 70 77 7e 85 8c 93 9b a2 a8 af b6 bd c4 cc d3 da e1 e8 f0 15 7c 62 a9 1b 8b 4c 2e 00 39 01 00 00 00 00 02 bd 00]; | |
| qcom,mdss-dsi-panel-gamma-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-ce-std-command = [39 01 00 00 0a 00 03 e4 01 00]; | |
| qcom,mdss-dsi-panel-ce-vivid-command = [39 01 00 00 14 00 03 e4 01 42 39 01 00 00 14 00 20 e5 00 04 0b 08 01 00 00 00 00 00 00 05 1d 19 1f 05 ed 09 20 05 08 0a 0b 02 01 08 08 07 02 04 02 39 01 00 00 14 00 16 e6 00 08 00 05 05 10 10 10 20 20 20 10 10 10 10 10 03 b0 01 0f 11]; | |
| qcom,mdss-dsi-panel-ce-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-h-sync-pulse = <0x1>; | |
| qcom,mdss-dsi-traffic-mode = "burst_mode"; | |
| qcom,mdss-dsi-lane-map = "lane_map_0123"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-panel-timings = <0x8c1e1400 0x46481a22 0x18030400>; | |
| qcom,mdss-dsi-t-clk-post = <0x4>; | |
| qcom,mdss-dsi-t-clk-pre = <0x1c>; | |
| qcom,esd-check-enabled; | |
| qcom,mdss-dsi-panel-status-command = <0x6010001 0x50001d9 0x6010001 0x5000109>; | |
| qcom,mdss-dsi-panel-status-command-num = <0x2>; | |
| qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-panel-status-check-mode = "reg_read"; | |
| qcom,mdss-dsi-panel-status-read-length = <0x4 0x4>; | |
| qcom,mdss-dsi-panel-status-valid-params = <0x1 0x3>; | |
| qcom,mdss-dsi-panel-status-value = <0x80 0x80 0x73 0x4 0x80 0x80 0x73 0x4>; | |
| qcom,mdss-dsi-bl-min-level = <0x1>; | |
| qcom,mdss-dsi-bl-max-level = <0xfff>; | |
| qcom,mdss-night-brightness = <0x8 0x1a 0x2c 0x3e>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; | |
| qcom,mdss-dsi-reset-sequence = <0x1 0x32 0x0 0x14 0x1 0x5>; | |
| qcom,mdss-pan-physical-width-dimension = <0x3e>; | |
| qcom,mdss-pan-physical-height-dimension = <0x6e>; | |
| qcom,mdss-dsi-lp11-init; | |
| qcom,mdss-dsi-init-delay-us = <0xc350>; | |
| qcom,mdss-dsi-tx-eot-append; | |
| qcom,panel-supply-entries = <0x181>; | |
| linux,phandle = <0x185>; | |
| phandle = <0x185>; | |
| }; | |
| qcom,mdss_dsi_nt35521s_ebbg_720p_video { | |
| qcom,mdss-dsi-panel-name = "nt35521s_HD720p_video_EBBG"; | |
| qcom,mdss-dsi-panel-controller = <0x180>; | |
| qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| qcom,mdss-dsi-panel-destination = "display_1"; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x0>; | |
| qcom,mdss-dsi-stream = <0x0>; | |
| qcom,mdss-dsi-panel-width = <0x2d0>; | |
| qcom,mdss-dsi-panel-height = <0x500>; | |
| qcom,mdss-pan-physical-width-dimension = <0x3e>; | |
| qcom,mdss-pan-physical-height-dimension = <0x6e>; | |
| qcom,mdss-dsi-h-front-porch = <0xc8>; | |
| qcom,mdss-dsi-h-back-porch = <0xc8>; | |
| qcom,mdss-dsi-h-pulse-width = <0x14>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-v-back-porch = <0x1c>; | |
| qcom,mdss-dsi-v-front-porch = <0x23>; | |
| qcom,mdss-dsi-v-pulse-width = <0x2>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| qcom,mdss-dsi-v-bottom-border = <0x14>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-underflow-color = <0x0>; | |
| qcom,mdss-dsi-border-color = <0x0>; | |
| qcom,mdss-dsi-on-command = <0x29010000 0x6f0 0x55aa5208 0x290100 0x2 0xb16c2901 0x0 0x2c88329 0x1000000 0x26f02 0x29010000 0x2b2 0x2290100 0x5 0xffaa5525 0x1290100 0x2 0x6f102901 0x0 0x2f71d29 0x1000000 0x26f14 0x29010000 0x2f7 0x40290100 0x5 0xffaa5525 0x290100 0x2 0x35000501 0x7800 0x2110005 0x1000020 0x22900>; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 00 00 02 28 00 05 01 00 00 78 00 02 10 00]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-warm-command = [29 01 00 00 00 00 06 f0 55 aa 52 08 00 29 01 00 00 00 00 02 26 01 29 01 00 00 00 00 02 26 02]; | |
| qcom,mdss-dsi-panel-cool-command = [29 01 00 00 00 00 06 f0 55 aa 52 08 00 29 01 00 00 00 00 02 26 02 29 01 00 00 00 00 02 26 04]; | |
| qcom,mdss-dsi-panel-nature-command = [29 01 00 00 00 00 06 f0 55 aa 52 08 00 29 01 00 00 00 00 02 26 02 29 01 00 00 00 00 02 26 01]; | |
| qcom,mdss-dsi-panel-gamma-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-ce-std-command = [29 00 00 00 00 00 06 f0 55 aa 52 08 00 29 01 00 00 00 00 02 55 00]; | |
| qcom,mdss-dsi-panel-ce-vivid-command = [29 00 00 00 00 00 06 f0 55 aa 52 08 00 29 01 00 00 00 00 02 55 80]; | |
| qcom,mdss-dsi-panel-ce-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-init-last; | |
| qcom,mdss-dsi-h-sync-pulse = <0x1>; | |
| qcom,mdss-dsi-traffic-mode = "burst_mode"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-panel-timings = <0x98221600 0x4a4c1c26 0x19030400>; | |
| qcom,mdss-dsi-t-clk-post = <0x4>; | |
| qcom,mdss-dsi-t-clk-pre = <0x1e>; | |
| qcom,mdss-dsi-bl-min-level = <0x1>; | |
| qcom,mdss-dsi-bl-max-level = <0xfff>; | |
| qcom,mdss-night-brightness = <0x8 0x1a 0x2c 0x3e>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; | |
| qcom,mdss-dsi-reset-sequence = <0x1 0x14 0x0 0x14 0x1 0x14>; | |
| qcom,mdss-dsi-hbp-power-mode; | |
| qcom,esd-check-enabled; | |
| qcom,mdss-dsi-panel-status-command = [06 01 00 01 05 00 02 0a 08]; | |
| qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-status-check-mode = "reg_read"; | |
| qcom,mdss-dsi-panel-status-value = <0x9c>; | |
| qcom,mdss-dsi-panel-status-read-length = <0x1>; | |
| qcom,mdss-dsi-lp11-init; | |
| qcom,mdss-dsi-init-delay-us = <0xc350>; | |
| qcom,panel-supply-entries = <0x181>; | |
| linux,phandle = <0x186>; | |
| phandle = <0x186>; | |
| }; | |
| qcom,mdss_dsi_ili9881c_tianma_720p_video { | |
| qcom,mdss-dsi-panel-name = "ili9881c_HD720p_video_Tianma"; | |
| qcom,mdss-dsi-panel-controller = <0x180>; | |
| qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| qcom,mdss-dsi-panel-destination = "display_1"; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x0>; | |
| qcom,mdss-dsi-stream = <0x0>; | |
| qcom,mdss-dsi-panel-width = <0x2d0>; | |
| qcom,mdss-dsi-panel-height = <0x500>; | |
| qcom,mdss-pan-physical-width-dimension = <0x3e>; | |
| qcom,mdss-pan-physical-height-dimension = <0x6e>; | |
| qcom,mdss-dsi-h-front-porch = <0x72>; | |
| qcom,mdss-dsi-h-back-porch = <0xb4>; | |
| qcom,mdss-dsi-h-pulse-width = <0x8>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-v-back-porch = <0x12>; | |
| qcom,mdss-dsi-v-front-porch = <0xa>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-underflow-color = <0x0>; | |
| qcom,mdss-dsi-border-color = <0x0>; | |
| qcom,mdss-dsi-on-command = [39 01 00 00 00 00 04 ff 98 81 00 39 01 00 00 78 00 02 11 00 39 01 00 00 0a 00 02 29 00]; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 1f 00 02 28 00 05 01 00 00 8c 00 02 10 00]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-warm-command = <0x39000000 0x4ff 0x98810439 0x0 0x221b2 0x39000000 0x232 0x1390000 0x4 0xff988101 0x39000000 0x250 0x96390000 0x2 0x51963900 0x0 0x2340139 0x0 0x2a008 0x39000000 0x2a1 0x17390000 0x2 0xa2263900 0x0 0x2a31439 0x0 0x2a417 0x39000000 0x2a5 0x2a390000 0x2 0xa61e3900 0x0 0x2a71f39 0x0 0x2a894 0x39000000 0x2a9 0x1d390000 0x2 0xaa293900 0x0 0x2ab8a39 0x0 0x2ac1c 0x39000000 0x2ad 0x1a390000 0x2 0xae4e3900 0x0 0x2af2139 0x0 0x2b026 0x39000000 0x2b1 0x59390000 0x2 0xb2693900 0x0 0x2b33939 0x0 0x2c007 0x39000000 0x2c1 0x16390000 0x2 0xc2253900 0x0 0x2c31439 0x0 0x2c418 0x39000000 0x2c5 0x2a390000 0x2 0xc61e3900 0x0 0x2c71f39 0x0 0x2c893 0x39000000 0x2c9 0x1d390000 0x2 0xca293900 0x0 0x2cb8939 0x0 0x2cc1d 0x39000000 0x2cd 0x1a390000 0x2 0xce4f3900 0x0 0x2cf2239 0x0 0x2d027 0x39000000 0x2d1 0x58390000 0x2 0xd2683900 0x0 0x2d33939 0x0 0x4ff98 0x81053900 0x0 0x2010039 0x0 0x20200 0x39000000 0x203 0x390000 0x2 0x4003900 0x0 0x2050039 0x0 0x20600 0x39000000 0x207 0x390000 0x2 0x8003900 0x0 0x2090039 0x0 0x20a00 0x39000000 0x20b 0x390000 0x2 0xc003900 0x0 0x20d0039 0x0 0x20e00 0x39000000 0x20f 0x390000 0x2 0x10003900 0x0 0x2110039 0x0 0x21200 0x39000000 0x213 0x390000 0x2 0x14003900 0x0 0x2150039 0x0 0x21600 0x39000000 0x217 0x390000 0x2 0x18003900 0x0 0x2190039 0x0 0x21a00 0x39000000 0x21b 0x390000 0x2 0x1c003900 0x0 0x21d0039 0x0 0x21e00 0x39000000 0x21f 0x390000 0x2 0x20003900 0x0 0x2218139 0x0 0x22281 0x39000000 0x223 0x81390000 0x2 0x24813900 0x0 0x2258139 0x0 0x22681 0x39000000 0x227 0x81390000 0x2 0x28813900 0x0 0x2298139 0x0 0x22a81 0x39000000 0x22b 0x81390000 0x2 0x2c813900 0x0 0x22d8139 0x0 0x22e81 0x39000000 0x22f 0x81390000 0x2 0x30813900 0x0 0x2318139 0x0 0x23281 0x39000000 0x233 0x81390000 0x2 0x34813900 0x0 0x2358139 0x0 0x23681 0x39000000 0x237 0x81390000 0x2 0x38813900 0x0 0x2398139 0x0 0x23a81 0x39000000 0x23b 0x81390000 0x2 0x3c813900 0x0 0x23d8139 0x0 0x23e81 0x39000000 0x23f 0x81390000 0x2 0x40813900 0x0 0x2418139 0x0 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| qcom,mdss-dsi-panel-gamma-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-init-last; | |
| qcom,mdss-dsi-panel-ce-std-command = [39 01 00 00 00 00 04 ff 98 81 02 39 01 00 00 00 00 02 10 06 39 01 00 00 00 00 04 ff 98 81 00]; | |
| qcom,mdss-dsi-panel-ce-vivid-command = [39 00 00 00 00 00 04 ff 98 81 02 39 00 00 00 00 00 02 10 16 39 00 00 00 00 00 02 68 03 39 00 00 00 00 00 02 69 03 39 00 00 00 00 00 02 6a 03 39 00 00 00 00 00 02 6b 03 39 00 00 00 00 00 02 6c 03 39 00 00 00 00 00 02 6d 05 39 00 00 00 00 00 02 6e 05 39 00 00 00 00 00 02 6f 05 39 00 00 00 00 00 02 70 05 39 00 00 00 00 00 02 71 05 39 00 00 00 00 00 02 72 05 39 00 00 00 00 00 02 73 05 39 00 00 00 00 00 02 74 05 39 00 00 00 00 00 02 75 06 39 00 00 00 00 00 02 76 07 39 00 00 00 00 00 02 77 07 39 00 00 00 00 00 02 78 07 39 00 00 00 00 00 02 79 07 39 00 00 00 00 00 02 7a 07 39 00 00 00 00 00 02 7b 06 39 00 00 00 00 00 02 7c 03 39 00 00 00 00 00 02 7d 03 39 00 00 00 00 00 02 7e 03 39 00 00 00 00 00 02 7f 03 39 01 00 00 00 00 04 ff 98 81 00 39 00 00 00 00 00 04 ff 98 81 02 39 00 00 00 00 00 02 7f 03 39 00 00 00 00 00 02 7e 03 39 00 00 00 00 00 02 7d 03 39 00 00 00 00 00 02 7c 03 39 00 00 00 00 00 02 7b 06 39 00 00 00 00 00 02 7a 07 39 00 00 00 00 00 02 79 07 39 00 00 00 00 00 02 78 07 39 00 00 00 00 00 02 77 07 39 00 00 00 00 00 02 76 07 39 00 00 00 00 00 02 75 06 39 00 00 00 00 00 02 74 05 39 00 00 00 00 00 02 73 05 39 00 00 00 00 00 02 72 05 39 00 00 00 00 00 02 71 05 39 00 00 00 00 00 02 70 05 39 00 00 00 00 00 02 6f 05 39 00 00 00 00 00 02 6e 05 39 00 00 00 00 00 02 6d 05 39 00 00 00 00 00 02 6c 03 39 00 00 00 00 00 02 6b 03 39 00 00 00 00 00 02 6a 03 39 00 00 00 00 00 02 69 03 39 00 00 00 00 00 02 68 03 39 00 00 00 00 00 02 10 16 39 01 00 00 00 00 04 ff 98 81 00]; | |
| qcom,mdss-dsi-panel-ce-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-h-sync-pulse = <0x1>; | |
| qcom,mdss-dsi-traffic-mode = "burst_mode"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-panel-timings = <0x8b1c1400 0x44461820 0x19030400>; | |
| qcom,mdss-dsi-t-clk-post = <0x4>; | |
| qcom,mdss-dsi-t-clk-pre = <0x1c>; | |
| qcom,mdss-dsi-bl-min-level = <0x1>; | |
| qcom,mdss-dsi-bl-max-level = <0xfff>; | |
| qcom,mdss-night-brightness = <0x8 0x1a 0x2c 0x3e>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; | |
| qcom,mdss-dsi-lp11-init; | |
| qcom,mdss-dsi-init-delay-us = <0xc350>; | |
| qcom,mdss-dsi-reset-sequence = <0x1 0x5 0x0 0xa 0x1 0x50>; | |
| qcom,esd-check-enabled; | |
| qcom,mdss-dsi-panel-status-command = [06 01 00 01 05 00 02 0a 08 06 01 00 01 05 00 02 0d 08]; | |
| qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-panel-status-check-mode = "reg_read"; | |
| qcom,mdss-dsi-panel-status-valid-params = <0x1 0x1>; | |
| qcom,mdss-dsi-panel-status-value = <0x9c 0x0>; | |
| qcom,mdss-dsi-panel-status-read-length = <0x1 0x1>; | |
| qcom,panel-supply-entries = <0x181>; | |
| linux,phandle = <0x187>; | |
| phandle = <0x187>; | |
| }; | |
| }; | |
| qcom,mdss_dsi@0 { | |
| compatible = "qcom,mdss-dsi"; | |
| hw-config = "single_dsi"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| gdsc-supply = <0x113>; | |
| vdda-supply = <0xf6>; | |
| vddio-supply = <0x12d>; | |
| qcom,msm-bus,name = "mdss_dsi"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0x16 0x200 0x0 0x0 0x16 0x200 0x0 0x3e8>; | |
| ranges = <0x1a94000 0x1a94000 0x300 0x1a94400 0x1a94400 0x280 0x1a94b80 0x1a94b80 0x30 0x193e000 0x193e000 0x30 0x1a96000 0x1a96000 0x300 0x1a96400 0x1a96400 0x280 0x1a96b80 0x1a96b80 0x30 0x193e000 0x193e000 0x30>; | |
| clocks = <0x17e 0x588460a4 0x2b 0xbfb92ed3 0x2b 0x668f51de 0x17e 0xfb32f31e 0x17e 0x585ef6d4 0x17e 0x87c1612 0x17e 0x8067c5a3>; | |
| clock-names = "mdp_core_clk", "iface_clk", "bus_clk", "ext_byte0_clk", "ext_byte1_clk", "ext_pixel0_clk", "ext_pixel1_clk"; | |
| qcom,mmss-ulp-clamp-ctrl-offset = <0x20>; | |
| qcom,mmss-phyreset-ctrl-offset = <0x24>; | |
| qcom,mdss-fb-map-prim = <0x182>; | |
| qcom,mdss-fb-map-sec = <0x183>; | |
| qcom,core-supply-entries { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| qcom,core-supply-entry@0 { | |
| reg = <0x0>; | |
| qcom,supply-name = "gdsc"; | |
| qcom,supply-min-voltage = <0x0>; | |
| qcom,supply-max-voltage = <0x0>; | |
| qcom,supply-enable-load = <0x0>; | |
| qcom,supply-disable-load = <0x0>; | |
| }; | |
| }; | |
| qcom,ctrl-supply-entries { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| qcom,ctrl-supply-entry@0 { | |
| reg = <0x0>; | |
| qcom,supply-name = "vdda"; | |
| qcom,supply-min-voltage = <0x124f80>; | |
| qcom,supply-max-voltage = <0x124f80>; | |
| qcom,supply-enable-load = <0x186a0>; | |
| qcom,supply-disable-load = <0x64>; | |
| qcom,supply-post-on-sleep = <0x14>; | |
| }; | |
| }; | |
| qcom,phy-supply-entries { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| qcom,phy-supply-entry@0 { | |
| reg = <0x0>; | |
| qcom,supply-name = "vddio"; | |
| qcom,supply-min-voltage = <0x1b7740>; | |
| qcom,supply-max-voltage = <0x1b7740>; | |
| qcom,supply-enable-load = <0x186a0>; | |
| qcom,supply-disable-load = <0x64>; | |
| }; | |
| }; | |
| qcom,mdss_dsi_ctrl0@1a94000 { | |
| compatible = "qcom,mdss-dsi-ctrl"; | |
| label = "MDSS DSI CTRL->0"; | |
| cell-index = <0x0>; | |
| reg = <0x1a94000 0x300 0x1a94400 0x280 0x1a94b80 0x30 0x193e000 0x30>; | |
| reg-names = "dsi_ctrl", "dsi_phy", "dsi_phy_regulator", "mmss_misc_phys"; | |
| qcom,timing-db-mode; | |
| qcom,mdss-mdp = <0x184>; | |
| vdd-supply = <0x12a>; | |
| vddio-supply = <0x12d>; | |
| clocks = <0x17e 0x35da7862 0x17e 0xcc5c5c77 0x2b 0xaec5cb25 0x17e 0x75cc885b 0x17e 0xccac1f35>; | |
| clock-names = "byte_clk", "pixel_clk", "core_clk", "byte_clk_rcg", "pixel_clk_rcg"; | |
| qcom,platform-strength-ctrl = [ff 06]; | |
| qcom,platform-bist-ctrl = [00 00 b1 ff 00 00]; | |
| qcom,platform-regulator-settings = [00 01 01 00 20 07 00]; | |
| qcom,platform-lane-config = [01 c0 00 00 00 00 00 01 97 01 c0 00 00 05 00 00 01 97 01 c0 00 00 0a 00 00 01 97 01 c0 00 00 0f 00 00 01 97 00 40 00 00 00 00 00 01 ff]; | |
| qcom,dsi-pref-prim-pan = <0x185>; | |
| qcom,dsi-pref-sub-pan = <0x186>; | |
| qcom,dsi-pref-sub1-pan = <0x187>; | |
| qcom,regulator-ldo-mode; | |
| linux,phandle = <0x180>; | |
| phandle = <0x180>; | |
| }; | |
| qcom,mdss_dsi_ctrl1@1a96000 { | |
| compatible = "qcom,mdss-dsi-ctrl"; | |
| label = "MDSS DSI CTRL->1"; | |
| cell-index = <0x1>; | |
| reg = <0x1a96000 0x300 0x1a96400 0x280 0x1a94b80 0x30 0x193e000 0x30>; | |
| reg-names = "dsi_ctrl", "dsi_phy", "dsi_phy_regulator", "mmss_misc_phys"; | |
| qcom,mdss-mdp = <0x184>; | |
| vdd-supply = <0x12a>; | |
| vddio-supply = <0x12d>; | |
| clocks = <0x17e 0x41f97fd8 0x17e 0x9a9c430d 0x2b 0x34653cc7 0x17e 0x63c2c955 0x17e 0x90f68ac>; | |
| clock-names = "byte_clk", "pixel_clk", "core_clk", "byte_clk_rcg", "pixel_clk_rcg"; | |
| qcom,platform-strength-ctrl = [ff 06]; | |
| qcom,platform-bist-ctrl = [00 00 b1 ff 00 00]; | |
| qcom,platform-regulator-settings = [03 08 07 00 20 07 01]; | |
| qcom,platform-lane-config = [01 c0 00 00 00 00 00 01 97 01 c0 00 00 05 00 00 01 97 01 c0 00 00 0a 00 00 01 97 01 c0 00 00 0f 00 00 01 97 00 40 00 00 00 00 00 01 ff]; | |
| }; | |
| }; | |
| qcom,mdss_wb_panel { | |
| compatible = "qcom,mdss_wb"; | |
| qcom,mdss_pan_res = <0x280 0x280>; | |
| qcom,mdss_pan_bpp = <0x18>; | |
| qcom,mdss-fb-map = <0x188>; | |
| }; | |
| qcom,mdss_rotator { | |
| compatible = "qcom,mdss_rotator"; | |
| qcom,mdss-wb-count = <0x1>; | |
| qcom,mdss-has-downscale; | |
| qcom,mdss-has-ubwc; | |
| qcom,msm-bus,name = "mdss_rotator"; | |
| qcom,msm-bus,num-cases = <0x3>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0x16 0x200 0x0 0x0 0x16 0x200 0x0 0x61a800 0x16 0x200 0x0 0x61a800>; | |
| rot-vdd-supply = <0x113>; | |
| qcom,supply-names = "rot-vdd"; | |
| qcom,mdss-has-reg-bus; | |
| clocks = <0x2b 0xbfb92ed3 0x17e 0x5b1f675e>; | |
| clock-names = "iface_clk", "rot_core_clk"; | |
| qcom,mdss-rot-reg-bus { | |
| qcom,msm-bus,name = "mdss_rot_reg"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,active-only; | |
| qcom,msm-bus,vectors-KBps = <0x1 0x24e 0x0 0x0 0x1 0x24e 0x0 0x12c00>; | |
| }; | |
| }; | |
| qcom,mdss_dsi_pll@1a94a00 { | |
| compatible = "qcom,mdss_dsi_pll_8937"; | |
| label = "MDSS DSI 0 PLL"; | |
| cell-index = <0x0>; | |
| #clock-cells = <0x1>; | |
| reg = <0x1a94a00 0xd4 0x184d074 0x8>; | |
| reg-names = "pll_base", "gdsc_base"; | |
| gdsc-supply = <0x113>; | |
| vddio-supply = <0x12d>; | |
| clocks = <0x2b 0xbfb92ed3>; | |
| clock-names = "iface_clk"; | |
| clock-rate = <0x0>; | |
| qcom,dsi-pll-ssc-en; | |
| qcom,dsi-pll-ssc-mode = "down-spread"; | |
| qcom,ssc-frequency-hz = <0x7530>; | |
| qcom,ssc-ppm = <0x1388>; | |
| linux,phandle = <0xe4>; | |
| phandle = <0xe4>; | |
| qcom,platform-supply-entries { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| qcom,platform-supply-entry@0 { | |
| reg = <0x0>; | |
| qcom,supply-name = "gdsc"; | |
| qcom,supply-min-voltage = <0x0>; | |
| qcom,supply-max-voltage = <0x0>; | |
| qcom,supply-enable-load = <0x0>; | |
| qcom,supply-disable-load = <0x0>; | |
| }; | |
| qcom,platform-supply-entry@1 { | |
| reg = <0x1>; | |
| qcom,supply-name = "vddio"; | |
| qcom,supply-min-voltage = <0x1b7740>; | |
| qcom,supply-max-voltage = <0x1b7740>; | |
| qcom,supply-enable-load = <0x186a0>; | |
| qcom,supply-disable-load = <0x64>; | |
| }; | |
| }; | |
| }; | |
| qcom,mdss_dsi_pll@1a96a00 { | |
| compatible = "qcom,mdss_dsi_pll_8937"; | |
| label = "MDSS DSI 1 PLL"; | |
| cell-index = <0x1>; | |
| #clock-cells = <0x1>; | |
| reg = <0x1a96a00 0xd4 0x184d074 0x8>; | |
| reg-names = "pll_base", "gdsc_base"; | |
| gdsc-supply = <0x113>; | |
| vddio-supply = <0x12d>; | |
| clocks = <0x2b 0xbfb92ed3>; | |
| clock-names = "iface_clk"; | |
| clock-rate = <0x0>; | |
| qcom,dsi-pll-ssc-en; | |
| qcom,dsi-pll-ssc-mode = "down-spread"; | |
| qcom,ssc-frequency-hz = <0x7530>; | |
| qcom,ssc-ppm = <0x1388>; | |
| linux,phandle = <0xe5>; | |
| phandle = <0xe5>; | |
| qcom,platform-supply-entries { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| qcom,platform-supply-entry@0 { | |
| reg = <0x0>; | |
| qcom,supply-name = "gdsc"; | |
| qcom,supply-min-voltage = <0x0>; | |
| qcom,supply-max-voltage = <0x0>; | |
| qcom,supply-enable-load = <0x0>; | |
| qcom,supply-disable-load = <0x0>; | |
| }; | |
| qcom,platform-supply-entry@1 { | |
| reg = <0x1>; | |
| qcom,supply-name = "vddio"; | |
| qcom,supply-min-voltage = <0x1b7740>; | |
| qcom,supply-max-voltage = <0x1b7740>; | |
| qcom,supply-enable-load = <0x186a0>; | |
| qcom,supply-disable-load = <0x64>; | |
| }; | |
| }; | |
| }; | |
| gpio_keys { | |
| compatible = "gpio-keys"; | |
| input-name = "gpio-keys"; | |
| pinctrl-names = "tlmm_gpio_key_active", "tlmm_gpio_key_suspend"; | |
| pinctrl-0 = <0x189>; | |
| pinctrl-1 = <0x18a>; | |
| vol_up { | |
| label = "volume_up"; | |
| gpios = <0xa7 0x5b 0x1>; | |
| linux,input-type = <0x1>; | |
| linux,code = <0x73>; | |
| debounce-interval = <0xf>; | |
| }; | |
| }; | |
| dsi_panel_pwr_supply { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| linux,phandle = <0x181>; | |
| phandle = <0x181>; | |
| qcom,panel-supply-entry@0 { | |
| reg = <0x0>; | |
| qcom,supply-name = "vdd"; | |
| qcom,supply-min-voltage = <0x2b7cd0>; | |
| qcom,supply-max-voltage = <0x2b7cd0>; | |
| qcom,supply-enable-load = <0x186a0>; | |
| qcom,supply-disable-load = <0x64>; | |
| }; | |
| qcom,panel-supply-entry@1 { | |
| reg = <0x1>; | |
| qcom,supply-name = "vddio"; | |
| qcom,supply-min-voltage = <0x1b7740>; | |
| qcom,supply-max-voltage = <0x1b7740>; | |
| qcom,supply-enable-load = <0x186a0>; | |
| qcom,supply-disable-load = <0x64>; | |
| }; | |
| }; | |
| qseecom@84A00000 { | |
| compatible = "qcom,qseecom"; | |
| reg = <0x84a00000 0x1900000>; | |
| reg-names = "secapp-region"; | |
| qcom,hlos-num-ce-hw-instances = <0x1>; | |
| qcom,hlos-ce-hw-instance = <0x0>; | |
| qcom,qsee-ce-hw-instance = <0x0>; | |
| qcom,disk-encrypt-pipe-pair = <0x2>; | |
| qcom,support-fde; | |
| qcom,appsbl-qseecom-support; | |
| qcom,msm-bus,name = "qseecom-noc"; | |
| qcom,msm-bus,num-cases = <0x4>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,support-bus-scaling; | |
| qcom,msm-bus,vectors-KBps = <0x37 0x200 0x0 0x0 0x37 0x200 0x0 0x0 0x37 0x200 0x1d4c0 0x124f80 0x37 0x200 0x60180 0x3c0f00>; | |
| clocks = <0x2b 0x37a21414 0x2b 0xd390d2 0x2b 0x94de4919 0x2b 0xd4415c9b>; | |
| clock-names = "core_clk_src", "core_clk", "iface_clk", "bus_clk"; | |
| qcom,ce-opp-freq = <0x5f5e100>; | |
| }; | |
| gen-vkey1 { | |
| compatible = "qcom,gen-vkeys"; | |
| label = "ft5x06_720p"; | |
| qcom,disp-maxx = <0x2d0>; | |
| qcom,disp-maxy = <0x500>; | |
| qcom,panel-maxx = <0x2d0>; | |
| qcom,panel-maxy = <0x5b2>; | |
| qcom,key-codes = <0x8b 0xac 0x9e>; | |
| qcom,y-offset = <0x0>; | |
| }; | |
| gpio-leds { | |
| compatible = "gpio-leds"; | |
| status = "okay"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = <0x18b>; | |
| infred { | |
| gpios = <0xa7 0x2d 0x0>; | |
| label = "infrared"; | |
| linux,default-trigger = "infra-red"; | |
| default-state = "off"; | |
| retain-state-suspended; | |
| }; | |
| }; | |
| fpc1020 { | |
| compatible = "soc:fpc1020"; | |
| interrupt-parent = <0xa7>; | |
| interrupts = <0x9 0x0>; | |
| fpc,gpio_rst = <0xa7 0x8 0x0>; | |
| fpc,gpio_irq = <0xa7 0x9 0x0>; | |
| vcc_spi-supply = <0xb6>; | |
| vdd_ana-supply = <0xb6>; | |
| vdd_io-supply = <0xb6>; | |
| fpc,enable-on-boot; | |
| fpc,spi-max-frequency = <0x493e00>; | |
| clock-names = "iface_clk", "core_clk"; | |
| clocks = <0x2b 0x8caa5b4f 0x2b 0x759a76b0>; | |
| pinctrl-names = "fpc1020_spi_active", "fpc1020_reset_reset", "fpc1020_reset_active", "fpc1020_irq_active"; | |
| pinctrl-0 = <0x18c>; | |
| pinctrl-1 = <0x18d>; | |
| pinctrl-2 = <0x18e>; | |
| pinctrl-3 = <0x18f>; | |
| }; | |
| goodix_fp { | |
| compatible = "goodix,fingerprint"; | |
| spi-max-frequency = <0xf4240>; | |
| input-device-name = "gf3208"; | |
| interrupt-parent = <0xa7>; | |
| interrupts = <0x9 0x0>; | |
| goodix,gpio_reset = <0xa7 0x8 0x0>; | |
| goodix,gpio_irq = <0xa7 0x9 0x0>; | |
| clock-names = "iface_clk", "core_clk"; | |
| clocks = <0x2b 0x8caa5b4f 0x2b 0x759a76b0>; | |
| pinctrl-names = "goodixfp_spi_active", "goodixfp_reset_reset", "goodixfp_reset_active", "goodixfp_irq_active"; | |
| pinctrl-0 = <0x190>; | |
| pinctrl-1 = <0x191>; | |
| pinctrl-2 = <0x192>; | |
| pinctrl-3 = <0x193>; | |
| }; | |
| qcom,camera-flash { | |
| cell-index = <0x0>; | |
| compatible = "qcom,camera-flash"; | |
| qcom,flash-type = <0x1>; | |
| qcom,flash-source = <0x194 0x195>; | |
| qcom,torch-source = <0x196 0x197>; | |
| qcom,switch-source = <0x198>; | |
| linux,phandle = <0x133>; | |
| phandle = <0x133>; | |
| }; | |
| gen-vkeys_ist { | |
| compatible = "qcom,gen-vkeys_ist"; | |
| label = "ist30xx_ts_input"; | |
| qcom,disp-maxx = <0x438>; | |
| qcom,disp-maxy = <0x780>; | |
| qcom,panel-maxx = <0x438>; | |
| qcom,panel-maxy = <0x832>; | |
| qcom,key-codes = <0x8b 0xac 0x9e>; | |
| qcom,y-offset = <0x0>; | |
| }; | |
| }; | |
| chosen { | |
| bootargs = "sched_enable_hmp=1"; | |
| }; | |
| aliases { | |
| smd1 = "/soc/qcom,smdtty/qcom,smdtty-apps-fm"; | |
| smd2 = "/soc/qcom,smdtty/smdtty-apps-riva-bt-acl"; | |
| smd3 = "/soc/qcom,smdtty/qcom,smdtty-apps-riva-bt-cmd"; | |
| smd4 = "/soc/qcom,smdtty/qcom,smdtty-mbalbridge"; | |
| smd5 = "/soc/qcom,smdtty/smdtty-apps-riva-ant-cmd"; | |
| smd6 = "/soc/qcom,smdtty/smdtty-apps-riva-ant-data"; | |
| smd7 = "/soc/qcom,smdtty/qcom,smdtty-data1"; | |
| smd8 = "/soc/qcom,smdtty/qcom,smdtty-data4"; | |
| smd11 = "/soc/qcom,smdtty/qcom,smdtty-data11"; | |
| smd21 = "/soc/qcom,smdtty/qcom,smdtty-data21"; | |
| smd36 = "/soc/qcom,smdtty/smdtty-loopback"; | |
| i2c2 = "/soc/i2c@78b6000"; | |
| i2c5 = "/soc/i2c@7af5000"; | |
| spi3 = "/soc/spi@78b7000"; | |
| sdhc1 = "/soc/sdhci@7824900"; | |
| sdhc2 = "/soc/sdhci@7864900"; | |
| i2c3 = "/soc/i2c@78b7000"; | |
| }; | |
| memory { | |
| device_type = "memory"; | |
| reg = <0x0 0x0 0x0 0x0>; | |
| }; | |
| firmware { | |
| android { | |
| compatible = "android,firmware"; | |
| fstab { | |
| compatible = "android,fstab"; | |
| vendor { | |
| compatible = "android,vendor"; | |
| dev = "/dev/block/platform/soc/7824900.sdhci/by-name/cust"; | |
| type = "ext4"; | |
| mnt_flags = "ro,barrier=1,discard"; | |
| fsmgr_flags = "wait"; | |
| status = "ok"; | |
| }; | |
| system { | |
| compatible = "android,system"; | |
| dev = "/dev/block/platform/soc/7824900.sdhci/by-name/system"; | |
| type = "ext4"; | |
| mnt_flags = "ro,barrier=1,discard"; | |
| fsmgr_flags = "wait"; | |
| status = "ok"; | |
| }; | |
| }; | |
| }; | |
| }; | |
| reserved-memory { | |
| #address-cells = <0x2>; | |
| #size-cells = <0x2>; | |
| ranges; | |
| other_ext_region@0 { | |
| compatible = "removed-dma-pool"; | |
| no-map; | |
| reg = <0x0 0x84a00000 0x0 0x1e00000>; | |
| }; | |
| modem_region@0 { | |
| compatible = "removed-dma-pool"; | |
| no-map; | |
| reg = <0x0 0x86800000 0x0 0x5000000>; | |
| linux,phandle = <0x117>; | |
| phandle = <0x117>; | |
| }; | |
| adsp_fw_region@0 { | |
| compatible = "removed-dma-pool"; | |
| no-map; | |
| reg = <0x0 0x8b800000 0x0 0x1100000>; | |
| linux,phandle = <0x11a>; | |
| phandle = <0x11a>; | |
| }; | |
| wcnss_fw_region@0 { | |
| compatible = "removed-dma-pool"; | |
| no-map; | |
| reg = <0x0 0x8c900000 0x0 0x700000>; | |
| linux,phandle = <0x11d>; | |
| phandle = <0x11d>; | |
| }; | |
| venus_region@0 { | |
| compatible = "shared-dma-pool"; | |
| reusable; | |
| alloc-ranges = <0x0 0x80000000 0x0 0x10000000>; | |
| alignment = <0x0 0x400000>; | |
| size = <0x0 0x800000>; | |
| linux,phandle = <0x11e>; | |
| phandle = <0x11e>; | |
| }; | |
| secure_region@0 { | |
| compatible = "shared-dma-pool"; | |
| reusable; | |
| alignment = <0x0 0x400000>; | |
| size = <0x0 0x7000000>; | |
| linux,phandle = <0x31>; | |
| phandle = <0x31>; | |
| }; | |
| qseecom_region@0 { | |
| compatible = "shared-dma-pool"; | |
| reusable; | |
| alignment = <0x0 0x400000>; | |
| size = <0x0 0x1000000>; | |
| linux,phandle = <0x32>; | |
| phandle = <0x32>; | |
| }; | |
| adsp_region@0 { | |
| compatible = "shared-dma-pool"; | |
| reusable; | |
| alignment = <0x0 0x400000>; | |
| size = <0x0 0x400000>; | |
| linux,phandle = <0xf8>; | |
| phandle = <0xf8>; | |
| }; | |
| splash_region@83000000 { | |
| reg = <0x0 0x90000000 0x0 0x1400000>; | |
| linux,phandle = <0x17f>; | |
| phandle = <0x17f>; | |
| }; | |
| }; | |
| psci { | |
| compatible = "arm,psci-1.0"; | |
| method = "smc"; | |
| }; | |
| qcom,battery-data { | |
| qcom,batt-id-range-pct = <0xf>; | |
| linux,phandle = <0x111>; | |
| phandle = <0x111>; | |
| qcom,2312442_wingtech_a12desay_4000mah_averaged_masterslave_feb1st2016 { | |
| qcom,max-voltage-uv = <0x432380>; | |
| qcom,nom-batt-capacity-mah = <0xfa0>; | |
| qcom,batt-id-kohm = <0x1e>; | |
| qcom,battery-beta = <0x1004>; | |
| qcom,thermal-coefficients = [da 85 5e 4a db 35]; | |
| qcom,battery-type = "qrd_msm8937_Desay_4000mah"; | |
| qcom,chg-rslow-comp-c1 = <0x320852>; | |
| qcom,chg-rslow-comp-c2 = <0x4be2a4>; | |
| qcom,chg-rs-to-rslow = <0x112b7f>; | |
| qcom,chg-rslow-comp-thr = <0xac>; | |
| qcom,checksum = <0xab22>; | |
| qcom,gui-version = "PMI8950GUI - 2.0.0.15"; | |
| qcom,fg-profile-data = <0xd6835e7c 0xbb809b76 0x64838174 0xa689bc94 0x9d82f391 0xe0af03bb 0x5216fe83 0x7e7d8b81 0xb7c6a83 0x626fb789 0x29954982 0x329ab0bd 0xacb520d 0x1b10b359 0x1470eefc 0x783e7b3f 0xb400000 0x5a46c12b 0x1e2a0000 0x0 0x0 0xba704d6b 0x31637388 0xbf75026b 0xde60ef7b 0xd46e4463 0xd6754fa0 0x1ee460ff 0x5ea0710c 0x2800ff36 0xf0113003 0xc>; | |
| }; | |
| qcom,2312470_wingtech_a12atl_4000mah_averaged_masterslave_feb1st2016 { | |
| qcom,max-voltage-uv = <0x432380>; | |
| qcom,nom-batt-capacity-mah = <0xfa0>; | |
| qcom,batt-id-kohm = <0x44>; | |
| qcom,battery-beta = <0x1036>; | |
| qcom,thermal-coefficients = [d2 85 0d 4a a5 35]; | |
| qcom,battery-type = "qrd_msm8937_Atl_4000mah"; | |
| qcom,chg-rslow-comp-c1 = <0x2df2ce>; | |
| qcom,chg-rslow-comp-c2 = <0x3fddee>; | |
| qcom,chg-rs-to-rslow = <0xebd75>; | |
| qcom,chg-rslow-comp-thr = <0xa3>; | |
| qcom,checksum = <0x90c2>; | |
| qcom,gui-version = "PMI8950GUI - 2.0.0.15"; | |
| qcom,fg-profile-data = <0xe183cd7c 0xfa80de76 0x69836b75 0x2b8a2495 0x1282869a 0x72bd12ca 0x5611ec83 0xb57cc880 0x55765a83 0xa6605e81 0xed8d5482 0x9999e9bc 0xcdc9540e 0x6510a458 0x1470eefc 0xf36443d 0xfd2e0000 0x603f4433 0x353f0000 0x0 0x0 0xf76bda6a 0x5f63d880 0xeb6f3c62 0xb5576b78 0xdf6eae60 0x8a845ba3 0x17a8632d 0x65a0710c 0x2800ff36 0xf0113003 0xc>; | |
| }; | |
| qcom,2336567_wingtech_s88537a1coslight_4000mah_averaged_masterslave_mar3rd2016 { | |
| qcom,max-voltage-uv = <0x432380>; | |
| qcom,nom-batt-capacity-mah = <0xfa0>; | |
| qcom,batt-id-kohm = <0x64>; | |
| qcom,battery-beta = <0x109a>; | |
| qcom,thermal-coefficients = [b7 85 b2 49 71 35]; | |
| qcom,battery-type = "qrd_msm8937_Coslight_4000mah"; | |
| qcom,chg-rslow-comp-c1 = <0x37d1f3>; | |
| qcom,chg-rslow-comp-c2 = <0x5baa3b>; | |
| qcom,chg-rs-to-rslow = <0x10a654>; | |
| qcom,chg-rslow-comp-thr = <0xb2>; | |
| qcom,checksum = <0xa765>; | |
| qcom,gui-version = "PMI8950GUI - 2.0.0.15"; | |
| qcom,fg-profile-data = <0xe183e07c 0x31818877 0x62831c74 0x4e896094 0x4082a698 0x79b608c2 0x52170788 0xa7ef781 0x737c3683 0x40790886 0x9d816b82 0x6b98d0b6 0x25c35e15 0x32104259 0x1470eefc 0x436dc44 0xde3b0000 0x7c4cfd31 0xe6410000 0x0 0x0 0x4f71c56b 0x5b747188 0x887ce671 0x60741572 0xa275716a 0xb9665ca3 0x23916087 0x5ea0710c 0x2800ff36 0xf0113003 0xc>; | |
| }; | |
| qcom,2336564_wingtech_s88537a1scud_4000mah_averaged_masterslave_mar1st2016 { | |
| qcom,max-voltage-uv = <0x432380>; | |
| qcom,nom-batt-capacity-mah = <0x1004>; | |
| qcom,batt-id-kohm = <0xa>; | |
| qcom,battery-beta = <0x109a>; | |
| qcom,thermal-coefficients = [b7 85 b2 49 71 35]; | |
| qcom,battery-type = "qrd_msm8937_feimaotui_4000mah"; | |
| qcom,chg-rslow-comp-c1 = <0x259722>; | |
| qcom,chg-rslow-comp-c2 = <0x239733>; | |
| qcom,chg-rs-to-rslow = <0x123eb5>; | |
| qcom,chg-rslow-comp-thr = <0x99>; | |
| qcom,checksum = <0xe6eb>; | |
| qcom,gui-version = "PMI8950GUI - 2.0.0.15"; | |
| qcom,fg-profile-data = <0xd683787c 0x6817f77 0x59837b74 0x488a5e95 0xef81259b 0x2dbe31cb 0x54111388 0xf77ed482 0x6f7d5e83 0xfe6c1889 0x63942982 0x879afcbd 0x75cb5a0e 0x3310d359 0x1470eefc 0x2c0bdd46 0x93410000 0xa03f2e30 0x5e340000 0x0 0x0 0x99715070 0x8a550282 0xec76ae6b 0x2f6c0379 0x3c75d568 0xc2748b9a 0x23735a3f 0x55a0710c 0x2800ff36 0xf0113003 0xc>; | |
| }; | |
| }; | |
| }; |
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